VirtualBox

source: vbox/trunk/src/VBox/Devices/VirtIO/Virtio.h@ 77807

Last change on this file since 77807 was 76565, checked in by vboxsync, 6 years ago

Devices: Use VBOX_INCLUDED_SRC_ as header guard prefix with scm.
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1/* $Id: Virtio.h 76565 2019-01-01 04:23:20Z vboxsync $ */
2/** @file
3 * Virtio.h - Virtio Declarations
4 */
5
6/*
7 * Copyright (C) 2009-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VBOX_INCLUDED_SRC_VirtIO_Virtio_h
19#define VBOX_INCLUDED_SRC_VirtIO_Virtio_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <iprt/ctype.h>
25
26
27/** @name Saved state versions.
28 * The saved state version is changed if either common or any of specific
29 * parts are changed. That is, it is perfectly possible that the version
30 * of saved vnet state will increase as a result of change in vblk structure
31 * for example.
32 */
33#define VIRTIO_SAVEDSTATE_VERSION_3_1_BETA1 1
34#define VIRTIO_SAVEDSTATE_VERSION 2
35/** @} */
36
37#define DEVICE_PCI_VENDOR_ID 0x1AF4
38#define DEVICE_PCI_BASE_ID 0x1000
39#define DEVICE_PCI_SUBSYSTEM_VENDOR_ID 0x1AF4
40#define DEVICE_PCI_SUBSYSTEM_BASE_ID 1
41
42#define VIRTIO_MAX_NQUEUES 3
43
44#define VPCI_HOST_FEATURES 0x0
45#define VPCI_GUEST_FEATURES 0x4
46#define VPCI_QUEUE_PFN 0x8
47#define VPCI_QUEUE_NUM 0xC
48#define VPCI_QUEUE_SEL 0xE
49#define VPCI_QUEUE_NOTIFY 0x10
50#define VPCI_STATUS 0x12
51#define VPCI_ISR 0x13
52#define VPCI_CONFIG 0x14
53
54#define VPCI_ISR_QUEUE 0x1
55#define VPCI_ISR_CONFIG 0x3
56
57#define VPCI_STATUS_ACK 0x01
58#define VPCI_STATUS_DRV 0x02
59#define VPCI_STATUS_DRV_OK 0x04
60#define VPCI_STATUS_FAILED 0x80
61
62#define VPCI_F_NOTIFY_ON_EMPTY 0x01000000
63#define VPCI_F_ANY_LAYOUT 0x08000000
64#define VPCI_F_RING_INDIRECT_DESC 0x10000000
65#define VPCI_F_RING_EVENT_IDX 0x20000000
66#define VPCI_F_BAD_FEATURE 0x40000000
67
68#define VRINGDESC_MAX_SIZE (2 * 1024 * 1024)
69#define VRINGDESC_F_NEXT 0x01
70#define VRINGDESC_F_WRITE 0x02
71#define VRINGDESC_F_INDIRECT 0x04
72
73typedef struct VRingDesc
74{
75 uint64_t u64Addr;
76 uint32_t uLen;
77 uint16_t u16Flags;
78 uint16_t u16Next;
79} VRINGDESC;
80typedef VRINGDESC *PVRINGDESC;
81
82#define VRINGAVAIL_F_NO_INTERRUPT 0x01
83
84typedef struct VRingAvail
85{
86 uint16_t uFlags;
87 uint16_t uNextFreeIndex;
88 uint16_t auRing[1];
89} VRINGAVAIL;
90
91typedef struct VRingUsedElem
92{
93 uint32_t uId;
94 uint32_t uLen;
95} VRINGUSEDELEM;
96
97#define VRINGUSED_F_NO_NOTIFY 0x01
98
99typedef struct VRingUsed
100{
101 uint16_t uFlags;
102 uint16_t uIndex;
103 VRINGUSEDELEM aRing[1];
104} VRINGUSED;
105typedef VRINGUSED *PVRINGUSED;
106
107#define VRING_MAX_SIZE 1024
108
109typedef struct VRing
110{
111 uint16_t uSize;
112 uint16_t padding[3];
113 RTGCPHYS addrDescriptors;
114 RTGCPHYS addrAvail;
115 RTGCPHYS addrUsed;
116} VRING;
117typedef VRING *PVRING;
118
119/**
120 * Queue callback (consumer?).
121 *
122 * @param pvState Pointer to the VirtIO PCI core state, VPCISTATE.
123 * @param pQueue Pointer to the queue structure.
124 */
125typedef DECLCALLBACK(void) FNVPCIQUEUECALLBACK(void *pvState, struct VQueue *pQueue);
126/** Pointer to a VQUEUE callback function. */
127typedef FNVPCIQUEUECALLBACK *PFNVPCIQUEUECALLBACK;
128
129typedef struct VQueue
130{
131 VRING VRing;
132 uint16_t uNextAvailIndex;
133 uint16_t uNextUsedIndex;
134 uint32_t uPageNumber;
135 R3PTRTYPE(PFNVPCIQUEUECALLBACK) pfnCallback;
136 R3PTRTYPE(const char *) pcszName;
137} VQUEUE;
138typedef VQUEUE *PVQUEUE;
139
140typedef struct VQueueElemSeg
141{
142 RTGCPHYS addr;
143 void *pv;
144 uint32_t cb;
145} VQUEUESEG;
146
147typedef struct VQueueElem
148{
149 uint32_t uIndex;
150 uint32_t nIn;
151 uint32_t nOut;
152 VQUEUESEG aSegsIn[VRING_MAX_SIZE];
153 VQUEUESEG aSegsOut[VRING_MAX_SIZE];
154} VQUEUEELEM;
155typedef VQUEUEELEM *PVQUEUEELEM;
156
157
158enum VirtioDeviceType
159{
160 VIRTIO_NET_ID = 0,
161 VIRTIO_BLK_ID = 1,
162 VIRTIO_32BIT_HACK = 0x7fffffff
163};
164
165
166/**
167 * The core (/common) state of the VirtIO PCI device
168 *
169 * @implements PDMILEDPORTS
170 */
171typedef struct VPCIState_st
172{
173 PDMCRITSECT cs; /**< Critical section - what is it protecting? */
174 /* Read-only part, never changes after initialization. */
175 char szInstance[8]; /**< Instance name, e.g. VNet#1. */
176
177#if HC_ARCH_BITS != 64
178 uint32_t padding1;
179#endif
180
181 /** Status LUN: Base interface. */
182 PDMIBASE IBase;
183 /** Status LUN: LED port interface. */
184 PDMILEDPORTS ILeds;
185 /** Status LUN: LED connector (peer). */
186 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
187
188 PPDMDEVINSR3 pDevInsR3; /**< Device instance - R3. */
189 PPDMDEVINSR0 pDevInsR0; /**< Device instance - R0. */
190 PPDMDEVINSRC pDevInsRC; /**< Device instance - RC. */
191
192#if HC_ARCH_BITS == 64
193 uint32_t padding2;
194#endif
195
196 /** TODO */
197 PDMPCIDEV pciDevice;
198 /** Base port of I/O space region. */
199 RTIOPORT IOPortBase;
200
201 /* Read/write part, protected with critical section. */
202 /** Status LED. */
203 PDMLED led;
204
205 uint32_t uGuestFeatures;
206 uint16_t uQueueSelector; /**< An index in aQueues array. */
207 uint8_t uStatus; /**< Device Status (bits are device-specific). */
208 uint8_t uISR; /**< Interrupt Status Register. */
209
210#if HC_ARCH_BITS != 64
211 uint32_t padding3;
212#endif
213
214 uint32_t nQueues; /**< Actual number of queues used. */
215 VQUEUE Queues[VIRTIO_MAX_NQUEUES];
216
217#if defined(VBOX_WITH_STATISTICS)
218 STAMPROFILEADV StatIOReadR3;
219 STAMPROFILEADV StatIOReadR0;
220 STAMPROFILEADV StatIOReadRC;
221 STAMPROFILEADV StatIOWriteR3;
222 STAMPROFILEADV StatIOWriteR0;
223 STAMPROFILEADV StatIOWriteRC;
224 STAMCOUNTER StatIntsRaised;
225 STAMCOUNTER StatIntsSkipped;
226 STAMPROFILE StatCsR3;
227 STAMPROFILE StatCsR0;
228 STAMPROFILE StatCsRC;
229#endif /* VBOX_WITH_STATISTICS */
230} VPCISTATE;
231/** Pointer to the core (/common) state of a VirtIO PCI device. */
232typedef VPCISTATE *PVPCISTATE;
233
234typedef DECLCALLBACK(uint32_t) FNGETHOSTFEATURES(void *pvState);
235typedef FNGETHOSTFEATURES *PFNGETHOSTFEATURES;
236
237/** @name VirtIO port I/O callbacks.
238 * @{ */
239typedef struct VPCIIOCALLBACKS
240{
241 DECLCALLBACKMEMBER(uint32_t, pfnGetHostFeatures)(void *pvState);
242 DECLCALLBACKMEMBER(uint32_t, pfnGetHostMinimalFeatures)(void *pvState);
243 DECLCALLBACKMEMBER(void, pfnSetHostFeatures)(void *pvState, uint32_t fFeatures);
244 DECLCALLBACKMEMBER(int, pfnGetConfig)(void *pvState, uint32_t offCfg, uint32_t cb, void *pvData);
245 DECLCALLBACKMEMBER(int, pfnSetConfig)(void *pvState, uint32_t offCfg, uint32_t cb, void *pvData);
246 DECLCALLBACKMEMBER(int, pfnReset)(void *pvState);
247 DECLCALLBACKMEMBER(void, pfnReady)(void *pvState);
248} VPCIIOCALLBACKS;
249/** Pointer to a const VirtIO port I/O callback structure. */
250typedef const VPCIIOCALLBACKS *PCVPCIIOCALLBACKS;
251/** @} */
252
253int vpciRaiseInterrupt(VPCISTATE *pState, int rcBusy, uint8_t u8IntCause);
254int vpciIOPortIn(PPDMDEVINS pDevIns,
255 void *pvUser,
256 RTIOPORT port,
257 uint32_t *pu32,
258 unsigned cb,
259 PCVPCIIOCALLBACKS pCallbacks);
260
261int vpciIOPortOut(PPDMDEVINS pDevIns,
262 void *pvUser,
263 RTIOPORT port,
264 uint32_t u32,
265 unsigned cb,
266 PCVPCIIOCALLBACKS pCallbacks);
267
268void vpciSetWriteLed(PVPCISTATE pState, bool fOn);
269void vpciSetReadLed(PVPCISTATE pState, bool fOn);
270int vpciSaveExec(PVPCISTATE pState, PSSMHANDLE pSSM);
271int vpciLoadExec(PVPCISTATE pState, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass, uint32_t nQueues);
272int vpciConstruct(PPDMDEVINS pDevIns, VPCISTATE *pState, int iInstance, const char *pcszNameFmt,
273 uint16_t uDeviceId, uint16_t uClass, uint32_t nQueues);
274int vpciDestruct(VPCISTATE* pState);
275void vpciRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
276void vpciReset(PVPCISTATE pState);
277void *vpciQueryInterface(struct PDMIBASE *pInterface, const char *pszIID);
278PVQUEUE vpciAddQueue(VPCISTATE* pState, unsigned uSize, PFNVPCIQUEUECALLBACK pfnCallback, const char *pcszName);
279
280#define VPCI_CS
281DECLINLINE(int) vpciCsEnter(VPCISTATE *pState, int rcBusy)
282{
283#ifdef VPCI_CS
284 STAM_PROFILE_START(&pState->CTX_SUFF(StatCs), a);
285 int rc = PDMCritSectEnter(&pState->cs, rcBusy);
286 STAM_PROFILE_STOP(&pState->CTX_SUFF(StatCs), a);
287 return rc;
288#else
289 return VINF_SUCCESS;
290#endif
291}
292
293DECLINLINE(void) vpciCsLeave(VPCISTATE *pState)
294{
295#ifdef VPCI_CS
296 PDMCritSectLeave(&pState->cs);
297#endif
298}
299
300void vringSetNotification(PVPCISTATE pState, PVRING pVRing, bool fEnabled);
301
302DECLINLINE(uint16_t) vringReadAvailIndex(PVPCISTATE pState, PVRING pVRing)
303{
304 uint16_t tmp;
305
306 PDMDevHlpPhysRead(pState->CTX_SUFF(pDevIns),
307 pVRing->addrAvail + RT_UOFFSETOF(VRINGAVAIL, uNextFreeIndex),
308 &tmp, sizeof(tmp));
309 return tmp;
310}
311
312bool vqueueSkip(PVPCISTATE pState, PVQUEUE pQueue);
313bool vqueueGet(PVPCISTATE pState, PVQUEUE pQueue, PVQUEUEELEM pElem, bool fRemove = true);
314void vqueuePut(PVPCISTATE pState, PVQUEUE pQueue, PVQUEUEELEM pElem, uint32_t uLen, uint32_t uReserved = 0);
315void vqueueNotify(PVPCISTATE pState, PVQUEUE pQueue);
316void vqueueSync(PVPCISTATE pState, PVQUEUE pQueue);
317
318DECLINLINE(bool) vqueuePeek(PVPCISTATE pState, PVQUEUE pQueue, PVQUEUEELEM pElem)
319{
320 return vqueueGet(pState, pQueue, pElem, /* fRemove */ false);
321}
322
323DECLINLINE(bool) vqueueIsReady(PVPCISTATE pState, PVQUEUE pQueue)
324{
325 NOREF(pState);
326 return !!pQueue->VRing.addrAvail;
327}
328
329DECLINLINE(bool) vqueueIsEmpty(PVPCISTATE pState, PVQUEUE pQueue)
330{
331 return (vringReadAvailIndex(pState, &pQueue->VRing) == pQueue->uNextAvailIndex);
332}
333
334#endif /* !VBOX_INCLUDED_SRC_VirtIO_Virtio_h */
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