DevLsiLogicSCSI.h@ 44004

Last change on this file since 44004 was 40640, checked in by vboxsync, 13 years ago
Renamed SCSI BIOS constants to elucidate their purpose.
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1	/* $Id: DevLsiLogicSCSI.h 40640 2012-03-26 12:55:17Z vboxsync $ */
2	/** @file
3	* VBox storage devices: LsiLogic LSI53c1030 SCSI controller - Defines and structures.
4	*/
5
6	/*
7	* Copyright (C) 2006-2009 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17	#ifndef __DEVLSILOGICSCSI_H__
18	#define __DEVLSILOGICSCSI_H__
19
20	#include <iprt/stdint.h>
21
22	/*
23	* Custom fixed I/O ports for BIOS controller access. Note that these should
24	* not be in the ISA range (below 400h) to avoid conflicts with ISA device
25	* probing. Addresses in the 300h-340h range should be especially avoided.
26	*/
27	#define LSILOGIC_BIOS_IO_PORT 0x340
28	#define LSILOGIC_SAS_BIOS_IO_PORT 0x350
29
30	#define LSILOGICSCSI_REQUEST_QUEUE_DEPTH_DEFAULT 256
31	#define LSILOGICSCSI_REPLY_QUEUE_DEPTH_DEFAULT 256
32
33	#define LSILOGICSCSI_MAXIMUM_CHAIN_DEPTH 3
34
35	#define LSILOGIC_NR_OF_ALLOWED_BIGGER_LISTS 100
36
37	/** Equal for all devices */
38	#define LSILOGICSCSI_PCI_VENDOR_ID (0x1000)
39
40	/** SPI SCSI controller (LSI53C1030) */
41	#define LSILOGICSCSI_PCI_SPI_CTRLNAME "LSI53C1030"
42	#define LSILOGICSCSI_PCI_SPI_DEVICE_ID (0x0030)
43	#define LSILOGICSCSI_PCI_SPI_REVISION_ID (0x00)
44	#define LSILOGICSCSI_PCI_SPI_CLASS_CODE (0x01)
45	#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_VENDOR_ID (0x1000)
46	#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_ID (0x8000)
47	#define LSILOGICSCSI_PCI_SPI_PORTS_MAX 1
48	#define LSILOGICSCSI_PCI_SPI_BUSES_MAX 1
49	#define LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX 16
50	#define LSILOGICSCSI_PCI_SPI_DEVICES_MAX (LSILOGICSCSI_PCI_SPI_BUSES_MAX*LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX)
51
52	/** SAS SCSI controller (SAS1068 PCI-X Fusion-MPT SAS) */
53	#define LSILOGICSCSI_PCI_SAS_CTRLNAME "SAS1068"
54	#define LSILOGICSCSI_PCI_SAS_DEVICE_ID (0x0054)
55	#define LSILOGICSCSI_PCI_SAS_REVISION_ID (0x00)
56	#define LSILOGICSCSI_PCI_SAS_CLASS_CODE (0x00)
57	#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_VENDOR_ID (0x1000)
58	#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_ID (0x8000)
59	#define LSILOGICSCSI_PCI_SAS_PORTS_MAX 256
60	#define LSILOGICSCSI_PCI_SAS_PORTS_DEFAULT 8
61	#define LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX 1
62	#define LSILOGICSCSI_PCI_SAS_DEVICES_MAX (LSILOGICSCSI_PCI_SAS_PORTS_MAX * LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX)
63
64	/**
65	* A SAS address.
66	*/
67	#pragma pack(1)
68	typedef union SASADDRESS
69	{
70	/** 64bit view. */
71	uint64_t u64Address;
72	/** 32bit view. */
73	uint32_t u32Address[2];
74	/** 16bit view. */
75	uint16_t u16Address[4];
76	/** Byte view. */
77	uint8_t u8Address[8];
78	} SASADDRESS, *PSASADDRESS;
79	#pragma pack()
80	AssertCompileSize(SASADDRESS, 8);
81
82	/**
83	* Possible device types we support.
84	*/
85	typedef enum LSILOGICCTRLTYPE
86	{
87	/** SPI SCSI controller (PCI dev id 0x0030) */
88	LSILOGICCTRLTYPE_SCSI_SPI = 0,
89	/** SAS SCSI controller (PCI dev id 0x0054) */
90	LSILOGICCTRLTYPE_SCSI_SAS = 1,
91	/** 32bit hack */
92	LSILOGICCTRLTYPE_32BIT_HACK = 0x7fffffff
93	} LSILOGICCTRLTYPE, *PLSILOGICCTRLTYPE;
94
95	/**
96	* A simple SG element for a 64bit address.
97	*/
98	#pragma pack(1)
99	typedef struct MptSGEntrySimple64
100	{
101	/** Length of the buffer this entry describes. */
102	unsigned u24Length: 24;
103	/** Flag whether this element is the end of the list. */
104	unsigned fEndOfList: 1;
105	/** Flag whether the address is 32bit or 64bits wide. */
106	unsigned f64BitAddress: 1;
107	/** Flag whether this buffer contains data to be transferred or is the destination. */
108	unsigned fBufferContainsData: 1;
109	/** Flag whether this is a local address or a system address. */
110	unsigned fLocalAddress: 1;
111	/** Element type. */
112	unsigned u2ElementType: 2;
113	/** Flag whether this is the last element of the buffer. */
114	unsigned fEndOfBuffer: 1;
115	/** Flag whether this is the last element of the current segment. */
116	unsigned fLastElement: 1;
117	/** Lower 32bits of the address of the data buffer. */
118	unsigned u32DataBufferAddressLow: 32;
119	/** Upper 32bits of the address of the data buffer. */
120	unsigned u32DataBufferAddressHigh: 32;
121	} MptSGEntrySimple64, *PMptSGEntrySimple64;
122	#pragma pack()
123	AssertCompileSize(MptSGEntrySimple64, 12);
124
125	/**
126	* A simple SG element for a 32bit address.
127	*/
128	#pragma pack(1)
129	typedef struct MptSGEntrySimple32
130	{
131	/** Length of the buffer this entry describes. */
132	unsigned u24Length: 24;
133	/** Flag whether this element is the end of the list. */
134	unsigned fEndOfList: 1;
135	/** Flag whether the address is 32bit or 64bits wide. */
136	unsigned f64BitAddress: 1;
137	/** Flag whether this buffer contains data to be transferred or is the destination. */
138	unsigned fBufferContainsData: 1;
139	/** Flag whether this is a local address or a system address. */
140	unsigned fLocalAddress: 1;
141	/** Element type. */
142	unsigned u2ElementType: 2;
143	/** Flag whether this is the last element of the buffer. */
144	unsigned fEndOfBuffer: 1;
145	/** Flag whether this is the last element of the current segment. */
146	unsigned fLastElement: 1;
147	/** Lower 32bits of the address of the data buffer. */
148	unsigned u32DataBufferAddressLow: 32;
149	} MptSGEntrySimple32, *PMptSGEntrySimple32;
150	#pragma pack()
151	AssertCompileSize(MptSGEntrySimple32, 8);
152
153	/**
154	* A chain SG element.
155	*/
156	#pragma pack(1)
157	typedef struct MptSGEntryChain
158	{
159	/** Size of the segment. */
160	unsigned u16Length: 16;
161	/** Offset in 32bit words of the next chain element in the segment
162	* identified by this element. */
163	unsigned u8NextChainOffset: 8;
164	/** Reserved. */
165	unsigned fReserved0: 1;
166	/** Flag whether the address is 32bit or 64bits wide. */
167	unsigned f64BitAddress: 1;
168	/** Reserved. */
169	unsigned fReserved1: 1;
170	/** Flag whether this is a local address or a system address. */
171	unsigned fLocalAddress: 1;
172	/** Element type. */
173	unsigned u2ElementType: 2;
174	/** Flag whether this is the last element of the buffer. */
175	unsigned u2Reserved2: 2;
176	/** Lower 32bits of the address of the data buffer. */
177	unsigned u32SegmentAddressLow: 32;
178	/** Upper 32bits of the address of the data buffer. */
179	unsigned u32SegmentAddressHigh: 32;
180	} MptSGEntryChain, *PMptSGEntryChain;
181	#pragma pack()
182	AssertCompileSize(MptSGEntryChain, 12);
183
184	typedef union MptSGEntryUnion
185	{
186	MptSGEntrySimple64 Simple64;
187	MptSGEntrySimple32 Simple32;
188	MptSGEntryChain Chain;
189	} MptSGEntryUnion, *PMptSGEntryUnion;
190
191	/**
192	* MPT Fusion message header - Common for all message frames.
193	* This is filled in by the guest.
194	*/
195	#pragma pack(1)
196	typedef struct MptMessageHdr
197	{
198	/** Function dependent data. */
199	uint16_t u16FunctionDependent;
200	/** Chain offset. */
201	uint8_t u8ChainOffset;
202	/** The function code. */
203	uint8_t u8Function;
204	/** Function dependent data. */
205	uint8_t au8FunctionDependent[3];
206	/** Message flags. */
207	uint8_t u8MessageFlags;
208	/** Message context - Unique ID from the guest unmodified by the device. */
209	uint32_t u32MessageContext;
210	} MptMessageHdr, *PMptMessageHdr;
211	#pragma pack()
212	AssertCompileSize(MptMessageHdr, 12);
213
214	/** Defined function codes found in the message header. */
215	#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST (0x00)
216	#define MPT_MESSAGE_HDR_FUNCTION_SCSI_TASK_MGMT (0x01)
217	#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT (0x02)
218	#define MPT_MESSAGE_HDR_FUNCTION_IOC_FACTS (0x03)
219	#define MPT_MESSAGE_HDR_FUNCTION_CONFIG (0x04)
220	#define MPT_MESSAGE_HDR_FUNCTION_PORT_FACTS (0x05)
221	#define MPT_MESSAGE_HDR_FUNCTION_PORT_ENABLE (0x06)
222	#define MPT_MESSAGE_HDR_FUNCTION_EVENT_NOTIFICATION (0x07)
223	#define MPT_MESSAGE_HDR_FUNCTION_EVENT_ACK (0x08)
224	#define MPT_MESSAGE_HDR_FUNCTION_FW_DOWNLOAD (0x09)
225	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
226	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_ASSIST (0x0B)
227	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_STATUS_SEND (0x0C)
228	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_MODE_ABORT (0x0D)
229	#define MPT_MESSAGE_HDR_FUNCTION_FW_UPLOAD (0x12)
230
231	#ifdef DEBUG
232	/**
233	* Function names
234	*/
235	static const char * const g_apszMPTFunctionNames[] =
236	{
237	"SCSI I/O Request",
238	"SCSI Task Management",
239	"IOC Init",
240	"IOC Facts",
241	"Config",
242	"Port Facts",
243	"Port Enable",
244	"Event Notification",
245	"Event Ack",
246	"Firmware Download"
247	};
248	#endif
249
250	/**
251	* Default reply message.
252	* Send from the device to the guest upon completion of a request.
253	*/
254	#pragma pack(1)
255	typedef struct MptDefaultReplyMessage
256	{
257	/** Function dependent data. */
258	uint16_t u16FunctionDependent;
259	/** Length of the message in 32bit DWords. */
260	uint8_t u8MessageLength;
261	/** Function which completed. */
262	uint8_t u8Function;
263	/** Function dependent. */
264	uint8_t au8FunctionDependent[3];
265	/** Message flags. */
266	uint8_t u8MessageFlags;
267	/** Message context given in the request. */
268	uint32_t u32MessageContext;
269	/** Function dependent status code. */
270	uint16_t u16FunctionDependentStatus;
271	/** Status of the IOC. */
272	uint16_t u16IOCStatus;
273	/** Additional log info. */
274	uint32_t u32IOCLogInfo;
275	} MptDefaultReplyMessage, *PMptDefaultReplyMessage;
276	#pragma pack()
277	AssertCompileSize(MptDefaultReplyMessage, 20);
278
279	/**
280	* IO controller init request.
281	*/
282	#pragma pack(1)
283	typedef struct MptIOCInitRequest
284	{
285	/** Which system send this init request. */
286	uint8_t u8WhoInit;
287	/** Reserved */
288	uint8_t u8Reserved;
289	/** Chain offset in the SG list. */
290	uint8_t u8ChainOffset;
291	/** Function to execute. */
292	uint8_t u8Function;
293	/** Flags */
294	uint8_t u8Flags;
295	/** Maximum number of devices the driver can handle. */
296	uint8_t u8MaxDevices;
297	/** Maximum number of buses the driver can handle. */
298	uint8_t u8MaxBuses;
299	/** Message flags. */
300	uint8_t u8MessageFlags;
301	/** Message context ID. */
302	uint32_t u32MessageContext;
303	/** Reply frame size. */
304	uint16_t u16ReplyFrameSize;
305	/** Reserved */
306	uint16_t u16Reserved;
307	/** Upper 32bit part of the 64bit address the message frames are in.
308	* That means all frames must be in the same 4GB segment. */
309	uint32_t u32HostMfaHighAddr;
310	/** Upper 32bit of the sense buffer. */
311	uint32_t u32SenseBufferHighAddr;
312	} MptIOCInitRequest, *PMptIOCInitRequest;
313	#pragma pack()
314	AssertCompileSize(MptIOCInitRequest, 24);
315
316	/**
317	* IO controller init reply.
318	*/
319	#pragma pack(1)
320	typedef struct MptIOCInitReply
321	{
322	/** Which subsystem send this init request. */
323	uint8_t u8WhoInit;
324	/** Reserved */
325	uint8_t u8Reserved;
326	/** Message length */
327	uint8_t u8MessageLength;
328	/** Function. */
329	uint8_t u8Function;
330	/** Flags */
331	uint8_t u8Flags;
332	/** Maximum number of devices the driver can handle. */
333	uint8_t u8MaxDevices;
334	/** Maximum number of busses the driver can handle. */
335	uint8_t u8MaxBuses;
336	/** Message flags. */
337	uint8_t u8MessageFlags;
338	/** Message context ID */
339	uint32_t u32MessageContext;
340	/** Reserved */
341	uint16_t u16Reserved;
342	/** IO controller status. */
343	uint16_t u16IOCStatus;
344	/** IO controller log information. */
345	uint32_t u32IOCLogInfo;
346	} MptIOCInitReply, *PMptIOCInitReply;
347	#pragma pack()
348	AssertCompileSize(MptIOCInitReply, 20);
349
350	/**
351	* IO controller facts request.
352	*/
353	#pragma pack(1)
354	typedef struct MptIOCFactsRequest
355	{
356	/** Reserved. */
357	uint16_t u16Reserved;
358	/** Chain offset in SG list. */
359	uint8_t u8ChainOffset;
360	/** Function number. */
361	uint8_t u8Function;
362	/** Reserved */
363	uint8_t u8Reserved[3];
364	/** Message flags. */
365	uint8_t u8MessageFlags;
366	/** Message context ID. */
367	uint32_t u32MessageContext;
368	} MptIOCFactsRequest, *PMptIOCFactsRequest;
369	#pragma pack()
370	AssertCompileSize(MptIOCFactsRequest, 12);
371
372	/**
373	* IO controller facts reply.
374	*/
375	#pragma pack(1)
376	typedef struct MptIOCFactsReply
377	{
378	/** Message version. */
379	uint16_t u16MessageVersion;
380	/** Message length. */
381	uint8_t u8MessageLength;
382	/** Function number. */
383	uint8_t u8Function;
384	/** Reserved */
385	uint16_t u16Reserved1;
386	/** IO controller number */
387	uint8_t u8IOCNumber;
388	/** Message flags. */
389	uint8_t u8MessageFlags;
390	/** Message context ID. */
391	uint32_t u32MessageContext;
392	/** IO controller exceptions */
393	uint16_t u16IOCExceptions;
394	/** IO controller status. */
395	uint16_t u16IOCStatus;
396	/** IO controller log information. */
397	uint32_t u32IOCLogInfo;
398	/** Maximum chain depth. */
399	uint8_t u8MaxChainDepth;
400	/** The current value of the WhoInit field. */
401	uint8_t u8WhoInit;
402	/** Block size. */
403	uint8_t u8BlockSize;
404	/** Flags. */
405	uint8_t u8Flags;
406	/** Depth of the reply queue. */
407	uint16_t u16ReplyQueueDepth;
408	/** Size of a request frame. */
409	uint16_t u16RequestFrameSize;
410	/** Reserved */
411	uint16_t u16Reserved2;
412	/** Product ID. */
413	uint16_t u16ProductID;
414	/** Current value of the high 32bit MFA address. */
415	uint32_t u32CurrentHostMFAHighAddr;
416	/** Global credits - Number of entries allocated to queues */
417	uint16_t u16GlobalCredits;
418	/** Number of ports on the IO controller */
419	uint8_t u8NumberOfPorts;
420	/** Event state. */
421	uint8_t u8EventState;
422	/** Current value of the high 32bit sense buffer address. */
423	uint32_t u32CurrentSenseBufferHighAddr;
424	/** Current reply frame size. */
425	uint16_t u16CurReplyFrameSize;
426	/** Maximum number of devices. */
427	uint8_t u8MaxDevices;
428	/** Maximum number of buses. */
429	uint8_t u8MaxBuses;
430	/** Size of the firmware image. */
431	uint32_t u32FwImageSize;
432	/** Reserved. */
433	uint32_t u32Reserved;
434	/** Firmware version */
435	uint32_t u32FWVersion;
436	} MptIOCFactsReply, *PMptIOCFactsReply;
437	#pragma pack()
438	AssertCompileSize(MptIOCFactsReply, 60);
439
440	/**
441	* Port facts request
442	*/
443	#pragma pack(1)
444	typedef struct MptPortFactsRequest
445	{
446	/** Reserved */
447	uint16_t u16Reserved1;
448	/** Message length. */
449	uint8_t u8MessageLength;
450	/** Function number. */
451	uint8_t u8Function;
452	/** Reserved */
453	uint16_t u16Reserved2;
454	/** Port number to get facts for. */
455	uint8_t u8PortNumber;
456	/** Message flags. */
457	uint8_t u8MessageFlags;
458	/** Message context ID. */
459	uint32_t u32MessageContext;
460	} MptPortFactsRequest, *PMptPortFactsRequest;
461	#pragma pack()
462	AssertCompileSize(MptPortFactsRequest, 12);
463
464	/**
465	* Port facts reply.
466	*/
467	#pragma pack(1)
468	typedef struct MptPortFactsReply
469	{
470	/** Reserved. */
471	uint16_t u16Reserved1;
472	/** Message length. */
473	uint8_t u8MessageLength;
474	/** Function number. */
475	uint8_t u8Function;
476	/** Reserved */
477	uint16_t u16Reserved2;
478	/** Port number the facts are for. */
479	uint8_t u8PortNumber;
480	/** Message flags. */
481	uint8_t u8MessageFlags;
482	/** Message context ID. */
483	uint32_t u32MessageContext;
484	/** Reserved. */
485	uint16_t u16Reserved3;
486	/** IO controller status. */
487	uint16_t u16IOCStatus;
488	/** IO controller log information. */
489	uint32_t u32IOCLogInfo;
490	/** Reserved */
491	uint8_t u8Reserved;
492	/** Port type */
493	uint8_t u8PortType;
494	/** Maximum number of devices on this port. */
495	uint16_t u16MaxDevices;
496	/** SCSI ID of this port on the attached bus. */
497	uint16_t u16PortSCSIID;
498	/** Protocol flags. */
499	uint16_t u16ProtocolFlags;
500	/** Maximum number of target command buffers which can be posted to this port at a time. */
501	uint16_t u16MaxPostedCmdBuffers;
502	/** Maximum number of target IDs that remain persistent between power/reset cycles. */
503	uint16_t u16MaxPersistentIDs;
504	/** Maximum number of LAN buckets. */
505	uint16_t u16MaxLANBuckets;
506	/** Reserved. */
507	uint16_t u16Reserved4;
508	/** Reserved. */
509	uint32_t u32Reserved;
510	} MptPortFactsReply, *PMptPortFactsReply;
511	#pragma pack()
512	AssertCompileSize(MptPortFactsReply, 40);
513
514	/**
515	* Port Enable request.
516	*/
517	#pragma pack(1)
518	typedef struct MptPortEnableRequest
519	{
520	/** Reserved. */
521	uint16_t u16Reserved1;
522	/** Message length. */
523	uint8_t u8MessageLength;
524	/** Function number. */
525	uint8_t u8Function;
526	/** Reserved. */
527	uint16_t u16Reserved2;
528	/** Port number to enable. */
529	uint8_t u8PortNumber;
530	/** Message flags. */
531	uint8_t u8MessageFlags;
532	/** Message context ID. */
533	uint32_t u32MessageContext;
534	} MptPortEnableRequest, *PMptPortEnableRequest;
535	#pragma pack()
536	AssertCompileSize(MptPortEnableRequest, 12);
537
538	/**
539	* Port enable reply.
540	*/
541	#pragma pack(1)
542	typedef struct MptPortEnableReply
543	{
544	/** Reserved. */
545	uint16_t u16Reserved1;
546	/** Message length. */
547	uint8_t u8MessageLength;
548	/** Function number. */
549	uint8_t u8Function;
550	/** Reserved */
551	uint16_t u16Reserved2;
552	/** Port number which was enabled. */
553	uint8_t u8PortNumber;
554	/** Message flags. */
555	uint8_t u8MessageFlags;
556	/** Message context ID. */
557	uint32_t u32MessageContext;
558	/** Reserved. */
559	uint16_t u16Reserved3;
560	/** IO controller status */
561	uint16_t u16IOCStatus;
562	/** IO controller log information. */
563	uint32_t u32IOCLogInfo;
564	} MptPortEnableReply, *PMptPortEnableReply;
565	#pragma pack()
566	AssertCompileSize(MptPortEnableReply, 20);
567
568	/**
569	* Event notification request.
570	*/
571	#pragma pack(1)
572	typedef struct MptEventNotificationRequest
573	{
574	/** Switch - Turns event notification on and off. */
575	uint8_t u8Switch;
576	/** Reserved. */
577	uint8_t u8Reserved1;
578	/** Chain offset. */
579	uint8_t u8ChainOffset;
580	/** Function number. */
581	uint8_t u8Function;
582	/** Reserved. */
583	uint8_t u8reserved2[3];
584	/** Message flags. */
585	uint8_t u8MessageFlags;
586	/** Message context ID. */
587	uint32_t u32MessageContext;
588	} MptEventNotificationRequest, *PMptEventNotificationRequest;
589	#pragma pack()
590	AssertCompileSize(MptEventNotificationRequest, 12);
591
592	/**
593	* Event notification reply.
594	*/
595	#pragma pack(1)
596	typedef struct MptEventNotificationReply
597	{
598	/** Event data length. */
599	uint16_t u16EventDataLength;
600	/** Message length. */
601	uint8_t u8MessageLength;
602	/** Function number. */
603	uint8_t u8Function;
604	/** Reserved. */
605	uint16_t u16Reserved1;
606	/** Ack required. */
607	uint8_t u8AckRequired;
608	/** Message flags. */
609	uint8_t u8MessageFlags;
610	/** Message context ID. */
611	uint32_t u32MessageContext;
612	/** Reserved. */
613	uint16_t u16Reserved2;
614	/** IO controller status. */
615	uint16_t u16IOCStatus;
616	/** IO controller log information. */
617	uint32_t u32IOCLogInfo;
618	/** Notification event. */
619	uint32_t u32Event;
620	/** Event context. */
621	uint32_t u32EventContext;
622	/** Event data. */
623	uint32_t u32EventData;
624	} MptEventNotificationReply, *PMptEventNotificationReply;
625	#pragma pack()
626	AssertCompileSize(MptEventNotificationReply, 32);
627
628	#define MPT_EVENT_EVENT_CHANGE (0x0000000a)
629
630	/**
631	* FW download request.
632	*/
633	#pragma pack(1)
634	typedef struct MptFWDownloadRequest
635	{
636	/** Switch - Turns event notification on and off. */
637	uint8_t u8ImageType;
638	/** Reserved. */
639	uint8_t u8Reserved1;
640	/** Chain offset. */
641	uint8_t u8ChainOffset;
642	/** Function number. */
643	uint8_t u8Function;
644	/** Reserved. */
645	uint8_t u8Reserved2[3];
646	/** Message flags. */
647	uint8_t u8MessageFlags;
648	/** Message context ID. */
649	uint32_t u32MessageContext;
650	} MptFWDownloadRequest, *PMptFWDownloadRequest;
651	#pragma pack()
652	AssertCompileSize(MptFWDownloadRequest, 12);
653
654	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_RESERVED 0
655	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_FIRMWARE 1
656	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_MPI_BIOS 2
657	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_NVDATA 3
658
659	/**
660	* FW download reply.
661	*/
662	#pragma pack(1)
663	typedef struct MptFWDownloadReply
664	{
665	/** Reserved. */
666	uint16_t u16Reserved1;
667	/** Message length. */
668	uint8_t u8MessageLength;
669	/** Function number. */
670	uint8_t u8Function;
671	/** Reserved. */
672	uint8_t u8Reserved2[3];
673	/** Message flags. */
674	uint8_t u8MessageFlags;
675	/** Message context ID. */
676	uint32_t u32MessageContext;
677	/** Reserved. */
678	uint16_t u16Reserved2;
679	/** IO controller status. */
680	uint16_t u16IOCStatus;
681	/** IO controller log information. */
682	uint32_t u32IOCLogInfo;
683	} MptFWDownloadReply, *PMptFWDownloadReply;
684	#pragma pack()
685	AssertCompileSize(MptFWDownloadReply, 20);
686
687	/**
688	* FW upload request.
689	*/
690	#pragma pack(1)
691	typedef struct MptFWUploadRequest
692	{
693	/** Requested image type. */
694	uint8_t u8ImageType;
695	/** Reserved. */
696	uint8_t u8Reserved1;
697	/** Chain offset. */
698	uint8_t u8ChainOffset;
699	/** Function number. */
700	uint8_t u8Function;
701	/** Reserved. */
702	uint8_t u8Reserved2[3];
703	/** Message flags. */
704	uint8_t u8MessageFlags;
705	/** Message context ID. */
706	uint32_t u32MessageContext;
707	} MptFWUploadRequest, *PMptFWUploadRequest;
708	#pragma pack()
709	AssertCompileSize(MptFWUploadRequest, 12);
710
711	/**
712	* FW upload reply.
713	*/
714	#pragma pack(1)
715	typedef struct MptFWUploadReply
716	{
717	/** Image type. */
718	uint8_t u8ImageType;
719	/** Reserved. */
720	uint8_t u8Reserved1;
721	/** Message length. */
722	uint8_t u8MessageLength;
723	/** Function number. */
724	uint8_t u8Function;
725	/** Reserved. */
726	uint8_t u8Reserved2[3];
727	/** Message flags. */
728	uint8_t u8MessageFlags;
729	/** Message context ID. */
730	uint32_t u32MessageContext;
731	/** Reserved. */
732	uint16_t u16Reserved2;
733	/** IO controller status. */
734	uint16_t u16IOCStatus;
735	/** IO controller log information. */
736	uint32_t u32IOCLogInfo;
737	/** Uploaded image size. */
738	uint32_t u32ActualImageSize;
739	} MptFWUploadReply, *PMptFWUploadReply;
740	#pragma pack()
741	AssertCompileSize(MptFWUploadReply, 24);
742
743	/**
744	* SCSI IO Request
745	*/
746	#pragma pack(1)
747	typedef struct MptSCSIIORequest
748	{
749	/** Target ID */
750	uint8_t u8TargetID;
751	/** Bus number */
752	uint8_t u8Bus;
753	/** Chain offset */
754	uint8_t u8ChainOffset;
755	/** Function number. */
756	uint8_t u8Function;
757	/** CDB length. */
758	uint8_t u8CDBLength;
759	/** Sense buffer length. */
760	uint8_t u8SenseBufferLength;
761	/** Reserved */
762	uint8_t u8Reserved;
763	/** Message flags. */
764	uint8_t u8MessageFlags;
765	/** Message context ID. */
766	uint32_t u32MessageContext;
767	/** LUN */
768	uint8_t au8LUN[8];
769	/** Control values. */
770	uint32_t u32Control;
771	/** The CDB. */
772	uint8_t au8CDB[16];
773	/** Data length. */
774	uint32_t u32DataLength;
775	/** Sense buffer low 32bit address. */
776	uint32_t u32SenseBufferLowAddress;
777	} MptSCSIIORequest, *PMptSCSIIORequest;
778	#pragma pack()
779	AssertCompileSize(MptSCSIIORequest, 48);
780
781	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_GET(x) (((x) & 0x3000000) >> 24)
782	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x0)
783	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x1)
784	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x2)
785
786	/**
787	* SCSI IO error reply.
788	*/
789	#pragma pack(1)
790	typedef struct MptSCSIIOErrorReply
791	{
792	/** Target ID */
793	uint8_t u8TargetID;
794	/** Bus number */
795	uint8_t u8Bus;
796	/** Message length. */
797	uint8_t u8MessageLength;
798	/** Function number. */
799	uint8_t u8Function;
800	/** CDB length */
801	uint8_t u8CDBLength;
802	/** Sense buffer length */
803	uint8_t u8SenseBufferLength;
804	/** Reserved */
805	uint8_t u8Reserved;
806	/** Message flags */
807	uint8_t u8MessageFlags;
808	/** Message context ID */
809	uint32_t u32MessageContext;
810	/** SCSI status. */
811	uint8_t u8SCSIStatus;
812	/** SCSI state */
813	uint8_t u8SCSIState;
814	/** IO controller status */
815	uint16_t u16IOCStatus;
816	/** IO controller log information */
817	uint32_t u32IOCLogInfo;
818	/** Transfer count */
819	uint32_t u32TransferCount;
820	/** Sense count */
821	uint32_t u32SenseCount;
822	/** Response information */
823	uint32_t u32ResponseInfo;
824	} MptSCSIIOErrorReply, *PMptSCSIIOErrorReply;
825	#pragma pack()
826	AssertCompileSize(MptSCSIIOErrorReply, 32);
827
828	#define MPT_SCSI_IO_ERROR_SCSI_STATE_AUTOSENSE_VALID (0x01)
829	#define MPT_SCSI_IO_ERROR_SCSI_STATE_TERMINATED (0x08)
830
831	/**
832	* IOC status codes specific to the SCSI I/O error reply.
833	*/
834	#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_BUS (0x0041)
835	#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_TARGETID (0x0042)
836	#define MPT_SCSI_IO_ERROR_IOCSTATUS_DEVICE_NOT_THERE (0x0043)
837
838	/**
839	* SCSI task management request.
840	*/
841	#pragma pack(1)
842	typedef struct MptSCSITaskManagementRequest
843	{
844	/** Target ID */
845	uint8_t u8TargetID;
846	/** Bus number */
847	uint8_t u8Bus;
848	/** Chain offset */
849	uint8_t u8ChainOffset;
850	/** Function number */
851	uint8_t u8Function;
852	/** Reserved */
853	uint8_t u8Reserved1;
854	/** Task type */
855	uint8_t u8TaskType;
856	/** Reserved */
857	uint8_t u8Reserved2;
858	/** Message flags */
859	uint8_t u8MessageFlags;
860	/** Message context ID */
861	uint32_t u32MessageContext;
862	/** LUN */
863	uint8_t au8LUN[8];
864	/** Reserved */
865	uint8_t auReserved[28];
866	/** Task message context ID. */
867	uint32_t u32TaskMessageContext;
868	} MptSCSITaskManagementRequest, *PMptSCSITaskManagementRequest;
869	#pragma pack()
870	AssertCompileSize(MptSCSITaskManagementRequest, 52);
871
872	/**
873	* SCSI task management reply.
874	*/
875	#pragma pack(1)
876	typedef struct MptSCSITaskManagementReply
877	{
878	/** Target ID */
879	uint8_t u8TargetID;
880	/** Bus number */
881	uint8_t u8Bus;
882	/** Message length */
883	uint8_t u8MessageLength;
884	/** Function number */
885	uint8_t u8Function;
886	/** Reserved */
887	uint8_t u8Reserved1;
888	/** Task type */
889	uint8_t u8TaskType;
890	/** Reserved */
891	uint8_t u8Reserved2;
892	/** Message flags */
893	uint8_t u8MessageFlags;
894	/** Message context ID */
895	uint32_t u32MessageContext;
896	/** Reserved */
897	uint16_t u16Reserved;
898	/** IO controller status */
899	uint16_t u16IOCStatus;
900	/** IO controller log information */
901	uint32_t u32IOCLogInfo;
902	/** Termination count */
903	uint32_t u32TerminationCount;
904	} MptSCSITaskManagementReply, *PMptSCSITaskManagementReply;
905	#pragma pack()
906	AssertCompileSize(MptSCSITaskManagementReply, 24);
907
908	/**
909	* Page address for SAS expander page types.
910	*/
911	#pragma pack(1)
912	typedef union MptConfigurationPageAddressSASExpander
913	{
914	struct
915	{
916	uint16_t u16Handle;
917	uint16_t u16Reserved;
918	} Form0And2;
919	struct
920	{
921	uint16_t u16Handle;
922	uint8_t u8PhyNum;
923	uint8_t u8Reserved;
924	} Form1;
925	} MptConfigurationPageAddressSASExpander, *PMptConfigurationPageAddressSASExpander;
926	#pragma pack()
927
928	/**
929	* Page address for SAS device page types.
930	*/
931	#pragma pack(1)
932	typedef union MptConfigurationPageAddressSASDevice
933	{
934	struct
935	{
936	uint16_t u16Handle;
937	uint16_t u16Reserved;
938	} Form0And2;
939	struct
940	{
941	uint8_t u8TargetID;
942	uint8_t u8Bus;
943	uint8_t u8Reserved;
944	} Form1;
945	} MptConfigurationPageAddressSASDevice, *PMptConfigurationPageAddressSASDevice;
946	#pragma pack()
947
948	/**
949	* Page address for SAS PHY page types.
950	*/
951	#pragma pack(1)
952	typedef union MptConfigurationPageAddressSASPHY
953	{
954	struct
955	{
956	uint8_t u8PhyNumber;
957	uint8_t u8Reserved[3];
958	} Form0;
959	struct
960	{
961	uint16_t u16Index;
962	uint16_t u16Reserved;
963	} Form1;
964	} MptConfigurationPageAddressSASPHY, *PMptConfigurationPageAddressSASPHY;
965	#pragma pack()
966
967	/**
968	* Page address for SAS Enclosure page types.
969	*/
970	#pragma pack(1)
971	typedef struct MptConfigurationPageAddressSASEnclosure
972	{
973	uint16_t u16Handle;
974	uint16_t u16Reserved;
975	} MptConfigurationPageAddressSASEnclosure, *PMptConfigurationPageAddressSASEnclosure;
976	#pragma pack()
977
978	/**
979	* Union of all possible address types.
980	*/
981	#pragma pack(1)
982	typedef union MptConfigurationPageAddress
983	{
984	/** 32bit view. */
985	uint32_t u32PageAddress;
986	struct
987	{
988	/** Port number to get the configuration page for. */
989	uint8_t u8PortNumber;
990	/** Reserved. */
991	uint8_t u8Reserved[3];
992	} MPIPortNumber;
993	struct
994	{
995	/** Target ID to get the configuration page for. */
996	uint8_t u8TargetID;
997	/** Bus number to get the configuration page for. */
998	uint8_t u8Bus;
999	/** Reserved. */
1000	uint8_t u8Reserved[2];
1001	} BusAndTargetId;
1002	MptConfigurationPageAddressSASExpander SASExpander;
1003	MptConfigurationPageAddressSASDevice SASDevice;
1004	MptConfigurationPageAddressSASPHY SASPHY;
1005	MptConfigurationPageAddressSASEnclosure SASEnclosure;
1006	} MptConfigurationPageAddress, *PMptConfigurationPageAddress;
1007	#pragma pack()
1008	AssertCompileSize(MptConfigurationPageAddress, 4);
1009
1010	#define MPT_CONFIGURATION_PAGE_ADDRESS_GET_SAS_FORM(x) (((x).u32PageAddress >> 28) & 0x0f)
1011
1012	/**
1013	* Configuration request
1014	*/
1015	#pragma pack(1)
1016	typedef struct MptConfigurationRequest
1017	{
1018	/** Action code. */
1019	uint8_t u8Action;
1020	/** Reserved. */
1021	uint8_t u8Reserved1;
1022	/** Chain offset. */
1023	uint8_t u8ChainOffset;
1024	/** Function number. */
1025	uint8_t u8Function;
1026	/** Extended page length. */
1027	uint16_t u16ExtPageLength;
1028	/** Extended page type */
1029	uint8_t u8ExtPageType;
1030	/** Message flags. */
1031	uint8_t u8MessageFlags;
1032	/** Message context ID. */
1033	uint32_t u32MessageContext;
1034	/** Reserved. */
1035	uint8_t u8Reserved2[8];
1036	/** Version number of the page. */
1037	uint8_t u8PageVersion;
1038	/** Length of the page in 32bit Dwords. */
1039	uint8_t u8PageLength;
1040	/** Page number to access. */
1041	uint8_t u8PageNumber;
1042	/** Type of the page being accessed. */
1043	uint8_t u8PageType;
1044	/** Page type dependent address. */
1045	MptConfigurationPageAddress PageAddress;
1046	/** Simple SG element describing the buffer. */
1047	MptSGEntrySimple64 SimpleSGElement;
1048	} MptConfigurationRequest, *PMptConfigurationRequest;
1049	#pragma pack()
1050	AssertCompileSize(MptConfigurationRequest, 40);
1051
1052	/** Possible action codes. */
1053	#define MPT_CONFIGURATION_REQUEST_ACTION_HEADER (0x00)
1054	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_CURRENT (0x01)
1055	#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_CURRENT (0x02)
1056	#define MPT_CONFIGURATION_REQUEST_ACTION_DEFAULT (0x03)
1057	#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_NVRAM (0x04)
1058	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_DEFAULT (0x05)
1059	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_NVRAM (0x06)
1060
1061	/** Page type codes. */
1062	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IO_UNIT (0x00)
1063	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IOC (0x01)
1064	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_BIOS (0x02)
1065	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_SCSI_PORT (0x03)
1066	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_EXTENDED (0x0F)
1067
1068	/**
1069	* Configuration reply.
1070	*/
1071	#pragma pack(1)
1072	typedef struct MptConfigurationReply
1073	{
1074	/** Action code. */
1075	uint8_t u8Action;
1076	/** Reserved. */
1077	uint8_t u8Reserved;
1078	/** Message length. */
1079	uint8_t u8MessageLength;
1080	/** Function number. */
1081	uint8_t u8Function;
1082	/** Extended page length. */
1083	uint16_t u16ExtPageLength;
1084	/** Extended page type */
1085	uint8_t u8ExtPageType;
1086	/** Message flags. */
1087	uint8_t u8MessageFlags;
1088	/** Message context ID. */
1089	uint32_t u32MessageContext;
1090	/** Reserved. */
1091	uint16_t u16Reserved;
1092	/** I/O controller status. */
1093	uint16_t u16IOCStatus;
1094	/** I/O controller log information. */
1095	uint32_t u32IOCLogInfo;
1096	/** Version number of the page. */
1097	uint8_t u8PageVersion;
1098	/** Length of the page in 32bit Dwords. */
1099	uint8_t u8PageLength;
1100	/** Page number to access. */
1101	uint8_t u8PageNumber;
1102	/** Type of the page being accessed. */
1103	uint8_t u8PageType;
1104	} MptConfigurationReply, *PMptConfigurationReply;
1105	#pragma pack()
1106	AssertCompileSize(MptConfigurationReply, 24);
1107
1108	/** Additional I/O controller status codes for the configuration reply. */
1109	#define MPT_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
1110	#define MPT_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
1111	#define MPT_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
1112	#define MPT_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
1113	#define MPT_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
1114	#define MPT_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
1115
1116	/**
1117	* Union of all possible request messages.
1118	*/
1119	typedef union MptRequestUnion
1120	{
1121	MptMessageHdr Header;
1122	MptIOCInitRequest IOCInit;
1123	MptIOCFactsRequest IOCFacts;
1124	MptPortFactsRequest PortFacts;
1125	MptPortEnableRequest PortEnable;
1126	MptEventNotificationRequest EventNotification;
1127	MptSCSIIORequest SCSIIO;
1128	MptSCSITaskManagementRequest SCSITaskManagement;
1129	MptConfigurationRequest Configuration;
1130	MptFWDownloadRequest FWDownload;
1131	MptFWUploadRequest FWUpload;
1132	} MptRequestUnion, *PMptRequestUnion;
1133
1134	/**
1135	* Union of all possible reply messages.
1136	*/
1137	typedef union MptReplyUnion
1138	{
1139	/** 16bit view. */
1140	uint16_t au16Reply[30];
1141	MptDefaultReplyMessage Header;
1142	MptIOCInitReply IOCInit;
1143	MptIOCFactsReply IOCFacts;
1144	MptPortFactsReply PortFacts;
1145	MptPortEnableReply PortEnable;
1146	MptEventNotificationReply EventNotification;
1147	MptSCSIIOErrorReply SCSIIOError;
1148	MptSCSITaskManagementReply SCSITaskManagement;
1149	MptConfigurationReply Configuration;
1150	MptFWDownloadReply FWDownload;
1151	MptFWUploadReply FWUpload;
1152	} MptReplyUnion, *PMptReplyUnion;
1153
1154
1155	/**
1156	* Configuration Page attributes.
1157	*/
1158	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY (0x00)
1159	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE (0x10)
1160	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT (0x20)
1161	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY (0x30)
1162
1163	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_GET(u8PageType) ((u8PageType) & 0xf0)
1164
1165	/**
1166	* Configuration Page types.
1167	*/
1168	#define MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT (0x00)
1169	#define MPT_CONFIGURATION_PAGE_TYPE_IOC (0x01)
1170	#define MPT_CONFIGURATION_PAGE_TYPE_BIOS (0x02)
1171	#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT (0x03)
1172	#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE (0x04)
1173	#define MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING (0x09)
1174	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED (0x0F)
1175
1176	#define MPT_CONFIGURATION_PAGE_TYPE_GET(u8PageType) ((u8PageType) & 0x0f)
1177
1178	/**
1179	* Extented page types.
1180	*/
1181	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT (0x10)
1182	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASEXPANDER (0x11)
1183	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASDEVICE (0x12)
1184	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASPHYS (0x13)
1185	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_LOG (0x14)
1186	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_ENCLOSURE (0x15)
1187
1188	/**
1189	* Configuration Page header - Common to all pages.
1190	*/
1191	#pragma pack(1)
1192	typedef struct MptConfigurationPageHeader
1193	{
1194	/** Version of the page. */
1195	uint8_t u8PageVersion;
1196	/** The length of the page in 32bit D-Words. */
1197	uint8_t u8PageLength;
1198	/** Number of the page. */
1199	uint8_t u8PageNumber;
1200	/** Type of the page. */
1201	uint8_t u8PageType;
1202	} MptConfigurationPageHeader, *PMptConfigurationPageHeader;
1203	#pragma pack()
1204	AssertCompileSize(MptConfigurationPageHeader, 4);
1205
1206	/**
1207	* Extended configuration page header - Common to all extended pages.
1208	*/
1209	#pragma pack(1)
1210	typedef struct MptExtendedConfigurationPageHeader
1211	{
1212	/** Version of the page. */
1213	uint8_t u8PageVersion;
1214	/** Reserved. */
1215	uint8_t u8Reserved1;
1216	/** Number of the page. */
1217	uint8_t u8PageNumber;
1218	/** Type of the page. */
1219	uint8_t u8PageType;
1220	/** Extended page length. */
1221	uint16_t u16ExtPageLength;
1222	/** Extended page type. */
1223	uint8_t u8ExtPageType;
1224	/** Reserved */
1225	uint8_t u8Reserved2;
1226	} MptExtendedConfigurationPageHeader, *PMptExtendedConfigurationPageHeader;
1227	#pragma pack()
1228	AssertCompileSize(MptExtendedConfigurationPageHeader, 8);
1229
1230	/**
1231	* Manufacturing page 0. - Readonly.
1232	*/
1233	#pragma pack(1)
1234	typedef struct MptConfigurationPageManufacturing0
1235	{
1236	/** Union. */
1237	union
1238	{
1239	/** Byte view. */
1240	uint8_t abPageData[76];
1241	/** Field view. */
1242	struct
1243	{
1244	/** The omnipresent header. */
1245	MptConfigurationPageHeader Header;
1246	/** Name of the chip. */
1247	uint8_t abChipName[16];
1248	/** Chip revision. */
1249	uint8_t abChipRevision[8];
1250	/** Board name. */
1251	uint8_t abBoardName[16];
1252	/** Board assembly. */
1253	uint8_t abBoardAssembly[16];
1254	/** Board tracer number. */
1255	uint8_t abBoardTracerNumber[16];
1256	} fields;
1257	} u;
1258	} MptConfigurationPageManufacturing0, *PMptConfigurationPageManufacturing0;
1259	#pragma pack()
1260	AssertCompileSize(MptConfigurationPageManufacturing0, 76);
1261
1262	/**
1263	* Manufacturing page 1. - Readonly Persistent.
1264	*/
1265	#pragma pack(1)
1266	typedef struct MptConfigurationPageManufacturing1
1267	{
1268	/** Union */
1269	union
1270	{
1271	/** Byte view */
1272	uint8_t abPageData[260];
1273	/** Field view */
1274	struct
1275	{
1276	/** The omnipresent header. */
1277	MptConfigurationPageHeader Header;
1278	/** VPD info - don't know what belongs here so all zero. */
1279	uint8_t abVPDInfo[256];
1280	} fields;
1281	} u;
1282	} MptConfigurationPageManufacturing1, *PMptConfigurationPageManufacturing1;
1283	#pragma pack()
1284	AssertCompileSize(MptConfigurationPageManufacturing1, 260);
1285
1286	/**
1287	* Manufacturing page 2. - Readonly.
1288	*/
1289	#pragma pack(1)
1290	typedef struct MptConfigurationPageManufacturing2
1291	{
1292	/** Union. */
1293	union
1294	{
1295	/** Byte view. */
1296	uint8_t abPageData[8];
1297	/** Field view. */
1298	struct
1299	{
1300	/** The omnipresent header. */
1301	MptConfigurationPageHeader Header;
1302	/** PCI Device ID. */
1303	uint16_t u16PCIDeviceID;
1304	/** PCI Revision ID. */
1305	uint8_t u8PCIRevisionID;
1306	/** Reserved. */
1307	uint8_t u8Reserved;
1308	/** Hardware specific settings... */
1309	} fields;
1310	} u;
1311	} MptConfigurationPageManufacturing2, *PMptConfigurationPageManufacturing2;
1312	#pragma pack()
1313	AssertCompileSize(MptConfigurationPageManufacturing2, 8);
1314
1315	/**
1316	* Manufacturing page 3. - Readonly.
1317	*/
1318	#pragma pack(1)
1319	typedef struct MptConfigurationPageManufacturing3
1320	{
1321	/** Union. */
1322	union
1323	{
1324	/** Byte view. */
1325	uint8_t abPageData[8];
1326	/** Field view. */
1327	struct
1328	{
1329	/** The omnipresent header. */
1330	MptConfigurationPageHeader Header;
1331	/** PCI Device ID. */
1332	uint16_t u16PCIDeviceID;
1333	/** PCI Revision ID. */
1334	uint8_t u8PCIRevisionID;
1335	/** Reserved. */
1336	uint8_t u8Reserved;
1337	/** Chip specific settings... */
1338	} fields;
1339	} u;
1340	} MptConfigurationPageManufacturing3, *PMptConfigurationPageManufacturing3;
1341	#pragma pack()
1342	AssertCompileSize(MptConfigurationPageManufacturing3, 8);
1343
1344	/**
1345	* Manufacturing page 4. - Readonly.
1346	*/
1347	#pragma pack(1)
1348	typedef struct MptConfigurationPageManufacturing4
1349	{
1350	/** Union. */
1351	union
1352	{
1353	/** Byte view. */
1354	uint8_t abPageData[84];
1355	/** Field view. */
1356	struct
1357	{
1358	/** The omnipresent header. */
1359	MptConfigurationPageHeader Header;
1360	/** Reserved. */
1361	uint32_t u32Reserved;
1362	/** InfoOffset0. */
1363	uint8_t u8InfoOffset0;
1364	/** Info size. */
1365	uint8_t u8InfoSize0;
1366	/** InfoOffset1. */
1367	uint8_t u8InfoOffset1;
1368	/** Info size. */
1369	uint8_t u8InfoSize1;
1370	/** Size of the inquiry data. */
1371	uint8_t u8InquirySize;
1372	/** Reserved. */
1373	uint8_t abReserved[3];
1374	/** Inquiry data. */
1375	uint8_t abInquiryData[56];
1376	/** IS volume settings. */
1377	uint32_t u32ISVolumeSettings;
1378	/** IME volume settings. */
1379	uint32_t u32IMEVolumeSettings;
1380	/** IM volume settings. */
1381	uint32_t u32IMVolumeSettings;
1382	} fields;
1383	} u;
1384	} MptConfigurationPageManufacturing4, *PMptConfigurationPageManufacturing4;
1385	#pragma pack()
1386	AssertCompileSize(MptConfigurationPageManufacturing4, 84);
1387
1388	/**
1389	* Manufacturing page 5 - Readonly.
1390	*/
1391	#pragma pack(1)
1392	typedef struct MptConfigurationPageManufacturing5
1393	{
1394	/** Union. */
1395	union
1396	{
1397	/** Byte view. */
1398	uint8_t abPageData[88];
1399	/** Field view. */
1400	struct
1401	{
1402	/** The omnipresent header. */
1403	MptConfigurationPageHeader Header;
1404	/** Base WWID. */
1405	uint64_t u64BaseWWID;
1406	/** Flags */
1407	uint8_t u8Flags;
1408	/** Number of ForceWWID fields in this page. */
1409	uint8_t u8NumForceWWID;
1410	/** Reserved */
1411	uint16_t u16Reserved;
1412	/** Reserved */
1413	uint32_t au32Reserved[2];
1414	/** ForceWWID entries Maximum of 8 because the SAS controller doesn't has more */
1415	uint64_t au64ForceWWID[8];
1416	} fields;
1417	} u;
1418	} MptConfigurationPageManufacturing5, *PMptConfigurationPageManufacturing5;
1419	#pragma pack()
1420	AssertCompileSize(MptConfigurationPageManufacturing5, 24+64);
1421
1422	/**
1423	* Manufacturing page 6 - Readonly.
1424	*/
1425	#pragma pack(1)
1426	typedef struct MptConfigurationPageManufacturing6
1427	{
1428	/** Union. */
1429	union
1430	{
1431	/** Byte view. */
1432	uint8_t abPageData[4];
1433	/** Field view. */
1434	struct
1435	{
1436	/** The omnipresent header. */
1437	MptConfigurationPageHeader Header;
1438	/** Product specific data - 0 for now */
1439	} fields;
1440	} u;
1441	} MptConfigurationPageManufacturing6, *PMptConfigurationPageManufacturing6;
1442	#pragma pack()
1443	AssertCompileSize(MptConfigurationPageManufacturing6, 4);
1444
1445	/**
1446	* Manufacutring page 7 - PHY element.
1447	*/
1448	#pragma pack(1)
1449	typedef struct MptConfigurationPageManufacturing7PHY
1450	{
1451	/** Pinout */
1452	uint32_t u32Pinout;
1453	/** Connector name */
1454	uint8_t szConnector[16];
1455	/** Location */
1456	uint8_t u8Location;
1457	/** reserved */
1458	uint8_t u8Reserved;
1459	/** Slot */
1460	uint16_t u16Slot;
1461	} MptConfigurationPageManufacturing7PHY, *PMptConfigurationPageManufacturing7PHY;
1462	#pragma pack()
1463	AssertCompileSize(MptConfigurationPageManufacturing7PHY, 24);
1464
1465	/**
1466	* Manufacturing page 7 - Readonly.
1467	*/
1468	#pragma pack(1)
1469	typedef struct MptConfigurationPageManufacturing7
1470	{
1471	/** Union. */
1472	union
1473	{
1474	/** Byte view. */
1475	uint8_t abPageData[1];
1476	/** Field view. */
1477	struct
1478	{
1479	/** The omnipresent header. */
1480	MptConfigurationPageHeader Header;
1481	/** Reserved */
1482	uint32_t au32Reserved[2];
1483	/** Flags */
1484	uint32_t u32Flags;
1485	/** Enclosure name */
1486	uint8_t szEnclosureName[16];
1487	/** Number of PHYs */
1488	uint8_t u8NumPhys;
1489	/** Reserved */
1490	uint8_t au8Reserved[3];
1491	/** PHY list for the SAS controller - variable depending on the number of ports */
1492	MptConfigurationPageManufacturing7PHY aPHY[1];
1493	} fields;
1494	} u;
1495	} MptConfigurationPageManufacturing7, *PMptConfigurationPageManufacturing7;
1496	#pragma pack()
1497	AssertCompileSize(MptConfigurationPageManufacturing7, 36+sizeof(MptConfigurationPageManufacturing7PHY));
1498
1499	#define LSILOGICSCSI_MANUFACTURING7_GET_SIZE(ports) (sizeof(MptConfigurationPageManufacturing7) + ((ports) - 1) * sizeof(MptConfigurationPageManufacturing7PHY))
1500
1501	/** Flags for the flags field */
1502	#define LSILOGICSCSI_MANUFACTURING7_FLAGS_USE_PROVIDED_INFORMATION RT_BIT(0)
1503
1504	/** Flags for the pinout field */
1505	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_UNKNOWN RT_BIT(0)
1506	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8482 RT_BIT(1)
1507	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE1 RT_BIT(8)
1508	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE2 RT_BIT(9)
1509	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE3 RT_BIT(10)
1510	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE4 RT_BIT(11)
1511	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE1 RT_BIT(16)
1512	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE2 RT_BIT(17)
1513	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE3 RT_BIT(18)
1514	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE4 RT_BIT(19)
1515
1516	/** Flags for the location field */
1517	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_UNKNOWN 0x01
1518	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_INTERNAL 0x02
1519	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_EXTERNAL 0x04
1520	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_SWITCHABLE 0x08
1521	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_AUTO 0x10
1522	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_PRESENT 0x20
1523	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_CONNECTED 0x80
1524
1525	/**
1526	* Manufacturing page 8 - Readonly.
1527	*/
1528	#pragma pack(1)
1529	typedef struct MptConfigurationPageManufacturing8
1530	{
1531	/** Union. */
1532	union
1533	{
1534	/** Byte view. */
1535	uint8_t abPageData[4];
1536	/** Field view. */
1537	struct
1538	{
1539	/** The omnipresent header. */
1540	MptConfigurationPageHeader Header;
1541	/** Product specific information */
1542	} fields;
1543	} u;
1544	} MptConfigurationPageManufacturing8, *PMptConfigurationPageManufacturing8;
1545	#pragma pack()
1546	AssertCompileSize(MptConfigurationPageManufacturing8, 4);
1547
1548	/**
1549	* Manufacturing page 9 - Readonly.
1550	*/
1551	#pragma pack(1)
1552	typedef struct MptConfigurationPageManufacturing9
1553	{
1554	/** Union. */
1555	union
1556	{
1557	/** Byte view. */
1558	uint8_t abPageData[4];
1559	/** Field view. */
1560	struct
1561	{
1562	/** The omnipresent header. */
1563	MptConfigurationPageHeader Header;
1564	/** Product specific information */
1565	} fields;
1566	} u;
1567	} MptConfigurationPageManufacturing9, *PMptConfigurationPageManufacturing9;
1568	#pragma pack()
1569	AssertCompileSize(MptConfigurationPageManufacturing9, 4);
1570
1571	/**
1572	* Manufacturing page 10 - Readonly.
1573	*/
1574	#pragma pack(1)
1575	typedef struct MptConfigurationPageManufacturing10
1576	{
1577	/** Union. */
1578	union
1579	{
1580	/** Byte view. */
1581	uint8_t abPageData[4];
1582	/** Field view. */
1583	struct
1584	{
1585	/** The omnipresent header. */
1586	MptConfigurationPageHeader Header;
1587	/** Product specific information */
1588	} fields;
1589	} u;
1590	} MptConfigurationPageManufacturing10, *PMptConfigurationPageManufacturing10;
1591	#pragma pack()
1592	AssertCompileSize(MptConfigurationPageManufacturing10, 4);
1593
1594	/**
1595	* IO Unit page 0. - Readonly.
1596	*/
1597	#pragma pack(1)
1598	typedef struct MptConfigurationPageIOUnit0
1599	{
1600	/** Union. */
1601	union
1602	{
1603	/** Byte view. */
1604	uint8_t abPageData[12];
1605	/** Field view. */
1606	struct
1607	{
1608	/** The omnipresent header. */
1609	MptConfigurationPageHeader Header;
1610	/** A unique identifier. */
1611	uint64_t u64UniqueIdentifier;
1612	} fields;
1613	} u;
1614	} MptConfigurationPageIOUnit0, *PMptConfigurationPageIOUnit0;
1615	#pragma pack()
1616	AssertCompileSize(MptConfigurationPageIOUnit0, 12);
1617
1618	/**
1619	* IO Unit page 1. - Read/Write.
1620	*/
1621	#pragma pack(1)
1622	typedef struct MptConfigurationPageIOUnit1
1623	{
1624	/** Union. */
1625	union
1626	{
1627	/** Byte view. */
1628	uint8_t abPageData[8];
1629	/** Field view. */
1630	struct
1631	{
1632	/** The omnipresent header. */
1633	MptConfigurationPageHeader Header;
1634	/** Flag whether this is a single function PCI device. */
1635	unsigned fSingleFunction: 1;
1636	/** Flag whether all possible paths to a device are mapped. */
1637	unsigned fAllPathsMapped: 1;
1638	/** Reserved. */
1639	unsigned u4Reserved: 4;
1640	/** Flag whether all RAID functionality is disabled. */
1641	unsigned fIntegratedRAIDDisabled: 1;
1642	/** Flag whether 32bit PCI accesses are forced. */
1643	unsigned f32BitAccessForced: 1;
1644	/** Reserved. */
1645	unsigned abReserved: 24;
1646	} fields;
1647	} u;
1648	} MptConfigurationPageIOUnit1, *PMptConfigurationPageIOUnit1;
1649	#pragma pack()
1650	AssertCompileSize(MptConfigurationPageIOUnit1, 8);
1651
1652	/**
1653	* Adapter Ordering.
1654	*/
1655	#pragma pack(1)
1656	typedef struct MptConfigurationPageIOUnit2AdapterOrdering
1657	{
1658	/** PCI bus number. */
1659	unsigned u8PCIBusNumber: 8;
1660	/** PCI device and function number. */
1661	unsigned u8PCIDevFn: 8;
1662	/** Flag whether the adapter is embedded. */
1663	unsigned fAdapterEmbedded: 1;
1664	/** Flag whether the adapter is enabled. */
1665	unsigned fAdapterEnabled: 1;
1666	/** Reserved. */
1667	unsigned u6Reserved: 6;
1668	/** Reserved. */
1669	unsigned u8Reserved: 8;
1670	} MptConfigurationPageIOUnit2AdapterOrdering, *PMptConfigurationPageIOUnit2AdapterOrdering;
1671	#pragma pack()
1672	AssertCompileSize(MptConfigurationPageIOUnit2AdapterOrdering, 4);
1673
1674	/**
1675	* IO Unit page 2. - Read/Write.
1676	*/
1677	#pragma pack(1)
1678	typedef struct MptConfigurationPageIOUnit2
1679	{
1680	/** Union. */
1681	union
1682	{
1683	/** Byte view. */
1684	uint8_t abPageData[28];
1685	/** Field view. */
1686	struct
1687	{
1688	/** The omnipresent header. */
1689	MptConfigurationPageHeader Header;
1690	/** Reserved. */
1691	unsigned fReserved: 1;
1692	/** Flag whether Pause on error is enabled. */
1693	unsigned fPauseOnError: 1;
1694	/** Flag whether verbose mode is enabled. */
1695	unsigned fVerboseModeEnabled: 1;
1696	/** Set to disable color video. */
1697	unsigned fDisableColorVideo: 1;
1698	/** Flag whether int 40h is hooked. */
1699	unsigned fNotHookInt40h: 1;
1700	/** Reserved. */
1701	unsigned u3Reserved: 3;
1702	/** Reserved. */
1703	unsigned abReserved: 24;
1704	/** BIOS version. */
1705	uint32_t u32BIOSVersion;
1706	/** Adapter ordering. */
1707	MptConfigurationPageIOUnit2AdapterOrdering aAdapterOrder[4];
1708	} fields;
1709	} u;
1710	} MptConfigurationPageIOUnit2, *PMptConfigurationPageIOUnit2;
1711	#pragma pack()
1712	AssertCompileSize(MptConfigurationPageIOUnit2, 28);
1713
1714	/*
1715	* IO Unit page 3. - Read/Write.
1716	*/
1717	#pragma pack(1)
1718	typedef struct MptConfigurationPageIOUnit3
1719	{
1720	/** Union. */
1721	union
1722	{
1723	/** Byte view. */
1724	uint8_t abPageData[8];
1725	/** Field view. */
1726	struct
1727	{
1728	/** The omnipresent header. */
1729	MptConfigurationPageHeader Header;
1730	/** Number of GPIO values. */
1731	uint8_t u8GPIOCount;
1732	/** Reserved. */
1733	uint8_t abReserved[3];
1734	} fields;
1735	} u;
1736	} MptConfigurationPageIOUnit3, *PMptConfigurationPageIOUnit3;
1737	#pragma pack()
1738	AssertCompileSize(MptConfigurationPageIOUnit3, 8);
1739
1740	/*
1741	* IO Unit page 4. - Readonly for everyone except the BIOS.
1742	*/
1743	#pragma pack(1)
1744	typedef struct MptConfigurationPageIOUnit4
1745	{
1746	/** Union. */
1747	union
1748	{
1749	/** Byte view. */
1750	uint8_t abPageData[20];
1751	/** Field view. */
1752	struct
1753	{
1754	/** The omnipresent header. */
1755	MptConfigurationPageHeader Header;
1756	/** Reserved */
1757	uint32_t u32Reserved;
1758	/** SG entry describing the Firmware location. */
1759	MptSGEntrySimple64 FWImageSGE;
1760	} fields;
1761	} u;
1762	} MptConfigurationPageIOUnit4, *PMptConfigurationPageIOUnit4;
1763	#pragma pack()
1764	AssertCompileSize(MptConfigurationPageIOUnit4, 20);
1765
1766	/**
1767	* IOC page 0. - Readonly
1768	*/
1769	#pragma pack(1)
1770	typedef struct MptConfigurationPageIOC0
1771	{
1772	/** Union. */
1773	union
1774	{
1775	/** Byte view. */
1776	uint8_t abPageData[28];
1777	/** Field view. */
1778	struct
1779	{
1780	/** The omnipresent header. */
1781	MptConfigurationPageHeader Header;
1782	/** Total amount of NV memory in bytes. */
1783	uint32_t u32TotalNVStore;
1784	/** Number of free bytes in the NV store. */
1785	uint32_t u32FreeNVStore;
1786	/** PCI vendor ID. */
1787	uint16_t u16VendorId;
1788	/** PCI device ID. */
1789	uint16_t u16DeviceId;
1790	/** PCI revision ID. */
1791	uint8_t u8RevisionId;
1792	/** Reserved. */
1793	uint8_t abReserved[3];
1794	/** PCI class code. */
1795	uint32_t u32ClassCode;
1796	/** Subsystem vendor Id. */
1797	uint16_t u16SubsystemVendorId;
1798	/** Subsystem Id. */
1799	uint16_t u16SubsystemId;
1800	} fields;
1801	} u;
1802	} MptConfigurationPageIOC0, *PMptConfigurationPageIOC0;
1803	#pragma pack()
1804	AssertCompileSize(MptConfigurationPageIOC0, 28);
1805
1806	/**
1807	* IOC page 1. - Read/Write
1808	*/
1809	#pragma pack(1)
1810	typedef struct MptConfigurationPageIOC1
1811	{
1812	/** Union. */
1813	union
1814	{
1815	/** Byte view. */
1816	uint8_t abPageData[16];
1817	/** Field view. */
1818	struct
1819	{
1820	/** The omnipresent header. */
1821	MptConfigurationPageHeader Header;
1822	/** Flag whether reply coalescing is enabled. */
1823	unsigned fReplyCoalescingEnabled: 1;
1824	/** Reserved. */
1825	unsigned u31Reserved: 31;
1826	/** Coalescing Timeout in microseconds. */
1827	unsigned u32CoalescingTimeout: 32;
1828	/** Coalescing depth. */
1829	unsigned u8CoalescingDepth: 8;
1830	/** Reserved. */
1831	unsigned u8Reserved0: 8;
1832	unsigned u8Reserved1: 8;
1833	unsigned u8Reserved2: 8;
1834	} fields;
1835	} u;
1836	} MptConfigurationPageIOC1, *PMptConfigurationPageIOC1;
1837	#pragma pack()
1838	AssertCompileSize(MptConfigurationPageIOC1, 16);
1839
1840	/**
1841	* IOC page 2. - Readonly
1842	*/
1843	#pragma pack(1)
1844	typedef struct MptConfigurationPageIOC2
1845	{
1846	/** Union. */
1847	union
1848	{
1849	/** Byte view. */
1850	uint8_t abPageData[12];
1851	/** Field view. */
1852	struct
1853	{
1854	/** The omnipresent header. */
1855	MptConfigurationPageHeader Header;
1856	/** Flag whether striping is supported. */
1857	unsigned fStripingSupported: 1;
1858	/** Flag whether enhanced mirroring is supported. */
1859	unsigned fEnhancedMirroringSupported: 1;
1860	/** Flag whether mirroring is supported. */
1861	unsigned fMirroringSupported: 1;
1862	/** Reserved. */
1863	unsigned u26Reserved: 26;
1864	/** Flag whether SES is supported. */
1865	unsigned fSESSupported: 1;
1866	/** Flag whether SAF-TE is supported. */
1867	unsigned fSAFTESupported: 1;
1868	/** Flag whether cross channel volumes are supported. */
1869	unsigned fCrossChannelVolumesSupported: 1;
1870	/** Number of active integrated RAID volumes. */
1871	unsigned u8NumActiveVolumes: 8;
1872	/** Maximum number of integrated RAID volumes supported. */
1873	unsigned u8MaxVolumes: 8;
1874	/** Number of active integrated RAID physical disks. */
1875	unsigned u8NumActivePhysDisks: 8;
1876	/** Maximum number of integrated RAID physical disks supported. */
1877	unsigned u8MaxPhysDisks: 8;
1878	/** RAID volumes... - not supported. */
1879	} fields;
1880	} u;
1881	} MptConfigurationPageIOC2, *PMptConfigurationPageIOC2;
1882	#pragma pack()
1883	AssertCompileSize(MptConfigurationPageIOC2, 12);
1884
1885	/**
1886	* IOC page 3. - Readonly
1887	*/
1888	#pragma pack(1)
1889	typedef struct MptConfigurationPageIOC3
1890	{
1891	/** Union. */
1892	union
1893	{
1894	/** Byte view. */
1895	uint8_t abPageData[8];
1896	/** Field view. */
1897	struct
1898	{
1899	/** The omnipresent header. */
1900	MptConfigurationPageHeader Header;
1901	/** Number of active integrated RAID physical disks. */
1902	uint8_t u8NumPhysDisks;
1903	/** Reserved. */
1904	uint8_t abReserved[3];
1905	} fields;
1906	} u;
1907	} MptConfigurationPageIOC3, *PMptConfigurationPageIOC3;
1908	#pragma pack()
1909	AssertCompileSize(MptConfigurationPageIOC3, 8);
1910
1911	/**
1912	* IOC page 4. - Read/Write
1913	*/
1914	#pragma pack(1)
1915	typedef struct MptConfigurationPageIOC4
1916	{
1917	/** Union. */
1918	union
1919	{
1920	/** Byte view. */
1921	uint8_t abPageData[8];
1922	/** Field view. */
1923	struct
1924	{
1925	/** The omnipresent header. */
1926	MptConfigurationPageHeader Header;
1927	/** Number of SEP entries in this page. */
1928	uint8_t u8ActiveSEP;
1929	/** Maximum number of SEp entries supported. */
1930	uint8_t u8MaxSEP;
1931	/** Reserved. */
1932	uint16_t u16Reserved;
1933	/** SEP entries... - not supported. */
1934	} fields;
1935	} u;
1936	} MptConfigurationPageIOC4, *PMptConfigurationPageIOC4;
1937	#pragma pack()
1938	AssertCompileSize(MptConfigurationPageIOC4, 8);
1939
1940	/**
1941	* IOC page 6. - Read/Write
1942	*/
1943	#pragma pack(1)
1944	typedef struct MptConfigurationPageIOC6
1945	{
1946	/** Union. */
1947	union
1948	{
1949	/** Byte view. */
1950	uint8_t abPageData[60];
1951	/** Field view. */
1952	struct
1953	{
1954	/** The omnipresent header. */
1955	MptConfigurationPageHeader Header;
1956	uint32_t u32CapabilitiesFlags;
1957	uint8_t u8MaxDrivesIS;
1958	uint8_t u8MaxDrivesIM;
1959	uint8_t u8MaxDrivesIME;
1960	uint8_t u8Reserved1;
1961	uint8_t u8MinDrivesIS;
1962	uint8_t u8MinDrivesIM;
1963	uint8_t u8MinDrivesIME;
1964	uint8_t u8Reserved2;
1965	uint8_t u8MaxGlobalHotSpares;
1966	uint8_t u8Reserved3;
1967	uint16_t u16Reserved4;
1968	uint32_t u32Reserved5;
1969	uint32_t u32SupportedStripeSizeMapIS;
1970	uint32_t u32SupportedStripeSizeMapIME;
1971	uint32_t u32Reserved6;
1972	uint8_t u8MetadataSize;
1973	uint8_t u8Reserved7;
1974	uint16_t u16Reserved8;
1975	uint16_t u16MaxBadBlockTableEntries;
1976	uint16_t u16Reserved9;
1977	uint16_t u16IRNvsramUsage;
1978	uint16_t u16Reserved10;
1979	uint32_t u32IRNvsramVersion;
1980	uint32_t u32Reserved11;
1981	} fields;
1982	} u;
1983	} MptConfigurationPageIOC6, *PMptConfigurationPageIOC6;
1984	#pragma pack()
1985	AssertCompileSize(MptConfigurationPageIOC6, 60);
1986
1987	/**
1988	* BIOS page 1 - Read/write.
1989	*/
1990	#pragma pack(1)
1991	typedef struct MptConfigurationPageBIOS1
1992	{
1993	/** Union. */
1994	union
1995	{
1996	/** Byte view. */
1997	uint8_t abPageData[48];
1998	/** Field view. */
1999	struct
2000	{
2001	/** The omnipresent header. */
2002	MptConfigurationPageHeader Header;
2003	/** BIOS options */
2004	uint32_t u32BiosOptions;
2005	/** IOC settings */
2006	uint32_t u32IOCSettings;
2007	/** Reserved */
2008	uint32_t u32Reserved;
2009	/** Device settings */
2010	uint32_t u32DeviceSettings;
2011	/** Number of devices */
2012	uint16_t u16NumberOfDevices;
2013	/** Expander spinup */
2014	uint8_t u8ExpanderSpinup;
2015	/** Reserved */
2016	uint8_t u8Reserved;
2017	/** I/O timeout of block devices without removable media */
2018	uint16_t u16IOTimeoutBlockDevicesNonRM;
2019	/** I/O timeout sequential */
2020	uint16_t u16IOTimeoutSequential;
2021	/** I/O timeout other */
2022	uint16_t u16IOTimeoutOther;
2023	/** I/O timeout of block devices with removable media */
2024	uint16_t u16IOTimeoutBlockDevicesRM;
2025	} fields;
2026	} u;
2027	} MptConfigurationPageBIOS1, *PMptConfigurationPageBIOS1;
2028	#pragma pack()
2029	AssertCompileSize(MptConfigurationPageBIOS1, 48);
2030
2031	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_DISABLE RT_BIT(0)
2032	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_SCAN_FROM_HIGH_TO_LOW RT_BIT(1)
2033	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SAS_SUPPORT RT_BIT(8)
2034	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_FC_SUPPORT RT_BIT(9)
2035	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SPI_SUPPORT RT_BIT(10)
2036
2037	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ALTERNATE_CHS RT_BIT(3)
2038
2039	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_SET(x) ((x) << 4)
2040	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_DISABLED 0x00
2041	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BIOS_ONLY 0x01
2042	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_OS_ONLY 0x02
2043	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BOT 0x03
2044
2045	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_SET(x) ((x) << 6)
2046	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_NO_INT13H 0x00
2047	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_BOOT_MEDIA_INT13H 0x01
2048	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_INT13H 0x02
2049
2050	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_SET(x) ((x & 0xF) << 8)
2051	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_GET(x) ((x >> 8) & 0x0F)
2052	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_SET(x) ((x & 0xF) << 12)
2053	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_GET(x) ((x >> 12) & 0x0F)
2054
2055	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SET(x) (((x) & 0x3) << 16)
2056	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_ENCLOSURE 0x0
2057	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SAS_ADDRESS 0x1
2058
2059	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_DIRECT_ATTACH_SPINUP_MODE_ALL RT_BIT(18)
2060	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_AUTO_PORT_ENABLE RT_BIT(19)
2061
2062	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_SET(x) (((x) & 0xF) << 20)
2063	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_GET(x) ((x >> 20) & 0x0F)
2064
2065	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_SET(x) (((x) & 0xF) << 24)
2066	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_GET(x) ((x >> 24) & 0x0F)
2067
2068	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS RT_BIT(0)
2069	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_NON_REMOVABLE_DEVICES RT_BIT(1)
2070	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_REMOVABLE_DEVICES RT_BIT(2)
2071	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS2 RT_BIT(3)
2072	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_SMART_POLLING RT_BIT(4)
2073
2074	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_SET(x) ((x) & 0x0F)
2075	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_GET(x) ((x) & 0x0F)
2076	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_SET(x) (((x) & 0x0F) << 4)
2077	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_GET(x) ((x >> 4) & 0x0F)
2078
2079	/**
2080	* BIOS page 2 - Read/write.
2081	*/
2082	#pragma pack(1)
2083	typedef struct MptConfigurationPageBIOS2
2084	{
2085	/** Union. */
2086	union
2087	{
2088	/** Byte view. */
2089	uint8_t abPageData[384];
2090	/** Field view. */
2091	struct
2092	{
2093	/** The omnipresent header. */
2094	MptConfigurationPageHeader Header;
2095	/** Reserved */
2096	uint32_t au32Reserved[6];
2097	/** Format of the boot device field. */
2098	uint8_t u8BootDeviceForm;
2099	/** Previous format of the boot device field. */
2100	uint8_t u8PrevBootDeviceForm;
2101	/** Reserved */
2102	uint16_t u16Reserved;
2103	/** Boot device fields - dependent on the format */
2104	union
2105	{
2106	/** Device for AdapterNumber:Bus:Target:LUN */
2107	struct
2108	{
2109	/** Target ID */
2110	uint8_t u8TargetID;
2111	/** Bus */
2112	uint8_t u8Bus;
2113	/** Adapter Number */
2114	uint8_t u8AdapterNumber;
2115	/** Reserved */
2116	uint8_t u8Reserved;
2117	/** Reserved */
2118	uint32_t au32Reserved[3];
2119	/** LUN */
2120	uint32_t aLUN[5];
2121	/** Reserved */
2122	uint32_t au32Reserved2[56];
2123	} AdapterNumberBusTargetLUN;
2124	/** Device for PCIAddress:Bus:Target:LUN */
2125	struct
2126	{
2127	/** Target ID */
2128	uint8_t u8TargetID;
2129	/** Bus */
2130	uint8_t u8Bus;
2131	/** Adapter Number */
2132	uint16_t u16PCIAddress;
2133	/** Reserved */
2134	uint32_t au32Reserved[3];
2135	/** LUN */
2136	uint32_t aLUN[5];
2137	/** Reserved */
2138	uint32_t au32Reserved2[56];
2139	} PCIAddressBusTargetLUN;
2140	/** Device for PCISlotNo:Bus:Target:LUN */
2141	struct
2142	{
2143	/** Target ID */
2144	uint8_t u8TargetID;
2145	/** Bus */
2146	uint8_t u8Bus;
2147	/** PCI Slot Number */
2148	uint8_t u16PCISlotNo;
2149	/** Reserved */
2150	uint32_t au32Reserved[3];
2151	/** LUN */
2152	uint32_t aLUN[5];
2153	/** Reserved */
2154	uint32_t au32Reserved2[56];
2155	} PCIAddressBusSlotLUN;
2156	/** Device for FC channel world wide name */
2157	struct
2158	{
2159	/** World wide port name low */
2160	uint32_t u32WorldWidePortNameLow;
2161	/** World wide port name high */
2162	uint32_t u32WorldWidePortNameHigh;
2163	/** Reserved */
2164	uint32_t au32Reserved[3];
2165	/** LUN */
2166	uint32_t aLUN[5];
2167	/** Reserved */
2168	uint32_t au32Reserved2[56];
2169	} FCWorldWideName;
2170	/** Device for FC channel world wide name */
2171	struct
2172	{
2173	/** SAS address */
2174	SASADDRESS SASAddress;
2175	/** Reserved */
2176	uint32_t au32Reserved[3];
2177	/** LUN */
2178	uint32_t aLUN[5];
2179	/** Reserved */
2180	uint32_t au32Reserved2[56];
2181	} SASWorldWideName;
2182	/** Device for Enclosure/Slot */
2183	struct
2184	{
2185	/** Enclosure logical ID */
2186	uint64_t u64EnclosureLogicalID;
2187	/** Reserved */
2188	uint32_t au32Reserved[3];
2189	/** LUN */
2190	uint32_t aLUN[5];
2191	/** Reserved */
2192	uint32_t au32Reserved2[56];
2193	} EnclosureSlot;
2194	} BootDevice;
2195	} fields;
2196	} u;
2197	} MptConfigurationPageBIOS2, *PMptConfigurationPageBIOS2;
2198	#pragma pack()
2199	AssertCompileSize(MptConfigurationPageBIOS2, 384);
2200
2201	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SET(x) ((x) & 0x0F)
2202	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FIRST 0x0
2203	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ADAPTER_BUS_TARGET_LUN 0x1
2204	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCIADDR_BUS_TARGET_LUN 0x2
2205	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCISLOT_BUS_TARGET_LUN 0x3
2206	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FC_WWN 0x4
2207	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SAS_WWN 0x5
2208	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ENCLOSURE_SLOT 0x6
2209
2210	/**
2211	* BIOS page 4 - Read/Write (Where is 3? - not defined in the spec)
2212	*/
2213	#pragma pack(1)
2214	typedef struct MptConfigurationPageBIOS4
2215	{
2216	/** Union. */
2217	union
2218	{
2219	/** Byte view. */
2220	uint8_t abPageData[12];
2221	/** Field view. */
2222	struct
2223	{
2224	/** The omnipresent header. */
2225	MptConfigurationPageHeader Header;
2226	/** Reassignment Base WWID */
2227	uint64_t u64ReassignmentBaseWWID;
2228	} fields;
2229	} u;
2230	} MptConfigurationPageBIOS4, *PMptConfigurationPageBIOS4;
2231	#pragma pack()
2232	AssertCompileSize(MptConfigurationPageBIOS4, 12);
2233
2234	/**
2235	* SCSI-SPI port page 0. - Readonly
2236	*/
2237	#pragma pack(1)
2238	typedef struct MptConfigurationPageSCSISPIPort0
2239	{
2240	/** Union. */
2241	union
2242	{
2243	/** Byte view. */
2244	uint8_t abPageData[12];
2245	/** Field view. */
2246	struct
2247	{
2248	/** The omnipresent header. */
2249	MptConfigurationPageHeader Header;
2250	/** Flag whether this port is information unit transfers capable. */
2251	unsigned fInformationUnitTransfersCapable: 1;
2252	/** Flag whether the port is DT (Dual Transfer) capable. */
2253	unsigned fDTCapable: 1;
2254	/** Flag whether the port is QAS (Quick Arbitrate and Select) capable. */
2255	unsigned fQASCapable: 1;
2256	/** Reserved. */
2257	unsigned u5Reserved1: 5;
2258	/** Minimum Synchronous transfer period. */
2259	unsigned u8MinimumSynchronousTransferPeriod: 8;
2260	/** Maximum synchronous offset. */
2261	unsigned u8MaximumSynchronousOffset: 8;
2262	/** Reserved. */
2263	unsigned u5Reserved2: 5;
2264	/** Flag whether indicating the width of the bus - 0 narrow and 1 for wide. */
2265	unsigned fWide: 1;
2266	/** Reserved */
2267	unsigned fReserved: 1;
2268	/** Flag whether the port is AIP (Asynchronous Information Protection) capable. */
2269	unsigned fAIPCapable: 1;
2270	/** Signaling Type. */
2271	unsigned u2SignalingType: 2;
2272	/** Reserved. */
2273	unsigned u30Reserved: 30;
2274	} fields;
2275	} u;
2276	} MptConfigurationPageSCSISPIPort0, *PMptConfigurationPageSCSISPIPort0;
2277	#pragma pack()
2278	AssertCompileSize(MptConfigurationPageSCSISPIPort0, 12);
2279
2280	/**
2281	* SCSI-SPI port page 1. - Read/Write
2282	*/
2283	#pragma pack(1)
2284	typedef struct MptConfigurationPageSCSISPIPort1
2285	{
2286	/** Union. */
2287	union
2288	{
2289	/** Byte view. */
2290	uint8_t abPageData[12];
2291	/** Field view. */
2292	struct
2293	{
2294	/** The omnipresent header. */
2295	MptConfigurationPageHeader Header;
2296	/** The SCSI ID of the port. */
2297	uint8_t u8SCSIID;
2298	/** Reserved. */
2299	uint8_t u8Reserved;
2300	/** Port response IDs Bit mask field. */
2301	uint16_t u16PortResponseIDsBitmask;
2302	/** Value for the on BUS timer. */
2303	uint32_t u32OnBusTimerValue;
2304	} fields;
2305	} u;
2306	} MptConfigurationPageSCSISPIPort1, *PMptConfigurationPageSCSISPIPort1;
2307	#pragma pack()
2308	AssertCompileSize(MptConfigurationPageSCSISPIPort1, 12);
2309
2310	/**
2311	* Device settings for one device.
2312	*/
2313	#pragma pack(1)
2314	typedef struct MptDeviceSettings
2315	{
2316	/** Timeout for I/O in seconds. */
2317	unsigned u8Timeout: 8;
2318	/** Minimum synchronous factor. */
2319	unsigned u8SyncFactor: 8;
2320	/** Flag whether disconnect is enabled. */
2321	unsigned fDisconnectEnable: 1;
2322	/** Flag whether Scan ID is enabled. */
2323	unsigned fScanIDEnable: 1;
2324	/** Flag whether Scan LUNs is enabled. */
2325	unsigned fScanLUNEnable: 1;
2326	/** Flag whether tagged queuing is enabled. */
2327	unsigned fTaggedQueuingEnabled: 1;
2328	/** Flag whether wide is enabled. */
2329	unsigned fWideDisable: 1;
2330	/** Flag whether this device is bootable. */
2331	unsigned fBootChoice: 1;
2332	/** Reserved. */
2333	unsigned u10Reserved: 10;
2334	} MptDeviceSettings, *PMptDeviceSettings;
2335	#pragma pack()
2336	AssertCompileSize(MptDeviceSettings, 4);
2337
2338	/**
2339	* SCSI-SPI port page 2. - Read/Write for the BIOS
2340	*/
2341	#pragma pack(1)
2342	typedef struct MptConfigurationPageSCSISPIPort2
2343	{
2344	/** Union. */
2345	union
2346	{
2347	/** Byte view. */
2348	uint8_t abPageData[76];
2349	/** Field view. */
2350	struct
2351	{
2352	/** The omnipresent header. */
2353	MptConfigurationPageHeader Header;
2354	/** Flag indicating the bus scan order. */
2355	unsigned fBusScanOrderHighToLow: 1;
2356	/** Reserved. */
2357	unsigned fReserved: 1;
2358	/** Flag whether SCSI Bus resets are avoided. */
2359	unsigned fAvoidSCSIBusResets: 1;
2360	/** Flag whether alternate CHS is used. */
2361	unsigned fAlternateCHS: 1;
2362	/** Flag whether termination is disabled. */
2363	unsigned fTerminationDisabled: 1;
2364	/** Reserved. */
2365	unsigned u27Reserved: 27;
2366	/** Host SCSI ID. */
2367	unsigned u4HostSCSIID: 4;
2368	/** Initialize HBA. */
2369	unsigned u2InitializeHBA: 2;
2370	/** Removeable media setting. */
2371	unsigned u2RemovableMediaSetting: 2;
2372	/** Spinup delay. */
2373	unsigned u4SpinupDelay: 4;
2374	/** Negotiating settings. */
2375	unsigned u2NegotitatingSettings: 2;
2376	/** Reserved. */
2377	unsigned u18Reserved: 18;
2378	/** Device Settings. */
2379	MptDeviceSettings aDeviceSettings[16];
2380	} fields;
2381	} u;
2382	} MptConfigurationPageSCSISPIPort2, *PMptConfigurationPageSCSISPIPort2;
2383	#pragma pack()
2384	AssertCompileSize(MptConfigurationPageSCSISPIPort2, 76);
2385
2386	/**
2387	* SCSI-SPI device page 0. - Readonly
2388	*/
2389	#pragma pack(1)
2390	typedef struct MptConfigurationPageSCSISPIDevice0
2391	{
2392	/** Union. */
2393	union
2394	{
2395	/** Byte view. */
2396	uint8_t abPageData[12];
2397	/** Field view. */
2398	struct
2399	{
2400	/** The omnipresent header. */
2401	MptConfigurationPageHeader Header;
2402	/** Negotiated Parameters. */
2403	/** Information Units enabled. */
2404	unsigned fInformationUnitsEnabled: 1;
2405	/** Dual Transfers Enabled. */
2406	unsigned fDTEnabled: 1;
2407	/** QAS enabled. */
2408	unsigned fQASEnabled: 1;
2409	/** Reserved. */
2410	unsigned u5Reserved1: 5;
2411	/** Synchronous Transfer period. */
2412	unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2413	/** Synchronous offset. */
2414	unsigned u8NegotiatedSynchronousOffset: 8;
2415	/** Reserved. */
2416	unsigned u5Reserved2: 5;
2417	/** Width - 0 for narrow and 1 for wide. */
2418	unsigned fWide: 1;
2419	/** Reserved. */
2420	unsigned fReserved: 1;
2421	/** AIP enabled. */
2422	unsigned fAIPEnabled: 1;
2423	/** Flag whether negotiation occurred. */
2424	unsigned fNegotationOccured: 1;
2425	/** Flag whether a SDTR message was rejected. */
2426	unsigned fSDTRRejected: 1;
2427	/** Flag whether a WDTR message was rejected. */
2428	unsigned fWDTRRejected: 1;
2429	/** Flag whether a PPR message was rejected. */
2430	unsigned fPPRRejected: 1;
2431	/** Reserved. */
2432	unsigned u28Reserved: 28;
2433	} fields;
2434	} u;
2435	} MptConfigurationPageSCSISPIDevice0, *PMptConfigurationPageSCSISPIDevice0;
2436	#pragma pack()
2437	AssertCompileSize(MptConfigurationPageSCSISPIDevice0, 12);
2438
2439	/**
2440	* SCSI-SPI device page 1. - Read/Write
2441	*/
2442	#pragma pack(1)
2443	typedef struct MptConfigurationPageSCSISPIDevice1
2444	{
2445	/** Union. */
2446	union
2447	{
2448	/** Byte view. */
2449	uint8_t abPageData[16];
2450	/** Field view. */
2451	struct
2452	{
2453	/** The omnipresent header. */
2454	MptConfigurationPageHeader Header;
2455	/** Requested Parameters. */
2456	/** Information Units enable. */
2457	bool fInformationUnitsEnable: 1;
2458	/** Dual Transfers Enable. */
2459	bool fDTEnable: 1;
2460	/** QAS enable. */
2461	bool fQASEnable: 1;
2462	/** Reserved. */
2463	unsigned u5Reserved1: 5;
2464	/** Synchronous Transfer period. */
2465	unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2466	/** Synchronous offset. */
2467	unsigned u8NegotiatedSynchronousOffset: 8;
2468	/** Reserved. */
2469	unsigned u5Reserved2: 5;
2470	/** Width - 0 for narrow and 1 for wide. */
2471	bool fWide: 1;
2472	/** Reserved. */
2473	bool fReserved1: 1;
2474	/** AIP enable. */
2475	bool fAIPEnable: 1;
2476	/** Reserved. */
2477	bool fReserved2: 1;
2478	/** WDTR disallowed. */
2479	bool fWDTRDisallowed: 1;
2480	/** SDTR disallowed. */
2481	bool fSDTRDisallowed: 1;
2482	/** Reserved. */
2483	unsigned u29Reserved: 29;
2484	} fields;
2485	} u;
2486	} MptConfigurationPageSCSISPIDevice1, *PMptConfigurationPageSCSISPIDevice1;
2487	#pragma pack()
2488	AssertCompileSize(MptConfigurationPageSCSISPIDevice1, 16);
2489
2490	/**
2491	* SCSI-SPI device page 2. - Read/Write
2492	*/
2493	#pragma pack(1)
2494	typedef struct MptConfigurationPageSCSISPIDevice2
2495	{
2496	/** Union. */
2497	union
2498	{
2499	/** Byte view. */
2500	uint8_t abPageData[16];
2501	/** Field view. */
2502	struct
2503	{
2504	/** The omnipresent header. */
2505	MptConfigurationPageHeader Header;
2506	/** Reserved. */
2507	unsigned u4Reserved: 4;
2508	/** ISI enable. */
2509	unsigned fISIEnable: 1;
2510	/** Secondary driver enable. */
2511	unsigned fSecondaryDriverEnable: 1;
2512	/** Reserved. */
2513	unsigned fReserved: 1;
2514	/** Slew create controller. */
2515	unsigned u3SlewRateControler: 3;
2516	/** Primary drive strength controller. */
2517	unsigned u3PrimaryDriveStrengthControl: 3;
2518	/** Secondary drive strength controller. */
2519	unsigned u3SecondaryDriveStrengthControl: 3;
2520	/** Reserved. */
2521	unsigned u12Reserved: 12;
2522	/** XCLKH_ST. */
2523	unsigned fXCLKH_ST: 1;
2524	/** XCLKS_ST. */
2525	unsigned fXCLKS_ST: 1;
2526	/** XCLKH_DT. */
2527	unsigned fXCLKH_DT: 1;
2528	/** XCLKS_DT. */
2529	unsigned fXCLKS_DT: 1;
2530	/** Parity pipe select. */
2531	unsigned u2ParityPipeSelect: 2;
2532	/** Reserved. */
2533	unsigned u30Reserved: 30;
2534	/** Data bit pipeline select. */
2535	unsigned u32DataPipelineSelect: 32;
2536	} fields;
2537	} u;
2538	} MptConfigurationPageSCSISPIDevice2, *PMptConfigurationPageSCSISPIDevice2;
2539	#pragma pack()
2540	AssertCompileSize(MptConfigurationPageSCSISPIDevice2, 16);
2541
2542	/**
2543	* SCSI-SPI device page 3 (Revision G). - Readonly
2544	*/
2545	#pragma pack(1)
2546	typedef struct MptConfigurationPageSCSISPIDevice3
2547	{
2548	/** Union. */
2549	union
2550	{
2551	/** Byte view. */
2552	uint8_t abPageData[1];
2553	/** Field view. */
2554	struct
2555	{
2556	/** The omnipresent header. */
2557	MptConfigurationPageHeader Header;
2558	/** Number of times the IOC rejected a message because it doesn't support the operation. */
2559	uint16_t u16MsgRejectCount;
2560	/** Number of times the SCSI bus entered an invalid operation state. */
2561	uint16_t u16PhaseErrorCount;
2562	/** Number of parity errors. */
2563	uint16_t u16ParityCount;
2564	/** Reserved. */
2565	uint16_t u16Reserved;
2566	} fields;
2567	} u;
2568	} MptConfigurationPageSCSISPIDevice3, *PMptConfigurationPageSCSISPIDevice3;
2569	#pragma pack()
2570	AssertCompileSize(MptConfigurationPageSCSISPIDevice3, 12);
2571
2572	/**
2573	* PHY entry for the SAS I/O unit page 0
2574	*/
2575	#pragma pack(1)
2576	typedef struct MptConfigurationPageSASIOUnit0PHY
2577	{
2578	/** Port number */
2579	uint8_t u8Port;
2580	/** Port flags */
2581	uint8_t u8PortFlags;
2582	/** Phy flags */
2583	uint8_t u8PhyFlags;
2584	/** negotiated link rate */
2585	uint8_t u8NegotiatedLinkRate;
2586	/** Controller phy device info */
2587	uint32_t u32ControllerPhyDeviceInfo;
2588	/** Attached device handle */
2589	uint16_t u16AttachedDevHandle;
2590	/** Controller device handle */
2591	uint16_t u16ControllerDevHandle;
2592	/** Discovery status */
2593	uint32_t u32DiscoveryStatus;
2594	} MptConfigurationPageSASIOUnit0PHY, *PMptConfigurationPageSASIOUnit0PHY;
2595	#pragma pack()
2596	AssertCompileSize(MptConfigurationPageSASIOUnit0PHY, 16);
2597
2598	/**
2599	* SAS I/O Unit page 0 - Readonly
2600	*/
2601	#pragma pack(1)
2602	typedef struct MptConfigurationPageSASIOUnit0
2603	{
2604	/** Union. */
2605	union
2606	{
2607	/** Byte view - variable. */
2608	uint8_t abPageData[1];
2609	/** Field view. */
2610	struct
2611	{
2612	/** The omnipresent header. */
2613	MptExtendedConfigurationPageHeader ExtHeader;
2614	/** Nvdata version default */
2615	uint16_t u16NvdataVersionDefault;
2616	/** Nvdata version persistent */
2617	uint16_t u16NvdataVersionPersistent;
2618	/** Number of physical ports */
2619	uint8_t u8NumPhys;
2620	/** Reserved */
2621	uint8_t au8Reserved[3];
2622	/** Content for each physical port - variable depending on the amount of ports. */
2623	MptConfigurationPageSASIOUnit0PHY aPHY[1];
2624	} fields;
2625	} u;
2626	} MptConfigurationPageSASIOUnit0, *PMptConfigurationPageSASIOUnit0;
2627	#pragma pack()
2628	AssertCompileSize(MptConfigurationPageSASIOUnit0, 8+2+2+1+3+sizeof(MptConfigurationPageSASIOUnit0PHY));
2629
2630	#define LSILOGICSCSI_SASIOUNIT0_GET_SIZE(ports) (sizeof(MptConfigurationPageSASIOUnit0) + ((ports) - 1) * sizeof(MptConfigurationPageSASIOUnit0PHY))
2631
2632	#define LSILOGICSCSI_SASIOUNIT0_PORT_CONFIGURATION_AUTO RT_BIT(0)
2633	#define LSILOGICSCSI_SASIOUNIT0_PORT_TARGET_IOC RT_BIT(2)
2634	#define LSILOGICSCSI_SASIOUNIT0_PORT_DISCOVERY_IN_STATUS RT_BIT(3)
2635
2636	#define LSILOGICSCSI_SASIOUNIT0_PHY_RX_INVERTED RT_BIT(0)
2637	#define LSILOGICSCSI_SASIOUNIT0_PHY_TX_INVERTED RT_BIT(1)
2638	#define LSILOGICSCSI_SASIOUNIT0_PHY_DISABLED RT_BIT(2)
2639
2640	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SET(x) ((x) & 0x0F)
2641	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_GET(x) ((x) & 0x0F)
2642	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_UNKNOWN 0x00
2643	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_DISABLED 0x01
2644	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_FAILED 0x02
2645	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SATA_OOB 0x03
2646	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_15GB 0x08
2647	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_30GB 0x09
2648
2649	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(x) ((x) & 0x3)
2650	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_NO 0x0
2651	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_END 0x1
2652	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_EDGE_EXPANDER 0x2
2653	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2654
2655	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA_HOST RT_BIT(3)
2656	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_INITIATOR RT_BIT(4)
2657	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_INITIATOR RT_BIT(5)
2658	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_INITIATOR RT_BIT(6)
2659	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA RT_BIT(7)
2660	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_TARGET RT_BIT(8)
2661	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_TARGET RT_BIT(9)
2662	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_TARGET RT_BIT(10)
2663	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2664	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_LSI RT_BIT(12)
2665	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_ATAPI_DEVICE RT_BIT(13)
2666	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SEP_DEVICE RT_BIT(14)
2667
2668	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_LOOP RT_BIT(0)
2669	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNADDRESSABLE RT_BIT(1)
2670	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SAME_SAS_ADDR RT_BIT(2)
2671	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXPANDER_ERROR RT_BIT(3)
2672	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_TIMEOUT RT_BIT(4)
2673	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_OOE RT_BIT(5)
2674	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_IDX RT_BIT(6)
2675	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_FUNC_FAILED RT_BIT(7)
2676	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_CRC_ERROR RT_BIT(8)
2677	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SUBTRSCTIVE_LNK RT_BIT(9)
2678	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_TBL_LNK RT_BIT(10)
2679	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNSUPPORTED_DEV RT_BIT(11)
2680	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MAX_SATA_TGTS RT_BIT(12)
2681	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MULT_CTRLS RT_BIT(13)
2682
2683	/**
2684	* PHY entry for the SAS I/O unit page 1
2685	*/
2686	#pragma pack(1)
2687	typedef struct MptConfigurationPageSASIOUnit1PHY
2688	{
2689	/** Port number */
2690	uint8_t u8Port;
2691	/** Port flags */
2692	uint8_t u8PortFlags;
2693	/** Phy flags */
2694	uint8_t u8PhyFlags;
2695	/** Max link rate */
2696	uint8_t u8MaxMinLinkRate;
2697	/** Controller phy device info */
2698	uint32_t u32ControllerPhyDeviceInfo;
2699	/** Maximum target port connect time */
2700	uint16_t u16MaxTargetPortConnectTime;
2701	/** Reserved */
2702	uint16_t u16Reserved;
2703	} MptConfigurationPageSASIOUnit1PHY, *PMptConfigurationPageSASIOUnit1PHY;
2704	#pragma pack()
2705	AssertCompileSize(MptConfigurationPageSASIOUnit1PHY, 12);
2706
2707	/**
2708	* SAS I/O Unit page 1 - Read/Write
2709	*/
2710	#pragma pack(1)
2711	typedef struct MptConfigurationPageSASIOUnit1
2712	{
2713	/** Union. */
2714	union
2715	{
2716	/** Byte view - variable. */
2717	uint8_t abPageData[1];
2718	/** Field view. */
2719	struct
2720	{
2721	/** The omnipresent header. */
2722	MptExtendedConfigurationPageHeader ExtHeader;
2723	/** Control flags */
2724	uint16_t u16ControlFlags;
2725	/** maximum number of SATA targets */
2726	uint16_t u16MaxNumSATATargets;
2727	/** additional control flags */
2728	uint16_t u16AdditionalControlFlags;
2729	/** Reserved */
2730	uint16_t u16Reserved;
2731	/** Number of PHYs */
2732	uint8_t u8NumPhys;
2733	/** maximum SATA queue depth */
2734	uint8_t u8SATAMaxQDepth;
2735	/** Delay for reporting missing devices. */
2736	uint8_t u8ReportDeviceMissingDelay;
2737	/** I/O device missing delay */
2738	uint8_t u8IODeviceMissingDelay;
2739	/** Content for each physical port - variable depending on the number of ports */
2740	MptConfigurationPageSASIOUnit1PHY aPHY[1];
2741	} fields;
2742	} u;
2743	} MptConfigurationPageSASIOUnit1, *PMptConfigurationPageSASIOUnit1;
2744	#pragma pack()
2745	AssertCompileSize(MptConfigurationPageSASIOUnit1, 8+12+sizeof(MptConfigurationPageSASIOUnit1PHY));
2746
2747	#define LSILOGICSCSI_SASIOUNIT1_GET_SIZE(ports) (sizeof(MptConfigurationPageSASIOUnit1) + ((ports) - 1) * sizeof(MptConfigurationPageSASIOUnit1PHY))
2748
2749	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_CLEAR_SATA_AFFILIATION RT_BIT(0)
2750	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_FIRST_LEVEL_DISCOVERY_ONLY RT_BIT(1)
2751	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SUBTRACTIVE_LNK_ILLEGAL RT_BIT(2)
2752	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_IOC_ENABLE_HIGH_PHY RT_BIT(3)
2753	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED RT_BIT(4)
2754	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED RT_BIT(5)
2755	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED RT_BIT(6)
2756	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LBA48_REQUIRED RT_BIT(7)
2757	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_INIT_POSTPONED RT_BIT(8)
2758
2759	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SET(x) (((x) & 0x3) << 9)
2760	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_GET(x) (((x) >> 9) & 0x3)
2761	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS_AND_SATA 0x00
2762	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS 0x01
2763	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SATA 0x02
2764
2765	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_EXP_ADDR RT_BIT(11)
2766	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SETTINGS_PRESERV_REQUIRED RT_BIT(12)
2767	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_15GB RT_BIT(13)
2768	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_30GB RT_BIT(14)
2769	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SAS_SELF_TEST_ENABLED RT_BIT(15)
2770
2771	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_TBL_LNKS_ALLOW RT_BIT(0)
2772	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_NO_AFFIL RT_BIT(1)
2773	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_SELF_AFFIL RT_BIT(2)
2774	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_OTHER_AFFIL RT_BIT(3)
2775	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_PORT_EN_ONLY RT_BIT(4)
2776	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_HIDE_NON_ZERO_PHYS RT_BIT(5)
2777	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_ASYNC_NOTIF RT_BIT(6)
2778	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_MULT_PORTS_ILL_SAME_DOMAIN RT_BIT(7)
2779
2780	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_UNITS_16_SEC RT_BIT(7)
2781	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_SET(x) ((x) & 0x7F)
2782	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_GET(x) ((x) & 0x7F)
2783
2784	#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_AUTO RT_BIT(0)
2785	#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_IOC1 RT_BIT(2)
2786
2787	#define LSILOGICSCSI_SASIOUNIT1_PHY_RX_INVERT RT_BIT(0)
2788	#define LSILOGICSCSI_SASIOUNIT1_PHY_TX_INVERT RT_BIT(1)
2789	#define LSILOGICSCSI_SASIOUNIT1_PHY_DISABLE RT_BIT(2)
2790
2791	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_SET(x) ((x) & 0x0F)
2792	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_GET(x) ((x) & 0x0F)
2793	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_SET(x) (((x) & 0x0F) << 4)
2794	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_GET(x) ((x >> 4) & 0x0F)
2795	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_15GB 0x8
2796	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_30GB 0x9
2797
2798	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_SET(x) ((x) & 0x3)
2799	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_GET(x) ((x) & 0x3)
2800	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_NO 0x0
2801	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_END 0x1
2802	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_EDGE_EXPANDER 0x2
2803	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2804	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_INITIATOR RT_BIT(4)
2805	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_INITIATOR RT_BIT(5)
2806	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_INITIATOR RT_BIT(6)
2807	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_TARGET RT_BIT(8)
2808	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_TARGET RT_BIT(9)
2809	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_TARGET RT_BIT(10)
2810	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2811	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_LSI RT_BIT(12)
2812	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_ATAPI RT_BIT(13)
2813	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SEP RT_BIT(14)
2814
2815	/**
2816	* SAS I/O unit page 2 - Read/Write
2817	*/
2818	#pragma pack(1)
2819	typedef struct MptConfigurationPageSASIOUnit2
2820	{
2821	/** Union. */
2822	union
2823	{
2824	/** Byte view - variable. */
2825	uint8_t abPageData[1];
2826	/** Field view. */
2827	struct
2828	{
2829	/** The omnipresent header. */
2830	MptExtendedConfigurationPageHeader ExtHeader;
2831	/** Device numbers per enclosure */
2832	uint8_t u8NumDevsPerEnclosure;
2833	/** Boot device wait time */
2834	uint8_t u8BootDeviceWaitTime;
2835	/** Reserved */
2836	uint16_t u16Reserved;
2837	/** Maximum number of persistent Bus and target ID mappings */
2838	uint16_t u16MaxPersistentIDs;
2839	/** Number of persistent IDs used */
2840	uint16_t u16NumPersistentIDsUsed;
2841	/** Status */
2842	uint8_t u8Status;
2843	/** Flags */
2844	uint8_t u8Flags;
2845	/** Maximum number of physical mapped IDs */
2846	uint16_t u16MaxNumPhysicalMappedIDs;
2847	} fields;
2848	} u;
2849	} MptConfigurationPageSASIOUnit2, *PMptConfigurationPageSASIOUnit2;
2850	#pragma pack()
2851	AssertCompileSize(MptConfigurationPageSASIOUnit2, 20);
2852
2853	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_TBL_FULL RT_BIT(0)
2854	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_DISABLED RT_BIT(1)
2855	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_ENC_DEV_UNMAPPED RT_BIT(2)
2856	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_DEV_LIMIT_EXCEEDED RT_BIT(3)
2857
2858	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_MAP_DISABLE RT_BIT(0)
2859	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_SET(x) ((x & 0x7) << 1)
2860	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_GET(x) ((x >> 1) & 0x7)
2861	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_NO 0x0
2862	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_DIRECT_ATTACHED 0x1
2863	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_ENC 0x2
2864	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_HOST 0x7
2865	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_RESERVE_TARGET_ID_ZERO RT_BIT(4)
2866	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_START_SLOT_NUMBER_ONE RT_BIT(5)
2867
2868	/**
2869	* SAS I/O unit page 3 - Read/Write
2870	*/
2871	#pragma pack(1)
2872	typedef struct MptConfigurationPageSASIOUnit3
2873	{
2874	/** Union. */
2875	union
2876	{
2877	/** Byte view - variable. */
2878	uint8_t abPageData[1];
2879	/** Field view. */
2880	struct
2881	{
2882	/** The omnipresent header. */
2883	MptExtendedConfigurationPageHeader ExtHeader;
2884	/** Reserved */
2885	uint32_t u32Reserved;
2886	uint32_t u32MaxInvalidDwordCount;
2887	uint32_t u32InvalidDwordCountTime;
2888	uint32_t u32MaxRunningDisparityErrorCount;
2889	uint32_t u32RunningDisparityErrorTime;
2890	uint32_t u32MaxLossDwordSynchCount;
2891	uint32_t u32LossDwordSynchCountTime;
2892	uint32_t u32MaxPhysResetProblemCount;
2893	uint32_t u32PhyResetProblemTime;
2894	} fields;
2895	} u;
2896	} MptConfigurationPageSASIOUnit3, *PMptConfigurationPageSASIOUnit3;
2897	#pragma pack()
2898	AssertCompileSize(MptConfigurationPageSASIOUnit3, 44);
2899
2900	/**
2901	* SAS PHY page 0 - Readonly
2902	*/
2903	#pragma pack(1)
2904	typedef struct MptConfigurationPageSASPHY0
2905	{
2906	/** Union. */
2907	union
2908	{
2909	/** Byte view - variable. */
2910	uint8_t abPageData[1];
2911	/** Field view. */
2912	struct
2913	{
2914	/** The omnipresent header. */
2915	MptExtendedConfigurationPageHeader ExtHeader;
2916	/** Owner dev handle. */
2917	uint16_t u16OwnerDevHandle;
2918	/** Reserved */
2919	uint16_t u16Reserved0;
2920	/** SAS address */
2921	SASADDRESS SASAddress;
2922	/** Attached device handle */
2923	uint16_t u16AttachedDevHandle;
2924	/** Attached phy identifier */
2925	uint8_t u8AttachedPhyIdentifier;
2926	/** Reserved */
2927	uint8_t u8Reserved1;
2928	/** Attached device information */
2929	uint32_t u32AttachedDeviceInfo;
2930	/** Programmed link rate */
2931	uint8_t u8ProgrammedLinkRate;
2932	/** Hardware link rate */
2933	uint8_t u8HwLinkRate;
2934	/** Change count */
2935	uint8_t u8ChangeCount;
2936	/** Flags */
2937	uint8_t u8Flags;
2938	/** Phy information */
2939	uint32_t u32PhyInfo;
2940	} fields;
2941	} u;
2942	} MptConfigurationPageSASPHY0, *PMptConfigurationPageSASPHY0;
2943	#pragma pack()
2944	AssertCompileSize(MptConfigurationPageSASPHY0, 36);
2945
2946	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
2947	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
2948	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_NO 0x0
2949	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_END 0x1
2950	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
2951	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2952	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
2953	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
2954	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
2955	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
2956	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
2957	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
2958	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2959	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_LSI RT_BIT(12)
2960	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
2961	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SEP RT_BIT(14)
2962
2963	/**
2964	* SAS PHY page 1 - Readonly
2965	*/
2966	#pragma pack(1)
2967	typedef struct MptConfigurationPageSASPHY1
2968	{
2969	/** Union. */
2970	union
2971	{
2972	/** Byte view - variable. */
2973	uint8_t abPageData[1];
2974	/** Field view. */
2975	struct
2976	{
2977	/** The omnipresent header. */
2978	MptExtendedConfigurationPageHeader ExtHeader;
2979	/** Reserved */
2980	uint32_t u32Reserved0;
2981	uint32_t u32InvalidDwordCound;
2982	uint32_t u32RunningDisparityErrorCount;
2983	uint32_t u32LossDwordSynchCount;
2984	uint32_t u32PhyResetProblemCount;
2985	} fields;
2986	} u;
2987	} MptConfigurationPageSASPHY1, *PMptConfigurationPageSASPHY1;
2988	#pragma pack()
2989	AssertCompileSize(MptConfigurationPageSASPHY1, 28);
2990
2991	/**
2992	* SAS Device page 0 - Readonly
2993	*/
2994	#pragma pack(1)
2995	typedef struct MptConfigurationPageSASDevice0
2996	{
2997	/** Union. */
2998	union
2999	{
3000	/** Byte view - variable. */
3001	uint8_t abPageData[1];
3002	/** Field view. */
3003	struct
3004	{
3005	/** The omnipresent header. */
3006	MptExtendedConfigurationPageHeader ExtHeader;
3007	/** Slot number */
3008	uint16_t u16Slot;
3009	/** Enclosure handle. */
3010	uint16_t u16EnclosureHandle;
3011	/** SAS address */
3012	SASADDRESS SASAddress;
3013	/** Parent device handle */
3014	uint16_t u16ParentDevHandle;
3015	/** Phy number */
3016	uint8_t u8PhyNum;
3017	/** Access status */
3018	uint8_t u8AccessStatus;
3019	/** Device handle */
3020	uint16_t u16DevHandle;
3021	/** Target ID */
3022	uint8_t u8TargetID;
3023	/** Bus */
3024	uint8_t u8Bus;
3025	/** Device info */
3026	uint32_t u32DeviceInfo;
3027	/** Flags */
3028	uint16_t u16Flags;
3029	/** Physical port */
3030	uint8_t u8PhysicalPort;
3031	/** Reserved */
3032	uint8_t u8Reserved0;
3033	} fields;
3034	} u;
3035	} MptConfigurationPageSASDevice0, *PMptConfigurationPageSASDevice0;
3036	#pragma pack()
3037	AssertCompileSize(MptConfigurationPageSASDevice0, 36);
3038
3039	#define LSILOGICSCSI_SASDEVICE0_STATUS_NO_ERRORS (0x00)
3040
3041	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
3042	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
3043	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_NO 0x0
3044	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_END 0x1
3045	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
3046	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
3047	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
3048	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
3049	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
3050	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
3051	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
3052	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
3053	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
3054	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_LSI RT_BIT(12)
3055	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
3056	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SEP RT_BIT(14)
3057
3058	#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_PRESENT (RT_BIT(0))
3059	#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPED_TO_BUS_AND_TARGET_ID (RT_BIT(1))
3060	#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPING_PERSISTENT (RT_BIT(2))
3061
3062	/**
3063	* SAS Device page 1 - Readonly
3064	*/
3065	#pragma pack(1)
3066	typedef struct MptConfigurationPageSASDevice1
3067	{
3068	/** Union. */
3069	union
3070	{
3071	/** Byte view - variable. */
3072	uint8_t abPageData[1];
3073	/** Field view. */
3074	struct
3075	{
3076	/** The omnipresent header. */
3077	MptExtendedConfigurationPageHeader ExtHeader;
3078	/** Reserved */
3079	uint32_t u32Reserved0;
3080	/** SAS address */
3081	SASADDRESS SASAddress;
3082	/** Reserved */
3083	uint32_t u32Reserved;
3084	/** Device handle */
3085	uint16_t u16DevHandle;
3086	/** Target ID */
3087	uint8_t u8TargetID;
3088	/** Bus */
3089	uint8_t u8Bus;
3090	/** Initial REgister device FIS */
3091	uint32_t au32InitialRegDeviceFIS[5];
3092	} fields;
3093	} u;
3094	} MptConfigurationPageSASDevice1, *PMptConfigurationPageSASDevice1;
3095	#pragma pack()
3096	AssertCompileSize(MptConfigurationPageSASDevice1, 48);
3097
3098	/**
3099	* SAS Device page 2 - Read/Write persistent
3100	*/
3101	#pragma pack(1)
3102	typedef struct MptConfigurationPageSASDevice2
3103	{
3104	/** Union. */
3105	union
3106	{
3107	/** Byte view - variable. */
3108	uint8_t abPageData[1];
3109	/** Field view. */
3110	struct
3111	{
3112	/** The omnipresent header. */
3113	MptExtendedConfigurationPageHeader ExtHeader;
3114	/** Physical identifier */
3115	SASADDRESS SASAddress;
3116	/** Enclosure mapping */
3117	uint32_t u32EnclosureMapping;
3118	} fields;
3119	} u;
3120	} MptConfigurationPageSASDevice2, *PMptConfigurationPageSASDevice2;
3121	#pragma pack()
3122	AssertCompileSize(MptConfigurationPageSASDevice2, 20);
3123
3124	/**
3125	* A device entitiy containing all pages.
3126	*/
3127	typedef struct MptSASDevice
3128	{
3129	/** Pointer to the next device if any. */
3130	struct MptSASDevice *pNext;
3131	/** Pointer to the previous device if any. */
3132	struct MptSASDevice *pPrev;
3133
3134	MptConfigurationPageSASDevice0 SASDevicePage0;
3135	MptConfigurationPageSASDevice1 SASDevicePage1;
3136	MptConfigurationPageSASDevice2 SASDevicePage2;
3137	} MptSASDevice, *PMptSASDevice;
3138
3139	/**
3140	* SAS Expander page 0 - Readonly
3141	*/
3142	#pragma pack(1)
3143	typedef struct MptConfigurationPageSASExpander0
3144	{
3145	/** Union. */
3146	union
3147	{
3148	/** Byte view - variable. */
3149	uint8_t abPageData[1];
3150	/** Field view. */
3151	struct
3152	{
3153	/** The omnipresent header. */
3154	MptExtendedConfigurationPageHeader ExtHeader;
3155	/** Physical port */
3156	uint8_t u8PhysicalPort;
3157	/** Reserved */
3158	uint8_t u8Reserved0;
3159	/** Enclosure handle */
3160	uint16_t u16EnclosureHandle;
3161	/** SAS address */
3162	SASADDRESS SASAddress;
3163	/** Discovery status */
3164	uint32_t u32DiscoveryStatus;
3165	/** Device handle. */
3166	uint16_t u16DevHandle;
3167	/** Parent device handle */
3168	uint16_t u16ParentDevHandle;
3169	/** Expander change count */
3170	uint16_t u16ExpanderChangeCount;
3171	/** Expander route indexes */
3172	uint16_t u16ExpanderRouteIndexes;
3173	/** Number of PHys in this expander */
3174	uint8_t u8NumPhys;
3175	/** SAS level */
3176	uint8_t u8SASLevel;
3177	/** Flags */
3178	uint8_t u8Flags;
3179	/** Reserved */
3180	uint8_t u8Reserved1;
3181	} fields;
3182	} u;
3183	} MptConfigurationPageSASExpander0, *PMptConfigurationPageSASExpander0;
3184	#pragma pack()
3185	AssertCompileSize(MptConfigurationPageSASExpander0, 36);
3186
3187	/**
3188	* SAS Expander page 1 - Readonly
3189	*/
3190	#pragma pack(1)
3191	typedef struct MptConfigurationPageSASExpander1
3192	{
3193	/** Union. */
3194	union
3195	{
3196	/** Byte view - variable. */
3197	uint8_t abPageData[1];
3198	/** Field view. */
3199	struct
3200	{
3201	/** The omnipresent header. */
3202	MptExtendedConfigurationPageHeader ExtHeader;
3203	/** Physical port */
3204	uint8_t u8PhysicalPort;
3205	/** Reserved */
3206	uint8_t u8Reserved0[3];
3207	/** Number of PHYs */
3208	uint8_t u8NumPhys;
3209	/** Number of the Phy the information in this page is for. */
3210	uint8_t u8Phy;
3211	/** Number of routing table entries */
3212	uint16_t u16NumTableEntriesProgrammed;
3213	/** Programmed link rate */
3214	uint8_t u8ProgrammedLinkRate;
3215	/** Hardware link rate */
3216	uint8_t u8HwLinkRate;
3217	/** Attached device handle */
3218	uint16_t u16AttachedDevHandle;
3219	/** Phy information */
3220	uint32_t u32PhyInfo;
3221	/** Attached device information */
3222	uint32_t u32AttachedDeviceInfo;
3223	/** Owner device handle. */
3224	uint16_t u16OwnerDevHandle;
3225	/** Change count */
3226	uint8_t u8ChangeCount;
3227	/** Negotiated link rate */
3228	uint8_t u8NegotiatedLinkRate;
3229	/** Phy identifier */
3230	uint8_t u8PhyIdentifier;
3231	/** Attached phy identifier */
3232	uint8_t u8AttachedPhyIdentifier;
3233	/** Reserved */
3234	uint8_t u8Reserved1;
3235	/** Discovery information */
3236	uint8_t u8DiscoveryInfo;
3237	/** Reserved */
3238	uint32_t u32Reserved;
3239	} fields;
3240	} u;
3241	} MptConfigurationPageSASExpander1, *PMptConfigurationPageSASExpander1;
3242	#pragma pack()
3243	AssertCompileSize(MptConfigurationPageSASExpander1, 40);
3244
3245	/**
3246	* Structure of all supported pages for the SCSI SPI controller.
3247	* Used to load the device state from older versions.
3248	*/
3249	typedef struct MptConfigurationPagesSupported_SSM_V2
3250	{
3251	MptConfigurationPageManufacturing0 ManufacturingPage0;
3252	MptConfigurationPageManufacturing1 ManufacturingPage1;
3253	MptConfigurationPageManufacturing2 ManufacturingPage2;
3254	MptConfigurationPageManufacturing3 ManufacturingPage3;
3255	MptConfigurationPageManufacturing4 ManufacturingPage4;
3256	MptConfigurationPageIOUnit0 IOUnitPage0;
3257	MptConfigurationPageIOUnit1 IOUnitPage1;
3258	MptConfigurationPageIOUnit2 IOUnitPage2;
3259	MptConfigurationPageIOUnit3 IOUnitPage3;
3260	MptConfigurationPageIOC0 IOCPage0;
3261	MptConfigurationPageIOC1 IOCPage1;
3262	MptConfigurationPageIOC2 IOCPage2;
3263	MptConfigurationPageIOC3 IOCPage3;
3264	MptConfigurationPageIOC4 IOCPage4;
3265	MptConfigurationPageIOC6 IOCPage6;
3266	struct
3267	{
3268	MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
3269	MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
3270	MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
3271	} aPortPages[1]; /* Currently only one port supported. */
3272	struct
3273	{
3274	struct
3275	{
3276	MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
3277	MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
3278	MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
3279	MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
3280	} aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
3281	} aBuses[1]; /* Only one bus at the moment. */
3282	} MptConfigurationPagesSupported_SSM_V2, *PMptConfigurationPagesSupported_SSM_V2;
3283
3284	typedef struct MptConfigurationPagesSpi
3285	{
3286	struct
3287	{
3288	MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
3289	MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
3290	MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
3291	} aPortPages[1]; /* Currently only one port supported. */
3292	struct
3293	{
3294	struct
3295	{
3296	MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
3297	MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
3298	MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
3299	MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
3300	} aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
3301	} aBuses[1]; /* Only one bus at the moment. */
3302	} MptConfigurationPagesSpi, *PMptConfigurationPagesSpi;
3303
3304	typedef struct MptPHY
3305	{
3306	MptConfigurationPageSASPHY0 SASPHYPage0;
3307	MptConfigurationPageSASPHY1 SASPHYPage1;
3308	} MptPHY, *PMptPHY;
3309
3310	#pragma pack(1)
3311	typedef struct MptConfigurationPagesSas
3312	{
3313	/** Size of the manufacturing page 7 */
3314	uint32_t cbManufacturingPage7;
3315	/** Pointer to the manufacturing page 7 */
3316	PMptConfigurationPageManufacturing7 pManufacturingPage7;
3317	/** Size of the I/O unit page 0 */
3318	uint32_t cbSASIOUnitPage0;
3319	/** Pointer to the I/O unit page 0 */
3320	PMptConfigurationPageSASIOUnit0 pSASIOUnitPage0;
3321	/** Size of the I/O unit page 1 */
3322	uint32_t cbSASIOUnitPage1;
3323	/** Pointer to the I/O unit page 1 */
3324	PMptConfigurationPageSASIOUnit1 pSASIOUnitPage1;
3325	/** I/O unit page 2 */
3326	MptConfigurationPageSASIOUnit2 SASIOUnitPage2;
3327	/** I/O unit page 3 */
3328	MptConfigurationPageSASIOUnit3 SASIOUnitPage3;
3329
3330	/** Number of PHYs in the array. */
3331	uint32_t cPHYs;
3332	/** Pointer to an array of per PHYS pages. */
3333	R3PTRTYPE(PMptPHY) paPHYs;
3334
3335	/** Number of devices detected. */
3336	uint32_t cDevices;
3337	/** Pointer to the first SAS device. */
3338	R3PTRTYPE(PMptSASDevice) pSASDeviceHead;
3339	/** Pointer to the last SAS device. */
3340	R3PTRTYPE(PMptSASDevice) pSASDeviceTail;
3341	} MptConfigurationPagesSas, *PMptConfigurationPagesSas;
3342	#pragma pack()
3343
3344	/**
3345	* Structure of all supported pages for both controllers.
3346	*/
3347	typedef struct MptConfigurationPagesSupported
3348	{
3349	MptConfigurationPageManufacturing0 ManufacturingPage0;
3350	MptConfigurationPageManufacturing1 ManufacturingPage1;
3351	MptConfigurationPageManufacturing2 ManufacturingPage2;
3352	MptConfigurationPageManufacturing3 ManufacturingPage3;
3353	MptConfigurationPageManufacturing4 ManufacturingPage4;
3354	MptConfigurationPageManufacturing5 ManufacturingPage5;
3355	MptConfigurationPageManufacturing6 ManufacturingPage6;
3356	MptConfigurationPageManufacturing8 ManufacturingPage8;
3357	MptConfigurationPageManufacturing9 ManufacturingPage9;
3358	MptConfigurationPageManufacturing10 ManufacturingPage10;
3359	MptConfigurationPageIOUnit0 IOUnitPage0;
3360	MptConfigurationPageIOUnit1 IOUnitPage1;
3361	MptConfigurationPageIOUnit2 IOUnitPage2;
3362	MptConfigurationPageIOUnit3 IOUnitPage3;
3363	MptConfigurationPageIOUnit4 IOUnitPage4;
3364	MptConfigurationPageIOC0 IOCPage0;
3365	MptConfigurationPageIOC1 IOCPage1;
3366	MptConfigurationPageIOC2 IOCPage2;
3367	MptConfigurationPageIOC3 IOCPage3;
3368	MptConfigurationPageIOC4 IOCPage4;
3369	MptConfigurationPageIOC6 IOCPage6;
3370	/* BIOS page 0 is not described */
3371	MptConfigurationPageBIOS1 BIOSPage1;
3372	MptConfigurationPageBIOS2 BIOSPage2;
3373	/* BIOS page 3 is not described */
3374	MptConfigurationPageBIOS4 BIOSPage4;
3375
3376	/** Controller dependent data. */
3377	union
3378	{
3379	MptConfigurationPagesSpi SpiPages;
3380	MptConfigurationPagesSas SasPages;
3381	} u;
3382	} MptConfigurationPagesSupported, *PMptConfigurationPagesSupported;
3383
3384	/**
3385	* Initializes a page header.
3386	*/
3387	#define MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags) \
3388	(pg)->u.fields.Header.u8PageType = flags; \
3389	(pg)->u.fields.Header.u8PageNumber = nr; \
3390	(pg)->u.fields.Header.u8PageLength = sizeof(type) / 4
3391
3392	#define MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(pg, type, nr, flags) \
3393	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING)
3394
3395	#define MPT_CONFIG_PAGE_HEADER_INIT_IO_UNIT(pg, type, nr, flags) \
3396	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT)
3397
3398	#define MPT_CONFIG_PAGE_HEADER_INIT_IOC(pg, type, nr, flags) \
3399	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_IOC)
3400
3401	#define MPT_CONFIG_PAGE_HEADER_INIT_BIOS(pg, type, nr, flags) \
3402	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_BIOS)
3403
3404	/**
3405	* Initializes a extended page header.
3406	*/
3407	#define MPT_CONFIG_EXTENDED_PAGE_HEADER_INIT(pg, cb, nr, flags, exttype) \
3408	(pg)->u.fields.ExtHeader.u8PageType = flags \| MPT_CONFIGURATION_PAGE_TYPE_EXTENDED; \
3409	(pg)->u.fields.ExtHeader.u8PageNumber = nr; \
3410	(pg)->u.fields.ExtHeader.u8ExtPageType = exttype; \
3411	(pg)->u.fields.ExtHeader.u16ExtPageLength = cb / 4
3412
3413	/**
3414	* Possible SG element types.
3415	*/
3416	enum MPTSGENTRYTYPE
3417	{
3418	MPTSGENTRYTYPE_TRANSACTION_CONTEXT = 0x00,
3419	MPTSGENTRYTYPE_SIMPLE = 0x01,
3420	MPTSGENTRYTYPE_CHAIN = 0x03
3421	};
3422
3423	/**
3424	* Register interface.
3425	*/
3426
3427	/**
3428	* Defined states that the SCSI controller can have.
3429	*/
3430	typedef enum LSILOGICSTATE
3431	{
3432	/** Reset state. */
3433	LSILOGICSTATE_RESET = 0x00,
3434	/** Ready state. */
3435	LSILOGICSTATE_READY = 0x01,
3436	/** Operational state. */
3437	LSILOGICSTATE_OPERATIONAL = 0x02,
3438	/** Fault state. */
3439	LSILOGICSTATE_FAULT = 0x04,
3440	/** 32bit size hack */
3441	LSILOGICSTATE_32BIT_HACK = 0x7fffffff
3442	} LSILOGICSTATE;
3443
3444	/**
3445	* Which entity needs to initialize the controller
3446	* to get into the operational state.
3447	*/
3448	typedef enum LSILOGICWHOINIT
3449	{
3450	/** Not initialized. */
3451	LSILOGICWHOINIT_NOT_INITIALIZED = 0x00,
3452	/** System BIOS. */
3453	LSILOGICWHOINIT_SYSTEM_BIOS = 0x01,
3454	/** ROM Bios. */
3455	LSILOGICWHOINIT_ROM_BIOS = 0x02,
3456	/** PCI Peer. */
3457	LSILOGICWHOINIT_PCI_PEER = 0x03,
3458	/** Host driver. */
3459	LSILOGICWHOINIT_HOST_DRIVER = 0x04,
3460	/** Manufacturing. */
3461	LSILOGICWHOINIT_MANUFACTURING = 0x05,
3462	/** 32bit size hack. */
3463	LSILOGICWHOINIT_32BIT_HACK = 0x7fffffff
3464	} LSILOGICWHOINIT;
3465
3466
3467	/**
3468	* IOC status codes.
3469	*/
3470	#define LSILOGIC_IOCSTATUS_SUCCESS 0x0000
3471	#define LSILOGIC_IOCSTATUS_INVALID_FUNCTION 0x0001
3472	#define LSILOGIC_IOCSTATUS_BUSY 0x0002
3473	#define LSILOGIC_IOCSTATUS_INVALID_SGL 0x0003
3474	#define LSILOGIC_IOCSTATUS_INTERNAL_ERROR 0x0004
3475	#define LSILOGIC_IOCSTATUS_RESERVED 0x0005
3476	#define LSILOGIC_IOCSTATUS_INSUFFICIENT_RESOURCES 0x0006
3477	#define LSILOGIC_IOCSTATUS_INVALID_FIELD 0x0007
3478	#define LSILOGIC_IOCSTATUS_INVALID_STATE 0x0008
3479	#define LSILOGIC_IOCSTATUS_OP_STATE_NOT_SUPPOTED 0x0009
3480
3481	/**
3482	* Size of the I/O and MMIO space.
3483	*/
3484	#define LSILOGIC_PCI_SPACE_IO_SIZE 256
3485	#define LSILOGIC_PCI_SPACE_MEM_SIZE 128 * _1K
3486
3487	/**
3488	* Doorbell register - Used to get the status of the controller and
3489	* initialise it.
3490	*/
3491	#define LSILOGIC_REG_DOORBELL 0x00
3492	# define LSILOGIC_REG_DOORBELL_SET_STATE(enmState) (((enmState) & 0x0f) << 28)
3493	# define LSILOGIC_REG_DOORBELL_SET_USED(fUsed) (((fUsed) ? 1 : 0) << 27)
3494	# define LSILOGIC_REG_DOORBELL_SET_WHOINIT(enmWhoInit) (((enmWhoInit) & 0x07) << 24)
3495	# define LSILOGIC_REG_DOORBELL_SET_FAULT_CODE(u16Code) (u16Code)
3496	# define LSILOGIC_REG_DOORBELL_GET_FUNCTION(x) (((x) & 0xff000000) >> 24)
3497	# define LSILOGIC_REG_DOORBELL_GET_SIZE(x) (((x) & 0x00ff0000) >> 16)
3498
3499	/**
3500	* Functions which can be passed through the system doorbell.
3501	*/
3502	#define LSILOGIC_DOORBELL_FUNCTION_IOC_MSG_UNIT_RESET 0x40
3503	#define LSILOGIC_DOORBELL_FUNCTION_IO_UNIT_RESET 0x41
3504	#define LSILOGIC_DOORBELL_FUNCTION_HANDSHAKE 0x42
3505	#define LSILOGIC_DOORBELL_FUNCTION_REPLY_FRAME_REMOVAL 0x43
3506
3507	/**
3508	* Write sequence register for the diagnostic register.
3509	*/
3510	#define LSILOGIC_REG_WRITE_SEQUENCE 0x04
3511
3512	/**
3513	* Diagnostic register - used to reset the controller.
3514	*/
3515	#define LSILOGIC_REG_HOST_DIAGNOSTIC 0x08
3516	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_MEM_ENABLE (RT_BIT(0))
3517	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DISABLE_ARM (RT_BIT(1))
3518	# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_ADAPTER (RT_BIT(2))
3519	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_RW_ENABLE (RT_BIT(4))
3520	# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_HISTORY (RT_BIT(5))
3521	# define LSILOGIC_REG_HOST_DIAGNOSTIC_FLASH_BAD_SIG (RT_BIT(6))
3522	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DRWE (RT_BIT(7))
3523	# define LSILOGIC_REG_HOST_DIAGNOSTIC_PREVENT_IOC_BOOT (RT_BIT(9))
3524	# define LSILOGIC_REG_HOST_DIAGNOSTIC_CLEAR_FLASH_BAD_SIG (RT_BIT(10))
3525
3526	#define LSILOGIC_REG_TEST_BASE_ADDRESS 0x0c
3527	#define LSILOGIC_REG_DIAG_RW_DATA 0x10
3528	#define LSILOGIC_REG_DIAG_RW_ADDRESS 0x14
3529
3530	/**
3531	* Interrupt status register.
3532	*/
3533	#define LSILOGIC_REG_HOST_INTR_STATUS 0x30
3534	# define LSILOGIC_REG_HOST_INTR_STATUS_W_MASK (RT_BIT(3))
3535	# define LSILOGIC_REG_HOST_INTR_STATUS_DOORBELL_STS (RT_BIT(31))
3536	# define LSILOGIC_REG_HOST_INTR_STATUS_REPLY_INTR (RT_BIT(3))
3537	# define LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL (RT_BIT(0))
3538
3539	/**
3540	* Interrupt mask register.
3541	*/
3542	#define LSILOGIC_REG_HOST_INTR_MASK 0x34
3543	# define LSILOGIC_REG_HOST_INTR_MASK_W_MASK (RT_BIT(0) \| RT_BIT(3) \| RT_BIT(8) \| RT_BIT(9))
3544	# define LSILOGIC_REG_HOST_INTR_MASK_IRQ_ROUTING (RT_BIT(8) \| RT_BIT(9))
3545	# define LSILOGIC_REG_HOST_INTR_MASK_DOORBELL RT_BIT(0)
3546	# define LSILOGIC_REG_HOST_INTR_MASK_REPLY RT_BIT(3)
3547
3548	/**
3549	* Queue registers.
3550	*/
3551	#define LSILOGIC_REG_REQUEST_QUEUE 0x40
3552	#define LSILOGIC_REG_REPLY_QUEUE 0x44
3553
3554	#endif /* __DEVLSILOGICSCSI_H__ */

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source: vbox/trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.h@ 44004

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