DevLsiLogicSCSI.h@ 40257

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1	/* $Id: DevLsiLogicSCSI.h 33540 2010-10-28 09:27:05Z vboxsync $ */
2	/** @file
3	* VBox storage devices: LsiLogic LSI53c1030 SCSI controller - Defines and structures.
4	*/
5
6	/*
7	* Copyright (C) 2006-2009 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17	#ifndef __DEVLSILOGICSCSI_H__
18	#define __DEVLSILOGICSCSI_H__
19
20	#include <iprt/stdint.h>
21
22	/*
23	* I/O port registered in the ISA compatible range to let the BIOS access
24	* the controller.
25	*/
26	#define LSILOGIC_ISA_IO_PORT 0x340
27	#define LSILOGIC_SAS_ISA_IO_PORT 0x350
28
29	#define LSILOGICSCSI_REQUEST_QUEUE_DEPTH_DEFAULT 256
30	#define LSILOGICSCSI_REPLY_QUEUE_DEPTH_DEFAULT 256
31
32	#define LSILOGICSCSI_MAXIMUM_CHAIN_DEPTH 3
33
34	#define LSILOGIC_NR_OF_ALLOWED_BIGGER_LISTS 100
35
36	/** Equal for all devices */
37	#define LSILOGICSCSI_PCI_VENDOR_ID (0x1000)
38
39	/** SPI SCSI controller (LSI53C1030) */
40	#define LSILOGICSCSI_PCI_SPI_CTRLNAME "LSI53C1030"
41	#define LSILOGICSCSI_PCI_SPI_DEVICE_ID (0x0030)
42	#define LSILOGICSCSI_PCI_SPI_REVISION_ID (0x00)
43	#define LSILOGICSCSI_PCI_SPI_CLASS_CODE (0x01)
44	#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_VENDOR_ID (0x1000)
45	#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_ID (0x8000)
46	#define LSILOGICSCSI_PCI_SPI_PORTS_MAX 1
47	#define LSILOGICSCSI_PCI_SPI_BUSES_MAX 1
48	#define LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX 16
49	#define LSILOGICSCSI_PCI_SPI_DEVICES_MAX (LSILOGICSCSI_PCI_SPI_BUSES_MAX*LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX)
50
51	/** SAS SCSI controller (SAS1068 PCI-X Fusion-MPT SAS) */
52	#define LSILOGICSCSI_PCI_SAS_CTRLNAME "SAS1068"
53	#define LSILOGICSCSI_PCI_SAS_DEVICE_ID (0x0054)
54	#define LSILOGICSCSI_PCI_SAS_REVISION_ID (0x00)
55	#define LSILOGICSCSI_PCI_SAS_CLASS_CODE (0x00)
56	#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_VENDOR_ID (0x1000)
57	#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_ID (0x8000)
58	#define LSILOGICSCSI_PCI_SAS_PORTS_MAX 256
59	#define LSILOGICSCSI_PCI_SAS_PORTS_DEFAULT 8
60	#define LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX 1
61	#define LSILOGICSCSI_PCI_SAS_DEVICES_MAX (LSILOGICSCSI_PCI_SAS_PORTS_MAX * LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX)
62
63	/**
64	* A SAS address.
65	*/
66	#pragma pack(1)
67	typedef union SASADDRESS
68	{
69	/** 64bit view. */
70	uint64_t u64Address;
71	/** 32bit view. */
72	uint32_t u32Address[2];
73	/** 16bit view. */
74	uint16_t u16Address[4];
75	/** Byte view. */
76	uint8_t u8Address[8];
77	} SASADDRESS, *PSASADDRESS;
78	#pragma pack()
79	AssertCompileSize(SASADDRESS, 8);
80
81	/**
82	* Possible device types we support.
83	*/
84	typedef enum LSILOGICCTRLTYPE
85	{
86	/** SPI SCSI controller (PCI dev id 0x0030) */
87	LSILOGICCTRLTYPE_SCSI_SPI = 0,
88	/** SAS SCSI controller (PCI dev id 0x0054) */
89	LSILOGICCTRLTYPE_SCSI_SAS = 1,
90	/** 32bit hack */
91	LSILOGICCTRLTYPE_32BIT_HACK = 0x7fffffff
92	} LSILOGICCTRLTYPE, *PLSILOGICCTRLTYPE;
93
94	/**
95	* A simple SG element for a 64bit address.
96	*/
97	#pragma pack(1)
98	typedef struct MptSGEntrySimple64
99	{
100	/** Length of the buffer this entry describes. */
101	unsigned u24Length: 24;
102	/** Flag whether this element is the end of the list. */
103	unsigned fEndOfList: 1;
104	/** Flag whether the address is 32bit or 64bits wide. */
105	unsigned f64BitAddress: 1;
106	/** Flag whether this buffer contains data to be transferred or is the destination. */
107	unsigned fBufferContainsData: 1;
108	/** Flag whether this is a local address or a system address. */
109	unsigned fLocalAddress: 1;
110	/** Element type. */
111	unsigned u2ElementType: 2;
112	/** Flag whether this is the last element of the buffer. */
113	unsigned fEndOfBuffer: 1;
114	/** Flag whether this is the last element of the current segment. */
115	unsigned fLastElement: 1;
116	/** Lower 32bits of the address of the data buffer. */
117	unsigned u32DataBufferAddressLow: 32;
118	/** Upper 32bits of the address of the data buffer. */
119	unsigned u32DataBufferAddressHigh: 32;
120	} MptSGEntrySimple64, *PMptSGEntrySimple64;
121	#pragma pack()
122	AssertCompileSize(MptSGEntrySimple64, 12);
123
124	/**
125	* A simple SG element for a 32bit address.
126	*/
127	#pragma pack(1)
128	typedef struct MptSGEntrySimple32
129	{
130	/** Length of the buffer this entry describes. */
131	unsigned u24Length: 24;
132	/** Flag whether this element is the end of the list. */
133	unsigned fEndOfList: 1;
134	/** Flag whether the address is 32bit or 64bits wide. */
135	unsigned f64BitAddress: 1;
136	/** Flag whether this buffer contains data to be transferred or is the destination. */
137	unsigned fBufferContainsData: 1;
138	/** Flag whether this is a local address or a system address. */
139	unsigned fLocalAddress: 1;
140	/** Element type. */
141	unsigned u2ElementType: 2;
142	/** Flag whether this is the last element of the buffer. */
143	unsigned fEndOfBuffer: 1;
144	/** Flag whether this is the last element of the current segment. */
145	unsigned fLastElement: 1;
146	/** Lower 32bits of the address of the data buffer. */
147	unsigned u32DataBufferAddressLow: 32;
148	} MptSGEntrySimple32, *PMptSGEntrySimple32;
149	#pragma pack()
150	AssertCompileSize(MptSGEntrySimple32, 8);
151
152	/**
153	* A chain SG element.
154	*/
155	#pragma pack(1)
156	typedef struct MptSGEntryChain
157	{
158	/** Size of the segment. */
159	unsigned u16Length: 16;
160	/** Offset in 32bit words of the next chain element in the segment
161	* identified by this element. */
162	unsigned u8NextChainOffset: 8;
163	/** Reserved. */
164	unsigned fReserved0: 1;
165	/** Flag whether the address is 32bit or 64bits wide. */
166	unsigned f64BitAddress: 1;
167	/** Reserved. */
168	unsigned fReserved1: 1;
169	/** Flag whether this is a local address or a system address. */
170	unsigned fLocalAddress: 1;
171	/** Element type. */
172	unsigned u2ElementType: 2;
173	/** Flag whether this is the last element of the buffer. */
174	unsigned u2Reserved2: 2;
175	/** Lower 32bits of the address of the data buffer. */
176	unsigned u32SegmentAddressLow: 32;
177	/** Upper 32bits of the address of the data buffer. */
178	unsigned u32SegmentAddressHigh: 32;
179	} MptSGEntryChain, *PMptSGEntryChain;
180	#pragma pack()
181	AssertCompileSize(MptSGEntryChain, 12);
182
183	typedef union MptSGEntryUnion
184	{
185	MptSGEntrySimple64 Simple64;
186	MptSGEntrySimple32 Simple32;
187	MptSGEntryChain Chain;
188	} MptSGEntryUnion, *PMptSGEntryUnion;
189
190	/**
191	* MPT Fusion message header - Common for all message frames.
192	* This is filled in by the guest.
193	*/
194	#pragma pack(1)
195	typedef struct MptMessageHdr
196	{
197	/** Function dependent data. */
198	uint16_t u16FunctionDependent;
199	/** Chain offset. */
200	uint8_t u8ChainOffset;
201	/** The function code. */
202	uint8_t u8Function;
203	/** Function dependent data. */
204	uint8_t au8FunctionDependent[3];
205	/** Message flags. */
206	uint8_t u8MessageFlags;
207	/** Message context - Unique ID from the guest unmodified by the device. */
208	uint32_t u32MessageContext;
209	} MptMessageHdr, *PMptMessageHdr;
210	#pragma pack()
211	AssertCompileSize(MptMessageHdr, 12);
212
213	/** Defined function codes found in the message header. */
214	#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST (0x00)
215	#define MPT_MESSAGE_HDR_FUNCTION_SCSI_TASK_MGMT (0x01)
216	#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT (0x02)
217	#define MPT_MESSAGE_HDR_FUNCTION_IOC_FACTS (0x03)
218	#define MPT_MESSAGE_HDR_FUNCTION_CONFIG (0x04)
219	#define MPT_MESSAGE_HDR_FUNCTION_PORT_FACTS (0x05)
220	#define MPT_MESSAGE_HDR_FUNCTION_PORT_ENABLE (0x06)
221	#define MPT_MESSAGE_HDR_FUNCTION_EVENT_NOTIFICATION (0x07)
222	#define MPT_MESSAGE_HDR_FUNCTION_EVENT_ACK (0x08)
223	#define MPT_MESSAGE_HDR_FUNCTION_FW_DOWNLOAD (0x09)
224	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
225	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_ASSIST (0x0B)
226	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_STATUS_SEND (0x0C)
227	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_MODE_ABORT (0x0D)
228	#define MPT_MESSAGE_HDR_FUNCTION_FW_UPLOAD (0x12)
229
230	#ifdef DEBUG
231	/**
232	* Function names
233	*/
234	static const char * const g_apszMPTFunctionNames[] =
235	{
236	"SCSI I/O Request",
237	"SCSI Task Management",
238	"IOC Init",
239	"IOC Facts",
240	"Config",
241	"Port Facts",
242	"Port Enable",
243	"Event Notification",
244	"Event Ack",
245	"Firmware Download"
246	};
247	#endif
248
249	/**
250	* Default reply message.
251	* Send from the device to the guest upon completion of a request.
252	*/
253	#pragma pack(1)
254	typedef struct MptDefaultReplyMessage
255	{
256	/** Function dependent data. */
257	uint16_t u16FunctionDependent;
258	/** Length of the message in 32bit DWords. */
259	uint8_t u8MessageLength;
260	/** Function which completed. */
261	uint8_t u8Function;
262	/** Function dependent. */
263	uint8_t au8FunctionDependent[3];
264	/** Message flags. */
265	uint8_t u8MessageFlags;
266	/** Message context given in the request. */
267	uint32_t u32MessageContext;
268	/** Function dependent status code. */
269	uint16_t u16FunctionDependentStatus;
270	/** Status of the IOC. */
271	uint16_t u16IOCStatus;
272	/** Additional log info. */
273	uint32_t u32IOCLogInfo;
274	} MptDefaultReplyMessage, *PMptDefaultReplyMessage;
275	#pragma pack()
276	AssertCompileSize(MptDefaultReplyMessage, 20);
277
278	/**
279	* IO controller init request.
280	*/
281	#pragma pack(1)
282	typedef struct MptIOCInitRequest
283	{
284	/** Which system send this init request. */
285	uint8_t u8WhoInit;
286	/** Reserved */
287	uint8_t u8Reserved;
288	/** Chain offset in the SG list. */
289	uint8_t u8ChainOffset;
290	/** Function to execute. */
291	uint8_t u8Function;
292	/** Flags */
293	uint8_t u8Flags;
294	/** Maximum number of devices the driver can handle. */
295	uint8_t u8MaxDevices;
296	/** Maximum number of buses the driver can handle. */
297	uint8_t u8MaxBuses;
298	/** Message flags. */
299	uint8_t u8MessageFlags;
300	/** Message context ID. */
301	uint32_t u32MessageContext;
302	/** Reply frame size. */
303	uint16_t u16ReplyFrameSize;
304	/** Reserved */
305	uint16_t u16Reserved;
306	/** Upper 32bit part of the 64bit address the message frames are in.
307	* That means all frames must be in the same 4GB segment. */
308	uint32_t u32HostMfaHighAddr;
309	/** Upper 32bit of the sense buffer. */
310	uint32_t u32SenseBufferHighAddr;
311	} MptIOCInitRequest, *PMptIOCInitRequest;
312	#pragma pack()
313	AssertCompileSize(MptIOCInitRequest, 24);
314
315	/**
316	* IO controller init reply.
317	*/
318	#pragma pack(1)
319	typedef struct MptIOCInitReply
320	{
321	/** Which subsystem send this init request. */
322	uint8_t u8WhoInit;
323	/** Reserved */
324	uint8_t u8Reserved;
325	/** Message length */
326	uint8_t u8MessageLength;
327	/** Function. */
328	uint8_t u8Function;
329	/** Flags */
330	uint8_t u8Flags;
331	/** Maximum number of devices the driver can handle. */
332	uint8_t u8MaxDevices;
333	/** Maximum number of busses the driver can handle. */
334	uint8_t u8MaxBuses;
335	/** Message flags. */
336	uint8_t u8MessageFlags;
337	/** Message context ID */
338	uint32_t u32MessageContext;
339	/** Reserved */
340	uint16_t u16Reserved;
341	/** IO controller status. */
342	uint16_t u16IOCStatus;
343	/** IO controller log information. */
344	uint32_t u32IOCLogInfo;
345	} MptIOCInitReply, *PMptIOCInitReply;
346	#pragma pack()
347	AssertCompileSize(MptIOCInitReply, 20);
348
349	/**
350	* IO controller facts request.
351	*/
352	#pragma pack(1)
353	typedef struct MptIOCFactsRequest
354	{
355	/** Reserved. */
356	uint16_t u16Reserved;
357	/** Chain offset in SG list. */
358	uint8_t u8ChainOffset;
359	/** Function number. */
360	uint8_t u8Function;
361	/** Reserved */
362	uint8_t u8Reserved[3];
363	/** Message flags. */
364	uint8_t u8MessageFlags;
365	/** Message context ID. */
366	uint32_t u32MessageContext;
367	} MptIOCFactsRequest, *PMptIOCFactsRequest;
368	#pragma pack()
369	AssertCompileSize(MptIOCFactsRequest, 12);
370
371	/**
372	* IO controller facts reply.
373	*/
374	#pragma pack(1)
375	typedef struct MptIOCFactsReply
376	{
377	/** Message version. */
378	uint16_t u16MessageVersion;
379	/** Message length. */
380	uint8_t u8MessageLength;
381	/** Function number. */
382	uint8_t u8Function;
383	/** Reserved */
384	uint16_t u16Reserved1;
385	/** IO controller number */
386	uint8_t u8IOCNumber;
387	/** Message flags. */
388	uint8_t u8MessageFlags;
389	/** Message context ID. */
390	uint32_t u32MessageContext;
391	/** IO controller exceptions */
392	uint16_t u16IOCExceptions;
393	/** IO controller status. */
394	uint16_t u16IOCStatus;
395	/** IO controller log information. */
396	uint32_t u32IOCLogInfo;
397	/** Maximum chain depth. */
398	uint8_t u8MaxChainDepth;
399	/** The current value of the WhoInit field. */
400	uint8_t u8WhoInit;
401	/** Block size. */
402	uint8_t u8BlockSize;
403	/** Flags. */
404	uint8_t u8Flags;
405	/** Depth of the reply queue. */
406	uint16_t u16ReplyQueueDepth;
407	/** Size of a request frame. */
408	uint16_t u16RequestFrameSize;
409	/** Reserved */
410	uint16_t u16Reserved2;
411	/** Product ID. */
412	uint16_t u16ProductID;
413	/** Current value of the high 32bit MFA address. */
414	uint32_t u32CurrentHostMFAHighAddr;
415	/** Global credits - Number of entries allocated to queues */
416	uint16_t u16GlobalCredits;
417	/** Number of ports on the IO controller */
418	uint8_t u8NumberOfPorts;
419	/** Event state. */
420	uint8_t u8EventState;
421	/** Current value of the high 32bit sense buffer address. */
422	uint32_t u32CurrentSenseBufferHighAddr;
423	/** Current reply frame size. */
424	uint16_t u16CurReplyFrameSize;
425	/** Maximum number of devices. */
426	uint8_t u8MaxDevices;
427	/** Maximum number of buses. */
428	uint8_t u8MaxBuses;
429	/** Size of the firmware image. */
430	uint32_t u32FwImageSize;
431	/** Reserved. */
432	uint32_t u32Reserved;
433	/** Firmware version */
434	uint32_t u32FWVersion;
435	} MptIOCFactsReply, *PMptIOCFactsReply;
436	#pragma pack()
437	AssertCompileSize(MptIOCFactsReply, 60);
438
439	/**
440	* Port facts request
441	*/
442	#pragma pack(1)
443	typedef struct MptPortFactsRequest
444	{
445	/** Reserved */
446	uint16_t u16Reserved1;
447	/** Message length. */
448	uint8_t u8MessageLength;
449	/** Function number. */
450	uint8_t u8Function;
451	/** Reserved */
452	uint16_t u16Reserved2;
453	/** Port number to get facts for. */
454	uint8_t u8PortNumber;
455	/** Message flags. */
456	uint8_t u8MessageFlags;
457	/** Message context ID. */
458	uint32_t u32MessageContext;
459	} MptPortFactsRequest, *PMptPortFactsRequest;
460	#pragma pack()
461	AssertCompileSize(MptPortFactsRequest, 12);
462
463	/**
464	* Port facts reply.
465	*/
466	#pragma pack(1)
467	typedef struct MptPortFactsReply
468	{
469	/** Reserved. */
470	uint16_t u16Reserved1;
471	/** Message length. */
472	uint8_t u8MessageLength;
473	/** Function number. */
474	uint8_t u8Function;
475	/** Reserved */
476	uint16_t u16Reserved2;
477	/** Port number the facts are for. */
478	uint8_t u8PortNumber;
479	/** Message flags. */
480	uint8_t u8MessageFlags;
481	/** Message context ID. */
482	uint32_t u32MessageContext;
483	/** Reserved. */
484	uint16_t u16Reserved3;
485	/** IO controller status. */
486	uint16_t u16IOCStatus;
487	/** IO controller log information. */
488	uint32_t u32IOCLogInfo;
489	/** Reserved */
490	uint8_t u8Reserved;
491	/** Port type */
492	uint8_t u8PortType;
493	/** Maximum number of devices on this port. */
494	uint16_t u16MaxDevices;
495	/** SCSI ID of this port on the attached bus. */
496	uint16_t u16PortSCSIID;
497	/** Protocol flags. */
498	uint16_t u16ProtocolFlags;
499	/** Maximum number of target command buffers which can be posted to this port at a time. */
500	uint16_t u16MaxPostedCmdBuffers;
501	/** Maximum number of target IDs that remain persistent between power/reset cycles. */
502	uint16_t u16MaxPersistentIDs;
503	/** Maximum number of LAN buckets. */
504	uint16_t u16MaxLANBuckets;
505	/** Reserved. */
506	uint16_t u16Reserved4;
507	/** Reserved. */
508	uint32_t u32Reserved;
509	} MptPortFactsReply, *PMptPortFactsReply;
510	#pragma pack()
511	AssertCompileSize(MptPortFactsReply, 40);
512
513	/**
514	* Port Enable request.
515	*/
516	#pragma pack(1)
517	typedef struct MptPortEnableRequest
518	{
519	/** Reserved. */
520	uint16_t u16Reserved1;
521	/** Message length. */
522	uint8_t u8MessageLength;
523	/** Function number. */
524	uint8_t u8Function;
525	/** Reserved. */
526	uint16_t u16Reserved2;
527	/** Port number to enable. */
528	uint8_t u8PortNumber;
529	/** Message flags. */
530	uint8_t u8MessageFlags;
531	/** Message context ID. */
532	uint32_t u32MessageContext;
533	} MptPortEnableRequest, *PMptPortEnableRequest;
534	#pragma pack()
535	AssertCompileSize(MptPortEnableRequest, 12);
536
537	/**
538	* Port enable reply.
539	*/
540	#pragma pack(1)
541	typedef struct MptPortEnableReply
542	{
543	/** Reserved. */
544	uint16_t u16Reserved1;
545	/** Message length. */
546	uint8_t u8MessageLength;
547	/** Function number. */
548	uint8_t u8Function;
549	/** Reserved */
550	uint16_t u16Reserved2;
551	/** Port number which was enabled. */
552	uint8_t u8PortNumber;
553	/** Message flags. */
554	uint8_t u8MessageFlags;
555	/** Message context ID. */
556	uint32_t u32MessageContext;
557	/** Reserved. */
558	uint16_t u16Reserved3;
559	/** IO controller status */
560	uint16_t u16IOCStatus;
561	/** IO controller log information. */
562	uint32_t u32IOCLogInfo;
563	} MptPortEnableReply, *PMptPortEnableReply;
564	#pragma pack()
565	AssertCompileSize(MptPortEnableReply, 20);
566
567	/**
568	* Event notification request.
569	*/
570	#pragma pack(1)
571	typedef struct MptEventNotificationRequest
572	{
573	/** Switch - Turns event notification on and off. */
574	uint8_t u8Switch;
575	/** Reserved. */
576	uint8_t u8Reserved1;
577	/** Chain offset. */
578	uint8_t u8ChainOffset;
579	/** Function number. */
580	uint8_t u8Function;
581	/** Reserved. */
582	uint8_t u8reserved2[3];
583	/** Message flags. */
584	uint8_t u8MessageFlags;
585	/** Message context ID. */
586	uint32_t u32MessageContext;
587	} MptEventNotificationRequest, *PMptEventNotificationRequest;
588	#pragma pack()
589	AssertCompileSize(MptEventNotificationRequest, 12);
590
591	/**
592	* Event notification reply.
593	*/
594	#pragma pack(1)
595	typedef struct MptEventNotificationReply
596	{
597	/** Event data length. */
598	uint16_t u16EventDataLength;
599	/** Message length. */
600	uint8_t u8MessageLength;
601	/** Function number. */
602	uint8_t u8Function;
603	/** Reserved. */
604	uint16_t u16Reserved1;
605	/** Ack required. */
606	uint8_t u8AckRequired;
607	/** Message flags. */
608	uint8_t u8MessageFlags;
609	/** Message context ID. */
610	uint32_t u32MessageContext;
611	/** Reserved. */
612	uint16_t u16Reserved2;
613	/** IO controller status. */
614	uint16_t u16IOCStatus;
615	/** IO controller log information. */
616	uint32_t u32IOCLogInfo;
617	/** Notification event. */
618	uint32_t u32Event;
619	/** Event context. */
620	uint32_t u32EventContext;
621	/** Event data. */
622	uint32_t u32EventData;
623	} MptEventNotificationReply, *PMptEventNotificationReply;
624	#pragma pack()
625	AssertCompileSize(MptEventNotificationReply, 32);
626
627	#define MPT_EVENT_EVENT_CHANGE (0x0000000a)
628
629	/**
630	* FW download request.
631	*/
632	#pragma pack(1)
633	typedef struct MptFWDownloadRequest
634	{
635	/** Switch - Turns event notification on and off. */
636	uint8_t u8ImageType;
637	/** Reserved. */
638	uint8_t u8Reserved1;
639	/** Chain offset. */
640	uint8_t u8ChainOffset;
641	/** Function number. */
642	uint8_t u8Function;
643	/** Reserved. */
644	uint8_t u8Reserved2[3];
645	/** Message flags. */
646	uint8_t u8MessageFlags;
647	/** Message context ID. */
648	uint32_t u32MessageContext;
649	} MptFWDownloadRequest, *PMptFWDownloadRequest;
650	#pragma pack()
651	AssertCompileSize(MptFWDownloadRequest, 12);
652
653	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_RESERVED 0
654	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_FIRMWARE 1
655	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_MPI_BIOS 2
656	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_NVDATA 3
657
658	/**
659	* FW download reply.
660	*/
661	#pragma pack(1)
662	typedef struct MptFWDownloadReply
663	{
664	/** Reserved. */
665	uint16_t u16Reserved1;
666	/** Message length. */
667	uint8_t u8MessageLength;
668	/** Function number. */
669	uint8_t u8Function;
670	/** Reserved. */
671	uint8_t u8Reserved2[3];
672	/** Message flags. */
673	uint8_t u8MessageFlags;
674	/** Message context ID. */
675	uint32_t u32MessageContext;
676	/** Reserved. */
677	uint16_t u16Reserved2;
678	/** IO controller status. */
679	uint16_t u16IOCStatus;
680	/** IO controller log information. */
681	uint32_t u32IOCLogInfo;
682	} MptFWDownloadReply, *PMptFWDownloadReply;
683	#pragma pack()
684	AssertCompileSize(MptFWDownloadReply, 20);
685
686	/**
687	* FW upload request.
688	*/
689	#pragma pack(1)
690	typedef struct MptFWUploadRequest
691	{
692	/** Requested image type. */
693	uint8_t u8ImageType;
694	/** Reserved. */
695	uint8_t u8Reserved1;
696	/** Chain offset. */
697	uint8_t u8ChainOffset;
698	/** Function number. */
699	uint8_t u8Function;
700	/** Reserved. */
701	uint8_t u8Reserved2[3];
702	/** Message flags. */
703	uint8_t u8MessageFlags;
704	/** Message context ID. */
705	uint32_t u32MessageContext;
706	} MptFWUploadRequest, *PMptFWUploadRequest;
707	#pragma pack()
708	AssertCompileSize(MptFWUploadRequest, 12);
709
710	/**
711	* FW upload reply.
712	*/
713	#pragma pack(1)
714	typedef struct MptFWUploadReply
715	{
716	/** Image type. */
717	uint8_t u8ImageType;
718	/** Reserved. */
719	uint8_t u8Reserved1;
720	/** Message length. */
721	uint8_t u8MessageLength;
722	/** Function number. */
723	uint8_t u8Function;
724	/** Reserved. */
725	uint8_t u8Reserved2[3];
726	/** Message flags. */
727	uint8_t u8MessageFlags;
728	/** Message context ID. */
729	uint32_t u32MessageContext;
730	/** Reserved. */
731	uint16_t u16Reserved2;
732	/** IO controller status. */
733	uint16_t u16IOCStatus;
734	/** IO controller log information. */
735	uint32_t u32IOCLogInfo;
736	/** Uploaded image size. */
737	uint32_t u32ActualImageSize;
738	} MptFWUploadReply, *PMptFWUploadReply;
739	#pragma pack()
740	AssertCompileSize(MptFWUploadReply, 24);
741
742	/**
743	* SCSI IO Request
744	*/
745	#pragma pack(1)
746	typedef struct MptSCSIIORequest
747	{
748	/** Target ID */
749	uint8_t u8TargetID;
750	/** Bus number */
751	uint8_t u8Bus;
752	/** Chain offset */
753	uint8_t u8ChainOffset;
754	/** Function number. */
755	uint8_t u8Function;
756	/** CDB length. */
757	uint8_t u8CDBLength;
758	/** Sense buffer length. */
759	uint8_t u8SenseBufferLength;
760	/** Reserved */
761	uint8_t u8Reserved;
762	/** Message flags. */
763	uint8_t u8MessageFlags;
764	/** Message context ID. */
765	uint32_t u32MessageContext;
766	/** LUN */
767	uint8_t au8LUN[8];
768	/** Control values. */
769	uint32_t u32Control;
770	/** The CDB. */
771	uint8_t au8CDB[16];
772	/** Data length. */
773	uint32_t u32DataLength;
774	/** Sense buffer low 32bit address. */
775	uint32_t u32SenseBufferLowAddress;
776	} MptSCSIIORequest, *PMptSCSIIORequest;
777	#pragma pack()
778	AssertCompileSize(MptSCSIIORequest, 48);
779
780	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_GET(x) (((x) & 0x3000000) >> 24)
781	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x0)
782	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x1)
783	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x2)
784
785	/**
786	* SCSI IO error reply.
787	*/
788	#pragma pack(1)
789	typedef struct MptSCSIIOErrorReply
790	{
791	/** Target ID */
792	uint8_t u8TargetID;
793	/** Bus number */
794	uint8_t u8Bus;
795	/** Message length. */
796	uint8_t u8MessageLength;
797	/** Function number. */
798	uint8_t u8Function;
799	/** CDB length */
800	uint8_t u8CDBLength;
801	/** Sense buffer length */
802	uint8_t u8SenseBufferLength;
803	/** Reserved */
804	uint8_t u8Reserved;
805	/** Message flags */
806	uint8_t u8MessageFlags;
807	/** Message context ID */
808	uint32_t u32MessageContext;
809	/** SCSI status. */
810	uint8_t u8SCSIStatus;
811	/** SCSI state */
812	uint8_t u8SCSIState;
813	/** IO controller status */
814	uint16_t u16IOCStatus;
815	/** IO controller log information */
816	uint32_t u32IOCLogInfo;
817	/** Transfer count */
818	uint32_t u32TransferCount;
819	/** Sense count */
820	uint32_t u32SenseCount;
821	/** Response information */
822	uint32_t u32ResponseInfo;
823	} MptSCSIIOErrorReply, *PMptSCSIIOErrorReply;
824	#pragma pack()
825	AssertCompileSize(MptSCSIIOErrorReply, 32);
826
827	#define MPT_SCSI_IO_ERROR_SCSI_STATE_AUTOSENSE_VALID (0x01)
828	#define MPT_SCSI_IO_ERROR_SCSI_STATE_TERMINATED (0x08)
829
830	/**
831	* IOC status codes specific to the SCSI I/O error reply.
832	*/
833	#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_BUS (0x0041)
834	#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_TARGETID (0x0042)
835	#define MPT_SCSI_IO_ERROR_IOCSTATUS_DEVICE_NOT_THERE (0x0043)
836
837	/**
838	* SCSI task management request.
839	*/
840	#pragma pack(1)
841	typedef struct MptSCSITaskManagementRequest
842	{
843	/** Target ID */
844	uint8_t u8TargetID;
845	/** Bus number */
846	uint8_t u8Bus;
847	/** Chain offset */
848	uint8_t u8ChainOffset;
849	/** Function number */
850	uint8_t u8Function;
851	/** Reserved */
852	uint8_t u8Reserved1;
853	/** Task type */
854	uint8_t u8TaskType;
855	/** Reserved */
856	uint8_t u8Reserved2;
857	/** Message flags */
858	uint8_t u8MessageFlags;
859	/** Message context ID */
860	uint32_t u32MessageContext;
861	/** LUN */
862	uint8_t au8LUN[8];
863	/** Reserved */
864	uint8_t auReserved[28];
865	/** Task message context ID. */
866	uint32_t u32TaskMessageContext;
867	} MptSCSITaskManagementRequest, *PMptSCSITaskManagementRequest;
868	#pragma pack()
869	AssertCompileSize(MptSCSITaskManagementRequest, 52);
870
871	/**
872	* SCSI task management reply.
873	*/
874	#pragma pack(1)
875	typedef struct MptSCSITaskManagementReply
876	{
877	/** Target ID */
878	uint8_t u8TargetID;
879	/** Bus number */
880	uint8_t u8Bus;
881	/** Message length */
882	uint8_t u8MessageLength;
883	/** Function number */
884	uint8_t u8Function;
885	/** Reserved */
886	uint8_t u8Reserved1;
887	/** Task type */
888	uint8_t u8TaskType;
889	/** Reserved */
890	uint8_t u8Reserved2;
891	/** Message flags */
892	uint8_t u8MessageFlags;
893	/** Message context ID */
894	uint32_t u32MessageContext;
895	/** Reserved */
896	uint16_t u16Reserved;
897	/** IO controller status */
898	uint16_t u16IOCStatus;
899	/** IO controller log information */
900	uint32_t u32IOCLogInfo;
901	/** Termination count */
902	uint32_t u32TerminationCount;
903	} MptSCSITaskManagementReply, *PMptSCSITaskManagementReply;
904	#pragma pack()
905	AssertCompileSize(MptSCSITaskManagementReply, 24);
906
907	/**
908	* Page address for SAS expander page types.
909	*/
910	#pragma pack(1)
911	typedef union MptConfigurationPageAddressSASExpander
912	{
913	struct
914	{
915	uint16_t u16Handle;
916	uint16_t u16Reserved;
917	} Form0And2;
918	struct
919	{
920	uint16_t u16Handle;
921	uint8_t u8PhyNum;
922	uint8_t u8Reserved;
923	} Form1;
924	} MptConfigurationPageAddressSASExpander, *PMptConfigurationPageAddressSASExpander;
925	#pragma pack()
926
927	/**
928	* Page address for SAS device page types.
929	*/
930	#pragma pack(1)
931	typedef union MptConfigurationPageAddressSASDevice
932	{
933	struct
934	{
935	uint16_t u16Handle;
936	uint16_t u16Reserved;
937	} Form0And2;
938	struct
939	{
940	uint8_t u8TargetID;
941	uint8_t u8Bus;
942	uint8_t u8Reserved;
943	} Form1;
944	} MptConfigurationPageAddressSASDevice, *PMptConfigurationPageAddressSASDevice;
945	#pragma pack()
946
947	/**
948	* Page address for SAS PHY page types.
949	*/
950	#pragma pack(1)
951	typedef union MptConfigurationPageAddressSASPHY
952	{
953	struct
954	{
955	uint8_t u8PhyNumber;
956	uint8_t u8Reserved[3];
957	} Form0;
958	struct
959	{
960	uint16_t u16Index;
961	uint16_t u16Reserved;
962	} Form1;
963	} MptConfigurationPageAddressSASPHY, *PMptConfigurationPageAddressSASPHY;
964	#pragma pack()
965
966	/**
967	* Page address for SAS Enclosure page types.
968	*/
969	#pragma pack(1)
970	typedef struct MptConfigurationPageAddressSASEnclosure
971	{
972	uint16_t u16Handle;
973	uint16_t u16Reserved;
974	} MptConfigurationPageAddressSASEnclosure, *PMptConfigurationPageAddressSASEnclosure;
975	#pragma pack()
976
977	/**
978	* Union of all possible address types.
979	*/
980	#pragma pack(1)
981	typedef union MptConfigurationPageAddress
982	{
983	/** 32bit view. */
984	uint32_t u32PageAddress;
985	struct
986	{
987	/** Port number to get the configuration page for. */
988	uint8_t u8PortNumber;
989	/** Reserved. */
990	uint8_t u8Reserved[3];
991	} MPIPortNumber;
992	struct
993	{
994	/** Target ID to get the configuration page for. */
995	uint8_t u8TargetID;
996	/** Bus number to get the configuration page for. */
997	uint8_t u8Bus;
998	/** Reserved. */
999	uint8_t u8Reserved[2];
1000	} BusAndTargetId;
1001	MptConfigurationPageAddressSASExpander SASExpander;
1002	MptConfigurationPageAddressSASDevice SASDevice;
1003	MptConfigurationPageAddressSASPHY SASPHY;
1004	MptConfigurationPageAddressSASEnclosure SASEnclosure;
1005	} MptConfigurationPageAddress, *PMptConfigurationPageAddress;
1006	#pragma pack()
1007	AssertCompileSize(MptConfigurationPageAddress, 4);
1008
1009	#define MPT_CONFIGURATION_PAGE_ADDRESS_GET_SAS_FORM(x) (((x).u32PageAddress >> 28) & 0x0f)
1010
1011	/**
1012	* Configuration request
1013	*/
1014	#pragma pack(1)
1015	typedef struct MptConfigurationRequest
1016	{
1017	/** Action code. */
1018	uint8_t u8Action;
1019	/** Reserved. */
1020	uint8_t u8Reserved1;
1021	/** Chain offset. */
1022	uint8_t u8ChainOffset;
1023	/** Function number. */
1024	uint8_t u8Function;
1025	/** Extended page length. */
1026	uint16_t u16ExtPageLength;
1027	/** Extended page type */
1028	uint8_t u8ExtPageType;
1029	/** Message flags. */
1030	uint8_t u8MessageFlags;
1031	/** Message context ID. */
1032	uint32_t u32MessageContext;
1033	/** Reserved. */
1034	uint8_t u8Reserved2[8];
1035	/** Version number of the page. */
1036	uint8_t u8PageVersion;
1037	/** Length of the page in 32bit Dwords. */
1038	uint8_t u8PageLength;
1039	/** Page number to access. */
1040	uint8_t u8PageNumber;
1041	/** Type of the page being accessed. */
1042	uint8_t u8PageType;
1043	/** Page type dependent address. */
1044	MptConfigurationPageAddress PageAddress;
1045	/** Simple SG element describing the buffer. */
1046	MptSGEntrySimple64 SimpleSGElement;
1047	} MptConfigurationRequest, *PMptConfigurationRequest;
1048	#pragma pack()
1049	AssertCompileSize(MptConfigurationRequest, 40);
1050
1051	/** Possible action codes. */
1052	#define MPT_CONFIGURATION_REQUEST_ACTION_HEADER (0x00)
1053	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_CURRENT (0x01)
1054	#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_CURRENT (0x02)
1055	#define MPT_CONFIGURATION_REQUEST_ACTION_DEFAULT (0x03)
1056	#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_NVRAM (0x04)
1057	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_DEFAULT (0x05)
1058	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_NVRAM (0x06)
1059
1060	/** Page type codes. */
1061	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IO_UNIT (0x00)
1062	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IOC (0x01)
1063	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_BIOS (0x02)
1064	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_SCSI_PORT (0x03)
1065	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_EXTENDED (0x0F)
1066
1067	/**
1068	* Configuration reply.
1069	*/
1070	#pragma pack(1)
1071	typedef struct MptConfigurationReply
1072	{
1073	/** Action code. */
1074	uint8_t u8Action;
1075	/** Reserved. */
1076	uint8_t u8Reserved;
1077	/** Message length. */
1078	uint8_t u8MessageLength;
1079	/** Function number. */
1080	uint8_t u8Function;
1081	/** Extended page length. */
1082	uint16_t u16ExtPageLength;
1083	/** Extended page type */
1084	uint8_t u8ExtPageType;
1085	/** Message flags. */
1086	uint8_t u8MessageFlags;
1087	/** Message context ID. */
1088	uint32_t u32MessageContext;
1089	/** Reserved. */
1090	uint16_t u16Reserved;
1091	/** I/O controller status. */
1092	uint16_t u16IOCStatus;
1093	/** I/O controller log information. */
1094	uint32_t u32IOCLogInfo;
1095	/** Version number of the page. */
1096	uint8_t u8PageVersion;
1097	/** Length of the page in 32bit Dwords. */
1098	uint8_t u8PageLength;
1099	/** Page number to access. */
1100	uint8_t u8PageNumber;
1101	/** Type of the page being accessed. */
1102	uint8_t u8PageType;
1103	} MptConfigurationReply, *PMptConfigurationReply;
1104	#pragma pack()
1105	AssertCompileSize(MptConfigurationReply, 24);
1106
1107	/** Additional I/O controller status codes for the configuration reply. */
1108	#define MPT_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
1109	#define MPT_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
1110	#define MPT_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
1111	#define MPT_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
1112	#define MPT_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
1113	#define MPT_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
1114
1115	/**
1116	* Union of all possible request messages.
1117	*/
1118	typedef union MptRequestUnion
1119	{
1120	MptMessageHdr Header;
1121	MptIOCInitRequest IOCInit;
1122	MptIOCFactsRequest IOCFacts;
1123	MptPortFactsRequest PortFacts;
1124	MptPortEnableRequest PortEnable;
1125	MptEventNotificationRequest EventNotification;
1126	MptSCSIIORequest SCSIIO;
1127	MptSCSITaskManagementRequest SCSITaskManagement;
1128	MptConfigurationRequest Configuration;
1129	MptFWDownloadRequest FWDownload;
1130	MptFWUploadRequest FWUpload;
1131	} MptRequestUnion, *PMptRequestUnion;
1132
1133	/**
1134	* Union of all possible reply messages.
1135	*/
1136	typedef union MptReplyUnion
1137	{
1138	/** 16bit view. */
1139	uint16_t au16Reply[30];
1140	MptDefaultReplyMessage Header;
1141	MptIOCInitReply IOCInit;
1142	MptIOCFactsReply IOCFacts;
1143	MptPortFactsReply PortFacts;
1144	MptPortEnableReply PortEnable;
1145	MptEventNotificationReply EventNotification;
1146	MptSCSIIOErrorReply SCSIIOError;
1147	MptSCSITaskManagementReply SCSITaskManagement;
1148	MptConfigurationReply Configuration;
1149	MptFWDownloadReply FWDownload;
1150	MptFWUploadReply FWUpload;
1151	} MptReplyUnion, *PMptReplyUnion;
1152
1153
1154	/**
1155	* Configuration Page attributes.
1156	*/
1157	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY (0x00)
1158	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE (0x10)
1159	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT (0x20)
1160	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY (0x30)
1161
1162	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_GET(u8PageType) ((u8PageType) & 0xf0)
1163
1164	/**
1165	* Configuration Page types.
1166	*/
1167	#define MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT (0x00)
1168	#define MPT_CONFIGURATION_PAGE_TYPE_IOC (0x01)
1169	#define MPT_CONFIGURATION_PAGE_TYPE_BIOS (0x02)
1170	#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT (0x03)
1171	#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE (0x04)
1172	#define MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING (0x09)
1173	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED (0x0F)
1174
1175	#define MPT_CONFIGURATION_PAGE_TYPE_GET(u8PageType) ((u8PageType) & 0x0f)
1176
1177	/**
1178	* Extented page types.
1179	*/
1180	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT (0x10)
1181	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASEXPANDER (0x11)
1182	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASDEVICE (0x12)
1183	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASPHYS (0x13)
1184	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_LOG (0x14)
1185	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_ENCLOSURE (0x15)
1186
1187	/**
1188	* Configuration Page header - Common to all pages.
1189	*/
1190	#pragma pack(1)
1191	typedef struct MptConfigurationPageHeader
1192	{
1193	/** Version of the page. */
1194	uint8_t u8PageVersion;
1195	/** The length of the page in 32bit D-Words. */
1196	uint8_t u8PageLength;
1197	/** Number of the page. */
1198	uint8_t u8PageNumber;
1199	/** Type of the page. */
1200	uint8_t u8PageType;
1201	} MptConfigurationPageHeader, *PMptConfigurationPageHeader;
1202	#pragma pack()
1203	AssertCompileSize(MptConfigurationPageHeader, 4);
1204
1205	/**
1206	* Extended configuration page header - Common to all extended pages.
1207	*/
1208	#pragma pack(1)
1209	typedef struct MptExtendedConfigurationPageHeader
1210	{
1211	/** Version of the page. */
1212	uint8_t u8PageVersion;
1213	/** Reserved. */
1214	uint8_t u8Reserved1;
1215	/** Number of the page. */
1216	uint8_t u8PageNumber;
1217	/** Type of the page. */
1218	uint8_t u8PageType;
1219	/** Extended page length. */
1220	uint16_t u16ExtPageLength;
1221	/** Extended page type. */
1222	uint8_t u8ExtPageType;
1223	/** Reserved */
1224	uint8_t u8Reserved2;
1225	} MptExtendedConfigurationPageHeader, *PMptExtendedConfigurationPageHeader;
1226	#pragma pack()
1227	AssertCompileSize(MptExtendedConfigurationPageHeader, 8);
1228
1229	/**
1230	* Manufacturing page 0. - Readonly.
1231	*/
1232	#pragma pack(1)
1233	typedef struct MptConfigurationPageManufacturing0
1234	{
1235	/** Union. */
1236	union
1237	{
1238	/** Byte view. */
1239	uint8_t abPageData[76];
1240	/** Field view. */
1241	struct
1242	{
1243	/** The omnipresent header. */
1244	MptConfigurationPageHeader Header;
1245	/** Name of the chip. */
1246	uint8_t abChipName[16];
1247	/** Chip revision. */
1248	uint8_t abChipRevision[8];
1249	/** Board name. */
1250	uint8_t abBoardName[16];
1251	/** Board assembly. */
1252	uint8_t abBoardAssembly[16];
1253	/** Board tracer number. */
1254	uint8_t abBoardTracerNumber[16];
1255	} fields;
1256	} u;
1257	} MptConfigurationPageManufacturing0, *PMptConfigurationPageManufacturing0;
1258	#pragma pack()
1259	AssertCompileSize(MptConfigurationPageManufacturing0, 76);
1260
1261	/**
1262	* Manufacturing page 1. - Readonly Persistent.
1263	*/
1264	#pragma pack(1)
1265	typedef struct MptConfigurationPageManufacturing1
1266	{
1267	/** Union */
1268	union
1269	{
1270	/** Byte view */
1271	uint8_t abPageData[260];
1272	/** Field view */
1273	struct
1274	{
1275	/** The omnipresent header. */
1276	MptConfigurationPageHeader Header;
1277	/** VPD info - don't know what belongs here so all zero. */
1278	uint8_t abVPDInfo[256];
1279	} fields;
1280	} u;
1281	} MptConfigurationPageManufacturing1, *PMptConfigurationPageManufacturing1;
1282	#pragma pack()
1283	AssertCompileSize(MptConfigurationPageManufacturing1, 260);
1284
1285	/**
1286	* Manufacturing page 2. - Readonly.
1287	*/
1288	#pragma pack(1)
1289	typedef struct MptConfigurationPageManufacturing2
1290	{
1291	/** Union. */
1292	union
1293	{
1294	/** Byte view. */
1295	uint8_t abPageData[8];
1296	/** Field view. */
1297	struct
1298	{
1299	/** The omnipresent header. */
1300	MptConfigurationPageHeader Header;
1301	/** PCI Device ID. */
1302	uint16_t u16PCIDeviceID;
1303	/** PCI Revision ID. */
1304	uint8_t u8PCIRevisionID;
1305	/** Reserved. */
1306	uint8_t u8Reserved;
1307	/** Hardware specific settings... */
1308	} fields;
1309	} u;
1310	} MptConfigurationPageManufacturing2, *PMptConfigurationPageManufacturing2;
1311	#pragma pack()
1312	AssertCompileSize(MptConfigurationPageManufacturing2, 8);
1313
1314	/**
1315	* Manufacturing page 3. - Readonly.
1316	*/
1317	#pragma pack(1)
1318	typedef struct MptConfigurationPageManufacturing3
1319	{
1320	/** Union. */
1321	union
1322	{
1323	/** Byte view. */
1324	uint8_t abPageData[8];
1325	/** Field view. */
1326	struct
1327	{
1328	/** The omnipresent header. */
1329	MptConfigurationPageHeader Header;
1330	/** PCI Device ID. */
1331	uint16_t u16PCIDeviceID;
1332	/** PCI Revision ID. */
1333	uint8_t u8PCIRevisionID;
1334	/** Reserved. */
1335	uint8_t u8Reserved;
1336	/** Chip specific settings... */
1337	} fields;
1338	} u;
1339	} MptConfigurationPageManufacturing3, *PMptConfigurationPageManufacturing3;
1340	#pragma pack()
1341	AssertCompileSize(MptConfigurationPageManufacturing3, 8);
1342
1343	/**
1344	* Manufacturing page 4. - Readonly.
1345	*/
1346	#pragma pack(1)
1347	typedef struct MptConfigurationPageManufacturing4
1348	{
1349	/** Union. */
1350	union
1351	{
1352	/** Byte view. */
1353	uint8_t abPageData[84];
1354	/** Field view. */
1355	struct
1356	{
1357	/** The omnipresent header. */
1358	MptConfigurationPageHeader Header;
1359	/** Reserved. */
1360	uint32_t u32Reserved;
1361	/** InfoOffset0. */
1362	uint8_t u8InfoOffset0;
1363	/** Info size. */
1364	uint8_t u8InfoSize0;
1365	/** InfoOffset1. */
1366	uint8_t u8InfoOffset1;
1367	/** Info size. */
1368	uint8_t u8InfoSize1;
1369	/** Size of the inquiry data. */
1370	uint8_t u8InquirySize;
1371	/** Reserved. */
1372	uint8_t abReserved[3];
1373	/** Inquiry data. */
1374	uint8_t abInquiryData[56];
1375	/** IS volume settings. */
1376	uint32_t u32ISVolumeSettings;
1377	/** IME volume settings. */
1378	uint32_t u32IMEVolumeSettings;
1379	/** IM volume settings. */
1380	uint32_t u32IMVolumeSettings;
1381	} fields;
1382	} u;
1383	} MptConfigurationPageManufacturing4, *PMptConfigurationPageManufacturing4;
1384	#pragma pack()
1385	AssertCompileSize(MptConfigurationPageManufacturing4, 84);
1386
1387	/**
1388	* Manufacturing page 5 - Readonly.
1389	*/
1390	#pragma pack(1)
1391	typedef struct MptConfigurationPageManufacturing5
1392	{
1393	/** Union. */
1394	union
1395	{
1396	/** Byte view. */
1397	uint8_t abPageData[88];
1398	/** Field view. */
1399	struct
1400	{
1401	/** The omnipresent header. */
1402	MptConfigurationPageHeader Header;
1403	/** Base WWID. */
1404	uint64_t u64BaseWWID;
1405	/** Flags */
1406	uint8_t u8Flags;
1407	/** Number of ForceWWID fields in this page. */
1408	uint8_t u8NumForceWWID;
1409	/** Reserved */
1410	uint16_t u16Reserved;
1411	/** Reserved */
1412	uint32_t au32Reserved[2];
1413	/** ForceWWID entries Maximum of 8 because the SAS controller doesn't has more */
1414	uint64_t au64ForceWWID[8];
1415	} fields;
1416	} u;
1417	} MptConfigurationPageManufacturing5, *PMptConfigurationPageManufacturing5;
1418	#pragma pack()
1419	AssertCompileSize(MptConfigurationPageManufacturing5, 24+64);
1420
1421	/**
1422	* Manufacturing page 6 - Readonly.
1423	*/
1424	#pragma pack(1)
1425	typedef struct MptConfigurationPageManufacturing6
1426	{
1427	/** Union. */
1428	union
1429	{
1430	/** Byte view. */
1431	uint8_t abPageData[4];
1432	/** Field view. */
1433	struct
1434	{
1435	/** The omnipresent header. */
1436	MptConfigurationPageHeader Header;
1437	/** Product specific data - 0 for now */
1438	} fields;
1439	} u;
1440	} MptConfigurationPageManufacturing6, *PMptConfigurationPageManufacturing6;
1441	#pragma pack()
1442	AssertCompileSize(MptConfigurationPageManufacturing6, 4);
1443
1444	/**
1445	* Manufacutring page 7 - PHY element.
1446	*/
1447	#pragma pack(1)
1448	typedef struct MptConfigurationPageManufacturing7PHY
1449	{
1450	/** Pinout */
1451	uint32_t u32Pinout;
1452	/** Connector name */
1453	uint8_t szConnector[16];
1454	/** Location */
1455	uint8_t u8Location;
1456	/** reserved */
1457	uint8_t u8Reserved;
1458	/** Slot */
1459	uint16_t u16Slot;
1460	} MptConfigurationPageManufacturing7PHY, *PMptConfigurationPageManufacturing7PHY;
1461	#pragma pack()
1462	AssertCompileSize(MptConfigurationPageManufacturing7PHY, 24);
1463
1464	/**
1465	* Manufacturing page 7 - Readonly.
1466	*/
1467	#pragma pack(1)
1468	typedef struct MptConfigurationPageManufacturing7
1469	{
1470	/** Union. */
1471	union
1472	{
1473	/** Byte view. */
1474	uint8_t abPageData[1];
1475	/** Field view. */
1476	struct
1477	{
1478	/** The omnipresent header. */
1479	MptConfigurationPageHeader Header;
1480	/** Reserved */
1481	uint32_t au32Reserved[2];
1482	/** Flags */
1483	uint32_t u32Flags;
1484	/** Enclosure name */
1485	uint8_t szEnclosureName[16];
1486	/** Number of PHYs */
1487	uint8_t u8NumPhys;
1488	/** Reserved */
1489	uint8_t au8Reserved[3];
1490	/** PHY list for the SAS controller - variable depending on the number of ports */
1491	MptConfigurationPageManufacturing7PHY aPHY[1];
1492	} fields;
1493	} u;
1494	} MptConfigurationPageManufacturing7, *PMptConfigurationPageManufacturing7;
1495	#pragma pack()
1496	AssertCompileSize(MptConfigurationPageManufacturing7, 36+sizeof(MptConfigurationPageManufacturing7PHY));
1497
1498	#define LSILOGICSCSI_MANUFACTURING7_GET_SIZE(ports) (sizeof(MptConfigurationPageManufacturing7) + ((ports) - 1) * sizeof(MptConfigurationPageManufacturing7PHY))
1499
1500	/** Flags for the flags field */
1501	#define LSILOGICSCSI_MANUFACTURING7_FLAGS_USE_PROVIDED_INFORMATION RT_BIT(0)
1502
1503	/** Flags for the pinout field */
1504	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_UNKNOWN RT_BIT(0)
1505	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8482 RT_BIT(1)
1506	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE1 RT_BIT(8)
1507	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE2 RT_BIT(9)
1508	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE3 RT_BIT(10)
1509	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE4 RT_BIT(11)
1510	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE1 RT_BIT(16)
1511	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE2 RT_BIT(17)
1512	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE3 RT_BIT(18)
1513	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE4 RT_BIT(19)
1514
1515	/** Flags for the location field */
1516	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_UNKNOWN 0x01
1517	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_INTERNAL 0x02
1518	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_EXTERNAL 0x04
1519	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_SWITCHABLE 0x08
1520	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_AUTO 0x10
1521	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_PRESENT 0x20
1522	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_CONNECTED 0x80
1523
1524	/**
1525	* Manufacturing page 8 - Readonly.
1526	*/
1527	#pragma pack(1)
1528	typedef struct MptConfigurationPageManufacturing8
1529	{
1530	/** Union. */
1531	union
1532	{
1533	/** Byte view. */
1534	uint8_t abPageData[4];
1535	/** Field view. */
1536	struct
1537	{
1538	/** The omnipresent header. */
1539	MptConfigurationPageHeader Header;
1540	/** Product specific information */
1541	} fields;
1542	} u;
1543	} MptConfigurationPageManufacturing8, *PMptConfigurationPageManufacturing8;
1544	#pragma pack()
1545	AssertCompileSize(MptConfigurationPageManufacturing8, 4);
1546
1547	/**
1548	* Manufacturing page 9 - Readonly.
1549	*/
1550	#pragma pack(1)
1551	typedef struct MptConfigurationPageManufacturing9
1552	{
1553	/** Union. */
1554	union
1555	{
1556	/** Byte view. */
1557	uint8_t abPageData[4];
1558	/** Field view. */
1559	struct
1560	{
1561	/** The omnipresent header. */
1562	MptConfigurationPageHeader Header;
1563	/** Product specific information */
1564	} fields;
1565	} u;
1566	} MptConfigurationPageManufacturing9, *PMptConfigurationPageManufacturing9;
1567	#pragma pack()
1568	AssertCompileSize(MptConfigurationPageManufacturing9, 4);
1569
1570	/**
1571	* Manufacturing page 10 - Readonly.
1572	*/
1573	#pragma pack(1)
1574	typedef struct MptConfigurationPageManufacturing10
1575	{
1576	/** Union. */
1577	union
1578	{
1579	/** Byte view. */
1580	uint8_t abPageData[4];
1581	/** Field view. */
1582	struct
1583	{
1584	/** The omnipresent header. */
1585	MptConfigurationPageHeader Header;
1586	/** Product specific information */
1587	} fields;
1588	} u;
1589	} MptConfigurationPageManufacturing10, *PMptConfigurationPageManufacturing10;
1590	#pragma pack()
1591	AssertCompileSize(MptConfigurationPageManufacturing10, 4);
1592
1593	/**
1594	* IO Unit page 0. - Readonly.
1595	*/
1596	#pragma pack(1)
1597	typedef struct MptConfigurationPageIOUnit0
1598	{
1599	/** Union. */
1600	union
1601	{
1602	/** Byte view. */
1603	uint8_t abPageData[12];
1604	/** Field view. */
1605	struct
1606	{
1607	/** The omnipresent header. */
1608	MptConfigurationPageHeader Header;
1609	/** A unique identifier. */
1610	uint64_t u64UniqueIdentifier;
1611	} fields;
1612	} u;
1613	} MptConfigurationPageIOUnit0, *PMptConfigurationPageIOUnit0;
1614	#pragma pack()
1615	AssertCompileSize(MptConfigurationPageIOUnit0, 12);
1616
1617	/**
1618	* IO Unit page 1. - Read/Write.
1619	*/
1620	#pragma pack(1)
1621	typedef struct MptConfigurationPageIOUnit1
1622	{
1623	/** Union. */
1624	union
1625	{
1626	/** Byte view. */
1627	uint8_t abPageData[8];
1628	/** Field view. */
1629	struct
1630	{
1631	/** The omnipresent header. */
1632	MptConfigurationPageHeader Header;
1633	/** Flag whether this is a single function PCI device. */
1634	unsigned fSingleFunction: 1;
1635	/** Flag whether all possible paths to a device are mapped. */
1636	unsigned fAllPathsMapped: 1;
1637	/** Reserved. */
1638	unsigned u4Reserved: 4;
1639	/** Flag whether all RAID functionality is disabled. */
1640	unsigned fIntegratedRAIDDisabled: 1;
1641	/** Flag whether 32bit PCI accesses are forced. */
1642	unsigned f32BitAccessForced: 1;
1643	/** Reserved. */
1644	unsigned abReserved: 24;
1645	} fields;
1646	} u;
1647	} MptConfigurationPageIOUnit1, *PMptConfigurationPageIOUnit1;
1648	#pragma pack()
1649	AssertCompileSize(MptConfigurationPageIOUnit1, 8);
1650
1651	/**
1652	* Adapter Ordering.
1653	*/
1654	#pragma pack(1)
1655	typedef struct MptConfigurationPageIOUnit2AdapterOrdering
1656	{
1657	/** PCI bus number. */
1658	unsigned u8PCIBusNumber: 8;
1659	/** PCI device and function number. */
1660	unsigned u8PCIDevFn: 8;
1661	/** Flag whether the adapter is embedded. */
1662	unsigned fAdapterEmbedded: 1;
1663	/** Flag whether the adapter is enabled. */
1664	unsigned fAdapterEnabled: 1;
1665	/** Reserved. */
1666	unsigned u6Reserved: 6;
1667	/** Reserved. */
1668	unsigned u8Reserved: 8;
1669	} MptConfigurationPageIOUnit2AdapterOrdering, *PMptConfigurationPageIOUnit2AdapterOrdering;
1670	#pragma pack()
1671	AssertCompileSize(MptConfigurationPageIOUnit2AdapterOrdering, 4);
1672
1673	/**
1674	* IO Unit page 2. - Read/Write.
1675	*/
1676	#pragma pack(1)
1677	typedef struct MptConfigurationPageIOUnit2
1678	{
1679	/** Union. */
1680	union
1681	{
1682	/** Byte view. */
1683	uint8_t abPageData[28];
1684	/** Field view. */
1685	struct
1686	{
1687	/** The omnipresent header. */
1688	MptConfigurationPageHeader Header;
1689	/** Reserved. */
1690	unsigned fReserved: 1;
1691	/** Flag whether Pause on error is enabled. */
1692	unsigned fPauseOnError: 1;
1693	/** Flag whether verbose mode is enabled. */
1694	unsigned fVerboseModeEnabled: 1;
1695	/** Set to disable color video. */
1696	unsigned fDisableColorVideo: 1;
1697	/** Flag whether int 40h is hooked. */
1698	unsigned fNotHookInt40h: 1;
1699	/** Reserved. */
1700	unsigned u3Reserved: 3;
1701	/** Reserved. */
1702	unsigned abReserved: 24;
1703	/** BIOS version. */
1704	uint32_t u32BIOSVersion;
1705	/** Adapter ordering. */
1706	MptConfigurationPageIOUnit2AdapterOrdering aAdapterOrder[4];
1707	} fields;
1708	} u;
1709	} MptConfigurationPageIOUnit2, *PMptConfigurationPageIOUnit2;
1710	#pragma pack()
1711	AssertCompileSize(MptConfigurationPageIOUnit2, 28);
1712
1713	/*
1714	* IO Unit page 3. - Read/Write.
1715	*/
1716	#pragma pack(1)
1717	typedef struct MptConfigurationPageIOUnit3
1718	{
1719	/** Union. */
1720	union
1721	{
1722	/** Byte view. */
1723	uint8_t abPageData[8];
1724	/** Field view. */
1725	struct
1726	{
1727	/** The omnipresent header. */
1728	MptConfigurationPageHeader Header;
1729	/** Number of GPIO values. */
1730	uint8_t u8GPIOCount;
1731	/** Reserved. */
1732	uint8_t abReserved[3];
1733	} fields;
1734	} u;
1735	} MptConfigurationPageIOUnit3, *PMptConfigurationPageIOUnit3;
1736	#pragma pack()
1737	AssertCompileSize(MptConfigurationPageIOUnit3, 8);
1738
1739	/*
1740	* IO Unit page 4. - Readonly for everyone except the BIOS.
1741	*/
1742	#pragma pack(1)
1743	typedef struct MptConfigurationPageIOUnit4
1744	{
1745	/** Union. */
1746	union
1747	{
1748	/** Byte view. */
1749	uint8_t abPageData[20];
1750	/** Field view. */
1751	struct
1752	{
1753	/** The omnipresent header. */
1754	MptConfigurationPageHeader Header;
1755	/** Reserved */
1756	uint32_t u32Reserved;
1757	/** SG entry describing the Firmware location. */
1758	MptSGEntrySimple64 FWImageSGE;
1759	} fields;
1760	} u;
1761	} MptConfigurationPageIOUnit4, *PMptConfigurationPageIOUnit4;
1762	#pragma pack()
1763	AssertCompileSize(MptConfigurationPageIOUnit4, 20);
1764
1765	/**
1766	* IOC page 0. - Readonly
1767	*/
1768	#pragma pack(1)
1769	typedef struct MptConfigurationPageIOC0
1770	{
1771	/** Union. */
1772	union
1773	{
1774	/** Byte view. */
1775	uint8_t abPageData[28];
1776	/** Field view. */
1777	struct
1778	{
1779	/** The omnipresent header. */
1780	MptConfigurationPageHeader Header;
1781	/** Total amount of NV memory in bytes. */
1782	uint32_t u32TotalNVStore;
1783	/** Number of free bytes in the NV store. */
1784	uint32_t u32FreeNVStore;
1785	/** PCI vendor ID. */
1786	uint16_t u16VendorId;
1787	/** PCI device ID. */
1788	uint16_t u16DeviceId;
1789	/** PCI revision ID. */
1790	uint8_t u8RevisionId;
1791	/** Reserved. */
1792	uint8_t abReserved[3];
1793	/** PCI class code. */
1794	uint32_t u32ClassCode;
1795	/** Subsystem vendor Id. */
1796	uint16_t u16SubsystemVendorId;
1797	/** Subsystem Id. */
1798	uint16_t u16SubsystemId;
1799	} fields;
1800	} u;
1801	} MptConfigurationPageIOC0, *PMptConfigurationPageIOC0;
1802	#pragma pack()
1803	AssertCompileSize(MptConfigurationPageIOC0, 28);
1804
1805	/**
1806	* IOC page 1. - Read/Write
1807	*/
1808	#pragma pack(1)
1809	typedef struct MptConfigurationPageIOC1
1810	{
1811	/** Union. */
1812	union
1813	{
1814	/** Byte view. */
1815	uint8_t abPageData[16];
1816	/** Field view. */
1817	struct
1818	{
1819	/** The omnipresent header. */
1820	MptConfigurationPageHeader Header;
1821	/** Flag whether reply coalescing is enabled. */
1822	unsigned fReplyCoalescingEnabled: 1;
1823	/** Reserved. */
1824	unsigned u31Reserved: 31;
1825	/** Coalescing Timeout in microseconds. */
1826	unsigned u32CoalescingTimeout: 32;
1827	/** Coalescing depth. */
1828	unsigned u8CoalescingDepth: 8;
1829	/** Reserved. */
1830	unsigned u8Reserved0: 8;
1831	unsigned u8Reserved1: 8;
1832	unsigned u8Reserved2: 8;
1833	} fields;
1834	} u;
1835	} MptConfigurationPageIOC1, *PMptConfigurationPageIOC1;
1836	#pragma pack()
1837	AssertCompileSize(MptConfigurationPageIOC1, 16);
1838
1839	/**
1840	* IOC page 2. - Readonly
1841	*/
1842	#pragma pack(1)
1843	typedef struct MptConfigurationPageIOC2
1844	{
1845	/** Union. */
1846	union
1847	{
1848	/** Byte view. */
1849	uint8_t abPageData[12];
1850	/** Field view. */
1851	struct
1852	{
1853	/** The omnipresent header. */
1854	MptConfigurationPageHeader Header;
1855	/** Flag whether striping is supported. */
1856	unsigned fStripingSupported: 1;
1857	/** Flag whether enhanced mirroring is supported. */
1858	unsigned fEnhancedMirroringSupported: 1;
1859	/** Flag whether mirroring is supported. */
1860	unsigned fMirroringSupported: 1;
1861	/** Reserved. */
1862	unsigned u26Reserved: 26;
1863	/** Flag whether SES is supported. */
1864	unsigned fSESSupported: 1;
1865	/** Flag whether SAF-TE is supported. */
1866	unsigned fSAFTESupported: 1;
1867	/** Flag whether cross channel volumes are supported. */
1868	unsigned fCrossChannelVolumesSupported: 1;
1869	/** Number of active integrated RAID volumes. */
1870	unsigned u8NumActiveVolumes: 8;
1871	/** Maximum number of integrated RAID volumes supported. */
1872	unsigned u8MaxVolumes: 8;
1873	/** Number of active integrated RAID physical disks. */
1874	unsigned u8NumActivePhysDisks: 8;
1875	/** Maximum number of integrated RAID physical disks supported. */
1876	unsigned u8MaxPhysDisks: 8;
1877	/** RAID volumes... - not supported. */
1878	} fields;
1879	} u;
1880	} MptConfigurationPageIOC2, *PMptConfigurationPageIOC2;
1881	#pragma pack()
1882	AssertCompileSize(MptConfigurationPageIOC2, 12);
1883
1884	/**
1885	* IOC page 3. - Readonly
1886	*/
1887	#pragma pack(1)
1888	typedef struct MptConfigurationPageIOC3
1889	{
1890	/** Union. */
1891	union
1892	{
1893	/** Byte view. */
1894	uint8_t abPageData[8];
1895	/** Field view. */
1896	struct
1897	{
1898	/** The omnipresent header. */
1899	MptConfigurationPageHeader Header;
1900	/** Number of active integrated RAID physical disks. */
1901	uint8_t u8NumPhysDisks;
1902	/** Reserved. */
1903	uint8_t abReserved[3];
1904	} fields;
1905	} u;
1906	} MptConfigurationPageIOC3, *PMptConfigurationPageIOC3;
1907	#pragma pack()
1908	AssertCompileSize(MptConfigurationPageIOC3, 8);
1909
1910	/**
1911	* IOC page 4. - Read/Write
1912	*/
1913	#pragma pack(1)
1914	typedef struct MptConfigurationPageIOC4
1915	{
1916	/** Union. */
1917	union
1918	{
1919	/** Byte view. */
1920	uint8_t abPageData[8];
1921	/** Field view. */
1922	struct
1923	{
1924	/** The omnipresent header. */
1925	MptConfigurationPageHeader Header;
1926	/** Number of SEP entries in this page. */
1927	uint8_t u8ActiveSEP;
1928	/** Maximum number of SEp entries supported. */
1929	uint8_t u8MaxSEP;
1930	/** Reserved. */
1931	uint16_t u16Reserved;
1932	/** SEP entries... - not supported. */
1933	} fields;
1934	} u;
1935	} MptConfigurationPageIOC4, *PMptConfigurationPageIOC4;
1936	#pragma pack()
1937	AssertCompileSize(MptConfigurationPageIOC4, 8);
1938
1939	/**
1940	* IOC page 6. - Read/Write
1941	*/
1942	#pragma pack(1)
1943	typedef struct MptConfigurationPageIOC6
1944	{
1945	/** Union. */
1946	union
1947	{
1948	/** Byte view. */
1949	uint8_t abPageData[60];
1950	/** Field view. */
1951	struct
1952	{
1953	/** The omnipresent header. */
1954	MptConfigurationPageHeader Header;
1955	uint32_t u32CapabilitiesFlags;
1956	uint8_t u8MaxDrivesIS;
1957	uint8_t u8MaxDrivesIM;
1958	uint8_t u8MaxDrivesIME;
1959	uint8_t u8Reserved1;
1960	uint8_t u8MinDrivesIS;
1961	uint8_t u8MinDrivesIM;
1962	uint8_t u8MinDrivesIME;
1963	uint8_t u8Reserved2;
1964	uint8_t u8MaxGlobalHotSpares;
1965	uint8_t u8Reserved3;
1966	uint16_t u16Reserved4;
1967	uint32_t u32Reserved5;
1968	uint32_t u32SupportedStripeSizeMapIS;
1969	uint32_t u32SupportedStripeSizeMapIME;
1970	uint32_t u32Reserved6;
1971	uint8_t u8MetadataSize;
1972	uint8_t u8Reserved7;
1973	uint16_t u16Reserved8;
1974	uint16_t u16MaxBadBlockTableEntries;
1975	uint16_t u16Reserved9;
1976	uint16_t u16IRNvsramUsage;
1977	uint16_t u16Reserved10;
1978	uint32_t u32IRNvsramVersion;
1979	uint32_t u32Reserved11;
1980	} fields;
1981	} u;
1982	} MptConfigurationPageIOC6, *PMptConfigurationPageIOC6;
1983	#pragma pack()
1984	AssertCompileSize(MptConfigurationPageIOC6, 60);
1985
1986	/**
1987	* BIOS page 1 - Read/write.
1988	*/
1989	#pragma pack(1)
1990	typedef struct MptConfigurationPageBIOS1
1991	{
1992	/** Union. */
1993	union
1994	{
1995	/** Byte view. */
1996	uint8_t abPageData[48];
1997	/** Field view. */
1998	struct
1999	{
2000	/** The omnipresent header. */
2001	MptConfigurationPageHeader Header;
2002	/** BIOS options */
2003	uint32_t u32BiosOptions;
2004	/** IOC settings */
2005	uint32_t u32IOCSettings;
2006	/** Reserved */
2007	uint32_t u32Reserved;
2008	/** Device settings */
2009	uint32_t u32DeviceSettings;
2010	/** Number of devices */
2011	uint16_t u16NumberOfDevices;
2012	/** Expander spinup */
2013	uint8_t u8ExpanderSpinup;
2014	/** Reserved */
2015	uint8_t u8Reserved;
2016	/** I/O timeout of block devices without removable media */
2017	uint16_t u16IOTimeoutBlockDevicesNonRM;
2018	/** I/O timeout sequential */
2019	uint16_t u16IOTimeoutSequential;
2020	/** I/O timeout other */
2021	uint16_t u16IOTimeoutOther;
2022	/** I/O timeout of block devices with removable media */
2023	uint16_t u16IOTimeoutBlockDevicesRM;
2024	} fields;
2025	} u;
2026	} MptConfigurationPageBIOS1, *PMptConfigurationPageBIOS1;
2027	#pragma pack()
2028	AssertCompileSize(MptConfigurationPageBIOS1, 48);
2029
2030	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_DISABLE RT_BIT(0)
2031	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_SCAN_FROM_HIGH_TO_LOW RT_BIT(1)
2032	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SAS_SUPPORT RT_BIT(8)
2033	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_FC_SUPPORT RT_BIT(9)
2034	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SPI_SUPPORT RT_BIT(10)
2035
2036	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ALTERNATE_CHS RT_BIT(3)
2037
2038	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_SET(x) ((x) << 4)
2039	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_DISABLED 0x00
2040	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BIOS_ONLY 0x01
2041	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_OS_ONLY 0x02
2042	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BOT 0x03
2043
2044	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_SET(x) ((x) << 6)
2045	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_NO_INT13H 0x00
2046	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_BOOT_MEDIA_INT13H 0x01
2047	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_INT13H 0x02
2048
2049	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_SET(x) ((x & 0xF) << 8)
2050	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_GET(x) ((x >> 8) & 0x0F)
2051	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_SET(x) ((x & 0xF) << 12)
2052	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_GET(x) ((x >> 12) & 0x0F)
2053
2054	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SET(x) (((x) & 0x3) << 16)
2055	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_ENCLOSURE 0x0
2056	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SAS_ADDRESS 0x1
2057
2058	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_DIRECT_ATTACH_SPINUP_MODE_ALL RT_BIT(18)
2059	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_AUTO_PORT_ENABLE RT_BIT(19)
2060
2061	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_SET(x) (((x) & 0xF) << 20)
2062	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_GET(x) ((x >> 20) & 0x0F)
2063
2064	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_SET(x) (((x) & 0xF) << 24)
2065	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_GET(x) ((x >> 24) & 0x0F)
2066
2067	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS RT_BIT(0)
2068	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_NON_REMOVABLE_DEVICES RT_BIT(1)
2069	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_REMOVABLE_DEVICES RT_BIT(2)
2070	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS2 RT_BIT(3)
2071	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_SMART_POLLING RT_BIT(4)
2072
2073	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_SET(x) ((x) & 0x0F)
2074	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_GET(x) ((x) & 0x0F)
2075	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_SET(x) (((x) & 0x0F) << 4)
2076	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_GET(x) ((x >> 4) & 0x0F)
2077
2078	/**
2079	* BIOS page 2 - Read/write.
2080	*/
2081	#pragma pack(1)
2082	typedef struct MptConfigurationPageBIOS2
2083	{
2084	/** Union. */
2085	union
2086	{
2087	/** Byte view. */
2088	uint8_t abPageData[384];
2089	/** Field view. */
2090	struct
2091	{
2092	/** The omnipresent header. */
2093	MptConfigurationPageHeader Header;
2094	/** Reserved */
2095	uint32_t au32Reserved[6];
2096	/** Format of the boot device field. */
2097	uint8_t u8BootDeviceForm;
2098	/** Previous format of the boot device field. */
2099	uint8_t u8PrevBootDeviceForm;
2100	/** Reserved */
2101	uint16_t u16Reserved;
2102	/** Boot device fields - dependent on the format */
2103	union
2104	{
2105	/** Device for AdapterNumber:Bus:Target:LUN */
2106	struct
2107	{
2108	/** Target ID */
2109	uint8_t u8TargetID;
2110	/** Bus */
2111	uint8_t u8Bus;
2112	/** Adapter Number */
2113	uint8_t u8AdapterNumber;
2114	/** Reserved */
2115	uint8_t u8Reserved;
2116	/** Reserved */
2117	uint32_t au32Reserved[3];
2118	/** LUN */
2119	uint32_t aLUN[5];
2120	/** Reserved */
2121	uint32_t au32Reserved2[56];
2122	} AdapterNumberBusTargetLUN;
2123	/** Device for PCIAddress:Bus:Target:LUN */
2124	struct
2125	{
2126	/** Target ID */
2127	uint8_t u8TargetID;
2128	/** Bus */
2129	uint8_t u8Bus;
2130	/** Adapter Number */
2131	uint16_t u16PCIAddress;
2132	/** Reserved */
2133	uint32_t au32Reserved[3];
2134	/** LUN */
2135	uint32_t aLUN[5];
2136	/** Reserved */
2137	uint32_t au32Reserved2[56];
2138	} PCIAddressBusTargetLUN;
2139	/** Device for PCISlotNo:Bus:Target:LUN */
2140	struct
2141	{
2142	/** Target ID */
2143	uint8_t u8TargetID;
2144	/** Bus */
2145	uint8_t u8Bus;
2146	/** PCI Slot Number */
2147	uint8_t u16PCISlotNo;
2148	/** Reserved */
2149	uint32_t au32Reserved[3];
2150	/** LUN */
2151	uint32_t aLUN[5];
2152	/** Reserved */
2153	uint32_t au32Reserved2[56];
2154	} PCIAddressBusSlotLUN;
2155	/** Device for FC channel world wide name */
2156	struct
2157	{
2158	/** World wide port name low */
2159	uint32_t u32WorldWidePortNameLow;
2160	/** World wide port name high */
2161	uint32_t u32WorldWidePortNameHigh;
2162	/** Reserved */
2163	uint32_t au32Reserved[3];
2164	/** LUN */
2165	uint32_t aLUN[5];
2166	/** Reserved */
2167	uint32_t au32Reserved2[56];
2168	} FCWorldWideName;
2169	/** Device for FC channel world wide name */
2170	struct
2171	{
2172	/** SAS address */
2173	SASADDRESS SASAddress;
2174	/** Reserved */
2175	uint32_t au32Reserved[3];
2176	/** LUN */
2177	uint32_t aLUN[5];
2178	/** Reserved */
2179	uint32_t au32Reserved2[56];
2180	} SASWorldWideName;
2181	/** Device for Enclosure/Slot */
2182	struct
2183	{
2184	/** Enclosure logical ID */
2185	uint64_t u64EnclosureLogicalID;
2186	/** Reserved */
2187	uint32_t au32Reserved[3];
2188	/** LUN */
2189	uint32_t aLUN[5];
2190	/** Reserved */
2191	uint32_t au32Reserved2[56];
2192	} EnclosureSlot;
2193	} BootDevice;
2194	} fields;
2195	} u;
2196	} MptConfigurationPageBIOS2, *PMptConfigurationPageBIOS2;
2197	#pragma pack()
2198	AssertCompileSize(MptConfigurationPageBIOS2, 384);
2199
2200	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SET(x) ((x) & 0x0F)
2201	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FIRST 0x0
2202	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ADAPTER_BUS_TARGET_LUN 0x1
2203	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCIADDR_BUS_TARGET_LUN 0x2
2204	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCISLOT_BUS_TARGET_LUN 0x3
2205	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FC_WWN 0x4
2206	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SAS_WWN 0x5
2207	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ENCLOSURE_SLOT 0x6
2208
2209	/**
2210	* BIOS page 4 - Read/Write (Where is 3? - not defined in the spec)
2211	*/
2212	#pragma pack(1)
2213	typedef struct MptConfigurationPageBIOS4
2214	{
2215	/** Union. */
2216	union
2217	{
2218	/** Byte view. */
2219	uint8_t abPageData[12];
2220	/** Field view. */
2221	struct
2222	{
2223	/** The omnipresent header. */
2224	MptConfigurationPageHeader Header;
2225	/** Reassignment Base WWID */
2226	uint64_t u64ReassignmentBaseWWID;
2227	} fields;
2228	} u;
2229	} MptConfigurationPageBIOS4, *PMptConfigurationPageBIOS4;
2230	#pragma pack()
2231	AssertCompileSize(MptConfigurationPageBIOS4, 12);
2232
2233	/**
2234	* SCSI-SPI port page 0. - Readonly
2235	*/
2236	#pragma pack(1)
2237	typedef struct MptConfigurationPageSCSISPIPort0
2238	{
2239	/** Union. */
2240	union
2241	{
2242	/** Byte view. */
2243	uint8_t abPageData[12];
2244	/** Field view. */
2245	struct
2246	{
2247	/** The omnipresent header. */
2248	MptConfigurationPageHeader Header;
2249	/** Flag whether this port is information unit transfers capable. */
2250	unsigned fInformationUnitTransfersCapable: 1;
2251	/** Flag whether the port is DT (Dual Transfer) capable. */
2252	unsigned fDTCapable: 1;
2253	/** Flag whether the port is QAS (Quick Arbitrate and Select) capable. */
2254	unsigned fQASCapable: 1;
2255	/** Reserved. */
2256	unsigned u5Reserved1: 5;
2257	/** Minimum Synchronous transfer period. */
2258	unsigned u8MinimumSynchronousTransferPeriod: 8;
2259	/** Maximum synchronous offset. */
2260	unsigned u8MaximumSynchronousOffset: 8;
2261	/** Reserved. */
2262	unsigned u5Reserved2: 5;
2263	/** Flag whether indicating the width of the bus - 0 narrow and 1 for wide. */
2264	unsigned fWide: 1;
2265	/** Reserved */
2266	unsigned fReserved: 1;
2267	/** Flag whether the port is AIP (Asynchronous Information Protection) capable. */
2268	unsigned fAIPCapable: 1;
2269	/** Signaling Type. */
2270	unsigned u2SignalingType: 2;
2271	/** Reserved. */
2272	unsigned u30Reserved: 30;
2273	} fields;
2274	} u;
2275	} MptConfigurationPageSCSISPIPort0, *PMptConfigurationPageSCSISPIPort0;
2276	#pragma pack()
2277	AssertCompileSize(MptConfigurationPageSCSISPIPort0, 12);
2278
2279	/**
2280	* SCSI-SPI port page 1. - Read/Write
2281	*/
2282	#pragma pack(1)
2283	typedef struct MptConfigurationPageSCSISPIPort1
2284	{
2285	/** Union. */
2286	union
2287	{
2288	/** Byte view. */
2289	uint8_t abPageData[12];
2290	/** Field view. */
2291	struct
2292	{
2293	/** The omnipresent header. */
2294	MptConfigurationPageHeader Header;
2295	/** The SCSI ID of the port. */
2296	uint8_t u8SCSIID;
2297	/** Reserved. */
2298	uint8_t u8Reserved;
2299	/** Port response IDs Bit mask field. */
2300	uint16_t u16PortResponseIDsBitmask;
2301	/** Value for the on BUS timer. */
2302	uint32_t u32OnBusTimerValue;
2303	} fields;
2304	} u;
2305	} MptConfigurationPageSCSISPIPort1, *PMptConfigurationPageSCSISPIPort1;
2306	#pragma pack()
2307	AssertCompileSize(MptConfigurationPageSCSISPIPort1, 12);
2308
2309	/**
2310	* Device settings for one device.
2311	*/
2312	#pragma pack(1)
2313	typedef struct MptDeviceSettings
2314	{
2315	/** Timeout for I/O in seconds. */
2316	unsigned u8Timeout: 8;
2317	/** Minimum synchronous factor. */
2318	unsigned u8SyncFactor: 8;
2319	/** Flag whether disconnect is enabled. */
2320	unsigned fDisconnectEnable: 1;
2321	/** Flag whether Scan ID is enabled. */
2322	unsigned fScanIDEnable: 1;
2323	/** Flag whether Scan LUNs is enabled. */
2324	unsigned fScanLUNEnable: 1;
2325	/** Flag whether tagged queuing is enabled. */
2326	unsigned fTaggedQueuingEnabled: 1;
2327	/** Flag whether wide is enabled. */
2328	unsigned fWideDisable: 1;
2329	/** Flag whether this device is bootable. */
2330	unsigned fBootChoice: 1;
2331	/** Reserved. */
2332	unsigned u10Reserved: 10;
2333	} MptDeviceSettings, *PMptDeviceSettings;
2334	#pragma pack()
2335	AssertCompileSize(MptDeviceSettings, 4);
2336
2337	/**
2338	* SCSI-SPI port page 2. - Read/Write for the BIOS
2339	*/
2340	#pragma pack(1)
2341	typedef struct MptConfigurationPageSCSISPIPort2
2342	{
2343	/** Union. */
2344	union
2345	{
2346	/** Byte view. */
2347	uint8_t abPageData[76];
2348	/** Field view. */
2349	struct
2350	{
2351	/** The omnipresent header. */
2352	MptConfigurationPageHeader Header;
2353	/** Flag indicating the bus scan order. */
2354	unsigned fBusScanOrderHighToLow: 1;
2355	/** Reserved. */
2356	unsigned fReserved: 1;
2357	/** Flag whether SCSI Bus resets are avoided. */
2358	unsigned fAvoidSCSIBusResets: 1;
2359	/** Flag whether alternate CHS is used. */
2360	unsigned fAlternateCHS: 1;
2361	/** Flag whether termination is disabled. */
2362	unsigned fTerminationDisabled: 1;
2363	/** Reserved. */
2364	unsigned u27Reserved: 27;
2365	/** Host SCSI ID. */
2366	unsigned u4HostSCSIID: 4;
2367	/** Initialize HBA. */
2368	unsigned u2InitializeHBA: 2;
2369	/** Removeable media setting. */
2370	unsigned u2RemovableMediaSetting: 2;
2371	/** Spinup delay. */
2372	unsigned u4SpinupDelay: 4;
2373	/** Negotiating settings. */
2374	unsigned u2NegotitatingSettings: 2;
2375	/** Reserved. */
2376	unsigned u18Reserved: 18;
2377	/** Device Settings. */
2378	MptDeviceSettings aDeviceSettings[16];
2379	} fields;
2380	} u;
2381	} MptConfigurationPageSCSISPIPort2, *PMptConfigurationPageSCSISPIPort2;
2382	#pragma pack()
2383	AssertCompileSize(MptConfigurationPageSCSISPIPort2, 76);
2384
2385	/**
2386	* SCSI-SPI device page 0. - Readonly
2387	*/
2388	#pragma pack(1)
2389	typedef struct MptConfigurationPageSCSISPIDevice0
2390	{
2391	/** Union. */
2392	union
2393	{
2394	/** Byte view. */
2395	uint8_t abPageData[12];
2396	/** Field view. */
2397	struct
2398	{
2399	/** The omnipresent header. */
2400	MptConfigurationPageHeader Header;
2401	/** Negotiated Parameters. */
2402	/** Information Units enabled. */
2403	unsigned fInformationUnitsEnabled: 1;
2404	/** Dual Transfers Enabled. */
2405	unsigned fDTEnabled: 1;
2406	/** QAS enabled. */
2407	unsigned fQASEnabled: 1;
2408	/** Reserved. */
2409	unsigned u5Reserved1: 5;
2410	/** Synchronous Transfer period. */
2411	unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2412	/** Synchronous offset. */
2413	unsigned u8NegotiatedSynchronousOffset: 8;
2414	/** Reserved. */
2415	unsigned u5Reserved2: 5;
2416	/** Width - 0 for narrow and 1 for wide. */
2417	unsigned fWide: 1;
2418	/** Reserved. */
2419	unsigned fReserved: 1;
2420	/** AIP enabled. */
2421	unsigned fAIPEnabled: 1;
2422	/** Flag whether negotiation occurred. */
2423	unsigned fNegotationOccured: 1;
2424	/** Flag whether a SDTR message was rejected. */
2425	unsigned fSDTRRejected: 1;
2426	/** Flag whether a WDTR message was rejected. */
2427	unsigned fWDTRRejected: 1;
2428	/** Flag whether a PPR message was rejected. */
2429	unsigned fPPRRejected: 1;
2430	/** Reserved. */
2431	unsigned u28Reserved: 28;
2432	} fields;
2433	} u;
2434	} MptConfigurationPageSCSISPIDevice0, *PMptConfigurationPageSCSISPIDevice0;
2435	#pragma pack()
2436	AssertCompileSize(MptConfigurationPageSCSISPIDevice0, 12);
2437
2438	/**
2439	* SCSI-SPI device page 1. - Read/Write
2440	*/
2441	#pragma pack(1)
2442	typedef struct MptConfigurationPageSCSISPIDevice1
2443	{
2444	/** Union. */
2445	union
2446	{
2447	/** Byte view. */
2448	uint8_t abPageData[16];
2449	/** Field view. */
2450	struct
2451	{
2452	/** The omnipresent header. */
2453	MptConfigurationPageHeader Header;
2454	/** Requested Parameters. */
2455	/** Information Units enable. */
2456	bool fInformationUnitsEnable: 1;
2457	/** Dual Transfers Enable. */
2458	bool fDTEnable: 1;
2459	/** QAS enable. */
2460	bool fQASEnable: 1;
2461	/** Reserved. */
2462	unsigned u5Reserved1: 5;
2463	/** Synchronous Transfer period. */
2464	unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2465	/** Synchronous offset. */
2466	unsigned u8NegotiatedSynchronousOffset: 8;
2467	/** Reserved. */
2468	unsigned u5Reserved2: 5;
2469	/** Width - 0 for narrow and 1 for wide. */
2470	bool fWide: 1;
2471	/** Reserved. */
2472	bool fReserved1: 1;
2473	/** AIP enable. */
2474	bool fAIPEnable: 1;
2475	/** Reserved. */
2476	bool fReserved2: 1;
2477	/** WDTR disallowed. */
2478	bool fWDTRDisallowed: 1;
2479	/** SDTR disallowed. */
2480	bool fSDTRDisallowed: 1;
2481	/** Reserved. */
2482	unsigned u29Reserved: 29;
2483	} fields;
2484	} u;
2485	} MptConfigurationPageSCSISPIDevice1, *PMptConfigurationPageSCSISPIDevice1;
2486	#pragma pack()
2487	AssertCompileSize(MptConfigurationPageSCSISPIDevice1, 16);
2488
2489	/**
2490	* SCSI-SPI device page 2. - Read/Write
2491	*/
2492	#pragma pack(1)
2493	typedef struct MptConfigurationPageSCSISPIDevice2
2494	{
2495	/** Union. */
2496	union
2497	{
2498	/** Byte view. */
2499	uint8_t abPageData[16];
2500	/** Field view. */
2501	struct
2502	{
2503	/** The omnipresent header. */
2504	MptConfigurationPageHeader Header;
2505	/** Reserved. */
2506	unsigned u4Reserved: 4;
2507	/** ISI enable. */
2508	unsigned fISIEnable: 1;
2509	/** Secondary driver enable. */
2510	unsigned fSecondaryDriverEnable: 1;
2511	/** Reserved. */
2512	unsigned fReserved: 1;
2513	/** Slew create controller. */
2514	unsigned u3SlewRateControler: 3;
2515	/** Primary drive strength controller. */
2516	unsigned u3PrimaryDriveStrengthControl: 3;
2517	/** Secondary drive strength controller. */
2518	unsigned u3SecondaryDriveStrengthControl: 3;
2519	/** Reserved. */
2520	unsigned u12Reserved: 12;
2521	/** XCLKH_ST. */
2522	unsigned fXCLKH_ST: 1;
2523	/** XCLKS_ST. */
2524	unsigned fXCLKS_ST: 1;
2525	/** XCLKH_DT. */
2526	unsigned fXCLKH_DT: 1;
2527	/** XCLKS_DT. */
2528	unsigned fXCLKS_DT: 1;
2529	/** Parity pipe select. */
2530	unsigned u2ParityPipeSelect: 2;
2531	/** Reserved. */
2532	unsigned u30Reserved: 30;
2533	/** Data bit pipeline select. */
2534	unsigned u32DataPipelineSelect: 32;
2535	} fields;
2536	} u;
2537	} MptConfigurationPageSCSISPIDevice2, *PMptConfigurationPageSCSISPIDevice2;
2538	#pragma pack()
2539	AssertCompileSize(MptConfigurationPageSCSISPIDevice2, 16);
2540
2541	/**
2542	* SCSI-SPI device page 3 (Revision G). - Readonly
2543	*/
2544	#pragma pack(1)
2545	typedef struct MptConfigurationPageSCSISPIDevice3
2546	{
2547	/** Union. */
2548	union
2549	{
2550	/** Byte view. */
2551	uint8_t abPageData[1];
2552	/** Field view. */
2553	struct
2554	{
2555	/** The omnipresent header. */
2556	MptConfigurationPageHeader Header;
2557	/** Number of times the IOC rejected a message because it doesn't support the operation. */
2558	uint16_t u16MsgRejectCount;
2559	/** Number of times the SCSI bus entered an invalid operation state. */
2560	uint16_t u16PhaseErrorCount;
2561	/** Number of parity errors. */
2562	uint16_t u16ParityCount;
2563	/** Reserved. */
2564	uint16_t u16Reserved;
2565	} fields;
2566	} u;
2567	} MptConfigurationPageSCSISPIDevice3, *PMptConfigurationPageSCSISPIDevice3;
2568	#pragma pack()
2569	AssertCompileSize(MptConfigurationPageSCSISPIDevice3, 12);
2570
2571	/**
2572	* PHY entry for the SAS I/O unit page 0
2573	*/
2574	#pragma pack(1)
2575	typedef struct MptConfigurationPageSASIOUnit0PHY
2576	{
2577	/** Port number */
2578	uint8_t u8Port;
2579	/** Port flags */
2580	uint8_t u8PortFlags;
2581	/** Phy flags */
2582	uint8_t u8PhyFlags;
2583	/** negotiated link rate */
2584	uint8_t u8NegotiatedLinkRate;
2585	/** Controller phy device info */
2586	uint32_t u32ControllerPhyDeviceInfo;
2587	/** Attached device handle */
2588	uint16_t u16AttachedDevHandle;
2589	/** Controller device handle */
2590	uint16_t u16ControllerDevHandle;
2591	/** Discovery status */
2592	uint32_t u32DiscoveryStatus;
2593	} MptConfigurationPageSASIOUnit0PHY, *PMptConfigurationPageSASIOUnit0PHY;
2594	#pragma pack()
2595	AssertCompileSize(MptConfigurationPageSASIOUnit0PHY, 16);
2596
2597	/**
2598	* SAS I/O Unit page 0 - Readonly
2599	*/
2600	#pragma pack(1)
2601	typedef struct MptConfigurationPageSASIOUnit0
2602	{
2603	/** Union. */
2604	union
2605	{
2606	/** Byte view - variable. */
2607	uint8_t abPageData[1];
2608	/** Field view. */
2609	struct
2610	{
2611	/** The omnipresent header. */
2612	MptExtendedConfigurationPageHeader ExtHeader;
2613	/** Nvdata version default */
2614	uint16_t u16NvdataVersionDefault;
2615	/** Nvdata version persistent */
2616	uint16_t u16NvdataVersionPersistent;
2617	/** Number of physical ports */
2618	uint8_t u8NumPhys;
2619	/** Reserved */
2620	uint8_t au8Reserved[3];
2621	/** Content for each physical port - variable depending on the amount of ports. */
2622	MptConfigurationPageSASIOUnit0PHY aPHY[1];
2623	} fields;
2624	} u;
2625	} MptConfigurationPageSASIOUnit0, *PMptConfigurationPageSASIOUnit0;
2626	#pragma pack()
2627	AssertCompileSize(MptConfigurationPageSASIOUnit0, 8+2+2+1+3+sizeof(MptConfigurationPageSASIOUnit0PHY));
2628
2629	#define LSILOGICSCSI_SASIOUNIT0_GET_SIZE(ports) (sizeof(MptConfigurationPageSASIOUnit0) + ((ports) - 1) * sizeof(MptConfigurationPageSASIOUnit0PHY))
2630
2631	#define LSILOGICSCSI_SASIOUNIT0_PORT_CONFIGURATION_AUTO RT_BIT(0)
2632	#define LSILOGICSCSI_SASIOUNIT0_PORT_TARGET_IOC RT_BIT(2)
2633	#define LSILOGICSCSI_SASIOUNIT0_PORT_DISCOVERY_IN_STATUS RT_BIT(3)
2634
2635	#define LSILOGICSCSI_SASIOUNIT0_PHY_RX_INVERTED RT_BIT(0)
2636	#define LSILOGICSCSI_SASIOUNIT0_PHY_TX_INVERTED RT_BIT(1)
2637	#define LSILOGICSCSI_SASIOUNIT0_PHY_DISABLED RT_BIT(2)
2638
2639	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SET(x) ((x) & 0x0F)
2640	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_GET(x) ((x) & 0x0F)
2641	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_UNKNOWN 0x00
2642	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_DISABLED 0x01
2643	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_FAILED 0x02
2644	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SATA_OOB 0x03
2645	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_15GB 0x08
2646	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_30GB 0x09
2647
2648	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(x) ((x) & 0x3)
2649	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_NO 0x0
2650	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_END 0x1
2651	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_EDGE_EXPANDER 0x2
2652	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2653
2654	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA_HOST RT_BIT(3)
2655	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_INITIATOR RT_BIT(4)
2656	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_INITIATOR RT_BIT(5)
2657	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_INITIATOR RT_BIT(6)
2658	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA RT_BIT(7)
2659	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_TARGET RT_BIT(8)
2660	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_TARGET RT_BIT(9)
2661	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_TARGET RT_BIT(10)
2662	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2663	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_LSI RT_BIT(12)
2664	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_ATAPI_DEVICE RT_BIT(13)
2665	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SEP_DEVICE RT_BIT(14)
2666
2667	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_LOOP RT_BIT(0)
2668	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNADDRESSABLE RT_BIT(1)
2669	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SAME_SAS_ADDR RT_BIT(2)
2670	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXPANDER_ERROR RT_BIT(3)
2671	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_TIMEOUT RT_BIT(4)
2672	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_OOE RT_BIT(5)
2673	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_IDX RT_BIT(6)
2674	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_FUNC_FAILED RT_BIT(7)
2675	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_CRC_ERROR RT_BIT(8)
2676	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SUBTRSCTIVE_LNK RT_BIT(9)
2677	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_TBL_LNK RT_BIT(10)
2678	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNSUPPORTED_DEV RT_BIT(11)
2679	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MAX_SATA_TGTS RT_BIT(12)
2680	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MULT_CTRLS RT_BIT(13)
2681
2682	/**
2683	* PHY entry for the SAS I/O unit page 1
2684	*/
2685	#pragma pack(1)
2686	typedef struct MptConfigurationPageSASIOUnit1PHY
2687	{
2688	/** Port number */
2689	uint8_t u8Port;
2690	/** Port flags */
2691	uint8_t u8PortFlags;
2692	/** Phy flags */
2693	uint8_t u8PhyFlags;
2694	/** Max link rate */
2695	uint8_t u8MaxMinLinkRate;
2696	/** Controller phy device info */
2697	uint32_t u32ControllerPhyDeviceInfo;
2698	/** Maximum target port connect time */
2699	uint16_t u16MaxTargetPortConnectTime;
2700	/** Reserved */
2701	uint16_t u16Reserved;
2702	} MptConfigurationPageSASIOUnit1PHY, *PMptConfigurationPageSASIOUnit1PHY;
2703	#pragma pack()
2704	AssertCompileSize(MptConfigurationPageSASIOUnit1PHY, 12);
2705
2706	/**
2707	* SAS I/O Unit page 1 - Read/Write
2708	*/
2709	#pragma pack(1)
2710	typedef struct MptConfigurationPageSASIOUnit1
2711	{
2712	/** Union. */
2713	union
2714	{
2715	/** Byte view - variable. */
2716	uint8_t abPageData[1];
2717	/** Field view. */
2718	struct
2719	{
2720	/** The omnipresent header. */
2721	MptExtendedConfigurationPageHeader ExtHeader;
2722	/** Control flags */
2723	uint16_t u16ControlFlags;
2724	/** maximum number of SATA targets */
2725	uint16_t u16MaxNumSATATargets;
2726	/** additional control flags */
2727	uint16_t u16AdditionalControlFlags;
2728	/** Reserved */
2729	uint16_t u16Reserved;
2730	/** Number of PHYs */
2731	uint8_t u8NumPhys;
2732	/** maximum SATA queue depth */
2733	uint8_t u8SATAMaxQDepth;
2734	/** Delay for reporting missing devices. */
2735	uint8_t u8ReportDeviceMissingDelay;
2736	/** I/O device missing delay */
2737	uint8_t u8IODeviceMissingDelay;
2738	/** Content for each physical port - variable depending on the number of ports */
2739	MptConfigurationPageSASIOUnit1PHY aPHY[1];
2740	} fields;
2741	} u;
2742	} MptConfigurationPageSASIOUnit1, *PMptConfigurationPageSASIOUnit1;
2743	#pragma pack()
2744	AssertCompileSize(MptConfigurationPageSASIOUnit1, 8+12+sizeof(MptConfigurationPageSASIOUnit1PHY));
2745
2746	#define LSILOGICSCSI_SASIOUNIT1_GET_SIZE(ports) (sizeof(MptConfigurationPageSASIOUnit1) + ((ports) - 1) * sizeof(MptConfigurationPageSASIOUnit1PHY))
2747
2748	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_CLEAR_SATA_AFFILIATION RT_BIT(0)
2749	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_FIRST_LEVEL_DISCOVERY_ONLY RT_BIT(1)
2750	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SUBTRACTIVE_LNK_ILLEGAL RT_BIT(2)
2751	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_IOC_ENABLE_HIGH_PHY RT_BIT(3)
2752	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED RT_BIT(4)
2753	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED RT_BIT(5)
2754	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED RT_BIT(6)
2755	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LBA48_REQUIRED RT_BIT(7)
2756	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_INIT_POSTPONED RT_BIT(8)
2757
2758	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SET(x) (((x) & 0x3) << 9)
2759	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_GET(x) (((x) >> 9) & 0x3)
2760	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS_AND_SATA 0x00
2761	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS 0x01
2762	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SATA 0x02
2763
2764	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_EXP_ADDR RT_BIT(11)
2765	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SETTINGS_PRESERV_REQUIRED RT_BIT(12)
2766	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_15GB RT_BIT(13)
2767	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_30GB RT_BIT(14)
2768	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SAS_SELF_TEST_ENABLED RT_BIT(15)
2769
2770	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_TBL_LNKS_ALLOW RT_BIT(0)
2771	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_NO_AFFIL RT_BIT(1)
2772	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_SELF_AFFIL RT_BIT(2)
2773	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_OTHER_AFFIL RT_BIT(3)
2774	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_PORT_EN_ONLY RT_BIT(4)
2775	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_HIDE_NON_ZERO_PHYS RT_BIT(5)
2776	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_ASYNC_NOTIF RT_BIT(6)
2777	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_MULT_PORTS_ILL_SAME_DOMAIN RT_BIT(7)
2778
2779	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_UNITS_16_SEC RT_BIT(7)
2780	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_SET(x) ((x) & 0x7F)
2781	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_GET(x) ((x) & 0x7F)
2782
2783	#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_AUTO RT_BIT(0)
2784	#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_IOC1 RT_BIT(2)
2785
2786	#define LSILOGICSCSI_SASIOUNIT1_PHY_RX_INVERT RT_BIT(0)
2787	#define LSILOGICSCSI_SASIOUNIT1_PHY_TX_INVERT RT_BIT(1)
2788	#define LSILOGICSCSI_SASIOUNIT1_PHY_DISABLE RT_BIT(2)
2789
2790	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_SET(x) ((x) & 0x0F)
2791	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_GET(x) ((x) & 0x0F)
2792	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_SET(x) (((x) & 0x0F) << 4)
2793	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_GET(x) ((x >> 4) & 0x0F)
2794	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_15GB 0x8
2795	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_30GB 0x9
2796
2797	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_SET(x) ((x) & 0x3)
2798	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_GET(x) ((x) & 0x3)
2799	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_NO 0x0
2800	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_END 0x1
2801	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_EDGE_EXPANDER 0x2
2802	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2803	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_INITIATOR RT_BIT(4)
2804	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_INITIATOR RT_BIT(5)
2805	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_INITIATOR RT_BIT(6)
2806	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_TARGET RT_BIT(8)
2807	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_TARGET RT_BIT(9)
2808	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_TARGET RT_BIT(10)
2809	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2810	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_LSI RT_BIT(12)
2811	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_ATAPI RT_BIT(13)
2812	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SEP RT_BIT(14)
2813
2814	/**
2815	* SAS I/O unit page 2 - Read/Write
2816	*/
2817	#pragma pack(1)
2818	typedef struct MptConfigurationPageSASIOUnit2
2819	{
2820	/** Union. */
2821	union
2822	{
2823	/** Byte view - variable. */
2824	uint8_t abPageData[1];
2825	/** Field view. */
2826	struct
2827	{
2828	/** The omnipresent header. */
2829	MptExtendedConfigurationPageHeader ExtHeader;
2830	/** Device numbers per enclosure */
2831	uint8_t u8NumDevsPerEnclosure;
2832	/** Boot device wait time */
2833	uint8_t u8BootDeviceWaitTime;
2834	/** Reserved */
2835	uint16_t u16Reserved;
2836	/** Maximum number of persistent Bus and target ID mappings */
2837	uint16_t u16MaxPersistentIDs;
2838	/** Number of persistent IDs used */
2839	uint16_t u16NumPersistentIDsUsed;
2840	/** Status */
2841	uint8_t u8Status;
2842	/** Flags */
2843	uint8_t u8Flags;
2844	/** Maximum number of physical mapped IDs */
2845	uint16_t u16MaxNumPhysicalMappedIDs;
2846	} fields;
2847	} u;
2848	} MptConfigurationPageSASIOUnit2, *PMptConfigurationPageSASIOUnit2;
2849	#pragma pack()
2850	AssertCompileSize(MptConfigurationPageSASIOUnit2, 20);
2851
2852	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_TBL_FULL RT_BIT(0)
2853	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_DISABLED RT_BIT(1)
2854	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_ENC_DEV_UNMAPPED RT_BIT(2)
2855	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_DEV_LIMIT_EXCEEDED RT_BIT(3)
2856
2857	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_MAP_DISABLE RT_BIT(0)
2858	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_SET(x) ((x & 0x7) << 1)
2859	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_GET(x) ((x >> 1) & 0x7)
2860	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_NO 0x0
2861	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_DIRECT_ATTACHED 0x1
2862	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_ENC 0x2
2863	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_HOST 0x7
2864	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_RESERVE_TARGET_ID_ZERO RT_BIT(4)
2865	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_START_SLOT_NUMBER_ONE RT_BIT(5)
2866
2867	/**
2868	* SAS I/O unit page 3 - Read/Write
2869	*/
2870	#pragma pack(1)
2871	typedef struct MptConfigurationPageSASIOUnit3
2872	{
2873	/** Union. */
2874	union
2875	{
2876	/** Byte view - variable. */
2877	uint8_t abPageData[1];
2878	/** Field view. */
2879	struct
2880	{
2881	/** The omnipresent header. */
2882	MptExtendedConfigurationPageHeader ExtHeader;
2883	/** Reserved */
2884	uint32_t u32Reserved;
2885	uint32_t u32MaxInvalidDwordCount;
2886	uint32_t u32InvalidDwordCountTime;
2887	uint32_t u32MaxRunningDisparityErrorCount;
2888	uint32_t u32RunningDisparityErrorTime;
2889	uint32_t u32MaxLossDwordSynchCount;
2890	uint32_t u32LossDwordSynchCountTime;
2891	uint32_t u32MaxPhysResetProblemCount;
2892	uint32_t u32PhyResetProblemTime;
2893	} fields;
2894	} u;
2895	} MptConfigurationPageSASIOUnit3, *PMptConfigurationPageSASIOUnit3;
2896	#pragma pack()
2897	AssertCompileSize(MptConfigurationPageSASIOUnit3, 44);
2898
2899	/**
2900	* SAS PHY page 0 - Readonly
2901	*/
2902	#pragma pack(1)
2903	typedef struct MptConfigurationPageSASPHY0
2904	{
2905	/** Union. */
2906	union
2907	{
2908	/** Byte view - variable. */
2909	uint8_t abPageData[1];
2910	/** Field view. */
2911	struct
2912	{
2913	/** The omnipresent header. */
2914	MptExtendedConfigurationPageHeader ExtHeader;
2915	/** Owner dev handle. */
2916	uint16_t u16OwnerDevHandle;
2917	/** Reserved */
2918	uint16_t u16Reserved0;
2919	/** SAS address */
2920	SASADDRESS SASAddress;
2921	/** Attached device handle */
2922	uint16_t u16AttachedDevHandle;
2923	/** Attached phy identifier */
2924	uint8_t u8AttachedPhyIdentifier;
2925	/** Reserved */
2926	uint8_t u8Reserved1;
2927	/** Attached device information */
2928	uint32_t u32AttachedDeviceInfo;
2929	/** Programmed link rate */
2930	uint8_t u8ProgrammedLinkRate;
2931	/** Hardware link rate */
2932	uint8_t u8HwLinkRate;
2933	/** Change count */
2934	uint8_t u8ChangeCount;
2935	/** Flags */
2936	uint8_t u8Flags;
2937	/** Phy information */
2938	uint32_t u32PhyInfo;
2939	} fields;
2940	} u;
2941	} MptConfigurationPageSASPHY0, *PMptConfigurationPageSASPHY0;
2942	#pragma pack()
2943	AssertCompileSize(MptConfigurationPageSASPHY0, 36);
2944
2945	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
2946	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
2947	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_NO 0x0
2948	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_END 0x1
2949	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
2950	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2951	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
2952	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
2953	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
2954	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
2955	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
2956	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
2957	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2958	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_LSI RT_BIT(12)
2959	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
2960	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SEP RT_BIT(14)
2961
2962	/**
2963	* SAS PHY page 1 - Readonly
2964	*/
2965	#pragma pack(1)
2966	typedef struct MptConfigurationPageSASPHY1
2967	{
2968	/** Union. */
2969	union
2970	{
2971	/** Byte view - variable. */
2972	uint8_t abPageData[1];
2973	/** Field view. */
2974	struct
2975	{
2976	/** The omnipresent header. */
2977	MptExtendedConfigurationPageHeader ExtHeader;
2978	/** Reserved */
2979	uint32_t u32Reserved0;
2980	uint32_t u32InvalidDwordCound;
2981	uint32_t u32RunningDisparityErrorCount;
2982	uint32_t u32LossDwordSynchCount;
2983	uint32_t u32PhyResetProblemCount;
2984	} fields;
2985	} u;
2986	} MptConfigurationPageSASPHY1, *PMptConfigurationPageSASPHY1;
2987	#pragma pack()
2988	AssertCompileSize(MptConfigurationPageSASPHY1, 28);
2989
2990	/**
2991	* SAS Device page 0 - Readonly
2992	*/
2993	#pragma pack(1)
2994	typedef struct MptConfigurationPageSASDevice0
2995	{
2996	/** Union. */
2997	union
2998	{
2999	/** Byte view - variable. */
3000	uint8_t abPageData[1];
3001	/** Field view. */
3002	struct
3003	{
3004	/** The omnipresent header. */
3005	MptExtendedConfigurationPageHeader ExtHeader;
3006	/** Slot number */
3007	uint16_t u16Slot;
3008	/** Enclosure handle. */
3009	uint16_t u16EnclosureHandle;
3010	/** SAS address */
3011	SASADDRESS SASAddress;
3012	/** Parent device handle */
3013	uint16_t u16ParentDevHandle;
3014	/** Phy number */
3015	uint8_t u8PhyNum;
3016	/** Access status */
3017	uint8_t u8AccessStatus;
3018	/** Device handle */
3019	uint16_t u16DevHandle;
3020	/** Target ID */
3021	uint8_t u8TargetID;
3022	/** Bus */
3023	uint8_t u8Bus;
3024	/** Device info */
3025	uint32_t u32DeviceInfo;
3026	/** Flags */
3027	uint16_t u16Flags;
3028	/** Physical port */
3029	uint8_t u8PhysicalPort;
3030	/** Reserved */
3031	uint8_t u8Reserved0;
3032	} fields;
3033	} u;
3034	} MptConfigurationPageSASDevice0, *PMptConfigurationPageSASDevice0;
3035	#pragma pack()
3036	AssertCompileSize(MptConfigurationPageSASDevice0, 36);
3037
3038	#define LSILOGICSCSI_SASDEVICE0_STATUS_NO_ERRORS (0x00)
3039
3040	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
3041	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
3042	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_NO 0x0
3043	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_END 0x1
3044	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
3045	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
3046	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
3047	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
3048	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
3049	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
3050	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
3051	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
3052	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
3053	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_LSI RT_BIT(12)
3054	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
3055	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SEP RT_BIT(14)
3056
3057	#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_PRESENT (RT_BIT(0))
3058	#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPED_TO_BUS_AND_TARGET_ID (RT_BIT(1))
3059	#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPING_PERSISTENT (RT_BIT(2))
3060
3061	/**
3062	* SAS Device page 1 - Readonly
3063	*/
3064	#pragma pack(1)
3065	typedef struct MptConfigurationPageSASDevice1
3066	{
3067	/** Union. */
3068	union
3069	{
3070	/** Byte view - variable. */
3071	uint8_t abPageData[1];
3072	/** Field view. */
3073	struct
3074	{
3075	/** The omnipresent header. */
3076	MptExtendedConfigurationPageHeader ExtHeader;
3077	/** Reserved */
3078	uint32_t u32Reserved0;
3079	/** SAS address */
3080	SASADDRESS SASAddress;
3081	/** Reserved */
3082	uint32_t u32Reserved;
3083	/** Device handle */
3084	uint16_t u16DevHandle;
3085	/** Target ID */
3086	uint8_t u8TargetID;
3087	/** Bus */
3088	uint8_t u8Bus;
3089	/** Initial REgister device FIS */
3090	uint32_t au32InitialRegDeviceFIS[5];
3091	} fields;
3092	} u;
3093	} MptConfigurationPageSASDevice1, *PMptConfigurationPageSASDevice1;
3094	#pragma pack()
3095	AssertCompileSize(MptConfigurationPageSASDevice1, 48);
3096
3097	/**
3098	* SAS Device page 2 - Read/Write persistent
3099	*/
3100	#pragma pack(1)
3101	typedef struct MptConfigurationPageSASDevice2
3102	{
3103	/** Union. */
3104	union
3105	{
3106	/** Byte view - variable. */
3107	uint8_t abPageData[1];
3108	/** Field view. */
3109	struct
3110	{
3111	/** The omnipresent header. */
3112	MptExtendedConfigurationPageHeader ExtHeader;
3113	/** Physical identifier */
3114	SASADDRESS SASAddress;
3115	/** Enclosure mapping */
3116	uint32_t u32EnclosureMapping;
3117	} fields;
3118	} u;
3119	} MptConfigurationPageSASDevice2, *PMptConfigurationPageSASDevice2;
3120	#pragma pack()
3121	AssertCompileSize(MptConfigurationPageSASDevice2, 20);
3122
3123	/**
3124	* A device entitiy containing all pages.
3125	*/
3126	typedef struct MptSASDevice
3127	{
3128	/** Pointer to the next device if any. */
3129	struct MptSASDevice *pNext;
3130	/** Pointer to the previous device if any. */
3131	struct MptSASDevice *pPrev;
3132
3133	MptConfigurationPageSASDevice0 SASDevicePage0;
3134	MptConfigurationPageSASDevice1 SASDevicePage1;
3135	MptConfigurationPageSASDevice2 SASDevicePage2;
3136	} MptSASDevice, *PMptSASDevice;
3137
3138	/**
3139	* SAS Expander page 0 - Readonly
3140	*/
3141	#pragma pack(1)
3142	typedef struct MptConfigurationPageSASExpander0
3143	{
3144	/** Union. */
3145	union
3146	{
3147	/** Byte view - variable. */
3148	uint8_t abPageData[1];
3149	/** Field view. */
3150	struct
3151	{
3152	/** The omnipresent header. */
3153	MptExtendedConfigurationPageHeader ExtHeader;
3154	/** Physical port */
3155	uint8_t u8PhysicalPort;
3156	/** Reserved */
3157	uint8_t u8Reserved0;
3158	/** Enclosure handle */
3159	uint16_t u16EnclosureHandle;
3160	/** SAS address */
3161	SASADDRESS SASAddress;
3162	/** Discovery status */
3163	uint32_t u32DiscoveryStatus;
3164	/** Device handle. */
3165	uint16_t u16DevHandle;
3166	/** Parent device handle */
3167	uint16_t u16ParentDevHandle;
3168	/** Expander change count */
3169	uint16_t u16ExpanderChangeCount;
3170	/** Expander route indexes */
3171	uint16_t u16ExpanderRouteIndexes;
3172	/** Number of PHys in this expander */
3173	uint8_t u8NumPhys;
3174	/** SAS level */
3175	uint8_t u8SASLevel;
3176	/** Flags */
3177	uint8_t u8Flags;
3178	/** Reserved */
3179	uint8_t u8Reserved1;
3180	} fields;
3181	} u;
3182	} MptConfigurationPageSASExpander0, *PMptConfigurationPageSASExpander0;
3183	#pragma pack()
3184	AssertCompileSize(MptConfigurationPageSASExpander0, 36);
3185
3186	/**
3187	* SAS Expander page 1 - Readonly
3188	*/
3189	#pragma pack(1)
3190	typedef struct MptConfigurationPageSASExpander1
3191	{
3192	/** Union. */
3193	union
3194	{
3195	/** Byte view - variable. */
3196	uint8_t abPageData[1];
3197	/** Field view. */
3198	struct
3199	{
3200	/** The omnipresent header. */
3201	MptExtendedConfigurationPageHeader ExtHeader;
3202	/** Physical port */
3203	uint8_t u8PhysicalPort;
3204	/** Reserved */
3205	uint8_t u8Reserved0[3];
3206	/** Number of PHYs */
3207	uint8_t u8NumPhys;
3208	/** Number of the Phy the information in this page is for. */
3209	uint8_t u8Phy;
3210	/** Number of routing table entries */
3211	uint16_t u16NumTableEntriesProgrammed;
3212	/** Programmed link rate */
3213	uint8_t u8ProgrammedLinkRate;
3214	/** Hardware link rate */
3215	uint8_t u8HwLinkRate;
3216	/** Attached device handle */
3217	uint16_t u16AttachedDevHandle;
3218	/** Phy information */
3219	uint32_t u32PhyInfo;
3220	/** Attached device information */
3221	uint32_t u32AttachedDeviceInfo;
3222	/** Owner device handle. */
3223	uint16_t u16OwnerDevHandle;
3224	/** Change count */
3225	uint8_t u8ChangeCount;
3226	/** Negotiated link rate */
3227	uint8_t u8NegotiatedLinkRate;
3228	/** Phy identifier */
3229	uint8_t u8PhyIdentifier;
3230	/** Attached phy identifier */
3231	uint8_t u8AttachedPhyIdentifier;
3232	/** Reserved */
3233	uint8_t u8Reserved1;
3234	/** Discovery information */
3235	uint8_t u8DiscoveryInfo;
3236	/** Reserved */
3237	uint32_t u32Reserved;
3238	} fields;
3239	} u;
3240	} MptConfigurationPageSASExpander1, *PMptConfigurationPageSASExpander1;
3241	#pragma pack()
3242	AssertCompileSize(MptConfigurationPageSASExpander1, 40);
3243
3244	/**
3245	* Structure of all supported pages for the SCSI SPI controller.
3246	* Used to load the device state from older versions.
3247	*/
3248	typedef struct MptConfigurationPagesSupported_SSM_V2
3249	{
3250	MptConfigurationPageManufacturing0 ManufacturingPage0;
3251	MptConfigurationPageManufacturing1 ManufacturingPage1;
3252	MptConfigurationPageManufacturing2 ManufacturingPage2;
3253	MptConfigurationPageManufacturing3 ManufacturingPage3;
3254	MptConfigurationPageManufacturing4 ManufacturingPage4;
3255	MptConfigurationPageIOUnit0 IOUnitPage0;
3256	MptConfigurationPageIOUnit1 IOUnitPage1;
3257	MptConfigurationPageIOUnit2 IOUnitPage2;
3258	MptConfigurationPageIOUnit3 IOUnitPage3;
3259	MptConfigurationPageIOC0 IOCPage0;
3260	MptConfigurationPageIOC1 IOCPage1;
3261	MptConfigurationPageIOC2 IOCPage2;
3262	MptConfigurationPageIOC3 IOCPage3;
3263	MptConfigurationPageIOC4 IOCPage4;
3264	MptConfigurationPageIOC6 IOCPage6;
3265	struct
3266	{
3267	MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
3268	MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
3269	MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
3270	} aPortPages[1]; /* Currently only one port supported. */
3271	struct
3272	{
3273	struct
3274	{
3275	MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
3276	MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
3277	MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
3278	MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
3279	} aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
3280	} aBuses[1]; /* Only one bus at the moment. */
3281	} MptConfigurationPagesSupported_SSM_V2, *PMptConfigurationPagesSupported_SSM_V2;
3282
3283	typedef struct MptConfigurationPagesSpi
3284	{
3285	struct
3286	{
3287	MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
3288	MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
3289	MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
3290	} aPortPages[1]; /* Currently only one port supported. */
3291	struct
3292	{
3293	struct
3294	{
3295	MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
3296	MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
3297	MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
3298	MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
3299	} aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
3300	} aBuses[1]; /* Only one bus at the moment. */
3301	} MptConfigurationPagesSpi, *PMptConfigurationPagesSpi;
3302
3303	typedef struct MptPHY
3304	{
3305	MptConfigurationPageSASPHY0 SASPHYPage0;
3306	MptConfigurationPageSASPHY1 SASPHYPage1;
3307	} MptPHY, *PMptPHY;
3308
3309	#pragma pack(1)
3310	typedef struct MptConfigurationPagesSas
3311	{
3312	/** Size of the manufacturing page 7 */
3313	uint32_t cbManufacturingPage7;
3314	/** Pointer to the manufacturing page 7 */
3315	PMptConfigurationPageManufacturing7 pManufacturingPage7;
3316	/** Size of the I/O unit page 0 */
3317	uint32_t cbSASIOUnitPage0;
3318	/** Pointer to the I/O unit page 0 */
3319	PMptConfigurationPageSASIOUnit0 pSASIOUnitPage0;
3320	/** Size of the I/O unit page 1 */
3321	uint32_t cbSASIOUnitPage1;
3322	/** Pointer to the I/O unit page 1 */
3323	PMptConfigurationPageSASIOUnit1 pSASIOUnitPage1;
3324	/** I/O unit page 2 */
3325	MptConfigurationPageSASIOUnit2 SASIOUnitPage2;
3326	/** I/O unit page 3 */
3327	MptConfigurationPageSASIOUnit3 SASIOUnitPage3;
3328
3329	/** Number of PHYs in the array. */
3330	uint32_t cPHYs;
3331	/** Pointer to an array of per PHYS pages. */
3332	R3PTRTYPE(PMptPHY) paPHYs;
3333
3334	/** Number of devices detected. */
3335	uint32_t cDevices;
3336	/** Pointer to the first SAS device. */
3337	R3PTRTYPE(PMptSASDevice) pSASDeviceHead;
3338	/** Pointer to the last SAS device. */
3339	R3PTRTYPE(PMptSASDevice) pSASDeviceTail;
3340	} MptConfigurationPagesSas, *PMptConfigurationPagesSas;
3341	#pragma pack()
3342
3343	/**
3344	* Structure of all supported pages for both controllers.
3345	*/
3346	typedef struct MptConfigurationPagesSupported
3347	{
3348	MptConfigurationPageManufacturing0 ManufacturingPage0;
3349	MptConfigurationPageManufacturing1 ManufacturingPage1;
3350	MptConfigurationPageManufacturing2 ManufacturingPage2;
3351	MptConfigurationPageManufacturing3 ManufacturingPage3;
3352	MptConfigurationPageManufacturing4 ManufacturingPage4;
3353	MptConfigurationPageManufacturing5 ManufacturingPage5;
3354	MptConfigurationPageManufacturing6 ManufacturingPage6;
3355	MptConfigurationPageManufacturing8 ManufacturingPage8;
3356	MptConfigurationPageManufacturing9 ManufacturingPage9;
3357	MptConfigurationPageManufacturing10 ManufacturingPage10;
3358	MptConfigurationPageIOUnit0 IOUnitPage0;
3359	MptConfigurationPageIOUnit1 IOUnitPage1;
3360	MptConfigurationPageIOUnit2 IOUnitPage2;
3361	MptConfigurationPageIOUnit3 IOUnitPage3;
3362	MptConfigurationPageIOUnit4 IOUnitPage4;
3363	MptConfigurationPageIOC0 IOCPage0;
3364	MptConfigurationPageIOC1 IOCPage1;
3365	MptConfigurationPageIOC2 IOCPage2;
3366	MptConfigurationPageIOC3 IOCPage3;
3367	MptConfigurationPageIOC4 IOCPage4;
3368	MptConfigurationPageIOC6 IOCPage6;
3369	/* BIOS page 0 is not described */
3370	MptConfigurationPageBIOS1 BIOSPage1;
3371	MptConfigurationPageBIOS2 BIOSPage2;
3372	/* BIOS page 3 is not described */
3373	MptConfigurationPageBIOS4 BIOSPage4;
3374
3375	/** Controller dependent data. */
3376	union
3377	{
3378	MptConfigurationPagesSpi SpiPages;
3379	MptConfigurationPagesSas SasPages;
3380	} u;
3381	} MptConfigurationPagesSupported, *PMptConfigurationPagesSupported;
3382
3383	/**
3384	* Initializes a page header.
3385	*/
3386	#define MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags) \
3387	(pg)->u.fields.Header.u8PageType = flags; \
3388	(pg)->u.fields.Header.u8PageNumber = nr; \
3389	(pg)->u.fields.Header.u8PageLength = sizeof(type) / 4
3390
3391	#define MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(pg, type, nr, flags) \
3392	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING)
3393
3394	#define MPT_CONFIG_PAGE_HEADER_INIT_IO_UNIT(pg, type, nr, flags) \
3395	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT)
3396
3397	#define MPT_CONFIG_PAGE_HEADER_INIT_IOC(pg, type, nr, flags) \
3398	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_IOC)
3399
3400	#define MPT_CONFIG_PAGE_HEADER_INIT_BIOS(pg, type, nr, flags) \
3401	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_BIOS)
3402
3403	/**
3404	* Initializes a extended page header.
3405	*/
3406	#define MPT_CONFIG_EXTENDED_PAGE_HEADER_INIT(pg, cb, nr, flags, exttype) \
3407	(pg)->u.fields.ExtHeader.u8PageType = flags \| MPT_CONFIGURATION_PAGE_TYPE_EXTENDED; \
3408	(pg)->u.fields.ExtHeader.u8PageNumber = nr; \
3409	(pg)->u.fields.ExtHeader.u8ExtPageType = exttype; \
3410	(pg)->u.fields.ExtHeader.u16ExtPageLength = cb / 4
3411
3412	/**
3413	* Possible SG element types.
3414	*/
3415	enum MPTSGENTRYTYPE
3416	{
3417	MPTSGENTRYTYPE_TRANSACTION_CONTEXT = 0x00,
3418	MPTSGENTRYTYPE_SIMPLE = 0x01,
3419	MPTSGENTRYTYPE_CHAIN = 0x03
3420	};
3421
3422	/**
3423	* Register interface.
3424	*/
3425
3426	/**
3427	* Defined states that the SCSI controller can have.
3428	*/
3429	typedef enum LSILOGICSTATE
3430	{
3431	/** Reset state. */
3432	LSILOGICSTATE_RESET = 0x00,
3433	/** Ready state. */
3434	LSILOGICSTATE_READY = 0x01,
3435	/** Operational state. */
3436	LSILOGICSTATE_OPERATIONAL = 0x02,
3437	/** Fault state. */
3438	LSILOGICSTATE_FAULT = 0x04,
3439	/** 32bit size hack */
3440	LSILOGICSTATE_32BIT_HACK = 0x7fffffff
3441	} LSILOGICSTATE;
3442
3443	/**
3444	* Which entity needs to initialize the controller
3445	* to get into the operational state.
3446	*/
3447	typedef enum LSILOGICWHOINIT
3448	{
3449	/** Not initialized. */
3450	LSILOGICWHOINIT_NOT_INITIALIZED = 0x00,
3451	/** System BIOS. */
3452	LSILOGICWHOINIT_SYSTEM_BIOS = 0x01,
3453	/** ROM Bios. */
3454	LSILOGICWHOINIT_ROM_BIOS = 0x02,
3455	/** PCI Peer. */
3456	LSILOGICWHOINIT_PCI_PEER = 0x03,
3457	/** Host driver. */
3458	LSILOGICWHOINIT_HOST_DRIVER = 0x04,
3459	/** Manufacturing. */
3460	LSILOGICWHOINIT_MANUFACTURING = 0x05,
3461	/** 32bit size hack. */
3462	LSILOGICWHOINIT_32BIT_HACK = 0x7fffffff
3463	} LSILOGICWHOINIT;
3464
3465
3466	/**
3467	* IOC status codes.
3468	*/
3469	#define LSILOGIC_IOCSTATUS_SUCCESS 0x0000
3470	#define LSILOGIC_IOCSTATUS_INVALID_FUNCTION 0x0001
3471	#define LSILOGIC_IOCSTATUS_BUSY 0x0002
3472	#define LSILOGIC_IOCSTATUS_INVALID_SGL 0x0003
3473	#define LSILOGIC_IOCSTATUS_INTERNAL_ERROR 0x0004
3474	#define LSILOGIC_IOCSTATUS_RESERVED 0x0005
3475	#define LSILOGIC_IOCSTATUS_INSUFFICIENT_RESOURCES 0x0006
3476	#define LSILOGIC_IOCSTATUS_INVALID_FIELD 0x0007
3477	#define LSILOGIC_IOCSTATUS_INVALID_STATE 0x0008
3478	#define LSILOGIC_IOCSTATUS_OP_STATE_NOT_SUPPOTED 0x0009
3479
3480	/**
3481	* Size of the I/O and MMIO space.
3482	*/
3483	#define LSILOGIC_PCI_SPACE_IO_SIZE 256
3484	#define LSILOGIC_PCI_SPACE_MEM_SIZE 128 * _1K
3485
3486	/**
3487	* Doorbell register - Used to get the status of the controller and
3488	* initialise it.
3489	*/
3490	#define LSILOGIC_REG_DOORBELL 0x00
3491	# define LSILOGIC_REG_DOORBELL_SET_STATE(enmState) (((enmState) & 0x0f) << 28)
3492	# define LSILOGIC_REG_DOORBELL_SET_USED(fUsed) (((fUsed) ? 1 : 0) << 27)
3493	# define LSILOGIC_REG_DOORBELL_SET_WHOINIT(enmWhoInit) (((enmWhoInit) & 0x07) << 24)
3494	# define LSILOGIC_REG_DOORBELL_SET_FAULT_CODE(u16Code) (u16Code)
3495	# define LSILOGIC_REG_DOORBELL_GET_FUNCTION(x) (((x) & 0xff000000) >> 24)
3496	# define LSILOGIC_REG_DOORBELL_GET_SIZE(x) (((x) & 0x00ff0000) >> 16)
3497
3498	/**
3499	* Functions which can be passed through the system doorbell.
3500	*/
3501	#define LSILOGIC_DOORBELL_FUNCTION_IOC_MSG_UNIT_RESET 0x40
3502	#define LSILOGIC_DOORBELL_FUNCTION_IO_UNIT_RESET 0x41
3503	#define LSILOGIC_DOORBELL_FUNCTION_HANDSHAKE 0x42
3504	#define LSILOGIC_DOORBELL_FUNCTION_REPLY_FRAME_REMOVAL 0x43
3505
3506	/**
3507	* Write sequence register for the diagnostic register.
3508	*/
3509	#define LSILOGIC_REG_WRITE_SEQUENCE 0x04
3510
3511	/**
3512	* Diagnostic register - used to reset the controller.
3513	*/
3514	#define LSILOGIC_REG_HOST_DIAGNOSTIC 0x08
3515	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_MEM_ENABLE (RT_BIT(0))
3516	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DISABLE_ARM (RT_BIT(1))
3517	# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_ADAPTER (RT_BIT(2))
3518	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_RW_ENABLE (RT_BIT(4))
3519	# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_HISTORY (RT_BIT(5))
3520	# define LSILOGIC_REG_HOST_DIAGNOSTIC_FLASH_BAD_SIG (RT_BIT(6))
3521	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DRWE (RT_BIT(7))
3522	# define LSILOGIC_REG_HOST_DIAGNOSTIC_PREVENT_IOC_BOOT (RT_BIT(9))
3523	# define LSILOGIC_REG_HOST_DIAGNOSTIC_CLEAR_FLASH_BAD_SIG (RT_BIT(10))
3524
3525	#define LSILOGIC_REG_TEST_BASE_ADDRESS 0x0c
3526	#define LSILOGIC_REG_DIAG_RW_DATA 0x10
3527	#define LSILOGIC_REG_DIAG_RW_ADDRESS 0x14
3528
3529	/**
3530	* Interrupt status register.
3531	*/
3532	#define LSILOGIC_REG_HOST_INTR_STATUS 0x30
3533	# define LSILOGIC_REG_HOST_INTR_STATUS_W_MASK (RT_BIT(3))
3534	# define LSILOGIC_REG_HOST_INTR_STATUS_DOORBELL_STS (RT_BIT(31))
3535	# define LSILOGIC_REG_HOST_INTR_STATUS_REPLY_INTR (RT_BIT(3))
3536	# define LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL (RT_BIT(0))
3537
3538	/**
3539	* Interrupt mask register.
3540	*/
3541	#define LSILOGIC_REG_HOST_INTR_MASK 0x34
3542	# define LSILOGIC_REG_HOST_INTR_MASK_W_MASK (RT_BIT(0) \| RT_BIT(3) \| RT_BIT(8) \| RT_BIT(9))
3543	# define LSILOGIC_REG_HOST_INTR_MASK_IRQ_ROUTING (RT_BIT(8) \| RT_BIT(9))
3544	# define LSILOGIC_REG_HOST_INTR_MASK_DOORBELL RT_BIT(0)
3545	# define LSILOGIC_REG_HOST_INTR_MASK_REPLY RT_BIT(3)
3546
3547	/**
3548	* Queue registers.
3549	*/
3550	#define LSILOGIC_REG_REQUEST_QUEUE 0x40
3551	#define LSILOGIC_REG_REPLY_QUEUE 0x44
3552
3553	#endif /* __DEVLSILOGICSCSI_H__ */

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source: vbox/trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.h@ 40257

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