VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/DevFdc.cpp@ 93492

Last change on this file since 93492 was 93115, checked in by vboxsync, 3 years ago

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1/* $Id: DevFdc.cpp 93115 2022-01-01 11:31:46Z vboxsync $ */
2/** @file
3 * VBox storage devices - Floppy disk controller
4 */
5
6/*
7 * Copyright (C) 2006-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 * --------------------------------------------------------------------
17 *
18 * This code is based on:
19 *
20 * QEMU Floppy disk emulator (Intel 82078)
21 *
22 * Copyright (c) 2003 Jocelyn Mayer
23 *
24 * Permission is hereby granted, free of charge, to any person obtaining a copy
25 * of this software and associated documentation files (the "Software"), to deal
26 * in the Software without restriction, including without limitation the rights
27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28 * copies of the Software, and to permit persons to whom the Software is
29 * furnished to do so, subject to the following conditions:
30 *
31 * The above copyright notice and this permission notice shall be included in
32 * all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40 * THE SOFTWARE.
41 *
42 */
43
44
45/*********************************************************************************************************************************
46* Header Files *
47*********************************************************************************************************************************/
48#define LOG_GROUP LOG_GROUP_DEV_FDC
49#include <VBox/vmm/pdmdev.h>
50#include <VBox/vmm/pdmstorageifs.h>
51#include <VBox/AssertGuest.h>
52#include <iprt/assert.h>
53#include <iprt/string.h>
54#include <iprt/uuid.h>
55
56#include "VBoxDD.h"
57
58
59/*********************************************************************************************************************************
60* Defined Constants And Macros *
61*********************************************************************************************************************************/
62/** @name FDC saved state versions
63 * @{ */
64#define FDC_SAVESTATE_CURRENT 3 /**< Current version. */
65#define FDC_SAVESTATE_PRE_DELAY 2 /**< Pre IRQDelay. */
66#define FDC_SAVESTATE_OLD 1 /**< The original saved state. */
67/** @}*/
68
69#define MAX_FD 2
70
71
72/********************************************************/
73/* debug Floppy devices */
74/* #define DEBUG_FLOPPY */
75
76#ifdef LOG_ENABLED
77# define FLOPPY_DPRINTF(...) Log(("floppy: " __VA_ARGS__))
78#else
79# define FLOPPY_DPRINTF(...) do { } while (0)
80#endif
81
82#define FLOPPY_ERROR RTLogPrintf
83
84typedef struct fdctrl_t fdctrl_t;
85
86/********************************************************/
87/* Floppy drive emulation */
88
89#define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
90#define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
91
92/* Will always be a fixed parameter for us */
93#define FD_SECTOR_LEN 512
94#define FD_SECTOR_SC 2 /* Sector size code */
95#define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
96
97/* Floppy disk drive emulation */
98typedef enum fdrive_type_t {
99 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
100 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
101 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
102 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
103 FDRIVE_DRV_FAKE_15_6 = 0x0e, /* Fake 15.6 MB drive. */
104 FDRIVE_DRV_FAKE_63_5 = 0x0f /* Fake 63.5 MB drive. */
105} fdrive_type_t;
106
107typedef uint8_t fdrive_flags_t;
108#define FDISK_DBL_SIDES UINT8_C(0x01)
109
110typedef enum fdrive_rate_t {
111 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
112 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
113 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
114 FDRIVE_RATE_1M = 0x03 /* 1 Mbps */
115} fdrive_rate_t;
116
117/**
118 * The status for one drive.
119 *
120 * @implements PDMIBASE
121 * @implements PDMIMEDIAPORT
122 * @implements PDMIMOUNTNOTIFY
123 */
124typedef struct fdrive_t {
125 /** Pointer to the owning device instance. */
126 R3PTRTYPE(PPDMDEVINS) pDevIns;
127 /** Pointer to the attached driver's base interface. */
128 R3PTRTYPE(PPDMIBASE) pDrvBase;
129 /** Pointer to the attached driver's block interface. */
130 R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
131 /** Pointer to the attached driver's mount interface.
132 * This is NULL if the driver isn't a removable unit. */
133 R3PTRTYPE(PPDMIMOUNT) pDrvMount;
134 /** The base interface. */
135 PDMIBASE IBase;
136 /** The block port interface. */
137 PDMIMEDIAPORT IPort;
138 /** The mount notify interface. */
139 PDMIMOUNTNOTIFY IMountNotify;
140 /** The LUN #. */
141 RTUINT iLUN;
142 /** The LED for this LUN. */
143 PDMLED Led;
144 /* Drive status */
145 fdrive_type_t drive;
146 uint8_t perpendicular; /* 2.88 MB access mode */
147 uint8_t dsk_chg; /* Disk change line */
148 /* Position */
149 uint8_t head;
150 uint8_t track;
151 uint8_t sect;
152 uint8_t ltrk; /* Logical track */
153 /* Media */
154 fdrive_flags_t flags;
155 uint8_t last_sect; /* Nb sector per track */
156 uint8_t max_track; /* Nb of tracks */
157 uint16_t bps; /* Bytes per sector */
158 uint8_t ro; /* Is read-only */
159 uint8_t media_rate; /* Data rate of medium */
160} fdrive_t;
161
162#define NUM_SIDES(drv) (drv->flags & FDISK_DBL_SIDES ? 2 : 1)
163
164static void fd_init(fdrive_t *drv, bool fInit)
165{
166 /* Drive */
167 if (fInit) {
168 /* Fixate the drive type at init time if possible. */
169 if (drv->pDrvMedia) {
170 PDMMEDIATYPE enmType = drv->pDrvMedia->pfnGetType(drv->pDrvMedia);
171 switch (enmType) {
172 case PDMMEDIATYPE_FLOPPY_360:
173 case PDMMEDIATYPE_FLOPPY_1_20:
174 drv->drive = FDRIVE_DRV_120;
175 break;
176 case PDMMEDIATYPE_FLOPPY_720:
177 case PDMMEDIATYPE_FLOPPY_1_44:
178 drv->drive = FDRIVE_DRV_144;
179 break;
180 default:
181 AssertFailed();
182 RT_FALL_THRU();
183 case PDMMEDIATYPE_FLOPPY_2_88:
184 drv->drive = FDRIVE_DRV_288;
185 break;
186 case PDMMEDIATYPE_FLOPPY_FAKE_15_6:
187 drv->drive = FDRIVE_DRV_FAKE_15_6;
188 break;
189 case PDMMEDIATYPE_FLOPPY_FAKE_63_5:
190 drv->drive = FDRIVE_DRV_FAKE_63_5;
191 break;
192 }
193 } else {
194 drv->drive = FDRIVE_DRV_NONE;
195 }
196 } /* else: The BIOS (and others) get the drive type via the CMOS, so
197 don't change it after the VM has been constructed. */
198 drv->perpendicular = 0;
199 /* Disk */
200 drv->last_sect = 0;
201 drv->max_track = 0;
202}
203
204static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
205 uint8_t last_sect, uint8_t num_sides)
206{
207 return (((track * num_sides) + head) * last_sect) + sect - 1; /* sect >= 1 */
208}
209
210/* Returns current position, in sectors, for given drive */
211static int fd_sector(fdrive_t *drv)
212{
213 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect, NUM_SIDES(drv));
214}
215
216/* Seek to a new position:
217 * returns 0 if already on right track
218 * returns 1 if track changed
219 * returns 2 if track is invalid
220 * returns 3 if sector is invalid
221 * returns 4 if seek is disabled
222 * returns 5 if no media in drive
223 */
224static int fd_seek(fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
225 int enable_seek)
226{
227 int sector;
228 int ret;
229
230 if (!drv->last_sect) {
231 FLOPPY_DPRINTF("no disk in drive (max=%d %d %02x %02x)\n",
232 1, (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
233 drv->max_track, drv->last_sect);
234 return 5;
235 }
236 if (track > drv->max_track ||
237 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
238 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
239 head, track, sect, 1,
240 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
241 drv->max_track, drv->last_sect);
242 return 2;
243 }
244 if (sect > drv->last_sect || sect < 1) {
245 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
246 head, track, sect, 1,
247 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
248 drv->max_track, drv->last_sect);
249 return 3;
250 }
251 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
252 ret = 0;
253 if (sector != fd_sector(drv)) {
254#if 0
255 if (!enable_seek) {
256 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
257 head, track, sect, 1, drv->max_track, drv->last_sect);
258 return 4;
259 }
260#else
261 RT_NOREF(enable_seek);
262#endif
263 drv->head = head;
264 if (drv->track != track)
265 ret = 1;
266 drv->track = track;
267 drv->sect = sect;
268 }
269 drv->ltrk = drv->track;
270
271 return ret;
272}
273
274/* Set drive back to track 0 */
275static void fd_recalibrate(fdrive_t *drv)
276{
277 FLOPPY_DPRINTF("recalibrate\n");
278 drv->head = 0;
279 drv->track = 0;
280 drv->ltrk = 0;
281 drv->sect = 1;
282}
283
284/* Recognize floppy formats */
285typedef struct fd_format_t {
286 fdrive_type_t drive;
287 uint8_t last_sect; /**< Number of sectors. */
288 uint8_t max_track; /**< Number of tracks. */
289 uint8_t max_head; /**< Max head number. */
290 fdrive_rate_t rate;
291 const char *str;
292} fd_format_t;
293
294/* Note: Low-density disks (160K/180K/320K/360K) use 250 Kbps data rate
295 * in 40-track drives, but 300 Kbps in high-capacity 80-track drives.
296 */
297static fd_format_t fd_formats[] = {
298 /* First entry is default format */
299 /* 1.44 MB 3"1/2 floppy disks */
300 { FDRIVE_DRV_144, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 3\"1/2", },
301 { FDRIVE_DRV_144, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 3\"1/2", },
302 { FDRIVE_DRV_144, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB 3\"1/2", },
303 { FDRIVE_DRV_144, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB 3\"1/2", },
304 { FDRIVE_DRV_144, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB 3\"1/2", },
305 { FDRIVE_DRV_144, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB 3\"1/2", },
306 { FDRIVE_DRV_144, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB 3\"1/2", },
307 { FDRIVE_DRV_144, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB 3\"1/2", },
308 /* 2.88 MB 3"1/2 floppy disks */
309 { FDRIVE_DRV_288, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB 3\"1/2", },
310 { FDRIVE_DRV_288, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB 3\"1/2", },
311 { FDRIVE_DRV_288, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB 3\"1/2", },
312 { FDRIVE_DRV_288, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB 3\"1/2", },
313 { FDRIVE_DRV_288, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB 3\"1/2", },
314 /* 720 kB 3"1/2 floppy disks */
315 { FDRIVE_DRV_144, 9, 80, 1, FDRIVE_RATE_250K, "720 kB 3\"1/2", },
316 { FDRIVE_DRV_144, 10, 80, 1, FDRIVE_RATE_250K, "800 kB 3\"1/2", },
317 { FDRIVE_DRV_144, 10, 82, 1, FDRIVE_RATE_250K, "820 kB 3\"1/2", },
318 { FDRIVE_DRV_144, 10, 83, 1, FDRIVE_RATE_250K, "830 kB 3\"1/2", },
319 { FDRIVE_DRV_144, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB 3\"1/2", },
320 { FDRIVE_DRV_144, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB 3\"1/2", },
321 /* 1.2 MB 5"1/4 floppy disks */
322 { FDRIVE_DRV_120, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 5\"1/4", },
323 { FDRIVE_DRV_120, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 5\"1/4", }, /* CP Backup 5.25" HD */
324 { FDRIVE_DRV_120, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 5\"1/4", },
325 { FDRIVE_DRV_120, 18, 82, 1, FDRIVE_RATE_500K, "1.48 MB 5\"1/4", },
326 { FDRIVE_DRV_120, 18, 83, 1, FDRIVE_RATE_500K, "1.49 MB 5\"1/4", },
327 { FDRIVE_DRV_120, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 5\"1/4", },
328 /* 720 kB 5"1/4 floppy disks */
329 { FDRIVE_DRV_120, 9, 80, 1, FDRIVE_RATE_300K, "720 kB 5\"1/4", },
330 { FDRIVE_DRV_120, 11, 80, 1, FDRIVE_RATE_300K, "880 kB 5\"1/4", },
331 /* 360 kB 5"1/4 floppy disks (newer 9-sector formats) */
332 { FDRIVE_DRV_120, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 5\"1/4", },
333 { FDRIVE_DRV_120, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 5\"1/4", },
334 { FDRIVE_DRV_120, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 5\"1/4", }, /* CP Backup 5.25" DD */
335 { FDRIVE_DRV_120, 10, 41, 1, FDRIVE_RATE_300K, "410 kB 5\"1/4", },
336 { FDRIVE_DRV_120, 10, 42, 1, FDRIVE_RATE_300K, "420 kB 5\"1/4", },
337 /* 320 kB 5"1/4 floppy disks (old 8-sector formats) */
338 { FDRIVE_DRV_120, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 5\"1/4", },
339 { FDRIVE_DRV_120, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 5\"1/4", },
340 /* 1.2 MB and low density 3"1/2 floppy 'aliases' */
341 { FDRIVE_DRV_144, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 3\"1/2", },
342 { FDRIVE_DRV_144, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 3\"1/2", },
343 { FDRIVE_DRV_144, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 3\"1/2", }, /* CP Backup 5.25" DD */
344 { FDRIVE_DRV_144, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 3\"1/2", },
345 { FDRIVE_DRV_144, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 3\"1/2", },
346 { FDRIVE_DRV_144, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 3\"1/2", },
347 { FDRIVE_DRV_144, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 3\"1/2", },
348 /* For larger than real life floppy images (see DrvBlock.cpp). */
349 /* 15.6 MB fake floppy disk (just need something big). */
350 { FDRIVE_DRV_FAKE_15_6, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 15.6", },
351 { FDRIVE_DRV_FAKE_15_6, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 15.6", },
352 { FDRIVE_DRV_FAKE_15_6, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 15.6", },
353 { FDRIVE_DRV_FAKE_15_6, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 15.6", },
354 { FDRIVE_DRV_FAKE_15_6, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 15.6", },
355 { FDRIVE_DRV_FAKE_15_6, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 15.6", },
356 { FDRIVE_DRV_FAKE_15_6, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 15.6", },
357 { FDRIVE_DRV_FAKE_15_6, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 15.6", },
358 { FDRIVE_DRV_FAKE_15_6, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 15.6", },
359 { FDRIVE_DRV_FAKE_15_6, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 15.6", },
360 { FDRIVE_DRV_FAKE_15_6, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 15.6", },
361 { FDRIVE_DRV_FAKE_15_6, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 15.6", },
362 { FDRIVE_DRV_FAKE_15_6, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 15.6", },
363 { FDRIVE_DRV_FAKE_15_6, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 15.6", },
364 { FDRIVE_DRV_FAKE_15_6, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 15.6", },
365 { FDRIVE_DRV_FAKE_15_6, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 15.6", },
366 { FDRIVE_DRV_FAKE_15_6, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 15.6", },
367 { FDRIVE_DRV_FAKE_15_6, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 15.6", },
368 { FDRIVE_DRV_FAKE_15_6, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 15.6", },
369 { FDRIVE_DRV_FAKE_15_6, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 15.6", },
370 { FDRIVE_DRV_FAKE_15_6, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 15.6", },
371 /* 63.5 MB fake floppy disk (just need something big). */
372 { FDRIVE_DRV_FAKE_63_5, 255, 255, 1, FDRIVE_RATE_1M, "63.5 MB fake 63.5", },
373 { FDRIVE_DRV_FAKE_63_5, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 63.5", },
374 { FDRIVE_DRV_FAKE_63_5, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 63.5", },
375 { FDRIVE_DRV_FAKE_63_5, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 63.5", },
376 { FDRIVE_DRV_FAKE_63_5, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 63.5", },
377 { FDRIVE_DRV_FAKE_63_5, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 63.5", },
378 { FDRIVE_DRV_FAKE_63_5, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 63.5", },
379 { FDRIVE_DRV_FAKE_63_5, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 63.5", },
380 { FDRIVE_DRV_FAKE_63_5, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 63.5", },
381 { FDRIVE_DRV_FAKE_63_5, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 63.5", },
382 { FDRIVE_DRV_FAKE_63_5, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 63.5", },
383 { FDRIVE_DRV_FAKE_63_5, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 63.5", },
384 { FDRIVE_DRV_FAKE_63_5, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 63.5", },
385 { FDRIVE_DRV_FAKE_63_5, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 63.5", },
386 { FDRIVE_DRV_FAKE_63_5, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 63.5", },
387 { FDRIVE_DRV_FAKE_63_5, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 63.5", },
388 { FDRIVE_DRV_FAKE_63_5, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 63.5", },
389 { FDRIVE_DRV_FAKE_63_5, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 63.5", },
390 { FDRIVE_DRV_FAKE_63_5, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 63.5", },
391 { FDRIVE_DRV_FAKE_63_5, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 63.5", },
392 { FDRIVE_DRV_FAKE_63_5, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 63.5", },
393 { FDRIVE_DRV_FAKE_63_5, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 63.5", },
394 /* end */
395 { FDRIVE_DRV_NONE, (uint8_t)-1, (uint8_t)-1, 0, (fdrive_rate_t)0, NULL, },
396};
397
398/* Revalidate a disk drive after a disk change */
399static void fd_revalidate(fdrive_t *drv)
400{
401 const fd_format_t *parse;
402 uint64_t nb_sectors, size;
403 int i, first_match, match;
404 int nb_heads, max_track, last_sect, ro;
405
406 FLOPPY_DPRINTF("revalidate\n");
407 if ( drv->pDrvMedia
408 && drv->pDrvMount
409 && drv->pDrvMount->pfnIsMounted (drv->pDrvMount)) {
410 ro = drv->pDrvMedia->pfnIsReadOnly (drv->pDrvMedia);
411 nb_heads = max_track = last_sect = 0;
412 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
413 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
414 nb_heads - 1, max_track, last_sect);
415 } else {
416 uint64_t size2 = drv->pDrvMedia->pfnGetSize (drv->pDrvMedia);
417 nb_sectors = size2 / FD_SECTOR_LEN;
418 match = -1;
419 first_match = -1;
420 for (i = 0;; i++) {
421 parse = &fd_formats[i];
422 if (parse->drive == FDRIVE_DRV_NONE)
423 break;
424 if (drv->drive == parse->drive ||
425 drv->drive == FDRIVE_DRV_NONE) {
426 size = (parse->max_head + 1) * parse->max_track *
427 parse->last_sect;
428 if (nb_sectors == size) {
429 match = i;
430 break;
431 }
432 if (first_match == -1)
433 first_match = i;
434 }
435 }
436 if (match == -1) {
437 if (first_match == -1)
438 match = 1;
439 else
440 match = first_match;
441 parse = &fd_formats[match];
442 }
443 nb_heads = parse->max_head + 1;
444 max_track = parse->max_track;
445 last_sect = parse->last_sect;
446 drv->drive = parse->drive;
447 drv->media_rate = parse->rate;
448 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
449 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
450 LogRel(("FDC: %s floppy disk (%d h %d t %d s) %s\n", parse->str,
451 nb_heads, max_track, last_sect, ro ? "ro" : "rw"));
452 }
453 if (nb_heads == 1) {
454 drv->flags &= ~FDISK_DBL_SIDES;
455 } else {
456 drv->flags |= FDISK_DBL_SIDES;
457 }
458 drv->max_track = max_track;
459 drv->last_sect = last_sect;
460 drv->ro = ro;
461 } else {
462 FLOPPY_DPRINTF("No disk in drive\n");
463 drv->last_sect = 0;
464 drv->max_track = 0;
465 drv->flags &= ~FDISK_DBL_SIDES;
466 drv->dsk_chg = true; /* Disk change line active. */
467 }
468}
469
470/********************************************************/
471/* Intel 82078 floppy disk controller emulation */
472
473static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq);
474static void fdctrl_reset_fifo(fdctrl_t *fdctrl);
475static fdrive_t *get_cur_drv(fdctrl_t *fdctrl);
476
477static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl);
478static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl);
479static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl);
480static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value);
481static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl);
482static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value);
483static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl);
484static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value);
485static uint32_t fdctrl_read_data(fdctrl_t *fdctrl);
486static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value);
487static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl);
488static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value);
489
490enum {
491 FD_DIR_WRITE = 0,
492 FD_DIR_READ = 1,
493 FD_DIR_SCANE = 2,
494 FD_DIR_SCANL = 3,
495 FD_DIR_SCANH = 4,
496 FD_DIR_FORMAT = 5
497};
498
499enum {
500 FD_STATE_MULTI = 0x01, /* multi track flag */
501 FD_STATE_FORMAT = 0x02, /* format flag */
502 FD_STATE_SEEK = 0x04 /* seek flag */
503};
504
505enum {
506 FD_REG_SRA = 0x00,
507 FD_REG_SRB = 0x01,
508 FD_REG_DOR = 0x02,
509 FD_REG_TDR = 0x03,
510 FD_REG_MSR = 0x04,
511 FD_REG_DSR = 0x04,
512 FD_REG_FIFO = 0x05,
513 FD_REG_DIR = 0x07,
514 FD_REG_CCR = 0x07
515};
516
517enum {
518 FD_CMD_READ_TRACK = 0x02,
519 FD_CMD_SPECIFY = 0x03,
520 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
521 FD_CMD_WRITE = 0x05,
522 FD_CMD_READ = 0x06,
523 FD_CMD_RECALIBRATE = 0x07,
524 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
525 FD_CMD_WRITE_DELETED = 0x09,
526 FD_CMD_READ_ID = 0x0a,
527 FD_CMD_READ_DELETED = 0x0c,
528 FD_CMD_FORMAT_TRACK = 0x0d,
529 FD_CMD_DUMPREG = 0x0e,
530 FD_CMD_SEEK = 0x0f,
531 FD_CMD_VERSION = 0x10,
532 FD_CMD_SCAN_EQUAL = 0x11,
533 FD_CMD_PERPENDICULAR_MODE = 0x12,
534 FD_CMD_CONFIGURE = 0x13,
535 FD_CMD_LOCK = 0x14,
536 FD_CMD_VERIFY = 0x16,
537 FD_CMD_POWERDOWN_MODE = 0x17,
538 FD_CMD_PART_ID = 0x18,
539 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
540 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
541 FD_CMD_SAVE = 0x2e,
542 FD_CMD_OPTION = 0x33,
543 FD_CMD_RESTORE = 0x4e,
544 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
545 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
546 FD_CMD_FORMAT_AND_WRITE = 0xcd,
547 FD_CMD_RELATIVE_SEEK_IN = 0xcf
548};
549
550enum {
551 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
552 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
553 FD_CONFIG_POLL = 0x10, /* Poll enabled */
554 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
555 FD_CONFIG_EIS = 0x40 /* No implied seeks */
556};
557
558enum {
559 FD_SR0_EQPMT = 0x10,
560 FD_SR0_SEEK = 0x20,
561 FD_SR0_ABNTERM = 0x40,
562 FD_SR0_INVCMD = 0x80,
563 FD_SR0_RDYCHG = 0xc0
564};
565
566enum {
567 FD_SR1_MA = 0x01, /* Missing address mark */
568 FD_SR1_NW = 0x02, /* Not writable */
569 FD_SR1_ND = 0x04, /* No data */
570 FD_SR1_EC = 0x80 /* End of cylinder */
571};
572
573enum {
574 FD_SR2_MD = 0x01, /* Missing data address mark */
575 FD_SR2_SNS = 0x04, /* Scan not satisfied */
576 FD_SR2_SEH = 0x08 /* Scan equal hit */
577};
578
579enum {
580 FD_SRA_DIR = 0x01,
581 FD_SRA_nWP = 0x02,
582 FD_SRA_nINDX = 0x04,
583 FD_SRA_HDSEL = 0x08,
584 FD_SRA_nTRK0 = 0x10,
585 FD_SRA_STEP = 0x20,
586 FD_SRA_nDRV2 = 0x40,
587 FD_SRA_INTPEND = 0x80
588};
589
590enum {
591 FD_SRB_MTR0 = 0x01,
592 FD_SRB_MTR1 = 0x02,
593 FD_SRB_WGATE = 0x04,
594 FD_SRB_RDATA = 0x08,
595 FD_SRB_WDATA = 0x10,
596 FD_SRB_DR0 = 0x20
597};
598
599enum {
600#if MAX_FD == 4
601 FD_DOR_SELMASK = 0x03,
602#else
603 FD_DOR_SELMASK = 0x01,
604#endif
605 FD_DOR_nRESET = 0x04,
606 FD_DOR_DMAEN = 0x08,
607 FD_DOR_MOTEN0 = 0x10,
608 FD_DOR_MOTEN1 = 0x20,
609 FD_DOR_MOTEN2 = 0x40,
610 FD_DOR_MOTEN3 = 0x80
611};
612
613enum {
614#if MAX_FD == 4
615 FD_TDR_BOOTSEL = 0x0c
616#else
617 FD_TDR_BOOTSEL = 0x04
618#endif
619};
620
621enum {
622 FD_DSR_DRATEMASK= 0x03,
623 FD_DSR_PWRDOWN = 0x40,
624 FD_DSR_SWRESET = 0x80
625};
626
627enum {
628 FD_MSR_DRV0BUSY = 0x01,
629 FD_MSR_DRV1BUSY = 0x02,
630 FD_MSR_DRV2BUSY = 0x04,
631 FD_MSR_DRV3BUSY = 0x08,
632 FD_MSR_CMDBUSY = 0x10,
633 FD_MSR_NONDMA = 0x20,
634 FD_MSR_DIO = 0x40,
635 FD_MSR_RQM = 0x80
636};
637
638enum {
639 FD_DIR_DSKCHG = 0x80
640};
641
642#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
643#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
644#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
645
646/**
647 * Floppy controller state.
648 *
649 * @implements PDMILEDPORTS
650 */
651struct fdctrl_t {
652 /* Controller's identification */
653 uint8_t version;
654 /* HW */
655 uint8_t irq_lvl;
656 uint8_t dma_chann;
657 uint16_t io_base;
658 /* Controller state */
659 TMTIMERHANDLE hResultTimer;
660
661 /* Interrupt delay timers. */
662 TMTIMERHANDLE hXferDelayTimer;
663 TMTIMERHANDLE hIrqDelayTimer;
664 uint16_t uIrqDelayMsec;
665 uint8_t st0;
666 uint8_t st1;
667 uint8_t st2;
668
669 uint8_t sra;
670 uint8_t srb;
671 uint8_t dor;
672 uint8_t tdr;
673 uint8_t dsr;
674 uint8_t msr;
675 uint8_t cur_drv;
676 uint8_t status0;
677 uint8_t status1;
678 uint8_t status2;
679 /* Command FIFO */
680 uint8_t fifo[FD_SECTOR_LEN];
681 uint32_t data_pos;
682 uint32_t data_len;
683 uint8_t data_state;
684 uint8_t data_dir;
685 uint8_t eot; /* last wanted sector */
686 /* Debugging only */
687 uint8_t cur_cmd;
688 uint8_t prev_cmd;
689 /* States kept only to be returned back */
690 /* Timers state */
691 uint8_t timer0;
692 uint8_t timer1;
693 /* precompensation */
694 uint8_t precomp_trk;
695 uint8_t config;
696 uint8_t lock;
697 /* Power down config (also with status regB access mode */
698 uint8_t pwrd;
699 /* Floppy drives */
700 uint8_t num_floppies;
701 fdrive_t drives[MAX_FD];
702 uint8_t reset_sensei;
703 /** Pointer to device instance. */
704 PPDMDEVINS pDevIns;
705
706 /** Status LUN: The base interface. */
707 PDMIBASE IBaseStatus;
708 /** Status LUN: The Leds interface. */
709 PDMILEDPORTS ILeds;
710 /** Status LUN: The Partner of ILeds. */
711 PPDMILEDCONNECTORS pLedsConnector;
712
713 /** I/O ports: 0x3f0 */
714 IOMIOPORTHANDLE hIoPorts0;
715 /** I/O ports: 0x3f1..0x3f5 */
716 IOMIOPORTHANDLE hIoPorts1;
717 /** I/O port: 0x3f7 */
718 IOMIOPORTHANDLE hIoPorts2;
719};
720
721static uint32_t fdctrl_read (fdctrl_t *fdctrl, uint32_t reg)
722{
723 uint32_t retval;
724
725 switch (reg) {
726 case FD_REG_SRA:
727 retval = fdctrl_read_statusA(fdctrl);
728 break;
729 case FD_REG_SRB:
730 retval = fdctrl_read_statusB(fdctrl);
731 break;
732 case FD_REG_DOR:
733 retval = fdctrl_read_dor(fdctrl);
734 break;
735 case FD_REG_TDR:
736 retval = fdctrl_read_tape(fdctrl);
737 break;
738 case FD_REG_MSR:
739 retval = fdctrl_read_main_status(fdctrl);
740 break;
741 case FD_REG_FIFO:
742 retval = fdctrl_read_data(fdctrl);
743 break;
744 case FD_REG_DIR:
745 retval = fdctrl_read_dir(fdctrl);
746 break;
747 default:
748 retval = UINT32_MAX;
749 break;
750 }
751 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
752
753 return retval;
754}
755
756static void fdctrl_write (fdctrl_t *fdctrl, uint32_t reg, uint32_t value)
757{
758 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
759
760 switch (reg) {
761 case FD_REG_DOR:
762 fdctrl_write_dor(fdctrl, value);
763 break;
764 case FD_REG_TDR:
765 fdctrl_write_tape(fdctrl, value);
766 break;
767 case FD_REG_DSR:
768 fdctrl_write_rate(fdctrl, value);
769 break;
770 case FD_REG_FIFO:
771 fdctrl_write_data(fdctrl, value);
772 break;
773 case FD_REG_CCR:
774 fdctrl_write_ccr(fdctrl, value);
775 break;
776 default:
777 break;
778 }
779}
780
781/* Change IRQ state */
782static void fdctrl_reset_irq(fdctrl_t *fdctrl)
783{
784 if (!(fdctrl->sra & FD_SRA_INTPEND))
785 return;
786 FLOPPY_DPRINTF("Reset interrupt\n");
787 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 0);
788 fdctrl->sra &= ~FD_SRA_INTPEND;
789}
790
791static void fdctrl_raise_irq_now(fdctrl_t *fdctrl, uint8_t status0)
792{
793 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
794 FLOPPY_DPRINTF("Raising interrupt...\n");
795 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 1);
796 fdctrl->sra |= FD_SRA_INTPEND;
797 }
798 if (status0 & FD_SR0_SEEK) {
799 fdrive_t *cur_drv;
800
801 /* A seek clears the disk change line (if a disk is inserted). */
802 cur_drv = get_cur_drv(fdctrl);
803 if (cur_drv->max_track)
804 cur_drv->dsk_chg = false;
805 }
806
807 fdctrl->reset_sensei = 0;
808 fdctrl->status0 = status0;
809 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
810}
811
812static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0)
813{
814 if (!fdctrl->uIrqDelayMsec)
815 {
816 /* If not IRQ delay needed, trigger the interrupt now. */
817 fdctrl_raise_irq_now(fdctrl, status0);
818 }
819 else
820 {
821 /* Otherwise schedule completion after a short while. */
822 fdctrl->st0 = status0;
823 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hIrqDelayTimer, fdctrl->uIrqDelayMsec);
824 }
825}
826
827/* Reset controller */
828static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq)
829{
830 int i;
831
832 FLOPPY_DPRINTF("reset controller\n");
833 fdctrl_reset_irq(fdctrl);
834 /* Initialise controller */
835 fdctrl->sra = 0;
836 fdctrl->srb = 0xc0;
837 if (!fdctrl->drives[1].pDrvMedia)
838 fdctrl->sra |= FD_SRA_nDRV2;
839 fdctrl->cur_drv = 0;
840 fdctrl->dor = FD_DOR_nRESET;
841 fdctrl->dor |= (fdctrl->dma_chann != 0xff) ? FD_DOR_DMAEN : 0;
842 fdctrl->msr = FD_MSR_RQM;
843 /* FIFO state */
844 fdctrl->data_pos = 0;
845 fdctrl->data_len = 0;
846 fdctrl->data_state = 0;
847 fdctrl->data_dir = FD_DIR_WRITE;
848 for (i = 0; i < MAX_FD; i++)
849 fd_recalibrate(&fdctrl->drives[i]);
850 fdctrl_reset_fifo(fdctrl);
851 if (do_irq) {
852 fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
853 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
854 }
855}
856
857static inline fdrive_t *drv0(fdctrl_t *fdctrl)
858{
859 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
860}
861
862static inline fdrive_t *drv1(fdctrl_t *fdctrl)
863{
864 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
865 return &fdctrl->drives[1];
866 else
867 return &fdctrl->drives[0];
868}
869
870#if MAX_FD == 4
871static inline fdrive_t *drv2(fdctrl_t *fdctrl)
872{
873 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
874 return &fdctrl->drives[2];
875 else
876 return &fdctrl->drives[1];
877}
878
879static inline fdrive_t *drv3(fdctrl_t *fdctrl)
880{
881 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
882 return &fdctrl->drives[3];
883 else
884 return &fdctrl->drives[2];
885}
886#endif
887
888static fdrive_t *get_cur_drv(fdctrl_t *fdctrl)
889{
890 switch (fdctrl->cur_drv) {
891 case 0: return drv0(fdctrl);
892 case 1: return drv1(fdctrl);
893#if MAX_FD == 4
894 case 2: return drv2(fdctrl);
895 case 3: return drv3(fdctrl);
896#endif
897 default: return NULL;
898 }
899}
900
901/* Status A register : 0x00 (read-only) */
902static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl)
903{
904 uint32_t retval = fdctrl->sra;
905
906 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
907
908 return retval;
909}
910
911/* Status B register : 0x01 (read-only) */
912static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl)
913{
914 uint32_t retval = fdctrl->srb;
915
916 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
917
918 return retval;
919}
920
921/* Digital output register : 0x02 */
922static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl)
923{
924 uint32_t retval = fdctrl->dor;
925
926 /* Selected drive */
927 retval |= fdctrl->cur_drv;
928 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
929
930 return retval;
931}
932
933static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value)
934{
935 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
936
937 /* Motors */
938 if (value & FD_DOR_MOTEN0)
939 fdctrl->srb |= FD_SRB_MTR0;
940 else
941 fdctrl->srb &= ~FD_SRB_MTR0;
942 if (value & FD_DOR_MOTEN1)
943 fdctrl->srb |= FD_SRB_MTR1;
944 else
945 fdctrl->srb &= ~FD_SRB_MTR1;
946
947 /* Drive */
948 if (value & 1)
949 fdctrl->srb |= FD_SRB_DR0;
950 else
951 fdctrl->srb &= ~FD_SRB_DR0;
952
953 /* Reset */
954 if (!(value & FD_DOR_nRESET)) {
955 if (fdctrl->dor & FD_DOR_nRESET) {
956 FLOPPY_DPRINTF("controller enter RESET state\n");
957 }
958 } else {
959 if (!(fdctrl->dor & FD_DOR_nRESET)) {
960 FLOPPY_DPRINTF("controller out of RESET state\n");
961 fdctrl_reset(fdctrl, 1);
962 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
963 }
964 }
965 /* Selected drive */
966 fdctrl->cur_drv = value & FD_DOR_SELMASK;
967
968 fdctrl->dor = value;
969}
970
971/* Tape drive register : 0x03 */
972static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl)
973{
974 uint32_t retval = fdctrl->tdr;
975
976 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
977
978 return retval;
979}
980
981static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value)
982{
983 /* Reset mode */
984 if (!(fdctrl->dor & FD_DOR_nRESET)) {
985 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
986 return;
987 }
988 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
989 /* Disk boot selection indicator */
990 fdctrl->tdr = value & FD_TDR_BOOTSEL;
991 /* Tape indicators: never allow */
992}
993
994/* Main status register : 0x04 (read) */
995static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl)
996{
997 uint32_t retval = fdctrl->msr;
998
999 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1000 fdctrl->dor |= FD_DOR_nRESET;
1001
1002 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
1003
1004 return retval;
1005}
1006
1007/* Data select rate register : 0x04 (write) */
1008static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value)
1009{
1010 /* Reset mode */
1011 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1012 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1013 return;
1014 }
1015 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1016 /* Reset: autoclear */
1017 if (value & FD_DSR_SWRESET) {
1018 fdctrl->dor &= ~FD_DOR_nRESET;
1019 fdctrl_reset(fdctrl, 1);
1020 fdctrl->dor |= FD_DOR_nRESET;
1021 }
1022 if (value & FD_DSR_PWRDOWN) {
1023 fdctrl_reset(fdctrl, 1);
1024 }
1025 fdctrl->dsr = value;
1026}
1027
1028/* Configuration control register : 0x07 (write) */
1029static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value)
1030{
1031 /* Reset mode */
1032 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1033 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1034 return;
1035 }
1036 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1037
1038 /* Only the rate selection bits used in AT mode, and we
1039 * store those in the DSR.
1040 */
1041 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) | (value & FD_DSR_DRATEMASK);
1042}
1043
1044static int fdctrl_media_changed(fdrive_t *drv)
1045{
1046 return drv->dsk_chg;
1047}
1048
1049/* Digital input register : 0x07 (read-only) */
1050static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl)
1051{
1052 uint32_t retval = 0;
1053
1054 /* The change line signal is reported by the currently selected
1055 * drive. If the corresponding motor on bit is not set, the drive
1056 * is *not* selected!
1057 */
1058 if (fdctrl_media_changed(get_cur_drv(fdctrl))
1059 && (fdctrl->dor & (0x10 << fdctrl->cur_drv)))
1060 retval |= FD_DIR_DSKCHG;
1061 if (retval != 0)
1062 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1063
1064 return retval;
1065}
1066
1067/* FIFO state control */
1068static void fdctrl_reset_fifo(fdctrl_t *fdctrl)
1069{
1070 fdctrl->data_dir = FD_DIR_WRITE;
1071 fdctrl->data_pos = 0;
1072 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1073 fdctrl->prev_cmd = fdctrl->cur_cmd;
1074 fdctrl->cur_cmd = 0;
1075}
1076
1077/* Set FIFO status for the host to read */
1078static void fdctrl_set_fifo(fdctrl_t *fdctrl, int fifo_len, int do_irq)
1079{
1080 fdctrl->data_dir = FD_DIR_READ;
1081 fdctrl->data_len = fifo_len;
1082 fdctrl->data_pos = 0;
1083 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1084 if (do_irq)
1085 fdctrl_raise_irq(fdctrl, 0x00);
1086}
1087
1088/* Set an error: unimplemented/unknown command */
1089static void fdctrl_unimplemented(fdctrl_t *fdctrl, int direction)
1090{
1091 RT_NOREF(direction);
1092 FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
1093 fdctrl->fifo[0] = FD_SR0_INVCMD;
1094 fdctrl_set_fifo(fdctrl, 1, 0);
1095}
1096
1097/* Seek to next sector */
1098static int fdctrl_seek_to_next_sect(fdctrl_t *fdctrl, fdrive_t *cur_drv)
1099{
1100 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1101 cur_drv->head, cur_drv->track, cur_drv->sect,
1102 fd_sector(cur_drv));
1103 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1104 error in fact */
1105 if (cur_drv->sect >= cur_drv->last_sect ||
1106 cur_drv->sect == fdctrl->eot) {
1107 cur_drv->sect = 1;
1108 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1109 if (cur_drv->head == 0 &&
1110 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1111 cur_drv->head = 1;
1112 } else {
1113 cur_drv->head = 0;
1114 cur_drv->ltrk++;
1115 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1116 return 0;
1117 }
1118 } else {
1119 cur_drv->ltrk++;
1120 return 0;
1121 }
1122 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1123 cur_drv->head, cur_drv->track,
1124 cur_drv->sect, fd_sector(cur_drv));
1125 } else {
1126 cur_drv->sect++;
1127 }
1128 return 1;
1129}
1130
1131/* Callback for transfer end (stop or abort) */
1132static void fdctrl_stop_transfer_now(fdctrl_t *fdctrl, uint8_t status0,
1133 uint8_t status1, uint8_t status2)
1134{
1135 fdrive_t *cur_drv;
1136
1137 cur_drv = get_cur_drv(fdctrl);
1138 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1139 status0, status1, status2,
1140 status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
1141 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1142 fdctrl->fifo[1] = status1;
1143 fdctrl->fifo[2] = status2;
1144 fdctrl->fifo[3] = cur_drv->ltrk;
1145 fdctrl->fifo[4] = cur_drv->head;
1146 fdctrl->fifo[5] = cur_drv->sect;
1147 fdctrl->fifo[6] = FD_SECTOR_SC;
1148 FLOPPY_DPRINTF("ST0:%02x ST1:%02x ST2:%02x C:%02x H:%02x R:%02x N:%02x\n",
1149 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2], fdctrl->fifo[3],
1150 fdctrl->fifo[4], fdctrl->fifo[5], fdctrl->fifo[6]);
1151
1152 fdctrl->data_dir = FD_DIR_READ;
1153 if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1154 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 0);
1155 }
1156 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1157 fdctrl->msr &= ~FD_MSR_NONDMA;
1158 fdctrl_set_fifo(fdctrl, 7, 1);
1159}
1160
1161static void fdctrl_stop_transfer(fdctrl_t *fdctrl, uint8_t status0,
1162 uint8_t status1, uint8_t status2)
1163{
1164 if (!fdctrl->uIrqDelayMsec)
1165 {
1166 /* If not IRQ delay needed, just stop the transfer and trigger IRQ now. */
1167 fdctrl_stop_transfer_now(fdctrl, status0, status1, status2);
1168 }
1169 else
1170 {
1171 /* Otherwise schedule completion after a short while. */
1172 fdctrl->st0 = status0;
1173 fdctrl->st1 = status1;
1174 fdctrl->st2 = status2;
1175 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hXferDelayTimer, fdctrl->uIrqDelayMsec);
1176 }
1177}
1178
1179/* Prepare a data transfer (either DMA or FIFO) */
1180static void fdctrl_start_transfer(fdctrl_t *fdctrl, int direction)
1181{
1182 fdrive_t *cur_drv;
1183 uint8_t kh, kt, ks;
1184 int did_seek = 0;
1185
1186 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1187 cur_drv = get_cur_drv(fdctrl);
1188 kt = fdctrl->fifo[2];
1189 kh = fdctrl->fifo[3];
1190 ks = fdctrl->fifo[4];
1191 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1192 GET_CUR_DRV(fdctrl), kh, kt, ks,
1193 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1194 FLOPPY_DPRINTF("CMD:%02x SEL:%02x C:%02x H:%02x R:%02x N:%02x EOT:%02x GPL:%02x DTL:%02x\n",
1195 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1196 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5],
1197 fdctrl->fifo[6], fdctrl->fifo[7], fdctrl->fifo[8]);
1198 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1199 case 2:
1200 /* sect too big */
1201 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1202 fdctrl->fifo[3] = kt;
1203 fdctrl->fifo[4] = kh;
1204 fdctrl->fifo[5] = ks;
1205 return;
1206 case 3:
1207 /* track too big */
1208 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1209 fdctrl->fifo[3] = kt;
1210 fdctrl->fifo[4] = kh;
1211 fdctrl->fifo[5] = ks;
1212 return;
1213 case 4:
1214 /* No seek enabled */
1215 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1216 fdctrl->fifo[3] = kt;
1217 fdctrl->fifo[4] = kh;
1218 fdctrl->fifo[5] = ks;
1219 return;
1220 case 5:
1221 /* No disk in drive */
1222 /// @todo This is wrong! Command should not complete.
1223 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | 0x08, /*FD_SR1_MA |*/ FD_SR1_ND, 0x00);
1224 fdctrl->fifo[3] = kt;
1225 fdctrl->fifo[4] = kh;
1226 fdctrl->fifo[5] = ks;
1227 return;
1228 case 1:
1229 did_seek = 1;
1230 break;
1231 default:
1232 break;
1233 }
1234 /* Check the data rate. If the programmed data rate does not match
1235 * the currently inserted medium, the operation has to fail.
1236 */
1237 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1238 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1239 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1240 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1241 fdctrl->fifo[3] = kt;
1242 fdctrl->fifo[4] = kh;
1243 fdctrl->fifo[5] = ks;
1244 return;
1245 }
1246 /* Set the FIFO state */
1247 fdctrl->data_dir = direction;
1248 fdctrl->data_pos = 0;
1249 fdctrl->msr |= FD_MSR_CMDBUSY;
1250 if (fdctrl->fifo[0] & 0x80)
1251 fdctrl->data_state |= FD_STATE_MULTI;
1252 else
1253 fdctrl->data_state &= ~FD_STATE_MULTI;
1254 if (did_seek)
1255 fdctrl->data_state |= FD_STATE_SEEK;
1256 else
1257 fdctrl->data_state &= ~FD_STATE_SEEK;
1258 if (fdctrl->fifo[5] == 00) {
1259 fdctrl->data_len = fdctrl->fifo[8];
1260 } else {
1261 int tmp;
1262 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1263 tmp = (fdctrl->fifo[6] - ks + 1);
1264 if (fdctrl->fifo[0] & 0x80)
1265 tmp += fdctrl->fifo[6];
1266 fdctrl->data_len *= tmp;
1267 }
1268 fdctrl->eot = fdctrl->fifo[6];
1269 if (fdctrl->dor & FD_DOR_DMAEN) {
1270 int dma_mode;
1271 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1272 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1273 dma_mode = (dma_mode >> 2) & 3;
1274 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1275 dma_mode, direction,
1276 (128 << fdctrl->fifo[5]) *
1277 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1278 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1279 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1280 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1281 (direction == FD_DIR_READ && (dma_mode == 1 || dma_mode == 0))) {
1282 /* No access is allowed until DMA transfer has completed */
1283 fdctrl->msr &= ~FD_MSR_RQM;
1284 /* Now, we just have to wait for the DMA controller to
1285 * recall us...
1286 */
1287 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1288 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1289 return;
1290 } else {
1291 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1292 }
1293 }
1294 FLOPPY_DPRINTF("start non-DMA transfer\n");
1295 fdctrl->msr |= FD_MSR_NONDMA;
1296 if (direction != FD_DIR_WRITE)
1297 fdctrl->msr |= FD_MSR_DIO;
1298
1299 /* IO based transfer: calculate len */
1300 fdctrl_raise_irq(fdctrl, 0x00);
1301 return;
1302}
1303
1304/* Prepare a format data transfer (either DMA or FIFO) */
1305static void fdctrl_start_format(fdctrl_t *fdctrl)
1306{
1307 fdrive_t *cur_drv;
1308 uint8_t ns, dp, kh, kt, ks;
1309
1310 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1311 cur_drv = get_cur_drv(fdctrl);
1312 kt = cur_drv->track;
1313 kh = (fdctrl->fifo[1] & 0x04) >> 2;
1314 ns = fdctrl->fifo[3];
1315 dp = fdctrl->fifo[5];
1316 ks = 1;
1317 FLOPPY_DPRINTF("Start format at %d %d %02x, %d sect, pat %02x (%d)\n",
1318 GET_CUR_DRV(fdctrl), kh, kt, ns, dp,
1319 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1320 switch (fd_seek(cur_drv, kh, kt, ks, false)) {
1321 case 2:
1322 /* sect too big */
1323 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1324 fdctrl->fifo[3] = kt;
1325 fdctrl->fifo[4] = kh;
1326 fdctrl->fifo[5] = ks;
1327 return;
1328 case 3:
1329 /* track too big */
1330 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1331 fdctrl->fifo[3] = kt;
1332 fdctrl->fifo[4] = kh;
1333 fdctrl->fifo[5] = ks;
1334 return;
1335 case 4:
1336 /* No seek enabled */
1337 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1338 fdctrl->fifo[3] = kt;
1339 fdctrl->fifo[4] = kh;
1340 fdctrl->fifo[5] = ks;
1341 return;
1342 case 5:
1343 /* No disk in drive */
1344 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1345 fdctrl->fifo[3] = kt;
1346 fdctrl->fifo[4] = kh;
1347 fdctrl->fifo[5] = ks;
1348 return;
1349 case 1:
1350 break;
1351 default:
1352 break;
1353 }
1354 /* It's not clear what should happen if the data rate does not match. */
1355#if 0
1356 /* Check the data rate. If the programmed data rate does not match
1357 * the currently inserted medium, the operation has to fail.
1358 */
1359 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1360 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1361 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1362 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1363 fdctrl->fifo[3] = kt;
1364 fdctrl->fifo[4] = kh;
1365 fdctrl->fifo[5] = ks;
1366 return;
1367 }
1368#endif
1369 /* Set the FIFO state */
1370 fdctrl->data_dir = FD_DIR_FORMAT;
1371 fdctrl->data_pos = 0;
1372 fdctrl->msr |= FD_MSR_CMDBUSY;
1373 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1374 fdctrl->data_len = ns * 4;
1375 fdctrl->eot = ns;
1376 if (fdctrl->dor & FD_DOR_DMAEN) {
1377 int dma_mode;
1378 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1379 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1380 dma_mode = (dma_mode >> 2) & 3;
1381 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1382 dma_mode, fdctrl->data_dir,
1383 (128 << fdctrl->fifo[2]) *
1384 (cur_drv->last_sect + 1), fdctrl->data_len);
1385 if (fdctrl->data_dir == FD_DIR_FORMAT && dma_mode == 2) {
1386 /* No access is allowed until DMA transfer has completed */
1387 fdctrl->msr &= ~FD_MSR_RQM;
1388 /* Now, we just have to wait for the DMA controller to
1389 * recall us...
1390 */
1391 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1392 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1393 return;
1394 } else {
1395 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, fdctrl->data_dir);
1396 }
1397 }
1398 FLOPPY_DPRINTF("start non-DMA format\n");
1399 fdctrl->msr |= FD_MSR_NONDMA;
1400 /* IO based transfer: calculate len */
1401 fdctrl_raise_irq(fdctrl, 0x00);
1402
1403 return;
1404}
1405
1406/* Prepare a transfer of deleted data */
1407static void fdctrl_start_transfer_del(fdctrl_t *fdctrl, int direction)
1408{
1409 RT_NOREF(direction);
1410 FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1411
1412 /* We don't handle deleted data,
1413 * so we don't return *ANYTHING*
1414 */
1415 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1416}
1417
1418/* Block driver read/write wrappers. */
1419
1420static int blk_write(fdrive_t *drv, int64_t sector_num, const uint8_t *buf, int nb_sectors)
1421{
1422 int rc;
1423
1424 drv->Led.Asserted.s.fWriting = drv->Led.Actual.s.fWriting = 1;
1425
1426 rc = drv->pDrvMedia->pfnWrite(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1427 buf, nb_sectors * FD_SECTOR_LEN);
1428
1429 drv->Led.Actual.s.fWriting = 0;
1430 if (RT_FAILURE(rc))
1431 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1432
1433 return rc;
1434}
1435
1436static int blk_read(fdrive_t *drv, int64_t sector_num, uint8_t *buf, int nb_sectors)
1437{
1438 int rc;
1439
1440 drv->Led.Asserted.s.fReading = drv->Led.Actual.s.fReading = 1;
1441
1442 rc = drv->pDrvMedia->pfnRead(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1443 buf, nb_sectors * FD_SECTOR_LEN);
1444
1445 drv->Led.Actual.s.fReading = 0;
1446
1447 if (RT_FAILURE(rc))
1448 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1449
1450 return rc;
1451}
1452
1453/**
1454 * @callback_method_impl{FNDMATRANSFERHANDLER, handlers for DMA transfers}
1455 */
1456static DECLCALLBACK(uint32_t) fdctrl_transfer_handler(PPDMDEVINS pDevIns, void *pvUser,
1457 unsigned uChannel, uint32_t off, uint32_t cb)
1458{
1459 RT_NOREF(pDevIns, off);
1460 fdctrl_t *fdctrl;
1461 fdrive_t *cur_drv;
1462 int rc;
1463 uint32_t len = 0;
1464 uint32_t start_pos, rel_pos;
1465 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1466
1467 fdctrl = (fdctrl_t *)pvUser;
1468 if (fdctrl->msr & FD_MSR_RQM) {
1469 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1470 return 0;
1471 }
1472 cur_drv = get_cur_drv(fdctrl);
1473 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1474 fdctrl->data_dir == FD_DIR_SCANH)
1475 status2 = FD_SR2_SNS;
1476 if (cb > fdctrl->data_len)
1477 cb = fdctrl->data_len;
1478 if (cur_drv->pDrvMedia == NULL)
1479 {
1480 if (fdctrl->data_dir == FD_DIR_WRITE)
1481 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1482 else
1483 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1484 Assert(len == 0);
1485 goto transfer_error;
1486 }
1487
1488 if (cur_drv->ro)
1489 {
1490 if (fdctrl->data_dir == FD_DIR_WRITE || fdctrl->data_dir == FD_DIR_FORMAT)
1491 {
1492 /* Handle readonly medium early, no need to do DMA, touch the
1493 * LED or attempt any writes. A real floppy doesn't attempt
1494 * to write to readonly media either. */
1495 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
1496 0x00);
1497 Assert(len == 0);
1498 goto transfer_error;
1499 }
1500 }
1501
1502 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1503 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < cb;) {
1504 len = cb - fdctrl->data_pos;
1505 if (len + rel_pos > FD_SECTOR_LEN)
1506 len = FD_SECTOR_LEN - rel_pos;
1507 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x (%d-0x%08x 0x%08x)\n",
1508 len, cb, fdctrl->data_pos, fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1509 cur_drv->track, cur_drv->sect, fd_sector(cur_drv), fd_sector(cur_drv) * FD_SECTOR_LEN);
1510 if (fdctrl->data_dir != FD_DIR_FORMAT &&
1511 (fdctrl->data_dir != FD_DIR_WRITE ||
1512 len < FD_SECTOR_LEN || rel_pos != 0)) {
1513 /* READ & SCAN commands and realign to a sector for WRITE */
1514 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1515 if (RT_FAILURE(rc))
1516 {
1517 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1518 fd_sector(cur_drv));
1519 /* Sure, image size is too small... */
1520 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1521 }
1522 }
1523 switch (fdctrl->data_dir) {
1524 case FD_DIR_READ:
1525 /* READ commands */
1526 {
1527 uint32_t read;
1528 int rc2 = PDMDevHlpDMAWriteMemory(fdctrl->pDevIns, uChannel,
1529 fdctrl->fifo + rel_pos,
1530 fdctrl->data_pos,
1531 len, &read);
1532 AssertMsgRC (rc2, ("DMAWriteMemory -> %Rrc\n", rc2));
1533 }
1534 break;
1535 case FD_DIR_WRITE:
1536 /* WRITE commands */
1537 {
1538 uint32_t written;
1539 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1540 fdctrl->fifo + rel_pos,
1541 fdctrl->data_pos,
1542 len, &written);
1543 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1544 }
1545
1546 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1547 if (RT_FAILURE(rc))
1548 {
1549 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1550 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1551 goto transfer_error;
1552 }
1553 break;
1554 case FD_DIR_FORMAT:
1555 /* FORMAT command */
1556 {
1557 uint8_t eot = fdctrl->fifo[3];
1558 uint8_t filler = fdctrl->fifo[5];
1559 uint32_t written;
1560 int sct;
1561 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1562 fdctrl->fifo + rel_pos,
1563 fdctrl->data_pos,
1564 len, &written);
1565 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1566
1567 /* Fill the entire track with desired data pattern. */
1568 FLOPPY_DPRINTF("formatting track: %d sectors, pattern %02x\n",
1569 eot, filler);
1570 memset(fdctrl->fifo, filler, FD_SECTOR_LEN);
1571 for (sct = 0; sct < eot; ++sct)
1572 {
1573 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1574 if (RT_FAILURE(rc))
1575 {
1576 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1577 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1578 goto transfer_error;
1579 }
1580 fdctrl_seek_to_next_sect(fdctrl, cur_drv);
1581 }
1582 }
1583 break;
1584 default:
1585 /* SCAN commands */
1586 {
1587 uint8_t tmpbuf[FD_SECTOR_LEN];
1588 int ret;
1589 uint32_t read;
1590 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel, tmpbuf,
1591 fdctrl->data_pos, len, &read);
1592 AssertMsg(RT_SUCCESS(rc2), ("DMAReadMemory -> %Rrc2\n", rc2)); NOREF(rc2);
1593 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1594 if (ret == 0) {
1595 status2 = FD_SR2_SEH;
1596 goto end_transfer;
1597 }
1598 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1599 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1600 status2 = 0x00;
1601 goto end_transfer;
1602 }
1603 }
1604 break;
1605 }
1606 fdctrl->data_pos += len;
1607 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1608 if (rel_pos == 0) {
1609 /* Seek to next sector */
1610 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1611 break;
1612 }
1613 }
1614end_transfer:
1615 len = fdctrl->data_pos - start_pos;
1616 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1617 fdctrl->data_pos, len, fdctrl->data_len);
1618 if (fdctrl->data_dir == FD_DIR_SCANE ||
1619 fdctrl->data_dir == FD_DIR_SCANL ||
1620 fdctrl->data_dir == FD_DIR_SCANH)
1621 status2 = FD_SR2_SEH;
1622 if (FD_DID_SEEK(fdctrl->data_state))
1623 status0 |= FD_SR0_SEEK;
1624 fdctrl->data_len -= len;
1625 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1626transfer_error:
1627
1628 return len;
1629}
1630
1631/* Data register : 0x05 */
1632static uint32_t fdctrl_read_data(fdctrl_t *fdctrl)
1633{
1634 fdrive_t *cur_drv;
1635 uint32_t retval = 0;
1636 unsigned pos;
1637 int rc;
1638
1639 cur_drv = get_cur_drv(fdctrl);
1640 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1641 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1642 FLOPPY_ERROR("controller not ready for reading\n");
1643 return 0;
1644 }
1645 pos = fdctrl->data_pos % FD_SECTOR_LEN;
1646 if (fdctrl->msr & FD_MSR_NONDMA) {
1647 if (cur_drv->pDrvMedia == NULL)
1648 {
1649 if (fdctrl->data_dir == FD_DIR_WRITE)
1650 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1651 else
1652 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1653 } else if (pos == 0) {
1654 if (fdctrl->data_pos != 0)
1655 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1656 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1657 fd_sector(cur_drv));
1658 return 0;
1659 }
1660
1661 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1662 if (RT_FAILURE(rc))
1663 {
1664 FLOPPY_DPRINTF("error getting sector %d\n",
1665 fd_sector(cur_drv));
1666 /* Sure, image size is too small... */
1667 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1668 }
1669 }
1670 }
1671 retval = fdctrl->fifo[pos];
1672 if (++fdctrl->data_pos == fdctrl->data_len) {
1673 fdctrl->data_pos = 0;
1674 /* Switch from transfer mode to status mode
1675 * then from status mode to command mode
1676 */
1677 if (fdctrl->msr & FD_MSR_NONDMA) {
1678 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1679 } else {
1680 fdctrl_reset_fifo(fdctrl);
1681 fdctrl_reset_irq(fdctrl);
1682 }
1683 }
1684 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1685
1686 return retval;
1687}
1688
1689static void fdctrl_format_sector(fdctrl_t *fdctrl)
1690{
1691 fdrive_t *cur_drv;
1692 uint8_t kh, kt, ks;
1693 int ok = 0, rc;
1694
1695 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1696 cur_drv = get_cur_drv(fdctrl);
1697 kt = fdctrl->fifo[6];
1698 kh = fdctrl->fifo[7];
1699 ks = fdctrl->fifo[8];
1700 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1701 GET_CUR_DRV(fdctrl), kh, kt, ks,
1702 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1703 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1704 case 2:
1705 /* sect too big */
1706 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1707 fdctrl->fifo[3] = kt;
1708 fdctrl->fifo[4] = kh;
1709 fdctrl->fifo[5] = ks;
1710 return;
1711 case 3:
1712 /* track too big */
1713 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1714 fdctrl->fifo[3] = kt;
1715 fdctrl->fifo[4] = kh;
1716 fdctrl->fifo[5] = ks;
1717 return;
1718 case 4:
1719 /* No seek enabled */
1720 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1721 fdctrl->fifo[3] = kt;
1722 fdctrl->fifo[4] = kh;
1723 fdctrl->fifo[5] = ks;
1724 return;
1725 case 5:
1726 /* No disk in drive */
1727 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1728 fdctrl->fifo[3] = kt;
1729 fdctrl->fifo[4] = kh;
1730 fdctrl->fifo[5] = ks;
1731 return;
1732 case 1:
1733 fdctrl->data_state |= FD_STATE_SEEK;
1734 break;
1735 default:
1736 break;
1737 }
1738 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1739 if (cur_drv->pDrvMedia) {
1740 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1741 if (RT_FAILURE (rc)) {
1742 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1743 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1744 } else {
1745 ok = 1;
1746 }
1747 }
1748 if (ok) {
1749 if (cur_drv->sect == cur_drv->last_sect) {
1750 fdctrl->data_state &= ~FD_STATE_FORMAT;
1751 /* Last sector done */
1752 if (FD_DID_SEEK(fdctrl->data_state))
1753 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1754 else
1755 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1756 } else {
1757 /* More to do */
1758 fdctrl->data_pos = 0;
1759 fdctrl->data_len = 4;
1760 }
1761 }
1762}
1763
1764static void fdctrl_handle_lock(fdctrl_t *fdctrl, int direction)
1765{
1766 RT_NOREF(direction);
1767 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1768 fdctrl->fifo[0] = fdctrl->lock << 4;
1769 fdctrl_set_fifo(fdctrl, 1, 0);
1770}
1771
1772static void fdctrl_handle_dumpreg(fdctrl_t *fdctrl, int direction)
1773{
1774 RT_NOREF(direction);
1775 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1776
1777 /* Drives position */
1778 fdctrl->fifo[0] = drv0(fdctrl)->track;
1779 fdctrl->fifo[1] = drv1(fdctrl)->track;
1780#if MAX_FD == 4
1781 fdctrl->fifo[2] = drv2(fdctrl)->track;
1782 fdctrl->fifo[3] = drv3(fdctrl)->track;
1783#else
1784 fdctrl->fifo[2] = 0;
1785 fdctrl->fifo[3] = 0;
1786#endif
1787 /* timers */
1788 fdctrl->fifo[4] = fdctrl->timer0;
1789 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1790 fdctrl->fifo[6] = cur_drv->last_sect;
1791 fdctrl->fifo[7] = (fdctrl->lock << 7) |
1792 (cur_drv->perpendicular << 2);
1793 fdctrl->fifo[8] = fdctrl->config;
1794 fdctrl->fifo[9] = fdctrl->precomp_trk;
1795 fdctrl_set_fifo(fdctrl, 10, 0);
1796}
1797
1798static void fdctrl_handle_version(fdctrl_t *fdctrl, int direction)
1799{
1800 RT_NOREF(direction);
1801 /* Controller's version */
1802 fdctrl->fifo[0] = fdctrl->version;
1803 fdctrl_set_fifo(fdctrl, 1, 0);
1804}
1805
1806static void fdctrl_handle_partid(fdctrl_t *fdctrl, int direction)
1807{
1808 RT_NOREF(direction);
1809 fdctrl->fifo[0] = 0x01; /* Stepping 1 */
1810 fdctrl_set_fifo(fdctrl, 1, 0);
1811}
1812
1813static void fdctrl_handle_restore(fdctrl_t *fdctrl, int direction)
1814{
1815 RT_NOREF(direction);
1816 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1817
1818 /* Drives position */
1819 drv0(fdctrl)->track = fdctrl->fifo[3];
1820 drv1(fdctrl)->track = fdctrl->fifo[4];
1821#if MAX_FD == 4
1822 drv2(fdctrl)->track = fdctrl->fifo[5];
1823 drv3(fdctrl)->track = fdctrl->fifo[6];
1824#endif
1825 /* timers */
1826 fdctrl->timer0 = fdctrl->fifo[7];
1827 fdctrl->timer1 = fdctrl->fifo[8];
1828 cur_drv->last_sect = fdctrl->fifo[9];
1829 fdctrl->lock = fdctrl->fifo[10] >> 7;
1830 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1831 fdctrl->config = fdctrl->fifo[11];
1832 fdctrl->precomp_trk = fdctrl->fifo[12];
1833 fdctrl->pwrd = fdctrl->fifo[13];
1834 fdctrl_reset_fifo(fdctrl);
1835}
1836
1837static void fdctrl_handle_save(fdctrl_t *fdctrl, int direction)
1838{
1839 RT_NOREF(direction);
1840 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1841
1842 fdctrl->fifo[0] = 0;
1843 fdctrl->fifo[1] = 0;
1844 /* Drives position */
1845 fdctrl->fifo[2] = drv0(fdctrl)->track;
1846 fdctrl->fifo[3] = drv1(fdctrl)->track;
1847#if MAX_FD == 4
1848 fdctrl->fifo[4] = drv2(fdctrl)->track;
1849 fdctrl->fifo[5] = drv3(fdctrl)->track;
1850#else
1851 fdctrl->fifo[4] = 0;
1852 fdctrl->fifo[5] = 0;
1853#endif
1854 /* timers */
1855 fdctrl->fifo[6] = fdctrl->timer0;
1856 fdctrl->fifo[7] = fdctrl->timer1;
1857 fdctrl->fifo[8] = cur_drv->last_sect;
1858 fdctrl->fifo[9] = (fdctrl->lock << 7) |
1859 (cur_drv->perpendicular << 2);
1860 fdctrl->fifo[10] = fdctrl->config;
1861 fdctrl->fifo[11] = fdctrl->precomp_trk;
1862 fdctrl->fifo[12] = fdctrl->pwrd;
1863 fdctrl->fifo[13] = 0;
1864 fdctrl->fifo[14] = 0;
1865 fdctrl_set_fifo(fdctrl, 15, 0);
1866}
1867
1868static void fdctrl_handle_readid(fdctrl_t *fdctrl, int direction)
1869{
1870 RT_NOREF(direction);
1871 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1872
1873 FLOPPY_DPRINTF("CMD:%02x SEL:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1874
1875 fdctrl->msr &= ~FD_MSR_RQM;
1876 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1877 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hResultTimer, 1000 / 50);
1878}
1879
1880static void fdctrl_handle_format_track(fdctrl_t *fdctrl, int direction)
1881{
1882 RT_NOREF(direction);
1883 fdrive_t *cur_drv;
1884 uint8_t ns, dp;
1885
1886 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1887 cur_drv = get_cur_drv(fdctrl);
1888 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1889 ns = fdctrl->fifo[3];
1890 dp = fdctrl->fifo[5];
1891
1892 FLOPPY_DPRINTF("Format track %d at %d, %d sectors, filler %02x\n",
1893 cur_drv->track, GET_CUR_DRV(fdctrl), ns, dp);
1894 FLOPPY_DPRINTF("CMD:%02x SEL:%02x N:%02x SC:%02x GPL:%02x D:%02x\n",
1895 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1896 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5]);
1897
1898 /* Since we cannot actually format anything, we have to make sure that
1899 * whatever new format the guest is trying to establish matches the
1900 * existing format of the medium.
1901 */
1902 if (cur_drv->last_sect != ns || fdctrl->fifo[2] != 2)
1903 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_NW, 0);
1904 else
1905 {
1906 cur_drv->bps = fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1907 cur_drv->last_sect = ns;
1908
1909 fdctrl_start_format(fdctrl);
1910 }
1911}
1912
1913static void fdctrl_handle_specify(fdctrl_t *fdctrl, int direction)
1914{
1915 RT_NOREF(direction);
1916 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1917 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1918 if (fdctrl->fifo[2] & 1)
1919 fdctrl->dor &= ~FD_DOR_DMAEN;
1920 else
1921 fdctrl->dor |= FD_DOR_DMAEN;
1922 /* No result back */
1923 fdctrl_reset_fifo(fdctrl);
1924}
1925
1926static void fdctrl_handle_sense_drive_status(fdctrl_t *fdctrl, int direction)
1927{
1928 RT_NOREF(direction);
1929 fdrive_t *cur_drv;
1930
1931 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1932 cur_drv = get_cur_drv(fdctrl);
1933 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1934 /* 1 Byte status back */
1935 fdctrl->fifo[0] = (cur_drv->ro << 6) |
1936 (cur_drv->track == 0 ? 0x10 : 0x00) |
1937 (cur_drv->head << 2) |
1938 GET_CUR_DRV(fdctrl) |
1939 0x28;
1940 fdctrl_set_fifo(fdctrl, 1, 0);
1941}
1942
1943static void fdctrl_handle_recalibrate(fdctrl_t *fdctrl, int direction)
1944{
1945 RT_NOREF(direction);
1946 fdrive_t *cur_drv;
1947 uint8_t st0;
1948
1949 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1950 cur_drv = get_cur_drv(fdctrl);
1951 fd_recalibrate(cur_drv);
1952 fdctrl_reset_fifo(fdctrl);
1953 st0 = FD_SR0_SEEK | GET_CUR_DRV(fdctrl);
1954 /* No drive means no TRK0 signal. */
1955 if (cur_drv->drive == FDRIVE_DRV_NONE)
1956 st0 |= FD_SR0_ABNTERM | FD_SR0_EQPMT;
1957 /* Raise Interrupt */
1958 fdctrl_raise_irq(fdctrl, st0);
1959}
1960
1961static void fdctrl_handle_sense_interrupt_status(fdctrl_t *fdctrl, int direction)
1962{
1963 RT_NOREF(direction);
1964 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1965
1966 FLOPPY_DPRINTF("CMD:%02x\n", fdctrl->fifo[0]);
1967 if(fdctrl->reset_sensei > 0) {
1968 fdctrl->fifo[0] =
1969 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
1970 fdctrl->reset_sensei--;
1971 } else {
1972 /* XXX: status0 handling is broken for read/write
1973 commands, so we do this hack. It should be suppressed
1974 ASAP */
1975 fdctrl->fifo[0] =
1976 FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1977 /* Hack to preserve SR0 on equipment check failures (no drive). */
1978 if (fdctrl->status0 & FD_SR0_EQPMT)
1979 fdctrl->fifo[0] = fdctrl->status0;
1980 }
1981
1982 fdctrl->fifo[1] = cur_drv->track;
1983 fdctrl_set_fifo(fdctrl, 2, 0);
1984 FLOPPY_DPRINTF("ST0:%02x PCN:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1985 fdctrl->status0 = FD_SR0_RDYCHG;
1986}
1987
1988static void fdctrl_handle_seek(fdctrl_t *fdctrl, int direction)
1989{
1990 RT_NOREF(direction);
1991 fdrive_t *cur_drv;
1992
1993 FLOPPY_DPRINTF("CMD:%02x SEL:%02x NCN:%02x\n", fdctrl->fifo[0],
1994 fdctrl->fifo[1], fdctrl->fifo[2]);
1995
1996 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1997 cur_drv = get_cur_drv(fdctrl);
1998 fdctrl_reset_fifo(fdctrl);
1999
2000 /* The seek command just sends step pulses to the drive and doesn't care if
2001 * there's a medium inserted or if it's banging the head against the drive.
2002 */
2003 cur_drv->track = fdctrl->fifo[2];
2004 cur_drv->ltrk = cur_drv->track;
2005 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2006 /* Raise Interrupt */
2007 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK | GET_CUR_DRV(fdctrl));
2008}
2009
2010static void fdctrl_handle_perpendicular_mode(fdctrl_t *fdctrl, int direction)
2011{
2012 RT_NOREF(direction);
2013 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2014
2015 if (fdctrl->fifo[1] & 0x80)
2016 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
2017 /* No result back */
2018 fdctrl_reset_fifo(fdctrl);
2019}
2020
2021static void fdctrl_handle_configure(fdctrl_t *fdctrl, int direction)
2022{
2023 RT_NOREF(direction);
2024 fdctrl->config = fdctrl->fifo[2];
2025 fdctrl->precomp_trk = fdctrl->fifo[3];
2026 /* No result back */
2027 fdctrl_reset_fifo(fdctrl);
2028}
2029
2030static void fdctrl_handle_powerdown_mode(fdctrl_t *fdctrl, int direction)
2031{
2032 RT_NOREF(direction);
2033 fdctrl->pwrd = fdctrl->fifo[1];
2034 fdctrl->fifo[0] = fdctrl->fifo[1];
2035 fdctrl_set_fifo(fdctrl, 1, 0);
2036}
2037
2038static void fdctrl_handle_option(fdctrl_t *fdctrl, int direction)
2039{
2040 RT_NOREF(direction);
2041 /* No result back */
2042 fdctrl_reset_fifo(fdctrl);
2043}
2044
2045static void fdctrl_handle_drive_specification_command(fdctrl_t *fdctrl, int direction)
2046{
2047 RT_NOREF(direction);
2048 /* fdrive_t *cur_drv = get_cur_drv(fdctrl); - unused */
2049
2050 /* This command takes a variable number of parameters. It can be terminated
2051 * at any time if the high bit of a parameter is set. Once there are 6 bytes
2052 * in the FIFO (command + 5 parameter bytes), data_len/data_pos will be 7.
2053 */
2054 if (fdctrl->data_len == 7 || (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80)) {
2055
2056 /* Command parameters done */
2057 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
2058 /* Data is echoed, but not stored! */
2059 fdctrl->fifo[0] = fdctrl->data_len > 2 ? fdctrl->fifo[1] : 0;
2060 fdctrl->fifo[1] = fdctrl->data_len > 3 ? fdctrl->fifo[2] : 0;
2061 fdctrl->fifo[2] = 0;
2062 fdctrl->fifo[3] = 0;
2063 fdctrl_set_fifo(fdctrl, 4, 0);
2064 } else {
2065 fdctrl_reset_fifo(fdctrl);
2066 }
2067 } else
2068 fdctrl->data_len++; /* Wait for another byte. */
2069}
2070
2071static void fdctrl_handle_relative_seek_out(fdctrl_t *fdctrl, int direction)
2072{
2073 RT_NOREF(direction);
2074 fdrive_t *cur_drv;
2075
2076 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2077 cur_drv = get_cur_drv(fdctrl);
2078 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2079 cur_drv->track = cur_drv->max_track - 1;
2080 } else {
2081 cur_drv->track += fdctrl->fifo[2];
2082 }
2083 fdctrl_reset_fifo(fdctrl);
2084 /* Raise Interrupt */
2085 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2086}
2087
2088static void fdctrl_handle_relative_seek_in(fdctrl_t *fdctrl, int direction)
2089{
2090 RT_NOREF(direction);
2091 fdrive_t *cur_drv;
2092
2093 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2094 cur_drv = get_cur_drv(fdctrl);
2095 if (fdctrl->fifo[2] > cur_drv->track) {
2096 cur_drv->track = 0;
2097 } else {
2098 cur_drv->track -= fdctrl->fifo[2];
2099 }
2100 fdctrl_reset_fifo(fdctrl);
2101 /* Raise Interrupt */
2102 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2103}
2104
2105static const struct {
2106 uint8_t value;
2107 uint8_t mask;
2108 const char* name;
2109 int parameters;
2110 void (*handler)(fdctrl_t *fdctrl, int direction);
2111 int direction;
2112} handlers[] = {
2113 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2114 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2115 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2116 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2117 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2118 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2119 { FD_CMD_READ_TRACK, 0x9f, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2120 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2121 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2122 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2123 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2124 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
2125 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2126 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2127 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2128 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2129 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2130 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2131 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2132 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2133 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2134 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2135 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 1, fdctrl_handle_drive_specification_command },
2136 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2137 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2138 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2139 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2140 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2141 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2142 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2143 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2144 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2145};
2146/* Associate command to an index in the 'handlers' array */
2147static uint8_t command_to_handler[256];
2148
2149static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value)
2150{
2151 fdrive_t *cur_drv;
2152 int pos;
2153
2154 cur_drv = get_cur_drv(fdctrl);
2155 /* Reset mode */
2156 if (!(fdctrl->dor & FD_DOR_nRESET)) {
2157 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2158 return;
2159 }
2160 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
2161 FLOPPY_ERROR("controller not ready for writing\n");
2162 return;
2163 }
2164 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2165 /* Is it write command time ? */
2166 if (fdctrl->msr & FD_MSR_NONDMA) {
2167 /* FIFO data write */
2168 pos = fdctrl->data_pos++;
2169 pos %= FD_SECTOR_LEN;
2170 fdctrl->fifo[pos] = value;
2171
2172 if (cur_drv->pDrvMedia == NULL)
2173 {
2174 if (fdctrl->data_dir == FD_DIR_WRITE)
2175 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
2176 else
2177 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
2178 } else if (pos == FD_SECTOR_LEN - 1 ||
2179 fdctrl->data_pos == fdctrl->data_len) {
2180 blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
2181 }
2182 /* Switch from transfer mode to status mode
2183 * then from status mode to command mode
2184 */
2185 if (fdctrl->data_pos == fdctrl->data_len)
2186 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
2187 return;
2188 }
2189 if (fdctrl->data_pos == 0) {
2190 /* Command */
2191 fdctrl_reset_irq(fdctrl); /* If pending from previous seek/recalibrate. */
2192 pos = command_to_handler[value & 0xff];
2193 FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
2194 fdctrl->data_len = handlers[pos].parameters + 1;
2195 fdctrl->msr |= FD_MSR_CMDBUSY;
2196 fdctrl->cur_cmd = value & 0xff;
2197 }
2198
2199 FLOPPY_DPRINTF("%s: %02x\n", __FUNCTION__, value);
2200 fdctrl->fifo[fdctrl->data_pos++ % FD_SECTOR_LEN] = value;
2201 if (fdctrl->data_pos == fdctrl->data_len) {
2202 /* We now have all parameters
2203 * and will be able to treat the command
2204 */
2205 if (fdctrl->data_state & FD_STATE_FORMAT) {
2206 fdctrl_format_sector(fdctrl);
2207 return;
2208 }
2209
2210 pos = command_to_handler[fdctrl->fifo[0] & 0xff];
2211 FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
2212 (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
2213 }
2214}
2215
2216
2217/* -=-=-=-=-=-=-=-=- Timer Callback -=-=-=-=-=-=-=-=- */
2218
2219/**
2220 * @callback_method_impl{FNTMTIMERDEV}
2221 */
2222static DECLCALLBACK(void) fdcTimerCallback(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2223{
2224 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2225 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2226 RT_NOREF(hTimer, pvUser);
2227
2228 /* Pretend we are spinning.
2229 * This is needed for Coherent, which uses READ ID to check for
2230 * sector interleaving.
2231 */
2232 if (cur_drv->last_sect != 0) {
2233 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2234 }
2235 /* READ_ID can't automatically succeed! */
2236 if (!cur_drv->max_track) {
2237 FLOPPY_DPRINTF("read id when no disk in drive\n");
2238 /// @todo This is wrong! Command should not complete.
2239 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2240 } else if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2241 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2242 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2243 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2244 } else if (cur_drv->track >= cur_drv->max_track) {
2245 FLOPPY_DPRINTF("read id past last track (%d >= %d)\n",
2246 cur_drv->track, cur_drv->max_track);
2247 cur_drv->ltrk = 0;
2248 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2249 }
2250 else
2251 fdctrl_stop_transfer_now(fdctrl, 0x00, 0x00, 0x00);
2252}
2253
2254
2255/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2256
2257/**
2258 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f0 accesses.}
2259 */
2260static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2261{
2262 RT_NOREF(pvUser);
2263
2264 if (cb == 1)
2265 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort, u32);
2266 else
2267 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2268 return VINF_SUCCESS;
2269}
2270
2271
2272/**
2273 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f0 accesses.}
2274 */
2275static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2276{
2277 RT_NOREF(pvUser);
2278
2279 if (cb == 1)
2280 {
2281 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort);
2282 return VINF_SUCCESS;
2283 }
2284 return VERR_IOM_IOPORT_UNUSED;
2285}
2286
2287
2288/**
2289 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f1..0x3f5 accesses.}
2290 */
2291static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2292{
2293 RT_NOREF(pvUser);
2294
2295 if (cb == 1)
2296 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1, u32);
2297 else
2298 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2299 return VINF_SUCCESS;
2300}
2301
2302
2303/**
2304 * @callback_method_impl{FNTMTIMERDEV}
2305 */
2306static DECLCALLBACK(void) fdcTransferDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2307{
2308 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2309 RT_NOREF(pvUser, hTimer);
2310 fdctrl_stop_transfer_now(fdctrl, fdctrl->st0, fdctrl->st1, fdctrl->st2);
2311}
2312
2313
2314/**
2315 * @callback_method_impl{FNTMTIMERDEV}
2316 */
2317static DECLCALLBACK(void) fdcIrqDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2318{
2319 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2320 RT_NOREF(pvUser, hTimer);
2321 fdctrl_raise_irq_now(fdctrl, fdctrl->st0);
2322}
2323
2324
2325
2326/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2327/**
2328 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f1..0x3f5 accesses.}
2329 */
2330static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2331{
2332 RT_NOREF(pvUser);
2333
2334 if (cb == 1)
2335 {
2336 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1);
2337 return VINF_SUCCESS;
2338 }
2339 return VERR_IOM_IOPORT_UNUSED;
2340}
2341
2342
2343/**
2344 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f7 access.}
2345 */
2346static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2347{
2348 RT_NOREF(offPort, pvUser);
2349 Assert(offPort == 0);
2350
2351 if (cb == 1)
2352 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7, u32);
2353 else
2354 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2355 return VINF_SUCCESS;
2356}
2357
2358
2359/**
2360 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f7 access.}
2361 */
2362static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2363{
2364 RT_NOREF(pvUser, offPort);
2365 Assert(offPort == 0);
2366
2367 if (cb == 1)
2368 {
2369 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7);
2370 return VINF_SUCCESS;
2371 }
2372 return VERR_IOM_IOPORT_UNUSED;
2373}
2374
2375
2376/* -=-=-=-=-=-=-=-=- Debugger callback -=-=-=-=-=-=-=-=- */
2377
2378/**
2379 * FDC debugger info callback.
2380 *
2381 * @param pDevIns The device instance.
2382 * @param pHlp The output helpers.
2383 * @param pszArgs The arguments.
2384 */
2385static DECLCALLBACK(void) fdcInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
2386{
2387 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2388 unsigned i;
2389 bool fVerbose = false;
2390
2391 /* Parse arguments. */
2392 if (pszArgs)
2393 fVerbose = strstr(pszArgs, "verbose") != NULL;
2394
2395 /* Show basic information. */
2396 pHlp->pfnPrintf(pHlp, "%s#%d: ",
2397 pDevIns->pReg->szName,
2398 pDevIns->iInstance);
2399 pHlp->pfnPrintf(pHlp, "I/O=%X IRQ=%u DMA=%u ",
2400 pThis->io_base,
2401 pThis->irq_lvl,
2402 pThis->dma_chann);
2403 pHlp->pfnPrintf(pHlp, "RC=%RTbool R0=%RTbool\n", pDevIns->fRCEnabled, pDevIns->fR0Enabled);
2404
2405 /* Print register contents. */
2406 pHlp->pfnPrintf(pHlp, "Registers: MSR=%02X DSR=%02X DOR=%02X\n",
2407 pThis->msr, pThis->dsr, pThis->dor);
2408 pHlp->pfnPrintf(pHlp, " DIR=%02X\n",
2409 fdctrl_read_dir(pThis));
2410
2411 /* Print the current command, if any. */
2412 if (pThis->cur_cmd)
2413 pHlp->pfnPrintf(pHlp, "Curr cmd: %02X (%s)\n",
2414 pThis->cur_cmd,
2415 handlers[command_to_handler[pThis->cur_cmd]].name);
2416 if (pThis->prev_cmd)
2417 pHlp->pfnPrintf(pHlp, "Prev cmd: %02X (%s)\n",
2418 pThis->prev_cmd,
2419 handlers[command_to_handler[pThis->prev_cmd]].name);
2420
2421
2422 for (i = 0; i < pThis->num_floppies; ++i)
2423 {
2424 fdrive_t *drv = &pThis->drives[i];
2425 pHlp->pfnPrintf(pHlp, " Drive %u state:\n", i);
2426 pHlp->pfnPrintf(pHlp, " Medium : %u tracks, %u sectors\n",
2427 drv->max_track,
2428 drv->last_sect);
2429 pHlp->pfnPrintf(pHlp, " Current: track %u, head %u, sector %u\n",
2430 drv->track,
2431 drv->head,
2432 drv->sect);
2433 }
2434}
2435
2436
2437/* -=-=-=-=-=-=-=-=- Saved state -=-=-=-=-=-=-=-=- */
2438
2439/**
2440 * @callback_method_impl{FNSSMDEVSAVEEXEC}
2441 */
2442static DECLCALLBACK(int) fdcSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2443{
2444 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2445 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2446 unsigned int i;
2447 int rc;
2448
2449 /* Save the FDC I/O registers... */
2450 pHlp->pfnSSMPutU8(pSSM, pThis->sra);
2451 pHlp->pfnSSMPutU8(pSSM, pThis->srb);
2452 pHlp->pfnSSMPutU8(pSSM, pThis->dor);
2453 pHlp->pfnSSMPutU8(pSSM, pThis->tdr);
2454 pHlp->pfnSSMPutU8(pSSM, pThis->dsr);
2455 pHlp->pfnSSMPutU8(pSSM, pThis->msr);
2456 /* ...the status registers... */
2457 pHlp->pfnSSMPutU8(pSSM, pThis->status0);
2458 pHlp->pfnSSMPutU8(pSSM, pThis->status1);
2459 pHlp->pfnSSMPutU8(pSSM, pThis->status2);
2460 /* ...the command FIFO... */
2461 pHlp->pfnSSMPutU32(pSSM, sizeof(pThis->fifo));
2462 pHlp->pfnSSMPutMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2463 pHlp->pfnSSMPutU32(pSSM, pThis->data_pos);
2464 pHlp->pfnSSMPutU32(pSSM, pThis->data_len);
2465 pHlp->pfnSSMPutU8(pSSM, pThis->data_state);
2466 pHlp->pfnSSMPutU8(pSSM, pThis->data_dir);
2467 /* ...and miscellaneous internal FDC state. */
2468 pHlp->pfnSSMPutU8(pSSM, pThis->reset_sensei);
2469 pHlp->pfnSSMPutU8(pSSM, pThis->eot);
2470 pHlp->pfnSSMPutU8(pSSM, pThis->timer0);
2471 pHlp->pfnSSMPutU8(pSSM, pThis->timer1);
2472 pHlp->pfnSSMPutU8(pSSM, pThis->precomp_trk);
2473 pHlp->pfnSSMPutU8(pSSM, pThis->config);
2474 pHlp->pfnSSMPutU8(pSSM, pThis->lock);
2475 pHlp->pfnSSMPutU8(pSSM, pThis->pwrd);
2476 pHlp->pfnSSMPutU8(pSSM, pThis->version);
2477
2478 /* Save the number of drives and per-drive state. Note that the media
2479 * states will be updated in fd_revalidate() and need not be saved.
2480 */
2481 pHlp->pfnSSMPutU8(pSSM, pThis->num_floppies);
2482 Assert(RT_ELEMENTS(pThis->drives) == pThis->num_floppies);
2483 for (i = 0; i < pThis->num_floppies; ++i)
2484 {
2485 fdrive_t *d = &pThis->drives[i];
2486
2487 pHlp->pfnSSMPutMem(pSSM, &d->Led, sizeof(d->Led));
2488 pHlp->pfnSSMPutU32(pSSM, d->drive);
2489 pHlp->pfnSSMPutU8(pSSM, d->dsk_chg);
2490 pHlp->pfnSSMPutU8(pSSM, d->perpendicular);
2491 pHlp->pfnSSMPutU8(pSSM, d->head);
2492 pHlp->pfnSSMPutU8(pSSM, d->track);
2493 pHlp->pfnSSMPutU8(pSSM, d->sect);
2494 }
2495 rc = pHlp->pfnTimerSave(pDevIns, pThis->hXferDelayTimer, pSSM);
2496 AssertRCReturn(rc, rc);
2497 rc = pHlp->pfnTimerSave(pDevIns, pThis->hIrqDelayTimer, pSSM);
2498 AssertRCReturn(rc, rc);
2499 return pHlp->pfnTimerSave(pDevIns, pThis->hResultTimer, pSSM);
2500}
2501
2502
2503/**
2504 * @callback_method_impl{FNSSMDEVLOADEXEC}
2505 */
2506static DECLCALLBACK(int) fdcLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2507{
2508 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2509 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2510 unsigned int i;
2511 uint32_t val32;
2512 uint8_t val8;
2513 int rc;
2514
2515 if (uVersion > FDC_SAVESTATE_CURRENT)
2516 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2517 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2518
2519 if (uVersion > FDC_SAVESTATE_OLD)
2520 {
2521 /* Load the FDC I/O registers... */
2522 pHlp->pfnSSMGetU8(pSSM, &pThis->sra);
2523 pHlp->pfnSSMGetU8(pSSM, &pThis->srb);
2524 pHlp->pfnSSMGetU8(pSSM, &pThis->dor);
2525 pHlp->pfnSSMGetU8(pSSM, &pThis->tdr);
2526 pHlp->pfnSSMGetU8(pSSM, &pThis->dsr);
2527 pHlp->pfnSSMGetU8(pSSM, &pThis->msr);
2528 /* ...the status registers... */
2529 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2530 pHlp->pfnSSMGetU8(pSSM, &pThis->status1);
2531 pHlp->pfnSSMGetU8(pSSM, &pThis->status2);
2532 /* ...the command FIFO, if the size matches... */
2533 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2534 AssertRCReturn(rc, rc);
2535 AssertMsgReturn(sizeof(pThis->fifo) == val32,
2536 ("The size of FIFO in saved state doesn't match!\n"),
2537 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2538 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2539 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2540 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2541 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2542 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2543 /* ...and miscellaneous internal FDC state. */
2544 pHlp->pfnSSMGetU8(pSSM, &pThis->reset_sensei);
2545 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2546 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2547 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2548 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2549 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2550 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2551 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2552 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2553
2554 /* Validate the number of drives. */
2555 rc = pHlp->pfnSSMGetU8(pSSM, &pThis->num_floppies);
2556 AssertRCReturn(rc, rc);
2557 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == pThis->num_floppies,
2558 ("The number of drives in saved state doesn't match!\n"),
2559 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2560
2561 /* Load the per-drive state. */
2562 for (i = 0; i < pThis->num_floppies; ++i)
2563 {
2564 fdrive_t *d = &pThis->drives[i];
2565
2566 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof(d->Led));
2567 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2568 AssertRCReturn(rc, rc);
2569 d->drive = (fdrive_type_t)val32;
2570 pHlp->pfnSSMGetU8(pSSM, &d->dsk_chg);
2571 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2572 pHlp->pfnSSMGetU8(pSSM, &d->head);
2573 pHlp->pfnSSMGetU8(pSSM, &d->track);
2574 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2575 }
2576
2577 if (uVersion > FDC_SAVESTATE_PRE_DELAY)
2578 {
2579 pHlp->pfnTimerLoad(pDevIns, pThis->hXferDelayTimer, pSSM);
2580 pHlp->pfnTimerLoad(pDevIns, pThis->hIrqDelayTimer, pSSM);
2581 }
2582 }
2583 else if (uVersion == FDC_SAVESTATE_OLD)
2584 {
2585 /* The old saved state was significantly different. However, we can get
2586 * back most of the controller state and fix the rest by pretending the
2587 * disk in the drive (if any) has been replaced. At any rate there should
2588 * be no difficulty unless the state was saved during a floppy operation.
2589 */
2590
2591 /* First verify a few assumptions. */
2592 AssertMsgReturn(sizeof(pThis->fifo) == FD_SECTOR_LEN,
2593 ("The size of FIFO in saved state doesn't match!\n"),
2594 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2595 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == 2,
2596 ("The number of drives in old saved state doesn't match!\n"),
2597 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2598 /* Now load the old state. */
2599 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2600 /* Toss IRQ level, DMA channel, I/O base, and state. */
2601 pHlp->pfnSSMGetU8(pSSM, &val8);
2602 pHlp->pfnSSMGetU8(pSSM, &val8);
2603 pHlp->pfnSSMGetU32(pSSM, &val32);
2604 pHlp->pfnSSMGetU8(pSSM, &val8);
2605 /* Translate dma_en. */
2606 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2607 AssertRCReturn(rc, rc);
2608 if (val8)
2609 pThis->dor |= FD_DOR_DMAEN;
2610 pHlp->pfnSSMGetU8(pSSM, &pThis->cur_drv);
2611 /* Translate bootsel. */
2612 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2613 AssertRCReturn(rc, rc);
2614 pThis->tdr |= val8 << 2;
2615 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, FD_SECTOR_LEN);
2616 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2617 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2618 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2619 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2620 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2621 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2622 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2623 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2624 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2625 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2626 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2627 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2628
2629 for (i = 0; i < 2; ++i)
2630 {
2631 fdrive_t *d = &pThis->drives[i];
2632
2633 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof (d->Led));
2634 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2635 d->drive = (fdrive_type_t)val32;
2636 AssertRCReturn(rc, rc);
2637 pHlp->pfnSSMGetU32(pSSM, &val32); /* Toss drflags */
2638 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2639 pHlp->pfnSSMGetU8(pSSM, &d->head);
2640 pHlp->pfnSSMGetU8(pSSM, &d->track);
2641 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2642 pHlp->pfnSSMGetU8(pSSM, &val8); /* Toss dir, rw */
2643 pHlp->pfnSSMGetU8(pSSM, &val8);
2644 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2645 AssertRCReturn(rc, rc);
2646 d->flags = (fdrive_flags_t)val32;
2647 pHlp->pfnSSMGetU8(pSSM, &d->last_sect);
2648 pHlp->pfnSSMGetU8(pSSM, &d->max_track);
2649 pHlp->pfnSSMGetU16(pSSM, &d->bps);
2650 pHlp->pfnSSMGetU8(pSSM, &d->ro);
2651 }
2652 }
2653 else
2654 AssertFailedReturn(VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
2655 return pHlp->pfnTimerLoad(pDevIns, pThis->hResultTimer, pSSM);
2656}
2657
2658
2659/* -=-=-=-=-=-=-=-=- Drive level interfaces -=-=-=-=-=-=-=-=- */
2660
2661/**
2662 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnMountNotify}
2663 */
2664static DECLCALLBACK(void) fdMountNotify(PPDMIMOUNTNOTIFY pInterface)
2665{
2666 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2667 LogFlow(("fdMountNotify:\n"));
2668 fd_revalidate(pDrv);
2669}
2670
2671
2672/**
2673 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnUnmountNotify}
2674 */
2675static DECLCALLBACK(void) fdUnmountNotify(PPDMIMOUNTNOTIFY pInterface)
2676{
2677 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2678 LogFlow(("fdUnmountNotify:\n"));
2679 fd_revalidate(pDrv);
2680}
2681
2682
2683/**
2684 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2685 */
2686static DECLCALLBACK(void *) fdQueryInterface (PPDMIBASE pInterface, const char *pszIID)
2687{
2688 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IBase);
2689
2690 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDrv->IBase);
2691 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDrv->IPort);
2692 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMOUNTNOTIFY, &pDrv->IMountNotify);
2693 return NULL;
2694}
2695
2696
2697/**
2698 * @interface_method_impl{PDMIMEDIAPORT,pfnQueryDeviceLocation}
2699 */
2700static DECLCALLBACK(int) fdQueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2701 uint32_t *piInstance, uint32_t *piLUN)
2702{
2703 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IPort);
2704 PPDMDEVINS pDevIns = pDrv->pDevIns;
2705
2706 AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2707 AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2708 AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2709
2710 *ppcszController = pDevIns->pReg->szName;
2711 *piInstance = pDevIns->iInstance;
2712 *piLUN = pDrv->iLUN;
2713
2714 return VINF_SUCCESS;
2715}
2716
2717/* -=-=-=-=-=-=-=-=- Controller level interfaces -=-=-=-=-=-=-=-=- */
2718
2719/**
2720 * @interface_method_impl{PDMILEDPORTS,pfnQueryStatusLed}
2721 */
2722static DECLCALLBACK(int) fdcStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2723{
2724 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, ILeds);
2725 if (iLUN < RT_ELEMENTS(pThis->drives)) {
2726 *ppLed = &pThis->drives[iLUN].Led;
2727 Assert ((*ppLed)->u32Magic == PDMLED_MAGIC);
2728 return VINF_SUCCESS;
2729 }
2730 return VERR_PDM_LUN_NOT_FOUND;
2731}
2732
2733
2734/**
2735 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2736 */
2737static DECLCALLBACK(void *) fdcStatusQueryInterface(PPDMIBASE pInterface, const char *pszIID)
2738{
2739 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, IBaseStatus);
2740
2741 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBaseStatus);
2742 PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
2743 return NULL;
2744}
2745
2746
2747/**
2748 * Configure a drive.
2749 *
2750 * @returns VBox status code.
2751 * @param drv The drive in question.
2752 * @param pDevIns The driver instance.
2753 * @param fInit Set if we're at init time and can change the drive type.
2754 */
2755static int fdConfig(fdrive_t *drv, PPDMDEVINS pDevIns, bool fInit)
2756{
2757 static const char * const s_apszDesc[] = {"Floppy Drive A:", "Floppy Drive B"};
2758 int rc;
2759
2760 /*
2761 * Reset the LED just to be on the safe side.
2762 */
2763 Assert (RT_ELEMENTS(s_apszDesc) > drv->iLUN);
2764 Assert (drv->Led.u32Magic == PDMLED_MAGIC);
2765 drv->Led.Actual.u32 = 0;
2766 drv->Led.Asserted.u32 = 0;
2767
2768 /*
2769 * Try attach the block device and get the interfaces.
2770 */
2771 rc = PDMDevHlpDriverAttach (pDevIns, drv->iLUN, &drv->IBase, &drv->pDrvBase, s_apszDesc[drv->iLUN]);
2772 if (RT_SUCCESS (rc)) {
2773 drv->pDrvMedia = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMEDIA);
2774 if (drv->pDrvMedia) {
2775 drv->pDrvMount = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMOUNT);
2776 if (drv->pDrvMount) {
2777 fd_init(drv, fInit);
2778 } else {
2779 AssertMsgFailed (("Configuration error: LUN#%d without mountable interface!\n", drv->iLUN));
2780 rc = VERR_PDM_MISSING_INTERFACE;
2781 }
2782
2783 } else {
2784 AssertMsgFailed (("Configuration error: LUN#%d hasn't a block interface!\n", drv->iLUN));
2785 rc = VERR_PDM_MISSING_INTERFACE;
2786 }
2787 } else {
2788 AssertMsg (rc == VERR_PDM_NO_ATTACHED_DRIVER,
2789 ("Failed to attach LUN#%d. rc=%Rrc\n", drv->iLUN, rc));
2790 switch (rc) {
2791 case VERR_ACCESS_DENIED:
2792 /* Error already cached by DrvHostBase */
2793 break;
2794 case VERR_PDM_NO_ATTACHED_DRIVER:
2795 /* Legal on architectures without a floppy controller */
2796 break;
2797 default:
2798 rc = PDMDevHlpVMSetError (pDevIns, rc, RT_SRC_POS,
2799 N_ ("The floppy controller cannot attach to the floppy drive"));
2800 break;
2801 }
2802 }
2803
2804 if (RT_FAILURE (rc)) {
2805 drv->pDrvBase = NULL;
2806 drv->pDrvMedia = NULL;
2807 drv->pDrvMount = NULL;
2808 }
2809 LogFlow (("fdConfig: returns %Rrc\n", rc));
2810 return rc;
2811}
2812
2813
2814/**
2815 * @interface_method_impl{PDMDEVREG,pfnAttach}
2816 *
2817 * This is called when we change block driver for a floppy drive.
2818 */
2819static DECLCALLBACK(int) fdcAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2820{
2821 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2822 fdrive_t *drv;
2823 int rc;
2824 LogFlow (("ideDetach: iLUN=%u\n", iLUN));
2825
2826 AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
2827 ("The FDC device does not support hotplugging\n"),
2828 VERR_INVALID_PARAMETER);
2829
2830 /*
2831 * Validate.
2832 */
2833 if (iLUN >= 2) {
2834 AssertMsgFailed (("Configuration error: cannot attach or detach any but the first two LUNs - iLUN=%u\n",
2835 iLUN));
2836 return VERR_PDM_DEVINS_NO_ATTACH;
2837 }
2838
2839 /*
2840 * Locate the drive and stuff.
2841 */
2842 drv = &fdctrl->drives[iLUN];
2843
2844 /* the usual paranoia */
2845 AssertRelease (!drv->pDrvBase);
2846 AssertRelease (!drv->pDrvMedia);
2847 AssertRelease (!drv->pDrvMount);
2848
2849 rc = fdConfig (drv, pDevIns, false /*fInit*/);
2850 AssertMsg (rc != VERR_PDM_NO_ATTACHED_DRIVER,
2851 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", iLUN, rc));
2852 if (RT_SUCCESS(rc)) {
2853 fd_revalidate (drv);
2854 }
2855
2856 LogFlow (("floppyAttach: returns %Rrc\n", rc));
2857 return rc;
2858}
2859
2860
2861/**
2862 * @interface_method_impl{PDMDEVREG,pfnDetach}
2863 *
2864 * The floppy drive has been temporarily 'unplugged'.
2865 */
2866static DECLCALLBACK(void) fdcDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2867{
2868 RT_NOREF(fFlags);
2869 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2870 LogFlow (("ideDetach: iLUN=%u\n", iLUN));
2871
2872 switch (iLUN)
2873 {
2874 case 0:
2875 case 1:
2876 {
2877 fdrive_t *drv = &pThis->drives[iLUN];
2878 drv->pDrvBase = NULL;
2879 drv->pDrvMedia = NULL;
2880 drv->pDrvMount = NULL;
2881 break;
2882 }
2883
2884 default:
2885 AssertMsgFailed(("Cannot detach LUN#%d!\n", iLUN));
2886 break;
2887 }
2888}
2889
2890
2891/**
2892 * @interface_method_impl{PDMDEVREG,pfnReset}
2893 *
2894 * I haven't check the specs on what's supposed to happen on reset, but we
2895 * should get any 'FATAL: floppy recal:f07 ctrl not ready' when resetting
2896 * at wrong time like we do if this was all void.
2897 */
2898static DECLCALLBACK(void) fdcReset(PPDMDEVINS pDevIns)
2899{
2900 fdctrl_t *pThis = PDMDEVINS_2_DATA (pDevIns, fdctrl_t *);
2901 unsigned i;
2902 LogFlow (("fdcReset:\n"));
2903
2904 fdctrl_reset(pThis, 0);
2905
2906 for (i = 0; i < RT_ELEMENTS(pThis->drives); i++)
2907 fd_revalidate(&pThis->drives[i]);
2908}
2909
2910
2911/**
2912 * @interface_method_impl{PDMDEVREG,pfnConstruct}
2913 */
2914static DECLCALLBACK(int) fdcConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
2915{
2916 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
2917 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2918 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2919 int rc;
2920
2921 RT_NOREF(iInstance);
2922 Assert(iInstance == 0);
2923
2924 /*
2925 * Validate configuration.
2926 */
2927 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|DMA|MemMapped|IOBase|StatusA|IRQDelay", "");
2928
2929 /*
2930 * Read the configuration.
2931 */
2932 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "IRQ", &pThis->irq_lvl, 6);
2933 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 IRQ, rc=%Rrc\n", rc), rc);
2934
2935 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "DMA", &pThis->dma_chann, 2);
2936 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 DMA, rc=%Rrc\n", rc), rc);
2937
2938 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IOBase", &pThis->io_base, 0x3f0);
2939 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IOBase, rc=%Rrc\n", rc), rc);
2940
2941 bool fMemMapped;
2942 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "MemMapped", &fMemMapped, false);
2943 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value MemMapped rc=%Rrc\n", rc), rc);
2944
2945 uint16_t uIrqDelay;
2946 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IRQDelay", &uIrqDelay, 0);
2947 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IRQDelay, rc=%Rrc\n", rc), rc);
2948
2949 bool fStatusA;
2950 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "StatusA", &fStatusA, false);
2951 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value fStatusA rc=%Rrc\n", rc), rc);
2952
2953 /*
2954 * Initialize data.
2955 */
2956 LogFlow(("fdcConstruct: irq_lvl=%d dma_chann=%d io_base=%#x\n", pThis->irq_lvl, pThis->dma_chann, pThis->io_base));
2957 pThis->pDevIns = pDevIns;
2958 pThis->version = 0x90; /* Intel 82078 controller */
2959 pThis->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2960 pThis->num_floppies = MAX_FD;
2961 pThis->hIoPorts0 = NIL_IOMMMIOHANDLE;
2962 pThis->hIoPorts1 = NIL_IOMMMIOHANDLE;
2963 pThis->hIoPorts2 = NIL_IOMMMIOHANDLE;
2964
2965 /* Fill 'command_to_handler' lookup table */
2966 for (int ii = RT_ELEMENTS(handlers) - 1; ii >= 0; ii--)
2967 for (unsigned j = 0; j < sizeof(command_to_handler); j++)
2968 if ((j & handlers[ii].mask) == handlers[ii].value)
2969 command_to_handler[j] = ii;
2970
2971 pThis->IBaseStatus.pfnQueryInterface = fdcStatusQueryInterface;
2972 pThis->ILeds.pfnQueryStatusLed = fdcStatusQueryStatusLed;
2973
2974 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); ++i)
2975 {
2976 fdrive_t *pDrv = &pThis->drives[i];
2977
2978 pDrv->drive = FDRIVE_DRV_NONE;
2979 pDrv->iLUN = i;
2980 pDrv->pDevIns = pDevIns;
2981
2982 pDrv->IBase.pfnQueryInterface = fdQueryInterface;
2983 pDrv->IMountNotify.pfnMountNotify = fdMountNotify;
2984 pDrv->IMountNotify.pfnUnmountNotify = fdUnmountNotify;
2985 pDrv->IPort.pfnQueryDeviceLocation = fdQueryDeviceLocation;
2986 pDrv->Led.u32Magic = PDMLED_MAGIC;
2987 }
2988
2989 /*
2990 * Create the FDC timer.
2991 */
2992 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, fdcTimerCallback, pThis,
2993 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
2994 "FDC Timer", &pThis->hResultTimer);
2995 AssertRCReturn(rc, rc);
2996
2997 /*
2998 * Create the transfer delay timer.
2999 */
3000 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcTransferDelayTimer, pThis,
3001 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3002 "FDC Transfer Delay", &pThis->hXferDelayTimer);
3003 AssertRCReturn(rc, rc);
3004
3005 /*
3006 * Create the IRQ delay timer.
3007 */
3008 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcIrqDelayTimer, pThis,
3009 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3010 "FDC IRQ Delay", &pThis->hIrqDelayTimer);
3011 AssertRCReturn(rc, rc);
3012
3013 pThis->uIrqDelayMsec = uIrqDelay;
3014
3015 /*
3016 * Register DMA channel.
3017 */
3018 if (pThis->dma_chann != 0xff)
3019 {
3020 rc = PDMDevHlpDMARegister(pDevIns, pThis->dma_chann, &fdctrl_transfer_handler, pThis);
3021 AssertRCReturn(rc, rc);
3022 }
3023
3024 /*
3025 * IO / MMIO.
3026 *
3027 * We must skip I/O port 0x3f6 as it is the ATA alternate status register.
3028 * Why we skip registering status register A, though, isn't as clear.
3029 */
3030 if (!fMemMapped)
3031 {
3032 static const IOMIOPORTDESC s_aDescs[] =
3033 {
3034 { "SRA", NULL, "Status register A", NULL },
3035 { "SRB", NULL, "Status register B", NULL },
3036 { "DOR", "DOR", "Digital output register", "Digital output register"},
3037 { "TDR", "TDR", "Tape driver register", "Tape driver register"},
3038 { "MSR", "DSR", "Main status register", "Datarate select register" },
3039 { "FIFO", "FIFO", "Data FIFO", "Data FIFO" },
3040 { "ATA", "ATA", NULL, NULL },
3041 { "DIR", "CCR", "Digital input register", "Configuration control register"},
3042 { NULL, NULL, NULL, NULL }
3043 };
3044
3045 /* 0x3f0 */
3046 if (fStatusA)
3047 {
3048 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base, 1 /*cPorts*/, fdcIoPort0Write, fdcIoPort0Read,
3049 "FDC-SRA", s_aDescs, &pThis->hIoPorts0);
3050 AssertRCReturn(rc, rc);
3051 }
3052
3053 /* 0x3f1..0x3f5 */
3054 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x1, 5, fdcIoPort1Write, fdcIoPort1Read,
3055 "FDC#1", &s_aDescs[1], &pThis->hIoPorts1);
3056 AssertRCReturn(rc, rc);
3057
3058 /* 0x3f7 */
3059 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x7, 1, fdcIoPort2Write, fdcIoPort2Read,
3060 "FDC#2", &s_aDescs[7], &pThis->hIoPorts2);
3061 AssertRCReturn(rc, rc);
3062 }
3063 else
3064 AssertMsgFailedReturn(("Memory mapped floppy not support by now\n"), VERR_NOT_SUPPORTED);
3065
3066 /*
3067 * Register the saved state data unit.
3068 */
3069 rc = PDMDevHlpSSMRegister(pDevIns, FDC_SAVESTATE_CURRENT, sizeof(*pThis), fdcSaveExec, fdcLoadExec);
3070 AssertRCReturn(rc, rc);
3071
3072 /*
3073 * Register the debugger info callback.
3074 */
3075 PDMDevHlpDBGFInfoRegister(pDevIns, "fdc", "FDC info", fdcInfo);
3076
3077 /*
3078 * Attach the status port (optional).
3079 */
3080 PPDMIBASE pBase;
3081 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBaseStatus, &pBase, "Status Port");
3082 if (RT_SUCCESS (rc))
3083 pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
3084 else
3085 AssertMsgReturn(rc == VERR_PDM_NO_ATTACHED_DRIVER, ("Failed to attach to status driver. rc=%Rrc\n", rc), rc);
3086
3087 /*
3088 * Initialize drives.
3089 */
3090 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3091 {
3092 rc = fdConfig(&pThis->drives[i], pDevIns, true /*fInit*/);
3093 AssertMsgReturn(RT_SUCCESS(rc) || rc == VERR_PDM_NO_ATTACHED_DRIVER,
3094 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", i, rc),
3095 rc);
3096 }
3097
3098 fdctrl_reset(pThis, 0);
3099
3100 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3101 fd_revalidate(&pThis->drives[i]);
3102
3103 return VINF_SUCCESS;
3104}
3105
3106
3107/**
3108 * The device registration structure.
3109 */
3110const PDMDEVREG g_DeviceFloppyController =
3111{
3112 /* .u32Version = */ PDM_DEVREG_VERSION,
3113 /* .uReserved0 = */ 0,
3114 /* .szName = */ "i82078",
3115 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_NEW_STYLE,
3116 /* .fClass = */ PDM_DEVREG_CLASS_STORAGE,
3117 /* .cMaxInstances = */ 1,
3118 /* .uSharedVersion = */ 42,
3119 /* .cbInstanceShared = */ sizeof(fdctrl_t),
3120 /* .cbInstanceCC = */ 0,
3121 /* .cbInstanceRC = */ 0,
3122 /* .cMaxPciDevices = */ 0,
3123 /* .cMaxMsixVectors = */ 0,
3124 /* .pszDescription = */ "Floppy drive controller (Intel 82078)",
3125#if defined(IN_RING3)
3126 /* .pszRCMod = */ "",
3127 /* .pszR0Mod = */ "",
3128 /* .pfnConstruct = */ fdcConstruct,
3129 /* .pfnDestruct = */ NULL,
3130 /* .pfnRelocate = */ NULL,
3131 /* .pfnMemSetup = */ NULL,
3132 /* .pfnPowerOn = */ NULL,
3133 /* .pfnReset = */ fdcReset,
3134 /* .pfnSuspend = */ NULL,
3135 /* .pfnResume = */ NULL,
3136 /* .pfnAttach = */ fdcAttach,
3137 /* .pfnDetach = */ fdcDetach,
3138 /* .pfnQueryInterface = */ NULL,
3139 /* .pfnInitComplete = */ NULL,
3140 /* .pfnPowerOff = */ NULL,
3141 /* .pfnSoftReset = */ NULL,
3142 /* .pfnReserved0 = */ NULL,
3143 /* .pfnReserved1 = */ NULL,
3144 /* .pfnReserved2 = */ NULL,
3145 /* .pfnReserved3 = */ NULL,
3146 /* .pfnReserved4 = */ NULL,
3147 /* .pfnReserved5 = */ NULL,
3148 /* .pfnReserved6 = */ NULL,
3149 /* .pfnReserved7 = */ NULL,
3150#elif defined(IN_RING0)
3151 /* .pfnEarlyConstruct = */ NULL,
3152 /* .pfnConstruct = */ NULL,
3153 /* .pfnDestruct = */ NULL,
3154 /* .pfnFinalDestruct = */ NULL,
3155 /* .pfnRequest = */ NULL,
3156 /* .pfnReserved0 = */ NULL,
3157 /* .pfnReserved1 = */ NULL,
3158 /* .pfnReserved2 = */ NULL,
3159 /* .pfnReserved3 = */ NULL,
3160 /* .pfnReserved4 = */ NULL,
3161 /* .pfnReserved5 = */ NULL,
3162 /* .pfnReserved6 = */ NULL,
3163 /* .pfnReserved7 = */ NULL,
3164#elif defined(IN_RC)
3165 /* .pfnConstruct = */ NULL,
3166 /* .pfnReserved0 = */ NULL,
3167 /* .pfnReserved1 = */ NULL,
3168 /* .pfnReserved2 = */ NULL,
3169 /* .pfnReserved3 = */ NULL,
3170 /* .pfnReserved4 = */ NULL,
3171 /* .pfnReserved5 = */ NULL,
3172 /* .pfnReserved6 = */ NULL,
3173 /* .pfnReserved7 = */ NULL,
3174#else
3175# error "Not in IN_RING3, IN_RING0 or IN_RC!"
3176#endif
3177 /* .u32VersionEnd = */ PDM_DEVREG_VERSION
3178};
3179
3180/*
3181 * Local Variables:
3182 * mode: c
3183 * c-file-style: "k&r"
3184 * indent-tabs-mode: nil
3185 * End:
3186 */
3187
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