VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/DevFdc.cpp@ 106061

Last change on this file since 106061 was 106061, checked in by vboxsync, 3 months ago

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1/* $Id: DevFdc.cpp 106061 2024-09-16 14:03:52Z vboxsync $ */
2/** @file
3 * VBox storage devices - Floppy disk controller
4 */
5
6/*
7 * Copyright (C) 2006-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 * --------------------------------------------------------------------
27 *
28 * This code is based on:
29 *
30 * QEMU Floppy disk emulator (Intel 82078)
31 *
32 * Copyright (c) 2003 Jocelyn Mayer
33 *
34 * Permission is hereby granted, free of charge, to any person obtaining a copy
35 * of this software and associated documentation files (the "Software"), to deal
36 * in the Software without restriction, including without limitation the rights
37 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
38 * copies of the Software, and to permit persons to whom the Software is
39 * furnished to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be included in
42 * all copies or substantial portions of the Software.
43 *
44 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
45 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
46 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
48 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
49 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
50 * THE SOFTWARE.
51 *
52 */
53
54
55/*********************************************************************************************************************************
56* Header Files *
57*********************************************************************************************************************************/
58#define LOG_GROUP LOG_GROUP_DEV_FDC
59#include <VBox/vmm/pdmdev.h>
60#include <VBox/vmm/pdmstorageifs.h>
61#include <VBox/AssertGuest.h>
62#include <iprt/assert.h>
63#include <iprt/string.h>
64#include <iprt/uuid.h>
65
66#include "VBoxDD.h"
67
68
69/*********************************************************************************************************************************
70* Defined Constants And Macros *
71*********************************************************************************************************************************/
72/** @name FDC saved state versions
73 * @{ */
74#define FDC_SAVESTATE_CURRENT 3 /**< Current version. */
75#define FDC_SAVESTATE_PRE_DELAY 2 /**< Pre IRQDelay. */
76#define FDC_SAVESTATE_OLD 1 /**< The original saved state. */
77/** @}*/
78
79#define MAX_FD 2
80
81
82/********************************************************/
83/* debug Floppy devices */
84/* #define DEBUG_FLOPPY */
85
86#ifdef LOG_ENABLED
87# define FLOPPY_DPRINTF(...) Log(("floppy: " __VA_ARGS__))
88#else
89# define FLOPPY_DPRINTF(...) do { } while (0)
90#endif
91
92#define FLOPPY_ERROR RTLogPrintf
93
94typedef struct fdctrl_t fdctrl_t;
95
96/********************************************************/
97/* Floppy drive emulation */
98
99/* Drive selection note:
100 * For many commands, the FDC can select one of four drives through the
101 * second command byte. The Digital Output Register (DOR) can also select
102 * one of four drives. On PCs, the FDC drive selection is ignored, but
103 * should be reflected back in command status. Only the DOR drive selection
104 * is effective; on old PCs with a discrete NEC uPD765 or similar, the FDC
105 * drive selection signals (US0/US1) are not connected at all.
106 * NB: A drive is actually selected only when its motor on bit in the DOR
107 * is also set. It is possible to have no drive selected.
108 *
109 * The FDC cur_drv field tracks the drive the FDC thinks is selected, but
110 * the DOR is used for actual drive selection.
111 */
112
113#define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
114#define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
115
116/* Will always be a fixed parameter for us */
117#define FD_SECTOR_LEN 512
118#define FD_SECTOR_SC 2 /* Sector size code */
119#define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
120
121/* Floppy disk drive emulation */
122typedef enum fdrive_type_t {
123 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
124 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
125 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
126 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
127 FDRIVE_DRV_FAKE_15_6 = 0x0e, /* Fake 15.6 MB drive. */
128 FDRIVE_DRV_FAKE_63_5 = 0x0f /* Fake 63.5 MB drive. */
129} fdrive_type_t;
130
131typedef uint8_t fdrive_flags_t;
132#define FDISK_DBL_SIDES UINT8_C(0x01)
133
134typedef enum fdrive_rate_t {
135 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
136 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
137 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
138 FDRIVE_RATE_1M = 0x03 /* 1 Mbps */
139} fdrive_rate_t;
140
141/**
142 * The status for one drive.
143 *
144 * @implements PDMIBASE
145 * @implements PDMIMEDIAPORT
146 * @implements PDMIMOUNTNOTIFY
147 */
148typedef struct fdrive_t {
149 /** Pointer to the owning device instance. */
150 R3PTRTYPE(PPDMDEVINS) pDevIns;
151 /** Pointer to the attached driver's base interface. */
152 R3PTRTYPE(PPDMIBASE) pDrvBase;
153 /** Pointer to the attached driver's block interface. */
154 R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
155 /** Pointer to the attached driver's mount interface.
156 * This is NULL if the driver isn't a removable unit. */
157 R3PTRTYPE(PPDMIMOUNT) pDrvMount;
158 /** The base interface. */
159 PDMIBASE IBase;
160 /** The block port interface. */
161 PDMIMEDIAPORT IPort;
162 /** The mount notify interface. */
163 PDMIMOUNTNOTIFY IMountNotify;
164 /** The LUN #. */
165 RTUINT iLUN;
166 /** The LED for this LUN. */
167 PDMLED Led;
168 /* Drive status */
169 fdrive_type_t drive;
170 uint8_t perpendicular; /* 2.88 MB access mode */
171 uint8_t dsk_chg; /* Disk change line */
172 /* Position */
173 uint8_t head;
174 uint8_t track;
175 uint8_t sect;
176 uint8_t ltrk; /* Logical track */
177 /* Media */
178 fdrive_flags_t flags;
179 uint8_t last_sect; /* Nb sector per track */
180 uint8_t max_track; /* Nb of tracks */
181 uint16_t bps; /* Bytes per sector */
182 uint8_t ro; /* Is read-only */
183 uint8_t media_rate; /* Data rate of medium */
184} fdrive_t;
185
186#define NUM_SIDES(drv) (drv->flags & FDISK_DBL_SIDES ? 2 : 1)
187
188static void fd_init(fdrive_t *drv, bool fInit)
189{
190 /* Drive */
191 if (fInit) {
192 /* Fixate the drive type at init time if possible. */
193 if (drv->pDrvMedia) {
194 PDMMEDIATYPE enmType = drv->pDrvMedia->pfnGetType(drv->pDrvMedia);
195 switch (enmType) {
196 case PDMMEDIATYPE_FLOPPY_360:
197 case PDMMEDIATYPE_FLOPPY_1_20:
198 drv->drive = FDRIVE_DRV_120;
199 break;
200 case PDMMEDIATYPE_FLOPPY_720:
201 case PDMMEDIATYPE_FLOPPY_1_44:
202 drv->drive = FDRIVE_DRV_144;
203 break;
204 default:
205 AssertFailed();
206 RT_FALL_THRU();
207 case PDMMEDIATYPE_FLOPPY_2_88:
208 drv->drive = FDRIVE_DRV_288;
209 break;
210 case PDMMEDIATYPE_FLOPPY_FAKE_15_6:
211 drv->drive = FDRIVE_DRV_FAKE_15_6;
212 break;
213 case PDMMEDIATYPE_FLOPPY_FAKE_63_5:
214 drv->drive = FDRIVE_DRV_FAKE_63_5;
215 break;
216 }
217 } else {
218 drv->drive = FDRIVE_DRV_NONE;
219 }
220 } /* else: The BIOS (and others) get the drive type via the CMOS, so
221 don't change it after the VM has been constructed. */
222 drv->perpendicular = 0;
223 /* Disk */
224 drv->last_sect = 0;
225 drv->max_track = 0;
226}
227
228static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
229 uint8_t last_sect, uint8_t num_sides)
230{
231 return (((track * num_sides) + head) * last_sect) + sect - 1; /* sect >= 1 */
232}
233
234/* Returns current position, in sectors, for given drive */
235static int fd_sector(fdrive_t *drv)
236{
237 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect, NUM_SIDES(drv));
238}
239
240/* Seek to a new position:
241 * returns 0 if already on right track
242 * returns 1 if track changed
243 * returns 2 if track is invalid
244 * returns 3 if sector is invalid
245 * returns 4 if seek is disabled
246 * returns 5 if no media in drive
247 */
248static int fd_seek(fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
249 int enable_seek)
250{
251 int sector;
252 int ret;
253
254 if (!drv->last_sect) {
255 FLOPPY_DPRINTF("no disk in drive (max=%d h=%d c=%02x =s%02x) -> 5\n",
256 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
257 return 5;
258 }
259 if (track > drv->max_track ||
260 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
261 FLOPPY_DPRINTF("try to read h=%d c=%02x s=%02x (max=%d h=%d c=%02x s=%02x) -> 2\n",
262 head, track, sect,
263 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
264 return 2;
265 }
266 if (sect > drv->last_sect || sect < 1) {
267 FLOPPY_DPRINTF("try to read h=%d c=%02x s=%02x (max=%d h=%d c=%02x s=%02x) -> 3\n",
268 head, track, sect,
269 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
270 return 3;
271 }
272 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
273 ret = 0;
274 if (sector != fd_sector(drv)) {
275#if 0
276 if (!enable_seek) {
277 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
278 head, track, sect, 1, drv->max_track, drv->last_sect);
279 return 4;
280 }
281#else
282 RT_NOREF(enable_seek);
283#endif
284 drv->head = head;
285 if (drv->track != track)
286 ret = 1;
287 drv->track = track;
288 drv->sect = sect;
289 }
290 drv->ltrk = drv->track;
291
292 return ret;
293}
294
295/* Set drive back to track 0 */
296static void fd_recalibrate(fdrive_t *drv)
297{
298 FLOPPY_DPRINTF("recalibrate\n");
299 drv->head = 0;
300 drv->track = 0;
301 drv->ltrk = 0;
302 drv->sect = 1;
303}
304
305/* Recognize floppy formats */
306typedef struct fd_format_t {
307 fdrive_type_t drive;
308 uint8_t last_sect; /**< Number of sectors. */
309 uint8_t max_track; /**< Number of tracks. */
310 uint8_t max_head; /**< Max head number. */
311 fdrive_rate_t rate;
312 const char *str;
313} fd_format_t;
314
315/* Note: Low-density disks (160K/180K/320K/360K) use 250 Kbps data rate
316 * in 40-track drives, but 300 Kbps in high-capacity 80-track drives.
317 * This is because high-density 5.25" drives rotate at 360 RPM while
318 * other drives spin at 300 RPM.
319 * For that reason, low-density 5.25" aliases for 3.5" drives use 250 Kbps
320 * data rate while the "real" 5.25" versions use 300 Kbps.
321 */
322static fd_format_t const fd_formats[] = {
323 /* First entry is default format */
324 /* 1.44 MB 3"1/2 floppy disks */
325 { FDRIVE_DRV_144, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 3\"1/2", },
326 { FDRIVE_DRV_144, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 3\"1/2", },
327 { FDRIVE_DRV_144, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB 3\"1/2", },
328 { FDRIVE_DRV_144, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB 3\"1/2", },
329 { FDRIVE_DRV_144, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB 3\"1/2", },
330 { FDRIVE_DRV_144, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB 3\"1/2", },
331 { FDRIVE_DRV_144, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB 3\"1/2", },
332 { FDRIVE_DRV_144, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB 3\"1/2", },
333 /* 2.88 MB 3"1/2 floppy disks */
334 { FDRIVE_DRV_288, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB 3\"1/2", },
335 { FDRIVE_DRV_288, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB 3\"1/2", },
336 { FDRIVE_DRV_288, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB 3\"1/2", },
337 { FDRIVE_DRV_288, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB 3\"1/2", },
338 { FDRIVE_DRV_288, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB 3\"1/2", },
339 /* 720 kB 3"1/2 floppy disks */
340 { FDRIVE_DRV_144, 9, 80, 1, FDRIVE_RATE_250K, "720 kB 3\"1/2", },
341 { FDRIVE_DRV_144, 10, 80, 1, FDRIVE_RATE_250K, "800 kB 3\"1/2", },
342 { FDRIVE_DRV_144, 10, 82, 1, FDRIVE_RATE_250K, "820 kB 3\"1/2", },
343 { FDRIVE_DRV_144, 10, 83, 1, FDRIVE_RATE_250K, "830 kB 3\"1/2", },
344 { FDRIVE_DRV_144, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB 3\"1/2", },
345 { FDRIVE_DRV_144, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB 3\"1/2", },
346 /* 1.2 MB 5"1/4 floppy disks */
347 { FDRIVE_DRV_120, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 5\"1/4", },
348 { FDRIVE_DRV_120, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 5\"1/4", }, /* CP Backup 5.25" HD */
349 { FDRIVE_DRV_120, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 5\"1/4", },
350 { FDRIVE_DRV_120, 18, 82, 1, FDRIVE_RATE_500K, "1.48 MB 5\"1/4", },
351 { FDRIVE_DRV_120, 18, 83, 1, FDRIVE_RATE_500K, "1.49 MB 5\"1/4", },
352 { FDRIVE_DRV_120, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 5\"1/4", },
353 /* 720 kB 5"1/4 floppy disks */
354 { FDRIVE_DRV_120, 9, 80, 1, FDRIVE_RATE_300K, "720 kB 5\"1/4", },
355 { FDRIVE_DRV_120, 11, 80, 1, FDRIVE_RATE_300K, "880 kB 5\"1/4", },
356 /* 360 kB 5"1/4 floppy disks (newer 9-sector formats) */
357 { FDRIVE_DRV_120, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 5\"1/4", },
358 { FDRIVE_DRV_120, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 5\"1/4", },
359 { FDRIVE_DRV_120, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 5\"1/4", }, /* CP Backup 5.25" DD */
360 { FDRIVE_DRV_120, 10, 41, 1, FDRIVE_RATE_300K, "410 kB 5\"1/4", },
361 { FDRIVE_DRV_120, 10, 42, 1, FDRIVE_RATE_300K, "420 kB 5\"1/4", },
362 /* 320 kB 5"1/4 floppy disks (old 8-sector formats) */
363 { FDRIVE_DRV_120, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 5\"1/4", },
364 { FDRIVE_DRV_120, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 5\"1/4", },
365 /* 1.2 MB and low density 3"1/2 floppy 'aliases' */
366 { FDRIVE_DRV_144, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 3\"1/2", },
367 { FDRIVE_DRV_144, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 3\"1/2", },
368 { FDRIVE_DRV_144, 10, 40, 1, FDRIVE_RATE_250K, "400 kB 3\"1/2", }, /* CP Backup 5.25" DD */
369 { FDRIVE_DRV_144, 9, 40, 1, FDRIVE_RATE_250K, "360 kB 3\"1/2", },
370 { FDRIVE_DRV_144, 9, 40, 0, FDRIVE_RATE_250K, "180 kB 3\"1/2", },
371 { FDRIVE_DRV_144, 8, 40, 1, FDRIVE_RATE_250K, "320 kB 3\"1/2", },
372 { FDRIVE_DRV_144, 8, 40, 0, FDRIVE_RATE_250K, "160 kB 3\"1/2", },
373 /* For larger than real life floppy images (see DrvVD.cpp). */
374 /* 15.6 MB fake floppy disk (just need something big). */
375 { FDRIVE_DRV_FAKE_15_6, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 15.6", },
376 { FDRIVE_DRV_FAKE_15_6, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 15.6", },
377 { FDRIVE_DRV_FAKE_15_6, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 15.6", },
378 { FDRIVE_DRV_FAKE_15_6, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 15.6", },
379 { FDRIVE_DRV_FAKE_15_6, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 15.6", },
380 { FDRIVE_DRV_FAKE_15_6, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 15.6", },
381 { FDRIVE_DRV_FAKE_15_6, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 15.6", },
382 { FDRIVE_DRV_FAKE_15_6, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 15.6", },
383 { FDRIVE_DRV_FAKE_15_6, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 15.6", },
384 { FDRIVE_DRV_FAKE_15_6, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 15.6", },
385 { FDRIVE_DRV_FAKE_15_6, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 15.6", },
386 { FDRIVE_DRV_FAKE_15_6, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 15.6", },
387 { FDRIVE_DRV_FAKE_15_6, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 15.6", },
388 { FDRIVE_DRV_FAKE_15_6, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 15.6", },
389 { FDRIVE_DRV_FAKE_15_6, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 15.6", },
390 { FDRIVE_DRV_FAKE_15_6, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 15.6", },
391 { FDRIVE_DRV_FAKE_15_6, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 15.6", },
392 { FDRIVE_DRV_FAKE_15_6, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 15.6", },
393 { FDRIVE_DRV_FAKE_15_6, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 15.6", },
394 { FDRIVE_DRV_FAKE_15_6, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 15.6", },
395 { FDRIVE_DRV_FAKE_15_6, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 15.6", },
396 /* 63.5 MB fake floppy disk (just need something big). */
397 { FDRIVE_DRV_FAKE_63_5, 255, 255, 1, FDRIVE_RATE_1M, "63.5 MB fake 63.5", },
398 { FDRIVE_DRV_FAKE_63_5, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 63.5", },
399 { FDRIVE_DRV_FAKE_63_5, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 63.5", },
400 { FDRIVE_DRV_FAKE_63_5, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 63.5", },
401 { FDRIVE_DRV_FAKE_63_5, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 63.5", },
402 { FDRIVE_DRV_FAKE_63_5, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 63.5", },
403 { FDRIVE_DRV_FAKE_63_5, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 63.5", },
404 { FDRIVE_DRV_FAKE_63_5, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 63.5", },
405 { FDRIVE_DRV_FAKE_63_5, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 63.5", },
406 { FDRIVE_DRV_FAKE_63_5, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 63.5", },
407 { FDRIVE_DRV_FAKE_63_5, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 63.5", },
408 { FDRIVE_DRV_FAKE_63_5, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 63.5", },
409 { FDRIVE_DRV_FAKE_63_5, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 63.5", },
410 { FDRIVE_DRV_FAKE_63_5, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 63.5", },
411 { FDRIVE_DRV_FAKE_63_5, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 63.5", },
412 { FDRIVE_DRV_FAKE_63_5, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 63.5", },
413 { FDRIVE_DRV_FAKE_63_5, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 63.5", },
414 { FDRIVE_DRV_FAKE_63_5, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 63.5", },
415 { FDRIVE_DRV_FAKE_63_5, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 63.5", },
416 { FDRIVE_DRV_FAKE_63_5, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 63.5", },
417 { FDRIVE_DRV_FAKE_63_5, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 63.5", },
418 { FDRIVE_DRV_FAKE_63_5, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 63.5", },
419 /* end */
420 { FDRIVE_DRV_NONE, (uint8_t)-1, (uint8_t)-1, 0, (fdrive_rate_t)0, NULL, },
421};
422
423/* Revalidate a disk drive after a disk change */
424static void fd_revalidate(fdrive_t *drv)
425{
426 const fd_format_t *parse;
427 uint64_t nb_sectors, size;
428 int i, first_match, match;
429 int nb_heads, max_track, last_sect, ro;
430
431 FLOPPY_DPRINTF("revalidate\n");
432 if ( drv->pDrvMedia
433 && drv->pDrvMount
434 && drv->pDrvMount->pfnIsMounted (drv->pDrvMount)) {
435 ro = drv->pDrvMedia->pfnIsReadOnly (drv->pDrvMedia);
436 nb_heads = max_track = last_sect = 0;
437 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
438 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
439 nb_heads - 1, max_track, last_sect);
440 } else {
441 uint64_t size2 = drv->pDrvMedia->pfnGetSize (drv->pDrvMedia);
442 nb_sectors = size2 / FD_SECTOR_LEN;
443 match = -1;
444 first_match = -1;
445 for (i = 0;; i++) {
446 parse = &fd_formats[i];
447 if (parse->drive == FDRIVE_DRV_NONE)
448 break;
449 if (drv->drive == parse->drive ||
450 drv->drive == FDRIVE_DRV_NONE) {
451 size = (parse->max_head + 1) * parse->max_track *
452 parse->last_sect;
453 if (nb_sectors == size) {
454 match = i;
455 break;
456 }
457 if (first_match == -1)
458 first_match = i;
459 }
460 }
461 if (match == -1) {
462 if (first_match == -1)
463 match = 1;
464 else
465 match = first_match;
466 parse = &fd_formats[match];
467 }
468 nb_heads = parse->max_head + 1;
469 max_track = parse->max_track;
470 last_sect = parse->last_sect;
471 drv->drive = parse->drive;
472 drv->media_rate = parse->rate;
473 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
474 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
475 LogRel(("FDC: %s floppy disk (%d h %d t %d s) %s\n", parse->str,
476 nb_heads, max_track, last_sect, ro ? "ro" : "rw"));
477 }
478 if (nb_heads == 1) {
479 drv->flags &= ~FDISK_DBL_SIDES;
480 } else {
481 drv->flags |= FDISK_DBL_SIDES;
482 }
483 drv->max_track = max_track;
484 drv->last_sect = last_sect;
485 drv->ro = ro;
486 } else {
487 FLOPPY_DPRINTF("No disk in drive\n");
488 drv->last_sect = 0;
489 drv->max_track = 0;
490 drv->flags &= ~FDISK_DBL_SIDES;
491 drv->dsk_chg = true; /* Disk change line active. */
492 }
493}
494
495/********************************************************/
496/* Intel 82078 floppy disk controller emulation */
497
498static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq);
499static void fdctrl_reset_fifo(fdctrl_t *fdctrl);
500static fdrive_t *get_cur_drv(fdctrl_t *fdctrl);
501
502static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl);
503static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl);
504static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl);
505static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value);
506static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl);
507static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value);
508static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl);
509static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value);
510static uint32_t fdctrl_read_data(fdctrl_t *fdctrl);
511static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value);
512static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl);
513static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value);
514
515enum {
516 FD_DIR_WRITE = 0,
517 FD_DIR_READ = 1,
518 FD_DIR_SCANE = 2,
519 FD_DIR_SCANL = 3,
520 FD_DIR_SCANH = 4,
521 FD_DIR_FORMAT = 5
522};
523
524enum {
525 FD_STATE_MULTI = 0x01, /* multi track flag */
526 FD_STATE_FORMAT = 0x02, /* format flag */
527 FD_STATE_SEEK = 0x04 /* seek flag */
528};
529
530enum {
531 FD_REG_SRA = 0x00,
532 FD_REG_SRB = 0x01,
533 FD_REG_DOR = 0x02,
534 FD_REG_TDR = 0x03,
535 FD_REG_MSR = 0x04,
536 FD_REG_DSR = 0x04,
537 FD_REG_FIFO = 0x05,
538 FD_REG_DIR = 0x07,
539 FD_REG_CCR = 0x07
540};
541
542enum {
543 FD_CMD_READ_TRACK = 0x02,
544 FD_CMD_SPECIFY = 0x03,
545 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
546 FD_CMD_WRITE = 0x05,
547 FD_CMD_READ = 0x06,
548 FD_CMD_RECALIBRATE = 0x07,
549 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
550 FD_CMD_WRITE_DELETED = 0x09,
551 FD_CMD_READ_ID = 0x0a,
552 FD_CMD_READ_DELETED = 0x0c,
553 FD_CMD_FORMAT_TRACK = 0x0d,
554 FD_CMD_DUMPREG = 0x0e,
555 FD_CMD_SEEK = 0x0f,
556 FD_CMD_VERSION = 0x10,
557 FD_CMD_SCAN_EQUAL = 0x11,
558 FD_CMD_PERPENDICULAR_MODE = 0x12,
559 FD_CMD_CONFIGURE = 0x13,
560 FD_CMD_LOCK = 0x14,
561 FD_CMD_VERIFY = 0x16,
562 FD_CMD_POWERDOWN_MODE = 0x17,
563 FD_CMD_PART_ID = 0x18,
564 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
565 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
566 FD_CMD_SAVE = 0x2e,
567 FD_CMD_OPTION = 0x33,
568 FD_CMD_RESTORE = 0x4e,
569 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
570 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
571 FD_CMD_FORMAT_AND_WRITE = 0xcd,
572 FD_CMD_RELATIVE_SEEK_IN = 0xcf
573};
574
575enum {
576 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
577 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
578 FD_CONFIG_POLL = 0x10, /* Poll enabled */
579 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
580 FD_CONFIG_EIS = 0x40 /* No implied seeks */
581};
582
583enum {
584 FD_SR0_EQPMT = 0x10,
585 FD_SR0_SEEK = 0x20,
586 FD_SR0_ABNTERM = 0x40,
587 FD_SR0_INVCMD = 0x80,
588 FD_SR0_RDYCHG = 0xc0
589};
590
591enum {
592 FD_SR1_MA = 0x01, /* Missing address mark */
593 FD_SR1_NW = 0x02, /* Not writable */
594 FD_SR1_ND = 0x04, /* No data */
595 FD_SR1_EC = 0x80 /* End of cylinder */
596};
597
598enum {
599 FD_SR2_MD = 0x01, /* Missing data address mark */
600 FD_SR2_SNS = 0x04, /* Scan not satisfied */
601 FD_SR2_SEH = 0x08 /* Scan equal hit */
602};
603
604enum {
605 FD_SRA_DIR = 0x01,
606 FD_SRA_nWP = 0x02,
607 FD_SRA_nINDX = 0x04,
608 FD_SRA_HDSEL = 0x08,
609 FD_SRA_nTRK0 = 0x10,
610 FD_SRA_STEP = 0x20,
611 FD_SRA_nDRV2 = 0x40,
612 FD_SRA_INTPEND = 0x80
613};
614
615enum {
616 FD_SRB_MTR0 = 0x01,
617 FD_SRB_MTR1 = 0x02,
618 FD_SRB_WGATE = 0x04,
619 FD_SRB_RDATA = 0x08,
620 FD_SRB_WDATA = 0x10,
621 FD_SRB_DR0 = 0x20
622};
623
624enum {
625#if MAX_FD == 4
626 FD_DRV_SELMASK = 0x03,
627#else
628 FD_DRV_SELMASK = 0x01,
629#endif
630};
631
632enum {
633 FD_DOR_SELMASK = 0x03, /* Always two bits regardless of FD_DRV_SELMASK. */
634 FD_DOR_nRESET = 0x04,
635 FD_DOR_DMAEN = 0x08,
636 FD_DOR_MOTEN0 = 0x10,
637 FD_DOR_MOTEN1 = 0x20,
638 FD_DOR_MOTEN2 = 0x40,
639 FD_DOR_MOTEN3 = 0x80
640};
641
642enum {
643#if MAX_FD == 4
644 FD_TDR_BOOTSEL = 0x0c
645#else
646 FD_TDR_BOOTSEL = 0x04
647#endif
648};
649
650enum {
651 FD_DSR_DRATEMASK= 0x03,
652 FD_DSR_PWRDOWN = 0x40,
653 FD_DSR_SWRESET = 0x80
654};
655
656enum {
657 FD_MSR_DRV0BUSY = 0x01,
658 FD_MSR_DRV1BUSY = 0x02,
659 FD_MSR_DRV2BUSY = 0x04,
660 FD_MSR_DRV3BUSY = 0x08,
661 FD_MSR_CMDBUSY = 0x10,
662 FD_MSR_NONDMA = 0x20,
663 FD_MSR_DIO = 0x40,
664 FD_MSR_RQM = 0x80
665};
666
667enum {
668 FD_DIR_DSKCHG = 0x80
669};
670
671#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
672#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
673#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
674
675/**
676 * Floppy controller state.
677 *
678 * @implements PDMILEDPORTS
679 */
680struct fdctrl_t {
681 /* Controller's identification */
682 uint8_t version;
683 /* HW */
684 uint8_t irq_lvl;
685 uint8_t dma_chann;
686 uint16_t io_base;
687 /* Controller state */
688 TMTIMERHANDLE hResultTimer;
689
690 /* Interrupt delay timers. */
691 TMTIMERHANDLE hXferDelayTimer;
692 TMTIMERHANDLE hIrqDelayTimer;
693 uint16_t uIrqDelayMsec;
694 uint8_t st0;
695 uint8_t st1;
696 uint8_t st2;
697
698 uint8_t sra;
699 uint8_t srb;
700 uint8_t dor;
701 uint8_t tdr;
702 uint8_t dsr;
703 uint8_t msr;
704 uint8_t cur_drv;
705 uint8_t status0;
706 uint8_t status1;
707 uint8_t status2;
708 /* Command FIFO */
709 uint8_t fifo[FD_SECTOR_LEN];
710 uint32_t data_pos;
711 uint32_t data_len;
712 uint8_t data_state;
713 uint8_t data_dir;
714 uint8_t eot; /* last wanted sector */
715 /* Debugging only */
716 uint8_t cur_cmd;
717 uint8_t prev_cmd;
718 /* States kept only to be returned back */
719 /* Timers state */
720 uint8_t timer0;
721 uint8_t timer1;
722 /* precompensation */
723 uint8_t precomp_trk;
724 uint8_t config;
725 uint8_t lock;
726 /* Power down config (also with status regB access mode */
727 uint8_t pwrd;
728 /* Floppy drives */
729 uint8_t num_floppies;
730 fdrive_t drives[MAX_FD];
731 uint8_t reset_sensei;
732 /** Pointer to device instance. */
733 PPDMDEVINS pDevIns;
734
735 /** Status LUN: The base interface. */
736 PDMIBASE IBaseStatus;
737 /** Status LUN: The Leds interface. */
738 PDMILEDPORTS ILeds;
739 /** Status LUN: The Partner of ILeds. */
740 PPDMILEDCONNECTORS pLedsConnector;
741
742 /** I/O ports: 0x3f0 */
743 IOMIOPORTHANDLE hIoPorts0;
744 /** I/O ports: 0x3f1..0x3f5 */
745 IOMIOPORTHANDLE hIoPorts1;
746 /** I/O port: 0x3f7 */
747 IOMIOPORTHANDLE hIoPorts2;
748};
749
750static uint32_t fdctrl_read (fdctrl_t *fdctrl, uint32_t reg)
751{
752 uint32_t retval;
753
754 switch (reg) {
755 case FD_REG_SRA:
756 retval = fdctrl_read_statusA(fdctrl);
757 break;
758 case FD_REG_SRB:
759 retval = fdctrl_read_statusB(fdctrl);
760 break;
761 case FD_REG_DOR:
762 retval = fdctrl_read_dor(fdctrl);
763 break;
764 case FD_REG_TDR:
765 retval = fdctrl_read_tape(fdctrl);
766 break;
767 case FD_REG_MSR:
768 retval = fdctrl_read_main_status(fdctrl);
769 break;
770 case FD_REG_FIFO:
771 retval = fdctrl_read_data(fdctrl);
772 break;
773 case FD_REG_DIR:
774 retval = fdctrl_read_dir(fdctrl);
775 break;
776 default:
777 retval = UINT32_MAX;
778 break;
779 }
780 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
781
782 return retval;
783}
784
785static void fdctrl_write (fdctrl_t *fdctrl, uint32_t reg, uint32_t value)
786{
787 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
788
789 switch (reg) {
790 case FD_REG_DOR:
791 fdctrl_write_dor(fdctrl, value);
792 break;
793 case FD_REG_TDR:
794 fdctrl_write_tape(fdctrl, value);
795 break;
796 case FD_REG_DSR:
797 fdctrl_write_rate(fdctrl, value);
798 break;
799 case FD_REG_FIFO:
800 fdctrl_write_data(fdctrl, value);
801 break;
802 case FD_REG_CCR:
803 fdctrl_write_ccr(fdctrl, value);
804 break;
805 default:
806 break;
807 }
808}
809
810/* Change IRQ state */
811static void fdctrl_reset_irq(fdctrl_t *fdctrl)
812{
813 if (!(fdctrl->sra & FD_SRA_INTPEND))
814 return;
815 FLOPPY_DPRINTF("Reset interrupt\n");
816 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 0);
817 fdctrl->sra &= ~FD_SRA_INTPEND;
818}
819
820static void fdctrl_raise_irq_now(fdctrl_t *fdctrl, uint8_t status0)
821{
822 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
823 FLOPPY_DPRINTF("Raising interrupt...\n");
824 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 1);
825 fdctrl->sra |= FD_SRA_INTPEND;
826 }
827 if (status0 & FD_SR0_SEEK) {
828 fdrive_t *cur_drv;
829
830 /* A seek clears the disk change line (if a disk is inserted). */
831 cur_drv = get_cur_drv(fdctrl);
832 if (cur_drv->max_track)
833 cur_drv->dsk_chg = false;
834 }
835
836 fdctrl->reset_sensei = 0;
837 fdctrl->status0 = status0;
838 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
839}
840
841static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0)
842{
843 if (!fdctrl->uIrqDelayMsec)
844 {
845 /* If not IRQ delay needed, trigger the interrupt now. */
846 fdctrl_raise_irq_now(fdctrl, status0);
847 }
848 else
849 {
850 /* Otherwise schedule completion after a short while. */
851 fdctrl->st0 = status0;
852 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hIrqDelayTimer, fdctrl->uIrqDelayMsec);
853 }
854}
855
856/* Reset controller */
857static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq)
858{
859 int i;
860
861 FLOPPY_DPRINTF("reset controller\n");
862 fdctrl_reset_irq(fdctrl);
863 /* Initialise controller */
864 fdctrl->sra = 0;
865 fdctrl->srb = 0xc0;
866 if (!fdctrl->drives[1].pDrvMedia)
867 fdctrl->sra |= FD_SRA_nDRV2;
868 fdctrl->cur_drv = 0;
869 fdctrl->dor = FD_DOR_nRESET;
870 fdctrl->dor |= (fdctrl->dma_chann != 0xff) ? FD_DOR_DMAEN : 0;
871 fdctrl->msr = FD_MSR_RQM;
872 /* FIFO state */
873 fdctrl->data_pos = 0;
874 fdctrl->data_len = 0;
875 fdctrl->data_state = 0;
876 fdctrl->data_dir = FD_DIR_WRITE;
877 for (i = 0; i < MAX_FD; i++)
878 fd_recalibrate(&fdctrl->drives[i]);
879 fdctrl_reset_fifo(fdctrl);
880 if (do_irq) {
881 fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
882 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
883 }
884}
885
886static inline fdrive_t *drv0(fdctrl_t *fdctrl)
887{
888 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
889}
890
891static inline fdrive_t *drv1(fdctrl_t *fdctrl)
892{
893 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
894 return &fdctrl->drives[1];
895 else
896 return &fdctrl->drives[0];
897}
898
899#if MAX_FD == 4
900static inline fdrive_t *drv2(fdctrl_t *fdctrl)
901{
902 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
903 return &fdctrl->drives[2];
904 else
905 return &fdctrl->drives[1];
906}
907
908static inline fdrive_t *drv3(fdctrl_t *fdctrl)
909{
910 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
911 return &fdctrl->drives[3];
912 else
913 return &fdctrl->drives[2];
914}
915#endif
916
917static fdrive_t *get_cur_drv(fdctrl_t *fdctrl)
918{
919#if MAX_FD == 2
920 if (fdctrl->dor & FD_DRV_SELMASK)
921 return drv1(fdctrl);
922
923 return drv0(fdctrl);
924#else
925 switch (fdctrl->dor & FD_DRV_SELMASK) {
926 case 0: return drv0(fdctrl);
927 case 1: return drv1(fdctrl);
928# if MAX_FD == 4
929 case 2: return drv2(fdctrl);
930 case 3: return drv3(fdctrl);
931# endif
932 default: return NULL;
933 }
934#endif
935}
936
937/* Status A register : 0x00 (read-only) */
938static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl)
939{
940 uint32_t retval = fdctrl->sra;
941
942 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
943
944 return retval;
945}
946
947/* Status B register : 0x01 (read-only) */
948static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl)
949{
950 uint32_t retval = fdctrl->srb;
951
952 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
953
954 return retval;
955}
956
957/* Digital output register : 0x02 */
958static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl)
959{
960 uint32_t retval = fdctrl->dor;
961
962 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
963
964 return retval;
965}
966
967static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value)
968{
969 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
970
971 /* Motors */
972 if (value & FD_DOR_MOTEN0)
973 fdctrl->srb |= FD_SRB_MTR0;
974 else
975 fdctrl->srb &= ~FD_SRB_MTR0;
976 if (value & FD_DOR_MOTEN1)
977 fdctrl->srb |= FD_SRB_MTR1;
978 else
979 fdctrl->srb &= ~FD_SRB_MTR1;
980
981 /* Drive */
982 if (value & 1)
983 fdctrl->srb |= FD_SRB_DR0;
984 else
985 fdctrl->srb &= ~FD_SRB_DR0;
986
987 /* Reset */
988 if (!(value & FD_DOR_nRESET)) {
989 if (fdctrl->dor & FD_DOR_nRESET) {
990 FLOPPY_DPRINTF("controller enter RESET state\n");
991 }
992 } else {
993 if (!(fdctrl->dor & FD_DOR_nRESET)) {
994 FLOPPY_DPRINTF("controller out of RESET state\n");
995 fdctrl_reset(fdctrl, 1);
996 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
997 }
998 }
999
1000 fdctrl->dor = value;
1001}
1002
1003/* Tape drive register : 0x03 */
1004static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl)
1005{
1006 uint32_t retval = fdctrl->tdr;
1007
1008 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
1009
1010 return retval;
1011}
1012
1013static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value)
1014{
1015 /* Reset mode */
1016 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1017 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1018 return;
1019 }
1020 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
1021 /* Disk boot selection indicator */
1022 fdctrl->tdr = value & FD_TDR_BOOTSEL;
1023 /* Tape indicators: never allow */
1024}
1025
1026/* Main status register : 0x04 (read) */
1027static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl)
1028{
1029 uint32_t retval = fdctrl->msr;
1030
1031 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1032 fdctrl->dor |= FD_DOR_nRESET;
1033
1034 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
1035
1036 return retval;
1037}
1038
1039/* Data select rate register : 0x04 (write) */
1040static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value)
1041{
1042 /* Reset mode */
1043 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1044 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1045 return;
1046 }
1047 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1048 /* Reset: autoclear */
1049 if (value & FD_DSR_SWRESET) {
1050 fdctrl->dor &= ~FD_DOR_nRESET;
1051 fdctrl_reset(fdctrl, 1);
1052 fdctrl->dor |= FD_DOR_nRESET;
1053 }
1054 if (value & FD_DSR_PWRDOWN) {
1055 fdctrl_reset(fdctrl, 1);
1056 }
1057 fdctrl->dsr = value;
1058}
1059
1060/* Configuration control register : 0x07 (write) */
1061static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value)
1062{
1063 /* Reset mode */
1064 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1065 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1066 return;
1067 }
1068 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1069
1070 /* Only the rate selection bits used in AT mode, and we
1071 * store those in the DSR.
1072 */
1073 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) | (value & FD_DSR_DRATEMASK);
1074}
1075
1076static int fdctrl_media_changed(fdrive_t *drv)
1077{
1078 return drv->dsk_chg;
1079}
1080
1081/* Digital input register : 0x07 (read-only) */
1082static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl)
1083{
1084 uint32_t retval = 0;
1085
1086 /* The change line signal is reported by the currently selected
1087 * drive. If the corresponding motor on bit is not set, the drive
1088 * is *not* selected!
1089 */
1090 if (fdctrl_media_changed(get_cur_drv(fdctrl))
1091 && (fdctrl->dor & (0x10 << (fdctrl->dor & FD_DOR_SELMASK))))
1092 retval |= FD_DIR_DSKCHG;
1093 if (retval != 0)
1094 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1095
1096 return retval;
1097}
1098
1099/* FIFO state control */
1100static void fdctrl_reset_fifo(fdctrl_t *fdctrl)
1101{
1102 fdctrl->data_dir = FD_DIR_WRITE;
1103 fdctrl->data_pos = 0;
1104 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1105 fdctrl->prev_cmd = fdctrl->cur_cmd;
1106 fdctrl->cur_cmd = 0;
1107}
1108
1109/* Set FIFO status for the host to read */
1110static void fdctrl_set_fifo(fdctrl_t *fdctrl, int fifo_len, int do_irq)
1111{
1112 fdctrl->data_dir = FD_DIR_READ;
1113 fdctrl->data_len = fifo_len;
1114 fdctrl->data_pos = 0;
1115 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1116 if (do_irq)
1117 fdctrl_raise_irq(fdctrl, 0x00);
1118}
1119
1120/* Set an error: unimplemented/unknown command */
1121static void fdctrl_unimplemented(fdctrl_t *fdctrl, int direction)
1122{
1123 RT_NOREF(direction);
1124 FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
1125 fdctrl->fifo[0] = FD_SR0_INVCMD;
1126 fdctrl_set_fifo(fdctrl, 1, 0);
1127}
1128
1129/* Seek to next sector */
1130static int fdctrl_seek_to_next_sect(fdctrl_t *fdctrl, fdrive_t *cur_drv)
1131{
1132 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1133 cur_drv->head, cur_drv->track, cur_drv->sect,
1134 fd_sector(cur_drv));
1135 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1136 error in fact */
1137 if (cur_drv->sect >= cur_drv->last_sect ||
1138 cur_drv->sect == fdctrl->eot) {
1139 cur_drv->sect = 1;
1140 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1141 if (cur_drv->head == 0 &&
1142 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1143 cur_drv->head = 1;
1144 } else {
1145 cur_drv->head = 0;
1146 cur_drv->ltrk++;
1147 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1148 return 0;
1149 }
1150 } else {
1151 cur_drv->ltrk++;
1152 return 0;
1153 }
1154 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1155 cur_drv->head, cur_drv->track,
1156 cur_drv->sect, fd_sector(cur_drv));
1157 } else {
1158 cur_drv->sect++;
1159 }
1160 return 1;
1161}
1162
1163/* Callback for transfer end (stop or abort) */
1164static void fdctrl_stop_transfer_now(fdctrl_t *fdctrl, uint8_t status0,
1165 uint8_t status1, uint8_t status2)
1166{
1167 fdrive_t *cur_drv;
1168
1169 cur_drv = get_cur_drv(fdctrl);
1170 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1171 status0, status1, status2,
1172 status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
1173 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1174 fdctrl->fifo[1] = status1;
1175 fdctrl->fifo[2] = status2;
1176 fdctrl->fifo[3] = cur_drv->ltrk;
1177 fdctrl->fifo[4] = cur_drv->head;
1178 fdctrl->fifo[5] = cur_drv->sect;
1179 fdctrl->fifo[6] = FD_SECTOR_SC;
1180 FLOPPY_DPRINTF("ST0:%02x ST1:%02x ST2:%02x C:%02x H:%02x R:%02x N:%02x\n",
1181 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2], fdctrl->fifo[3],
1182 fdctrl->fifo[4], fdctrl->fifo[5], fdctrl->fifo[6]);
1183
1184 fdctrl->data_dir = FD_DIR_READ;
1185 if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1186 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 0);
1187 }
1188 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1189 fdctrl->msr &= ~FD_MSR_NONDMA;
1190 fdctrl_set_fifo(fdctrl, 7, 1);
1191}
1192
1193static void fdctrl_stop_transfer(fdctrl_t *fdctrl, uint8_t status0,
1194 uint8_t status1, uint8_t status2)
1195{
1196 if (!fdctrl->uIrqDelayMsec)
1197 {
1198 /* If not IRQ delay needed, just stop the transfer and trigger IRQ now. */
1199 fdctrl_stop_transfer_now(fdctrl, status0, status1, status2);
1200 }
1201 else
1202 {
1203 /* Otherwise schedule completion after a short while. */
1204 fdctrl->st0 = status0;
1205 fdctrl->st1 = status1;
1206 fdctrl->st2 = status2;
1207 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hXferDelayTimer, fdctrl->uIrqDelayMsec);
1208 }
1209}
1210
1211/* Prepare a data transfer (either DMA or FIFO) */
1212static void fdctrl_start_transfer(fdctrl_t *fdctrl, int direction)
1213{
1214 fdrive_t *cur_drv;
1215 uint8_t kh, kt, ks;
1216 int did_seek = 0;
1217
1218 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1219 cur_drv = get_cur_drv(fdctrl);
1220 kt = fdctrl->fifo[2];
1221 kh = fdctrl->fifo[3];
1222 ks = fdctrl->fifo[4];
1223 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1224 GET_CUR_DRV(fdctrl), kh, kt, ks,
1225 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1226 FLOPPY_DPRINTF("CMD:%02x SEL:%02x C:%02x H:%02x R:%02x N:%02x EOT:%02x GPL:%02x DTL:%02x\n",
1227 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1228 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5],
1229 fdctrl->fifo[6], fdctrl->fifo[7], fdctrl->fifo[8]);
1230 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1231 case 2:
1232 /* sect too big */
1233 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1234 fdctrl->fifo[3] = kt;
1235 fdctrl->fifo[4] = kh;
1236 fdctrl->fifo[5] = ks;
1237 return;
1238 case 3:
1239 /* track too big */
1240 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1241 fdctrl->fifo[3] = kt;
1242 fdctrl->fifo[4] = kh;
1243 fdctrl->fifo[5] = ks;
1244 return;
1245 case 4:
1246 /* No seek enabled */
1247 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1248 fdctrl->fifo[3] = kt;
1249 fdctrl->fifo[4] = kh;
1250 fdctrl->fifo[5] = ks;
1251 return;
1252 case 5:
1253 /* No disk in drive */
1254 /// @todo This is wrong! Command should not complete.
1255 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | 0x08, /*FD_SR1_MA |*/ FD_SR1_ND, 0x00);
1256 fdctrl->fifo[3] = kt;
1257 fdctrl->fifo[4] = kh;
1258 fdctrl->fifo[5] = ks;
1259 return;
1260 case 1:
1261 did_seek = 1;
1262 break;
1263 default:
1264 break;
1265 }
1266 /* Check the data rate. If the programmed data rate does not match
1267 * the currently inserted medium, the operation has to fail.
1268 */
1269 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1270 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1271 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1272 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1273 fdctrl->fifo[3] = kt;
1274 fdctrl->fifo[4] = kh;
1275 fdctrl->fifo[5] = ks;
1276 return;
1277 }
1278 /* Set the FIFO state */
1279 fdctrl->data_dir = direction;
1280 fdctrl->data_pos = 0;
1281 fdctrl->msr |= FD_MSR_CMDBUSY;
1282 if (fdctrl->fifo[0] & 0x80)
1283 fdctrl->data_state |= FD_STATE_MULTI;
1284 else
1285 fdctrl->data_state &= ~FD_STATE_MULTI;
1286 if (did_seek)
1287 fdctrl->data_state |= FD_STATE_SEEK;
1288 else
1289 fdctrl->data_state &= ~FD_STATE_SEEK;
1290 if (fdctrl->fifo[5] == 00) {
1291 fdctrl->data_len = fdctrl->fifo[8];
1292 } else {
1293 int tmp;
1294 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1295 if (fdctrl->fifo[6] >= ks) {
1296 /* EOT is beyond the starting sector */
1297 tmp = (fdctrl->fifo[6] - ks + 1);
1298 if (fdctrl->fifo[0] & 0x80)
1299 tmp += fdctrl->fifo[6];
1300 } else {
1301 /* EOT is below starting sector; keep going until we run out of sectors. */
1302 tmp = 255;
1303 }
1304 fdctrl->data_len *= tmp;
1305 }
1306 fdctrl->eot = fdctrl->fifo[6];
1307 if (fdctrl->dor & FD_DOR_DMAEN) {
1308 int dma_mode;
1309 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1310 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1311 dma_mode = (dma_mode >> 2) & 3;
1312 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1313 dma_mode, direction,
1314 (128 << fdctrl->fifo[5]) *
1315 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1316 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1317 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1318 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1319 (direction == FD_DIR_READ && (dma_mode == 1 || dma_mode == 0))) {
1320 /* No access is allowed until DMA transfer has completed */
1321 fdctrl->msr &= ~FD_MSR_RQM;
1322 /* Now, we just have to wait for the DMA controller to
1323 * recall us...
1324 */
1325 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1326 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1327 return;
1328 } else {
1329 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1330 }
1331 }
1332 FLOPPY_DPRINTF("start non-DMA transfer\n");
1333 fdctrl->msr |= FD_MSR_NONDMA;
1334 if (direction != FD_DIR_WRITE)
1335 fdctrl->msr |= FD_MSR_DIO;
1336
1337 /* IO based transfer: calculate len */
1338 fdctrl_raise_irq(fdctrl, 0x00);
1339 return;
1340}
1341
1342/* Prepare a format data transfer (either DMA or FIFO) */
1343static void fdctrl_start_format(fdctrl_t *fdctrl)
1344{
1345 fdrive_t *cur_drv;
1346 uint8_t ns, dp, kh, kt, ks;
1347
1348 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1349 cur_drv = get_cur_drv(fdctrl);
1350 kt = cur_drv->track;
1351 kh = (fdctrl->fifo[1] & 0x04) >> 2;
1352 ns = fdctrl->fifo[3];
1353 dp = fdctrl->fifo[5];
1354 ks = 1;
1355 FLOPPY_DPRINTF("Start format at %d %d %02x, %d sect, pat %02x (%d)\n",
1356 GET_CUR_DRV(fdctrl), kh, kt, ns, dp,
1357 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1358 switch (fd_seek(cur_drv, kh, kt, ks, false)) {
1359 case 2:
1360 /* sect too big */
1361 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1362 fdctrl->fifo[3] = kt;
1363 fdctrl->fifo[4] = kh;
1364 fdctrl->fifo[5] = ks;
1365 return;
1366 case 3:
1367 /* track too big */
1368 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1369 fdctrl->fifo[3] = kt;
1370 fdctrl->fifo[4] = kh;
1371 fdctrl->fifo[5] = ks;
1372 return;
1373 case 4:
1374 /* No seek enabled */
1375 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1376 fdctrl->fifo[3] = kt;
1377 fdctrl->fifo[4] = kh;
1378 fdctrl->fifo[5] = ks;
1379 return;
1380 case 5:
1381 /* No disk in drive */
1382 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1383 fdctrl->fifo[3] = kt;
1384 fdctrl->fifo[4] = kh;
1385 fdctrl->fifo[5] = ks;
1386 return;
1387 case 1:
1388 break;
1389 default:
1390 break;
1391 }
1392 /* It's not clear what should happen if the data rate does not match. */
1393#if 0
1394 /* Check the data rate. If the programmed data rate does not match
1395 * the currently inserted medium, the operation has to fail.
1396 */
1397 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1398 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1399 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1400 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1401 fdctrl->fifo[3] = kt;
1402 fdctrl->fifo[4] = kh;
1403 fdctrl->fifo[5] = ks;
1404 return;
1405 }
1406#endif
1407 /* Set the FIFO state */
1408 fdctrl->data_dir = FD_DIR_FORMAT;
1409 fdctrl->data_pos = 0;
1410 fdctrl->msr |= FD_MSR_CMDBUSY;
1411 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1412 fdctrl->data_len = ns * 4;
1413 fdctrl->eot = ns;
1414 if (fdctrl->dor & FD_DOR_DMAEN) {
1415 int dma_mode;
1416 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1417 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1418 dma_mode = (dma_mode >> 2) & 3;
1419 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1420 dma_mode, fdctrl->data_dir,
1421 (128 << fdctrl->fifo[2]) *
1422 (cur_drv->last_sect + 1), fdctrl->data_len);
1423 if (fdctrl->data_dir == FD_DIR_FORMAT && dma_mode == 2) {
1424 /* No access is allowed until DMA transfer has completed */
1425 fdctrl->msr &= ~FD_MSR_RQM;
1426 /* Now, we just have to wait for the DMA controller to
1427 * recall us...
1428 */
1429 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1430 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1431 return;
1432 } else {
1433 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, fdctrl->data_dir);
1434 }
1435 }
1436 FLOPPY_DPRINTF("start non-DMA format\n");
1437 fdctrl->msr |= FD_MSR_NONDMA;
1438 /* IO based transfer: calculate len */
1439 fdctrl_raise_irq(fdctrl, 0x00);
1440
1441 return;
1442}
1443
1444/* Prepare a transfer of deleted data */
1445static void fdctrl_start_transfer_del(fdctrl_t *fdctrl, int direction)
1446{
1447 RT_NOREF(direction);
1448 FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1449
1450 /* We don't handle deleted data,
1451 * so we don't return *ANYTHING*
1452 */
1453 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1454}
1455
1456/* Block driver read/write wrappers. */
1457
1458static int blk_write(fdrive_t *drv, int64_t sector_num, const uint8_t *buf, int nb_sectors)
1459{
1460 int rc;
1461
1462 drv->Led.Asserted.s.fWriting = drv->Led.Actual.s.fWriting = 1;
1463
1464 rc = drv->pDrvMedia->pfnWrite(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1465 buf, nb_sectors * FD_SECTOR_LEN);
1466
1467 drv->Led.Actual.s.fWriting = 0;
1468 if (RT_FAILURE(rc))
1469 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1470
1471 return rc;
1472}
1473
1474static int blk_read(fdrive_t *drv, int64_t sector_num, uint8_t *buf, int nb_sectors)
1475{
1476 int rc;
1477
1478 drv->Led.Asserted.s.fReading = drv->Led.Actual.s.fReading = 1;
1479
1480 rc = drv->pDrvMedia->pfnRead(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1481 buf, nb_sectors * FD_SECTOR_LEN);
1482
1483 drv->Led.Actual.s.fReading = 0;
1484
1485 if (RT_FAILURE(rc))
1486 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1487
1488 return rc;
1489}
1490
1491/**
1492 * @callback_method_impl{FNDMATRANSFERHANDLER, handlers for DMA transfers}
1493 */
1494static DECLCALLBACK(uint32_t) fdctrl_transfer_handler(PPDMDEVINS pDevIns, void *pvUser,
1495 unsigned uChannel, uint32_t off, uint32_t cb)
1496{
1497 RT_NOREF(pDevIns, off);
1498 fdctrl_t *fdctrl;
1499 fdrive_t *cur_drv;
1500 int rc;
1501 uint32_t len = 0;
1502 uint32_t start_pos, rel_pos;
1503 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1504
1505 fdctrl = (fdctrl_t *)pvUser;
1506 if (fdctrl->msr & FD_MSR_RQM) {
1507 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1508 return 0;
1509 }
1510 cur_drv = get_cur_drv(fdctrl);
1511 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1512 fdctrl->data_dir == FD_DIR_SCANH)
1513 status2 = FD_SR2_SNS;
1514 if (cb > fdctrl->data_len)
1515 cb = fdctrl->data_len;
1516 if (cur_drv->pDrvMedia == NULL)
1517 {
1518 if (fdctrl->data_dir == FD_DIR_WRITE)
1519 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1520 else
1521 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1522 Assert(len == 0);
1523 goto transfer_error;
1524 }
1525
1526 if (cur_drv->ro)
1527 {
1528 if (fdctrl->data_dir == FD_DIR_WRITE || fdctrl->data_dir == FD_DIR_FORMAT)
1529 {
1530 /* Handle readonly medium early, no need to do DMA, touch the
1531 * LED or attempt any writes. A real floppy doesn't attempt
1532 * to write to readonly media either. */
1533 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
1534 0x00);
1535 Assert(len == 0);
1536 goto transfer_error;
1537 }
1538 }
1539
1540 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1541 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < cb;) {
1542 len = cb - fdctrl->data_pos;
1543 if (len + rel_pos > FD_SECTOR_LEN)
1544 len = FD_SECTOR_LEN - rel_pos;
1545 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x (%d-0x%08x 0x%08x)\n",
1546 len, cb, fdctrl->data_pos, fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1547 cur_drv->track, cur_drv->sect, fd_sector(cur_drv), fd_sector(cur_drv) * FD_SECTOR_LEN);
1548 if (fdctrl->data_dir != FD_DIR_FORMAT &&
1549 (fdctrl->data_dir != FD_DIR_WRITE ||
1550 len < FD_SECTOR_LEN || rel_pos != 0)) {
1551 /* READ & SCAN commands and realign to a sector for WRITE */
1552 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1553 if (RT_FAILURE(rc))
1554 {
1555 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1556 fd_sector(cur_drv));
1557 /* Sure, image size is too small... */
1558 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1559 }
1560 }
1561 switch (fdctrl->data_dir) {
1562 case FD_DIR_READ:
1563 /* READ commands */
1564 {
1565 uint32_t read;
1566 int rc2 = PDMDevHlpDMAWriteMemory(fdctrl->pDevIns, uChannel,
1567 fdctrl->fifo + rel_pos,
1568 fdctrl->data_pos,
1569 len, &read);
1570 AssertMsgRC (rc2, ("DMAWriteMemory -> %Rrc\n", rc2));
1571 }
1572 break;
1573 case FD_DIR_WRITE:
1574 /* WRITE commands */
1575 {
1576 uint32_t written;
1577 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1578 fdctrl->fifo + rel_pos,
1579 fdctrl->data_pos,
1580 len, &written);
1581 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1582 }
1583
1584 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1585 if (RT_FAILURE(rc))
1586 {
1587 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1588 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1589 goto transfer_error;
1590 }
1591 break;
1592 case FD_DIR_FORMAT:
1593 /* FORMAT command */
1594 {
1595 uint8_t eot = fdctrl->fifo[3];
1596 uint8_t filler = fdctrl->fifo[5];
1597 uint32_t written;
1598 int sct;
1599 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1600 fdctrl->fifo + rel_pos,
1601 fdctrl->data_pos,
1602 len, &written);
1603 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1604
1605 /* Fill the entire track with desired data pattern. */
1606 FLOPPY_DPRINTF("formatting track: %d sectors, pattern %02x\n",
1607 eot, filler);
1608 memset(fdctrl->fifo, filler, FD_SECTOR_LEN);
1609 for (sct = 0; sct < eot; ++sct)
1610 {
1611 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1612 if (RT_FAILURE(rc))
1613 {
1614 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1615 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1616 goto transfer_error;
1617 }
1618 fdctrl_seek_to_next_sect(fdctrl, cur_drv);
1619 }
1620 }
1621 break;
1622 default:
1623 /* SCAN commands */
1624 {
1625 uint8_t tmpbuf[FD_SECTOR_LEN];
1626 int ret;
1627 uint32_t read;
1628 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel, tmpbuf,
1629 fdctrl->data_pos, len, &read);
1630 AssertMsg(RT_SUCCESS(rc2), ("DMAReadMemory -> %Rrc2\n", rc2)); NOREF(rc2);
1631 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1632 if (ret == 0) {
1633 status2 = FD_SR2_SEH;
1634 goto end_transfer;
1635 }
1636 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1637 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1638 status2 = 0x00;
1639 goto end_transfer;
1640 }
1641 }
1642 break;
1643 }
1644 fdctrl->data_pos += len;
1645 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1646 if (rel_pos == 0) {
1647 /* Seek to next sector */
1648 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1649 break;
1650 }
1651 }
1652end_transfer:
1653 len = fdctrl->data_pos - start_pos;
1654 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1655 fdctrl->data_pos, len, fdctrl->data_len);
1656 if (fdctrl->data_dir == FD_DIR_SCANE ||
1657 fdctrl->data_dir == FD_DIR_SCANL ||
1658 fdctrl->data_dir == FD_DIR_SCANH)
1659 status2 = FD_SR2_SEH;
1660 if (FD_DID_SEEK(fdctrl->data_state))
1661 status0 |= FD_SR0_SEEK;
1662 fdctrl->data_len -= len;
1663 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1664transfer_error:
1665
1666 return len;
1667}
1668
1669/* Data register : 0x05 */
1670static uint32_t fdctrl_read_data(fdctrl_t *fdctrl)
1671{
1672 fdrive_t *cur_drv;
1673 uint32_t retval = 0;
1674 unsigned pos;
1675 int rc;
1676
1677 cur_drv = get_cur_drv(fdctrl);
1678 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1679 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1680 FLOPPY_ERROR("controller not ready for reading\n");
1681 return 0;
1682 }
1683 pos = fdctrl->data_pos % FD_SECTOR_LEN;
1684 if (fdctrl->msr & FD_MSR_NONDMA) {
1685 if (cur_drv->pDrvMedia == NULL)
1686 {
1687 if (fdctrl->data_dir == FD_DIR_WRITE)
1688 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1689 else
1690 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1691 } else if (pos == 0) {
1692 if (fdctrl->data_pos != 0)
1693 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1694 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1695 fd_sector(cur_drv));
1696 return 0;
1697 }
1698
1699 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1700 if (RT_FAILURE(rc))
1701 {
1702 FLOPPY_DPRINTF("error getting sector %d\n",
1703 fd_sector(cur_drv));
1704 /* Sure, image size is too small... */
1705 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1706 }
1707 }
1708 }
1709 retval = fdctrl->fifo[pos];
1710 if (++fdctrl->data_pos == fdctrl->data_len) {
1711 fdctrl->data_pos = 0;
1712 /* Switch from transfer mode to status mode
1713 * then from status mode to command mode
1714 */
1715 if (fdctrl->msr & FD_MSR_NONDMA) {
1716 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1717 } else {
1718 fdctrl_reset_fifo(fdctrl);
1719 fdctrl_reset_irq(fdctrl);
1720 }
1721 }
1722 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1723
1724 return retval;
1725}
1726
1727static void fdctrl_format_sector(fdctrl_t *fdctrl)
1728{
1729 fdrive_t *cur_drv;
1730 uint8_t kh, kt, ks;
1731 int ok = 0, rc;
1732
1733 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1734 cur_drv = get_cur_drv(fdctrl);
1735 kt = fdctrl->fifo[6];
1736 kh = fdctrl->fifo[7];
1737 ks = fdctrl->fifo[8];
1738 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1739 GET_CUR_DRV(fdctrl), kh, kt, ks,
1740 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1741 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1742 case 2:
1743 /* sect too big */
1744 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1745 fdctrl->fifo[3] = kt;
1746 fdctrl->fifo[4] = kh;
1747 fdctrl->fifo[5] = ks;
1748 return;
1749 case 3:
1750 /* track too big */
1751 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1752 fdctrl->fifo[3] = kt;
1753 fdctrl->fifo[4] = kh;
1754 fdctrl->fifo[5] = ks;
1755 return;
1756 case 4:
1757 /* No seek enabled */
1758 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1759 fdctrl->fifo[3] = kt;
1760 fdctrl->fifo[4] = kh;
1761 fdctrl->fifo[5] = ks;
1762 return;
1763 case 5:
1764 /* No disk in drive */
1765 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1766 fdctrl->fifo[3] = kt;
1767 fdctrl->fifo[4] = kh;
1768 fdctrl->fifo[5] = ks;
1769 return;
1770 case 1:
1771 fdctrl->data_state |= FD_STATE_SEEK;
1772 break;
1773 default:
1774 break;
1775 }
1776 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1777 if (cur_drv->pDrvMedia) {
1778 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1779 if (RT_FAILURE (rc)) {
1780 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1781 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1782 } else {
1783 ok = 1;
1784 }
1785 }
1786 if (ok) {
1787 if (cur_drv->sect == cur_drv->last_sect) {
1788 fdctrl->data_state &= ~FD_STATE_FORMAT;
1789 /* Last sector done */
1790 if (FD_DID_SEEK(fdctrl->data_state))
1791 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1792 else
1793 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1794 } else {
1795 /* More to do */
1796 fdctrl->data_pos = 0;
1797 fdctrl->data_len = 4;
1798 }
1799 }
1800}
1801
1802static void fdctrl_handle_lock(fdctrl_t *fdctrl, int direction)
1803{
1804 RT_NOREF(direction);
1805 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1806 fdctrl->fifo[0] = fdctrl->lock << 4;
1807 fdctrl_set_fifo(fdctrl, 1, 0);
1808}
1809
1810static void fdctrl_handle_dumpreg(fdctrl_t *fdctrl, int direction)
1811{
1812 RT_NOREF(direction);
1813 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1814
1815 /* Drives position */
1816 fdctrl->fifo[0] = drv0(fdctrl)->track;
1817 fdctrl->fifo[1] = drv1(fdctrl)->track;
1818#if MAX_FD == 4
1819 fdctrl->fifo[2] = drv2(fdctrl)->track;
1820 fdctrl->fifo[3] = drv3(fdctrl)->track;
1821#else
1822 fdctrl->fifo[2] = 0;
1823 fdctrl->fifo[3] = 0;
1824#endif
1825 /* timers */
1826 fdctrl->fifo[4] = fdctrl->timer0;
1827 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1828 fdctrl->fifo[6] = cur_drv->last_sect;
1829 fdctrl->fifo[7] = (fdctrl->lock << 7) |
1830 (cur_drv->perpendicular << 2);
1831 fdctrl->fifo[8] = fdctrl->config;
1832 fdctrl->fifo[9] = fdctrl->precomp_trk;
1833 fdctrl_set_fifo(fdctrl, 10, 0);
1834}
1835
1836static void fdctrl_handle_version(fdctrl_t *fdctrl, int direction)
1837{
1838 RT_NOREF(direction);
1839 /* Controller's version */
1840 fdctrl->fifo[0] = fdctrl->version;
1841 fdctrl_set_fifo(fdctrl, 1, 0);
1842}
1843
1844static void fdctrl_handle_partid(fdctrl_t *fdctrl, int direction)
1845{
1846 RT_NOREF(direction);
1847 fdctrl->fifo[0] = 0x01; /* Stepping 1 */
1848 fdctrl_set_fifo(fdctrl, 1, 0);
1849}
1850
1851static void fdctrl_handle_restore(fdctrl_t *fdctrl, int direction)
1852{
1853 RT_NOREF(direction);
1854 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1855
1856 /* Drives position */
1857 drv0(fdctrl)->track = fdctrl->fifo[3];
1858 drv1(fdctrl)->track = fdctrl->fifo[4];
1859#if MAX_FD == 4
1860 drv2(fdctrl)->track = fdctrl->fifo[5];
1861 drv3(fdctrl)->track = fdctrl->fifo[6];
1862#endif
1863 /* timers */
1864 fdctrl->timer0 = fdctrl->fifo[7];
1865 fdctrl->timer1 = fdctrl->fifo[8];
1866 cur_drv->last_sect = fdctrl->fifo[9];
1867 fdctrl->lock = fdctrl->fifo[10] >> 7;
1868 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1869 fdctrl->config = fdctrl->fifo[11];
1870 fdctrl->precomp_trk = fdctrl->fifo[12];
1871 fdctrl->pwrd = fdctrl->fifo[13];
1872 fdctrl_reset_fifo(fdctrl);
1873}
1874
1875static void fdctrl_handle_save(fdctrl_t *fdctrl, int direction)
1876{
1877 RT_NOREF(direction);
1878 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1879
1880 fdctrl->fifo[0] = 0;
1881 fdctrl->fifo[1] = 0;
1882 /* Drives position */
1883 fdctrl->fifo[2] = drv0(fdctrl)->track;
1884 fdctrl->fifo[3] = drv1(fdctrl)->track;
1885#if MAX_FD == 4
1886 fdctrl->fifo[4] = drv2(fdctrl)->track;
1887 fdctrl->fifo[5] = drv3(fdctrl)->track;
1888#else
1889 fdctrl->fifo[4] = 0;
1890 fdctrl->fifo[5] = 0;
1891#endif
1892 /* timers */
1893 fdctrl->fifo[6] = fdctrl->timer0;
1894 fdctrl->fifo[7] = fdctrl->timer1;
1895 fdctrl->fifo[8] = cur_drv->last_sect;
1896 fdctrl->fifo[9] = (fdctrl->lock << 7) |
1897 (cur_drv->perpendicular << 2);
1898 fdctrl->fifo[10] = fdctrl->config;
1899 fdctrl->fifo[11] = fdctrl->precomp_trk;
1900 fdctrl->fifo[12] = fdctrl->pwrd;
1901 fdctrl->fifo[13] = 0;
1902 fdctrl->fifo[14] = 0;
1903 fdctrl_set_fifo(fdctrl, 15, 0);
1904}
1905
1906static void fdctrl_handle_readid(fdctrl_t *fdctrl, int direction)
1907{
1908 RT_NOREF(direction);
1909 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1910
1911 FLOPPY_DPRINTF("CMD:%02x SEL:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1912
1913 fdctrl->msr &= ~FD_MSR_RQM;
1914 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1915 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hResultTimer, 1000 / 50);
1916}
1917
1918static void fdctrl_handle_format_track(fdctrl_t *fdctrl, int direction)
1919{
1920 RT_NOREF(direction);
1921 fdrive_t *cur_drv;
1922 uint8_t ns, dp;
1923
1924 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1925 cur_drv = get_cur_drv(fdctrl);
1926 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1927 ns = fdctrl->fifo[3];
1928 dp = fdctrl->fifo[5];
1929
1930 FLOPPY_DPRINTF("Format track %d at %d, %d sectors, filler %02x\n",
1931 cur_drv->track, GET_CUR_DRV(fdctrl), ns, dp);
1932 FLOPPY_DPRINTF("CMD:%02x SEL:%02x N:%02x SC:%02x GPL:%02x D:%02x\n",
1933 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1934 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5]);
1935
1936 /* Since we cannot actually format anything, we have to make sure that
1937 * whatever new format the guest is trying to establish matches the
1938 * existing format of the medium.
1939 */
1940 if (cur_drv->last_sect != ns || fdctrl->fifo[2] != 2)
1941 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_NW, 0);
1942 else
1943 {
1944 cur_drv->bps = fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1945 cur_drv->last_sect = ns;
1946
1947 fdctrl_start_format(fdctrl);
1948 }
1949}
1950
1951static void fdctrl_handle_specify(fdctrl_t *fdctrl, int direction)
1952{
1953 RT_NOREF(direction);
1954 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1955 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1956 if (fdctrl->fifo[2] & 1)
1957 fdctrl->dor &= ~FD_DOR_DMAEN;
1958 else
1959 fdctrl->dor |= FD_DOR_DMAEN;
1960 /* No result back */
1961 fdctrl_reset_fifo(fdctrl);
1962}
1963
1964static void fdctrl_handle_sense_drive_status(fdctrl_t *fdctrl, int direction)
1965{
1966 RT_NOREF(direction);
1967 fdrive_t *cur_drv;
1968
1969 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1970 cur_drv = get_cur_drv(fdctrl);
1971 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1972 /* 1 Byte status back */
1973 fdctrl->fifo[0] = (cur_drv->ro << 6) |
1974 (cur_drv->track == 0 ? 0x10 : 0x00) |
1975 (cur_drv->head << 2) |
1976 GET_CUR_DRV(fdctrl) |
1977 0x28;
1978 fdctrl_set_fifo(fdctrl, 1, 0);
1979}
1980
1981static void fdctrl_handle_recalibrate(fdctrl_t *fdctrl, int direction)
1982{
1983 RT_NOREF(direction);
1984 fdrive_t *cur_drv;
1985 uint8_t st0;
1986
1987 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1988 cur_drv = get_cur_drv(fdctrl);
1989 fd_recalibrate(cur_drv);
1990 fdctrl_reset_fifo(fdctrl);
1991 st0 = FD_SR0_SEEK | GET_CUR_DRV(fdctrl);
1992 /* No drive means no TRK0 signal. */
1993 if (cur_drv->drive == FDRIVE_DRV_NONE)
1994 st0 |= FD_SR0_ABNTERM | FD_SR0_EQPMT;
1995 /* Raise Interrupt */
1996 fdctrl_raise_irq(fdctrl, st0);
1997}
1998
1999static void fdctrl_handle_sense_interrupt_status(fdctrl_t *fdctrl, int direction)
2000{
2001 RT_NOREF(direction);
2002 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2003
2004 FLOPPY_DPRINTF("CMD:%02x\n", fdctrl->fifo[0]);
2005 if(fdctrl->reset_sensei > 0) {
2006 fdctrl->fifo[0] =
2007 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
2008 fdctrl->reset_sensei--;
2009 } else {
2010 /* XXX: status0 handling is broken for read/write
2011 commands, so we do this hack. It should be suppressed
2012 ASAP */
2013 fdctrl->fifo[0] =
2014 FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
2015 /* Hack to preserve SR0 on equipment check failures (no drive). */
2016 if (fdctrl->status0 & FD_SR0_EQPMT)
2017 fdctrl->fifo[0] = fdctrl->status0;
2018 }
2019
2020 fdctrl->fifo[1] = cur_drv->track;
2021 fdctrl_set_fifo(fdctrl, 2, 0);
2022 FLOPPY_DPRINTF("ST0:%02x PCN:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
2023 fdctrl->status0 = FD_SR0_RDYCHG;
2024}
2025
2026static void fdctrl_handle_seek(fdctrl_t *fdctrl, int direction)
2027{
2028 RT_NOREF(direction);
2029 fdrive_t *cur_drv;
2030
2031 FLOPPY_DPRINTF("CMD:%02x SEL:%02x NCN:%02x\n", fdctrl->fifo[0],
2032 fdctrl->fifo[1], fdctrl->fifo[2]);
2033
2034 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2035 cur_drv = get_cur_drv(fdctrl);
2036 fdctrl_reset_fifo(fdctrl);
2037
2038 /* The seek command just sends step pulses to the drive and doesn't care if
2039 * there's a medium inserted or if it's banging the head against the drive.
2040 */
2041 cur_drv->track = fdctrl->fifo[2];
2042 cur_drv->ltrk = cur_drv->track;
2043 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2044 /* Raise Interrupt */
2045 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK | GET_CUR_DRV(fdctrl));
2046}
2047
2048static void fdctrl_handle_perpendicular_mode(fdctrl_t *fdctrl, int direction)
2049{
2050 RT_NOREF(direction);
2051 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2052
2053 if (fdctrl->fifo[1] & 0x80)
2054 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
2055 /* No result back */
2056 fdctrl_reset_fifo(fdctrl);
2057}
2058
2059static void fdctrl_handle_configure(fdctrl_t *fdctrl, int direction)
2060{
2061 RT_NOREF(direction);
2062 fdctrl->config = fdctrl->fifo[2];
2063 fdctrl->precomp_trk = fdctrl->fifo[3];
2064 /* No result back */
2065 fdctrl_reset_fifo(fdctrl);
2066}
2067
2068static void fdctrl_handle_powerdown_mode(fdctrl_t *fdctrl, int direction)
2069{
2070 RT_NOREF(direction);
2071 fdctrl->pwrd = fdctrl->fifo[1];
2072 fdctrl->fifo[0] = fdctrl->fifo[1];
2073 fdctrl_set_fifo(fdctrl, 1, 0);
2074}
2075
2076static void fdctrl_handle_option(fdctrl_t *fdctrl, int direction)
2077{
2078 RT_NOREF(direction);
2079 /* No result back */
2080 fdctrl_reset_fifo(fdctrl);
2081}
2082
2083static void fdctrl_handle_drive_specification_command(fdctrl_t *fdctrl, int direction)
2084{
2085 RT_NOREF(direction);
2086 /* fdrive_t *cur_drv = get_cur_drv(fdctrl); - unused */
2087
2088 /* This command takes a variable number of parameters. It can be terminated
2089 * at any time if the high bit of a parameter is set. Once there are 6 bytes
2090 * in the FIFO (command + 5 parameter bytes), data_len/data_pos will be 7.
2091 */
2092 if (fdctrl->data_len == 7 || (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80)) {
2093
2094 /* Command parameters done */
2095 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
2096 /* Data is echoed, but not stored! */
2097 fdctrl->fifo[0] = fdctrl->data_len > 2 ? fdctrl->fifo[1] : 0;
2098 fdctrl->fifo[1] = fdctrl->data_len > 3 ? fdctrl->fifo[2] : 0;
2099 fdctrl->fifo[2] = 0;
2100 fdctrl->fifo[3] = 0;
2101 fdctrl_set_fifo(fdctrl, 4, 0);
2102 } else {
2103 fdctrl_reset_fifo(fdctrl);
2104 }
2105 } else
2106 fdctrl->data_len++; /* Wait for another byte. */
2107}
2108
2109static void fdctrl_handle_relative_seek_out(fdctrl_t *fdctrl, int direction)
2110{
2111 RT_NOREF(direction);
2112 fdrive_t *cur_drv;
2113
2114 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2115 cur_drv = get_cur_drv(fdctrl);
2116 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2117 cur_drv->track = cur_drv->max_track - 1;
2118 } else {
2119 cur_drv->track += fdctrl->fifo[2];
2120 }
2121 fdctrl_reset_fifo(fdctrl);
2122 /* Raise Interrupt */
2123 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2124}
2125
2126static void fdctrl_handle_relative_seek_in(fdctrl_t *fdctrl, int direction)
2127{
2128 RT_NOREF(direction);
2129 fdrive_t *cur_drv;
2130
2131 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2132 cur_drv = get_cur_drv(fdctrl);
2133 if (fdctrl->fifo[2] > cur_drv->track) {
2134 cur_drv->track = 0;
2135 } else {
2136 cur_drv->track -= fdctrl->fifo[2];
2137 }
2138 fdctrl_reset_fifo(fdctrl);
2139 /* Raise Interrupt */
2140 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2141}
2142
2143static const struct {
2144 uint8_t value;
2145 uint8_t mask;
2146 const char* name;
2147 int parameters;
2148 void (*handler)(fdctrl_t *fdctrl, int direction);
2149 int direction;
2150} handlers[] = {
2151 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2152 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2153 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2154 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2155 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2156 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2157 { FD_CMD_READ_TRACK, 0x9f, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2158 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2159 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2160 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2161 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2162 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
2163 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2164 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2165 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2166 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2167 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2168 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2169 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2170 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2171 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2172 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2173 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 1, fdctrl_handle_drive_specification_command },
2174 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2175 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2176 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2177 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2178 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2179 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2180 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2181 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2182 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2183};
2184/* Associate command to an index in the 'handlers' array */
2185static uint8_t command_to_handler[256];
2186
2187static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value)
2188{
2189 fdrive_t *cur_drv;
2190 int pos;
2191
2192 cur_drv = get_cur_drv(fdctrl);
2193 /* Reset mode */
2194 if (!(fdctrl->dor & FD_DOR_nRESET)) {
2195 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2196 return;
2197 }
2198 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
2199 FLOPPY_ERROR("controller not ready for writing\n");
2200 return;
2201 }
2202 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2203 /* Is it write command time ? */
2204 if (fdctrl->msr & FD_MSR_NONDMA) {
2205 /* FIFO data write */
2206 pos = fdctrl->data_pos++;
2207 pos %= FD_SECTOR_LEN;
2208 fdctrl->fifo[pos] = value;
2209
2210 if (cur_drv->pDrvMedia == NULL)
2211 {
2212 if (fdctrl->data_dir == FD_DIR_WRITE)
2213 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
2214 else
2215 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
2216 } else if (pos == FD_SECTOR_LEN - 1 ||
2217 fdctrl->data_pos == fdctrl->data_len) {
2218 blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
2219 }
2220 /* Switch from transfer mode to status mode
2221 * then from status mode to command mode
2222 */
2223 if (fdctrl->data_pos == fdctrl->data_len)
2224 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
2225 return;
2226 }
2227 if (fdctrl->data_pos == 0) {
2228 /* Command */
2229 fdctrl_reset_irq(fdctrl); /* If pending from previous seek/recalibrate. */
2230 pos = command_to_handler[value & 0xff];
2231 FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
2232 fdctrl->data_len = handlers[pos].parameters + 1;
2233 fdctrl->msr |= FD_MSR_CMDBUSY;
2234 fdctrl->cur_cmd = value & 0xff;
2235 }
2236
2237 FLOPPY_DPRINTF("%s: %02x\n", __FUNCTION__, value);
2238 fdctrl->fifo[fdctrl->data_pos++ % FD_SECTOR_LEN] = value;
2239 if (fdctrl->data_pos == fdctrl->data_len) {
2240 /* We now have all parameters
2241 * and will be able to treat the command
2242 */
2243 if (fdctrl->data_state & FD_STATE_FORMAT) {
2244 fdctrl_format_sector(fdctrl);
2245 return;
2246 }
2247
2248 pos = command_to_handler[fdctrl->fifo[0] & 0xff];
2249 FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
2250 (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
2251 }
2252}
2253
2254
2255/* -=-=-=-=-=-=-=-=- Timer Callback -=-=-=-=-=-=-=-=- */
2256
2257/**
2258 * @callback_method_impl{FNTMTIMERDEV}
2259 */
2260static DECLCALLBACK(void) fdcTimerCallback(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2261{
2262 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2263 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2264 RT_NOREF(hTimer, pvUser);
2265
2266 /* Pretend we are spinning.
2267 * This is needed for Coherent, which uses READ ID to check for
2268 * sector interleaving.
2269 */
2270 if (cur_drv->last_sect != 0) {
2271 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2272 }
2273 /* READ_ID can't automatically succeed! */
2274 if (!cur_drv->max_track) {
2275 FLOPPY_DPRINTF("read id when no disk in drive\n");
2276 /// @todo This is wrong! Command should not complete.
2277 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2278 } else if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2279 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2280 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2281 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2282 } else if (cur_drv->track >= cur_drv->max_track) {
2283 FLOPPY_DPRINTF("read id past last track (%d >= %d)\n",
2284 cur_drv->track, cur_drv->max_track);
2285 cur_drv->ltrk = 0;
2286 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2287 }
2288 else
2289 fdctrl_stop_transfer_now(fdctrl, 0x00, 0x00, 0x00);
2290}
2291
2292
2293/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2294
2295/**
2296 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f0 accesses.}
2297 */
2298static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2299{
2300 RT_NOREF(pvUser);
2301
2302 if (cb == 1)
2303 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort, u32);
2304 else
2305 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2306 return VINF_SUCCESS;
2307}
2308
2309
2310/**
2311 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f0 accesses.}
2312 */
2313static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2314{
2315 RT_NOREF(pvUser);
2316
2317 if (cb == 1)
2318 {
2319 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort);
2320 return VINF_SUCCESS;
2321 }
2322 return VERR_IOM_IOPORT_UNUSED;
2323}
2324
2325
2326/**
2327 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f1..0x3f5 accesses.}
2328 */
2329static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2330{
2331 RT_NOREF(pvUser);
2332
2333 if (cb == 1)
2334 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1, u32);
2335 else
2336 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2337 return VINF_SUCCESS;
2338}
2339
2340
2341/**
2342 * @callback_method_impl{FNTMTIMERDEV}
2343 */
2344static DECLCALLBACK(void) fdcTransferDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2345{
2346 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2347 RT_NOREF(pvUser, hTimer);
2348 fdctrl_stop_transfer_now(fdctrl, fdctrl->st0, fdctrl->st1, fdctrl->st2);
2349}
2350
2351
2352/**
2353 * @callback_method_impl{FNTMTIMERDEV}
2354 */
2355static DECLCALLBACK(void) fdcIrqDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2356{
2357 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2358 RT_NOREF(pvUser, hTimer);
2359 fdctrl_raise_irq_now(fdctrl, fdctrl->st0);
2360}
2361
2362
2363
2364/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2365/**
2366 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f1..0x3f5 accesses.}
2367 */
2368static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2369{
2370 RT_NOREF(pvUser);
2371
2372 if (cb == 1)
2373 {
2374 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1);
2375 return VINF_SUCCESS;
2376 }
2377 return VERR_IOM_IOPORT_UNUSED;
2378}
2379
2380
2381/**
2382 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f7 access.}
2383 */
2384static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2385{
2386 RT_NOREF(offPort, pvUser);
2387 Assert(offPort == 0);
2388
2389 if (cb == 1)
2390 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7, u32);
2391 else
2392 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2393 return VINF_SUCCESS;
2394}
2395
2396
2397/**
2398 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f7 access.}
2399 */
2400static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2401{
2402 RT_NOREF(pvUser, offPort);
2403 Assert(offPort == 0);
2404
2405 if (cb == 1)
2406 {
2407 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7);
2408 return VINF_SUCCESS;
2409 }
2410 return VERR_IOM_IOPORT_UNUSED;
2411}
2412
2413
2414/* -=-=-=-=-=-=-=-=- Debugger callback -=-=-=-=-=-=-=-=- */
2415
2416/**
2417 * FDC debugger info callback.
2418 *
2419 * @param pDevIns The device instance.
2420 * @param pHlp The output helpers.
2421 * @param pszArgs The arguments.
2422 */
2423static DECLCALLBACK(void) fdcInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
2424{
2425 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2426 unsigned i;
2427 bool fVerbose = false;
2428
2429 /* Parse arguments. */
2430 if (pszArgs)
2431 fVerbose = strstr(pszArgs, "verbose") != NULL;
2432
2433 /* Show basic information. */
2434 pHlp->pfnPrintf(pHlp, "%s#%d: ",
2435 pDevIns->pReg->szName,
2436 pDevIns->iInstance);
2437 pHlp->pfnPrintf(pHlp, "I/O=%X IRQ=%u DMA=%u ",
2438 pThis->io_base,
2439 pThis->irq_lvl,
2440 pThis->dma_chann);
2441 pHlp->pfnPrintf(pHlp, "RC=%RTbool R0=%RTbool\n", pDevIns->fRCEnabled, pDevIns->fR0Enabled);
2442
2443 /* Print register contents. */
2444 pHlp->pfnPrintf(pHlp, "Registers: MSR=%02X DSR=%02X DOR=%02X\n",
2445 pThis->msr, pThis->dsr, pThis->dor);
2446 pHlp->pfnPrintf(pHlp, " DIR=%02X\n",
2447 fdctrl_read_dir(pThis));
2448
2449 /* Print the current command, if any. */
2450 if (pThis->cur_cmd)
2451 pHlp->pfnPrintf(pHlp, "Curr cmd: %02X (%s)\n",
2452 pThis->cur_cmd,
2453 handlers[command_to_handler[pThis->cur_cmd]].name);
2454 if (pThis->prev_cmd)
2455 pHlp->pfnPrintf(pHlp, "Prev cmd: %02X (%s)\n",
2456 pThis->prev_cmd,
2457 handlers[command_to_handler[pThis->prev_cmd]].name);
2458
2459
2460 for (i = 0; i < pThis->num_floppies; ++i)
2461 {
2462 fdrive_t *drv = &pThis->drives[i];
2463 pHlp->pfnPrintf(pHlp, " Drive %u state:\n", i);
2464 pHlp->pfnPrintf(pHlp, " Medium : %u tracks, %u sectors\n",
2465 drv->max_track,
2466 drv->last_sect);
2467 pHlp->pfnPrintf(pHlp, " Current: track %u, head %u, sector %u\n",
2468 drv->track,
2469 drv->head,
2470 drv->sect);
2471 }
2472}
2473
2474
2475/* -=-=-=-=-=-=-=-=- Saved state -=-=-=-=-=-=-=-=- */
2476
2477/**
2478 * @callback_method_impl{FNSSMDEVSAVEEXEC}
2479 */
2480static DECLCALLBACK(int) fdcSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2481{
2482 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2483 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2484 unsigned int i;
2485 int rc;
2486
2487 /* Save the FDC I/O registers... */
2488 pHlp->pfnSSMPutU8(pSSM, pThis->sra);
2489 pHlp->pfnSSMPutU8(pSSM, pThis->srb);
2490 pHlp->pfnSSMPutU8(pSSM, pThis->dor);
2491 pHlp->pfnSSMPutU8(pSSM, pThis->tdr);
2492 pHlp->pfnSSMPutU8(pSSM, pThis->dsr);
2493 pHlp->pfnSSMPutU8(pSSM, pThis->msr);
2494 /* ...the status registers... */
2495 pHlp->pfnSSMPutU8(pSSM, pThis->status0);
2496 pHlp->pfnSSMPutU8(pSSM, pThis->status1);
2497 pHlp->pfnSSMPutU8(pSSM, pThis->status2);
2498 /* ...the command FIFO... */
2499 pHlp->pfnSSMPutU32(pSSM, sizeof(pThis->fifo));
2500 pHlp->pfnSSMPutMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2501 pHlp->pfnSSMPutU32(pSSM, pThis->data_pos);
2502 pHlp->pfnSSMPutU32(pSSM, pThis->data_len);
2503 pHlp->pfnSSMPutU8(pSSM, pThis->data_state);
2504 pHlp->pfnSSMPutU8(pSSM, pThis->data_dir);
2505 /* ...and miscellaneous internal FDC state. */
2506 pHlp->pfnSSMPutU8(pSSM, pThis->reset_sensei);
2507 pHlp->pfnSSMPutU8(pSSM, pThis->eot);
2508 pHlp->pfnSSMPutU8(pSSM, pThis->timer0);
2509 pHlp->pfnSSMPutU8(pSSM, pThis->timer1);
2510 pHlp->pfnSSMPutU8(pSSM, pThis->precomp_trk);
2511 pHlp->pfnSSMPutU8(pSSM, pThis->config);
2512 pHlp->pfnSSMPutU8(pSSM, pThis->lock);
2513 pHlp->pfnSSMPutU8(pSSM, pThis->pwrd);
2514 pHlp->pfnSSMPutU8(pSSM, pThis->version);
2515
2516 /* Save the number of drives and per-drive state. Note that the media
2517 * states will be updated in fd_revalidate() and need not be saved.
2518 */
2519 pHlp->pfnSSMPutU8(pSSM, pThis->num_floppies);
2520 Assert(RT_ELEMENTS(pThis->drives) == pThis->num_floppies);
2521 for (i = 0; i < pThis->num_floppies; ++i)
2522 {
2523 fdrive_t *d = &pThis->drives[i];
2524
2525 pHlp->pfnSSMPutMem(pSSM, &d->Led, sizeof(d->Led));
2526 pHlp->pfnSSMPutU32(pSSM, d->drive);
2527 pHlp->pfnSSMPutU8(pSSM, d->dsk_chg);
2528 pHlp->pfnSSMPutU8(pSSM, d->perpendicular);
2529 pHlp->pfnSSMPutU8(pSSM, d->head);
2530 pHlp->pfnSSMPutU8(pSSM, d->track);
2531 pHlp->pfnSSMPutU8(pSSM, d->sect);
2532 }
2533 rc = pHlp->pfnTimerSave(pDevIns, pThis->hXferDelayTimer, pSSM);
2534 AssertRCReturn(rc, rc);
2535 rc = pHlp->pfnTimerSave(pDevIns, pThis->hIrqDelayTimer, pSSM);
2536 AssertRCReturn(rc, rc);
2537 return pHlp->pfnTimerSave(pDevIns, pThis->hResultTimer, pSSM);
2538}
2539
2540
2541/**
2542 * @callback_method_impl{FNSSMDEVLOADEXEC}
2543 */
2544static DECLCALLBACK(int) fdcLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2545{
2546 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2547 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2548 unsigned int i;
2549 uint32_t val32;
2550 uint8_t val8;
2551 int rc;
2552
2553 if (uVersion > FDC_SAVESTATE_CURRENT)
2554 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2555 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2556
2557 if (uVersion > FDC_SAVESTATE_OLD)
2558 {
2559 /* Load the FDC I/O registers... */
2560 pHlp->pfnSSMGetU8(pSSM, &pThis->sra);
2561 pHlp->pfnSSMGetU8(pSSM, &pThis->srb);
2562 pHlp->pfnSSMGetU8(pSSM, &pThis->dor);
2563 pHlp->pfnSSMGetU8(pSSM, &pThis->tdr);
2564 pHlp->pfnSSMGetU8(pSSM, &pThis->dsr);
2565 pHlp->pfnSSMGetU8(pSSM, &pThis->msr);
2566 /* ...the status registers... */
2567 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2568 pHlp->pfnSSMGetU8(pSSM, &pThis->status1);
2569 pHlp->pfnSSMGetU8(pSSM, &pThis->status2);
2570 /* ...the command FIFO, if the size matches... */
2571 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2572 AssertRCReturn(rc, rc);
2573 AssertMsgReturn(sizeof(pThis->fifo) == val32,
2574 ("The size of FIFO in saved state doesn't match!\n"),
2575 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2576 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2577 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2578 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2579 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2580 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2581 /* ...and miscellaneous internal FDC state. */
2582 pHlp->pfnSSMGetU8(pSSM, &pThis->reset_sensei);
2583 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2584 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2585 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2586 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2587 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2588 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2589 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2590 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2591
2592 /* Validate the number of drives. */
2593 rc = pHlp->pfnSSMGetU8(pSSM, &pThis->num_floppies);
2594 AssertRCReturn(rc, rc);
2595 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == pThis->num_floppies,
2596 ("The number of drives in saved state doesn't match!\n"),
2597 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2598
2599 /* Load the per-drive state. */
2600 for (i = 0; i < pThis->num_floppies; ++i)
2601 {
2602 fdrive_t *d = &pThis->drives[i];
2603
2604 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof(d->Led));
2605 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2606 AssertRCReturn(rc, rc);
2607 d->drive = (fdrive_type_t)val32;
2608 pHlp->pfnSSMGetU8(pSSM, &d->dsk_chg);
2609 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2610 pHlp->pfnSSMGetU8(pSSM, &d->head);
2611 pHlp->pfnSSMGetU8(pSSM, &d->track);
2612 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2613 }
2614
2615 if (uVersion > FDC_SAVESTATE_PRE_DELAY)
2616 {
2617 pHlp->pfnTimerLoad(pDevIns, pThis->hXferDelayTimer, pSSM);
2618 pHlp->pfnTimerLoad(pDevIns, pThis->hIrqDelayTimer, pSSM);
2619 }
2620 }
2621 else if (uVersion == FDC_SAVESTATE_OLD)
2622 {
2623 /* The old saved state was significantly different. However, we can get
2624 * back most of the controller state and fix the rest by pretending the
2625 * disk in the drive (if any) has been replaced. At any rate there should
2626 * be no difficulty unless the state was saved during a floppy operation.
2627 */
2628
2629 /* First verify a few assumptions. */
2630 AssertMsgReturn(sizeof(pThis->fifo) == FD_SECTOR_LEN,
2631 ("The size of FIFO in saved state doesn't match!\n"),
2632 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2633 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == 2,
2634 ("The number of drives in old saved state doesn't match!\n"),
2635 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2636 /* Now load the old state. */
2637 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2638 /* Toss IRQ level, DMA channel, I/O base, and state. */
2639 pHlp->pfnSSMGetU8(pSSM, &val8);
2640 pHlp->pfnSSMGetU8(pSSM, &val8);
2641 pHlp->pfnSSMGetU32(pSSM, &val32);
2642 pHlp->pfnSSMGetU8(pSSM, &val8);
2643 /* Translate dma_en. */
2644 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2645 AssertRCReturn(rc, rc);
2646 if (val8)
2647 pThis->dor |= FD_DOR_DMAEN;
2648 pHlp->pfnSSMGetU8(pSSM, &pThis->cur_drv);
2649 /* Translate bootsel. */
2650 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2651 AssertRCReturn(rc, rc);
2652 pThis->tdr |= val8 << 2;
2653 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, FD_SECTOR_LEN);
2654 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2655 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2656 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2657 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2658 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2659 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2660 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2661 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2662 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2663 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2664 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2665 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2666
2667 for (i = 0; i < 2; ++i)
2668 {
2669 fdrive_t *d = &pThis->drives[i];
2670
2671 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof (d->Led));
2672 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2673 d->drive = (fdrive_type_t)val32;
2674 AssertRCReturn(rc, rc);
2675 pHlp->pfnSSMGetU32(pSSM, &val32); /* Toss drflags */
2676 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2677 pHlp->pfnSSMGetU8(pSSM, &d->head);
2678 pHlp->pfnSSMGetU8(pSSM, &d->track);
2679 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2680 pHlp->pfnSSMGetU8(pSSM, &val8); /* Toss dir, rw */
2681 pHlp->pfnSSMGetU8(pSSM, &val8);
2682 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2683 AssertRCReturn(rc, rc);
2684 d->flags = (fdrive_flags_t)val32;
2685 pHlp->pfnSSMGetU8(pSSM, &d->last_sect);
2686 pHlp->pfnSSMGetU8(pSSM, &d->max_track);
2687 pHlp->pfnSSMGetU16(pSSM, &d->bps);
2688 pHlp->pfnSSMGetU8(pSSM, &d->ro);
2689 }
2690 }
2691 else
2692 AssertFailedReturn(VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
2693 return pHlp->pfnTimerLoad(pDevIns, pThis->hResultTimer, pSSM);
2694}
2695
2696
2697/* -=-=-=-=-=-=-=-=- Drive level interfaces -=-=-=-=-=-=-=-=- */
2698
2699/**
2700 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnMountNotify}
2701 */
2702static DECLCALLBACK(void) fdMountNotify(PPDMIMOUNTNOTIFY pInterface)
2703{
2704 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2705 LogFlow(("fdMountNotify:\n"));
2706 fd_revalidate(pDrv);
2707}
2708
2709
2710/**
2711 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnUnmountNotify}
2712 */
2713static DECLCALLBACK(void) fdUnmountNotify(PPDMIMOUNTNOTIFY pInterface)
2714{
2715 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2716 LogFlow(("fdUnmountNotify:\n"));
2717 fd_revalidate(pDrv);
2718}
2719
2720
2721/**
2722 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2723 */
2724static DECLCALLBACK(void *) fdQueryInterface (PPDMIBASE pInterface, const char *pszIID)
2725{
2726 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IBase);
2727
2728 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDrv->IBase);
2729 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDrv->IPort);
2730 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMOUNTNOTIFY, &pDrv->IMountNotify);
2731 return NULL;
2732}
2733
2734
2735/**
2736 * @interface_method_impl{PDMIMEDIAPORT,pfnQueryDeviceLocation}
2737 */
2738static DECLCALLBACK(int) fdQueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2739 uint32_t *piInstance, uint32_t *piLUN)
2740{
2741 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IPort);
2742 PPDMDEVINS pDevIns = pDrv->pDevIns;
2743
2744 AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2745 AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2746 AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2747
2748 *ppcszController = pDevIns->pReg->szName;
2749 *piInstance = pDevIns->iInstance;
2750 *piLUN = pDrv->iLUN;
2751
2752 return VINF_SUCCESS;
2753}
2754
2755/* -=-=-=-=-=-=-=-=- Controller level interfaces -=-=-=-=-=-=-=-=- */
2756
2757/**
2758 * @interface_method_impl{PDMILEDPORTS,pfnQueryStatusLed}
2759 */
2760static DECLCALLBACK(int) fdcStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2761{
2762 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, ILeds);
2763 if (iLUN < RT_ELEMENTS(pThis->drives)) {
2764 *ppLed = &pThis->drives[iLUN].Led;
2765 Assert ((*ppLed)->u32Magic == PDMLED_MAGIC);
2766 return VINF_SUCCESS;
2767 }
2768 return VERR_PDM_LUN_NOT_FOUND;
2769}
2770
2771
2772/**
2773 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2774 */
2775static DECLCALLBACK(void *) fdcStatusQueryInterface(PPDMIBASE pInterface, const char *pszIID)
2776{
2777 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, IBaseStatus);
2778
2779 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBaseStatus);
2780 PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
2781 return NULL;
2782}
2783
2784
2785/**
2786 * Configure a drive.
2787 *
2788 * @returns VBox status code.
2789 * @param drv The drive in question.
2790 * @param pDevIns The driver instance.
2791 * @param fInit Set if we're at init time and can change the drive type.
2792 */
2793static int fdConfig(fdrive_t *drv, PPDMDEVINS pDevIns, bool fInit)
2794{
2795 static const char * const s_apszDesc[] = {"Floppy Drive A:", "Floppy Drive B"};
2796 int rc;
2797
2798 /*
2799 * Reset the LED just to be on the safe side.
2800 */
2801 Assert (RT_ELEMENTS(s_apszDesc) > drv->iLUN);
2802 Assert (drv->Led.u32Magic == PDMLED_MAGIC);
2803 drv->Led.Actual.u32 = 0;
2804 drv->Led.Asserted.u32 = 0;
2805
2806 /*
2807 * Try attach the block device and get the interfaces.
2808 */
2809 rc = PDMDevHlpDriverAttach (pDevIns, drv->iLUN, &drv->IBase, &drv->pDrvBase, s_apszDesc[drv->iLUN]);
2810 if (RT_SUCCESS (rc)) {
2811 drv->pDrvMedia = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMEDIA);
2812 if (drv->pDrvMedia) {
2813 drv->pDrvMount = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMOUNT);
2814 if (drv->pDrvMount) {
2815 fd_init(drv, fInit);
2816 } else {
2817 AssertMsgFailed (("Configuration error: LUN#%d without mountable interface!\n", drv->iLUN));
2818 rc = VERR_PDM_MISSING_INTERFACE;
2819 }
2820
2821 } else {
2822 AssertMsgFailed (("Configuration error: LUN#%d hasn't a block interface!\n", drv->iLUN));
2823 rc = VERR_PDM_MISSING_INTERFACE;
2824 }
2825 } else {
2826 AssertMsg (rc == VERR_PDM_NO_ATTACHED_DRIVER,
2827 ("Failed to attach LUN#%d. rc=%Rrc\n", drv->iLUN, rc));
2828 switch (rc) {
2829 case VERR_ACCESS_DENIED:
2830 /* Error already cached by DrvHostBase */
2831 break;
2832 case VERR_PDM_NO_ATTACHED_DRIVER:
2833 /* Legal on architectures without a floppy controller */
2834 break;
2835 default:
2836 rc = PDMDevHlpVMSetError (pDevIns, rc, RT_SRC_POS,
2837 N_ ("The floppy controller cannot attach to the floppy drive"));
2838 break;
2839 }
2840 }
2841
2842 if (RT_FAILURE (rc)) {
2843 drv->pDrvBase = NULL;
2844 drv->pDrvMedia = NULL;
2845 drv->pDrvMount = NULL;
2846 }
2847 LogFlow (("fdConfig: returns %Rrc\n", rc));
2848 return rc;
2849}
2850
2851
2852/**
2853 * @interface_method_impl{PDMDEVREG,pfnAttach}
2854 *
2855 * This is called when we change block driver for a floppy drive.
2856 */
2857static DECLCALLBACK(int) fdcAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2858{
2859 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2860 fdrive_t *drv;
2861 int rc;
2862 LogFlow (("fdcAttach: iLUN=%u\n", iLUN));
2863
2864 AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
2865 ("The FDC device does not support hotplugging\n"),
2866 VERR_INVALID_PARAMETER);
2867
2868 /*
2869 * Validate.
2870 */
2871 if (iLUN >= 2) {
2872 AssertMsgFailed (("Configuration error: cannot attach or detach any but the first two LUNs - iLUN=%u\n",
2873 iLUN));
2874 return VERR_PDM_DEVINS_NO_ATTACH;
2875 }
2876
2877 /*
2878 * Locate the drive and stuff.
2879 */
2880 drv = &fdctrl->drives[iLUN];
2881
2882 /* the usual paranoia */
2883 AssertRelease (!drv->pDrvBase);
2884 AssertRelease (!drv->pDrvMedia);
2885 AssertRelease (!drv->pDrvMount);
2886
2887 rc = fdConfig (drv, pDevIns, false /*fInit*/);
2888 AssertMsg (rc != VERR_PDM_NO_ATTACHED_DRIVER,
2889 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", iLUN, rc));
2890 if (RT_SUCCESS(rc)) {
2891 fd_revalidate (drv);
2892 }
2893
2894 LogFlow (("floppyAttach: returns %Rrc\n", rc));
2895 return rc;
2896}
2897
2898
2899/**
2900 * @interface_method_impl{PDMDEVREG,pfnDetach}
2901 *
2902 * The floppy drive has been temporarily 'unplugged'.
2903 */
2904static DECLCALLBACK(void) fdcDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2905{
2906 RT_NOREF(fFlags);
2907 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2908 LogFlow (("fdcDetach: iLUN=%u\n", iLUN));
2909
2910 switch (iLUN)
2911 {
2912 case 0:
2913 case 1:
2914 {
2915 fdrive_t *drv = &pThis->drives[iLUN];
2916 drv->pDrvBase = NULL;
2917 drv->pDrvMedia = NULL;
2918 drv->pDrvMount = NULL;
2919 break;
2920 }
2921
2922 default:
2923 AssertMsgFailed(("Cannot detach LUN#%d!\n", iLUN));
2924 break;
2925 }
2926}
2927
2928
2929/**
2930 * @interface_method_impl{PDMDEVREG,pfnReset}
2931 *
2932 * I haven't check the specs on what's supposed to happen on reset, but we
2933 * should get any 'FATAL: floppy recal:f07 ctrl not ready' when resetting
2934 * at wrong time like we do if this was all void.
2935 */
2936static DECLCALLBACK(void) fdcReset(PPDMDEVINS pDevIns)
2937{
2938 fdctrl_t *pThis = PDMDEVINS_2_DATA (pDevIns, fdctrl_t *);
2939 unsigned i;
2940 LogFlow (("fdcReset:\n"));
2941
2942 fdctrl_reset(pThis, 0);
2943
2944 for (i = 0; i < RT_ELEMENTS(pThis->drives); i++)
2945 fd_revalidate(&pThis->drives[i]);
2946}
2947
2948
2949/**
2950 * @interface_method_impl{PDMDEVREG,pfnConstruct}
2951 */
2952static DECLCALLBACK(int) fdcConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
2953{
2954 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
2955 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2956 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2957 int rc;
2958
2959 RT_NOREF(iInstance);
2960 Assert(iInstance == 0);
2961
2962 /*
2963 * Validate configuration.
2964 */
2965 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|DMA|MemMapped|IOBase|StatusA|IRQDelay", "");
2966
2967 /*
2968 * Read the configuration.
2969 */
2970 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "IRQ", &pThis->irq_lvl, 6);
2971 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 IRQ, rc=%Rrc\n", rc), rc);
2972
2973 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "DMA", &pThis->dma_chann, 2);
2974 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 DMA, rc=%Rrc\n", rc), rc);
2975
2976 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IOBase", &pThis->io_base, 0x3f0);
2977 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IOBase, rc=%Rrc\n", rc), rc);
2978
2979 bool fMemMapped;
2980 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "MemMapped", &fMemMapped, false);
2981 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value MemMapped rc=%Rrc\n", rc), rc);
2982
2983 uint16_t uIrqDelay;
2984 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IRQDelay", &uIrqDelay, 0);
2985 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IRQDelay, rc=%Rrc\n", rc), rc);
2986
2987 bool fStatusA;
2988 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "StatusA", &fStatusA, false);
2989 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value fStatusA rc=%Rrc\n", rc), rc);
2990
2991 /*
2992 * Initialize data.
2993 */
2994 LogFlow(("fdcConstruct: irq_lvl=%d dma_chann=%d io_base=%#x\n", pThis->irq_lvl, pThis->dma_chann, pThis->io_base));
2995 pThis->pDevIns = pDevIns;
2996 pThis->version = 0x90; /* Intel 82078 controller */
2997 pThis->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2998 pThis->num_floppies = MAX_FD;
2999 pThis->hIoPorts0 = NIL_IOMMMIOHANDLE;
3000 pThis->hIoPorts1 = NIL_IOMMMIOHANDLE;
3001 pThis->hIoPorts2 = NIL_IOMMMIOHANDLE;
3002
3003 /* Fill 'command_to_handler' lookup table */
3004 for (int ii = RT_ELEMENTS(handlers) - 1; ii >= 0; ii--)
3005 for (unsigned j = 0; j < sizeof(command_to_handler); j++)
3006 if ((j & handlers[ii].mask) == handlers[ii].value)
3007 command_to_handler[j] = ii;
3008
3009 pThis->IBaseStatus.pfnQueryInterface = fdcStatusQueryInterface;
3010 pThis->ILeds.pfnQueryStatusLed = fdcStatusQueryStatusLed;
3011
3012 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); ++i)
3013 {
3014 fdrive_t *pDrv = &pThis->drives[i];
3015
3016 pDrv->drive = FDRIVE_DRV_NONE;
3017 pDrv->iLUN = i;
3018 pDrv->pDevIns = pDevIns;
3019
3020 pDrv->IBase.pfnQueryInterface = fdQueryInterface;
3021 pDrv->IMountNotify.pfnMountNotify = fdMountNotify;
3022 pDrv->IMountNotify.pfnUnmountNotify = fdUnmountNotify;
3023 pDrv->IPort.pfnQueryDeviceLocation = fdQueryDeviceLocation;
3024 pDrv->Led.u32Magic = PDMLED_MAGIC;
3025 }
3026
3027 /*
3028 * Create the FDC timer.
3029 */
3030 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, fdcTimerCallback, pThis,
3031 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3032 "FDC Timer", &pThis->hResultTimer);
3033 AssertRCReturn(rc, rc);
3034
3035 /*
3036 * Create the transfer delay timer.
3037 */
3038 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcTransferDelayTimer, pThis,
3039 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3040 "FDC Transfer Delay", &pThis->hXferDelayTimer);
3041 AssertRCReturn(rc, rc);
3042
3043 /*
3044 * Create the IRQ delay timer.
3045 */
3046 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcIrqDelayTimer, pThis,
3047 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3048 "FDC IRQ Delay", &pThis->hIrqDelayTimer);
3049 AssertRCReturn(rc, rc);
3050
3051 pThis->uIrqDelayMsec = uIrqDelay;
3052
3053 /*
3054 * Register DMA channel.
3055 */
3056 if (pThis->dma_chann != 0xff)
3057 {
3058 rc = PDMDevHlpDMARegister(pDevIns, pThis->dma_chann, &fdctrl_transfer_handler, pThis);
3059 AssertRCReturn(rc, rc);
3060 }
3061
3062 /*
3063 * IO / MMIO.
3064 *
3065 * We must skip I/O port 0x3f6 as it is the ATA alternate status register.
3066 * Why we skip registering status register A, though, isn't as clear.
3067 */
3068 if (!fMemMapped)
3069 {
3070 static const IOMIOPORTDESC s_aDescs[] =
3071 {
3072 { "SRA", NULL, "Status register A", NULL },
3073 { "SRB", NULL, "Status register B", NULL },
3074 { "DOR", "DOR", "Digital output register", "Digital output register"},
3075 { "TDR", "TDR", "Tape driver register", "Tape driver register"},
3076 { "MSR", "DSR", "Main status register", "Datarate select register" },
3077 { "FIFO", "FIFO", "Data FIFO", "Data FIFO" },
3078 { "ATA", "ATA", NULL, NULL },
3079 { "DIR", "CCR", "Digital input register", "Configuration control register"},
3080 { NULL, NULL, NULL, NULL }
3081 };
3082
3083 /* 0x3f0 */
3084 if (fStatusA)
3085 {
3086 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base, 1 /*cPorts*/, fdcIoPort0Write, fdcIoPort0Read,
3087 "FDC-SRA", s_aDescs, &pThis->hIoPorts0);
3088 AssertRCReturn(rc, rc);
3089 }
3090
3091 /* 0x3f1..0x3f5 */
3092 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x1, 5, fdcIoPort1Write, fdcIoPort1Read,
3093 "FDC#1", &s_aDescs[1], &pThis->hIoPorts1);
3094 AssertRCReturn(rc, rc);
3095
3096 /* 0x3f7 */
3097 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x7, 1, fdcIoPort2Write, fdcIoPort2Read,
3098 "FDC#2", &s_aDescs[7], &pThis->hIoPorts2);
3099 AssertRCReturn(rc, rc);
3100 }
3101 else
3102 AssertMsgFailedReturn(("Memory mapped floppy not supported\n"), VERR_NOT_SUPPORTED);
3103
3104 /*
3105 * Register the saved state data unit.
3106 */
3107 rc = PDMDevHlpSSMRegister(pDevIns, FDC_SAVESTATE_CURRENT, sizeof(*pThis), fdcSaveExec, fdcLoadExec);
3108 AssertRCReturn(rc, rc);
3109
3110 /*
3111 * Register the debugger info callback.
3112 */
3113 PDMDevHlpDBGFInfoRegister(pDevIns, "fdc", "FDC info", fdcInfo);
3114
3115 /*
3116 * Attach the status port (optional).
3117 */
3118 PPDMIBASE pBase;
3119 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBaseStatus, &pBase, "Status Port");
3120 if (RT_SUCCESS (rc))
3121 pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
3122 else
3123 AssertMsgReturn(rc == VERR_PDM_NO_ATTACHED_DRIVER, ("Failed to attach to status driver. rc=%Rrc\n", rc), rc);
3124
3125 /*
3126 * Initialize drives.
3127 */
3128 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3129 {
3130 rc = fdConfig(&pThis->drives[i], pDevIns, true /*fInit*/);
3131 AssertMsgReturn(RT_SUCCESS(rc) || rc == VERR_PDM_NO_ATTACHED_DRIVER,
3132 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", i, rc),
3133 rc);
3134 }
3135
3136 fdctrl_reset(pThis, 0);
3137
3138 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3139 fd_revalidate(&pThis->drives[i]);
3140
3141 return VINF_SUCCESS;
3142}
3143
3144
3145/**
3146 * The device registration structure.
3147 */
3148const PDMDEVREG g_DeviceFloppyController =
3149{
3150 /* .u32Version = */ PDM_DEVREG_VERSION,
3151 /* .uReserved0 = */ 0,
3152 /* .szName = */ "i82078",
3153 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_NEW_STYLE,
3154 /* .fClass = */ PDM_DEVREG_CLASS_STORAGE,
3155 /* .cMaxInstances = */ 1,
3156 /* .uSharedVersion = */ 42,
3157 /* .cbInstanceShared = */ sizeof(fdctrl_t),
3158 /* .cbInstanceCC = */ 0,
3159 /* .cbInstanceRC = */ 0,
3160 /* .cMaxPciDevices = */ 0,
3161 /* .cMaxMsixVectors = */ 0,
3162 /* .pszDescription = */ "Floppy drive controller (Intel 82078)",
3163#if defined(IN_RING3)
3164 /* .pszRCMod = */ "",
3165 /* .pszR0Mod = */ "",
3166 /* .pfnConstruct = */ fdcConstruct,
3167 /* .pfnDestruct = */ NULL,
3168 /* .pfnRelocate = */ NULL,
3169 /* .pfnMemSetup = */ NULL,
3170 /* .pfnPowerOn = */ NULL,
3171 /* .pfnReset = */ fdcReset,
3172 /* .pfnSuspend = */ NULL,
3173 /* .pfnResume = */ NULL,
3174 /* .pfnAttach = */ fdcAttach,
3175 /* .pfnDetach = */ fdcDetach,
3176 /* .pfnQueryInterface = */ NULL,
3177 /* .pfnInitComplete = */ NULL,
3178 /* .pfnPowerOff = */ NULL,
3179 /* .pfnSoftReset = */ NULL,
3180 /* .pfnReserved0 = */ NULL,
3181 /* .pfnReserved1 = */ NULL,
3182 /* .pfnReserved2 = */ NULL,
3183 /* .pfnReserved3 = */ NULL,
3184 /* .pfnReserved4 = */ NULL,
3185 /* .pfnReserved5 = */ NULL,
3186 /* .pfnReserved6 = */ NULL,
3187 /* .pfnReserved7 = */ NULL,
3188#elif defined(IN_RING0)
3189 /* .pfnEarlyConstruct = */ NULL,
3190 /* .pfnConstruct = */ NULL,
3191 /* .pfnDestruct = */ NULL,
3192 /* .pfnFinalDestruct = */ NULL,
3193 /* .pfnRequest = */ NULL,
3194 /* .pfnReserved0 = */ NULL,
3195 /* .pfnReserved1 = */ NULL,
3196 /* .pfnReserved2 = */ NULL,
3197 /* .pfnReserved3 = */ NULL,
3198 /* .pfnReserved4 = */ NULL,
3199 /* .pfnReserved5 = */ NULL,
3200 /* .pfnReserved6 = */ NULL,
3201 /* .pfnReserved7 = */ NULL,
3202#elif defined(IN_RC)
3203 /* .pfnConstruct = */ NULL,
3204 /* .pfnReserved0 = */ NULL,
3205 /* .pfnReserved1 = */ NULL,
3206 /* .pfnReserved2 = */ NULL,
3207 /* .pfnReserved3 = */ NULL,
3208 /* .pfnReserved4 = */ NULL,
3209 /* .pfnReserved5 = */ NULL,
3210 /* .pfnReserved6 = */ NULL,
3211 /* .pfnReserved7 = */ NULL,
3212#else
3213# error "Not in IN_RING3, IN_RING0 or IN_RC!"
3214#endif
3215 /* .u32VersionEnd = */ PDM_DEVREG_VERSION
3216};
3217
3218/*
3219 * Local Variables:
3220 * mode: c
3221 * c-file-style: "k&r"
3222 * indent-tabs-mode: nil
3223 * End:
3224 */
3225
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