DevBusLogic.cpp@ 73097

Last change on this file since 73097 was 73097, checked in by vboxsync, 6 years ago
*: Made RT_UOFFSETOF, RT_OFFSETOF, RT_UOFFSETOF_ADD and RT_OFFSETOF_ADD work like builtin_offsetof() and require compile time resolvable requests, adding RT_UOFFSETOF_DYN for the dynamic questions that can only be answered at runtime.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 169.7 KB

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1	/* $Id: DevBusLogic.cpp 73097 2018-07-12 21:06:33Z vboxsync $ */
2	/** @file
3	* VBox storage devices - BusLogic SCSI host adapter BT-958.
4	*
5	* Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual.
6	*/
7
8	/*
9	* Copyright (C) 2006-2017 Oracle Corporation
10	*
11	* This file is part of VirtualBox Open Source Edition (OSE), as
12	* available from http://www.virtualbox.org. This file is free software;
13	* you can redistribute it and/or modify it under the terms of the GNU
14	* General Public License (GPL) as published by the Free Software
15	* Foundation, in version 2 as it comes in the "COPYING" file of the
16	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
17	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
18	*/
19
20
21	/*********************************************************************************************************************************
22	* Header Files *
23	*********************************************************************************************************************************/
24	#define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC
25	#include <VBox/vmm/pdmdev.h>
26	#include <VBox/vmm/pdmstorageifs.h>
27	#include <VBox/vmm/pdmcritsect.h>
28	#include <VBox/scsi.h>
29	#include <iprt/asm.h>
30	#include <iprt/assert.h>
31	#include <iprt/string.h>
32	#include <iprt/log.h>
33	#ifdef IN_RING3
34	# include <iprt/alloc.h>
35	# include <iprt/memcache.h>
36	# include <iprt/param.h>
37	# include <iprt/uuid.h>
38	#endif
39
40	#include "VBoxSCSI.h"
41	#include "VBoxDD.h"
42
43
44	/*********************************************************************************************************************************
45	* Defined Constants And Macros *
46	*********************************************************************************************************************************/
47	/** Maximum number of attached devices the adapter can handle. */
48	#define BUSLOGIC_MAX_DEVICES 16
49
50	/** Maximum number of scatter gather elements this device can handle. */
51	#define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128
52
53	/** Size of the command buffer. */
54	#define BUSLOGIC_COMMAND_SIZE_MAX 53
55
56	/** Size of the reply buffer. */
57	#define BUSLOGIC_REPLY_SIZE_MAX 64
58
59	/** Custom fixed I/O ports for BIOS controller access.
60	* Note that these should not be in the ISA range (below 400h) to avoid
61	* conflicts with ISA device probing. Addresses in the 300h-340h range should be
62	* especially avoided.
63	*/
64	#define BUSLOGIC_BIOS_IO_PORT 0x430
65
66	/** State saved version. */
67	#define BUSLOGIC_SAVED_STATE_MINOR_VERSION 4
68
69	/** Saved state version before the suspend on error feature was implemented. */
70	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
71	/** Saved state version before 24-bit mailbox support was implemented. */
72	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX 2
73	/** Saved state version before command buffer size was raised. */
74	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE 3
75
76	/** Command buffer size in old saved states. */
77	#define BUSLOGIC_COMMAND_SIZE_OLD 5
78
79	/** The duration of software-initiated reset (in nano seconds).
80	* Not documented, set to 50 ms. */
81	#define BUSLOGIC_RESET_DURATION_NS UINT64_C(50000000)
82
83
84	/*********************************************************************************************************************************
85	* Structures and Typedefs *
86	*********************************************************************************************************************************/
87	/**
88	* State of a device attached to the buslogic host adapter.
89	*
90	* @implements PDMIBASE
91	* @implements PDMISCSIPORT
92	* @implements PDMILEDPORTS
93	*/
94	typedef struct BUSLOGICDEVICE
95	{
96	/** Pointer to the owning buslogic device instance. - R3 pointer */
97	R3PTRTYPE(struct BUSLOGIC *) pBusLogicR3;
98	/** Pointer to the owning buslogic device instance. - R0 pointer */
99	R0PTRTYPE(struct BUSLOGIC *) pBusLogicR0;
100	/** Pointer to the owning buslogic device instance. - RC pointer */
101	RCPTRTYPE(struct BUSLOGIC *) pBusLogicRC;
102
103	/** Flag whether device is present. */
104	bool fPresent;
105	/** LUN of the device. */
106	RTUINT iLUN;
107
108	#if HC_ARCH_BITS == 64
109	uint32_t Alignment0;
110	#endif
111
112	/** Our base interface. */
113	PDMIBASE IBase;
114	/** Media port interface. */
115	PDMIMEDIAPORT IMediaPort;
116	/** Extended media port interface. */
117	PDMIMEDIAEXPORT IMediaExPort;
118	/** Led interface. */
119	PDMILEDPORTS ILed;
120	/** Pointer to the attached driver's base interface. */
121	R3PTRTYPE(PPDMIBASE) pDrvBase;
122	/** Pointer to the attached driver's media interface. */
123	R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
124	/** Pointer to the attached driver's extended media interface. */
125	R3PTRTYPE(PPDMIMEDIAEX) pDrvMediaEx;
126	/** The status LED state for this device. */
127	PDMLED Led;
128
129	#if HC_ARCH_BITS == 64
130	uint32_t Alignment1;
131	#endif
132
133	/** Number of outstanding tasks on the port. */
134	volatile uint32_t cOutstandingRequests;
135
136	} BUSLOGICDEVICE, *PBUSLOGICDEVICE;
137
138	/**
139	* Commands the BusLogic adapter supports.
140	*/
141	enum BUSLOGICCOMMAND
142	{
143	BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
144	BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
145	BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
146	BUSLOGICCOMMAND_EXECUTE_BIOS_COMMAND = 0x03,
147	BUSLOGICCOMMAND_INQUIRE_BOARD_ID = 0x04,
148	BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT = 0x05,
149	BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT = 0x06,
150	BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS = 0x07,
151	BUSLOGICCOMMAND_SET_TIME_OFF_BUS = 0x08,
152	BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE = 0x09,
153	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7 = 0x0a,
154	BUSLOGICCOMMAND_INQUIRE_CONFIGURATION = 0x0b,
155	BUSLOGICCOMMAND_ENABLE_TARGET_MODE = 0x0c,
156	BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION = 0x0d,
157	BUSLOGICCOMMAND_WRITE_ADAPTER_LOCAL_RAM = 0x1a,
158	BUSLOGICCOMMAND_READ_ADAPTER_LOCAL_RAM = 0x1b,
159	BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO = 0x1c,
160	BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO = 0x1d,
161	BUSLOGICCOMMAND_ECHO_COMMAND_DATA = 0x1f,
162	BUSLOGICCOMMAND_HOST_ADAPTER_DIAGNOSTIC = 0x20,
163	BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS = 0x21,
164	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15 = 0x23,
165	BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES = 0x24,
166	BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT = 0x25,
167	BUSLOGICCOMMAND_EXT_BIOS_INFO = 0x28,
168	BUSLOGICCOMMAND_UNLOCK_MAILBOX = 0x29,
169	BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX = 0x81,
170	BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND = 0x83,
171	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER = 0x84,
172	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER = 0x85,
173	BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION = 0x86,
174	BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER = 0x8b,
175	BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD = 0x8c,
176	BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION = 0x8d,
177	BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE = 0x8f,
178	BUSLOGICCOMMAND_STORE_HOST_ADAPTER_LOCAL_RAM = 0x90,
179	BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM = 0x91,
180	BUSLOGICCOMMAND_STORE_LOCAL_DATA_IN_EEPROM = 0x92,
181	BUSLOGICCOMMAND_UPLOAD_AUTO_SCSI_CODE = 0x94,
182	BUSLOGICCOMMAND_MODIFY_IO_ADDRESS = 0x95,
183	BUSLOGICCOMMAND_SET_CCB_FORMAT = 0x96,
184	BUSLOGICCOMMAND_WRITE_INQUIRY_BUFFER = 0x9a,
185	BUSLOGICCOMMAND_READ_INQUIRY_BUFFER = 0x9b,
186	BUSLOGICCOMMAND_FLASH_ROM_UPLOAD_DOWNLOAD = 0xa7,
187	BUSLOGICCOMMAND_READ_SCAM_DATA = 0xa8,
188	BUSLOGICCOMMAND_WRITE_SCAM_DATA = 0xa9
189	} BUSLOGICCOMMAND;
190
191	#pragma pack(1)
192	/**
193	* Auto SCSI structure which is located
194	* in host adapter RAM and contains several
195	* configuration parameters.
196	*/
197	typedef struct AutoSCSIRam
198	{
199	uint8_t aInternalSignature[2];
200	uint8_t cbInformation;
201	uint8_t aHostAdaptertype[6];
202	uint8_t uReserved1;
203	bool fFloppyEnabled : 1;
204	bool fFloppySecondary : 1;
205	bool fLevelSensitiveInterrupt : 1;
206	unsigned char uReserved2 : 2;
207	unsigned char uSystemRAMAreForBIOS : 3;
208	unsigned char uDMAChannel : 7;
209	bool fDMAAutoConfiguration : 1;
210	unsigned char uIrqChannel : 7;
211	bool fIrqAutoConfiguration : 1;
212	uint8_t uDMATransferRate;
213	uint8_t uSCSIId;
214	bool fLowByteTerminated : 1;
215	bool fParityCheckingEnabled : 1;
216	bool fHighByteTerminated : 1;
217	bool fNoisyCablingEnvironment : 1;
218	bool fFastSynchronousNeogtiation : 1;
219	bool fBusResetEnabled : 1;
220	bool fReserved3 : 1;
221	bool fActiveNegotiationEnabled : 1;
222	uint8_t uBusOnDelay;
223	uint8_t uBusOffDelay;
224	bool fHostAdapterBIOSEnabled : 1;
225	bool fBIOSRedirectionOfInt19 : 1;
226	bool fExtendedTranslation : 1;
227	bool fMapRemovableAsFixed : 1;
228	bool fReserved4 : 1;
229	bool fBIOSSupportsMoreThan2Drives : 1;
230	bool fBIOSInterruptMode : 1;
231	bool fFlopticalSupport : 1;
232	uint16_t u16DeviceEnabledMask;
233	uint16_t u16WidePermittedMask;
234	uint16_t u16FastPermittedMask;
235	uint16_t u16SynchronousPermittedMask;
236	uint16_t u16DisconnectPermittedMask;
237	uint16_t u16SendStartUnitCommandMask;
238	uint16_t u16IgnoreInBIOSScanMask;
239	unsigned char uPCIInterruptPin : 2;
240	unsigned char uHostAdapterIoPortAddress : 2;
241	bool fStrictRoundRobinMode : 1;
242	bool fVesaBusSpeedGreaterThan33MHz : 1;
243	bool fVesaBurstWrite : 1;
244	bool fVesaBurstRead : 1;
245	uint16_t u16UltraPermittedMask;
246	uint32_t uReserved5;
247	uint8_t uReserved6;
248	uint8_t uAutoSCSIMaximumLUN;
249	bool fReserved7 : 1;
250	bool fSCAMDominant : 1;
251	bool fSCAMenabled : 1;
252	bool fSCAMLevel2 : 1;
253	unsigned char uReserved8 : 4;
254	bool fInt13Extension : 1;
255	bool fReserved9 : 1;
256	bool fCDROMBoot : 1;
257	unsigned char uReserved10 : 5;
258	unsigned char uBootTargetId : 4;
259	unsigned char uBootChannel : 4;
260	bool fForceBusDeviceScanningOrder : 1;
261	unsigned char uReserved11 : 7;
262	uint16_t u16NonTaggedToAlternateLunPermittedMask;
263	uint16_t u16RenegotiateSyncAfterCheckConditionMask;
264	uint8_t aReserved12[10];
265	uint8_t aManufacturingDiagnostic[2];
266	uint16_t u16Checksum;
267	} AutoSCSIRam, *PAutoSCSIRam;
268	AssertCompileSize(AutoSCSIRam, 64);
269	#pragma pack()
270
271	/**
272	* The local Ram.
273	*/
274	typedef union HostAdapterLocalRam
275	{
276	/** Byte view. */
277	uint8_t u8View[256];
278	/** Structured view. */
279	struct
280	{
281	/** Offset 0 - 63 is for BIOS. */
282	uint8_t u8Bios[64];
283	/** Auto SCSI structure. */
284	AutoSCSIRam autoSCSIData;
285	} structured;
286	} HostAdapterLocalRam, *PHostAdapterLocalRam;
287	AssertCompileSize(HostAdapterLocalRam, 256);
288
289
290	/** Ugly 24-bit big-endian addressing. */
291	typedef struct
292	{
293	uint8_t hi;
294	uint8_t mid;
295	uint8_t lo;
296	} Addr24, Len24;
297	AssertCompileSize(Addr24, 3);
298
299	#define ADDR_TO_U32(x) (((x).hi << 16) \| ((x).mid << 8) \| (x).lo)
300	#define LEN_TO_U32 ADDR_TO_U32
301	#define U32_TO_ADDR(a, x) do {(a).hi = (x) >> 16; (a).mid = (x) >> 8; (a).lo = (x);} while(0)
302	#define U32_TO_LEN U32_TO_ADDR
303
304	/** @name Compatible ISA base I/O port addresses. Disabled if zero.
305	* @{ */
306	#define NUM_ISA_BASES 8
307	#define MAX_ISA_BASE (NUM_ISA_BASES - 1)
308	#define ISA_BASE_DISABLED 6
309
310	#ifdef IN_RING3
311	static uint16_t const g_aISABases[NUM_ISA_BASES] =
312	{
313	0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0
314	};
315	#endif
316	/** @} */
317
318	/** Pointer to a task state structure. */
319	typedef struct BUSLOGICREQ *PBUSLOGICREQ;
320
321	/**
322	* Main BusLogic device state.
323	*
324	* @extends PDMPCIDEV
325	* @implements PDMILEDPORTS
326	*/
327	typedef struct BUSLOGIC
328	{
329	/** The PCI device structure. */
330	PDMPCIDEV dev;
331	/** Pointer to the device instance - HC ptr */
332	PPDMDEVINSR3 pDevInsR3;
333	/** Pointer to the device instance - R0 ptr */
334	PPDMDEVINSR0 pDevInsR0;
335	/** Pointer to the device instance - RC ptr. */
336	PPDMDEVINSRC pDevInsRC;
337
338	/** Whether R0 is enabled. */
339	bool fR0Enabled;
340	/** Whether RC is enabled. */
341	bool fGCEnabled;
342
343	/** Base address of the I/O ports. */
344	RTIOPORT IOPortBase;
345	/** Base address of the memory mapping. */
346	RTGCPHYS MMIOBase;
347	/** Status register - Readonly. */
348	volatile uint8_t regStatus;
349	/** Interrupt register - Readonly. */
350	volatile uint8_t regInterrupt;
351	/** Geometry register - Readonly. */
352	volatile uint8_t regGeometry;
353	/** Pending (delayed) interrupt. */
354	uint8_t uPendingIntr;
355
356	/** Local RAM for the fetch hostadapter local RAM request.
357	* I don't know how big the buffer really is but the maximum
358	* seems to be 256 bytes because the offset and count field in the command request
359	* are only one byte big.
360	*/
361	HostAdapterLocalRam LocalRam;
362
363	/** Command code the guest issued. */
364	uint8_t uOperationCode;
365	/** Buffer for the command parameters the adapter is currently receiving from the guest.
366	* Size of the largest command which is possible.
367	*/
368	uint8_t aCommandBuffer[BUSLOGIC_COMMAND_SIZE_MAX]; /* Size of the biggest request. */
369	/** Current position in the command buffer. */
370	uint8_t iParameter;
371	/** Parameters left until the command is complete. */
372	uint8_t cbCommandParametersLeft;
373
374	/** Whether we are using the RAM or reply buffer. */
375	bool fUseLocalRam;
376	/** Buffer to store reply data from the controller to the guest. */
377	uint8_t aReplyBuffer[BUSLOGIC_REPLY_SIZE_MAX]; /* Size of the biggest reply. */
378	/** Position in the buffer we are reading next. */
379	uint8_t iReply;
380	/** Bytes left until the reply buffer is empty. */
381	uint8_t cbReplyParametersLeft;
382
383	/** Flag whether IRQs are enabled. */
384	bool fIRQEnabled;
385	/** Flag whether 24-bit mailboxes are in use (default is 32-bit). */
386	bool fMbxIs24Bit;
387	/** ISA I/O port base (encoded in FW-compatible format). */
388	uint8_t uISABaseCode;
389	uint8_t Alignment00;
390
391	/** ISA I/O port base (disabled if zero). */
392	RTIOPORT IOISABase;
393	/** Default ISA I/O port base in FW-compatible format. */
394	uint8_t uDefaultISABaseCode;
395
396	/** Number of mailboxes the guest set up. */
397	uint32_t cMailbox;
398
399	#if HC_ARCH_BITS == 64
400	uint32_t Alignment0;
401	#endif
402
403	/** Time when HBA reset was last initiated. / /< @todo does this need to be saved? /
404	uint64_t u64ResetTime;
405	/** Physical base address of the outgoing mailboxes. */
406	RTGCPHYS GCPhysAddrMailboxOutgoingBase;
407	/** Current outgoing mailbox position. */
408	uint32_t uMailboxOutgoingPositionCurrent;
409	/** Number of mailboxes ready. */
410	volatile uint32_t cMailboxesReady;
411	/** Whether a notification to R3 was sent. */
412	volatile bool fNotificationSent;
413
414	#if HC_ARCH_BITS == 64
415	uint32_t Alignment1;
416	#endif
417
418	/** Physical base address of the incoming mailboxes. */
419	RTGCPHYS GCPhysAddrMailboxIncomingBase;
420	/** Current incoming mailbox position. */
421	uint32_t uMailboxIncomingPositionCurrent;
422
423	/** Whether strict round robin is enabled. */
424	bool fStrictRoundRobinMode;
425	/** Whether the extended LUN CCB format is enabled for 32 possible logical units. */
426	bool fExtendedLunCCBFormat;
427
428	/** Queue to send tasks to R3. - HC ptr */
429	R3PTRTYPE(PPDMQUEUE) pNotifierQueueR3;
430	/** Queue to send tasks to R3. - HC ptr */
431	R0PTRTYPE(PPDMQUEUE) pNotifierQueueR0;
432	/** Queue to send tasks to R3. - RC ptr */
433	RCPTRTYPE(PPDMQUEUE) pNotifierQueueRC;
434
435	uint32_t Alignment2;
436
437	/** Critical section protecting access to the interrupt status register. */
438	PDMCRITSECT CritSectIntr;
439
440	/** Device state for BIOS access. */
441	VBOXSCSI VBoxSCSI;
442
443	/** BusLogic device states. */
444	BUSLOGICDEVICE aDeviceStates[BUSLOGIC_MAX_DEVICES];
445
446	/** The base interface.
447	* @todo use PDMDEVINS::IBase */
448	PDMIBASE IBase;
449	/** Status Port - Leds interface. */
450	PDMILEDPORTS ILeds;
451	/** Partner of ILeds. */
452	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
453	/** Status LUN: Media Notifys. */
454	R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
455
456	#if HC_ARCH_BITS == 64
457	uint32_t Alignment3;
458	#endif
459
460	/** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
461	* a port is entering the idle state. */
462	bool volatile fSignalIdle;
463	/** Flag whether the worker thread is sleeping. */
464	volatile bool fWrkThreadSleeping;
465	/** Flag whether a request from the BIOS is pending which the
466	* worker thread needs to process. */
467	volatile bool fBiosReqPending;
468
469	/** The support driver session handle. */
470	R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
471	/** Worker thread. */
472	R3PTRTYPE(PPDMTHREAD) pThreadWrk;
473	/** The event semaphore the processing thread waits on. */
474	SUPSEMEVENT hEvtProcess;
475
476	/** Pointer to the array of addresses to redo. */
477	R3PTRTYPE(PRTGCPHYS) paGCPhysAddrCCBRedo;
478	/** Number of addresses the redo array holds. */
479	uint32_t cReqsRedo;
480
481	#ifdef LOG_ENABLED
482	volatile uint32_t cInMailboxesReady;
483	#else
484	# if HC_ARCH_BITS == 64
485	uint32_t Alignment4;
486	# endif
487	#endif
488
489	} BUSLOGIC, *PBUSLOGIC;
490
491	/** Register offsets in the I/O port space. */
492	#define BUSLOGIC_REGISTER_CONTROL 0 /*< Writeonly /
493	/** Fields for the control register. */
494	# define BL_CTRL_RSBUS RT_BIT(4) /* Reset SCSI Bus. */
495	# define BL_CTRL_RINT RT_BIT(5) /* Reset Interrupt. */
496	# define BL_CTRL_RSOFT RT_BIT(6) /* Soft Reset. */
497	# define BL_CTRL_RHARD RT_BIT(7) /* Hard Reset. */
498
499	#define BUSLOGIC_REGISTER_STATUS 0 /*< Readonly /
500	/** Fields for the status register. */
501	# define BL_STAT_CMDINV RT_BIT(0) /* Command Invalid. */
502	# define BL_STAT_DIRRDY RT_BIT(2) /* Data In Register Ready. */
503	# define BL_STAT_CPRBSY RT_BIT(3) /* Command/Parameter Out Register Busy. */
504	# define BL_STAT_HARDY RT_BIT(4) /* Host Adapter Ready. */
505	# define BL_STAT_INREQ RT_BIT(5) /* Initialization Required. */
506	# define BL_STAT_DFAIL RT_BIT(6) /* Diagnostic Failure. */
507	# define BL_STAT_DACT RT_BIT(7) /* Diagnistic Active. */
508
509	#define BUSLOGIC_REGISTER_COMMAND 1 /*< Writeonly /
510	#define BUSLOGIC_REGISTER_DATAIN 1 /*< Readonly /
511	#define BUSLOGIC_REGISTER_INTERRUPT 2 /*< Readonly /
512	/** Fields for the interrupt register. */
513	# define BL_INTR_IMBL RT_BIT(0) /* Incoming Mailbox Loaded. */
514	# define BL_INTR_OMBR RT_BIT(1) /* Outgoing Mailbox Available. */
515	# define BL_INTR_CMDC RT_BIT(2) /* Command Complete. */
516	# define BL_INTR_RSTS RT_BIT(3) /* SCSI Bus Reset State. */
517	# define BL_INTR_INTV RT_BIT(7) /* Interrupt Valid. */
518
519	#define BUSLOGIC_REGISTER_GEOMETRY 3 /* Readonly */
520	# define BL_GEOM_XLATEN RT_BIT(7) /* Extended geometry translation enabled. */
521
522	/** Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
523	typedef struct ReplyInquirePCIHostAdapterInformation
524	{
525	uint8_t IsaIOPort;
526	uint8_t IRQ;
527	unsigned char LowByteTerminated : 1;
528	unsigned char HighByteTerminated : 1;
529	unsigned char uReserved : 2; /* Reserved. */
530	unsigned char JP1 : 1; /* Whatever that means. */
531	unsigned char JP2 : 1; /* Whatever that means. */
532	unsigned char JP3 : 1; /* Whatever that means. */
533	/** Whether the provided info is valid. */
534	unsigned char InformationIsValid: 1;
535	uint8_t uReserved2; /* Reserved. */
536	} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
537	AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
538
539	/** Structure for the INQUIRE_CONFIGURATION reply. */
540	typedef struct ReplyInquireConfiguration
541	{
542	unsigned char uReserved1 : 5;
543	bool fDmaChannel5 : 1;
544	bool fDmaChannel6 : 1;
545	bool fDmaChannel7 : 1;
546	bool fIrqChannel9 : 1;
547	bool fIrqChannel10 : 1;
548	bool fIrqChannel11 : 1;
549	bool fIrqChannel12 : 1;
550	unsigned char uReserved2 : 1;
551	bool fIrqChannel14 : 1;
552	bool fIrqChannel15 : 1;
553	unsigned char uReserved3 : 1;
554	unsigned char uHostAdapterId : 4;
555	unsigned char uReserved4 : 4;
556	} ReplyInquireConfiguration, *PReplyInquireConfiguration;
557	AssertCompileSize(ReplyInquireConfiguration, 3);
558
559	/** Structure for the INQUIRE_SETUP_INFORMATION reply. */
560	typedef struct ReplyInquireSetupInformationSynchronousValue
561	{
562	unsigned char uOffset : 4;
563	unsigned char uTransferPeriod : 3;
564	bool fSynchronous : 1;
565	}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
566	AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
567
568	typedef struct ReplyInquireSetupInformation
569	{
570	bool fSynchronousInitiationEnabled : 1;
571	bool fParityCheckingEnabled : 1;
572	unsigned char uReserved1 : 6;
573	uint8_t uBusTransferRate;
574	uint8_t uPreemptTimeOnBus;
575	uint8_t uTimeOffBus;
576	uint8_t cMailbox;
577	Addr24 MailboxAddress;
578	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8];
579	uint8_t uDisconnectPermittedId0To7;
580	uint8_t uSignature;
581	uint8_t uCharacterD;
582	uint8_t uHostBusType;
583	uint8_t uWideTransferPermittedId0To7;
584	uint8_t uWideTransfersActiveId0To7;
585	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8];
586	uint8_t uDisconnectPermittedId8To15;
587	uint8_t uReserved2;
588	uint8_t uWideTransferPermittedId8To15;
589	uint8_t uWideTransfersActiveId8To15;
590	} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
591	AssertCompileSize(ReplyInquireSetupInformation, 34);
592
593	/** Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
594	#pragma pack(1)
595	typedef struct ReplyInquireExtendedSetupInformation
596	{
597	uint8_t uBusType;
598	uint8_t uBiosAddress;
599	uint16_t u16ScatterGatherLimit;
600	uint8_t cMailbox;
601	uint32_t uMailboxAddressBase;
602	unsigned char uReserved1 : 2;
603	bool fFastEISA : 1;
604	unsigned char uReserved2 : 3;
605	bool fLevelSensitiveInterrupt : 1;
606	unsigned char uReserved3 : 1;
607	unsigned char aFirmwareRevision[3];
608	bool fHostWideSCSI : 1;
609	bool fHostDifferentialSCSI : 1;
610	bool fHostSupportsSCAM : 1;
611	bool fHostUltraSCSI : 1;
612	bool fHostSmartTermination : 1;
613	unsigned char uReserved4 : 3;
614	} ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation;
615	AssertCompileSize(ReplyInquireExtendedSetupInformation, 14);
616	#pragma pack()
617
618	/** Structure for the INITIALIZE EXTENDED MAILBOX request. */
619	#pragma pack(1)
620	typedef struct RequestInitializeExtendedMailbox
621	{
622	/** Number of mailboxes in guest memory. */
623	uint8_t cMailbox;
624	/** Physical address of the first mailbox. */
625	uint32_t uMailboxBaseAddress;
626	} RequestInitializeExtendedMailbox, *PRequestInitializeExtendedMailbox;
627	AssertCompileSize(RequestInitializeExtendedMailbox, 5);
628	#pragma pack()
629
630	/** Structure for the INITIALIZE MAILBOX request. */
631	typedef struct
632	{
633	/** Number of mailboxes to set up. */
634	uint8_t cMailbox;
635	/** Physical address of the first mailbox. */
636	Addr24 aMailboxBaseAddr;
637	} RequestInitMbx, *PRequestInitMbx;
638	AssertCompileSize(RequestInitMbx, 4);
639
640	/**
641	* Structure of a mailbox in guest memory.
642	* The incoming and outgoing mailbox have the same size
643	* but the incoming one has some more fields defined which
644	* are marked as reserved in the outgoing one.
645	* The last field is also different from the type.
646	* For outgoing mailboxes it is the action and
647	* for incoming ones the completion status code for the task.
648	* We use one structure for both types.
649	*/
650	typedef struct Mailbox32
651	{
652	/** Physical address of the CCB structure in the guest memory. */
653	uint32_t u32PhysAddrCCB;
654	/** Type specific data. */
655	union
656	{
657	/** For outgoing mailboxes. */
658	struct
659	{
660	/** Reserved */
661	uint8_t uReserved[3];
662	/** Action code. */
663	uint8_t uActionCode;
664	} out;
665	/** For incoming mailboxes. */
666	struct
667	{
668	/** The host adapter status after finishing the request. */
669	uint8_t uHostAdapterStatus;
670	/** The status of the device which executed the request after executing it. */
671	uint8_t uTargetDeviceStatus;
672	/** Reserved. */
673	uint8_t uReserved;
674	/** The completion status code of the request. */
675	uint8_t uCompletionCode;
676	} in;
677	} u;
678	} Mailbox32, *PMailbox32;
679	AssertCompileSize(Mailbox32, 8);
680
681	/** Old style 24-bit mailbox entry. */
682	typedef struct Mailbox24
683	{
684	/** Mailbox command (incoming) or state (outgoing). */
685	uint8_t uCmdState;
686	/** Physical address of the CCB structure in the guest memory. */
687	Addr24 aPhysAddrCCB;
688	} Mailbox24, *PMailbox24;
689	AssertCompileSize(Mailbox24, 4);
690
691	/**
692	* Action codes for outgoing mailboxes.
693	*/
694	enum BUSLOGIC_MAILBOX_OUTGOING_ACTION
695	{
696	BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE = 0x00,
697	BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND = 0x01,
698	BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND = 0x02
699	};
700
701	/**
702	* Completion codes for incoming mailboxes.
703	*/
704	enum BUSLOGIC_MAILBOX_INCOMING_COMPLETION
705	{
706	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE = 0x00,
707	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR = 0x01,
708	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED = 0x02,
709	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND = 0x03,
710	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR = 0x04,
711	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_INVALID_CCB = 0x05
712	};
713
714	/**
715	* Host adapter status for incoming mailboxes.
716	*/
717	enum BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS
718	{
719	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED = 0x00,
720	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED = 0x0a,
721	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED_WITH_FLAG = 0x0b,
722	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_UNDERUN = 0x0c,
723	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT = 0x11,
724	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_OVERRUN = 0x12,
725	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNEXPECTED_BUS_FREE = 0x13,
726	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_BUS_PHASE_REQUESTED = 0x14,
727	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_OUTGOING_MAILBOX_ACTION_CODE = 0x15,
728	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_OPERATION_CODE = 0x16,
729	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CCB_HAS_INVALID_LUN = 0x17,
730	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER = 0x1a,
731	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_AUTO_REQUEST_SENSE_FAILED = 0x1b,
732	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TAGGED_QUEUING_MESSAGE_REJECTED = 0x1c,
733	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNSUPPORTED_MESSAGE_RECEIVED = 0x1d,
734	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_FAILED = 0x20,
735	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_FAILED_RESPONSE_TO_ATN = 0x21,
736	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_RST = 0x22,
737	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_OTHER_DEVICE_ASSERTED_RST = 0x23,
738	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_DEVICE_RECONNECTED_IMPROPERLY = 0x24,
739	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_BUS_DEVICE_RESET = 0x25,
740	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED = 0x26,
741	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_SOFTWARE_ERROR = 0x27,
742	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_TIMEOUT_ERROR = 0x30,
743	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_PARITY_ERROR_DETECTED = 0x34
744	};
745
746	/**
747	* Device status codes for incoming mailboxes.
748	*/
749	enum BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS
750	{
751	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD = 0x00,
752	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION = 0x02,
753	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_DEVICE_BUSY = 0x08
754	};
755
756	/**
757	* Opcode types for CCB.
758	*/
759	enum BUSLOGIC_CCB_OPCODE
760	{
761	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB = 0x00,
762	BUSLOGIC_CCB_OPCODE_TARGET_CCB = 0x01,
763	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER = 0x02,
764	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH = 0x03,
765	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER = 0x04,
766	BUSLOGIC_CCB_OPCODE_BUS_DEVICE_RESET = 0x81
767	};
768
769	/**
770	* Data transfer direction.
771	*/
772	enum BUSLOGIC_CCB_DIRECTION
773	{
774	BUSLOGIC_CCB_DIRECTION_UNKNOWN = 0x00,
775	BUSLOGIC_CCB_DIRECTION_IN = 0x01,
776	BUSLOGIC_CCB_DIRECTION_OUT = 0x02,
777	BUSLOGIC_CCB_DIRECTION_NO_DATA = 0x03
778	};
779
780	/**
781	* The command control block for a SCSI request.
782	*/
783	typedef struct CCB32
784	{
785	/** Opcode. */
786	uint8_t uOpcode;
787	/** Reserved */
788	unsigned char uReserved1 : 3;
789	/** Data direction for the request. */
790	unsigned char uDataDirection : 2;
791	/** Whether the request is tag queued. */
792	bool fTagQueued : 1;
793	/** Queue tag mode. */
794	unsigned char uQueueTag : 2;
795	/** Length of the SCSI CDB. */
796	uint8_t cbCDB;
797	/** Sense data length. */
798	uint8_t cbSenseData;
799	/** Data length. */
800	uint32_t cbData;
801	/** Data pointer.
802	* This points to the data region or a scatter gather list based on the opcode.
803	*/
804	uint32_t u32PhysAddrData;
805	/** Reserved. */
806	uint8_t uReserved2[2];
807	/** Host adapter status. */
808	uint8_t uHostAdapterStatus;
809	/** Device adapter status. */
810	uint8_t uDeviceStatus;
811	/** The device the request is sent to. */
812	uint8_t uTargetId;
813	/*The LUN in the device. /
814	unsigned char uLogicalUnit : 5;
815	/** Legacy tag. */
816	bool fLegacyTagEnable : 1;
817	/** Legacy queue tag. */
818	unsigned char uLegacyQueueTag : 2;
819	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
820	uint8_t abCDB[12];
821	/** Reserved. */
822	uint8_t uReserved3[6];
823	/** Sense data pointer. */
824	uint32_t u32PhysAddrSenseData;
825	} CCB32, *PCCB32;
826	AssertCompileSize(CCB32, 40);
827
828
829	/**
830	* The 24-bit command control block.
831	*/
832	typedef struct CCB24
833	{
834	/** Opcode. */
835	uint8_t uOpcode;
836	/** The LUN in the device. */
837	unsigned char uLogicalUnit : 3;
838	/** Data direction for the request. */
839	unsigned char uDataDirection : 2;
840	/** The target device ID. */
841	unsigned char uTargetId : 3;
842	/** Length of the SCSI CDB. */
843	uint8_t cbCDB;
844	/** Sense data length. */
845	uint8_t cbSenseData;
846	/** Data length. */
847	Len24 acbData;
848	/** Data pointer.
849	* This points to the data region or a scatter gather list based on the opc
850	*/
851	Addr24 aPhysAddrData;
852	/** Pointer to next CCB for linked commands. */
853	Addr24 aPhysAddrLink;
854	/** Command linking identifier. */
855	uint8_t uLinkId;
856	/** Host adapter status. */
857	uint8_t uHostAdapterStatus;
858	/** Device adapter status. */
859	uint8_t uDeviceStatus;
860	/** Two unused bytes. */
861	uint8_t aReserved[2];
862	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
863	uint8_t abCDB[12];
864	} CCB24, *PCCB24;
865	AssertCompileSize(CCB24, 30);
866
867	/**
868	* The common 24-bit/32-bit command control block. The 32-bit CCB is laid out
869	* such that many fields are in the same location as in the older 24-bit CCB.
870	*/
871	typedef struct CCBC
872	{
873	/** Opcode. */
874	uint8_t uOpcode;
875	/** The LUN in the device. */
876	unsigned char uPad1 : 3;
877	/** Data direction for the request. */
878	unsigned char uDataDirection : 2;
879	/** The target device ID. */
880	unsigned char uPad2 : 3;
881	/** Length of the SCSI CDB. */
882	uint8_t cbCDB;
883	/** Sense data length. */
884	uint8_t cbSenseData;
885	uint8_t aPad1[10];
886	/** Host adapter status. */
887	uint8_t uHostAdapterStatus;
888	/** Device adapter status. */
889	uint8_t uDeviceStatus;
890	uint8_t aPad2[2];
891	/** The SCSI CDB (up to 12 bytes). */
892	uint8_t abCDB[12];
893	} CCBC, *PCCBC;
894	AssertCompileSize(CCBC, 30);
895
896	/* Make sure that the 24-bit/32-bit/common CCB offsets match. */
897	AssertCompileMemberOffset(CCBC, cbCDB, 2);
898	AssertCompileMemberOffset(CCB24, cbCDB, 2);
899	AssertCompileMemberOffset(CCB32, cbCDB, 2);
900	AssertCompileMemberOffset(CCBC, uHostAdapterStatus, 14);
901	AssertCompileMemberOffset(CCB24, uHostAdapterStatus, 14);
902	AssertCompileMemberOffset(CCB32, uHostAdapterStatus, 14);
903	AssertCompileMemberOffset(CCBC, abCDB, 18);
904	AssertCompileMemberOffset(CCB24, abCDB, 18);
905	AssertCompileMemberOffset(CCB32, abCDB, 18);
906
907	/** A union of all CCB types (24-bit/32-bit/common). */
908	typedef union CCBU
909	{
910	CCB32 n; /*< New 32-bit CCB. /
911	CCB24 o; /*< Old 24-bit CCB. /
912	CCBC c; /*< Common CCB subset. /
913	} CCBU, *PCCBU;
914
915	/** 32-bit scatter-gather list entry. */
916	typedef struct SGE32
917	{
918	uint32_t cbSegment;
919	uint32_t u32PhysAddrSegmentBase;
920	} SGE32, *PSGE32;
921	AssertCompileSize(SGE32, 8);
922
923	/** 24-bit scatter-gather list entry. */
924	typedef struct SGE24
925	{
926	Len24 acbSegment;
927	Addr24 aPhysAddrSegmentBase;
928	} SGE24, *PSGE24;
929	AssertCompileSize(SGE24, 6);
930
931	/**
932	* The structure for the "Execute SCSI Command" command.
933	*/
934	typedef struct ESCMD
935	{
936	/** Data length. */
937	uint32_t cbData;
938	/** Data pointer. */
939	uint32_t u32PhysAddrData;
940	/** The device the request is sent to. */
941	uint8_t uTargetId;
942	/** The LUN in the device. */
943	uint8_t uLogicalUnit;
944	/** Reserved */
945	unsigned char uReserved1 : 3;
946	/** Data direction for the request. */
947	unsigned char uDataDirection : 2;
948	/** Reserved */
949	unsigned char uReserved2 : 3;
950	/** Length of the SCSI CDB. */
951	uint8_t cbCDB;
952	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
953	uint8_t abCDB[12];
954	} ESCMD, *PESCMD;
955	AssertCompileSize(ESCMD, 24);
956
957	/**
958	* Task state for a CCB request.
959	*/
960	typedef struct BUSLOGICREQ
961	{
962	/** PDM extended media interface I/O request hande. */
963	PDMMEDIAEXIOREQ hIoReq;
964	/** Device this task is assigned to. */
965	PBUSLOGICDEVICE pTargetDevice;
966	/** The command control block from the guest. */
967	CCBU CCBGuest;
968	/** Guest physical address of th CCB. */
969	RTGCPHYS GCPhysAddrCCB;
970	/** Pointer to the R3 sense buffer. */
971	uint8_t *pbSenseBuffer;
972	/** Flag whether this is a request from the BIOS. */
973	bool fBIOS;
974	/** 24-bit request flag (default is 32-bit). */
975	bool fIs24Bit;
976	/** SCSI status code. */
977	uint8_t u8ScsiSts;
978	} BUSLOGICREQ;
979
980	#ifdef IN_RING3
981	/**
982	* Memory buffer callback.
983	*
984	* @returns nothing.
985	* @param pThis The LsiLogic controller instance.
986	* @param GCPhys The guest physical address of the memory buffer.
987	* @param pSgBuf The pointer to the host R3 S/G buffer.
988	* @param cbCopy How many bytes to copy between the two buffers.
989	* @param pcbSkip Initially contains the amount of bytes to skip
990	* starting from the guest physical address before
991	* accessing the S/G buffer and start copying data.
992	* On return this contains the remaining amount if
993	* cbCopy < *pcbSkip or 0 otherwise.
994	*/
995	typedef DECLCALLBACK(void) BUSLOGICR3MEMCOPYCALLBACK(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf, size_t cbCopy,
996	size_t *pcbSkip);
997	/** Pointer to a memory copy buffer callback. */
998	typedef BUSLOGICR3MEMCOPYCALLBACK *PBUSLOGICR3MEMCOPYCALLBACK;
999	#endif
1000
1001	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
1002
1003
1004	/*********************************************************************************************************************************
1005	* Internal Functions *
1006	*********************************************************************************************************************************/
1007	#ifdef IN_RING3
1008	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode);
1009	#endif
1010
1011
1012	/**
1013	* Assert IRQ line of the BusLogic adapter.
1014	*
1015	* @returns nothing.
1016	* @param pBusLogic Pointer to the BusLogic device instance.
1017	* @param fSuppressIrq Flag to suppress IRQ generation regardless of fIRQEnabled
1018	* @param uIrqType Type of interrupt being generated.
1019	*/
1020	static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
1021	{
1022	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1023
1024	/* The CMDC interrupt has priority over IMBL and OMBR. */
1025	if (uIrqType & (BL_INTR_IMBL \| BL_INTR_OMBR))
1026	{
1027	if (!(pBusLogic->regInterrupt & BL_INTR_CMDC))
1028	pBusLogic->regInterrupt \|= uIrqType; /* Report now. */
1029	else
1030	pBusLogic->uPendingIntr \|= uIrqType; /* Report later. */
1031	}
1032	else if (uIrqType & BL_INTR_CMDC)
1033	{
1034	AssertMsg(pBusLogic->regInterrupt == 0 \|\| pBusLogic->regInterrupt == (BL_INTR_INTV \| BL_INTR_CMDC),
1035	("regInterrupt=%02X\n", pBusLogic->regInterrupt));
1036	pBusLogic->regInterrupt \|= uIrqType;
1037	}
1038	else
1039	AssertMsgFailed(("Invalid interrupt state!\n"));
1040
1041	pBusLogic->regInterrupt \|= BL_INTR_INTV;
1042	if (pBusLogic->fIRQEnabled && !fSuppressIrq)
1043	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
1044	}
1045
1046	/**
1047	* Deasserts the interrupt line of the BusLogic adapter.
1048	*
1049	* @returns nothing.
1050	* @param pBusLogic Pointer to the BusLogic device instance.
1051	*/
1052	static void buslogicClearInterrupt(PBUSLOGIC pBusLogic)
1053	{
1054	LogFlowFunc(("pBusLogic=%#p, clearing %#02x (pending %#02x)\n",
1055	pBusLogic, pBusLogic->regInterrupt, pBusLogic->uPendingIntr));
1056	pBusLogic->regInterrupt = 0;
1057	pBusLogic->regStatus &= ~BL_STAT_CMDINV;
1058	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
1059	/* If there's another pending interrupt, report it now. */
1060	if (pBusLogic->uPendingIntr)
1061	{
1062	buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
1063	pBusLogic->uPendingIntr = 0;
1064	}
1065	}
1066
1067	#if defined(IN_RING3)
1068
1069	/**
1070	* Advances the mailbox pointer to the next slot.
1071	*
1072	* @returns nothing.
1073	* @param pBusLogic The BusLogic controller instance.
1074	*/
1075	DECLINLINE(void) buslogicR3OutgoingMailboxAdvance(PBUSLOGIC pBusLogic)
1076	{
1077	pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox;
1078	}
1079
1080	/**
1081	* Initialize local RAM of host adapter with default values.
1082	*
1083	* @returns nothing.
1084	* @param pBusLogic The BusLogic controller instance.
1085	*/
1086	static void buslogicR3InitializeLocalRam(PBUSLOGIC pBusLogic)
1087	{
1088	/*
1089	* These values are mostly from what I think is right
1090	* looking at the dmesg output from a Linux guest inside
1091	* a VMware server VM.
1092	*
1093	* So they don't have to be right :)
1094	*/
1095	memset(pBusLogic->LocalRam.u8View, 0, sizeof(HostAdapterLocalRam));
1096	pBusLogic->LocalRam.structured.autoSCSIData.fLevelSensitiveInterrupt = true;
1097	pBusLogic->LocalRam.structured.autoSCSIData.fParityCheckingEnabled = true;
1098	pBusLogic->LocalRam.structured.autoSCSIData.fExtendedTranslation = true; /* Same as in geometry register. */
1099	pBusLogic->LocalRam.structured.autoSCSIData.u16DeviceEnabledMask = UINT16_MAX; /* All enabled. Maybe mask out non present devices? */
1100	pBusLogic->LocalRam.structured.autoSCSIData.u16WidePermittedMask = UINT16_MAX;
1101	pBusLogic->LocalRam.structured.autoSCSIData.u16FastPermittedMask = UINT16_MAX;
1102	pBusLogic->LocalRam.structured.autoSCSIData.u16SynchronousPermittedMask = UINT16_MAX;
1103	pBusLogic->LocalRam.structured.autoSCSIData.u16DisconnectPermittedMask = UINT16_MAX;
1104	pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode;
1105	pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = UINT16_MAX;
1106	/** @todo calculate checksum? */
1107	}
1108
1109	/**
1110	* Do a hardware reset of the buslogic adapter.
1111	*
1112	* @returns VBox status code.
1113	* @param pBusLogic Pointer to the BusLogic device instance.
1114	* @param fResetIO Flag determining whether ISA I/O should be reset.
1115	*/
1116	static int buslogicR3HwReset(PBUSLOGIC pBusLogic, bool fResetIO)
1117	{
1118	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1119
1120	/* Reset registers to default values. */
1121	pBusLogic->regStatus = BL_STAT_HARDY \| BL_STAT_INREQ;
1122	pBusLogic->regGeometry = BL_GEOM_XLATEN;
1123	pBusLogic->uOperationCode = 0xff; /* No command executing. */
1124	pBusLogic->iParameter = 0;
1125	pBusLogic->cbCommandParametersLeft = 0;
1126	pBusLogic->fIRQEnabled = true;
1127	pBusLogic->fStrictRoundRobinMode = false;
1128	pBusLogic->fExtendedLunCCBFormat = false;
1129	pBusLogic->uMailboxOutgoingPositionCurrent = 0;
1130	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1131
1132	/* Clear any active/pending interrupts. */
1133	pBusLogic->uPendingIntr = 0;
1134	buslogicClearInterrupt(pBusLogic);
1135
1136	/* Guest-initiated HBA reset does not affect ISA port I/O. */
1137	if (fResetIO)
1138	{
1139	buslogicR3RegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);
1140	}
1141	buslogicR3InitializeLocalRam(pBusLogic);
1142	vboxscsiInitialize(&pBusLogic->VBoxSCSI);
1143
1144	return VINF_SUCCESS;
1145	}
1146
1147	#endif /* IN_RING3 */
1148
1149	/**
1150	* Resets the command state machine for the next command and notifies the guest.
1151	*
1152	* @returns nothing.
1153	* @param pBusLogic Pointer to the BusLogic device instance
1154	* @param fSuppressIrq Flag to suppress IRQ generation regardless of current state
1155	*/
1156	static void buslogicCommandComplete(PBUSLOGIC pBusLogic, bool fSuppressIrq)
1157	{
1158	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1159	Assert(pBusLogic->uOperationCode != BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND);
1160
1161	pBusLogic->fUseLocalRam = false;
1162	pBusLogic->regStatus \|= BL_STAT_HARDY;
1163	pBusLogic->iReply = 0;
1164
1165	/* The Enable OMBR command does not set CMDC when successful. */
1166	if (pBusLogic->uOperationCode != BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT)
1167	{
1168	/* Notify that the command is complete. */
1169	pBusLogic->regStatus &= ~BL_STAT_DIRRDY;
1170	buslogicSetInterrupt(pBusLogic, fSuppressIrq, BL_INTR_CMDC);
1171	}
1172
1173	pBusLogic->uOperationCode = 0xff;
1174	pBusLogic->iParameter = 0;
1175	}
1176
1177	#if defined(IN_RING3)
1178
1179	/**
1180	* Initiates a hard reset which was issued from the guest.
1181	*
1182	* @returns nothing
1183	* @param pBusLogic Pointer to the BusLogic device instance.
1184	* @param fHardReset Flag initiating a hard (vs. soft) reset.
1185	*/
1186	static void buslogicR3InitiateReset(PBUSLOGIC pBusLogic, bool fHardReset)
1187	{
1188	LogFlowFunc(("pBusLogic=%#p fHardReset=%d\n", pBusLogic, fHardReset));
1189
1190	buslogicR3HwReset(pBusLogic, false);
1191
1192	if (fHardReset)
1193	{
1194	/* Set the diagnostic active bit in the status register and clear the ready state. */
1195	pBusLogic->regStatus \|= BL_STAT_DACT;
1196	pBusLogic->regStatus &= ~BL_STAT_HARDY;
1197
1198	/* Remember when the guest initiated a reset (after we're done resetting). */
1199	pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
1200	}
1201	}
1202
1203	/**
1204	* Send a mailbox with set status codes to the guest.
1205	*
1206	* @returns nothing.
1207	* @param pBusLogic Pointer to the BusLogic device instance.
1208	* @param GCPhysAddrCCB The physical guest address of the CCB the mailbox is for.
1209	* @param pCCBGuest The command control block.
1210	* @param uHostAdapterStatus The host adapter status code to set.
1211	* @param uDeviceStatus The target device status to set.
1212	* @param uMailboxCompletionCode Completion status code to set in the mailbox.
1213	*/
1214	static void buslogicR3SendIncomingMailbox(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB,
1215	PCCBU pCCBGuest, uint8_t uHostAdapterStatus,
1216	uint8_t uDeviceStatus, uint8_t uMailboxCompletionCode)
1217	{
1218	Mailbox32 MbxIn;
1219
1220	MbxIn.u32PhysAddrCCB = (uint32_t)GCPhysAddrCCB;
1221	MbxIn.u.in.uHostAdapterStatus = uHostAdapterStatus;
1222	MbxIn.u.in.uTargetDeviceStatus = uDeviceStatus;
1223	MbxIn.u.in.uCompletionCode = uMailboxCompletionCode;
1224
1225	int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS);
1226	AssertRC(rc);
1227
1228	RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase
1229	+ ( pBusLogic->uMailboxIncomingPositionCurrent
1230	* (pBusLogic->fMbxIs24Bit ? sizeof(Mailbox24) : sizeof(Mailbox32)) );
1231
1232	if (uMailboxCompletionCode != BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND)
1233	{
1234	LogFlowFunc(("Completing CCB %RGp hstat=%u, dstat=%u, outgoing mailbox at %RGp\n", GCPhysAddrCCB,
1235	uHostAdapterStatus, uDeviceStatus, GCPhysAddrMailboxIncoming));
1236
1237	/* Update CCB. */
1238	pCCBGuest->c.uHostAdapterStatus = uHostAdapterStatus;
1239	pCCBGuest->c.uDeviceStatus = uDeviceStatus;
1240	/* Rewrite CCB up to the CDB; perhaps more than necessary. */
1241	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
1242	pCCBGuest, RT_UOFFSETOF(CCBC, abCDB));
1243	}
1244
1245	# ifdef RT_STRICT
1246	uint8_t uCode;
1247	unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
1248	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming + uCodeOffs, &uCode, sizeof(uCode));
1249	Assert(uCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE);
1250	# endif
1251
1252	/* Update mailbox. */
1253	if (pBusLogic->fMbxIs24Bit)
1254	{
1255	Mailbox24 Mbx24;
1256
1257	Mbx24.uCmdState = MbxIn.u.in.uCompletionCode;
1258	U32_TO_ADDR(Mbx24.aPhysAddrCCB, MbxIn.u32PhysAddrCCB);
1259	Log(("24-bit mailbox: completion code=%u, CCB at %RGp\n", Mbx24.uCmdState, (RTGCPHYS)ADDR_TO_U32(Mbx24.aPhysAddrCCB)));
1260	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &Mbx24, sizeof(Mailbox24));
1261	}
1262	else
1263	{
1264	Log(("32-bit mailbox: completion code=%u, CCB at %RGp\n", MbxIn.u.in.uCompletionCode, GCPhysAddrCCB));
1265	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming,
1266	&MbxIn, sizeof(Mailbox32));
1267	}
1268
1269	/* Advance to next mailbox position. */
1270	pBusLogic->uMailboxIncomingPositionCurrent++;
1271	if (pBusLogic->uMailboxIncomingPositionCurrent >= pBusLogic->cMailbox)
1272	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1273
1274	# ifdef LOG_ENABLED
1275	ASMAtomicIncU32(&pBusLogic->cInMailboxesReady);
1276	# endif
1277
1278	buslogicSetInterrupt(pBusLogic, false, BL_INTR_IMBL);
1279
1280	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1281	}
1282
1283	# ifdef LOG_ENABLED
1284
1285	/**
1286	* Dumps the content of a mailbox for debugging purposes.
1287	*
1288	* @return nothing
1289	* @param pMailbox The mailbox to dump.
1290	* @param fOutgoing true if dumping the outgoing state.
1291	* false if dumping the incoming state.
1292	*/
1293	static void buslogicR3DumpMailboxInfo(PMailbox32 pMailbox, bool fOutgoing)
1294	{
1295	Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming"));
1296	Log(("%s: u32PhysAddrCCB=%#x\n", __FUNCTION__, pMailbox->u32PhysAddrCCB));
1297	if (fOutgoing)
1298	{
1299	Log(("%s: uActionCode=%u\n", __FUNCTION__, pMailbox->u.out.uActionCode));
1300	}
1301	else
1302	{
1303	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pMailbox->u.in.uHostAdapterStatus));
1304	Log(("%s: uTargetDeviceStatus=%u\n", __FUNCTION__, pMailbox->u.in.uTargetDeviceStatus));
1305	Log(("%s: uCompletionCode=%u\n", __FUNCTION__, pMailbox->u.in.uCompletionCode));
1306	}
1307	}
1308
1309	/**
1310	* Dumps the content of a command control block for debugging purposes.
1311	*
1312	* @returns nothing.
1313	* @param pCCB Pointer to the command control block to dump.
1314	* @param fIs24BitCCB Flag to determine CCB format.
1315	*/
1316	static void buslogicR3DumpCCBInfo(PCCBU pCCB, bool fIs24BitCCB)
1317	{
1318	Log(("%s: Dump for %s Command Control Block:\n", __FUNCTION__, fIs24BitCCB ? "24-bit" : "32-bit"));
1319	Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->c.uOpcode));
1320	Log(("%s: uDataDirection=%u\n", __FUNCTION__, pCCB->c.uDataDirection));
1321	Log(("%s: cbCDB=%u\n", __FUNCTION__, pCCB->c.cbCDB));
1322	Log(("%s: cbSenseData=%u\n", __FUNCTION__, pCCB->c.cbSenseData));
1323	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pCCB->c.uHostAdapterStatus));
1324	Log(("%s: uDeviceStatus=%u\n", __FUNCTION__, pCCB->c.uDeviceStatus));
1325	if (fIs24BitCCB)
1326	{
1327	Log(("%s: cbData=%u\n", __FUNCTION__, LEN_TO_U32(pCCB->o.acbData)));
1328	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, ADDR_TO_U32(pCCB->o.aPhysAddrData)));
1329	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->o.uTargetId));
1330	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->o.uLogicalUnit));
1331	}
1332	else
1333	{
1334	Log(("%s: cbData=%u\n", __FUNCTION__, pCCB->n.cbData));
1335	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrData));
1336	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->n.uTargetId));
1337	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->n.uLogicalUnit));
1338	Log(("%s: fTagQueued=%d\n", __FUNCTION__, pCCB->n.fTagQueued));
1339	Log(("%s: uQueueTag=%u\n", __FUNCTION__, pCCB->n.uQueueTag));
1340	Log(("%s: fLegacyTagEnable=%u\n", __FUNCTION__, pCCB->n.fLegacyTagEnable));
1341	Log(("%s: uLegacyQueueTag=%u\n", __FUNCTION__, pCCB->n.uLegacyQueueTag));
1342	Log(("%s: PhysAddrSenseData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrSenseData));
1343	}
1344	Log(("%s: uCDB[0]=%#x\n", __FUNCTION__, pCCB->c.abCDB[0]));
1345	for (int i = 1; i < pCCB->c.cbCDB; i++)
1346	Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->c.abCDB[i]));
1347	}
1348
1349	# endif /* LOG_ENABLED */
1350
1351	/**
1352	* Allocate data buffer.
1353	*
1354	* @param pDevIns PDM device instance.
1355	* @param fIs24Bit Flag whether the 24bit SG format is used.
1356	* @param GCSGList Guest physical address of S/G list.
1357	* @param cEntries Number of list entries to read.
1358	* @param pSGEList Pointer to 32-bit S/G list storage.
1359	*/
1360	static void buslogicR3ReadSGEntries(PPDMDEVINS pDevIns, bool fIs24Bit, RTGCPHYS GCSGList,
1361	uint32_t cEntries, SGE32 *pSGEList)
1362	{
1363	/* Read the S/G entries. Convert 24-bit entries to 32-bit format. */
1364	if (fIs24Bit)
1365	{
1366	SGE24 aSGE24[32];
1367	Assert(cEntries <= RT_ELEMENTS(aSGE24));
1368
1369	Log2(("Converting %u 24-bit S/G entries to 32-bit\n", cEntries));
1370	PDMDevHlpPhysRead(pDevIns, GCSGList, &aSGE24, cEntries * sizeof(SGE24));
1371	for (uint32_t i = 0; i < cEntries; ++i)
1372	{
1373	pSGEList[i].cbSegment = LEN_TO_U32(aSGE24[i].acbSegment);
1374	pSGEList[i].u32PhysAddrSegmentBase = ADDR_TO_U32(aSGE24[i].aPhysAddrSegmentBase);
1375	}
1376	}
1377	else
1378	PDMDevHlpPhysRead(pDevIns, GCSGList, pSGEList, cEntries * sizeof(SGE32));
1379	}
1380
1381	/**
1382	* Determines the size of th guest data buffer.
1383	*
1384	* @returns VBox status code.
1385	* @param pDevIns PDM device instance.
1386	* @param pCCBGuest The CCB of the guest.
1387	* @param fIs24Bit Flag whether the 24bit SG format is used.
1388	* @param pcbBuf Where to store the size of the guest data buffer on success.
1389	*/
1390	static int buslogicR3QueryDataBufferSize(PPDMDEVINS pDevIns, PCCBU pCCBGuest, bool fIs24Bit, size_t *pcbBuf)
1391	{
1392	int rc = VINF_SUCCESS;
1393	uint32_t cbDataCCB;
1394	uint32_t u32PhysAddrCCB;
1395	size_t cbBuf = 0;
1396
1397	/* Extract the data length and physical address from the CCB. */
1398	if (fIs24Bit)
1399	{
1400	u32PhysAddrCCB = ADDR_TO_U32(pCCBGuest->o.aPhysAddrData);
1401	cbDataCCB = LEN_TO_U32(pCCBGuest->o.acbData);
1402	}
1403	else
1404	{
1405	u32PhysAddrCCB = pCCBGuest->n.u32PhysAddrData;
1406	cbDataCCB = pCCBGuest->n.cbData;
1407	}
1408
1409	#if 1
1410	/* Hack for NT 10/91: A CCB describes a 2K buffer, but TEST UNIT READY is executed. This command
1411	* returns no data, hence the buffer must be left alone!
1412	*/
1413	if (pCCBGuest->c.abCDB[0] == 0)
1414	cbDataCCB = 0;
1415	#endif
1416
1417	if ( (pCCBGuest->c.uDataDirection != BUSLOGIC_CCB_DIRECTION_NO_DATA)
1418	&& cbDataCCB)
1419	{
1420	/*
1421	* The BusLogic adapter can handle two different data buffer formats.
1422	* The first one is that the data pointer entry in the CCB points to
1423	* the buffer directly. In second mode the data pointer points to a
1424	* scatter gather list which describes the buffer.
1425	*/
1426	if ( (pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1427	\|\| (pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1428	{
1429	uint32_t cScatterGatherGCRead;
1430	uint32_t iScatterGatherEntry;
1431	SGE32 aScatterGatherReadGC[32]; /* A buffer for scatter gather list entries read from guest memory. */
1432	uint32_t cScatterGatherGCLeft = cbDataCCB / (fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1433	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1434
1435	/* Count number of bytes to transfer. */
1436	do
1437	{
1438	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1439	? cScatterGatherGCLeft
1440	: RT_ELEMENTS(aScatterGatherReadGC);
1441	cScatterGatherGCLeft -= cScatterGatherGCRead;
1442
1443	buslogicR3ReadSGEntries(pDevIns, fIs24Bit, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1444
1445	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1446	cbBuf += aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1447
1448	/* Set address to the next entries to read. */
1449	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * (fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1450	} while (cScatterGatherGCLeft > 0);
1451
1452	Log(("%s: cbBuf=%d\n", __FUNCTION__, cbBuf));
1453	}
1454	else if ( pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1455	\|\| pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1456	cbBuf = cbDataCCB;
1457	}
1458
1459	if (RT_SUCCESS(rc))
1460	*pcbBuf = cbBuf;
1461
1462	return rc;
1463	}
1464
1465	/**
1466	* Copy from guest to host memory worker.
1467	*
1468	* @copydoc BUSLOGICR3MEMCOPYCALLBACK
1469	*/
1470	static DECLCALLBACK(void) buslogicR3CopyBufferFromGuestWorker(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
1471	size_t cbCopy, size_t *pcbSkip)
1472	{
1473	size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
1474	cbCopy -= cbSkipped;
1475	GCPhys += cbSkipped;
1476	*pcbSkip -= cbSkipped;
1477
1478	while (cbCopy)
1479	{
1480	size_t cbSeg = cbCopy;
1481	void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
1482
1483	AssertPtr(pvSeg);
1484	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
1485	GCPhys += cbSeg;
1486	cbCopy -= cbSeg;
1487	}
1488	}
1489
1490	/**
1491	* Copy from host to guest memory worker.
1492	*
1493	* @copydoc BUSLOGICR3MEMCOPYCALLBACK
1494	*/
1495	static DECLCALLBACK(void) buslogicR3CopyBufferToGuestWorker(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
1496	size_t cbCopy, size_t *pcbSkip)
1497	{
1498	size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
1499	cbCopy -= cbSkipped;
1500	GCPhys += cbSkipped;
1501	*pcbSkip -= cbSkipped;
1502
1503	while (cbCopy)
1504	{
1505	size_t cbSeg = cbCopy;
1506	void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
1507
1508	AssertPtr(pvSeg);
1509	PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
1510	GCPhys += cbSeg;
1511	cbCopy -= cbSeg;
1512	}
1513	}
1514
1515	/**
1516	* Walks the guest S/G buffer calling the given copy worker for every buffer.
1517	*
1518	* @returns The amout of bytes actually copied.
1519	* @param pThis Pointer to the Buslogic device state.
1520	* @param pReq Pointe to the request state.
1521	* @param pfnCopyWorker The copy method to apply for each guest buffer.
1522	* @param pSgBuf The host S/G buffer.
1523	* @param cbSkip How many bytes to skip in advance before starting to copy.
1524	* @param cbCopy How many bytes to copy.
1525	*/
1526	static size_t buslogicR3SgBufWalker(PBUSLOGIC pThis, PBUSLOGICREQ pReq,
1527	PBUSLOGICR3MEMCOPYCALLBACK pfnCopyWorker,
1528	PRTSGBUF pSgBuf, size_t cbSkip, size_t cbCopy)
1529	{
1530	PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
1531	uint32_t cbDataCCB;
1532	uint32_t u32PhysAddrCCB;
1533	size_t cbCopied = 0;
1534
1535	/*
1536	* Add the amount to skip to the host buffer size to avoid a
1537	* few conditionals later on.
1538	*/
1539	cbCopy += cbSkip;
1540
1541	/* Extract the data length and physical address from the CCB. */
1542	if (pReq->fIs24Bit)
1543	{
1544	u32PhysAddrCCB = ADDR_TO_U32(pReq->CCBGuest.o.aPhysAddrData);
1545	cbDataCCB = LEN_TO_U32(pReq->CCBGuest.o.acbData);
1546	}
1547	else
1548	{
1549	u32PhysAddrCCB = pReq->CCBGuest.n.u32PhysAddrData;
1550	cbDataCCB = pReq->CCBGuest.n.cbData;
1551	}
1552
1553	#if 1
1554	/* Hack for NT 10/91: A CCB describes a 2K buffer, but TEST UNIT READY is executed. This command
1555	* returns no data, hence the buffer must be left alone!
1556	*/
1557	if (pReq->CCBGuest.c.abCDB[0] == 0)
1558	cbDataCCB = 0;
1559	#endif
1560
1561	LogFlowFunc(("pReq=%#p cbDataCCB=%u direction=%u cbCopy=%zu\n", pReq, cbDataCCB,
1562	pReq->CCBGuest.c.uDataDirection, cbCopy));
1563
1564	if ( (cbDataCCB > 0)
1565	&& ( pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN
1566	\|\| pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT
1567	\|\| pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN))
1568	{
1569	if ( (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1570	\|\| (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1571	{
1572	uint32_t cScatterGatherGCRead;
1573	uint32_t iScatterGatherEntry;
1574	SGE32 aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1575	uint32_t cScatterGatherGCLeft = cbDataCCB / (pReq->fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1576	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1577
1578	do
1579	{
1580	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1581	? cScatterGatherGCLeft
1582	: RT_ELEMENTS(aScatterGatherReadGC);
1583	cScatterGatherGCLeft -= cScatterGatherGCRead;
1584
1585	buslogicR3ReadSGEntries(pDevIns, pReq->fIs24Bit, GCPhysAddrScatterGatherCurrent,
1586	cScatterGatherGCRead, aScatterGatherReadGC);
1587
1588	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead && cbCopy > 0; iScatterGatherEntry++)
1589	{
1590	RTGCPHYS GCPhysAddrDataBase;
1591	size_t cbCopyThis;
1592
1593	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1594
1595	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1596	cbCopyThis = RT_MIN(cbCopy, aScatterGatherReadGC[iScatterGatherEntry].cbSegment);
1597
1598	Log(("%s: GCPhysAddrDataBase=%RGp cbCopyThis=%zu\n", __FUNCTION__, GCPhysAddrDataBase, cbCopyThis));
1599
1600	pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, cbCopyThis, &cbSkip);
1601	cbCopied += cbCopyThis;
1602	cbCopy -= cbCopyThis;
1603	}
1604
1605	/* Set address to the next entries to read. */
1606	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * (pReq->fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1607	} while ( cScatterGatherGCLeft > 0
1608	&& cbCopy > 0);
1609
1610	}
1611	else if ( pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1612	\|\| pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1613	{
1614	/* The buffer is not scattered. */
1615	RTGCPHYS GCPhysAddrDataBase = u32PhysAddrCCB;
1616
1617	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1618
1619	Log(("Non-scattered buffer:\n"));
1620	Log(("u32PhysAddrData=%#x\n", u32PhysAddrCCB));
1621	Log(("cbData=%u\n", cbDataCCB));
1622	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1623
1624	/* Copy the data into the guest memory. */
1625	pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, RT_MIN(cbDataCCB, cbCopy), &cbSkip);
1626	cbCopied += RT_MIN(cbDataCCB, cbCopy);
1627	}
1628	}
1629
1630	return cbCopied - RT_MIN(cbSkip, cbCopied);
1631	}
1632
1633	/**
1634	* Copies a data buffer into the S/G buffer set up by the guest.
1635	*
1636	* @returns Amount of bytes copied to the guest.
1637	* @param pThis The LsiLogic controller device instance.
1638	* @param pReq Request structure.
1639	* @param pSgBuf The S/G buffer to copy from.
1640	* @param cbSkip How many bytes to skip in advance before starting to copy.
1641	* @param cbCopy How many bytes to copy.
1642	*/
1643	static size_t buslogicR3CopySgBufToGuest(PBUSLOGIC pThis, PBUSLOGICREQ pReq, PRTSGBUF pSgBuf,
1644	size_t cbSkip, size_t cbCopy)
1645	{
1646	return buslogicR3SgBufWalker(pThis, pReq, buslogicR3CopyBufferToGuestWorker,
1647	pSgBuf, cbSkip, cbCopy);
1648	}
1649
1650	/**
1651	* Copies the guest S/G buffer into a host data buffer.
1652	*
1653	* @returns Amount of bytes copied from the guest.
1654	* @param pThis The LsiLogic controller device instance.
1655	* @param pReq Request structure.
1656	* @param pSgBuf The S/G buffer to copy into.
1657	* @param cbSkip How many bytes to skip in advance before starting to copy.
1658	* @param cbCopy How many bytes to copy.
1659	*/
1660	static size_t buslogicR3CopySgBufFromGuest(PBUSLOGIC pThis, PBUSLOGICREQ pReq, PRTSGBUF pSgBuf,
1661	size_t cbSkip, size_t cbCopy)
1662	{
1663	return buslogicR3SgBufWalker(pThis, pReq, buslogicR3CopyBufferFromGuestWorker,
1664	pSgBuf, cbSkip, cbCopy);
1665	}
1666
1667	/** Convert sense buffer length taking into account shortcut values. */
1668	static uint32_t buslogicR3ConvertSenseBufferLength(uint32_t cbSense)
1669	{
1670	/* Convert special sense buffer length values. */
1671	if (cbSense == 0)
1672	cbSense = 14; /* 0 means standard 14-byte buffer. */
1673	else if (cbSense == 1)
1674	cbSense = 0; /* 1 means no sense data. */
1675	else if (cbSense < 8)
1676	AssertMsgFailed(("Reserved cbSense value of %d used!\n", cbSense));
1677
1678	return cbSense;
1679	}
1680
1681	/**
1682	* Free the sense buffer.
1683	*
1684	* @returns nothing.
1685	* @param pReq Pointer to the request state.
1686	* @param fCopy If sense data should be copied to guest memory.
1687	*/
1688	static void buslogicR3SenseBufferFree(PBUSLOGICREQ pReq, bool fCopy)
1689	{
1690	uint32_t cbSenseBuffer;
1691
1692	cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pReq->CCBGuest.c.cbSenseData);
1693
1694	/* Copy the sense buffer into guest memory if requested. */
1695	if (fCopy && cbSenseBuffer)
1696	{
1697	PPDMDEVINS pDevIns = pReq->pTargetDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1698	RTGCPHYS GCPhysAddrSenseBuffer;
1699
1700	/* With 32-bit CCBs, the (optional) sense buffer physical address is provided separately.
1701	* On the other hand, with 24-bit CCBs, the sense buffer is simply located at the end of
1702	* the CCB, right after the variable-length CDB.
1703	*/
1704	if (pReq->fIs24Bit)
1705	{
1706	GCPhysAddrSenseBuffer = pReq->GCPhysAddrCCB;
1707	GCPhysAddrSenseBuffer += pReq->CCBGuest.c.cbCDB + RT_OFFSETOF(CCB24, abCDB);
1708	}
1709	else
1710	GCPhysAddrSenseBuffer = pReq->CCBGuest.n.u32PhysAddrSenseData;
1711
1712	Log3(("%s: sense buffer: %.*Rhxs\n", __FUNCTION__, cbSenseBuffer, pReq->pbSenseBuffer));
1713	PDMDevHlpPCIPhysWrite(pDevIns, GCPhysAddrSenseBuffer, pReq->pbSenseBuffer, cbSenseBuffer);
1714	}
1715
1716	RTMemFree(pReq->pbSenseBuffer);
1717	pReq->pbSenseBuffer = NULL;
1718	}
1719
1720	/**
1721	* Alloc the sense buffer.
1722	*
1723	* @returns VBox status code.
1724	* @param pReq Pointer to the task state.
1725	*/
1726	static int buslogicR3SenseBufferAlloc(PBUSLOGICREQ pReq)
1727	{
1728	pReq->pbSenseBuffer = NULL;
1729
1730	uint32_t cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pReq->CCBGuest.c.cbSenseData);
1731	if (cbSenseBuffer)
1732	{
1733	pReq->pbSenseBuffer = (uint8_t *)RTMemAllocZ(cbSenseBuffer);
1734	if (!pReq->pbSenseBuffer)
1735	return VERR_NO_MEMORY;
1736	}
1737
1738	return VINF_SUCCESS;
1739	}
1740
1741	#endif /* IN_RING3 */
1742
1743	/**
1744	* Parses the command buffer and executes it.
1745	*
1746	* @returns VBox status code.
1747	* @param pBusLogic Pointer to the BusLogic device instance.
1748	*/
1749	static int buslogicProcessCommand(PBUSLOGIC pBusLogic)
1750	{
1751	int rc = VINF_SUCCESS;
1752	bool fSuppressIrq = false;
1753
1754	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1755	AssertMsg(pBusLogic->uOperationCode != 0xff, ("There is no command to execute\n"));
1756
1757	switch (pBusLogic->uOperationCode)
1758	{
1759	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1760	/* Valid command, no reply. */
1761	pBusLogic->cbReplyParametersLeft = 0;
1762	break;
1763	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1764	{
1765	PReplyInquirePCIHostAdapterInformation pReply = (PReplyInquirePCIHostAdapterInformation)pBusLogic->aReplyBuffer;
1766	memset(pReply, 0, sizeof(ReplyInquirePCIHostAdapterInformation));
1767
1768	/* It seems VMware does not provide valid information here too, lets do the same :) */
1769	pReply->InformationIsValid = 0;
1770	pReply->IsaIOPort = pBusLogic->uISABaseCode;
1771	pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
1772	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
1773	break;
1774	}
1775	case BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT:
1776	{
1777	/* no-op */
1778	pBusLogic->cbReplyParametersLeft = 0;
1779	break;
1780	}
1781	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1782	{
1783	/* Modify the ISA-compatible I/O port base. Note that this technically
1784	* violates the PCI spec, as this address is not reported through PCI.
1785	* However, it is required for compatibility with old drivers.
1786	*/
1787	#ifdef IN_RING3
1788	Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0]));
1789	buslogicR3RegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);
1790	pBusLogic->cbReplyParametersLeft = 0;
1791	fSuppressIrq = true;
1792	break;
1793	#else
1794	AssertMsgFailed(("Must never get here!\n"));
1795	break;
1796	#endif
1797	}
1798	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1799	{
1800	/* The special option byte is important: If it is '0' or 'B', Windows NT drivers
1801	* for Adaptec AHA-154x may claim the adapter. The BusLogic drivers will claim
1802	* the adapter only when the byte is not '0' or 'B'.
1803	*/
1804	pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1805	pBusLogic->aReplyBuffer[1] = 'A'; /* Special option byte */
1806
1807	/* We report version 5.07B. This reply will provide the first two digits. */
1808	pBusLogic->aReplyBuffer[2] = '5'; /* Major version 5 */
1809	pBusLogic->aReplyBuffer[3] = '0'; /* Minor version 0 */
1810	pBusLogic->cbReplyParametersLeft = 4; /* Reply is 4 bytes long */
1811	break;
1812	}
1813	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1814	{
1815	pBusLogic->aReplyBuffer[0] = '7';
1816	pBusLogic->cbReplyParametersLeft = 1;
1817	break;
1818	}
1819	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1820	{
1821	pBusLogic->aReplyBuffer[0] = 'B';
1822	pBusLogic->cbReplyParametersLeft = 1;
1823	break;
1824	}
1825	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1826	/* The parameter list length is determined by the first byte of the command buffer. */
1827	if (pBusLogic->iParameter == 1)
1828	{
1829	/* First pass - set the number of following parameter bytes. */
1830	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
1831	Log(("Set HA options: %u bytes follow\n", pBusLogic->cbCommandParametersLeft));
1832	}
1833	else
1834	{
1835	/* Second pass - process received data. */
1836	Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1837	/* We ignore the data - it only concerns the SCSI hardware protocol. */
1838	}
1839	pBusLogic->cbReplyParametersLeft = 0;
1840	break;
1841
1842	case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
1843	/* The parameter list length is at least 12 bytes; the 12th byte determines
1844	* the number of additional CDB bytes that will follow.
1845	*/
1846	if (pBusLogic->iParameter == 12)
1847	{
1848	/* First pass - set the number of following CDB bytes. */
1849	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[11];
1850	Log(("Execute SCSI cmd: %u more bytes follow\n", pBusLogic->cbCommandParametersLeft));
1851	}
1852	else
1853	{
1854	PESCMD pCmd;
1855
1856	/* Second pass - process received data. */
1857	Log(("Execute SCSI cmd: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1858
1859	pCmd = (PESCMD)pBusLogic->aCommandBuffer;
1860	Log(("Addr %08X, cbData %08X, cbCDB=%u\n", pCmd->u32PhysAddrData, pCmd->cbData, pCmd->cbCDB));
1861	}
1862	// This is currently a dummy - just fails every command.
1863	pBusLogic->cbReplyParametersLeft = 4;
1864	pBusLogic->aReplyBuffer[0] = pBusLogic->aReplyBuffer[1] = 0;
1865	pBusLogic->aReplyBuffer[2] = 0x11; /* HBA status (timeout). */
1866	pBusLogic->aReplyBuffer[3] = 0; /* Device status. */
1867	break;
1868
1869	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1870	{
1871	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1872	if (pBusLogic->aCommandBuffer[0] > sizeof(pBusLogic->aReplyBuffer))
1873	{
1874	Log(("Requested too much adapter model number data (%u)!\n", pBusLogic->aCommandBuffer[0]));
1875	pBusLogic->regStatus \|= BL_STAT_CMDINV;
1876	break;
1877	}
1878	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1879	memset(pBusLogic->aReplyBuffer, 0, sizeof(pBusLogic->aReplyBuffer));
1880	const char aModelName[] = "958D "; /* Trailing \0 is fine, that's the filler anyway. */
1881	int cCharsToTransfer = pBusLogic->cbReplyParametersLeft <= sizeof(aModelName)
1882	? pBusLogic->cbReplyParametersLeft
1883	: sizeof(aModelName);
1884
1885	for (int i = 0; i < cCharsToTransfer; i++)
1886	pBusLogic->aReplyBuffer[i] = aModelName[i];
1887
1888	break;
1889	}
1890	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1891	{
1892	uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
1893
1894	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
1895	PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
1896	memset(pReply, 0, sizeof(ReplyInquireConfiguration));
1897
1898	pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
1899	pReply->fDmaChannel6 = 1; /* DMA channel 6 is a good default. */
1900	/* The PCI IRQ is not necessarily representable in this structure.
1901	* If that is the case, the guest likely won't function correctly,
1902	* therefore we log a warning.
1903	*/
1904	switch (uPciIrq)
1905	{
1906	case 9: pReply->fIrqChannel9 = 1; break;
1907	case 10: pReply->fIrqChannel10 = 1; break;
1908	case 11: pReply->fIrqChannel11 = 1; break;
1909	case 12: pReply->fIrqChannel12 = 1; break;
1910	case 14: pReply->fIrqChannel14 = 1; break;
1911	case 15: pReply->fIrqChannel15 = 1; break;
1912	default:
1913	LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq));
1914	break;
1915	}
1916	break;
1917	}
1918	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1919	{
1920	/* Some Adaptec AHA-154x drivers (e.g. OS/2) execute this command and expect
1921	* it to fail. If it succeeds, the drivers refuse to load. However, some newer
1922	* Adaptec 154x models supposedly support it too??
1923	*/
1924
1925	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1926	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1927	PReplyInquireExtendedSetupInformation pReply = (PReplyInquireExtendedSetupInformation)pBusLogic->aReplyBuffer;
1928	memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation));
1929
1930	/** @todo should this reflect the RAM contents (AutoSCSIRam)? */
1931	pReply->uBusType = 'E'; /* EISA style */
1932	pReply->u16ScatterGatherLimit = 8192;
1933	pReply->cMailbox = pBusLogic->cMailbox;
1934	pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
1935	pReply->fLevelSensitiveInterrupt = true;
1936	pReply->fHostWideSCSI = true;
1937	pReply->fHostUltraSCSI = true;
1938	memcpy(pReply->aFirmwareRevision, "07B", sizeof(pReply->aFirmwareRevision));
1939
1940	break;
1941	}
1942	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1943	{
1944	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1945	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1946	PReplyInquireSetupInformation pReply = (PReplyInquireSetupInformation)pBusLogic->aReplyBuffer;
1947	memset(pReply, 0, sizeof(ReplyInquireSetupInformation));
1948	pReply->fSynchronousInitiationEnabled = true;
1949	pReply->fParityCheckingEnabled = true;
1950	pReply->cMailbox = pBusLogic->cMailbox;
1951	U32_TO_ADDR(pReply->MailboxAddress, pBusLogic->GCPhysAddrMailboxOutgoingBase);
1952	pReply->uSignature = 'B';
1953	/* The 'D' signature prevents Adaptec's OS/2 drivers from getting too
1954	* friendly with BusLogic hardware and upsetting the HBA state.
1955	*/
1956	pReply->uCharacterD = 'D'; /* BusLogic model. */
1957	pReply->uHostBusType = 'F'; /* PCI bus. */
1958	break;
1959	}
1960	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1961	{
1962	/*
1963	* First element in the command buffer contains start offset to read from
1964	* and second one the number of bytes to read.
1965	*/
1966	uint8_t uOffset = pBusLogic->aCommandBuffer[0];
1967	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[1];
1968
1969	pBusLogic->fUseLocalRam = true;
1970	pBusLogic->iReply = uOffset;
1971	break;
1972	}
1973	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
1974	{
1975	PRequestInitMbx pRequest = (PRequestInitMbx)pBusLogic->aCommandBuffer;
1976
1977	pBusLogic->cbReplyParametersLeft = 0;
1978	if (!pRequest->cMailbox)
1979	{
1980	Log(("cMailboxes=%u (24-bit mode), fail!\n", pBusLogic->cMailbox));
1981	pBusLogic->regStatus \|= BL_STAT_CMDINV;
1982	break;
1983	}
1984	pBusLogic->fMbxIs24Bit = true;
1985	pBusLogic->cMailbox = pRequest->cMailbox;
1986	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)ADDR_TO_U32(pRequest->aMailboxBaseAddr);
1987	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1988	pBusLogic->GCPhysAddrMailboxIncomingBase = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->cMailbox * sizeof(Mailbox24));
1989
1990	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1991	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1992	Log(("cMailboxes=%u (24-bit mode)\n", pBusLogic->cMailbox));
1993	LogRel(("Initialized 24-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, ADDR_TO_U32(pRequest->aMailboxBaseAddr)));
1994
1995	pBusLogic->regStatus &= ~BL_STAT_INREQ;
1996	break;
1997	}
1998	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1999	{
2000	PRequestInitializeExtendedMailbox pRequest = (PRequestInitializeExtendedMailbox)pBusLogic->aCommandBuffer;
2001
2002	pBusLogic->cbReplyParametersLeft = 0;
2003	if (!pRequest->cMailbox)
2004	{
2005	Log(("cMailboxes=%u (32-bit mode), fail!\n", pBusLogic->cMailbox));
2006	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2007	break;
2008	}
2009	pBusLogic->fMbxIs24Bit = false;
2010	pBusLogic->cMailbox = pRequest->cMailbox;
2011	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress;
2012	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
2013	pBusLogic->GCPhysAddrMailboxIncomingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress + (pBusLogic->cMailbox * sizeof(Mailbox32));
2014
2015	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
2016	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
2017	Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
2018	LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
2019
2020	pBusLogic->regStatus &= ~BL_STAT_INREQ;
2021	break;
2022	}
2023	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2024	{
2025	if (pBusLogic->aCommandBuffer[0] == 0)
2026	pBusLogic->fStrictRoundRobinMode = false;
2027	else if (pBusLogic->aCommandBuffer[0] == 1)
2028	pBusLogic->fStrictRoundRobinMode = true;
2029	else
2030	AssertMsgFailed(("Invalid round robin mode %d\n", pBusLogic->aCommandBuffer[0]));
2031
2032	pBusLogic->cbReplyParametersLeft = 0;
2033	break;
2034	}
2035	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2036	{
2037	if (pBusLogic->aCommandBuffer[0] == 0)
2038	pBusLogic->fExtendedLunCCBFormat = false;
2039	else if (pBusLogic->aCommandBuffer[0] == 1)
2040	pBusLogic->fExtendedLunCCBFormat = true;
2041	else
2042	AssertMsgFailed(("Invalid CCB format %d\n", pBusLogic->aCommandBuffer[0]));
2043
2044	pBusLogic->cbReplyParametersLeft = 0;
2045	break;
2046	}
2047	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2048	/* This is supposed to send TEST UNIT READY to each target/LUN.
2049	* We cheat and skip that, since we already know what's attached
2050	*/
2051	memset(pBusLogic->aReplyBuffer, 0, 8);
2052	for (int i = 0; i < 8; ++i)
2053	{
2054	if (pBusLogic->aDeviceStates[i].fPresent)
2055	pBusLogic->aReplyBuffer[i] = 1;
2056	}
2057	pBusLogic->aReplyBuffer[7] = 0; /* HA hardcoded at ID 7. */
2058	pBusLogic->cbReplyParametersLeft = 8;
2059	break;
2060	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2061	/* See note about cheating above. */
2062	memset(pBusLogic->aReplyBuffer, 0, 8);
2063	for (int i = 0; i < 8; ++i)
2064	{
2065	if (pBusLogic->aDeviceStates[i + 8].fPresent)
2066	pBusLogic->aReplyBuffer[i] = 1;
2067	}
2068	pBusLogic->cbReplyParametersLeft = 8;
2069	break;
2070	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2071	{
2072	/* Each bit which is set in the 16bit wide variable means a present device. */
2073	uint16_t u16TargetsPresentMask = 0;
2074
2075	for (uint8_t i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2076	{
2077	if (pBusLogic->aDeviceStates[i].fPresent)
2078	u16TargetsPresentMask \|= (1 << i);
2079	}
2080	pBusLogic->aReplyBuffer[0] = (uint8_t)u16TargetsPresentMask;
2081	pBusLogic->aReplyBuffer[1] = (uint8_t)(u16TargetsPresentMask >> 8);
2082	pBusLogic->cbReplyParametersLeft = 2;
2083	break;
2084	}
2085	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2086	{
2087	if (pBusLogic->aCommandBuffer[0] > sizeof(pBusLogic->aReplyBuffer))
2088	{
2089	Log(("Requested too much synch period inquiry (%u)!\n", pBusLogic->aCommandBuffer[0]));
2090	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2091	break;
2092	}
2093	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
2094	for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++)
2095	pBusLogic->aReplyBuffer[i] = 0; /** @todo Figure if we need something other here. It's not needed for the linux driver */
2096
2097	break;
2098	}
2099	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2100	{
2101	pBusLogic->cbReplyParametersLeft = 0;
2102	if (pBusLogic->aCommandBuffer[0] == 0)
2103	pBusLogic->fIRQEnabled = false;
2104	else
2105	pBusLogic->fIRQEnabled = true;
2106	/* No interrupt signaled regardless of enable/disable. */
2107	fSuppressIrq = true;
2108	break;
2109	}
2110	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2111	{
2112	pBusLogic->aReplyBuffer[0] = pBusLogic->aCommandBuffer[0];
2113	pBusLogic->cbReplyParametersLeft = 1;
2114	break;
2115	}
2116	case BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT:
2117	{
2118	uint8_t uEnable = pBusLogic->aCommandBuffer[0];
2119
2120	pBusLogic->cbReplyParametersLeft = 0;
2121	Log(("Enable OMBR: %u\n", uEnable));
2122	/* Only 0/1 are accepted. */
2123	if (uEnable > 1)
2124	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2125	else
2126	{
2127	pBusLogic->LocalRam.structured.autoSCSIData.uReserved6 = uEnable;
2128	fSuppressIrq = true;
2129	}
2130	break;
2131	}
2132	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2133	{
2134	pBusLogic->cbReplyParametersLeft = 0;
2135	pBusLogic->LocalRam.structured.autoSCSIData.uBusOnDelay = pBusLogic->aCommandBuffer[0];
2136	Log(("Bus-on time: %d\n", pBusLogic->aCommandBuffer[0]));
2137	break;
2138	}
2139	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2140	{
2141	pBusLogic->cbReplyParametersLeft = 0;
2142	pBusLogic->LocalRam.structured.autoSCSIData.uBusOffDelay = pBusLogic->aCommandBuffer[0];
2143	Log(("Bus-off time: %d\n", pBusLogic->aCommandBuffer[0]));
2144	break;
2145	}
2146	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2147	{
2148	pBusLogic->cbReplyParametersLeft = 0;
2149	pBusLogic->LocalRam.structured.autoSCSIData.uDMATransferRate = pBusLogic->aCommandBuffer[0];
2150	Log(("Bus transfer rate: %02X\n", pBusLogic->aCommandBuffer[0]));
2151	break;
2152	}
2153	case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2154	{
2155	RTGCPHYS GCPhysFifoBuf;
2156	Addr24 addr;
2157
2158	pBusLogic->cbReplyParametersLeft = 0;
2159	addr.hi = pBusLogic->aCommandBuffer[0];
2160	addr.mid = pBusLogic->aCommandBuffer[1];
2161	addr.lo = pBusLogic->aCommandBuffer[2];
2162	GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2163	Log(("Write busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2164	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2165	&pBusLogic->LocalRam.u8View[64], 64);
2166	break;
2167	}
2168	case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2169	{
2170	RTGCPHYS GCPhysFifoBuf;
2171	Addr24 addr;
2172
2173	pBusLogic->cbReplyParametersLeft = 0;
2174	addr.hi = pBusLogic->aCommandBuffer[0];
2175	addr.mid = pBusLogic->aCommandBuffer[1];
2176	addr.lo = pBusLogic->aCommandBuffer[2];
2177	GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2178	Log(("Read busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2179	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2180	&pBusLogic->LocalRam.u8View[64], 64);
2181	break;
2182	}
2183	default:
2184	AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
2185	RT_FALL_THRU();
2186	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2187	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2188	/* Commands valid for Adaptec 154xC which we don't handle since
2189	* we pretend being 154xB compatible. Just mark the command as invalid.
2190	*/
2191	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
2192	pBusLogic->cbReplyParametersLeft = 0;
2193	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2194	break;
2195	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
2196	AssertMsgFailed(("Invalid mailbox execute state!\n"));
2197	}
2198
2199	Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
2200
2201	/* Set the data in ready bit in the status register in case the command has a reply. */
2202	if (pBusLogic->cbReplyParametersLeft)
2203	pBusLogic->regStatus \|= BL_STAT_DIRRDY;
2204	else if (!pBusLogic->cbCommandParametersLeft)
2205	buslogicCommandComplete(pBusLogic, fSuppressIrq);
2206
2207	return rc;
2208	}
2209
2210	/**
2211	* Read a register from the BusLogic adapter.
2212	*
2213	* @returns VBox status code.
2214	* @param pBusLogic Pointer to the BusLogic instance data.
2215	* @param iRegister The index of the register to read.
2216	* @param pu32 Where to store the register content.
2217	*/
2218	static int buslogicRegisterRead(PBUSLOGIC pBusLogic, unsigned iRegister, uint32_t *pu32)
2219	{
2220	int rc = VINF_SUCCESS;
2221
2222	switch (iRegister)
2223	{
2224	case BUSLOGIC_REGISTER_STATUS:
2225	{
2226	*pu32 = pBusLogic->regStatus;
2227
2228	/* If the diagnostic active bit is set, we are in a guest-initiated
2229	* hard reset. If the guest reads the status register and waits for
2230	* the host adapter ready bit to be set, we terminate the reset right
2231	* away. However, guests may also expect the reset condition to clear
2232	* automatically after a period of time, in which case we can't show
2233	* the DIAG bit at all.
2234	*/
2235	if (pBusLogic->regStatus & BL_STAT_DACT)
2236	{
2237	uint64_t u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
2238
2239	pBusLogic->regStatus &= ~BL_STAT_DACT;
2240	pBusLogic->regStatus \|= BL_STAT_HARDY;
2241
2242	if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
2243	{
2244	/* If reset already expired, let the guest see that right away. */
2245	*pu32 = pBusLogic->regStatus;
2246	pBusLogic->u64ResetTime = 0;
2247	}
2248	}
2249	break;
2250	}
2251	case BUSLOGIC_REGISTER_DATAIN:
2252	{
2253	if (pBusLogic->fUseLocalRam)
2254	*pu32 = pBusLogic->LocalRam.u8View[pBusLogic->iReply];
2255	else
2256	*pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
2257
2258	/* Careful about underflow - guest can read data register even if
2259	* no data is available.
2260	*/
2261	if (pBusLogic->cbReplyParametersLeft)
2262	{
2263	pBusLogic->iReply++;
2264	pBusLogic->cbReplyParametersLeft--;
2265	if (!pBusLogic->cbReplyParametersLeft)
2266	{
2267	/*
2268	* Reply finished, set command complete bit, unset data-in ready bit and
2269	* interrupt the guest if enabled.
2270	* NB: Some commands do not set the CMDC bit / raise completion interrupt.
2271	*/
2272	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM)
2273	buslogicCommandComplete(pBusLogic, true /* fSuppressIrq */);
2274	else
2275	buslogicCommandComplete(pBusLogic, false);
2276	}
2277	}
2278	LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
2279	pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
2280	break;
2281	}
2282	case BUSLOGIC_REGISTER_INTERRUPT:
2283	{
2284	*pu32 = pBusLogic->regInterrupt;
2285	break;
2286	}
2287	case BUSLOGIC_REGISTER_GEOMETRY:
2288	{
2289	*pu32 = pBusLogic->regGeometry;
2290	break;
2291	}
2292	default:
2293	*pu32 = UINT32_C(0xffffffff);
2294	}
2295
2296	Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2297	__FUNCTION__, pu32, 1, pu32, iRegister, rc));
2298
2299	return rc;
2300	}
2301
2302	/**
2303	* Write a value to a register.
2304	*
2305	* @returns VBox status code.
2306	* @param pBusLogic Pointer to the BusLogic instance data.
2307	* @param iRegister The index of the register to read.
2308	* @param uVal The value to write.
2309	*/
2310	static int buslogicRegisterWrite(PBUSLOGIC pBusLogic, unsigned iRegister, uint8_t uVal)
2311	{
2312	int rc = VINF_SUCCESS;
2313
2314	switch (iRegister)
2315	{
2316	case BUSLOGIC_REGISTER_CONTROL:
2317	{
2318	if ((uVal & BL_CTRL_RHARD) \|\| (uVal & BL_CTRL_RSOFT))
2319	{
2320	#ifdef IN_RING3
2321	bool fHardReset = !!(uVal & BL_CTRL_RHARD);
2322
2323	LogRel(("BusLogic: %s reset\n", fHardReset ? "hard" : "soft"));
2324	buslogicR3InitiateReset(pBusLogic, fHardReset);
2325	#else
2326	rc = VINF_IOM_R3_IOPORT_WRITE;
2327	#endif
2328	break;
2329	}
2330
2331	rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_IOM_R3_IOPORT_WRITE);
2332	if (rc != VINF_SUCCESS)
2333	return rc;
2334
2335	#ifdef LOG_ENABLED
2336	uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
2337	Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
2338	#endif
2339
2340	if (uVal & BL_CTRL_RINT)
2341	buslogicClearInterrupt(pBusLogic);
2342
2343	PDMCritSectLeave(&pBusLogic->CritSectIntr);
2344
2345	break;
2346	}
2347	case BUSLOGIC_REGISTER_COMMAND:
2348	{
2349	/* Fast path for mailbox execution command. */
2350	if ((uVal == BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND) && (pBusLogic->uOperationCode == 0xff))
2351	{
2352	/// @todo Should fail if BL_STAT_INREQ is set
2353	/* If there are no mailboxes configured, don't even try to do anything. */
2354	if (pBusLogic->cMailbox)
2355	{
2356	ASMAtomicIncU32(&pBusLogic->cMailboxesReady);
2357	if (!ASMAtomicXchgBool(&pBusLogic->fNotificationSent, true))
2358	{
2359	/* Send new notification to the queue. */
2360	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pBusLogic->CTX_SUFF(pNotifierQueue));
2361	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2362	PDMQueueInsert(pBusLogic->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2363	}
2364	}
2365
2366	return rc;
2367	}
2368
2369	/*
2370	* Check if we are already fetch command parameters from the guest.
2371	* If not we initialize executing a new command.
2372	*/
2373	if (pBusLogic->uOperationCode == 0xff)
2374	{
2375	pBusLogic->uOperationCode = uVal;
2376	pBusLogic->iParameter = 0;
2377
2378	/* Mark host adapter as busy and clear the invalid status bit. */
2379	pBusLogic->regStatus &= ~(BL_STAT_HARDY \| BL_STAT_CMDINV);
2380
2381	/* Get the number of bytes for parameters from the command code. */
2382	switch (pBusLogic->uOperationCode)
2383	{
2384	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
2385	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
2386	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
2387	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
2388	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
2389	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
2390	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2391	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2392	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2393	pBusLogic->cbCommandParametersLeft = 0;
2394	break;
2395	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
2396	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
2397	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
2398	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
2399	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2400	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2401	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2402	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2403	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2404	case BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT:
2405	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2406	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2407	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2408	pBusLogic->cbCommandParametersLeft = 1;
2409	break;
2410	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
2411	pBusLogic->cbCommandParametersLeft = 2;
2412	break;
2413	case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2414	case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2415	pBusLogic->cbCommandParametersLeft = 3;
2416	break;
2417	case BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT:
2418	pBusLogic->cbCommandParametersLeft = 4;
2419	break;
2420	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
2421	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitMbx);
2422	break;
2423	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
2424	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
2425	break;
2426	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
2427	/* There must be at least one byte following this command. */
2428	pBusLogic->cbCommandParametersLeft = 1;
2429	break;
2430	case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
2431	/* 12 bytes + variable-length CDB. */
2432	pBusLogic->cbCommandParametersLeft = 12;
2433	break;
2434	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2435	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2436	/* Invalid commands. */
2437	pBusLogic->cbCommandParametersLeft = 0;
2438	break;
2439	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should not come here anymore. */
2440	default:
2441	AssertMsgFailed(("Invalid operation code %#x\n", uVal));
2442	}
2443	}
2444	else
2445	{
2446	#ifndef IN_RING3
2447	/* This command must be executed in R3 as it rehooks the ISA I/O port. */
2448	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_MODIFY_IO_ADDRESS)
2449	{
2450	rc = VINF_IOM_R3_IOPORT_WRITE;
2451	break;
2452	}
2453	#endif
2454	/*
2455	* The real adapter would set the Command register busy bit in the status register.
2456	* The guest has to wait until it is unset.
2457	* We don't need to do it because the guest does not continue execution while we are in this
2458	* function.
2459	*/
2460	pBusLogic->aCommandBuffer[pBusLogic->iParameter] = uVal;
2461	pBusLogic->iParameter++;
2462	pBusLogic->cbCommandParametersLeft--;
2463	}
2464
2465	/* Start execution of command if there are no parameters left. */
2466	if (!pBusLogic->cbCommandParametersLeft)
2467	{
2468	rc = buslogicProcessCommand(pBusLogic);
2469	AssertMsgRC(rc, ("Processing command failed rc=%Rrc\n", rc));
2470	}
2471	break;
2472	}
2473
2474	/* On BusLogic adapters, the interrupt and geometry registers are R/W.
2475	* That is different from Adaptec 154x where those are read only.
2476	*/
2477	case BUSLOGIC_REGISTER_INTERRUPT:
2478	pBusLogic->regInterrupt = uVal;
2479	break;
2480
2481	case BUSLOGIC_REGISTER_GEOMETRY:
2482	pBusLogic->regGeometry = uVal;
2483	break;
2484
2485	default:
2486	AssertMsgFailed(("Register not available\n"));
2487	rc = VERR_IOM_IOPORT_UNUSED;
2488	}
2489
2490	return rc;
2491	}
2492
2493	/**
2494	* Memory mapped I/O Handler for read operations.
2495	*
2496	* @returns VBox status code.
2497	*
2498	* @param pDevIns The device instance.
2499	* @param pvUser User argument.
2500	* @param GCPhysAddr Physical address (in GC) where the read starts.
2501	* @param pv Where to store the result.
2502	* @param cb Number of bytes read.
2503	*/
2504	PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void pv, unsigned cb)
2505	{
2506	RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
2507
2508	/* the linux driver does not make use of the MMIO area. */
2509	AssertMsgFailed(("MMIO Read\n"));
2510	return VINF_SUCCESS;
2511	}
2512
2513	/**
2514	* Memory mapped I/O Handler for write operations.
2515	*
2516	* @returns VBox status code.
2517	*
2518	* @param pDevIns The device instance.
2519	* @param pvUser User argument.
2520	* @param GCPhysAddr Physical address (in GC) where the read starts.
2521	* @param pv Where to fetch the result.
2522	* @param cb Number of bytes to write.
2523	*/
2524	PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void const pv, unsigned cb)
2525	{
2526	RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
2527
2528	/* the linux driver does not make use of the MMIO area. */
2529	AssertMsgFailed(("MMIO Write\n"));
2530	return VINF_SUCCESS;
2531	}
2532
2533	/**
2534	* Port I/O Handler for IN operations.
2535	*
2536	* @returns VBox status code.
2537	*
2538	* @param pDevIns The device instance.
2539	* @param pvUser User argument.
2540	* @param uPort Port number used for the IN operation.
2541	* @param pu32 Where to store the result.
2542	* @param cb Number of bytes read.
2543	*/
2544	PDMBOTHCBDECL(int) buslogicIOPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32, unsigned cb)
2545	{
2546	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2547	unsigned iRegister = uPort % 4;
2548	RT_NOREF_PV(pvUser); RT_NOREF_PV(cb);
2549
2550	Assert(cb == 1);
2551
2552	return buslogicRegisterRead(pBusLogic, iRegister, pu32);
2553	}
2554
2555	/**
2556	* Port I/O Handler for OUT operations.
2557	*
2558	* @returns VBox status code.
2559	*
2560	* @param pDevIns The device instance.
2561	* @param pvUser User argument.
2562	* @param uPort Port number used for the IN operation.
2563	* @param u32 The value to output.
2564	* @param cb The value size in bytes.
2565	*/
2566	PDMBOTHCBDECL(int) buslogicIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
2567	{
2568	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2569	unsigned iRegister = uPort % 4;
2570	uint8_t uVal = (uint8_t)u32;
2571	RT_NOREF2(pvUser, cb);
2572
2573	Assert(cb == 1);
2574
2575	int rc = buslogicRegisterWrite(pBusLogic, iRegister, (uint8_t)uVal);
2576
2577	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x uPort=%#x rc=%Rrc\n",
2578	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, uPort, rc));
2579
2580	return rc;
2581	}
2582
2583	#ifdef IN_RING3
2584
2585	static int buslogicR3PrepareBIOSSCSIRequest(PBUSLOGIC pThis)
2586	{
2587	uint32_t uTargetDevice;
2588	uint32_t uLun;
2589	uint8_t *pbCdb;
2590	size_t cbCdb;
2591	size_t cbBuf;
2592
2593	int rc = vboxscsiSetupRequest(&pThis->VBoxSCSI, &uLun, &pbCdb, &cbCdb, &cbBuf, &uTargetDevice);
2594	AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
2595
2596	if ( uTargetDevice < RT_ELEMENTS(pThis->aDeviceStates)
2597	&& pThis->aDeviceStates[uTargetDevice].pDrvBase)
2598	{
2599	PBUSLOGICDEVICE pTgtDev = &pThis->aDeviceStates[uTargetDevice];
2600	PDMMEDIAEXIOREQ hIoReq;
2601	PBUSLOGICREQ pReq;
2602
2603	rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
2604	0, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
2605	AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
2606
2607	pReq->fBIOS = true;
2608	pReq->hIoReq = hIoReq;
2609	pReq->pTargetDevice = pTgtDev;
2610
2611	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
2612
2613	rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
2614	pbCdb, cbCdb, PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN,
2615	cbBuf, NULL, 0, &pReq->u8ScsiSts, 30 * RT_MS_1SEC);
2616	if (rc == VINF_SUCCESS \|\| rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
2617	{
2618	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2619	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2620	rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
2621	}
2622	else if (rc == VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
2623	rc = VINF_SUCCESS;
2624
2625	return rc;
2626	}
2627
2628	/* Device is not present. */
2629	AssertMsg(pbCdb[0] == SCSI_INQUIRY,
2630	("Device is not present but command is not inquiry\n"));
2631
2632	SCSIINQUIRYDATA ScsiInquiryData;
2633
2634	memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
2635	ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
2636	ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
2637
2638	memcpy(pThis->VBoxSCSI.pbBuf, &ScsiInquiryData, 5);
2639
2640	rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, SCSI_STATUS_OK);
2641	AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
2642
2643	return rc;
2644	}
2645
2646
2647	/**
2648	* Port I/O Handler for IN operations - BIOS port.
2649	*
2650	* @returns VBox status code.
2651	*
2652	* @param pDevIns The device instance.
2653	* @param pvUser User argument.
2654	* @param uPort Port number used for the IN operation.
2655	* @param pu32 Where to store the result.
2656	* @param cb Number of bytes read.
2657	*/
2658	static DECLCALLBACK(int) buslogicR3BiosIoPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32, unsigned cb)
2659	{
2660	RT_NOREF(pvUser, cb);
2661	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2662
2663	Assert(cb == 1);
2664
2665	int rc = vboxscsiReadRegister(&pBusLogic->VBoxSCSI, (uPort - BUSLOGIC_BIOS_IO_PORT), pu32);
2666
2667	//Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2668	// __FUNCTION__, pu32, 1, pu32, (uPort - BUSLOGIC_BIOS_IO_PORT), rc));
2669
2670	return rc;
2671	}
2672
2673	/**
2674	* Port I/O Handler for OUT operations - BIOS port.
2675	*
2676	* @returns VBox status code.
2677	*
2678	* @param pDevIns The device instance.
2679	* @param pvUser User argument.
2680	* @param uPort Port number used for the IN operation.
2681	* @param u32 The value to output.
2682	* @param cb The value size in bytes.
2683	*/
2684	static DECLCALLBACK(int) buslogicR3BiosIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
2685	{
2686	RT_NOREF(pvUser, cb);
2687	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2688	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x uPort=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, uPort));
2689
2690	/*
2691	* If there is already a request form the BIOS pending ignore this write
2692	* because it should not happen.
2693	*/
2694	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
2695	return VINF_SUCCESS;
2696
2697	Assert(cb == 1);
2698
2699	int rc = vboxscsiWriteRegister(&pThis->VBoxSCSI, (uPort - BUSLOGIC_BIOS_IO_PORT), (uint8_t)u32);
2700	if (rc == VERR_MORE_DATA)
2701	{
2702	ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
2703	/* Send a notifier to the PDM queue that there are pending requests. */
2704	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotifierQueue));
2705	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2706	PDMQueueInsert(pThis->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2707	rc = VINF_SUCCESS;
2708	}
2709	else if (RT_FAILURE(rc))
2710	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2711
2712	return VINF_SUCCESS;
2713	}
2714
2715	/**
2716	* Port I/O Handler for primary port range OUT string operations.
2717	* @see FNIOMIOPORTOUTSTRING for details.
2718	*/
2719	static DECLCALLBACK(int) buslogicR3BiosIoPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2720	uint8_t const pbSrc, uint32_t pcTransfers, unsigned cb)
2721	{
2722	RT_NOREF(pvUser);
2723	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2724	Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2725
2726	/*
2727	* If there is already a request form the BIOS pending ignore this write
2728	* because it should not happen.
2729	*/
2730	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
2731	return VINF_SUCCESS;
2732
2733	int rc = vboxscsiWriteString(pDevIns, &pThis->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pbSrc, pcTransfers, cb);
2734	if (rc == VERR_MORE_DATA)
2735	{
2736	ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
2737	/* Send a notifier to the PDM queue that there are pending requests. */
2738	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotifierQueue));
2739	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2740	PDMQueueInsert(pThis->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2741	}
2742	else if (RT_FAILURE(rc))
2743	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2744
2745	return VINF_SUCCESS;
2746	}
2747
2748	/**
2749	* Port I/O Handler for primary port range IN string operations.
2750	* @see FNIOMIOPORTINSTRING for details.
2751	*/
2752	static DECLCALLBACK(int) buslogicR3BiosIoPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2753	uint8_t pbDst, uint32_t pcTransfers, unsigned cb)
2754	{
2755	RT_NOREF(pvUser);
2756	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2757	LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2758
2759	return vboxscsiReadString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2760	pbDst, pcTransfers, cb);
2761	}
2762
2763	/**
2764	* Update the ISA I/O range.
2765	*
2766	* @returns nothing.
2767	* @param pBusLogic Pointer to the BusLogic device instance.
2768	* @param uBaseCode Encoded ISA I/O base; only low 3 bits are used.
2769	*/
2770	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)
2771	{
2772	uint8_t uCode = uBaseCode & MAX_ISA_BASE;
2773	uint16_t uNewBase = g_aISABases[uCode];
2774	int rc = VINF_SUCCESS;
2775
2776	LogFlowFunc(("ISA I/O code %02X, new base %X\n", uBaseCode, uNewBase));
2777
2778	/* Check if the same port range is already registered. */
2779	if (uNewBase != pBusLogic->IOISABase)
2780	{
2781	/* Unregister the old range, if any. */
2782	if (pBusLogic->IOISABase)
2783	rc = PDMDevHlpIOPortDeregister(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->IOISABase, 4);
2784
2785	if (RT_SUCCESS(rc))
2786	{
2787	pBusLogic->IOISABase = 0; /* First mark as unregistered. */
2788	pBusLogic->uISABaseCode = ISA_BASE_DISABLED;
2789
2790	if (uNewBase)
2791	{
2792	/* Register the new range if requested. */
2793	rc = PDMDevHlpIOPortRegister(pBusLogic->CTX_SUFF(pDevIns), uNewBase, 4, NULL,
2794	buslogicIOPortWrite, buslogicIOPortRead,
2795	NULL, NULL,
2796	"BusLogic ISA");
2797	if (RT_SUCCESS(rc))
2798	{
2799	pBusLogic->IOISABase = uNewBase;
2800	pBusLogic->uISABaseCode = uCode;
2801	}
2802	}
2803	}
2804	if (RT_SUCCESS(rc))
2805	{
2806	if (uNewBase)
2807	{
2808	Log(("ISA I/O base: %x\n", uNewBase));
2809	LogRel(("BusLogic: ISA I/O base: %x\n", uNewBase));
2810	}
2811	else
2812	{
2813	Log(("Disabling ISA I/O ports.\n"));
2814	LogRel(("BusLogic: ISA I/O disabled\n"));
2815	}
2816	}
2817
2818	}
2819	return rc;
2820	}
2821
2822
2823	/**
2824	* @callback_method_impl{FNPCIIOREGIONMAP}
2825	*/
2826	static DECLCALLBACK(int) buslogicR3MmioMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
2827	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
2828	{
2829	RT_NOREF(pPciDev, iRegion);
2830	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2831	int rc = VINF_SUCCESS;
2832
2833	Log2(("%s: registering MMIO area at GCPhysAddr=%RGp cb=%RGp\n", __FUNCTION__, GCPhysAddress, cb));
2834
2835	Assert(cb >= 32);
2836
2837	if (enmType == PCI_ADDRESS_SPACE_MEM)
2838	{
2839	/* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
2840	rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /pvUser/,
2841	IOMMMIO_FLAGS_READ_PASSTHRU \| IOMMMIO_FLAGS_WRITE_PASSTHRU,
2842	buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
2843	if (RT_FAILURE(rc))
2844	return rc;
2845
2846	if (pThis->fR0Enabled)
2847	{
2848	rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /pvUser/,
2849	"buslogicMMIOWrite", "buslogicMMIORead");
2850	if (RT_FAILURE(rc))
2851	return rc;
2852	}
2853
2854	if (pThis->fGCEnabled)
2855	{
2856	rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /pvUser/,
2857	"buslogicMMIOWrite", "buslogicMMIORead");
2858	if (RT_FAILURE(rc))
2859	return rc;
2860	}
2861
2862	pThis->MMIOBase = GCPhysAddress;
2863	}
2864	else if (enmType == PCI_ADDRESS_SPACE_IO)
2865	{
2866	rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2867	NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
2868	if (RT_FAILURE(rc))
2869	return rc;
2870
2871	if (pThis->fR0Enabled)
2872	{
2873	rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2874	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2875	if (RT_FAILURE(rc))
2876	return rc;
2877	}
2878
2879	if (pThis->fGCEnabled)
2880	{
2881	rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2882	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2883	if (RT_FAILURE(rc))
2884	return rc;
2885	}
2886
2887	pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
2888	}
2889	else
2890	AssertMsgFailed(("Invalid enmType=%d\n", enmType));
2891
2892	return rc;
2893	}
2894
2895	static int buslogicR3ReqComplete(PBUSLOGIC pThis, PBUSLOGICREQ pReq, int rcReq)
2896	{
2897	RT_NOREF(rcReq);
2898	PBUSLOGICDEVICE pTgtDev = pReq->pTargetDevice;
2899
2900	LogFlowFunc(("before decrement %u\n", pTgtDev->cOutstandingRequests));
2901	ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
2902	LogFlowFunc(("after decrement %u\n", pTgtDev->cOutstandingRequests));
2903
2904	if (pReq->fBIOS)
2905	{
2906	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2907	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2908	int rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
2909	AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
2910	}
2911	else
2912	{
2913	if (pReq->pbSenseBuffer)
2914	buslogicR3SenseBufferFree(pReq, (pReq->u8ScsiSts != SCSI_STATUS_OK));
2915
2916	/* Update residual data length. */
2917	if ( (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
2918	\|\| (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
2919	{
2920	size_t cbResidual = 0;
2921	int rc = pTgtDev->pDrvMediaEx->pfnIoReqQueryResidual(pTgtDev->pDrvMediaEx, pReq->hIoReq, &cbResidual);
2922	AssertRC(rc); Assert(cbResidual == (uint32_t)cbResidual);
2923
2924	if (pReq->fIs24Bit)
2925	U32_TO_LEN(pReq->CCBGuest.o.acbData, (uint32_t)cbResidual);
2926	else
2927	pReq->CCBGuest.n.cbData = (uint32_t)cbResidual;
2928	}
2929
2930	/*
2931	* Save vital things from the request and free it before posting completion
2932	* to avoid that the guest submits a new request with the same ID as the still
2933	* allocated one.
2934	*/
2935	#ifdef LOG_ENABLED
2936	bool fIs24Bit = pReq->fIs24Bit;
2937	#endif
2938	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2939	RTGCPHYS GCPhysAddrCCB = pReq->GCPhysAddrCCB;
2940	CCBU CCBGuest;
2941	memcpy(&CCBGuest, &pReq->CCBGuest, sizeof(CCBU));
2942
2943	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2944	if (u8ScsiSts == SCSI_STATUS_OK)
2945	buslogicR3SendIncomingMailbox(pThis, GCPhysAddrCCB, &CCBGuest,
2946	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2947	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2948	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR);
2949	else if (u8ScsiSts == SCSI_STATUS_CHECK_CONDITION)
2950	buslogicR3SendIncomingMailbox(pThis, GCPhysAddrCCB, &CCBGuest,
2951	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2952	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION,
2953	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2954	else
2955	AssertMsgFailed(("invalid completion status %u\n", u8ScsiSts));
2956
2957	#ifdef LOG_ENABLED
2958	buslogicR3DumpCCBInfo(&CCBGuest, fIs24Bit);
2959	#endif
2960	}
2961
2962	if (pTgtDev->cOutstandingRequests == 0 && pThis->fSignalIdle)
2963	PDMDevHlpAsyncNotificationCompleted(pThis->pDevInsR3);
2964
2965	return VINF_SUCCESS;
2966	}
2967
2968	static DECLCALLBACK(int) buslogicR3QueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2969	uint32_t piInstance, uint32_t piLUN)
2970	{
2971	PBUSLOGICDEVICE pBusLogicDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaPort);
2972	PPDMDEVINS pDevIns = pBusLogicDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
2973
2974	AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2975	AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2976	AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2977
2978	*ppcszController = pDevIns->pReg->szName;
2979	*piInstance = pDevIns->iInstance;
2980	*piLUN = pBusLogicDevice->iLUN;
2981
2982	return VINF_SUCCESS;
2983	}
2984
2985	/**
2986	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyFromBuf}
2987	*/
2988	static DECLCALLBACK(int) buslogicR3IoReqCopyFromBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2989	void *pvIoReqAlloc, uint32_t offDst, PRTSGBUF pSgBuf,
2990	size_t cbCopy)
2991	{
2992	RT_NOREF1(hIoReq);
2993	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2994	PBUSLOGICREQ pReq = (PBUSLOGICREQ)pvIoReqAlloc;
2995
2996	size_t cbCopied = 0;
2997	if (RT_UNLIKELY(pReq->fBIOS))
2998	cbCopied = vboxscsiCopyToBuf(&pTgtDev->CTX_SUFF(pBusLogic)->VBoxSCSI, pSgBuf, offDst, cbCopy);
2999	else
3000	cbCopied = buslogicR3CopySgBufToGuest(pTgtDev->CTX_SUFF(pBusLogic), pReq, pSgBuf, offDst, cbCopy);
3001	return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_OVERFLOW;
3002	}
3003
3004	/**
3005	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyToBuf}
3006	*/
3007	static DECLCALLBACK(int) buslogicR3IoReqCopyToBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
3008	void *pvIoReqAlloc, uint32_t offSrc, PRTSGBUF pSgBuf,
3009	size_t cbCopy)
3010	{
3011	RT_NOREF1(hIoReq);
3012	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3013	PBUSLOGICREQ pReq = (PBUSLOGICREQ)pvIoReqAlloc;
3014
3015	size_t cbCopied = 0;
3016	if (RT_UNLIKELY(pReq->fBIOS))
3017	cbCopied = vboxscsiCopyFromBuf(&pTgtDev->CTX_SUFF(pBusLogic)->VBoxSCSI, pSgBuf, offSrc, cbCopy);
3018	else
3019	cbCopied = buslogicR3CopySgBufFromGuest(pTgtDev->CTX_SUFF(pBusLogic), pReq, pSgBuf, offSrc, cbCopy);
3020	return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_UNDERRUN;
3021	}
3022
3023	/**
3024	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCompleteNotify}
3025	*/
3026	static DECLCALLBACK(int) buslogicR3IoReqCompleteNotify(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
3027	void *pvIoReqAlloc, int rcReq)
3028	{
3029	RT_NOREF(hIoReq);
3030	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3031	buslogicR3ReqComplete(pTgtDev->CTX_SUFF(pBusLogic), (PBUSLOGICREQ)pvIoReqAlloc, rcReq);
3032	return VINF_SUCCESS;
3033	}
3034
3035	/**
3036	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqStateChanged}
3037	*/
3038	static DECLCALLBACK(void) buslogicR3IoReqStateChanged(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
3039	void *pvIoReqAlloc, PDMMEDIAEXIOREQSTATE enmState)
3040	{
3041	RT_NOREF3(hIoReq, pvIoReqAlloc, enmState);
3042	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3043
3044	switch (enmState)
3045	{
3046	case PDMMEDIAEXIOREQSTATE_SUSPENDED:
3047	{
3048	/* Make sure the request is not accounted for so the VM can suspend successfully. */
3049	uint32_t cTasksActive = ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
3050	if (!cTasksActive && pTgtDev->CTX_SUFF(pBusLogic)->fSignalIdle)
3051	PDMDevHlpAsyncNotificationCompleted(pTgtDev->CTX_SUFF(pBusLogic)->pDevInsR3);
3052	break;
3053	}
3054	case PDMMEDIAEXIOREQSTATE_ACTIVE:
3055	/* Make sure the request is accounted for so the VM suspends only when the request is complete. */
3056	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
3057	break;
3058	default:
3059	AssertMsgFailed(("Invalid request state given %u\n", enmState));
3060	}
3061	}
3062
3063	/**
3064	* @interface_method_impl{PDMIMEDIAEXPORT,pfnMediumEjected}
3065	*/
3066	static DECLCALLBACK(void) buslogicR3MediumEjected(PPDMIMEDIAEXPORT pInterface)
3067	{
3068	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3069	PBUSLOGIC pThis = pTgtDev->CTX_SUFF(pBusLogic);
3070
3071	if (pThis->pMediaNotify)
3072	{
3073	int rc = VMR3ReqCallNoWait(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), VMCPUID_ANY,
3074	(PFNRT)pThis->pMediaNotify->pfnEjected, 2,
3075	pThis->pMediaNotify, pTgtDev->iLUN);
3076	AssertRC(rc);
3077	}
3078	}
3079
3080	static int buslogicR3DeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB)
3081	{
3082	int rc = VINF_SUCCESS;
3083	uint8_t uTargetIdCCB;
3084	CCBU CCBGuest;
3085
3086	/* Fetch the CCB from guest memory. */
3087	/** @todo How much do we really have to read? */
3088	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
3089	&CCBGuest, sizeof(CCB32));
3090
3091	uTargetIdCCB = pBusLogic->fMbxIs24Bit ? CCBGuest.o.uTargetId : CCBGuest.n.uTargetId;
3092	if (RT_LIKELY(uTargetIdCCB < RT_ELEMENTS(pBusLogic->aDeviceStates)))
3093	{
3094	PBUSLOGICDEVICE pTgtDev = &pBusLogic->aDeviceStates[uTargetIdCCB];
3095
3096	#ifdef LOG_ENABLED
3097	buslogicR3DumpCCBInfo(&CCBGuest, pBusLogic->fMbxIs24Bit);
3098	#endif
3099
3100	/* Check if device is present on bus. If not return error immediately and don't process this further. */
3101	if (RT_LIKELY(pTgtDev->fPresent))
3102	{
3103	PDMMEDIAEXIOREQ hIoReq;
3104	PBUSLOGICREQ pReq;
3105	rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
3106	GCPhysAddrCCB, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
3107	if (RT_SUCCESS(rc))
3108	{
3109	pReq->pTargetDevice = pTgtDev;
3110	pReq->GCPhysAddrCCB = GCPhysAddrCCB;
3111	pReq->fBIOS = false;
3112	pReq->hIoReq = hIoReq;
3113	pReq->fIs24Bit = pBusLogic->fMbxIs24Bit;
3114
3115	/* Make a copy of the CCB */
3116	memcpy(&pReq->CCBGuest, &CCBGuest, sizeof(CCBGuest));
3117
3118	/* Alloc required buffers. */
3119	rc = buslogicR3SenseBufferAlloc(pReq);
3120	AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc));
3121
3122	size_t cbBuf = 0;
3123	rc = buslogicR3QueryDataBufferSize(pBusLogic->CTX_SUFF(pDevIns), &pReq->CCBGuest, pReq->fIs24Bit, &cbBuf);
3124	AssertRC(rc);
3125
3126	uint32_t uLun = pReq->fIs24Bit ? pReq->CCBGuest.o.uLogicalUnit
3127	: pReq->CCBGuest.n.uLogicalUnit;
3128
3129	PDMMEDIAEXIOREQSCSITXDIR enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN;
3130	size_t cbSense = buslogicR3ConvertSenseBufferLength(CCBGuest.c.cbSenseData);
3131
3132	if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_NO_DATA)
3133	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_NONE;
3134	else if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
3135	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_TO_DEVICE;
3136	else if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
3137	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_FROM_DEVICE;
3138
3139	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
3140	rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
3141	&pReq->CCBGuest.c.abCDB[0], pReq->CCBGuest.c.cbCDB,
3142	enmXferDir, cbBuf, pReq->pbSenseBuffer, cbSense,
3143	&pReq->u8ScsiSts, 30 * RT_MS_1SEC);
3144	if (rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
3145	buslogicR3ReqComplete(pBusLogic, pReq, rc);
3146	}
3147	else
3148	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3149	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
3150	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3151	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3152	}
3153	else
3154	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3155	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
3156	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3157	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3158	}
3159	else
3160	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3161	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER,
3162	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3163	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3164
3165	return rc;
3166	}
3167
3168	static int buslogicR3DeviceSCSIRequestAbort(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB)
3169	{
3170	int rc = VINF_SUCCESS;
3171	uint8_t uTargetIdCCB;
3172	CCBU CCBGuest;
3173
3174	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
3175	&CCBGuest, sizeof(CCB32));
3176
3177	uTargetIdCCB = pBusLogic->fMbxIs24Bit ? CCBGuest.o.uTargetId : CCBGuest.n.uTargetId;
3178	if (RT_LIKELY(uTargetIdCCB < RT_ELEMENTS(pBusLogic->aDeviceStates)))
3179	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3180	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED,
3181	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3182	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND);
3183	else
3184	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3185	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER,
3186	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3187	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3188
3189	return rc;
3190	}
3191
3192	/**
3193	* Read a mailbox from guest memory. Convert 24-bit mailboxes to
3194	* 32-bit format.
3195	*
3196	* @returns Mailbox guest physical address.
3197	* @param pBusLogic Pointer to the BusLogic instance data.
3198	* @param pMbx Pointer to the mailbox to read into.
3199	*/
3200	static RTGCPHYS buslogicR3ReadOutgoingMailbox(PBUSLOGIC pBusLogic, PMailbox32 pMbx)
3201	{
3202	RTGCPHYS GCMailbox;
3203
3204	if (pBusLogic->fMbxIs24Bit)
3205	{
3206	Mailbox24 Mbx24;
3207
3208	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox24));
3209	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3210	pMbx->u32PhysAddrCCB = ADDR_TO_U32(Mbx24.aPhysAddrCCB);
3211	pMbx->u.out.uActionCode = Mbx24.uCmdState;
3212	}
3213	else
3214	{
3215	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox32));
3216	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, pMbx, sizeof(Mailbox32));
3217	}
3218
3219	return GCMailbox;
3220	}
3221
3222	/**
3223	* Read mailbox from the guest and execute command.
3224	*
3225	* @returns VBox status code.
3226	* @param pBusLogic Pointer to the BusLogic instance data.
3227	*/
3228	static int buslogicR3ProcessMailboxNext(PBUSLOGIC pBusLogic)
3229	{
3230	RTGCPHYS GCPhysAddrMailboxCurrent;
3231	Mailbox32 MailboxGuest;
3232	int rc = VINF_SUCCESS;
3233
3234	if (!pBusLogic->fStrictRoundRobinMode)
3235	{
3236	/* Search for a filled mailbox - stop if we have scanned all mailboxes. */
3237	uint8_t uMailboxPosCur = pBusLogic->uMailboxOutgoingPositionCurrent;
3238
3239	do
3240	{
3241	/* Fetch mailbox from guest memory. */
3242	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic, &MailboxGuest);
3243
3244	/* Check the next mailbox. */
3245	buslogicR3OutgoingMailboxAdvance(pBusLogic);
3246	} while ( MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE
3247	&& uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent);
3248	}
3249	else
3250	{
3251	/* Fetch mailbox from guest memory. */
3252	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic, &MailboxGuest);
3253	}
3254
3255	/*
3256	* Check if the mailbox is actually loaded.
3257	* It might be possible that the guest notified us without
3258	* a loaded mailbox. Do nothing in that case but leave a
3259	* log entry.
3260	*/
3261	if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE)
3262	{
3263	Log(("No loaded mailbox left\n"));
3264	return VERR_NO_DATA;
3265	}
3266
3267	LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB));
3268	#ifdef LOG_ENABLED
3269	buslogicR3DumpMailboxInfo(&MailboxGuest, true);
3270	#endif
3271
3272	/* We got the mailbox, mark it as free in the guest. */
3273	uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
3274	unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
3275	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent + uCodeOffs, &uActionCode, sizeof(uActionCode));
3276
3277	if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
3278	rc = buslogicR3DeviceSCSIRequestSetup(pBusLogic, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB);
3279	else if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND)
3280	{
3281	LogFlow(("Aborting mailbox\n"));
3282	rc = buslogicR3DeviceSCSIRequestAbort(pBusLogic, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB);
3283	}
3284	else
3285	AssertMsgFailed(("Invalid outgoing mailbox action code %u\n", MailboxGuest.u.out.uActionCode));
3286
3287	AssertRC(rc);
3288
3289	/* Advance to the next mailbox. */
3290	if (pBusLogic->fStrictRoundRobinMode)
3291	buslogicR3OutgoingMailboxAdvance(pBusLogic);
3292
3293	return rc;
3294	}
3295
3296	/**
3297	* Transmit queue consumer
3298	* Queue a new async task.
3299	*
3300	* @returns Success indicator.
3301	* If false the item will not be removed and the flushing will stop.
3302	* @param pDevIns The device instance.
3303	* @param pItem The item to consume. Upon return this item will be freed.
3304	*/
3305	static DECLCALLBACK(bool) buslogicR3NotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
3306	{
3307	RT_NOREF(pItem);
3308	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3309
3310	int rc = SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
3311	AssertRC(rc);
3312
3313	return true;
3314	}
3315
3316	/** @callback_method_impl{FNSSMDEVLIVEEXEC} */
3317	static DECLCALLBACK(int) buslogicR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
3318	{
3319	RT_NOREF(uPass);
3320	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3321
3322	/* Save the device config. */
3323	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3324	SSMR3PutBool(pSSM, pThis->aDeviceStates[i].fPresent);
3325
3326	return VINF_SSM_DONT_CALL_AGAIN;
3327	}
3328
3329	/** @callback_method_impl{FNSSMDEVSAVEEXEC} */
3330	static DECLCALLBACK(int) buslogicR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3331	{
3332	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3333	uint32_t cReqsSuspended = 0;
3334
3335	/* Every device first. */
3336	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3337	{
3338	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3339
3340	AssertMsg(!pDevice->cOutstandingRequests,
3341	("There are still outstanding requests on this device\n"));
3342	SSMR3PutBool(pSSM, pDevice->fPresent);
3343	SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
3344
3345	if (pDevice->fPresent)
3346	cReqsSuspended += pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
3347	}
3348	/* Now the main device state. */
3349	SSMR3PutU8 (pSSM, pBusLogic->regStatus);
3350	SSMR3PutU8 (pSSM, pBusLogic->regInterrupt);
3351	SSMR3PutU8 (pSSM, pBusLogic->regGeometry);
3352	SSMR3PutMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3353	SSMR3PutU8 (pSSM, pBusLogic->uOperationCode);
3354	SSMR3PutMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3355	SSMR3PutU8 (pSSM, pBusLogic->iParameter);
3356	SSMR3PutU8 (pSSM, pBusLogic->cbCommandParametersLeft);
3357	SSMR3PutBool (pSSM, pBusLogic->fUseLocalRam);
3358	SSMR3PutMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3359	SSMR3PutU8 (pSSM, pBusLogic->iReply);
3360	SSMR3PutU8 (pSSM, pBusLogic->cbReplyParametersLeft);
3361	SSMR3PutBool (pSSM, pBusLogic->fIRQEnabled);
3362	SSMR3PutU8 (pSSM, pBusLogic->uISABaseCode);
3363	SSMR3PutU32 (pSSM, pBusLogic->cMailbox);
3364	SSMR3PutBool (pSSM, pBusLogic->fMbxIs24Bit);
3365	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxOutgoingBase);
3366	SSMR3PutU32 (pSSM, pBusLogic->uMailboxOutgoingPositionCurrent);
3367	SSMR3PutU32 (pSSM, pBusLogic->cMailboxesReady);
3368	SSMR3PutBool (pSSM, pBusLogic->fNotificationSent);
3369	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxIncomingBase);
3370	SSMR3PutU32 (pSSM, pBusLogic->uMailboxIncomingPositionCurrent);
3371	SSMR3PutBool (pSSM, pBusLogic->fStrictRoundRobinMode);
3372	SSMR3PutBool (pSSM, pBusLogic->fExtendedLunCCBFormat);
3373
3374	vboxscsiR3SaveExec(&pBusLogic->VBoxSCSI, pSSM);
3375
3376	SSMR3PutU32(pSSM, cReqsSuspended);
3377
3378	/* Save the physical CCB address of all suspended requests. */
3379	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates) && cReqsSuspended; i++)
3380	{
3381	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3382	if (pDevice->fPresent)
3383	{
3384	uint32_t cThisReqsSuspended = pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
3385
3386	cReqsSuspended -= cThisReqsSuspended;
3387	if (cThisReqsSuspended)
3388	{
3389	PDMMEDIAEXIOREQ hIoReq;
3390	PBUSLOGICREQ pReq;
3391	int rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedStart(pDevice->pDrvMediaEx, &hIoReq,
3392	(void **)&pReq);
3393	AssertRCBreak(rc);
3394
3395	for (;;)
3396	{
3397	SSMR3PutU32(pSSM, (uint32_t)pReq->GCPhysAddrCCB);
3398
3399	cThisReqsSuspended--;
3400	if (!cThisReqsSuspended)
3401	break;
3402
3403	rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedNext(pDevice->pDrvMediaEx, hIoReq,
3404	&hIoReq, (void **)&pReq);
3405	AssertRCBreak(rc);
3406	}
3407	}
3408	}
3409	}
3410
3411	return SSMR3PutU32(pSSM, UINT32_MAX);
3412	}
3413
3414	/** @callback_method_impl{FNSSMDEVLOADDONE} */
3415	static DECLCALLBACK(int) buslogicR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3416	{
3417	RT_NOREF(pSSM);
3418	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3419
3420	buslogicR3RegisterISARange(pThis, pThis->uISABaseCode);
3421
3422	/* Kick of any requests we might need to redo. */
3423	if (pThis->VBoxSCSI.fBusy)
3424	{
3425
3426	/* The BIOS had a request active when we got suspended. Resume it. */
3427	int rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3428	AssertRC(rc);
3429	}
3430	else if (pThis->cReqsRedo)
3431	{
3432	for (unsigned i = 0; i < pThis->cReqsRedo; i++)
3433	{
3434	int rc = buslogicR3DeviceSCSIRequestSetup(pThis, pThis->paGCPhysAddrCCBRedo[i]);
3435	AssertRC(rc);
3436	}
3437
3438	RTMemFree(pThis->paGCPhysAddrCCBRedo);
3439	pThis->paGCPhysAddrCCBRedo = NULL;
3440	pThis->cReqsRedo = 0;
3441	}
3442
3443	return VINF_SUCCESS;
3444	}
3445
3446	/** @callback_method_impl{FNSSMDEVLOADEXEC} */
3447	static DECLCALLBACK(int) buslogicR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3448	{
3449	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3450	int rc = VINF_SUCCESS;
3451
3452	/* We support saved states only from this and older versions. */
3453	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_VERSION)
3454	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
3455
3456	/* Every device first. */
3457	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3458	{
3459	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3460
3461	AssertMsg(!pDevice->cOutstandingRequests,
3462	("There are still outstanding requests on this device\n"));
3463	bool fPresent;
3464	rc = SSMR3GetBool(pSSM, &fPresent);
3465	AssertRCReturn(rc, rc);
3466	if (pDevice->fPresent != fPresent)
3467	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"), i, pDevice->fPresent, fPresent);
3468
3469	if (uPass == SSM_PASS_FINAL)
3470	SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
3471	}
3472
3473	if (uPass != SSM_PASS_FINAL)
3474	return VINF_SUCCESS;
3475
3476	/* Now the main device state. */
3477	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regStatus);
3478	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regInterrupt);
3479	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regGeometry);
3480	SSMR3GetMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3481	SSMR3GetU8 (pSSM, &pBusLogic->uOperationCode);
3482	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE)
3483	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3484	else
3485	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, BUSLOGIC_COMMAND_SIZE_OLD);
3486	SSMR3GetU8 (pSSM, &pBusLogic->iParameter);
3487	SSMR3GetU8 (pSSM, &pBusLogic->cbCommandParametersLeft);
3488	SSMR3GetBool (pSSM, &pBusLogic->fUseLocalRam);
3489	SSMR3GetMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3490	SSMR3GetU8 (pSSM, &pBusLogic->iReply);
3491	SSMR3GetU8 (pSSM, &pBusLogic->cbReplyParametersLeft);
3492	SSMR3GetBool (pSSM, &pBusLogic->fIRQEnabled);
3493	SSMR3GetU8 (pSSM, &pBusLogic->uISABaseCode);
3494	SSMR3GetU32 (pSSM, &pBusLogic->cMailbox);
3495	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX)
3496	SSMR3GetBool (pSSM, &pBusLogic->fMbxIs24Bit);
3497	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxOutgoingBase);
3498	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxOutgoingPositionCurrent);
3499	SSMR3GetU32 (pSSM, (uint32_t *)&pBusLogic->cMailboxesReady);
3500	SSMR3GetBool (pSSM, (bool *)&pBusLogic->fNotificationSent);
3501	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxIncomingBase);
3502	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxIncomingPositionCurrent);
3503	SSMR3GetBool (pSSM, &pBusLogic->fStrictRoundRobinMode);
3504	SSMR3GetBool (pSSM, &pBusLogic->fExtendedLunCCBFormat);
3505
3506	rc = vboxscsiR3LoadExec(&pBusLogic->VBoxSCSI, pSSM);
3507	if (RT_FAILURE(rc))
3508	{
3509	LogRel(("BusLogic: Failed to restore BIOS state: %Rrc.\n", rc));
3510	return PDMDEV_SET_ERROR(pDevIns, rc,
3511	N_("BusLogic: Failed to restore BIOS state\n"));
3512	}
3513
3514	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING)
3515	{
3516	/* Check if there are pending tasks saved. */
3517	uint32_t cTasks = 0;
3518
3519	SSMR3GetU32(pSSM, &cTasks);
3520
3521	if (cTasks)
3522	{
3523	pBusLogic->paGCPhysAddrCCBRedo = (PRTGCPHYS)RTMemAllocZ(cTasks * sizeof(RTGCPHYS));
3524	if (RT_LIKELY(pBusLogic->paGCPhysAddrCCBRedo))
3525	{
3526	pBusLogic->cReqsRedo = cTasks;
3527
3528	for (uint32_t i = 0; i < cTasks; i++)
3529	{
3530	uint32_t u32PhysAddrCCB;
3531
3532	rc = SSMR3GetU32(pSSM, &u32PhysAddrCCB);
3533	if (RT_FAILURE(rc))
3534	break;
3535
3536	pBusLogic->paGCPhysAddrCCBRedo[i] = u32PhysAddrCCB;
3537	}
3538	}
3539	else
3540	rc = VERR_NO_MEMORY;
3541	}
3542	}
3543
3544	if (RT_SUCCESS(rc))
3545	{
3546	uint32_t u32;
3547	rc = SSMR3GetU32(pSSM, &u32);
3548	if (RT_SUCCESS(rc))
3549	AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
3550	}
3551
3552	return rc;
3553	}
3554
3555	/**
3556	* Gets the pointer to the status LED of a device - called from the SCSI driver.
3557	*
3558	* @returns VBox status code.
3559	* @param pInterface Pointer to the interface structure containing the called function pointer.
3560	* @param iLUN The unit which status LED we desire. Always 0 here as the driver
3561	* doesn't know about other LUN's.
3562	* @param ppLed Where to store the LED pointer.
3563	*/
3564	static DECLCALLBACK(int) buslogicR3DeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3565	{
3566	PBUSLOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, ILed);
3567	if (iLUN == 0)
3568	{
3569	*ppLed = &pDevice->Led;
3570	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3571	return VINF_SUCCESS;
3572	}
3573	return VERR_PDM_LUN_NOT_FOUND;
3574	}
3575
3576	/**
3577	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3578	*/
3579	static DECLCALLBACK(void ) buslogicR3DeviceQueryInterface(PPDMIBASE pInterface, const char pszIID)
3580	{
3581	PBUSLOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IBase);
3582	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
3583	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDevice->IMediaPort);
3584	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAEXPORT, &pDevice->IMediaExPort);
3585	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
3586	return NULL;
3587	}
3588
3589	/**
3590	* Gets the pointer to the status LED of a unit.
3591	*
3592	* @returns VBox status code.
3593	* @param pInterface Pointer to the interface structure containing the called function pointer.
3594	* @param iLUN The unit which status LED we desire.
3595	* @param ppLed Where to store the LED pointer.
3596	*/
3597	static DECLCALLBACK(int) buslogicR3StatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3598	{
3599	PBUSLOGIC pBusLogic = RT_FROM_MEMBER(pInterface, BUSLOGIC, ILeds);
3600	if (iLUN < BUSLOGIC_MAX_DEVICES)
3601	{
3602	*ppLed = &pBusLogic->aDeviceStates[iLUN].Led;
3603	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3604	return VINF_SUCCESS;
3605	}
3606	return VERR_PDM_LUN_NOT_FOUND;
3607	}
3608
3609	/**
3610	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3611	*/
3612	static DECLCALLBACK(void ) buslogicR3StatusQueryInterface(PPDMIBASE pInterface, const char pszIID)
3613	{
3614	PBUSLOGIC pThis = RT_FROM_MEMBER(pInterface, BUSLOGIC, IBase);
3615	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3616	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
3617	return NULL;
3618	}
3619
3620	/**
3621	* The worker thread processing requests from the guest.
3622	*
3623	* @returns VBox status code.
3624	* @param pDevIns The device instance.
3625	* @param pThread The thread structure.
3626	*/
3627	static DECLCALLBACK(int) buslogicR3Worker(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
3628	{
3629	RT_NOREF(pDevIns);
3630	PBUSLOGIC pThis = (PBUSLOGIC)pThread->pvUser;
3631	int rc = VINF_SUCCESS;
3632
3633	if (pThread->enmState == PDMTHREADSTATE_INITIALIZING)
3634	return VINF_SUCCESS;
3635
3636	while (pThread->enmState == PDMTHREADSTATE_RUNNING)
3637	{
3638	ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, true);
3639	bool fNotificationSent = ASMAtomicXchgBool(&pThis->fNotificationSent, false);
3640	if (!fNotificationSent)
3641	{
3642	Assert(ASMAtomicReadBool(&pThis->fWrkThreadSleeping));
3643	rc = SUPSemEventWaitNoResume(pThis->pSupDrvSession, pThis->hEvtProcess, RT_INDEFINITE_WAIT);
3644	AssertLogRelMsgReturn(RT_SUCCESS(rc) \|\| rc == VERR_INTERRUPTED, ("%Rrc\n", rc), rc);
3645	if (RT_UNLIKELY(pThread->enmState != PDMTHREADSTATE_RUNNING))
3646	break;
3647	LogFlowFunc(("Woken up with rc=%Rrc\n", rc));
3648	ASMAtomicWriteBool(&pThis->fNotificationSent, false);
3649	}
3650
3651	ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, false);
3652
3653	/* Check whether there is a BIOS request pending and process it first. */
3654	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
3655	{
3656	rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3657	AssertRC(rc);
3658	ASMAtomicXchgBool(&pThis->fBiosReqPending, false);
3659	}
3660	else
3661	{
3662	ASMAtomicXchgU32(&pThis->cMailboxesReady, 0); /** @todo Actually not required anymore but to stay compatible with older saved states. */
3663
3664	/* Process mailboxes. */
3665	do
3666	{
3667	rc = buslogicR3ProcessMailboxNext(pThis);
3668	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc));
3669	} while (RT_SUCCESS(rc));
3670	}
3671	} /* While running */
3672
3673	return VINF_SUCCESS;
3674	}
3675
3676
3677	/**
3678	* Unblock the worker thread so it can respond to a state change.
3679	*
3680	* @returns VBox status code.
3681	* @param pDevIns The device instance.
3682	* @param pThread The send thread.
3683	*/
3684	static DECLCALLBACK(int) buslogicR3WorkerWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
3685	{
3686	RT_NOREF(pThread);
3687	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3688	return SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
3689	}
3690
3691	/**
3692	* BusLogic debugger info callback.
3693	*
3694	* @param pDevIns The device instance.
3695	* @param pHlp The output helpers.
3696	* @param pszArgs The arguments.
3697	*/
3698	static DECLCALLBACK(void) buslogicR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
3699	{
3700	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3701	unsigned i;
3702	bool fVerbose = false;
3703
3704	/* Parse arguments. */
3705	if (pszArgs)
3706	fVerbose = strstr(pszArgs, "verbose") != NULL;
3707
3708	/* Show basic information. */
3709	pHlp->pfnPrintf(pHlp,
3710	"%s#%d: PCI I/O=%RTiop ISA I/O=%RTiop MMIO=%RGp IRQ=%u GC=%RTbool R0=%RTbool\n",
3711	pDevIns->pReg->szName,
3712	pDevIns->iInstance,
3713	pThis->IOPortBase, pThis->IOISABase, pThis->MMIOBase,
3714	PCIDevGetInterruptLine(&pThis->dev),
3715	!!pThis->fGCEnabled, !!pThis->fR0Enabled);
3716
3717	/* Print mailbox state. */
3718	if (pThis->regStatus & BL_STAT_INREQ)
3719	pHlp->pfnPrintf(pHlp, "Mailbox not initialized\n");
3720	else
3721	pHlp->pfnPrintf(pHlp, "%u-bit mailbox with %u entries at %RGp (%d LUN CCBs)\n",
3722	pThis->fMbxIs24Bit ? 24 : 32, pThis->cMailbox,
3723	pThis->GCPhysAddrMailboxOutgoingBase,
3724	pThis->fMbxIs24Bit ? 8 : pThis->fExtendedLunCCBFormat ? 64 : 8);
3725
3726	/* Print register contents. */
3727	pHlp->pfnPrintf(pHlp, "Registers: STAT=%02x INTR=%02x GEOM=%02x\n",
3728	pThis->regStatus, pThis->regInterrupt, pThis->regGeometry);
3729
3730	/* Print miscellaneous state. */
3731	pHlp->pfnPrintf(pHlp, "HAC interrupts: %s\n",
3732	pThis->fIRQEnabled ? "on" : "off");
3733
3734	/* Print the current command, if any. */
3735	if (pThis->uOperationCode != 0xff )
3736	pHlp->pfnPrintf(pHlp, "Current command: %02X\n", pThis->uOperationCode);
3737
3738	if (fVerbose && (pThis->regStatus & BL_STAT_INREQ) == 0)
3739	{
3740	RTGCPHYS GCMailbox;
3741
3742	/* Dump the mailbox contents. */
3743	if (pThis->fMbxIs24Bit)
3744	{
3745	Mailbox24 Mbx24;
3746
3747	/* Outgoing mailbox, 24-bit format. */
3748	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3749	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (24-bit) at %06X:\n", GCMailbox);
3750	for (i = 0; i < pThis->cMailbox; ++i)
3751	{
3752	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3753	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X action code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3754	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3755	GCMailbox += sizeof(Mailbox24);
3756	}
3757
3758	/* Incoming mailbox, 24-bit format. */
3759	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox24));
3760	pHlp->pfnPrintf(pHlp, " Incoming mailbox entries (24-bit) at %06X:\n", GCMailbox);
3761	for (i = 0; i < pThis->cMailbox; ++i)
3762	{
3763	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3764	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X completion code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3765	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxIncomingPositionCurrent == i ? " *" : "");
3766	GCMailbox += sizeof(Mailbox24);
3767	}
3768
3769	}
3770	else
3771	{
3772	Mailbox32 Mbx32;
3773
3774	/* Outgoing mailbox, 32-bit format. */
3775	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3776	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3777	for (i = 0; i < pThis->cMailbox; ++i)
3778	{
3779	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3780	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X action code %02X", i, Mbx32.u32PhysAddrCCB, Mbx32.u.out.uActionCode);
3781	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3782	GCMailbox += sizeof(Mailbox32);
3783	}
3784
3785	/* Incoming mailbox, 32-bit format. */
3786	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox32));
3787	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3788	for (i = 0; i < pThis->cMailbox; ++i)
3789	{
3790	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3791	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X completion code %02X BTSTAT %02X SDSTAT %02X", i,
3792	Mbx32.u32PhysAddrCCB, Mbx32.u.in.uCompletionCode, Mbx32.u.in.uHostAdapterStatus, Mbx32.u.in.uTargetDeviceStatus);
3793	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3794	GCMailbox += sizeof(Mailbox32);
3795	}
3796
3797	}
3798	}
3799	}
3800
3801	/* -=-=-=-=- Helper -=-=-=-=- */
3802
3803	/**
3804	* Checks if all asynchronous I/O is finished.
3805	*
3806	* Used by buslogicR3Reset, buslogicR3Suspend and buslogicR3PowerOff.
3807	*
3808	* @returns true if quiesced, false if busy.
3809	* @param pDevIns The device instance.
3810	*/
3811	static bool buslogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
3812	{
3813	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3814
3815	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3816	{
3817	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
3818	if (pThisDevice->pDrvBase)
3819	{
3820	if (pThisDevice->cOutstandingRequests != 0)
3821	return false;
3822	}
3823	}
3824
3825	return true;
3826	}
3827
3828	/**
3829	* Callback employed by buslogicR3Suspend and buslogicR3PowerOff.
3830	*
3831	* @returns true if we've quiesced, false if we're still working.
3832	* @param pDevIns The device instance.
3833	*/
3834	static DECLCALLBACK(bool) buslogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
3835	{
3836	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3837	return false;
3838
3839	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3840	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3841	return true;
3842	}
3843
3844	/**
3845	* Common worker for buslogicR3Suspend and buslogicR3PowerOff.
3846	*/
3847	static void buslogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns)
3848	{
3849	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3850
3851	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3852	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3853	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncSuspendOrPowerOffDone);
3854	else
3855	{
3856	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3857	AssertMsg(!pThis->fNotificationSent, ("The PDM Queue should be empty at this point\n"));
3858	}
3859
3860	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3861	{
3862	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
3863	if (pThisDevice->pDrvMediaEx)
3864	pThisDevice->pDrvMediaEx->pfnNotifySuspend(pThisDevice->pDrvMediaEx);
3865	}
3866	}
3867
3868	/**
3869	* Suspend notification.
3870	*
3871	* @param pDevIns The device instance data.
3872	*/
3873	static DECLCALLBACK(void) buslogicR3Suspend(PPDMDEVINS pDevIns)
3874	{
3875	Log(("buslogicR3Suspend\n"));
3876	buslogicR3SuspendOrPowerOff(pDevIns);
3877	}
3878
3879	/**
3880	* Detach notification.
3881	*
3882	* One harddisk at one port has been unplugged.
3883	* The VM is suspended at this point.
3884	*
3885	* @param pDevIns The device instance.
3886	* @param iLUN The logical unit which is being detached.
3887	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3888	*/
3889	static DECLCALLBACK(void) buslogicR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3890	{
3891	RT_NOREF(fFlags);
3892	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3893	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3894
3895	Log(("%s:\n", __FUNCTION__));
3896
3897	AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3898	("BusLogic: Device does not support hotplugging\n"));
3899
3900	/*
3901	* Zero some important members.
3902	*/
3903	pDevice->fPresent = false;
3904	pDevice->pDrvBase = NULL;
3905	pDevice->pDrvMedia = NULL;
3906	pDevice->pDrvMediaEx = NULL;
3907	}
3908
3909	/**
3910	* Attach command.
3911	*
3912	* This is called when we change block driver.
3913	*
3914	* @returns VBox status code.
3915	* @param pDevIns The device instance.
3916	* @param iLUN The logical unit which is being detached.
3917	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3918	*/
3919	static DECLCALLBACK(int) buslogicR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3920	{
3921	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3922	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3923	int rc;
3924
3925	AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3926	("BusLogic: Device does not support hotplugging\n"),
3927	VERR_INVALID_PARAMETER);
3928
3929	/* the usual paranoia */
3930	AssertRelease(!pDevice->pDrvBase);
3931	AssertRelease(!pDevice->pDrvMedia);
3932	AssertRelease(!pDevice->pDrvMediaEx);
3933	Assert(pDevice->iLUN == iLUN);
3934
3935	/*
3936	* Try attach the SCSI driver and get the interfaces,
3937	* required as well as optional.
3938	*/
3939	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
3940	if (RT_SUCCESS(rc))
3941	{
3942	/* Query the media interface. */
3943	pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
3944	AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
3945	("BusLogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
3946	VERR_PDM_MISSING_INTERFACE);
3947
3948	/* Get the extended media interface. */
3949	pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
3950	AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
3951	("BusLogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
3952	VERR_PDM_MISSING_INTERFACE);
3953
3954	rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(BUSLOGICREQ));
3955	AssertMsgRCReturn(rc, ("BusLogic configuration error: LUN#%u: Failed to set I/O request size!", pDevice->iLUN),
3956	rc);
3957
3958	pDevice->fPresent = true;
3959	}
3960	else
3961	AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
3962
3963	if (RT_FAILURE(rc))
3964	{
3965	pDevice->fPresent = false;
3966	pDevice->pDrvBase = NULL;
3967	pDevice->pDrvMedia = NULL;
3968	pDevice->pDrvMediaEx = NULL;
3969	}
3970	return rc;
3971	}
3972
3973	/**
3974	* Callback employed by buslogicR3Reset.
3975	*
3976	* @returns true if we've quiesced, false if we're still working.
3977	* @param pDevIns The device instance.
3978	*/
3979	static DECLCALLBACK(bool) buslogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
3980	{
3981	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3982
3983	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3984	return false;
3985	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3986
3987	buslogicR3HwReset(pThis, true);
3988	return true;
3989	}
3990
3991	/**
3992	* @copydoc FNPDMDEVRESET
3993	*/
3994	static DECLCALLBACK(void) buslogicR3Reset(PPDMDEVINS pDevIns)
3995	{
3996	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3997
3998	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3999	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
4000	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncResetDone);
4001	else
4002	{
4003	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
4004	buslogicR3HwReset(pThis, true);
4005	}
4006	}
4007
4008	static DECLCALLBACK(void) buslogicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
4009	{
4010	RT_NOREF(offDelta);
4011	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4012
4013	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
4014	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
4015
4016	for (uint32_t i = 0; i < BUSLOGIC_MAX_DEVICES; i++)
4017	{
4018	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
4019
4020	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
4021	}
4022
4023	}
4024
4025	/**
4026	* Poweroff notification.
4027	*
4028	* @param pDevIns Pointer to the device instance
4029	*/
4030	static DECLCALLBACK(void) buslogicR3PowerOff(PPDMDEVINS pDevIns)
4031	{
4032	Log(("buslogicR3PowerOff\n"));
4033	buslogicR3SuspendOrPowerOff(pDevIns);
4034	}
4035
4036	/**
4037	* Destroy a driver instance.
4038	*
4039	* Most VM resources are freed by the VM. This callback is provided so that any non-VM
4040	* resources can be freed correctly.
4041	*
4042	* @param pDevIns The device instance data.
4043	*/
4044	static DECLCALLBACK(int) buslogicR3Destruct(PPDMDEVINS pDevIns)
4045	{
4046	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4047	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
4048
4049	PDMR3CritSectDelete(&pThis->CritSectIntr);
4050
4051	if (pThis->hEvtProcess != NIL_SUPSEMEVENT)
4052	{
4053	SUPSemEventClose(pThis->pSupDrvSession, pThis->hEvtProcess);
4054	pThis->hEvtProcess = NIL_SUPSEMEVENT;
4055	}
4056
4057	return VINF_SUCCESS;
4058	}
4059
4060	/**
4061	* @interface_method_impl{PDMDEVREG,pfnConstruct}
4062	*/
4063	static DECLCALLBACK(int) buslogicR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
4064	{
4065	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4066	int rc = VINF_SUCCESS;
4067	bool fBootable = true;
4068	char achISACompat[16];
4069	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
4070
4071	/*
4072	* Init instance data (do early because of constructor).
4073	*/
4074	pThis->pDevInsR3 = pDevIns;
4075	pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
4076	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
4077	pThis->IBase.pfnQueryInterface = buslogicR3StatusQueryInterface;
4078	pThis->ILeds.pfnQueryStatusLed = buslogicR3StatusQueryStatusLed;
4079
4080	PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */
4081	PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */
4082	PCIDevSetCommand (&pThis->dev, PCI_COMMAND_IOACCESS \| PCI_COMMAND_MEMACCESS);
4083	PCIDevSetRevisionId (&pThis->dev, 0x01);
4084	PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */
4085	PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */
4086	PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */
4087	PCIDevSetBaseAddress (&pThis->dev, 0, true /IO/, false /Pref/, false /64-bit/, 0x00000000);
4088	PCIDevSetBaseAddress (&pThis->dev, 1, false /IO/, false /Pref/, false /64-bit/, 0x00000000);
4089	PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);
4090	PCIDevSetSubSystemId (&pThis->dev, 0x1040);
4091	PCIDevSetInterruptLine (&pThis->dev, 0x00);
4092	PCIDevSetInterruptPin (&pThis->dev, 0x01);
4093
4094	/*
4095	* Validate and read configuration.
4096	*/
4097	if (!CFGMR3AreValuesValid(pCfg,
4098	"GCEnabled\0"
4099	"R0Enabled\0"
4100	"Bootable\0"
4101	"ISACompat\0"))
4102	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4103	N_("BusLogic configuration error: unknown option specified"));
4104
4105	rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
4106	if (RT_FAILURE(rc))
4107	return PDMDEV_SET_ERROR(pDevIns, rc,
4108	N_("BusLogic configuration error: failed to read GCEnabled as boolean"));
4109	Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
4110
4111	rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
4112	if (RT_FAILURE(rc))
4113	return PDMDEV_SET_ERROR(pDevIns, rc,
4114	N_("BusLogic configuration error: failed to read R0Enabled as boolean"));
4115	Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
4116	rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
4117	if (RT_FAILURE(rc))
4118	return PDMDEV_SET_ERROR(pDevIns, rc,
4119	N_("BusLogic configuration error: failed to read Bootable as boolean"));
4120	Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
4121
4122	/* Only the first instance defaults to having the ISA compatibility ports enabled. */
4123	if (iInstance == 0)
4124	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Alternate");
4125	else
4126	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Disabled");
4127	if (RT_FAILURE(rc))
4128	return PDMDEV_SET_ERROR(pDevIns, rc,
4129	N_("BusLogic configuration error: failed to read ISACompat as string"));
4130	Log(("%s: ISACompat=%s\n", __FUNCTION__, achISACompat));
4131
4132	/* Grok the ISACompat setting. */
4133	if (!strcmp(achISACompat, "Disabled"))
4134	pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
4135	else if (!strcmp(achISACompat, "Primary"))
4136	pThis->uDefaultISABaseCode = 0; /* I/O base at 330h. */
4137	else if (!strcmp(achISACompat, "Alternate"))
4138	pThis->uDefaultISABaseCode = 1; /* I/O base at 334h. */
4139	else
4140	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4141	N_("BusLogic configuration error: invalid ISACompat setting"));
4142
4143	/*
4144	* Register the PCI device and its I/O regions.
4145	*/
4146	rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev);
4147	if (RT_FAILURE(rc))
4148	return rc;
4149
4150	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicR3MmioMap);
4151	if (RT_FAILURE(rc))
4152	return rc;
4153
4154	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicR3MmioMap);
4155	if (RT_FAILURE(rc))
4156	return rc;
4157
4158	if (fBootable)
4159	{
4160	/* Register I/O port space for BIOS access. */
4161	rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 4, NULL,
4162	buslogicR3BiosIoPortWrite, buslogicR3BiosIoPortRead,
4163	buslogicR3BiosIoPortWriteStr, buslogicR3BiosIoPortReadStr,
4164	"BusLogic BIOS");
4165	if (RT_FAILURE(rc))
4166	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register BIOS I/O handlers"));
4167	}
4168
4169	/* Set up the compatibility I/O range. */
4170	rc = buslogicR3RegisterISARange(pThis, pThis->uDefaultISABaseCode);
4171	if (RT_FAILURE(rc))
4172	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers"));
4173
4174	/* Initialize task queue. */
4175	rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0,
4176	buslogicR3NotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);
4177	if (RT_FAILURE(rc))
4178	return rc;
4179	pThis->pNotifierQueueR0 = PDMQueueR0Ptr(pThis->pNotifierQueueR3);
4180	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
4181
4182	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance);
4183	if (RT_FAILURE(rc))
4184	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic: cannot create critical section"));
4185
4186	/*
4187	* Create event semaphore and worker thread.
4188	*/
4189	rc = SUPSemEventCreate(pThis->pSupDrvSession, &pThis->hEvtProcess);
4190	if (RT_FAILURE(rc))
4191	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4192	N_("BusLogic: Failed to create SUP event semaphore"));
4193
4194	char szDevTag[20];
4195	RTStrPrintf(szDevTag, sizeof(szDevTag), "BUSLOGIC-%u", iInstance);
4196
4197	rc = PDMDevHlpThreadCreate(pDevIns, &pThis->pThreadWrk, pThis, buslogicR3Worker,
4198	buslogicR3WorkerWakeUp, 0, RTTHREADTYPE_IO, szDevTag);
4199	if (RT_FAILURE(rc))
4200	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4201	N_("BusLogic: Failed to create worker thread %s"), szDevTag);
4202
4203	/* Initialize per device state. */
4204	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
4205	{
4206	char szName[24];
4207	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
4208
4209	char *pszName;
4210	if (RTStrAPrintf(&pszName, "Device%u", i) < 0)
4211	AssertLogRelFailedReturn(VERR_NO_MEMORY);
4212
4213	/* Initialize static parts of the device. */
4214	pDevice->iLUN = i;
4215	pDevice->pBusLogicR3 = pThis;
4216	pDevice->pBusLogicR0 = PDMINS_2_DATA_R0PTR(pDevIns);
4217	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
4218	pDevice->Led.u32Magic = PDMLED_MAGIC;
4219	pDevice->IBase.pfnQueryInterface = buslogicR3DeviceQueryInterface;
4220	pDevice->IMediaPort.pfnQueryDeviceLocation = buslogicR3QueryDeviceLocation;
4221	pDevice->IMediaExPort.pfnIoReqCompleteNotify = buslogicR3IoReqCompleteNotify;
4222	pDevice->IMediaExPort.pfnIoReqCopyFromBuf = buslogicR3IoReqCopyFromBuf;
4223	pDevice->IMediaExPort.pfnIoReqCopyToBuf = buslogicR3IoReqCopyToBuf;
4224	pDevice->IMediaExPort.pfnIoReqQueryBuf = NULL;
4225	pDevice->IMediaExPort.pfnIoReqQueryDiscardRanges = NULL;
4226	pDevice->IMediaExPort.pfnIoReqStateChanged = buslogicR3IoReqStateChanged;
4227	pDevice->IMediaExPort.pfnMediumEjected = buslogicR3MediumEjected;
4228	pDevice->ILed.pfnQueryStatusLed = buslogicR3DeviceQueryStatusLed;
4229
4230	/* Attach SCSI driver. */
4231	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, pszName);
4232	if (RT_SUCCESS(rc))
4233	{
4234	/* Query the media interface. */
4235	pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
4236	AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
4237	("Buslogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
4238	VERR_PDM_MISSING_INTERFACE);
4239
4240	/* Get the extended media interface. */
4241	pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
4242	AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
4243	("Buslogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
4244	VERR_PDM_MISSING_INTERFACE);
4245
4246	rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(BUSLOGICREQ));
4247	if (RT_FAILURE(rc))
4248	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4249	N_("Buslogic configuration error: LUN#%u: Failed to set I/O request size!"),
4250	pDevice->iLUN);
4251
4252	pDevice->fPresent = true;
4253	}
4254	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
4255	{
4256	pDevice->fPresent = false;
4257	pDevice->pDrvBase = NULL;
4258	pDevice->pDrvMedia = NULL;
4259	pDevice->pDrvMediaEx = NULL;
4260	rc = VINF_SUCCESS;
4261	Log(("BusLogic: no driver attached to device %s\n", szName));
4262	}
4263	else
4264	{
4265	AssertLogRelMsgFailed(("BusLogic: Failed to attach %s\n", szName));
4266	return rc;
4267	}
4268	}
4269
4270	/*
4271	* Attach status driver (optional).
4272	*/
4273	PPDMIBASE pBase;
4274	rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
4275	if (RT_SUCCESS(rc))
4276	{
4277	pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
4278	pThis->pMediaNotify = PDMIBASE_QUERY_INTERFACE(pBase, PDMIMEDIANOTIFY);
4279	}
4280	else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
4281	{
4282	AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
4283	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot attach to status driver"));
4284	}
4285
4286	rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL,
4287	NULL, buslogicR3LiveExec, NULL,
4288	NULL, buslogicR3SaveExec, NULL,
4289	NULL, buslogicR3LoadExec, buslogicR3LoadDone);
4290	if (RT_FAILURE(rc))
4291	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers"));
4292
4293	/*
4294	* Register the debugger info callback.
4295	*/
4296	char szTmp[128];
4297	RTStrPrintf(szTmp, sizeof(szTmp), "%s%d", pDevIns->pReg->szName, pDevIns->iInstance);
4298	PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "BusLogic HBA info", buslogicR3Info);
4299
4300	rc = buslogicR3HwReset(pThis, true);
4301	AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc));
4302
4303	return rc;
4304	}
4305
4306	/**
4307	* The device registration structure.
4308	*/
4309	const PDMDEVREG g_DeviceBusLogic =
4310	{
4311	/* u32Version */
4312	PDM_DEVREG_VERSION,
4313	/* szName */
4314	"buslogic",
4315	/* szRCMod */
4316	"VBoxDDRC.rc",
4317	/* szR0Mod */
4318	"VBoxDDR0.r0",
4319	/* pszDescription */
4320	"BusLogic BT-958 SCSI host adapter.\n",
4321	/* fFlags */
4322	PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0 \|
4323	PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION \| PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION \|
4324	PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
4325	/* fClass */
4326	PDM_DEVREG_CLASS_STORAGE,
4327	/* cMaxInstances */
4328	~0U,
4329	/* cbInstance */
4330	sizeof(BUSLOGIC),
4331	/* pfnConstruct */
4332	buslogicR3Construct,
4333	/* pfnDestruct */
4334	buslogicR3Destruct,
4335	/* pfnRelocate */
4336	buslogicR3Relocate,
4337	/* pfnMemSetup */
4338	NULL,
4339	/* pfnPowerOn */
4340	NULL,
4341	/* pfnReset */
4342	buslogicR3Reset,
4343	/* pfnSuspend */
4344	buslogicR3Suspend,
4345	/* pfnResume */
4346	NULL,
4347	/* pfnAttach */
4348	buslogicR3Attach,
4349	/* pfnDetach */
4350	buslogicR3Detach,
4351	/* pfnQueryInterface. */
4352	NULL,
4353	/* pfnInitComplete */
4354	NULL,
4355	/* pfnPowerOff */
4356	buslogicR3PowerOff,
4357	/* pfnSoftReset */
4358	NULL,
4359	/* u32VersionEnd */
4360	PDM_DEVREG_VERSION
4361	};
4362
4363	#endif /* IN_RING3 */
4364	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

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source: vbox/trunk/src/VBox/Devices/Storage/DevBusLogic.cpp@ 73097

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