VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/DevBusLogic.cpp@ 59248

Last change on this file since 59248 was 57358, checked in by vboxsync, 9 years ago

*: scm cleanup run.

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1/* $Id: DevBusLogic.cpp 57358 2015-08-14 15:16:38Z vboxsync $ */
2/** @file
3 * VBox storage devices - BusLogic SCSI host adapter BT-958.
4 *
5 * Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual.
6 */
7
8/*
9 * Copyright (C) 2006-2015 Oracle Corporation
10 *
11 * This file is part of VirtualBox Open Source Edition (OSE), as
12 * available from http://www.virtualbox.org. This file is free software;
13 * you can redistribute it and/or modify it under the terms of the GNU
14 * General Public License (GPL) as published by the Free Software
15 * Foundation, in version 2 as it comes in the "COPYING" file of the
16 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
17 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
18 */
19
20
21/*********************************************************************************************************************************
22* Header Files *
23*********************************************************************************************************************************/
24#define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC
25#include <VBox/vmm/pdmdev.h>
26#include <VBox/vmm/pdmifs.h>
27#include <VBox/vmm/pdmcritsect.h>
28#include <VBox/scsi.h>
29#include <iprt/asm.h>
30#include <iprt/assert.h>
31#include <iprt/string.h>
32#include <iprt/log.h>
33#ifdef IN_RING3
34# include <iprt/alloc.h>
35# include <iprt/memcache.h>
36# include <iprt/param.h>
37# include <iprt/uuid.h>
38#endif
39
40#include "VBoxSCSI.h"
41#include "VBoxDD.h"
42
43
44/*********************************************************************************************************************************
45* Defined Constants And Macros *
46*********************************************************************************************************************************/
47/** Maximum number of attached devices the adapter can handle. */
48#define BUSLOGIC_MAX_DEVICES 16
49
50/** Maximum number of scatter gather elements this device can handle. */
51#define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128
52
53/** Size of the command buffer. */
54#define BUSLOGIC_COMMAND_SIZE_MAX 53
55
56/** Size of the reply buffer. */
57#define BUSLOGIC_REPLY_SIZE_MAX 64
58
59/** Custom fixed I/O ports for BIOS controller access.
60 * Note that these should not be in the ISA range (below 400h) to avoid
61 * conflicts with ISA device probing. Addresses in the 300h-340h range should be
62 * especially avoided.
63 */
64#define BUSLOGIC_BIOS_IO_PORT 0x430
65
66/** State saved version. */
67#define BUSLOGIC_SAVED_STATE_MINOR_VERSION 4
68
69/** Saved state version before the suspend on error feature was implemented. */
70#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
71/** Saved state version before 24-bit mailbox support was implemented. */
72#define BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX 2
73/** Saved state version before command buffer size was raised. */
74#define BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE 3
75
76/** Command buffer size in old saved states. */
77#define BUSLOGIC_COMMAND_SIZE_OLD 5
78
79/** The duration of software-initiated reset (in nano seconds).
80 * Not documented, set to 50 ms. */
81#define BUSLOGIC_RESET_DURATION_NS UINT64_C(50000000)
82
83
84/*********************************************************************************************************************************
85* Structures and Typedefs *
86*********************************************************************************************************************************/
87/**
88 * State of a device attached to the buslogic host adapter.
89 *
90 * @implements PDMIBASE
91 * @implements PDMISCSIPORT
92 * @implements PDMILEDPORTS
93 */
94typedef struct BUSLOGICDEVICE
95{
96 /** Pointer to the owning buslogic device instance. - R3 pointer */
97 R3PTRTYPE(struct BUSLOGIC *) pBusLogicR3;
98 /** Pointer to the owning buslogic device instance. - R0 pointer */
99 R0PTRTYPE(struct BUSLOGIC *) pBusLogicR0;
100 /** Pointer to the owning buslogic device instance. - RC pointer */
101 RCPTRTYPE(struct BUSLOGIC *) pBusLogicRC;
102
103 /** Flag whether device is present. */
104 bool fPresent;
105 /** LUN of the device. */
106 RTUINT iLUN;
107
108#if HC_ARCH_BITS == 64
109 uint32_t Alignment0;
110#endif
111
112 /** Our base interface. */
113 PDMIBASE IBase;
114 /** SCSI port interface. */
115 PDMISCSIPORT ISCSIPort;
116 /** Led interface. */
117 PDMILEDPORTS ILed;
118 /** Pointer to the attached driver's base interface. */
119 R3PTRTYPE(PPDMIBASE) pDrvBase;
120 /** Pointer to the underlying SCSI connector interface. */
121 R3PTRTYPE(PPDMISCSICONNECTOR) pDrvSCSIConnector;
122 /** The status LED state for this device. */
123 PDMLED Led;
124
125#if HC_ARCH_BITS == 64
126 uint32_t Alignment1;
127#endif
128
129 /** Number of outstanding tasks on the port. */
130 volatile uint32_t cOutstandingRequests;
131
132} BUSLOGICDEVICE, *PBUSLOGICDEVICE;
133
134/**
135 * Commands the BusLogic adapter supports.
136 */
137enum BUSLOGICCOMMAND
138{
139 BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
140 BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
141 BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
142 BUSLOGICCOMMAND_EXECUTE_BIOS_COMMAND = 0x03,
143 BUSLOGICCOMMAND_INQUIRE_BOARD_ID = 0x04,
144 BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT = 0x05,
145 BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT = 0x06,
146 BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS = 0x07,
147 BUSLOGICCOMMAND_SET_TIME_OFF_BUS = 0x08,
148 BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE = 0x09,
149 BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7 = 0x0a,
150 BUSLOGICCOMMAND_INQUIRE_CONFIGURATION = 0x0b,
151 BUSLOGICCOMMAND_ENABLE_TARGET_MODE = 0x0c,
152 BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION = 0x0d,
153 BUSLOGICCOMMAND_WRITE_ADAPTER_LOCAL_RAM = 0x1a,
154 BUSLOGICCOMMAND_READ_ADAPTER_LOCAL_RAM = 0x1b,
155 BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO = 0x1c,
156 BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO = 0x1d,
157 BUSLOGICCOMMAND_ECHO_COMMAND_DATA = 0x1f,
158 BUSLOGICCOMMAND_HOST_ADAPTER_DIAGNOSTIC = 0x20,
159 BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS = 0x21,
160 BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15 = 0x23,
161 BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES = 0x24,
162 BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT = 0x25,
163 BUSLOGICCOMMAND_EXT_BIOS_INFO = 0x28,
164 BUSLOGICCOMMAND_UNLOCK_MAILBOX = 0x29,
165 BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX = 0x81,
166 BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND = 0x83,
167 BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER = 0x84,
168 BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER = 0x85,
169 BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION = 0x86,
170 BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER = 0x8b,
171 BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD = 0x8c,
172 BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION = 0x8d,
173 BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE = 0x8f,
174 BUSLOGICCOMMAND_STORE_HOST_ADAPTER_LOCAL_RAM = 0x90,
175 BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM = 0x91,
176 BUSLOGICCOMMAND_STORE_LOCAL_DATA_IN_EEPROM = 0x92,
177 BUSLOGICCOMMAND_UPLOAD_AUTO_SCSI_CODE = 0x94,
178 BUSLOGICCOMMAND_MODIFY_IO_ADDRESS = 0x95,
179 BUSLOGICCOMMAND_SET_CCB_FORMAT = 0x96,
180 BUSLOGICCOMMAND_WRITE_INQUIRY_BUFFER = 0x9a,
181 BUSLOGICCOMMAND_READ_INQUIRY_BUFFER = 0x9b,
182 BUSLOGICCOMMAND_FLASH_ROM_UPLOAD_DOWNLOAD = 0xa7,
183 BUSLOGICCOMMAND_READ_SCAM_DATA = 0xa8,
184 BUSLOGICCOMMAND_WRITE_SCAM_DATA = 0xa9
185} BUSLOGICCOMMAND;
186
187#pragma pack(1)
188/**
189 * Auto SCSI structure which is located
190 * in host adapter RAM and contains several
191 * configuration parameters.
192 */
193typedef struct AutoSCSIRam
194{
195 uint8_t aInternalSignature[2];
196 uint8_t cbInformation;
197 uint8_t aHostAdaptertype[6];
198 uint8_t uReserved1;
199 bool fFloppyEnabled : 1;
200 bool fFloppySecondary : 1;
201 bool fLevelSensitiveInterrupt : 1;
202 unsigned char uReserved2 : 2;
203 unsigned char uSystemRAMAreForBIOS : 3;
204 unsigned char uDMAChannel : 7;
205 bool fDMAAutoConfiguration : 1;
206 unsigned char uIrqChannel : 7;
207 bool fIrqAutoConfiguration : 1;
208 uint8_t uDMATransferRate;
209 uint8_t uSCSIId;
210 bool fLowByteTerminated : 1;
211 bool fParityCheckingEnabled : 1;
212 bool fHighByteTerminated : 1;
213 bool fNoisyCablingEnvironment : 1;
214 bool fFastSynchronousNeogtiation : 1;
215 bool fBusResetEnabled : 1;
216 bool fReserved3 : 1;
217 bool fActiveNegotiationEnabled : 1;
218 uint8_t uBusOnDelay;
219 uint8_t uBusOffDelay;
220 bool fHostAdapterBIOSEnabled : 1;
221 bool fBIOSRedirectionOfInt19 : 1;
222 bool fExtendedTranslation : 1;
223 bool fMapRemovableAsFixed : 1;
224 bool fReserved4 : 1;
225 bool fBIOSSupportsMoreThan2Drives : 1;
226 bool fBIOSInterruptMode : 1;
227 bool fFlopticalSupport : 1;
228 uint16_t u16DeviceEnabledMask;
229 uint16_t u16WidePermittedMask;
230 uint16_t u16FastPermittedMask;
231 uint16_t u16SynchronousPermittedMask;
232 uint16_t u16DisconnectPermittedMask;
233 uint16_t u16SendStartUnitCommandMask;
234 uint16_t u16IgnoreInBIOSScanMask;
235 unsigned char uPCIInterruptPin : 2;
236 unsigned char uHostAdapterIoPortAddress : 2;
237 bool fStrictRoundRobinMode : 1;
238 bool fVesaBusSpeedGreaterThan33MHz : 1;
239 bool fVesaBurstWrite : 1;
240 bool fVesaBurstRead : 1;
241 uint16_t u16UltraPermittedMask;
242 uint32_t uReserved5;
243 uint8_t uReserved6;
244 uint8_t uAutoSCSIMaximumLUN;
245 bool fReserved7 : 1;
246 bool fSCAMDominant : 1;
247 bool fSCAMenabled : 1;
248 bool fSCAMLevel2 : 1;
249 unsigned char uReserved8 : 4;
250 bool fInt13Extension : 1;
251 bool fReserved9 : 1;
252 bool fCDROMBoot : 1;
253 unsigned char uReserved10 : 5;
254 unsigned char uBootTargetId : 4;
255 unsigned char uBootChannel : 4;
256 bool fForceBusDeviceScanningOrder : 1;
257 unsigned char uReserved11 : 7;
258 uint16_t u16NonTaggedToAlternateLunPermittedMask;
259 uint16_t u16RenegotiateSyncAfterCheckConditionMask;
260 uint8_t aReserved12[10];
261 uint8_t aManufacturingDiagnostic[2];
262 uint16_t u16Checksum;
263} AutoSCSIRam, *PAutoSCSIRam;
264AssertCompileSize(AutoSCSIRam, 64);
265#pragma pack()
266
267/**
268 * The local Ram.
269 */
270typedef union HostAdapterLocalRam
271{
272 /** Byte view. */
273 uint8_t u8View[256];
274 /** Structured view. */
275 struct
276 {
277 /** Offset 0 - 63 is for BIOS. */
278 uint8_t u8Bios[64];
279 /** Auto SCSI structure. */
280 AutoSCSIRam autoSCSIData;
281 } structured;
282} HostAdapterLocalRam, *PHostAdapterLocalRam;
283AssertCompileSize(HostAdapterLocalRam, 256);
284
285
286/** Ugly 24-bit big-endian addressing. */
287typedef struct
288{
289 uint8_t hi;
290 uint8_t mid;
291 uint8_t lo;
292} Addr24, Len24;
293AssertCompileSize(Addr24, 3);
294
295#define ADDR_TO_U32(x) (((x).hi << 16) | ((x).mid << 8) | (x).lo)
296#define LEN_TO_U32 ADDR_TO_U32
297#define U32_TO_ADDR(a, x) do {(a).hi = (x) >> 16; (a).mid = (x) >> 8; (a).lo = (x);} while(0)
298#define U32_TO_LEN U32_TO_ADDR
299
300/** @name Compatible ISA base I/O port addresses. Disabled if zero.
301 * @{ */
302#define NUM_ISA_BASES 8
303#define MAX_ISA_BASE (NUM_ISA_BASES - 1)
304#define ISA_BASE_DISABLED 6
305
306static uint16_t const g_aISABases[NUM_ISA_BASES] =
307{
308 0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0
309};
310/** @} */
311
312/** Pointer to a task state structure. */
313typedef struct BUSLOGICTASKSTATE *PBUSLOGICTASKSTATE;
314
315/**
316 * Main BusLogic device state.
317 *
318 * @extends PCIDEVICE
319 * @implements PDMILEDPORTS
320 */
321typedef struct BUSLOGIC
322{
323 /** The PCI device structure. */
324 PCIDEVICE dev;
325 /** Pointer to the device instance - HC ptr */
326 PPDMDEVINSR3 pDevInsR3;
327 /** Pointer to the device instance - R0 ptr */
328 PPDMDEVINSR0 pDevInsR0;
329 /** Pointer to the device instance - RC ptr. */
330 PPDMDEVINSRC pDevInsRC;
331
332 /** Whether R0 is enabled. */
333 bool fR0Enabled;
334 /** Whether RC is enabled. */
335 bool fGCEnabled;
336
337 /** Base address of the I/O ports. */
338 RTIOPORT IOPortBase;
339 /** Base address of the memory mapping. */
340 RTGCPHYS MMIOBase;
341 /** Status register - Readonly. */
342 volatile uint8_t regStatus;
343 /** Interrupt register - Readonly. */
344 volatile uint8_t regInterrupt;
345 /** Geometry register - Readonly. */
346 volatile uint8_t regGeometry;
347 /** Pending (delayed) interrupt. */
348 uint8_t uPendingIntr;
349
350 /** Local RAM for the fetch hostadapter local RAM request.
351 * I don't know how big the buffer really is but the maximum
352 * seems to be 256 bytes because the offset and count field in the command request
353 * are only one byte big.
354 */
355 HostAdapterLocalRam LocalRam;
356
357 /** Command code the guest issued. */
358 uint8_t uOperationCode;
359 /** Buffer for the command parameters the adapter is currently receiving from the guest.
360 * Size of the largest command which is possible.
361 */
362 uint8_t aCommandBuffer[BUSLOGIC_COMMAND_SIZE_MAX]; /* Size of the biggest request. */
363 /** Current position in the command buffer. */
364 uint8_t iParameter;
365 /** Parameters left until the command is complete. */
366 uint8_t cbCommandParametersLeft;
367
368 /** Whether we are using the RAM or reply buffer. */
369 bool fUseLocalRam;
370 /** Buffer to store reply data from the controller to the guest. */
371 uint8_t aReplyBuffer[BUSLOGIC_REPLY_SIZE_MAX]; /* Size of the biggest reply. */
372 /** Position in the buffer we are reading next. */
373 uint8_t iReply;
374 /** Bytes left until the reply buffer is empty. */
375 uint8_t cbReplyParametersLeft;
376
377 /** Flag whether IRQs are enabled. */
378 bool fIRQEnabled;
379 /** Flag whether the ISA I/O port range is disabled
380 * to prevent the BIOS to access the device. */
381 bool fISAEnabled; /**< @todo unused, to be removed */
382 /** Flag whether 24-bit mailboxes are in use (default is 32-bit). */
383 bool fMbxIs24Bit;
384 /** ISA I/O port base (encoded in FW-compatible format). */
385 uint8_t uISABaseCode;
386
387 /** ISA I/O port base (disabled if zero). */
388 RTIOPORT IOISABase;
389 /** Default ISA I/O port base in FW-compatible format. */
390 uint8_t uDefaultISABaseCode;
391
392 /** Number of mailboxes the guest set up. */
393 uint32_t cMailbox;
394
395#if HC_ARCH_BITS == 64
396 uint32_t Alignment0;
397#endif
398
399 /** Time when HBA reset was last initiated. */ /**< @todo does this need to be saved? */
400 uint64_t u64ResetTime;
401 /** Physical base address of the outgoing mailboxes. */
402 RTGCPHYS GCPhysAddrMailboxOutgoingBase;
403 /** Current outgoing mailbox position. */
404 uint32_t uMailboxOutgoingPositionCurrent;
405 /** Number of mailboxes ready. */
406 volatile uint32_t cMailboxesReady;
407 /** Whether a notification to R3 was send. */
408 volatile bool fNotificationSend;
409
410#if HC_ARCH_BITS == 64
411 uint32_t Alignment1;
412#endif
413
414 /** Physical base address of the incoming mailboxes. */
415 RTGCPHYS GCPhysAddrMailboxIncomingBase;
416 /** Current incoming mailbox position. */
417 uint32_t uMailboxIncomingPositionCurrent;
418
419 /** Whether strict round robin is enabled. */
420 bool fStrictRoundRobinMode;
421 /** Whether the extended LUN CCB format is enabled for 32 possible logical units. */
422 bool fExtendedLunCCBFormat;
423
424 /** Queue to send tasks to R3. - HC ptr */
425 R3PTRTYPE(PPDMQUEUE) pNotifierQueueR3;
426 /** Queue to send tasks to R3. - HC ptr */
427 R0PTRTYPE(PPDMQUEUE) pNotifierQueueR0;
428 /** Queue to send tasks to R3. - RC ptr */
429 RCPTRTYPE(PPDMQUEUE) pNotifierQueueRC;
430
431 uint32_t Alignment2;
432
433 /** Critical section protecting access to the interrupt status register. */
434 PDMCRITSECT CritSectIntr;
435
436 /** Cache for task states. */
437 R3PTRTYPE(RTMEMCACHE) hTaskCache;
438
439 /** Device state for BIOS access. */
440 VBOXSCSI VBoxSCSI;
441
442 /** BusLogic device states. */
443 BUSLOGICDEVICE aDeviceStates[BUSLOGIC_MAX_DEVICES];
444
445 /** The base interface.
446 * @todo use PDMDEVINS::IBase */
447 PDMIBASE IBase;
448 /** Status Port - Leds interface. */
449 PDMILEDPORTS ILeds;
450 /** Partner of ILeds. */
451 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
452
453#if HC_ARCH_BITS == 64
454 uint32_t Alignment3;
455#endif
456
457 /** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
458 * a port is entering the idle state. */
459 bool volatile fSignalIdle;
460 /** Flag whether we have tasks which need to be processed again. */
461 bool volatile fRedo;
462 /** List of tasks which can be redone. */
463 R3PTRTYPE(volatile PBUSLOGICTASKSTATE) pTasksRedoHead;
464
465#ifdef LOG_ENABLED
466# if HC_ARCH_BITS == 64
467 uint32_t Alignment4;
468# endif
469
470 volatile uint32_t cInMailboxesReady;
471#endif
472
473} BUSLOGIC, *PBUSLOGIC;
474
475/** Register offsets in the I/O port space. */
476#define BUSLOGIC_REGISTER_CONTROL 0 /**< Writeonly */
477/** Fields for the control register. */
478# define BL_CTRL_RSBUS RT_BIT(4) /* Reset SCSI Bus. */
479# define BL_CTRL_RINT RT_BIT(5) /* Reset Interrupt. */
480# define BL_CTRL_RSOFT RT_BIT(6) /* Soft Reset. */
481# define BL_CTRL_RHARD RT_BIT(7) /* Hard Reset. */
482
483#define BUSLOGIC_REGISTER_STATUS 0 /**< Readonly */
484/** Fields for the status register. */
485# define BL_STAT_CMDINV RT_BIT(0) /* Command Invalid. */
486# define BL_STAT_DIRRDY RT_BIT(2) /* Data In Register Ready. */
487# define BL_STAT_CPRBSY RT_BIT(3) /* Command/Parameter Out Register Busy. */
488# define BL_STAT_HARDY RT_BIT(4) /* Host Adapter Ready. */
489# define BL_STAT_INREQ RT_BIT(5) /* Initialization Required. */
490# define BL_STAT_DFAIL RT_BIT(6) /* Diagnostic Failure. */
491# define BL_STAT_DACT RT_BIT(7) /* Diagnistic Active. */
492
493#define BUSLOGIC_REGISTER_COMMAND 1 /**< Writeonly */
494#define BUSLOGIC_REGISTER_DATAIN 1 /**< Readonly */
495#define BUSLOGIC_REGISTER_INTERRUPT 2 /**< Readonly */
496/** Fields for the interrupt register. */
497# define BL_INTR_IMBL RT_BIT(0) /* Incoming Mailbox Loaded. */
498# define BL_INTR_OMBR RT_BIT(1) /* Outgoing Mailbox Available. */
499# define BL_INTR_CMDC RT_BIT(2) /* Command Complete. */
500# define BL_INTR_RSTS RT_BIT(3) /* SCSO Bus Reset State. */
501# define BL_INTR_INTV RT_BIT(7) /* Interrupt Valid. */
502
503#define BUSLOGIC_REGISTER_GEOMETRY 3 /* Readonly */
504# define BL_GEOM_XLATEN RT_BIT(7) /* Extended geometry translation enabled. */
505
506/** Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
507typedef struct ReplyInquirePCIHostAdapterInformation
508{
509 uint8_t IsaIOPort;
510 uint8_t IRQ;
511 unsigned char LowByteTerminated : 1;
512 unsigned char HighByteTerminated : 1;
513 unsigned char uReserved : 2; /* Reserved. */
514 unsigned char JP1 : 1; /* Whatever that means. */
515 unsigned char JP2 : 1; /* Whatever that means. */
516 unsigned char JP3 : 1; /* Whatever that means. */
517 /** Whether the provided info is valid. */
518 unsigned char InformationIsValid: 1;
519 uint8_t uReserved2; /* Reserved. */
520} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
521AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
522
523/** Structure for the INQUIRE_CONFIGURATION reply. */
524typedef struct ReplyInquireConfiguration
525{
526 unsigned char uReserved1 : 5;
527 bool fDmaChannel5 : 1;
528 bool fDmaChannel6 : 1;
529 bool fDmaChannel7 : 1;
530 bool fIrqChannel9 : 1;
531 bool fIrqChannel10 : 1;
532 bool fIrqChannel11 : 1;
533 bool fIrqChannel12 : 1;
534 unsigned char uReserved2 : 1;
535 bool fIrqChannel14 : 1;
536 bool fIrqChannel15 : 1;
537 unsigned char uReserved3 : 1;
538 unsigned char uHostAdapterId : 4;
539 unsigned char uReserved4 : 4;
540} ReplyInquireConfiguration, *PReplyInquireConfiguration;
541AssertCompileSize(ReplyInquireConfiguration, 3);
542
543/** Structure for the INQUIRE_SETUP_INFORMATION reply. */
544typedef struct ReplyInquireSetupInformationSynchronousValue
545{
546 unsigned char uOffset : 4;
547 unsigned char uTransferPeriod : 3;
548 bool fSynchronous : 1;
549}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
550AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
551
552typedef struct ReplyInquireSetupInformation
553{
554 bool fSynchronousInitiationEnabled : 1;
555 bool fParityCheckingEnabled : 1;
556 unsigned char uReserved1 : 6;
557 uint8_t uBusTransferRate;
558 uint8_t uPreemptTimeOnBus;
559 uint8_t uTimeOffBus;
560 uint8_t cMailbox;
561 Addr24 MailboxAddress;
562 ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8];
563 uint8_t uDisconnectPermittedId0To7;
564 uint8_t uSignature;
565 uint8_t uCharacterD;
566 uint8_t uHostBusType;
567 uint8_t uWideTransferPermittedId0To7;
568 uint8_t uWideTransfersActiveId0To7;
569 ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8];
570 uint8_t uDisconnectPermittedId8To15;
571 uint8_t uReserved2;
572 uint8_t uWideTransferPermittedId8To15;
573 uint8_t uWideTransfersActiveId8To15;
574} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
575AssertCompileSize(ReplyInquireSetupInformation, 34);
576
577/** Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
578#pragma pack(1)
579typedef struct ReplyInquireExtendedSetupInformation
580{
581 uint8_t uBusType;
582 uint8_t uBiosAddress;
583 uint16_t u16ScatterGatherLimit;
584 uint8_t cMailbox;
585 uint32_t uMailboxAddressBase;
586 unsigned char uReserved1 : 2;
587 bool fFastEISA : 1;
588 unsigned char uReserved2 : 3;
589 bool fLevelSensitiveInterrupt : 1;
590 unsigned char uReserved3 : 1;
591 unsigned char aFirmwareRevision[3];
592 bool fHostWideSCSI : 1;
593 bool fHostDifferentialSCSI : 1;
594 bool fHostSupportsSCAM : 1;
595 bool fHostUltraSCSI : 1;
596 bool fHostSmartTermination : 1;
597 unsigned char uReserved4 : 3;
598} ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation;
599AssertCompileSize(ReplyInquireExtendedSetupInformation, 14);
600#pragma pack()
601
602/** Structure for the INITIALIZE EXTENDED MAILBOX request. */
603#pragma pack(1)
604typedef struct RequestInitializeExtendedMailbox
605{
606 /** Number of mailboxes in guest memory. */
607 uint8_t cMailbox;
608 /** Physical address of the first mailbox. */
609 uint32_t uMailboxBaseAddress;
610} RequestInitializeExtendedMailbox, *PRequestInitializeExtendedMailbox;
611AssertCompileSize(RequestInitializeExtendedMailbox, 5);
612#pragma pack()
613
614/** Structure for the INITIALIZE MAILBOX request. */
615typedef struct
616{
617 /** Number of mailboxes to set up. */
618 uint8_t cMailbox;
619 /** Physical address of the first mailbox. */
620 Addr24 aMailboxBaseAddr;
621} RequestInitMbx, *PRequestInitMbx;
622AssertCompileSize(RequestInitMbx, 4);
623
624/**
625 * Structure of a mailbox in guest memory.
626 * The incoming and outgoing mailbox have the same size
627 * but the incoming one has some more fields defined which
628 * are marked as reserved in the outgoing one.
629 * The last field is also different from the type.
630 * For outgoing mailboxes it is the action and
631 * for incoming ones the completion status code for the task.
632 * We use one structure for both types.
633 */
634typedef struct Mailbox32
635{
636 /** Physical address of the CCB structure in the guest memory. */
637 uint32_t u32PhysAddrCCB;
638 /** Type specific data. */
639 union
640 {
641 /** For outgoing mailboxes. */
642 struct
643 {
644 /** Reserved */
645 uint8_t uReserved[3];
646 /** Action code. */
647 uint8_t uActionCode;
648 } out;
649 /** For incoming mailboxes. */
650 struct
651 {
652 /** The host adapter status after finishing the request. */
653 uint8_t uHostAdapterStatus;
654 /** The status of the device which executed the request after executing it. */
655 uint8_t uTargetDeviceStatus;
656 /** Reserved. */
657 uint8_t uReserved;
658 /** The completion status code of the request. */
659 uint8_t uCompletionCode;
660 } in;
661 } u;
662} Mailbox32, *PMailbox32;
663AssertCompileSize(Mailbox32, 8);
664
665/** Old style 24-bit mailbox entry. */
666typedef struct Mailbox24
667{
668 /** Mailbox command (incoming) or state (outgoing). */
669 uint8_t uCmdState;
670 /** Physical address of the CCB structure in the guest memory. */
671 Addr24 aPhysAddrCCB;
672} Mailbox24, *PMailbox24;
673AssertCompileSize(Mailbox24, 4);
674
675/**
676 * Action codes for outgoing mailboxes.
677 */
678enum BUSLOGIC_MAILBOX_OUTGOING_ACTION
679{
680 BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE = 0x00,
681 BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND = 0x01,
682 BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND = 0x02
683};
684
685/**
686 * Completion codes for incoming mailboxes.
687 */
688enum BUSLOGIC_MAILBOX_INCOMING_COMPLETION
689{
690 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE = 0x00,
691 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR = 0x01,
692 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED = 0x02,
693 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND = 0x03,
694 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR = 0x04,
695 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_INVALID_CCB = 0x05
696};
697
698/**
699 * Host adapter status for incoming mailboxes.
700 */
701enum BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS
702{
703 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED = 0x00,
704 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED = 0x0a,
705 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED_WITH_FLAG = 0x0b,
706 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_UNDERUN = 0x0c,
707 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT = 0x11,
708 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_OVERRUN = 0x12,
709 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNEXPECTED_BUS_FREE = 0x13,
710 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_BUS_PHASE_REQUESTED = 0x14,
711 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_OUTGOING_MAILBOX_ACTION_CODE = 0x15,
712 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_OPERATION_CODE = 0x16,
713 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CCB_HAS_INVALID_LUN = 0x17,
714 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER = 0x1a,
715 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_AUTO_REQUEST_SENSE_FAILED = 0x1b,
716 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TAGGED_QUEUING_MESSAGE_REJECTED = 0x1c,
717 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNSUPPORTED_MESSAGE_RECEIVED = 0x1d,
718 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_FAILED = 0x20,
719 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_FAILED_RESPONSE_TO_ATN = 0x21,
720 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_RST = 0x22,
721 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_OTHER_DEVICE_ASSERTED_RST = 0x23,
722 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_DEVICE_RECONNECTED_IMPROPERLY = 0x24,
723 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_BUS_DEVICE_RESET = 0x25,
724 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED = 0x26,
725 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_SOFTWARE_ERROR = 0x27,
726 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_TIMEOUT_ERROR = 0x30,
727 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_PARITY_ERROR_DETECTED = 0x34
728};
729
730/**
731 * Device status codes for incoming mailboxes.
732 */
733enum BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS
734{
735 BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD = 0x00,
736 BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION = 0x02,
737 BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_DEVICE_BUSY = 0x08
738};
739
740/**
741 * Opcode types for CCB.
742 */
743enum BUSLOGIC_CCB_OPCODE
744{
745 BUSLOGIC_CCB_OPCODE_INITIATOR_CCB = 0x00,
746 BUSLOGIC_CCB_OPCODE_TARGET_CCB = 0x01,
747 BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER = 0x02,
748 BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH = 0x03,
749 BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER = 0x04,
750 BUSLOGIC_CCB_OPCODE_BUS_DEVICE_RESET = 0x81
751};
752
753/**
754 * Data transfer direction.
755 */
756enum BUSLOGIC_CCB_DIRECTION
757{
758 BUSLOGIC_CCB_DIRECTION_UNKNOWN = 0x00,
759 BUSLOGIC_CCB_DIRECTION_IN = 0x01,
760 BUSLOGIC_CCB_DIRECTION_OUT = 0x02,
761 BUSLOGIC_CCB_DIRECTION_NO_DATA = 0x03
762};
763
764/**
765 * The command control block for a SCSI request.
766 */
767typedef struct CCB32
768{
769 /** Opcode. */
770 uint8_t uOpcode;
771 /** Reserved */
772 unsigned char uReserved1 : 3;
773 /** Data direction for the request. */
774 unsigned char uDataDirection : 2;
775 /** Whether the request is tag queued. */
776 bool fTagQueued : 1;
777 /** Queue tag mode. */
778 unsigned char uQueueTag : 2;
779 /** Length of the SCSI CDB. */
780 uint8_t cbCDB;
781 /** Sense data length. */
782 uint8_t cbSenseData;
783 /** Data length. */
784 uint32_t cbData;
785 /** Data pointer.
786 * This points to the data region or a scatter gather list based on the opcode.
787 */
788 uint32_t u32PhysAddrData;
789 /** Reserved. */
790 uint8_t uReserved2[2];
791 /** Host adapter status. */
792 uint8_t uHostAdapterStatus;
793 /** Device adapter status. */
794 uint8_t uDeviceStatus;
795 /** The device the request is sent to. */
796 uint8_t uTargetId;
797 /**The LUN in the device. */
798 unsigned char uLogicalUnit : 5;
799 /** Legacy tag. */
800 bool fLegacyTagEnable : 1;
801 /** Legacy queue tag. */
802 unsigned char uLegacyQueueTag : 2;
803 /** The SCSI CDB. (A CDB can be 12 bytes long.) */
804 uint8_t abCDB[12];
805 /** Reserved. */
806 uint8_t uReserved3[6];
807 /** Sense data pointer. */
808 uint32_t u32PhysAddrSenseData;
809} CCB32, *PCCB32;
810AssertCompileSize(CCB32, 40);
811
812
813/**
814 * The 24-bit command control block.
815 */
816typedef struct CCB24
817{
818 /** Opcode. */
819 uint8_t uOpcode;
820 /** The LUN in the device. */
821 unsigned char uLogicalUnit : 3;
822 /** Data direction for the request. */
823 unsigned char uDataDirection : 2;
824 /** The target device ID. */
825 unsigned char uTargetId : 3;
826 /** Length of the SCSI CDB. */
827 uint8_t cbCDB;
828 /** Sense data length. */
829 uint8_t cbSenseData;
830 /** Data length. */
831 Len24 acbData;
832 /** Data pointer.
833 * This points to the data region or a scatter gather list based on the opc
834 */
835 Addr24 aPhysAddrData;
836 /** Pointer to next CCB for linked commands. */
837 Addr24 aPhysAddrLink;
838 /** Command linking identifier. */
839 uint8_t uLinkId;
840 /** Host adapter status. */
841 uint8_t uHostAdapterStatus;
842 /** Device adapter status. */
843 uint8_t uDeviceStatus;
844 /** Two unused bytes. */
845 uint8_t aReserved[2];
846 /** The SCSI CDB. (A CDB can be 12 bytes long.) */
847 uint8_t abCDB[12];
848} CCB24, *PCCB24;
849AssertCompileSize(CCB24, 30);
850
851/**
852 * The common 24-bit/32-bit command control block. The 32-bit CCB is laid out
853 * such that many fields are in the same location as in the older 24-bit CCB.
854 */
855typedef struct CCBC
856{
857 /** Opcode. */
858 uint8_t uOpcode;
859 /** The LUN in the device. */
860 unsigned char uPad1 : 3;
861 /** Data direction for the request. */
862 unsigned char uDataDirection : 2;
863 /** The target device ID. */
864 unsigned char uPad2 : 3;
865 /** Length of the SCSI CDB. */
866 uint8_t cbCDB;
867 /** Sense data length. */
868 uint8_t cbSenseData;
869 uint8_t aPad1[10];
870 /** Host adapter status. */
871 uint8_t uHostAdapterStatus;
872 /** Device adapter status. */
873 uint8_t uDeviceStatus;
874 uint8_t aPad2[2];
875 /** The SCSI CDB (up to 12 bytes). */
876 uint8_t abCDB[12];
877} CCBC, *PCCBC;
878AssertCompileSize(CCB24, 30);
879
880/* Make sure that the 24-bit/32-bit/common CCB offsets match. */
881AssertCompileMemberOffset(CCBC, cbCDB, 2);
882AssertCompileMemberOffset(CCB24, cbCDB, 2);
883AssertCompileMemberOffset(CCB32, cbCDB, 2);
884AssertCompileMemberOffset(CCBC, uHostAdapterStatus, 14);
885AssertCompileMemberOffset(CCB24, uHostAdapterStatus, 14);
886AssertCompileMemberOffset(CCB32, uHostAdapterStatus, 14);
887AssertCompileMemberOffset(CCBC, abCDB, 18);
888AssertCompileMemberOffset(CCB24, abCDB, 18);
889AssertCompileMemberOffset(CCB32, abCDB, 18);
890
891/** A union of all CCB types (24-bit/32-bit/common). */
892typedef union CCBU
893{
894 CCB32 n; /**< New 32-bit CCB. */
895 CCB24 o; /**< Old 24-bit CCB. */
896 CCBC c; /**< Common CCB subset. */
897} CCBU, *PCCBU;
898
899/** 32-bit scatter-gather list entry. */
900typedef struct SGE32
901{
902 uint32_t cbSegment;
903 uint32_t u32PhysAddrSegmentBase;
904} SGE32, *PSGE32;
905AssertCompileSize(SGE32, 8);
906
907/** 24-bit scatter-gather list entry. */
908typedef struct SGE24
909{
910 Len24 acbSegment;
911 Addr24 aPhysAddrSegmentBase;
912} SGE24, *PSGE24;
913AssertCompileSize(SGE24, 6);
914
915/**
916 * The structure for the "Execute SCSI Command" command.
917 */
918typedef struct ESCMD
919{
920 /** Data length. */
921 uint32_t cbData;
922 /** Data pointer. */
923 uint32_t u32PhysAddrData;
924 /** The device the request is sent to. */
925 uint8_t uTargetId;
926 /** The LUN in the device. */
927 uint8_t uLogicalUnit;
928 /** Reserved */
929 unsigned char uReserved1 : 3;
930 /** Data direction for the request. */
931 unsigned char uDataDirection : 2;
932 /** Reserved */
933 unsigned char uReserved2 : 3;
934 /** Length of the SCSI CDB. */
935 uint8_t cbCDB;
936 /** The SCSI CDB. (A CDB can be 12 bytes long.) */
937 uint8_t abCDB[12];
938} ESCMD, *PESCMD;
939AssertCompileSize(ESCMD, 24);
940
941/**
942 * Task state for a CCB request.
943 */
944typedef struct BUSLOGICTASKSTATE
945{
946 /** Next in the redo list. */
947 PBUSLOGICTASKSTATE pRedoNext;
948 /** Device this task is assigned to. */
949 R3PTRTYPE(PBUSLOGICDEVICE) pTargetDeviceR3;
950 /** The command control block from the guest. */
951 CCBU CommandControlBlockGuest;
952 /** Mailbox read from guest memory. */
953 Mailbox32 MailboxGuest;
954 /** The SCSI request we pass to the underlying SCSI engine. */
955 PDMSCSIREQUEST PDMScsiRequest;
956 /** Data buffer segment */
957 RTSGSEG DataSeg;
958 /** Pointer to the R3 sense buffer. */
959 uint8_t *pbSenseBuffer;
960 /** Flag whether this is a request from the BIOS. */
961 bool fBIOS;
962 /** 24-bit request flag (default is 32-bit). */
963 bool fIs24Bit;
964 /** S/G entry size (depends on the above flag). */
965 uint8_t cbSGEntry;
966} BUSLOGICTASKSTATE;
967
968#ifndef VBOX_DEVICE_STRUCT_TESTCASE
969
970#define PDMIBASE_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, IBase)) )
971#define PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ISCSIPort)) )
972#define PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ILed)) )
973#define PDMIBASE_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, IBase)) )
974#define PDMILEDPORTS_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, ILeds)) )
975
976
977/*********************************************************************************************************************************
978* Internal Functions *
979*********************************************************************************************************************************/
980static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode);
981
982
983/**
984 * Assert IRQ line of the BusLogic adapter.
985 *
986 * @returns nothing.
987 * @param pBusLogic Pointer to the BusLogic device instance.
988 * @param fSuppressIrq Flag to suppress IRQ generation regardless of fIRQEnabled
989 * @param uFlag Type of interrupt being generated.
990 */
991static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
992{
993 LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
994
995 /* The CMDC interrupt has priority over IMBL and OMBR. */
996 if (uIrqType & (BL_INTR_IMBL | BL_INTR_OMBR))
997 {
998 if (!(pBusLogic->regInterrupt & BL_INTR_CMDC))
999 pBusLogic->regInterrupt |= uIrqType; /* Report now. */
1000 else
1001 pBusLogic->uPendingIntr |= uIrqType; /* Report later. */
1002 }
1003 else if (uIrqType & BL_INTR_CMDC)
1004 {
1005 AssertMsg(pBusLogic->regInterrupt == 0 || pBusLogic->regInterrupt == (BL_INTR_INTV | BL_INTR_CMDC),
1006 ("regInterrupt=%02X\n", pBusLogic->regInterrupt));
1007 pBusLogic->regInterrupt |= uIrqType;
1008 }
1009 else
1010 AssertMsgFailed(("Invalid interrupt state!\n"));
1011
1012 pBusLogic->regInterrupt |= BL_INTR_INTV;
1013 if (pBusLogic->fIRQEnabled && !fSuppressIrq)
1014 PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
1015}
1016
1017/**
1018 * Deasserts the interrupt line of the BusLogic adapter.
1019 *
1020 * @returns nothing
1021 * @param pBuslogic Pointer to the BusLogic device instance.
1022 */
1023static void buslogicClearInterrupt(PBUSLOGIC pBusLogic)
1024{
1025 LogFlowFunc(("pBusLogic=%#p, clearing %#02x (pending %#02x)\n",
1026 pBusLogic, pBusLogic->regInterrupt, pBusLogic->uPendingIntr));
1027 pBusLogic->regInterrupt = 0;
1028 PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
1029 /* If there's another pending interrupt, report it now. */
1030 if (pBusLogic->uPendingIntr)
1031 {
1032 buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
1033 pBusLogic->uPendingIntr = 0;
1034 }
1035}
1036
1037#if defined(IN_RING3)
1038
1039/**
1040 * Advances the mailbox pointer to the next slot.
1041 */
1042DECLINLINE(void) buslogicR3OutgoingMailboxAdvance(PBUSLOGIC pBusLogic)
1043{
1044 pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox;
1045}
1046
1047/**
1048 * Initialize local RAM of host adapter with default values.
1049 *
1050 * @returns nothing.
1051 * @param pBusLogic.
1052 */
1053static void buslogicR3InitializeLocalRam(PBUSLOGIC pBusLogic)
1054{
1055 /*
1056 * These values are mostly from what I think is right
1057 * looking at the dmesg output from a Linux guest inside
1058 * a VMware server VM.
1059 *
1060 * So they don't have to be right :)
1061 */
1062 memset(pBusLogic->LocalRam.u8View, 0, sizeof(HostAdapterLocalRam));
1063 pBusLogic->LocalRam.structured.autoSCSIData.fLevelSensitiveInterrupt = true;
1064 pBusLogic->LocalRam.structured.autoSCSIData.fParityCheckingEnabled = true;
1065 pBusLogic->LocalRam.structured.autoSCSIData.fExtendedTranslation = true; /* Same as in geometry register. */
1066 pBusLogic->LocalRam.structured.autoSCSIData.u16DeviceEnabledMask = ~0; /* All enabled. Maybe mask out non present devices? */
1067 pBusLogic->LocalRam.structured.autoSCSIData.u16WidePermittedMask = ~0;
1068 pBusLogic->LocalRam.structured.autoSCSIData.u16FastPermittedMask = ~0;
1069 pBusLogic->LocalRam.structured.autoSCSIData.u16SynchronousPermittedMask = ~0;
1070 pBusLogic->LocalRam.structured.autoSCSIData.u16DisconnectPermittedMask = ~0;
1071 pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode;
1072 pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = ~0;
1073 /** @todo calculate checksum? */
1074}
1075
1076/**
1077 * Do a hardware reset of the buslogic adapter.
1078 *
1079 * @returns VBox status code.
1080 * @param pBusLogic Pointer to the BusLogic device instance.
1081 * @param fResetIO Flag determining whether ISA I/O should be reset.
1082 */
1083static int buslogicR3HwReset(PBUSLOGIC pBusLogic, bool fResetIO)
1084{
1085 LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1086
1087 /* Reset registers to default values. */
1088 pBusLogic->regStatus = BL_STAT_HARDY | BL_STAT_INREQ;
1089 pBusLogic->regGeometry = BL_GEOM_XLATEN;
1090 pBusLogic->uOperationCode = 0xff; /* No command executing. */
1091 pBusLogic->iParameter = 0;
1092 pBusLogic->cbCommandParametersLeft = 0;
1093 pBusLogic->fIRQEnabled = true;
1094 pBusLogic->fStrictRoundRobinMode = false;
1095 pBusLogic->fExtendedLunCCBFormat = false;
1096 pBusLogic->uMailboxOutgoingPositionCurrent = 0;
1097 pBusLogic->uMailboxIncomingPositionCurrent = 0;
1098
1099 /* Clear any active/pending interrupts. */
1100 pBusLogic->uPendingIntr = 0;
1101 buslogicClearInterrupt(pBusLogic);
1102
1103 /* Guest-initiated HBA reset does not affect ISA port I/O. */
1104 if (fResetIO)
1105 {
1106 buslogicR3RegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);
1107 }
1108 buslogicR3InitializeLocalRam(pBusLogic);
1109 vboxscsiInitialize(&pBusLogic->VBoxSCSI);
1110
1111 return VINF_SUCCESS;
1112}
1113
1114#endif /* IN_RING3 */
1115
1116/**
1117 * Resets the command state machine for the next command and notifies the guest.
1118 *
1119 * @returns nothing.
1120 * @param pBusLogic Pointer to the BusLogic device instance
1121 * @param fSuppressIrq Flag to suppress IRQ generation regardless of current state
1122 */
1123static void buslogicCommandComplete(PBUSLOGIC pBusLogic, bool fSuppressIrq)
1124{
1125 LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1126
1127 pBusLogic->fUseLocalRam = false;
1128 pBusLogic->regStatus |= BL_STAT_HARDY;
1129 pBusLogic->iReply = 0;
1130
1131 /* Modify I/O address does not generate an interrupt. */
1132 if (pBusLogic->uOperationCode != BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND)
1133 {
1134 /* Notify that the command is complete. */
1135 pBusLogic->regStatus &= ~BL_STAT_DIRRDY;
1136 buslogicSetInterrupt(pBusLogic, fSuppressIrq, BL_INTR_CMDC);
1137 }
1138
1139 pBusLogic->uOperationCode = 0xff;
1140 pBusLogic->iParameter = 0;
1141}
1142
1143#if defined(IN_RING3)
1144
1145/**
1146 * Initiates a hard reset which was issued from the guest.
1147 *
1148 * @returns nothing
1149 * @param pBusLogic Pointer to the BusLogic device instance.
1150 * @param fHardReset Flag initiating a hard (vs. soft) reset.
1151 */
1152static void buslogicR3InitiateReset(PBUSLOGIC pBusLogic, bool fHardReset)
1153{
1154 LogFlowFunc(("pBusLogic=%#p fHardReset=%d\n", pBusLogic, fHardReset));
1155
1156 buslogicR3HwReset(pBusLogic, false);
1157
1158 if (fHardReset)
1159 {
1160 /* Set the diagnostic active bit in the status register and clear the ready state. */
1161 pBusLogic->regStatus |= BL_STAT_DACT;
1162 pBusLogic->regStatus &= ~BL_STAT_HARDY;
1163
1164 /* Remember when the guest initiated a reset (after we're done resetting). */
1165 pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
1166 }
1167}
1168
1169/**
1170 * Send a mailbox with set status codes to the guest.
1171 *
1172 * @returns nothing.
1173 * @param pBusLogic Pointer to the BusLogic device instance.
1174 * @param pTaskState Pointer to the task state with the mailbox to send.
1175 * @param uHostAdapterStatus The host adapter status code to set.
1176 * @param uDeviceStatus The target device status to set.
1177 * @param uMailboxCompletionCode Completion status code to set in the mailbox.
1178 */
1179static void buslogicR3SendIncomingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState,
1180 uint8_t uHostAdapterStatus, uint8_t uDeviceStatus,
1181 uint8_t uMailboxCompletionCode)
1182{
1183 pTaskState->MailboxGuest.u.in.uHostAdapterStatus = uHostAdapterStatus;
1184 pTaskState->MailboxGuest.u.in.uTargetDeviceStatus = uDeviceStatus;
1185 pTaskState->MailboxGuest.u.in.uCompletionCode = uMailboxCompletionCode;
1186
1187 int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS);
1188 AssertRC(rc);
1189
1190 RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase
1191 + ( pBusLogic->uMailboxIncomingPositionCurrent
1192 * (pTaskState->fIs24Bit ? sizeof(Mailbox24) : sizeof(Mailbox32)) );
1193
1194 if (uMailboxCompletionCode != BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND)
1195 {
1196 RTGCPHYS GCPhysAddrCCB = pTaskState->MailboxGuest.u32PhysAddrCCB;
1197 LogFlowFunc(("Completing CCB %RGp hstat=%u, dstat=%u, outgoing mailbox at %RGp\n", GCPhysAddrCCB,
1198 uHostAdapterStatus, uDeviceStatus, GCPhysAddrMailboxIncoming));
1199
1200 /* Update CCB. */
1201 pTaskState->CommandControlBlockGuest.c.uHostAdapterStatus = uHostAdapterStatus;
1202 pTaskState->CommandControlBlockGuest.c.uDeviceStatus = uDeviceStatus;
1203 /* Rewrite CCB up to the CDB; perhaps more than necessary. */
1204 PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
1205 &pTaskState->CommandControlBlockGuest, RT_OFFSETOF(CCBC, abCDB));
1206 }
1207
1208# ifdef RT_STRICT
1209 uint8_t uCode;
1210 unsigned uCodeOffs = pTaskState->fIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
1211 PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming + uCodeOffs, &uCode, sizeof(uCode));
1212 Assert(uCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE);
1213# endif
1214
1215 /* Update mailbox. */
1216 if (pTaskState->fIs24Bit)
1217 {
1218 Mailbox24 Mbx24;
1219
1220 Mbx24.uCmdState = pTaskState->MailboxGuest.u.in.uCompletionCode;
1221 U32_TO_ADDR(Mbx24.aPhysAddrCCB, pTaskState->MailboxGuest.u32PhysAddrCCB);
1222 Log(("24-bit mailbox: completion code=%u, CCB at %RGp\n", Mbx24.uCmdState, (RTGCPHYS)ADDR_TO_U32(Mbx24.aPhysAddrCCB)));
1223 PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &Mbx24, sizeof(Mailbox24));
1224 }
1225 else
1226 {
1227 Log(("32-bit mailbox: completion code=%u, CCB at %RGp\n", pTaskState->MailboxGuest.u.in.uCompletionCode, (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB));
1228 PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming,
1229 &pTaskState->MailboxGuest, sizeof(Mailbox32));
1230 }
1231
1232 /* Advance to next mailbox position. */
1233 pBusLogic->uMailboxIncomingPositionCurrent++;
1234 if (pBusLogic->uMailboxIncomingPositionCurrent >= pBusLogic->cMailbox)
1235 pBusLogic->uMailboxIncomingPositionCurrent = 0;
1236
1237# ifdef LOG_ENABLED
1238 ASMAtomicIncU32(&pBusLogic->cInMailboxesReady);
1239# endif
1240
1241 buslogicSetInterrupt(pBusLogic, false, BL_INTR_IMBL);
1242
1243 PDMCritSectLeave(&pBusLogic->CritSectIntr);
1244}
1245
1246# ifdef LOG_ENABLED
1247
1248/**
1249 * Dumps the content of a mailbox for debugging purposes.
1250 *
1251 * @return nothing
1252 * @param pMailbox The mailbox to dump.
1253 * @param fOutgoing true if dumping the outgoing state.
1254 * false if dumping the incoming state.
1255 */
1256static void buslogicR3DumpMailboxInfo(PMailbox32 pMailbox, bool fOutgoing)
1257{
1258 Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming"));
1259 Log(("%s: u32PhysAddrCCB=%#x\n", __FUNCTION__, pMailbox->u32PhysAddrCCB));
1260 if (fOutgoing)
1261 {
1262 Log(("%s: uActionCode=%u\n", __FUNCTION__, pMailbox->u.out.uActionCode));
1263 }
1264 else
1265 {
1266 Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pMailbox->u.in.uHostAdapterStatus));
1267 Log(("%s: uTargetDeviceStatus=%u\n", __FUNCTION__, pMailbox->u.in.uTargetDeviceStatus));
1268 Log(("%s: uCompletionCode=%u\n", __FUNCTION__, pMailbox->u.in.uCompletionCode));
1269 }
1270}
1271
1272/**
1273 * Dumps the content of a command control block for debugging purposes.
1274 *
1275 * @returns nothing.
1276 * @param pCCB Pointer to the command control block to dump.
1277 * @param fIs24BitCCB Flag to determine CCB format.
1278 */
1279static void buslogicR3DumpCCBInfo(PCCBU pCCB, bool fIs24BitCCB)
1280{
1281 Log(("%s: Dump for %s Command Control Block:\n", __FUNCTION__, fIs24BitCCB ? "24-bit" : "32-bit"));
1282 Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->c.uOpcode));
1283 Log(("%s: uDataDirection=%u\n", __FUNCTION__, pCCB->c.uDataDirection));
1284 Log(("%s: cbCDB=%u\n", __FUNCTION__, pCCB->c.cbCDB));
1285 Log(("%s: cbSenseData=%u\n", __FUNCTION__, pCCB->c.cbSenseData));
1286 Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pCCB->c.uHostAdapterStatus));
1287 Log(("%s: uDeviceStatus=%u\n", __FUNCTION__, pCCB->c.uDeviceStatus));
1288 if (fIs24BitCCB)
1289 {
1290 Log(("%s: cbData=%u\n", __FUNCTION__, LEN_TO_U32(pCCB->o.acbData)));
1291 Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, ADDR_TO_U32(pCCB->o.aPhysAddrData)));
1292 Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->o.uTargetId));
1293 Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->o.uLogicalUnit));
1294 }
1295 else
1296 {
1297 Log(("%s: cbData=%u\n", __FUNCTION__, pCCB->n.cbData));
1298 Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrData));
1299 Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->n.uTargetId));
1300 Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->n.uLogicalUnit));
1301 Log(("%s: fTagQueued=%d\n", __FUNCTION__, pCCB->n.fTagQueued));
1302 Log(("%s: uQueueTag=%u\n", __FUNCTION__, pCCB->n.uQueueTag));
1303 Log(("%s: fLegacyTagEnable=%u\n", __FUNCTION__, pCCB->n.fLegacyTagEnable));
1304 Log(("%s: uLegacyQueueTag=%u\n", __FUNCTION__, pCCB->n.uLegacyQueueTag));
1305 Log(("%s: PhysAddrSenseData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrSenseData));
1306 }
1307 Log(("%s: uCDB[0]=%#x\n", __FUNCTION__, pCCB->c.abCDB[0]));
1308 for (int i = 1; i < pCCB->c.cbCDB; i++)
1309 Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->c.abCDB[i]));
1310}
1311
1312# endif /* LOG_ENABLED */
1313
1314/**
1315 * Allocate data buffer.
1316 *
1317 * @param pTaskState Pointer to the task state.
1318 * @param GCSGList Guest physical address of S/G list.
1319 * @param cEntries Number of list entries to read.
1320 * @param pSGEList Pointer to 32-bit S/G list storage.
1321 */
1322static void buslogicR3ReadSGEntries(PBUSLOGICTASKSTATE pTaskState, RTGCPHYS GCSGList, uint32_t cEntries, SGE32 *pSGEList)
1323{
1324 PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1325 SGE24 aSGE24[32];
1326 Assert(cEntries <= RT_ELEMENTS(aSGE24));
1327
1328 /* Read the S/G entries. Convert 24-bit entries to 32-bit format. */
1329 if (pTaskState->fIs24Bit)
1330 {
1331 Log2(("Converting %u 24-bit S/G entries to 32-bit\n", cEntries));
1332 PDMDevHlpPhysRead(pDevIns, GCSGList, &aSGE24, cEntries * sizeof(SGE24));
1333 for (uint32_t i = 0; i < cEntries; ++i)
1334 {
1335 pSGEList[i].cbSegment = LEN_TO_U32(aSGE24[i].acbSegment);
1336 pSGEList[i].u32PhysAddrSegmentBase = ADDR_TO_U32(aSGE24[i].aPhysAddrSegmentBase);
1337 }
1338 }
1339 else
1340 PDMDevHlpPhysRead(pDevIns, GCSGList, pSGEList, cEntries * sizeof(SGE32));
1341}
1342
1343/**
1344 * Allocate data buffer.
1345 *
1346 * @returns VBox status code.
1347 * @param pTaskState Pointer to the task state.
1348 */
1349static int buslogicR3DataBufferAlloc(PBUSLOGICTASKSTATE pTaskState)
1350{
1351 PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1352 uint32_t cbDataCCB;
1353 uint32_t u32PhysAddrCCB;
1354
1355 /* Extract the data length and physical address from the CCB. */
1356 if (pTaskState->fIs24Bit)
1357 {
1358 u32PhysAddrCCB = ADDR_TO_U32(pTaskState->CommandControlBlockGuest.o.aPhysAddrData);
1359 cbDataCCB = LEN_TO_U32(pTaskState->CommandControlBlockGuest.o.acbData);
1360 }
1361 else
1362 {
1363 u32PhysAddrCCB = pTaskState->CommandControlBlockGuest.n.u32PhysAddrData;
1364 cbDataCCB = pTaskState->CommandControlBlockGuest.n.cbData;
1365 }
1366
1367 if ( (pTaskState->CommandControlBlockGuest.c.uDataDirection != BUSLOGIC_CCB_DIRECTION_NO_DATA)
1368 && cbDataCCB)
1369 {
1370 /** @todo Check following assumption and what residual means. */
1371 /*
1372 * The BusLogic adapter can handle two different data buffer formats.
1373 * The first one is that the data pointer entry in the CCB points to
1374 * the buffer directly. In second mode the data pointer points to a
1375 * scatter gather list which describes the buffer.
1376 */
1377 if ( (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1378 || (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1379 {
1380 uint32_t cScatterGatherGCRead;
1381 uint32_t iScatterGatherEntry;
1382 SGE32 aScatterGatherReadGC[32]; /* A buffer for scatter gather list entries read from guest memory. */
1383 uint32_t cScatterGatherGCLeft = cbDataCCB / pTaskState->cbSGEntry;
1384 RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1385 size_t cbDataToTransfer = 0;
1386
1387 /* Count number of bytes to transfer. */
1388 do
1389 {
1390 cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1391 ? cScatterGatherGCLeft
1392 : RT_ELEMENTS(aScatterGatherReadGC);
1393 cScatterGatherGCLeft -= cScatterGatherGCRead;
1394
1395 buslogicR3ReadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1396
1397 for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1398 {
1399 RTGCPHYS GCPhysAddrDataBase;
1400
1401 Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1402
1403 GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1404 cbDataToTransfer += aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1405
1406 Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n",
1407 __FUNCTION__, GCPhysAddrDataBase,
1408 aScatterGatherReadGC[iScatterGatherEntry].cbSegment));
1409 }
1410
1411 /* Set address to the next entries to read. */
1412 GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * pTaskState->cbSGEntry;
1413 } while (cScatterGatherGCLeft > 0);
1414
1415 Log(("%s: cbDataToTransfer=%d\n", __FUNCTION__, cbDataToTransfer));
1416
1417 /* Allocate buffer */
1418 pTaskState->DataSeg.cbSeg = cbDataToTransfer;
1419 pTaskState->DataSeg.pvSeg = RTMemAlloc(pTaskState->DataSeg.cbSeg);
1420 if (!pTaskState->DataSeg.pvSeg)
1421 return VERR_NO_MEMORY;
1422
1423 /* Copy the data if needed */
1424 if ( (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
1425 || (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN))
1426 {
1427 cScatterGatherGCLeft = cbDataCCB / pTaskState->cbSGEntry;
1428 GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1429 uint8_t *pbData = (uint8_t *)pTaskState->DataSeg.pvSeg;
1430
1431 do
1432 {
1433 cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1434 ? cScatterGatherGCLeft
1435 : RT_ELEMENTS(aScatterGatherReadGC);
1436 cScatterGatherGCLeft -= cScatterGatherGCRead;
1437
1438 buslogicR3ReadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1439
1440 for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1441 {
1442 RTGCPHYS GCPhysAddrDataBase;
1443
1444 Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1445
1446 GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1447 cbDataToTransfer = aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1448
1449 Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n", __FUNCTION__, GCPhysAddrDataBase, cbDataToTransfer));
1450
1451 PDMDevHlpPhysRead(pDevIns, GCPhysAddrDataBase, pbData, cbDataToTransfer);
1452 pbData += cbDataToTransfer;
1453 }
1454
1455 /* Set address to the next entries to read. */
1456 GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * pTaskState->cbSGEntry;
1457 } while (cScatterGatherGCLeft > 0);
1458 }
1459
1460 }
1461 else if ( pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1462 || pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1463 {
1464 /* The buffer is not scattered. */
1465 RTGCPHYS GCPhysAddrDataBase = u32PhysAddrCCB;
1466
1467 AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1468
1469 pTaskState->DataSeg.cbSeg = cbDataCCB;
1470 pTaskState->DataSeg.pvSeg = RTMemAlloc(pTaskState->DataSeg.cbSeg);
1471 if (!pTaskState->DataSeg.pvSeg)
1472 return VERR_NO_MEMORY;
1473
1474 Log(("Non scattered buffer:\n"));
1475 Log(("u32PhysAddrData=%#x\n", u32PhysAddrCCB));
1476 Log(("cbData=%u\n", cbDataCCB));
1477 Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1478
1479 /* Copy the data into the buffer. */
1480 PDMDevHlpPhysRead(pDevIns, GCPhysAddrDataBase, pTaskState->DataSeg.pvSeg, pTaskState->DataSeg.cbSeg);
1481 }
1482 }
1483
1484 return VINF_SUCCESS;
1485}
1486
1487/**
1488 * Free allocated resources used for the scatter gather list.
1489 *
1490 * @returns nothing.
1491 * @param pTaskState Pointer to the task state.
1492 */
1493static void buslogicR3DataBufferFree(PBUSLOGICTASKSTATE pTaskState)
1494{
1495 PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1496 uint32_t cbDataCCB;
1497 uint32_t u32PhysAddrCCB;
1498
1499 /* Extract the data length and physical address from the CCB. */
1500 if (pTaskState->fIs24Bit)
1501 {
1502 u32PhysAddrCCB = ADDR_TO_U32(pTaskState->CommandControlBlockGuest.o.aPhysAddrData);
1503 cbDataCCB = LEN_TO_U32(pTaskState->CommandControlBlockGuest.o.acbData);
1504 }
1505 else
1506 {
1507 u32PhysAddrCCB = pTaskState->CommandControlBlockGuest.n.u32PhysAddrData;
1508 cbDataCCB = pTaskState->CommandControlBlockGuest.n.cbData;
1509 }
1510
1511#if 1
1512 /* Hack for NT 10/91: A CCB describes a 2K buffer, but TEST UNIT READY is executed. This command
1513 * returns no data, hence the buffer must be left alone!
1514 */
1515 if (pTaskState->CommandControlBlockGuest.c.abCDB[0] == 0)
1516 cbDataCCB = 0;
1517#endif
1518
1519 LogFlowFunc(("pTaskState=%#p cbDataCCB=%u direction=%u cbSeg=%u\n", pTaskState, cbDataCCB,
1520 pTaskState->CommandControlBlockGuest.c.uDataDirection, pTaskState->DataSeg.cbSeg));
1521
1522 if ( (cbDataCCB > 0)
1523 && ( (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
1524 || (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN)))
1525 {
1526 if ( (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1527 || (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1528 {
1529 uint32_t cScatterGatherGCRead;
1530 uint32_t iScatterGatherEntry;
1531 SGE32 aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1532 uint32_t cScatterGatherGCLeft = cbDataCCB / pTaskState->cbSGEntry;
1533 RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1534 uint8_t *pbData = (uint8_t *)pTaskState->DataSeg.pvSeg;
1535
1536 do
1537 {
1538 cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1539 ? cScatterGatherGCLeft
1540 : RT_ELEMENTS(aScatterGatherReadGC);
1541 cScatterGatherGCLeft -= cScatterGatherGCRead;
1542
1543 buslogicR3ReadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1544
1545 for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1546 {
1547 RTGCPHYS GCPhysAddrDataBase;
1548 size_t cbDataToTransfer;
1549
1550 Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1551
1552 GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1553 cbDataToTransfer = aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1554
1555 Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n", __FUNCTION__, GCPhysAddrDataBase, cbDataToTransfer));
1556
1557 PDMDevHlpPCIPhysWrite(pDevIns, GCPhysAddrDataBase, pbData, cbDataToTransfer);
1558 pbData += cbDataToTransfer;
1559 }
1560
1561 /* Set address to the next entries to read. */
1562 GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * pTaskState->cbSGEntry;
1563 } while (cScatterGatherGCLeft > 0);
1564
1565 }
1566 else if ( pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1567 || pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1568 {
1569 /* The buffer is not scattered. */
1570 RTGCPHYS GCPhysAddrDataBase = u32PhysAddrCCB;
1571
1572 AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1573
1574 Log(("Non-scattered buffer:\n"));
1575 Log(("u32PhysAddrData=%#x\n", u32PhysAddrCCB));
1576 Log(("cbData=%u\n", cbDataCCB));
1577 Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1578
1579 /* Copy the data into the guest memory. */
1580 PDMDevHlpPCIPhysWrite(pDevIns, GCPhysAddrDataBase, pTaskState->DataSeg.pvSeg, pTaskState->DataSeg.cbSeg);
1581 }
1582
1583 }
1584 /* Update residual data length. */
1585 if ( (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1586 || (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1587 {
1588 uint32_t cbResidual;
1589
1590 /** @todo we need to get the actual transfer length from the VSCSI layer?! */
1591 cbResidual = 0; //LEN_TO_U32(pTaskState->CCBGuest.acbData) - ???;
1592 if (pTaskState->fIs24Bit)
1593 U32_TO_LEN(pTaskState->CommandControlBlockGuest.o.acbData, cbResidual);
1594 else
1595 pTaskState->CommandControlBlockGuest.n.cbData = cbResidual;
1596 }
1597
1598 RTMemFree(pTaskState->DataSeg.pvSeg);
1599 pTaskState->DataSeg.pvSeg = NULL;
1600 pTaskState->DataSeg.cbSeg = 0;
1601}
1602
1603/** Convert sense buffer length taking into account shortcut values. */
1604static uint32_t buslogicR3ConvertSenseBufferLength(uint32_t cbSense)
1605{
1606 /* Convert special sense buffer length values. */
1607 if (cbSense == 0)
1608 cbSense = 14; /* 0 means standard 14-byte buffer. */
1609 else if (cbSense == 1)
1610 cbSense = 0; /* 1 means no sense data. */
1611 else if (cbSense < 8)
1612 AssertMsgFailed(("Reserved cbSense value of %d used!\n", cbSense));
1613
1614 return cbSense;
1615}
1616
1617/**
1618 * Free the sense buffer.
1619 *
1620 * @returns nothing.
1621 * @param pTaskState Pointer to the task state.
1622 * @param fCopy If sense data should be copied to guest memory.
1623 */
1624static void buslogicR3SenseBufferFree(PBUSLOGICTASKSTATE pTaskState, bool fCopy)
1625{
1626 uint32_t cbSenseBuffer;
1627
1628 cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData);
1629
1630 /* Copy the sense buffer into guest memory if requested. */
1631 if (fCopy && cbSenseBuffer)
1632 {
1633 PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1634 RTGCPHYS GCPhysAddrSenseBuffer;
1635
1636 /* With 32-bit CCBs, the (optional) sense buffer physical address is provided separately.
1637 * On the other hand, with 24-bit CCBs, the sense buffer is simply located at the end of
1638 * the CCB, right after the variable-length CDB.
1639 */
1640 if (pTaskState->fIs24Bit)
1641 {
1642 GCPhysAddrSenseBuffer = pTaskState->MailboxGuest.u32PhysAddrCCB;
1643 GCPhysAddrSenseBuffer += pTaskState->CommandControlBlockGuest.c.cbCDB + RT_OFFSETOF(CCB24, abCDB);
1644 }
1645 else
1646 GCPhysAddrSenseBuffer = pTaskState->CommandControlBlockGuest.n.u32PhysAddrSenseData;
1647
1648 Log3(("%s: sense buffer: %.*Rhxs\n", __FUNCTION__, cbSenseBuffer, pTaskState->pbSenseBuffer));
1649 PDMDevHlpPCIPhysWrite(pDevIns, GCPhysAddrSenseBuffer, pTaskState->pbSenseBuffer, cbSenseBuffer);
1650 }
1651
1652 RTMemFree(pTaskState->pbSenseBuffer);
1653 pTaskState->pbSenseBuffer = NULL;
1654}
1655
1656/**
1657 * Alloc the sense buffer.
1658 *
1659 * @returns VBox status code.
1660 * @param pTaskState Pointer to the task state.
1661 * @note Current assumption is that the sense buffer is not scattered and does not cross a page boundary.
1662 */
1663static int buslogicR3SenseBufferAlloc(PBUSLOGICTASKSTATE pTaskState)
1664{
1665 PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1666 uint32_t cbSenseBuffer;
1667
1668 pTaskState->pbSenseBuffer = NULL;
1669
1670 cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData);
1671 if (cbSenseBuffer)
1672 {
1673 pTaskState->pbSenseBuffer = (uint8_t *)RTMemAllocZ(cbSenseBuffer);
1674 if (!pTaskState->pbSenseBuffer)
1675 return VERR_NO_MEMORY;
1676 }
1677
1678 return VINF_SUCCESS;
1679}
1680
1681#endif /* IN_RING3 */
1682
1683/**
1684 * Parses the command buffer and executes it.
1685 *
1686 * @returns VBox status code.
1687 * @param pBusLogic Pointer to the BusLogic device instance.
1688 */
1689static int buslogicProcessCommand(PBUSLOGIC pBusLogic)
1690{
1691 int rc = VINF_SUCCESS;
1692 bool fSuppressIrq = false;
1693
1694 LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1695 AssertMsg(pBusLogic->uOperationCode != 0xff, ("There is no command to execute\n"));
1696
1697 switch (pBusLogic->uOperationCode)
1698 {
1699 case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1700 /* Valid command, no reply. */
1701 pBusLogic->cbReplyParametersLeft = 0;
1702 break;
1703 case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1704 {
1705 PReplyInquirePCIHostAdapterInformation pReply = (PReplyInquirePCIHostAdapterInformation)pBusLogic->aReplyBuffer;
1706 memset(pReply, 0, sizeof(ReplyInquirePCIHostAdapterInformation));
1707
1708 /* It seems VMware does not provide valid information here too, lets do the same :) */
1709 pReply->InformationIsValid = 0;
1710 pReply->IsaIOPort = pBusLogic->uISABaseCode;
1711 pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
1712 pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
1713 break;
1714 }
1715 case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1716 {
1717 /* Modify the ISA-compatible I/O port base. Note that this technically
1718 * violates the PCI spec, as this address is not reported through PCI.
1719 * However, it is required for compatibility with old drivers.
1720 */
1721#ifdef IN_RING3
1722 Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0]));
1723 buslogicR3RegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);
1724 pBusLogic->cbReplyParametersLeft = 0;
1725 fSuppressIrq = true;
1726 break;
1727#else
1728 AssertMsgFailed(("Must never get here!\n"));
1729#endif
1730 }
1731 case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1732 {
1733 /* The special option byte is important: If it is '0' or 'B', Windows NT drivers
1734 * for Adaptec AHA-154x may claim the adapter. The BusLogic drivers will claim
1735 * the adapter only when the byte is *not* '0' or 'B'.
1736 */
1737 pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1738 pBusLogic->aReplyBuffer[1] = 'A'; /* Special option byte */
1739
1740 /* We report version 5.07B. This reply will provide the first two digits. */
1741 pBusLogic->aReplyBuffer[2] = '5'; /* Major version 5 */
1742 pBusLogic->aReplyBuffer[3] = '0'; /* Minor version 0 */
1743 pBusLogic->cbReplyParametersLeft = 4; /* Reply is 4 bytes long */
1744 break;
1745 }
1746 case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1747 {
1748 pBusLogic->aReplyBuffer[0] = '7';
1749 pBusLogic->cbReplyParametersLeft = 1;
1750 break;
1751 }
1752 case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1753 {
1754 pBusLogic->aReplyBuffer[0] = 'B';
1755 pBusLogic->cbReplyParametersLeft = 1;
1756 break;
1757 }
1758 case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1759 /* The parameter list length is determined by the first byte of the command buffer. */
1760 if (pBusLogic->iParameter == 1)
1761 {
1762 /* First pass - set the number of following parameter bytes. */
1763 pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
1764 Log(("Set HA options: %u bytes follow\n", pBusLogic->cbCommandParametersLeft));
1765 }
1766 else
1767 {
1768 /* Second pass - process received data. */
1769 Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1770 /* We ignore the data - it only concerns the SCSI hardware protocol. */
1771 }
1772 pBusLogic->cbReplyParametersLeft = 0;
1773 break;
1774
1775 case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
1776 /* The parameter list length is at least 12 bytes; the 12th byte determines
1777 * the number of additional CDB bytes that will follow.
1778 */
1779 if (pBusLogic->iParameter == 12)
1780 {
1781 /* First pass - set the number of following CDB bytes. */
1782 pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[11];
1783 Log(("Execute SCSI cmd: %u more bytes follow\n", pBusLogic->cbCommandParametersLeft));
1784 }
1785 else
1786 {
1787 PESCMD pCmd;
1788
1789 /* Second pass - process received data. */
1790 Log(("Execute SCSI cmd: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1791
1792 pCmd = (PESCMD)pBusLogic->aCommandBuffer;
1793 Log(("Addr %08X, cbData %08X, cbCDB=%u\n", pCmd->u32PhysAddrData, pCmd->cbData, pCmd->cbCDB));
1794 }
1795 // This is currently a dummy - just fails every command.
1796 pBusLogic->cbReplyParametersLeft = 4;
1797 pBusLogic->aReplyBuffer[0] = pBusLogic->aReplyBuffer[1] = 0;
1798 pBusLogic->aReplyBuffer[2] = 0x11; /* HBA status (timeout). */
1799 pBusLogic->aReplyBuffer[3] = 0; /* Device status. */
1800 break;
1801
1802 case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1803 {
1804 /* The reply length is set by the guest and is found in the first byte of the command buffer. */
1805 pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1806 memset(pBusLogic->aReplyBuffer, ' ', pBusLogic->cbReplyParametersLeft);
1807 const char aModelName[] = "958";
1808 int cCharsToTransfer = (pBusLogic->cbReplyParametersLeft <= (sizeof(aModelName) - 1))
1809 ? pBusLogic->cbReplyParametersLeft
1810 : sizeof(aModelName) - 1;
1811
1812 for (int i = 0; i < cCharsToTransfer; i++)
1813 pBusLogic->aReplyBuffer[i] = aModelName[i];
1814
1815 break;
1816 }
1817 case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1818 {
1819 uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
1820
1821 pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
1822 PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
1823 memset(pReply, 0, sizeof(ReplyInquireConfiguration));
1824
1825 pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
1826 pReply->fDmaChannel6 = 1; /* DMA channel 6 is a good default. */
1827 /* The PCI IRQ is not necessarily representable in this structure.
1828 * If that is the case, the guest likely won't function correctly,
1829 * therefore we log a warning.
1830 */
1831 switch (uPciIrq)
1832 {
1833 case 9: pReply->fIrqChannel9 = 1; break;
1834 case 10: pReply->fIrqChannel10 = 1; break;
1835 case 11: pReply->fIrqChannel11 = 1; break;
1836 case 12: pReply->fIrqChannel12 = 1; break;
1837 case 14: pReply->fIrqChannel14 = 1; break;
1838 case 15: pReply->fIrqChannel15 = 1; break;
1839 default:
1840 LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq));
1841 break;
1842 }
1843 break;
1844 }
1845 case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1846 {
1847 /* Some Adaptec AHA-154x drivers (e.g. OS/2) execute this command and expect
1848 * it to fail. If it succeeds, the drivers refuse to load. However, some newer
1849 * Adaptec 154x models supposedly support it too??
1850 */
1851
1852 /* The reply length is set by the guest and is found in the first byte of the command buffer. */
1853 pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1854 PReplyInquireExtendedSetupInformation pReply = (PReplyInquireExtendedSetupInformation)pBusLogic->aReplyBuffer;
1855 memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation));
1856
1857 /** @todo should this reflect the RAM contents (AutoSCSIRam)? */
1858 pReply->uBusType = 'E'; /* EISA style */
1859 pReply->u16ScatterGatherLimit = 8192;
1860 pReply->cMailbox = pBusLogic->cMailbox;
1861 pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
1862 pReply->fLevelSensitiveInterrupt = true;
1863 pReply->fHostWideSCSI = true;
1864 pReply->fHostUltraSCSI = true;
1865 memcpy(pReply->aFirmwareRevision, "07B", sizeof(pReply->aFirmwareRevision));
1866
1867 break;
1868 }
1869 case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1870 {
1871 /* The reply length is set by the guest and is found in the first byte of the command buffer. */
1872 pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1873 PReplyInquireSetupInformation pReply = (PReplyInquireSetupInformation)pBusLogic->aReplyBuffer;
1874 memset(pReply, 0, sizeof(ReplyInquireSetupInformation));
1875 pReply->fSynchronousInitiationEnabled = true;
1876 pReply->fParityCheckingEnabled = true;
1877 pReply->cMailbox = pBusLogic->cMailbox;
1878 U32_TO_ADDR(pReply->MailboxAddress, pBusLogic->GCPhysAddrMailboxOutgoingBase);
1879 pReply->uSignature = 'B';
1880 /* The 'D' signature prevents Adaptec's OS/2 drivers from getting too
1881 * friendly with BusLogic hardware and upsetting the HBA state.
1882 */
1883 pReply->uCharacterD = 'D'; /* BusLogic model. */
1884 pReply->uHostBusType = 'F'; /* PCI bus. */
1885 break;
1886 }
1887 case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1888 {
1889 /*
1890 * First element in the command buffer contains start offset to read from
1891 * and second one the number of bytes to read.
1892 */
1893 uint8_t uOffset = pBusLogic->aCommandBuffer[0];
1894 pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[1];
1895
1896 pBusLogic->fUseLocalRam = true;
1897 pBusLogic->iReply = uOffset;
1898 break;
1899 }
1900 case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
1901 {
1902 PRequestInitMbx pRequest = (PRequestInitMbx)pBusLogic->aCommandBuffer;
1903
1904 pBusLogic->fMbxIs24Bit = true;
1905 pBusLogic->cMailbox = pRequest->cMailbox;
1906 pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)ADDR_TO_U32(pRequest->aMailboxBaseAddr);
1907 /* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1908 pBusLogic->GCPhysAddrMailboxIncomingBase = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->cMailbox * sizeof(Mailbox24));
1909
1910 Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1911 Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1912 Log(("cMailboxes=%u (24-bit mode)\n", pBusLogic->cMailbox));
1913 LogRel(("Initialized 24-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, ADDR_TO_U32(pRequest->aMailboxBaseAddr)));
1914
1915 pBusLogic->regStatus &= ~BL_STAT_INREQ;
1916 pBusLogic->cbReplyParametersLeft = 0;
1917 break;
1918 }
1919 case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1920 {
1921 PRequestInitializeExtendedMailbox pRequest = (PRequestInitializeExtendedMailbox)pBusLogic->aCommandBuffer;
1922
1923 pBusLogic->fMbxIs24Bit = false;
1924 pBusLogic->cMailbox = pRequest->cMailbox;
1925 pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress;
1926 /* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1927 pBusLogic->GCPhysAddrMailboxIncomingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress + (pBusLogic->cMailbox * sizeof(Mailbox32));
1928
1929 Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1930 Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1931 Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
1932 LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
1933
1934 pBusLogic->regStatus &= ~BL_STAT_INREQ;
1935 pBusLogic->cbReplyParametersLeft = 0;
1936 break;
1937 }
1938 case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
1939 {
1940 if (pBusLogic->aCommandBuffer[0] == 0)
1941 pBusLogic->fStrictRoundRobinMode = false;
1942 else if (pBusLogic->aCommandBuffer[0] == 1)
1943 pBusLogic->fStrictRoundRobinMode = true;
1944 else
1945 AssertMsgFailed(("Invalid round robin mode %d\n", pBusLogic->aCommandBuffer[0]));
1946
1947 pBusLogic->cbReplyParametersLeft = 0;
1948 break;
1949 }
1950 case BUSLOGICCOMMAND_SET_CCB_FORMAT:
1951 {
1952 if (pBusLogic->aCommandBuffer[0] == 0)
1953 pBusLogic->fExtendedLunCCBFormat = false;
1954 else if (pBusLogic->aCommandBuffer[0] == 1)
1955 pBusLogic->fExtendedLunCCBFormat = true;
1956 else
1957 AssertMsgFailed(("Invalid CCB format %d\n", pBusLogic->aCommandBuffer[0]));
1958
1959 pBusLogic->cbReplyParametersLeft = 0;
1960 break;
1961 }
1962 case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
1963 /* This is supposed to send TEST UNIT READY to each target/LUN.
1964 * We cheat and skip that, since we already know what's attached
1965 */
1966 memset(pBusLogic->aReplyBuffer, 0, 8);
1967 for (int i = 0; i < 8; ++i)
1968 {
1969 if (pBusLogic->aDeviceStates[i].fPresent)
1970 pBusLogic->aReplyBuffer[i] = 1;
1971 }
1972 pBusLogic->aReplyBuffer[7] = 0; /* HA hardcoded at ID 7. */
1973 pBusLogic->cbReplyParametersLeft = 8;
1974 break;
1975 case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
1976 /* See note about cheating above. */
1977 memset(pBusLogic->aReplyBuffer, 0, 8);
1978 for (int i = 0; i < 8; ++i)
1979 {
1980 if (pBusLogic->aDeviceStates[i + 8].fPresent)
1981 pBusLogic->aReplyBuffer[i] = 1;
1982 }
1983 pBusLogic->cbReplyParametersLeft = 8;
1984 break;
1985 case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
1986 {
1987 /* Each bit which is set in the 16bit wide variable means a present device. */
1988 uint16_t u16TargetsPresentMask = 0;
1989
1990 for (uint8_t i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
1991 {
1992 if (pBusLogic->aDeviceStates[i].fPresent)
1993 u16TargetsPresentMask |= (1 << i);
1994 }
1995 pBusLogic->aReplyBuffer[0] = (uint8_t)u16TargetsPresentMask;
1996 pBusLogic->aReplyBuffer[1] = (uint8_t)(u16TargetsPresentMask >> 8);
1997 pBusLogic->cbReplyParametersLeft = 2;
1998 break;
1999 }
2000 case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2001 {
2002 pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
2003
2004 for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++)
2005 pBusLogic->aReplyBuffer[i] = 0; /** @todo Figure if we need something other here. It's not needed for the linux driver */
2006
2007 break;
2008 }
2009 case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2010 {
2011 if (pBusLogic->aCommandBuffer[0] == 0)
2012 pBusLogic->fIRQEnabled = false;
2013 else
2014 pBusLogic->fIRQEnabled = true;
2015 /* No interrupt signaled regardless of enable/disable. */
2016 fSuppressIrq = true;
2017 break;
2018 }
2019 case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2020 {
2021 pBusLogic->aReplyBuffer[0] = pBusLogic->aCommandBuffer[0];
2022 pBusLogic->cbReplyParametersLeft = 1;
2023 break;
2024 }
2025 case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2026 {
2027 pBusLogic->cbReplyParametersLeft = 0;
2028 pBusLogic->LocalRam.structured.autoSCSIData.uBusOnDelay = pBusLogic->aCommandBuffer[0];
2029 Log(("Bus-on time: %d\n", pBusLogic->aCommandBuffer[0]));
2030 break;
2031 }
2032 case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2033 {
2034 pBusLogic->cbReplyParametersLeft = 0;
2035 pBusLogic->LocalRam.structured.autoSCSIData.uBusOffDelay = pBusLogic->aCommandBuffer[0];
2036 Log(("Bus-off time: %d\n", pBusLogic->aCommandBuffer[0]));
2037 break;
2038 }
2039 case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2040 {
2041 pBusLogic->cbReplyParametersLeft = 0;
2042 pBusLogic->LocalRam.structured.autoSCSIData.uDMATransferRate = pBusLogic->aCommandBuffer[0];
2043 Log(("Bus transfer rate: %02X\n", pBusLogic->aCommandBuffer[0]));
2044 break;
2045 }
2046 case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2047 {
2048 RTGCPHYS GCPhysFifoBuf;
2049 Addr24 addr;
2050
2051 pBusLogic->cbReplyParametersLeft = 0;
2052 addr.hi = pBusLogic->aCommandBuffer[0];
2053 addr.mid = pBusLogic->aCommandBuffer[1];
2054 addr.lo = pBusLogic->aCommandBuffer[2];
2055 GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2056 Log(("Write busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2057 PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2058 &pBusLogic->LocalRam.u8View[64], 64);
2059 break;
2060 }
2061 case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2062 {
2063 RTGCPHYS GCPhysFifoBuf;
2064 Addr24 addr;
2065
2066 pBusLogic->cbReplyParametersLeft = 0;
2067 addr.hi = pBusLogic->aCommandBuffer[0];
2068 addr.mid = pBusLogic->aCommandBuffer[1];
2069 addr.lo = pBusLogic->aCommandBuffer[2];
2070 GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2071 Log(("Read busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2072 PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2073 &pBusLogic->LocalRam.u8View[64], 64);
2074 break;
2075 }
2076 default:
2077 AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
2078 case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2079 case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2080 /* Commands valid for Adaptec 154xC which we don't handle since
2081 * we pretend being 154xB compatible. Just mark the command as invalid.
2082 */
2083 Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
2084 pBusLogic->cbReplyParametersLeft = 0;
2085 pBusLogic->regStatus |= BL_STAT_CMDINV;
2086 break;
2087 case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
2088 AssertMsgFailed(("Invalid mailbox execute state!\n"));
2089 }
2090
2091 Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
2092
2093 /* Set the data in ready bit in the status register in case the command has a reply. */
2094 if (pBusLogic->cbReplyParametersLeft)
2095 pBusLogic->regStatus |= BL_STAT_DIRRDY;
2096 else if (!pBusLogic->cbCommandParametersLeft)
2097 buslogicCommandComplete(pBusLogic, fSuppressIrq);
2098
2099 return rc;
2100}
2101
2102/**
2103 * Read a register from the BusLogic adapter.
2104 *
2105 * @returns VBox status code.
2106 * @param pBusLogic Pointer to the BusLogic instance data.
2107 * @param iRegister The index of the register to read.
2108 * @param pu32 Where to store the register content.
2109 */
2110static int buslogicRegisterRead(PBUSLOGIC pBusLogic, unsigned iRegister, uint32_t *pu32)
2111{
2112 int rc = VINF_SUCCESS;
2113
2114 switch (iRegister)
2115 {
2116 case BUSLOGIC_REGISTER_STATUS:
2117 {
2118 *pu32 = pBusLogic->regStatus;
2119
2120 /* If the diagnostic active bit is set, we are in a guest-initiated
2121 * hard reset. If the guest reads the status register and waits for
2122 * the host adapter ready bit to be set, we terminate the reset right
2123 * away. However, guests may also expect the reset condition to clear
2124 * automatically after a period of time, in which case we can't show
2125 * the DIAG bit at all.
2126 */
2127 if (pBusLogic->regStatus & BL_STAT_DACT)
2128 {
2129 uint64_t u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
2130
2131 pBusLogic->regStatus &= ~BL_STAT_DACT;
2132 pBusLogic->regStatus |= BL_STAT_HARDY;
2133
2134 if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
2135 {
2136 /* If reset already expired, let the guest see that right away. */
2137 *pu32 = pBusLogic->regStatus;
2138 pBusLogic->u64ResetTime = 0;
2139 }
2140 }
2141 break;
2142 }
2143 case BUSLOGIC_REGISTER_DATAIN:
2144 {
2145 if (pBusLogic->fUseLocalRam)
2146 *pu32 = pBusLogic->LocalRam.u8View[pBusLogic->iReply];
2147 else
2148 *pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
2149
2150 /* Careful about underflow - guest can read data register even if
2151 * no data is available.
2152 */
2153 if (pBusLogic->cbReplyParametersLeft)
2154 {
2155 pBusLogic->iReply++;
2156 pBusLogic->cbReplyParametersLeft--;
2157 if (!pBusLogic->cbReplyParametersLeft)
2158 {
2159 /*
2160 * Reply finished, set command complete bit, unset data-in ready bit and
2161 * interrupt the guest if enabled.
2162 */
2163 buslogicCommandComplete(pBusLogic, false);
2164 }
2165 }
2166 LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
2167 pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
2168 break;
2169 }
2170 case BUSLOGIC_REGISTER_INTERRUPT:
2171 {
2172 *pu32 = pBusLogic->regInterrupt;
2173 break;
2174 }
2175 case BUSLOGIC_REGISTER_GEOMETRY:
2176 {
2177 *pu32 = pBusLogic->regGeometry;
2178 break;
2179 }
2180 default:
2181 *pu32 = UINT32_C(0xffffffff);
2182 }
2183
2184 Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2185 __FUNCTION__, pu32, 1, pu32, iRegister, rc));
2186
2187 return rc;
2188}
2189
2190/**
2191 * Write a value to a register.
2192 *
2193 * @returns VBox status code.
2194 * @param pBusLogic Pointer to the BusLogic instance data.
2195 * @param iRegister The index of the register to read.
2196 * @param uVal The value to write.
2197 */
2198static int buslogicRegisterWrite(PBUSLOGIC pBusLogic, unsigned iRegister, uint8_t uVal)
2199{
2200 int rc = VINF_SUCCESS;
2201
2202 switch (iRegister)
2203 {
2204 case BUSLOGIC_REGISTER_CONTROL:
2205 {
2206 if ((uVal & BL_CTRL_RHARD) || (uVal & BL_CTRL_RSOFT))
2207 {
2208#ifdef IN_RING3
2209 bool fHardReset = !!(uVal & BL_CTRL_RHARD);
2210
2211 LogRel(("BusLogic: %s reset\n", fHardReset ? "hard" : "soft"));
2212 buslogicR3InitiateReset(pBusLogic, fHardReset);
2213#else
2214 rc = VINF_IOM_R3_IOPORT_WRITE;
2215#endif
2216 break;
2217 }
2218
2219 rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_IOM_R3_IOPORT_WRITE);
2220 if (rc != VINF_SUCCESS)
2221 return rc;
2222
2223#ifdef LOG_ENABLED
2224 uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
2225 Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
2226#endif
2227
2228 if (uVal & BL_CTRL_RINT)
2229 buslogicClearInterrupt(pBusLogic);
2230
2231 PDMCritSectLeave(&pBusLogic->CritSectIntr);
2232
2233 break;
2234 }
2235 case BUSLOGIC_REGISTER_COMMAND:
2236 {
2237 /* Fast path for mailbox execution command. */
2238 if ((uVal == BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND) && (pBusLogic->uOperationCode == 0xff))
2239 {
2240 /* If there are no mailboxes configured, don't even try to do anything. */
2241 if (pBusLogic->cMailbox)
2242 {
2243 ASMAtomicIncU32(&pBusLogic->cMailboxesReady);
2244 if (!ASMAtomicXchgBool(&pBusLogic->fNotificationSend, true))
2245 {
2246 /* Send new notification to the queue. */
2247 PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pBusLogic->CTX_SUFF(pNotifierQueue));
2248 AssertMsg(pItem, ("Allocating item for queue failed\n"));
2249 PDMQueueInsert(pBusLogic->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2250 }
2251 }
2252
2253 return rc;
2254 }
2255
2256 /*
2257 * Check if we are already fetch command parameters from the guest.
2258 * If not we initialize executing a new command.
2259 */
2260 if (pBusLogic->uOperationCode == 0xff)
2261 {
2262 pBusLogic->uOperationCode = uVal;
2263 pBusLogic->iParameter = 0;
2264
2265 /* Mark host adapter as busy and clear the invalid status bit. */
2266 pBusLogic->regStatus &= ~(BL_STAT_HARDY | BL_STAT_CMDINV);
2267
2268 /* Get the number of bytes for parameters from the command code. */
2269 switch (pBusLogic->uOperationCode)
2270 {
2271 case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
2272 case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
2273 case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
2274 case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
2275 case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
2276 case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
2277 case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2278 case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2279 case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2280 pBusLogic->cbCommandParametersLeft = 0;
2281 break;
2282 case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
2283 case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
2284 case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
2285 case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
2286 case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2287 case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2288 case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2289 case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2290 case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2291 case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2292 case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2293 case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2294 pBusLogic->cbCommandParametersLeft = 1;
2295 break;
2296 case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
2297 pBusLogic->cbCommandParametersLeft = 2;
2298 break;
2299 case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2300 case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2301 pBusLogic->cbCommandParametersLeft = 3;
2302 break;
2303 case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
2304 pBusLogic->cbCommandParametersLeft = sizeof(RequestInitMbx);
2305 break;
2306 case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
2307 pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
2308 break;
2309 case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
2310 /* There must be at least one byte following this command. */
2311 pBusLogic->cbCommandParametersLeft = 1;
2312 break;
2313 case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
2314 /* 12 bytes + variable-length CDB. */
2315 pBusLogic->cbCommandParametersLeft = 12;
2316 break;
2317 case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2318 case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2319 /* Invalid commands. */
2320 pBusLogic->cbCommandParametersLeft = 0;
2321 break;
2322 case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should not come here anymore. */
2323 default:
2324 AssertMsgFailed(("Invalid operation code %#x\n", uVal));
2325 }
2326 }
2327 else
2328 {
2329#ifndef IN_RING3
2330 /* This command must be executed in R3 as it rehooks the ISA I/O port. */
2331 if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_MODIFY_IO_ADDRESS)
2332 {
2333 rc = VINF_IOM_R3_IOPORT_WRITE;
2334 break;
2335 }
2336#endif
2337 /*
2338 * The real adapter would set the Command register busy bit in the status register.
2339 * The guest has to wait until it is unset.
2340 * We don't need to do it because the guest does not continue execution while we are in this
2341 * function.
2342 */
2343 pBusLogic->aCommandBuffer[pBusLogic->iParameter] = uVal;
2344 pBusLogic->iParameter++;
2345 pBusLogic->cbCommandParametersLeft--;
2346 }
2347
2348 /* Start execution of command if there are no parameters left. */
2349 if (!pBusLogic->cbCommandParametersLeft)
2350 {
2351 rc = buslogicProcessCommand(pBusLogic);
2352 AssertMsgRC(rc, ("Processing command failed rc=%Rrc\n", rc));
2353 }
2354 break;
2355 }
2356
2357 /* On BusLogic adapters, the interrupt and geometry registers are R/W.
2358 * That is different from Adaptec 154x where those are read only.
2359 */
2360 case BUSLOGIC_REGISTER_INTERRUPT:
2361 pBusLogic->regInterrupt = uVal;
2362 break;
2363
2364 case BUSLOGIC_REGISTER_GEOMETRY:
2365 pBusLogic->regGeometry = uVal;
2366 break;
2367
2368 default:
2369 AssertMsgFailed(("Register not available\n"));
2370 rc = VERR_IOM_IOPORT_UNUSED;
2371 }
2372
2373 return rc;
2374}
2375
2376/**
2377 * Memory mapped I/O Handler for read operations.
2378 *
2379 * @returns VBox status code.
2380 *
2381 * @param pDevIns The device instance.
2382 * @param pvUser User argument.
2383 * @param GCPhysAddr Physical address (in GC) where the read starts.
2384 * @param pv Where to store the result.
2385 * @param cb Number of bytes read.
2386 */
2387PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
2388{
2389 /* the linux driver does not make use of the MMIO area. */
2390 AssertMsgFailed(("MMIO Read\n"));
2391 return VINF_SUCCESS;
2392}
2393
2394/**
2395 * Memory mapped I/O Handler for write operations.
2396 *
2397 * @returns VBox status code.
2398 *
2399 * @param pDevIns The device instance.
2400 * @param pvUser User argument.
2401 * @param GCPhysAddr Physical address (in GC) where the read starts.
2402 * @param pv Where to fetch the result.
2403 * @param cb Number of bytes to write.
2404 */
2405PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
2406{
2407 /* the linux driver does not make use of the MMIO area. */
2408 AssertMsgFailed(("MMIO Write\n"));
2409 return VINF_SUCCESS;
2410}
2411
2412/**
2413 * Port I/O Handler for IN operations.
2414 *
2415 * @returns VBox status code.
2416 *
2417 * @param pDevIns The device instance.
2418 * @param pvUser User argument.
2419 * @param uPort Port number used for the IN operation.
2420 * @param pu32 Where to store the result.
2421 * @param cb Number of bytes read.
2422 */
2423PDMBOTHCBDECL(int) buslogicIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
2424{
2425 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2426 unsigned iRegister = Port % 4;
2427
2428 Assert(cb == 1);
2429
2430 return buslogicRegisterRead(pBusLogic, iRegister, pu32);
2431}
2432
2433/**
2434 * Port I/O Handler for OUT operations.
2435 *
2436 * @returns VBox status code.
2437 *
2438 * @param pDevIns The device instance.
2439 * @param pvUser User argument.
2440 * @param uPort Port number used for the IN operation.
2441 * @param u32 The value to output.
2442 * @param cb The value size in bytes.
2443 */
2444PDMBOTHCBDECL(int) buslogicIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
2445{
2446 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2447 int rc = VINF_SUCCESS;
2448 unsigned iRegister = Port % 4;
2449 uint8_t uVal = (uint8_t)u32;
2450
2451 Assert(cb == 1);
2452
2453 rc = buslogicRegisterWrite(pBusLogic, iRegister, (uint8_t)uVal);
2454
2455 Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x rc=%Rrc\n",
2456 pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port, rc));
2457
2458 return rc;
2459}
2460
2461#ifdef IN_RING3
2462
2463static int buslogicR3PrepareBIOSSCSIRequest(PBUSLOGIC pBusLogic)
2464{
2465 int rc;
2466 PBUSLOGICTASKSTATE pTaskState;
2467 uint32_t uTargetDevice;
2468
2469 rc = RTMemCacheAllocEx(pBusLogic->hTaskCache, (void **)&pTaskState);
2470 AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
2471
2472 pTaskState->fBIOS = true;
2473
2474 rc = vboxscsiSetupRequest(&pBusLogic->VBoxSCSI, &pTaskState->PDMScsiRequest, &uTargetDevice);
2475 AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
2476
2477 pTaskState->PDMScsiRequest.pvUser = pTaskState;
2478
2479 pTaskState->CTX_SUFF(pTargetDevice) = &pBusLogic->aDeviceStates[uTargetDevice];
2480
2481 if (!pTaskState->CTX_SUFF(pTargetDevice)->fPresent)
2482 {
2483 /* Device is not present. */
2484 AssertMsg(pTaskState->PDMScsiRequest.pbCDB[0] == SCSI_INQUIRY,
2485 ("Device is not present but command is not inquiry\n"));
2486
2487 SCSIINQUIRYDATA ScsiInquiryData;
2488
2489 memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
2490 ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
2491 ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
2492
2493 memcpy(pBusLogic->VBoxSCSI.pbBuf, &ScsiInquiryData, 5);
2494
2495 rc = vboxscsiRequestFinished(&pBusLogic->VBoxSCSI, &pTaskState->PDMScsiRequest, SCSI_STATUS_OK);
2496 AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
2497
2498 RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2499 }
2500 else
2501 {
2502 LogFlowFunc(("before increment %u\n", pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests));
2503 ASMAtomicIncU32(&pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests);
2504 LogFlowFunc(("after increment %u\n", pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests));
2505
2506 rc = pTaskState->CTX_SUFF(pTargetDevice)->pDrvSCSIConnector->pfnSCSIRequestSend(pTaskState->CTX_SUFF(pTargetDevice)->pDrvSCSIConnector,
2507 &pTaskState->PDMScsiRequest);
2508 AssertMsgRC(rc, ("Sending request to SCSI layer failed rc=%Rrc\n", rc));
2509 }
2510
2511 return rc;
2512}
2513
2514
2515/**
2516 * Port I/O Handler for IN operations - BIOS port.
2517 *
2518 * @returns VBox status code.
2519 *
2520 * @param pDevIns The device instance.
2521 * @param pvUser User argument.
2522 * @param uPort Port number used for the IN operation.
2523 * @param pu32 Where to store the result.
2524 * @param cb Number of bytes read.
2525 */
2526static DECLCALLBACK(int) buslogicR3BiosIoPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
2527{
2528 int rc;
2529 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2530
2531 Assert(cb == 1);
2532
2533 rc = vboxscsiReadRegister(&pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pu32);
2534
2535 //Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2536 // __FUNCTION__, pu32, 1, pu32, (Port - BUSLOGIC_BIOS_IO_PORT), rc));
2537
2538 return rc;
2539}
2540
2541/**
2542 * Port I/O Handler for OUT operations - BIOS port.
2543 *
2544 * @returns VBox status code.
2545 *
2546 * @param pDevIns The device instance.
2547 * @param pvUser User argument.
2548 * @param uPort Port number used for the IN operation.
2549 * @param u32 The value to output.
2550 * @param cb The value size in bytes.
2551 */
2552static DECLCALLBACK(int) buslogicR3BiosIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
2553{
2554 int rc;
2555 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2556
2557 Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x\n",
2558 pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port));
2559
2560 Assert(cb == 1);
2561
2562 rc = vboxscsiWriteRegister(&pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), (uint8_t)u32);
2563 if (rc == VERR_MORE_DATA)
2564 {
2565 rc = buslogicR3PrepareBIOSSCSIRequest(pBusLogic);
2566 AssertRC(rc);
2567 }
2568 else if (RT_FAILURE(rc))
2569 AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2570
2571 return VINF_SUCCESS;
2572}
2573
2574/**
2575 * Port I/O Handler for primary port range OUT string operations.
2576 * @see FNIOMIOPORTOUTSTRING for details.
2577 */
2578static DECLCALLBACK(int) buslogicR3BiosIoPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2579 uint8_t const *pbSrc, uint32_t *pcTransfers, unsigned cb)
2580{
2581 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2582 Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2583
2584 int rc = vboxscsiWriteString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pbSrc, pcTransfers, cb);
2585 if (rc == VERR_MORE_DATA)
2586 {
2587 rc = buslogicR3PrepareBIOSSCSIRequest(pBusLogic);
2588 AssertRC(rc);
2589 }
2590 else if (RT_FAILURE(rc))
2591 AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2592
2593 return rc;
2594}
2595
2596/**
2597 * Port I/O Handler for primary port range IN string operations.
2598 * @see FNIOMIOPORTINSTRING for details.
2599 */
2600static DECLCALLBACK(int) buslogicR3BiosIoPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2601 uint8_t *pbDst, uint32_t *pcTransfers, unsigned cb)
2602{
2603 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2604 LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2605
2606 return vboxscsiReadString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2607 pbDst, pcTransfers, cb);
2608}
2609
2610/**
2611 * Update the ISA I/O range.
2612 *
2613 * @returns nothing.
2614 * @param pBusLogic Pointer to the BusLogic device instance.
2615 * @param uBaseCode Encoded ISA I/O base; only low 3 bits are used.
2616 */
2617static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)
2618{
2619 uint8_t uCode = uBaseCode & MAX_ISA_BASE;
2620 uint16_t uNewBase = g_aISABases[uCode];
2621 int rc = VINF_SUCCESS;
2622
2623 LogFlowFunc(("ISA I/O code %02X, new base %X\n", uBaseCode, uNewBase));
2624
2625 /* Check if the same port range is already registered. */
2626 if (uNewBase != pBusLogic->IOISABase)
2627 {
2628 /* Unregister the old range, if any. */
2629 if (pBusLogic->IOISABase)
2630 rc = PDMDevHlpIOPortDeregister(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->IOISABase, 4);
2631
2632 if (RT_SUCCESS(rc))
2633 {
2634 pBusLogic->IOISABase = 0; /* First mark as unregistered. */
2635 pBusLogic->uISABaseCode = ISA_BASE_DISABLED;
2636
2637 if (uNewBase)
2638 {
2639 /* Register the new range if requested. */
2640 rc = PDMDevHlpIOPortRegister(pBusLogic->CTX_SUFF(pDevIns), uNewBase, 4, NULL,
2641 buslogicIOPortWrite, buslogicIOPortRead,
2642 NULL, NULL,
2643 "BusLogic ISA");
2644 if (RT_SUCCESS(rc))
2645 {
2646 pBusLogic->IOISABase = uNewBase;
2647 pBusLogic->uISABaseCode = uCode;
2648 }
2649 }
2650 }
2651 if (RT_SUCCESS(rc))
2652 {
2653 if (uNewBase)
2654 {
2655 Log(("ISA I/O base: %x\n", uNewBase));
2656 LogRel(("BusLogic: ISA I/O base: %x\n", uNewBase));
2657 }
2658 else
2659 {
2660 Log(("Disabling ISA I/O ports.\n"));
2661 LogRel(("BusLogic: ISA I/O disabled\n"));
2662 }
2663 }
2664
2665 }
2666 return rc;
2667}
2668
2669static void buslogicR3WarningDiskFull(PPDMDEVINS pDevIns)
2670{
2671 int rc;
2672 LogRel(("BusLogic#%d: Host disk full\n", pDevIns->iInstance));
2673 rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND | VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_DISKFULL",
2674 N_("Host system reported disk full. VM execution is suspended. You can resume after freeing some space"));
2675 AssertRC(rc);
2676}
2677
2678static void buslogicR3WarningFileTooBig(PPDMDEVINS pDevIns)
2679{
2680 int rc;
2681 LogRel(("BusLogic#%d: File too big\n", pDevIns->iInstance));
2682 rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND | VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_FILETOOBIG",
2683 N_("Host system reported that the file size limit of the host file system has been exceeded. VM execution is suspended. You need to move your virtual hard disk to a filesystem which allows bigger files"));
2684 AssertRC(rc);
2685}
2686
2687static void buslogicR3WarningISCSI(PPDMDEVINS pDevIns)
2688{
2689 int rc;
2690 LogRel(("BusLogic#%d: iSCSI target unavailable\n", pDevIns->iInstance));
2691 rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND | VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_ISCSIDOWN",
2692 N_("The iSCSI target has stopped responding. VM execution is suspended. You can resume when it is available again"));
2693 AssertRC(rc);
2694}
2695
2696static void buslogicR3WarningUnknown(PPDMDEVINS pDevIns, int rc)
2697{
2698 int rc2;
2699 LogRel(("BusLogic#%d: Unknown but recoverable error has occurred (rc=%Rrc)\n", pDevIns->iInstance, rc));
2700 rc2 = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND | VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_UNKNOWN",
2701 N_("An unknown but recoverable I/O error has occurred (rc=%Rrc). VM execution is suspended. You can resume when the error is fixed"), rc);
2702 AssertRC(rc2);
2703}
2704
2705static void buslogicR3RedoSetWarning(PBUSLOGIC pThis, int rc)
2706{
2707 if (rc == VERR_DISK_FULL)
2708 buslogicR3WarningDiskFull(pThis->CTX_SUFF(pDevIns));
2709 else if (rc == VERR_FILE_TOO_BIG)
2710 buslogicR3WarningFileTooBig(pThis->CTX_SUFF(pDevIns));
2711 else if (rc == VERR_BROKEN_PIPE || rc == VERR_NET_CONNECTION_REFUSED)
2712 {
2713 /* iSCSI connection abort (first error) or failure to reestablish
2714 * connection (second error). Pause VM. On resume we'll retry. */
2715 buslogicR3WarningISCSI(pThis->CTX_SUFF(pDevIns));
2716 }
2717 else
2718 buslogicR3WarningUnknown(pThis->CTX_SUFF(pDevIns), rc);
2719}
2720
2721
2722static DECLCALLBACK(int) buslogicR3MmioMap(PPCIDEVICE pPciDev, /*unsigned*/ int iRegion,
2723 RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType)
2724{
2725 PPDMDEVINS pDevIns = pPciDev->pDevIns;
2726 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2727 int rc = VINF_SUCCESS;
2728
2729 Log2(("%s: registering MMIO area at GCPhysAddr=%RGp cb=%u\n", __FUNCTION__, GCPhysAddress, cb));
2730
2731 Assert(cb >= 32);
2732
2733 if (enmType == PCI_ADDRESS_SPACE_MEM)
2734 {
2735 /* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
2736 rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /*pvUser*/,
2737 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU,
2738 buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
2739 if (RT_FAILURE(rc))
2740 return rc;
2741
2742 if (pThis->fR0Enabled)
2743 {
2744 rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /*pvUser*/,
2745 "buslogicMMIOWrite", "buslogicMMIORead");
2746 if (RT_FAILURE(rc))
2747 return rc;
2748 }
2749
2750 if (pThis->fGCEnabled)
2751 {
2752 rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /*pvUser*/,
2753 "buslogicMMIOWrite", "buslogicMMIORead");
2754 if (RT_FAILURE(rc))
2755 return rc;
2756 }
2757
2758 pThis->MMIOBase = GCPhysAddress;
2759 }
2760 else if (enmType == PCI_ADDRESS_SPACE_IO)
2761 {
2762 rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2763 NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
2764 if (RT_FAILURE(rc))
2765 return rc;
2766
2767 if (pThis->fR0Enabled)
2768 {
2769 rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2770 0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2771 if (RT_FAILURE(rc))
2772 return rc;
2773 }
2774
2775 if (pThis->fGCEnabled)
2776 {
2777 rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2778 0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2779 if (RT_FAILURE(rc))
2780 return rc;
2781 }
2782
2783 pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
2784 }
2785 else
2786 AssertMsgFailed(("Invalid enmType=%d\n", enmType));
2787
2788 return rc;
2789}
2790
2791static DECLCALLBACK(int) buslogicR3DeviceSCSIRequestCompleted(PPDMISCSIPORT pInterface, PPDMSCSIREQUEST pSCSIRequest,
2792 int rcCompletion, bool fRedo, int rcReq)
2793{
2794 int rc;
2795 PBUSLOGICTASKSTATE pTaskState = (PBUSLOGICTASKSTATE)pSCSIRequest->pvUser;
2796 PBUSLOGICDEVICE pBusLogicDevice = pTaskState->CTX_SUFF(pTargetDevice);
2797 PBUSLOGIC pBusLogic = pBusLogicDevice->CTX_SUFF(pBusLogic);
2798
2799 LogFlowFunc(("before decrement %u\n", pBusLogicDevice->cOutstandingRequests));
2800 ASMAtomicDecU32(&pBusLogicDevice->cOutstandingRequests);
2801 LogFlowFunc(("after decrement %u\n", pBusLogicDevice->cOutstandingRequests));
2802
2803 if (fRedo)
2804 {
2805 if (!pTaskState->fBIOS)
2806 {
2807 buslogicR3DataBufferFree(pTaskState);
2808
2809 if (pTaskState->pbSenseBuffer)
2810 buslogicR3SenseBufferFree(pTaskState, false /* fCopy */);
2811 }
2812
2813 /* Add to the list. */
2814 do
2815 {
2816 pTaskState->pRedoNext = ASMAtomicReadPtrT(&pBusLogic->pTasksRedoHead, PBUSLOGICTASKSTATE);
2817 } while (!ASMAtomicCmpXchgPtr(&pBusLogic->pTasksRedoHead, pTaskState, pTaskState->pRedoNext));
2818
2819 /* Suspend the VM if not done already. */
2820 if (!ASMAtomicXchgBool(&pBusLogic->fRedo, true))
2821 buslogicR3RedoSetWarning(pBusLogic, rcReq);
2822 }
2823 else
2824 {
2825 if (pTaskState->fBIOS)
2826 {
2827 rc = vboxscsiRequestFinished(&pBusLogic->VBoxSCSI, pSCSIRequest, rcCompletion);
2828 AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
2829 }
2830 else
2831 {
2832 buslogicR3DataBufferFree(pTaskState);
2833
2834 if (pTaskState->pbSenseBuffer)
2835 buslogicR3SenseBufferFree(pTaskState, (rcCompletion != SCSI_STATUS_OK));
2836
2837 if (rcCompletion == SCSI_STATUS_OK)
2838 buslogicR3SendIncomingMailbox(pBusLogic, pTaskState,
2839 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2840 BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2841 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR);
2842 else if (rcCompletion == SCSI_STATUS_CHECK_CONDITION)
2843 buslogicR3SendIncomingMailbox(pBusLogic, pTaskState,
2844 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2845 BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION,
2846 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2847 else
2848 AssertMsgFailed(("invalid completion status %d\n", rcCompletion));
2849 }
2850#ifdef LOG_ENABLED
2851 buslogicR3DumpCCBInfo(&pTaskState->CommandControlBlockGuest, pTaskState->fIs24Bit);
2852#endif
2853
2854 /* Remove task from the cache. */
2855 RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2856 }
2857
2858 if (pBusLogicDevice->cOutstandingRequests == 0 && pBusLogic->fSignalIdle)
2859 PDMDevHlpAsyncNotificationCompleted(pBusLogic->pDevInsR3);
2860
2861 return VINF_SUCCESS;
2862}
2863
2864static DECLCALLBACK(int) buslogicR3QueryDeviceLocation(PPDMISCSIPORT pInterface, const char **ppcszController,
2865 uint32_t *piInstance, uint32_t *piLUN)
2866{
2867 PBUSLOGICDEVICE pBusLogicDevice = PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface);
2868 PPDMDEVINS pDevIns = pBusLogicDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
2869
2870 AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2871 AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2872 AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2873
2874 *ppcszController = pDevIns->pReg->szName;
2875 *piInstance = pDevIns->iInstance;
2876 *piLUN = pBusLogicDevice->iLUN;
2877
2878 return VINF_SUCCESS;
2879}
2880
2881static int buslogicR3DeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState)
2882{
2883 int rc = VINF_SUCCESS;
2884 uint8_t uTargetIdCCB;
2885 PBUSLOGICDEVICE pTargetDevice;
2886
2887 /* Fetch the CCB from guest memory. */
2888 /** @todo How much do we really have to read? */
2889 RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB;
2890 PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
2891 &pTaskState->CommandControlBlockGuest, sizeof(CCB32));
2892
2893 uTargetIdCCB = pTaskState->fIs24Bit ? pTaskState->CommandControlBlockGuest.o.uTargetId : pTaskState->CommandControlBlockGuest.n.uTargetId;
2894 pTargetDevice = &pBusLogic->aDeviceStates[uTargetIdCCB];
2895 pTaskState->CTX_SUFF(pTargetDevice) = pTargetDevice;
2896
2897#ifdef LOG_ENABLED
2898 buslogicR3DumpCCBInfo(&pTaskState->CommandControlBlockGuest, pTaskState->fIs24Bit);
2899#endif
2900
2901 /* Alloc required buffers. */
2902 rc = buslogicR3DataBufferAlloc(pTaskState);
2903 AssertMsgRC(rc, ("Alloc failed rc=%Rrc\n", rc));
2904
2905 rc = buslogicR3SenseBufferAlloc(pTaskState);
2906 AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc));
2907
2908 /* Check if device is present on bus. If not return error immediately and don't process this further. */
2909 if (!pBusLogic->aDeviceStates[uTargetIdCCB].fPresent)
2910 {
2911 buslogicR3DataBufferFree(pTaskState);
2912
2913 if (pTaskState->pbSenseBuffer)
2914 buslogicR3SenseBufferFree(pTaskState, true);
2915
2916 buslogicR3SendIncomingMailbox(pBusLogic, pTaskState,
2917 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
2918 BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2919 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2920
2921 RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2922 }
2923 else
2924 {
2925 /* Setup SCSI request. */
2926 pTaskState->PDMScsiRequest.uLogicalUnit = pTaskState->fIs24Bit ? pTaskState->CommandControlBlockGuest.o.uLogicalUnit
2927 : pTaskState->CommandControlBlockGuest.n.uLogicalUnit;
2928
2929 if (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN)
2930 pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_UNKNOWN;
2931 else if (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
2932 pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_FROM_DEVICE;
2933 else if (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
2934 pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_TO_DEVICE;
2935 else if (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_NO_DATA)
2936 pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_NONE;
2937 else
2938 AssertMsgFailed(("Invalid data direction type %d\n", pTaskState->CommandControlBlockGuest.c.uDataDirection));
2939
2940 pTaskState->PDMScsiRequest.cbCDB = pTaskState->CommandControlBlockGuest.c.cbCDB;
2941 pTaskState->PDMScsiRequest.pbCDB = pTaskState->CommandControlBlockGuest.c.abCDB;
2942 if (pTaskState->DataSeg.cbSeg)
2943 {
2944 pTaskState->PDMScsiRequest.cbScatterGather = pTaskState->DataSeg.cbSeg;
2945 pTaskState->PDMScsiRequest.cScatterGatherEntries = 1;
2946 pTaskState->PDMScsiRequest.paScatterGatherHead = &pTaskState->DataSeg;
2947 }
2948 else
2949 {
2950 pTaskState->PDMScsiRequest.cbScatterGather = 0;
2951 pTaskState->PDMScsiRequest.cScatterGatherEntries = 0;
2952 pTaskState->PDMScsiRequest.paScatterGatherHead = NULL;
2953 }
2954 pTaskState->PDMScsiRequest.cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData);
2955 pTaskState->PDMScsiRequest.pbSenseBuffer = pTaskState->pbSenseBuffer;
2956 pTaskState->PDMScsiRequest.pvUser = pTaskState;
2957
2958 ASMAtomicIncU32(&pTargetDevice->cOutstandingRequests);
2959 rc = pTargetDevice->pDrvSCSIConnector->pfnSCSIRequestSend(pTargetDevice->pDrvSCSIConnector, &pTaskState->PDMScsiRequest);
2960 AssertMsgRC(rc, ("Sending request to SCSI layer failed rc=%Rrc\n", rc));
2961 }
2962
2963 return rc;
2964}
2965
2966static int buslogicR3DeviceSCSIRequestAbort(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState)
2967{
2968 int rc = VINF_SUCCESS;
2969 uint8_t uTargetIdCCB;
2970 PBUSLOGICDEVICE pTargetDevice;
2971 RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB;
2972
2973 PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
2974 &pTaskState->CommandControlBlockGuest, sizeof(CCB32));
2975
2976 uTargetIdCCB = pTaskState->fIs24Bit ? pTaskState->CommandControlBlockGuest.o.uTargetId : pTaskState->CommandControlBlockGuest.n.uTargetId;
2977 pTargetDevice = &pBusLogic->aDeviceStates[uTargetIdCCB];
2978 pTaskState->CTX_SUFF(pTargetDevice) = pTargetDevice;
2979
2980 buslogicR3SendIncomingMailbox(pBusLogic, pTaskState,
2981 BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED,
2982 BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2983 BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND);
2984
2985 RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2986
2987 return rc;
2988}
2989
2990/**
2991 * Read a mailbox from guest memory. Convert 24-bit mailboxes to
2992 * 32-bit format.
2993 *
2994 * @returns Mailbox guest physical address.
2995 * @param pBusLogic Pointer to the BusLogic instance data.
2996 * @param pTaskStat Pointer to the task state being set up.
2997 */
2998static RTGCPHYS buslogicR3ReadOutgoingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState)
2999{
3000 RTGCPHYS GCMailbox;
3001
3002 if (pBusLogic->fMbxIs24Bit)
3003 {
3004 Mailbox24 Mbx24;
3005
3006 GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox24));
3007 PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3008 pTaskState->MailboxGuest.u32PhysAddrCCB = ADDR_TO_U32(Mbx24.aPhysAddrCCB);
3009 pTaskState->MailboxGuest.u.out.uActionCode = Mbx24.uCmdState;
3010 }
3011 else
3012 {
3013 GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox32));
3014 PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, &pTaskState->MailboxGuest, sizeof(Mailbox32));
3015 }
3016
3017 return GCMailbox;
3018}
3019
3020/**
3021 * Read mailbox from the guest and execute command.
3022 *
3023 * @returns VBox status code.
3024 * @param pBusLogic Pointer to the BusLogic instance data.
3025 */
3026static int buslogicR3ProcessMailboxNext(PBUSLOGIC pBusLogic)
3027{
3028 PBUSLOGICTASKSTATE pTaskState = NULL;
3029 RTGCPHYS GCPhysAddrMailboxCurrent;
3030 int rc;
3031
3032 rc = RTMemCacheAllocEx(pBusLogic->hTaskCache, (void **)&pTaskState);
3033 AssertMsgReturn(RT_SUCCESS(rc) && (pTaskState != NULL), ("Failed to get task state from cache\n"), rc);
3034
3035 pTaskState->fBIOS = false;
3036 pTaskState->fIs24Bit = pBusLogic->fMbxIs24Bit;
3037 pTaskState->cbSGEntry = pBusLogic->fMbxIs24Bit ? sizeof(SGE24) : sizeof(SGE32);
3038
3039 if (!pBusLogic->fStrictRoundRobinMode)
3040 {
3041 /* Search for a filled mailbox - stop if we have scanned all mailboxes. */
3042 uint8_t uMailboxPosCur = pBusLogic->uMailboxOutgoingPositionCurrent;
3043
3044 do
3045 {
3046 /* Fetch mailbox from guest memory. */
3047 GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic,pTaskState);
3048
3049 /* Check the next mailbox. */
3050 buslogicR3OutgoingMailboxAdvance(pBusLogic);
3051 } while ( pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE
3052 && uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent);
3053 }
3054 else
3055 {
3056 /* Fetch mailbox from guest memory. */
3057 GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic,pTaskState);
3058 }
3059
3060 /*
3061 * Check if the mailbox is actually loaded.
3062 * It might be possible that the guest notified us without
3063 * a loaded mailbox. Do nothing in that case but leave a
3064 * log entry.
3065 */
3066 if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE)
3067 {
3068 Log(("No loaded mailbox left\n"));
3069 RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
3070 return VERR_NO_DATA;
3071 }
3072
3073 LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB));
3074#ifdef LOG_ENABLED
3075 buslogicR3DumpMailboxInfo(&pTaskState->MailboxGuest, true);
3076#endif
3077
3078 /* We got the mailbox, mark it as free in the guest. */
3079 uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
3080 unsigned uCodeOffs = pTaskState->fIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
3081 PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent + uCodeOffs, &uActionCode, sizeof(uActionCode));
3082
3083 if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
3084 rc = buslogicR3DeviceSCSIRequestSetup(pBusLogic, pTaskState);
3085 else if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND)
3086 {
3087 LogFlow(("Aborting mailbox\n"));
3088 rc = buslogicR3DeviceSCSIRequestAbort(pBusLogic, pTaskState);
3089 }
3090 else
3091 AssertMsgFailed(("Invalid outgoing mailbox action code %u\n", pTaskState->MailboxGuest.u.out.uActionCode));
3092
3093 AssertRC(rc);
3094
3095 /* Advance to the next mailbox. */
3096 if (pBusLogic->fStrictRoundRobinMode)
3097 buslogicR3OutgoingMailboxAdvance(pBusLogic);
3098
3099 return rc;
3100}
3101
3102/**
3103 * Transmit queue consumer
3104 * Queue a new async task.
3105 *
3106 * @returns Success indicator.
3107 * If false the item will not be removed and the flushing will stop.
3108 * @param pDevIns The device instance.
3109 * @param pItem The item to consume. Upon return this item will be freed.
3110 */
3111static DECLCALLBACK(bool) buslogicR3NotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
3112{
3113 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3114
3115 /* Reset notification send flag now. */
3116 Assert(pBusLogic->fNotificationSend);
3117 ASMAtomicXchgBool(&pBusLogic->fNotificationSend, false);
3118 ASMAtomicXchgU32(&pBusLogic->cMailboxesReady, 0); /** @todo Actually not required anymore but to stay compatible with older saved states. */
3119
3120 /* Process mailboxes. */
3121 int rc;
3122 do
3123 {
3124 rc = buslogicR3ProcessMailboxNext(pBusLogic);
3125 AssertMsg(RT_SUCCESS(rc) || rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc));
3126 } while (RT_SUCCESS(rc));
3127
3128 return true;
3129}
3130
3131/**
3132 * Kicks the controller to process pending tasks after the VM was resumed
3133 * or loaded from a saved state.
3134 *
3135 * @returns nothing.
3136 * @param pThis The BusLogic device instance.
3137 */
3138static void buslogicR3Kick(PBUSLOGIC pThis)
3139{
3140 if (pThis->fRedo)
3141 {
3142 pThis->fRedo = false;
3143 if (pThis->VBoxSCSI.fBusy)
3144 {
3145
3146 /* The BIOS had a request active when we got suspended. Resume it. */
3147 int rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3148 AssertRC(rc);
3149 }
3150 else
3151 {
3152 /* Queue all pending tasks again. */
3153 PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3154
3155 pThis->pTasksRedoHead = NULL;
3156
3157 while (pTaskState)
3158 {
3159 PBUSLOGICTASKSTATE pCur = pTaskState;
3160
3161 int rc = buslogicR3DeviceSCSIRequestSetup(pThis, pCur);
3162 AssertRC(rc);
3163
3164 pTaskState = pTaskState->pRedoNext;
3165 }
3166 }
3167 }
3168}
3169
3170/** @callback_method_impl{FNSSMDEVLIVEEXEC} */
3171static DECLCALLBACK(int) buslogicR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
3172{
3173 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3174
3175 /* Save the device config. */
3176 for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3177 SSMR3PutBool(pSSM, pThis->aDeviceStates[i].fPresent);
3178
3179 return VINF_SSM_DONT_CALL_AGAIN;
3180}
3181
3182/** @callback_method_impl{FNSSMDEVSAVEEXEC} */
3183static DECLCALLBACK(int) buslogicR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3184{
3185 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3186
3187 /* Every device first. */
3188 for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3189 {
3190 PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3191
3192 AssertMsg(!pDevice->cOutstandingRequests,
3193 ("There are still outstanding requests on this device\n"));
3194 SSMR3PutBool(pSSM, pDevice->fPresent);
3195 SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
3196 }
3197 /* Now the main device state. */
3198 SSMR3PutU8 (pSSM, pBusLogic->regStatus);
3199 SSMR3PutU8 (pSSM, pBusLogic->regInterrupt);
3200 SSMR3PutU8 (pSSM, pBusLogic->regGeometry);
3201 SSMR3PutMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3202 SSMR3PutU8 (pSSM, pBusLogic->uOperationCode);
3203 SSMR3PutMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3204 SSMR3PutU8 (pSSM, pBusLogic->iParameter);
3205 SSMR3PutU8 (pSSM, pBusLogic->cbCommandParametersLeft);
3206 SSMR3PutBool (pSSM, pBusLogic->fUseLocalRam);
3207 SSMR3PutMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3208 SSMR3PutU8 (pSSM, pBusLogic->iReply);
3209 SSMR3PutU8 (pSSM, pBusLogic->cbReplyParametersLeft);
3210 SSMR3PutBool (pSSM, pBusLogic->fIRQEnabled);
3211 SSMR3PutU8 (pSSM, pBusLogic->uISABaseCode);
3212 SSMR3PutU32 (pSSM, pBusLogic->cMailbox);
3213 SSMR3PutBool (pSSM, pBusLogic->fMbxIs24Bit);
3214 SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxOutgoingBase);
3215 SSMR3PutU32 (pSSM, pBusLogic->uMailboxOutgoingPositionCurrent);
3216 SSMR3PutU32 (pSSM, pBusLogic->cMailboxesReady);
3217 SSMR3PutBool (pSSM, pBusLogic->fNotificationSend);
3218 SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxIncomingBase);
3219 SSMR3PutU32 (pSSM, pBusLogic->uMailboxIncomingPositionCurrent);
3220 SSMR3PutBool (pSSM, pBusLogic->fStrictRoundRobinMode);
3221 SSMR3PutBool (pSSM, pBusLogic->fExtendedLunCCBFormat);
3222
3223 vboxscsiR3SaveExec(&pBusLogic->VBoxSCSI, pSSM);
3224
3225 /*
3226 * Save the physical addresses of the command control blocks of still pending tasks.
3227 * They are processed again on resume.
3228 *
3229 * The number of pending tasks needs to be determined first.
3230 */
3231 uint32_t cTasks = 0;
3232
3233 PBUSLOGICTASKSTATE pTaskState = pBusLogic->pTasksRedoHead;
3234 if (pBusLogic->fRedo)
3235 {
3236 while (pTaskState)
3237 {
3238 cTasks++;
3239 pTaskState = pTaskState->pRedoNext;
3240 }
3241 }
3242 SSMR3PutU32(pSSM, cTasks);
3243
3244 /* Write the address of every task now. */
3245 pTaskState = pBusLogic->pTasksRedoHead;
3246 while (pTaskState)
3247 {
3248 SSMR3PutU32(pSSM, pTaskState->MailboxGuest.u32PhysAddrCCB);
3249 pTaskState = pTaskState->pRedoNext;
3250 }
3251
3252 return SSMR3PutU32(pSSM, ~0);
3253}
3254
3255/** @callback_method_impl{FNSSMDEVLOADDONE} */
3256static DECLCALLBACK(int) buslogicR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3257{
3258 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3259
3260 buslogicR3RegisterISARange(pThis, pThis->uISABaseCode);
3261 buslogicR3Kick(pThis);
3262 return VINF_SUCCESS;
3263}
3264
3265/** @callback_method_impl{FNSSMDEVLOADEXEC} */
3266static DECLCALLBACK(int) buslogicR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3267{
3268 PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3269 int rc = VINF_SUCCESS;
3270
3271 /* We support saved states only from this and older versions. */
3272 if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_VERSION)
3273 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
3274
3275 /* Every device first. */
3276 for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3277 {
3278 PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3279
3280 AssertMsg(!pDevice->cOutstandingRequests,
3281 ("There are still outstanding requests on this device\n"));
3282 bool fPresent;
3283 rc = SSMR3GetBool(pSSM, &fPresent);
3284 AssertRCReturn(rc, rc);
3285 if (pDevice->fPresent != fPresent)
3286 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"), i, pDevice->fPresent, fPresent);
3287
3288 if (uPass == SSM_PASS_FINAL)
3289 SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
3290 }
3291
3292 if (uPass != SSM_PASS_FINAL)
3293 return VINF_SUCCESS;
3294
3295 /* Now the main device state. */
3296 SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regStatus);
3297 SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regInterrupt);
3298 SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regGeometry);
3299 SSMR3GetMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3300 SSMR3GetU8 (pSSM, &pBusLogic->uOperationCode);
3301 if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE)
3302 SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3303 else
3304 SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, BUSLOGIC_COMMAND_SIZE_OLD);
3305 SSMR3GetU8 (pSSM, &pBusLogic->iParameter);
3306 SSMR3GetU8 (pSSM, &pBusLogic->cbCommandParametersLeft);
3307 SSMR3GetBool (pSSM, &pBusLogic->fUseLocalRam);
3308 SSMR3GetMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3309 SSMR3GetU8 (pSSM, &pBusLogic->iReply);
3310 SSMR3GetU8 (pSSM, &pBusLogic->cbReplyParametersLeft);
3311 SSMR3GetBool (pSSM, &pBusLogic->fIRQEnabled);
3312 SSMR3GetU8 (pSSM, &pBusLogic->uISABaseCode);
3313 SSMR3GetU32 (pSSM, &pBusLogic->cMailbox);
3314 if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX)
3315 SSMR3GetBool (pSSM, &pBusLogic->fMbxIs24Bit);
3316 SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxOutgoingBase);
3317 SSMR3GetU32 (pSSM, &pBusLogic->uMailboxOutgoingPositionCurrent);
3318 SSMR3GetU32 (pSSM, (uint32_t *)&pBusLogic->cMailboxesReady);
3319 SSMR3GetBool (pSSM, (bool *)&pBusLogic->fNotificationSend);
3320 SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxIncomingBase);
3321 SSMR3GetU32 (pSSM, &pBusLogic->uMailboxIncomingPositionCurrent);
3322 SSMR3GetBool (pSSM, &pBusLogic->fStrictRoundRobinMode);
3323 SSMR3GetBool (pSSM, &pBusLogic->fExtendedLunCCBFormat);
3324
3325 rc = vboxscsiR3LoadExec(&pBusLogic->VBoxSCSI, pSSM);
3326 if (RT_FAILURE(rc))
3327 {
3328 LogRel(("BusLogic: Failed to restore BIOS state: %Rrc.\n", rc));
3329 return PDMDEV_SET_ERROR(pDevIns, rc,
3330 N_("BusLogic: Failed to restore BIOS state\n"));
3331 }
3332
3333 if (pBusLogic->VBoxSCSI.fBusy)
3334 pBusLogic->fRedo = true;
3335
3336 if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING)
3337 {
3338 /* Check if there are pending tasks saved. */
3339 uint32_t cTasks = 0;
3340
3341 SSMR3GetU32(pSSM, &cTasks);
3342
3343 if (cTasks)
3344 pBusLogic->fRedo = true;
3345
3346 for (uint32_t i = 0; i < cTasks; i++)
3347 {
3348 PBUSLOGICTASKSTATE pTaskState = (PBUSLOGICTASKSTATE)RTMemCacheAlloc(pBusLogic->hTaskCache);
3349 if (!pTaskState)
3350 {
3351 rc = VERR_NO_MEMORY;
3352 break;
3353 }
3354
3355 rc = SSMR3GetU32(pSSM, &pTaskState->MailboxGuest.u32PhysAddrCCB);
3356 if (RT_FAILURE(rc))
3357 {
3358 RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
3359 break;
3360 }
3361
3362 /* Link into the list. */
3363 pTaskState->pRedoNext = pBusLogic->pTasksRedoHead;
3364 pBusLogic->pTasksRedoHead = pTaskState;
3365 }
3366 }
3367
3368 if (RT_SUCCESS(rc))
3369 {
3370 uint32_t u32;
3371 rc = SSMR3GetU32(pSSM, &u32);
3372 if (RT_SUCCESS(rc))
3373 AssertMsgReturn(u32 == ~0U, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
3374 }
3375
3376 return rc;
3377}
3378
3379/**
3380 * Gets the pointer to the status LED of a device - called from the SCSI driver.
3381 *
3382 * @returns VBox status code.
3383 * @param pInterface Pointer to the interface structure containing the called function pointer.
3384 * @param iLUN The unit which status LED we desire. Always 0 here as the driver
3385 * doesn't know about other LUN's.
3386 * @param ppLed Where to store the LED pointer.
3387 */
3388static DECLCALLBACK(int) buslogicR3DeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3389{
3390 PBUSLOGICDEVICE pDevice = PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface);
3391 if (iLUN == 0)
3392 {
3393 *ppLed = &pDevice->Led;
3394 Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3395 return VINF_SUCCESS;
3396 }
3397 return VERR_PDM_LUN_NOT_FOUND;
3398}
3399
3400/**
3401 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
3402 */
3403static DECLCALLBACK(void *) buslogicR3DeviceQueryInterface(PPDMIBASE pInterface, const char *pszIID)
3404{
3405 PBUSLOGICDEVICE pDevice = PDMIBASE_2_PBUSLOGICDEVICE(pInterface);
3406 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
3407 PDMIBASE_RETURN_INTERFACE(pszIID, PDMISCSIPORT, &pDevice->ISCSIPort);
3408 PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
3409 return NULL;
3410}
3411
3412/**
3413 * Gets the pointer to the status LED of a unit.
3414 *
3415 * @returns VBox status code.
3416 * @param pInterface Pointer to the interface structure containing the called function pointer.
3417 * @param iLUN The unit which status LED we desire.
3418 * @param ppLed Where to store the LED pointer.
3419 */
3420static DECLCALLBACK(int) buslogicR3StatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3421{
3422 PBUSLOGIC pBusLogic = PDMILEDPORTS_2_PBUSLOGIC(pInterface);
3423 if (iLUN < BUSLOGIC_MAX_DEVICES)
3424 {
3425 *ppLed = &pBusLogic->aDeviceStates[iLUN].Led;
3426 Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3427 return VINF_SUCCESS;
3428 }
3429 return VERR_PDM_LUN_NOT_FOUND;
3430}
3431
3432/**
3433 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
3434 */
3435static DECLCALLBACK(void *) buslogicR3StatusQueryInterface(PPDMIBASE pInterface, const char *pszIID)
3436{
3437 PBUSLOGIC pThis = PDMIBASE_2_PBUSLOGIC(pInterface);
3438 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3439 PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
3440 return NULL;
3441}
3442
3443/**
3444 * BusLogic debugger info callback.
3445 *
3446 * @param pDevIns The device instance.
3447 * @param pHlp The output helpers.
3448 * @param pszArgs The arguments.
3449 */
3450static DECLCALLBACK(void) buslogicR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
3451{
3452 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3453 unsigned i;
3454 bool fVerbose = false;
3455
3456 /* Parse arguments. */
3457 if (pszArgs)
3458 fVerbose = strstr(pszArgs, "verbose") != NULL;
3459
3460 /* Show basic information. */
3461 pHlp->pfnPrintf(pHlp,
3462 "%s#%d: PCI I/O=%RTiop ISA I/O=%RTiop MMIO=%RGp IRQ=%u GC=%RTbool R0=%RTbool\n",
3463 pDevIns->pReg->szName,
3464 pDevIns->iInstance,
3465 pThis->IOPortBase, pThis->IOISABase, pThis->MMIOBase,
3466 PCIDevGetInterruptLine(&pThis->dev),
3467 !!pThis->fGCEnabled, !!pThis->fR0Enabled);
3468
3469 /* Print mailbox state. */
3470 if (pThis->regStatus & BL_STAT_INREQ)
3471 pHlp->pfnPrintf(pHlp, "Mailbox not initialized\n");
3472 else
3473 pHlp->pfnPrintf(pHlp, "%u-bit mailbox with %u entries at %RGp (%d LUN CCBs)\n",
3474 pThis->fMbxIs24Bit ? 24 : 32, pThis->cMailbox,
3475 pThis->GCPhysAddrMailboxOutgoingBase,
3476 pThis->fMbxIs24Bit ? 8 : pThis->fExtendedLunCCBFormat ? 64 : 8);
3477
3478 /* Print register contents. */
3479 pHlp->pfnPrintf(pHlp, "Registers: STAT=%02x INTR=%02x GEOM=%02x\n",
3480 pThis->regStatus, pThis->regInterrupt, pThis->regGeometry);
3481
3482 /* Print miscellaneous state. */
3483 pHlp->pfnPrintf(pHlp, "HAC interrupts: %s\n",
3484 pThis->fIRQEnabled ? "on" : "off");
3485
3486 /* Print the current command, if any. */
3487 if (pThis->uOperationCode != 0xff )
3488 pHlp->pfnPrintf(pHlp, "Current command: %02X\n", pThis->uOperationCode);
3489
3490 if (fVerbose && (pThis->regStatus & BL_STAT_INREQ) == 0)
3491 {
3492 RTGCPHYS GCMailbox;
3493
3494 /* Dump the mailbox contents. */
3495 if (pThis->fMbxIs24Bit)
3496 {
3497 Mailbox24 Mbx24;
3498
3499 /* Outgoing mailbox, 24-bit format. */
3500 GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3501 pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (24-bit) at %06X:\n", GCMailbox);
3502 for (i = 0; i < pThis->cMailbox; ++i)
3503 {
3504 PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3505 pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X action code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3506 pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3507 GCMailbox += sizeof(Mailbox24);
3508 }
3509
3510 /* Incoming mailbox, 24-bit format. */
3511 GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox24));
3512 pHlp->pfnPrintf(pHlp, " Incoming mailbox entries (24-bit) at %06X:\n", GCMailbox);
3513 for (i = 0; i < pThis->cMailbox; ++i)
3514 {
3515 PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3516 pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X completion code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3517 pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxIncomingPositionCurrent == i ? " *" : "");
3518 GCMailbox += sizeof(Mailbox24);
3519 }
3520
3521 }
3522 else
3523 {
3524 Mailbox32 Mbx32;
3525
3526 /* Outgoing mailbox, 32-bit format. */
3527 GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3528 pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3529 for (i = 0; i < pThis->cMailbox; ++i)
3530 {
3531 PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3532 pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X action code %02X", i, Mbx32.u32PhysAddrCCB, Mbx32.u.out.uActionCode);
3533 pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3534 GCMailbox += sizeof(Mailbox32);
3535 }
3536
3537 /* Incoming mailbox, 32-bit format. */
3538 GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox32));
3539 pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3540 for (i = 0; i < pThis->cMailbox; ++i)
3541 {
3542 PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3543 pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X completion code %02X BTSTAT %02X SDSTAT %02X", i,
3544 Mbx32.u32PhysAddrCCB, Mbx32.u.in.uCompletionCode, Mbx32.u.in.uHostAdapterStatus, Mbx32.u.in.uTargetDeviceStatus);
3545 pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3546 GCMailbox += sizeof(Mailbox32);
3547 }
3548
3549 }
3550 }
3551}
3552
3553/* -=-=-=-=- Helper -=-=-=-=- */
3554
3555 /**
3556 * Checks if all asynchronous I/O is finished.
3557 *
3558 * Used by buslogicR3Reset, buslogicR3Suspend and buslogicR3PowerOff.
3559 *
3560 * @returns true if quiesced, false if busy.
3561 * @param pDevIns The device instance.
3562 */
3563static bool buslogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
3564{
3565 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3566
3567 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3568 {
3569 PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
3570 if (pThisDevice->pDrvBase)
3571 {
3572 if (pThisDevice->cOutstandingRequests != 0)
3573 return false;
3574 }
3575 }
3576
3577 return true;
3578}
3579
3580/**
3581 * Callback employed by buslogicR3Suspend and buslogicR3PowerOff..
3582 *
3583 * @returns true if we've quiesced, false if we're still working.
3584 * @param pDevIns The device instance.
3585 */
3586static DECLCALLBACK(bool) buslogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
3587{
3588 if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3589 return false;
3590
3591 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3592 ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3593 return true;
3594}
3595
3596/**
3597 * Common worker for ahciR3Suspend and ahciR3PowerOff.
3598 */
3599static void buslogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns, bool fPowerOff)
3600{
3601 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3602
3603 ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3604 if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3605 PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncSuspendOrPowerOffDone);
3606 else
3607 {
3608 ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3609
3610 AssertMsg(!pThis->fNotificationSend, ("The PDM Queue should be empty at this point\n"));
3611
3612 if (pThis->fRedo)
3613 {
3614 if (fPowerOff)
3615 {
3616 /* Free tasks which would have been queued again on resume. */
3617 PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3618
3619 pThis->pTasksRedoHead = NULL;
3620
3621 while (pTaskState)
3622 {
3623 PBUSLOGICTASKSTATE pFree;
3624
3625 pFree = pTaskState;
3626 pTaskState = pTaskState->pRedoNext;
3627
3628 RTMemCacheFree(pThis->hTaskCache, pFree);
3629 }
3630 pThis->fRedo = false;
3631 }
3632 else if (pThis->VBoxSCSI.fBusy)
3633 {
3634 /* Destroy the task because the BIOS interface has all necessary information. */
3635 Assert(pThis->pTasksRedoHead->fBIOS);
3636 Assert(!pThis->pTasksRedoHead->pRedoNext);
3637
3638 RTMemCacheFree(pThis->hTaskCache, pThis->pTasksRedoHead);
3639 pThis->pTasksRedoHead = NULL;
3640 }
3641 }
3642 }
3643}
3644
3645/**
3646 * Suspend notification.
3647 *
3648 * @param pDevIns The device instance data.
3649 */
3650static DECLCALLBACK(void) buslogicR3Suspend(PPDMDEVINS pDevIns)
3651{
3652 Log(("buslogicR3Suspend\n"));
3653 buslogicR3SuspendOrPowerOff(pDevIns, false /* fPoweroff */);
3654}
3655
3656/**
3657 * Resume notification.
3658 *
3659 * @param pDevIns The device instance data.
3660 */
3661static DECLCALLBACK(void) buslogicR3Resume(PPDMDEVINS pDevIns)
3662{
3663 Log(("buslogicR3Resume\n"));
3664 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3665 buslogicR3Kick(pThis);
3666}
3667
3668
3669/**
3670 * Detach notification.
3671 *
3672 * One harddisk at one port has been unplugged.
3673 * The VM is suspended at this point.
3674 *
3675 * @param pDevIns The device instance.
3676 * @param iLUN The logical unit which is being detached.
3677 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3678 */
3679static DECLCALLBACK(void) buslogicR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3680{
3681 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3682 PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3683
3684 Log(("%s:\n", __FUNCTION__));
3685
3686 AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3687 ("BusLogic: Device does not support hotplugging\n"));
3688
3689 /*
3690 * Zero some important members.
3691 */
3692 pDevice->pDrvBase = NULL;
3693 pDevice->fPresent = false;
3694 pDevice->pDrvSCSIConnector = NULL;
3695}
3696
3697/**
3698 * Attach command.
3699 *
3700 * This is called when we change block driver.
3701 *
3702 * @returns VBox status code.
3703 * @param pDevIns The device instance.
3704 * @param iLUN The logical unit which is being detached.
3705 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3706 */
3707static DECLCALLBACK(int) buslogicR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3708{
3709 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3710 PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3711 int rc;
3712
3713 AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3714 ("BusLogic: Device does not support hotplugging\n"),
3715 VERR_INVALID_PARAMETER);
3716
3717 /* the usual paranoia */
3718 AssertRelease(!pDevice->pDrvBase);
3719 AssertRelease(!pDevice->pDrvSCSIConnector);
3720 Assert(pDevice->iLUN == iLUN);
3721
3722 /*
3723 * Try attach the block device and get the interfaces,
3724 * required as well as optional.
3725 */
3726 rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
3727 if (RT_SUCCESS(rc))
3728 {
3729 /* Get SCSI connector interface. */
3730 pDevice->pDrvSCSIConnector = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMISCSICONNECTOR);
3731 AssertMsgReturn(pDevice->pDrvSCSIConnector, ("Missing SCSI interface below\n"), VERR_PDM_MISSING_INTERFACE);
3732 pDevice->fPresent = true;
3733 }
3734 else
3735 AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
3736
3737 if (RT_FAILURE(rc))
3738 {
3739 pDevice->pDrvBase = NULL;
3740 pDevice->pDrvSCSIConnector = NULL;
3741 }
3742 return rc;
3743}
3744
3745/**
3746 * Callback employed by buslogicR3Reset.
3747 *
3748 * @returns true if we've quiesced, false if we're still working.
3749 * @param pDevIns The device instance.
3750 */
3751static DECLCALLBACK(bool) buslogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
3752{
3753 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3754
3755 if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3756 return false;
3757 ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3758
3759 buslogicR3HwReset(pThis, true);
3760 return true;
3761}
3762
3763/**
3764 * @copydoc FNPDMDEVRESET
3765 */
3766static DECLCALLBACK(void) buslogicR3Reset(PPDMDEVINS pDevIns)
3767{
3768 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3769
3770 ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3771 if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3772 PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncResetDone);
3773 else
3774 {
3775 ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3776 buslogicR3HwReset(pThis, true);
3777 }
3778}
3779
3780static DECLCALLBACK(void) buslogicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
3781{
3782 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3783
3784 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3785 pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
3786
3787 for (uint32_t i = 0; i < BUSLOGIC_MAX_DEVICES; i++)
3788 {
3789 PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
3790
3791 pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3792 }
3793
3794}
3795
3796/**
3797 * Poweroff notification.
3798 *
3799 * @param pDevIns Pointer to the device instance
3800 */
3801static DECLCALLBACK(void) buslogicR3PowerOff(PPDMDEVINS pDevIns)
3802{
3803 Log(("buslogicR3PowerOff\n"));
3804 buslogicR3SuspendOrPowerOff(pDevIns, true /* fPoweroff */);
3805}
3806
3807/**
3808 * Destroy a driver instance.
3809 *
3810 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
3811 * resources can be freed correctly.
3812 *
3813 * @param pDevIns The device instance data.
3814 */
3815static DECLCALLBACK(int) buslogicR3Destruct(PPDMDEVINS pDevIns)
3816{
3817 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3818 PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
3819
3820 PDMR3CritSectDelete(&pThis->CritSectIntr);
3821
3822 /*
3823 * Free all tasks which are still hanging around
3824 * (Power off after the VM was suspended).
3825 */
3826 if (pThis->fRedo)
3827 {
3828 /* Free tasks which would have been queued again on resume. */
3829 PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3830
3831 pThis->pTasksRedoHead = NULL;
3832
3833 while (pTaskState)
3834 {
3835 PBUSLOGICTASKSTATE pFree;
3836
3837 pFree = pTaskState;
3838 pTaskState = pTaskState->pRedoNext;
3839
3840 RTMemCacheFree(pThis->hTaskCache, pFree);
3841 }
3842 pThis->fRedo = false;
3843 }
3844
3845 int rc = RTMemCacheDestroy(pThis->hTaskCache);
3846 AssertMsgRC(rc, ("Destroying task cache failed rc=%Rrc\n", rc));
3847
3848 return rc;
3849}
3850
3851/**
3852 * @interface_method_impl{PDMDEVREG,pfnConstruct}
3853 */
3854static DECLCALLBACK(int) buslogicR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
3855{
3856 PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3857 int rc = VINF_SUCCESS;
3858 bool fBootable = true;
3859 char achISACompat[16];
3860 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
3861
3862 /*
3863 * Init instance data (do early because of constructor).
3864 */
3865 pThis->hTaskCache = NIL_RTMEMCACHE;
3866 pThis->pDevInsR3 = pDevIns;
3867 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3868 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3869 pThis->IBase.pfnQueryInterface = buslogicR3StatusQueryInterface;
3870 pThis->ILeds.pfnQueryStatusLed = buslogicR3StatusQueryStatusLed;
3871
3872 PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */
3873 PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */
3874 PCIDevSetCommand (&pThis->dev, 0x0003);
3875 PCIDevSetRevisionId (&pThis->dev, 0x01);
3876 PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */
3877 PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */
3878 PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */
3879 PCIDevSetBaseAddress (&pThis->dev, 0, true /*IO*/, false /*Pref*/, false /*64-bit*/, 0x00000000);
3880 PCIDevSetBaseAddress (&pThis->dev, 1, false /*IO*/, false /*Pref*/, false /*64-bit*/, 0x00000000);
3881 PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);
3882 PCIDevSetSubSystemId (&pThis->dev, 0x1040);
3883 PCIDevSetInterruptLine (&pThis->dev, 0x00);
3884 PCIDevSetInterruptPin (&pThis->dev, 0x01);
3885
3886 /*
3887 * Validate and read configuration.
3888 */
3889 if (!CFGMR3AreValuesValid(pCfg,
3890 "GCEnabled\0"
3891 "R0Enabled\0"
3892 "Bootable\0"
3893 "ISACompat\0"))
3894 return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3895 N_("BusLogic configuration error: unknown option specified"));
3896
3897 rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
3898 if (RT_FAILURE(rc))
3899 return PDMDEV_SET_ERROR(pDevIns, rc,
3900 N_("BusLogic configuration error: failed to read GCEnabled as boolean"));
3901 Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
3902
3903 rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
3904 if (RT_FAILURE(rc))
3905 return PDMDEV_SET_ERROR(pDevIns, rc,
3906 N_("BusLogic configuration error: failed to read R0Enabled as boolean"));
3907 Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
3908 rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
3909 if (RT_FAILURE(rc))
3910 return PDMDEV_SET_ERROR(pDevIns, rc,
3911 N_("BusLogic configuration error: failed to read Bootable as boolean"));
3912 Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
3913
3914 /* Only the first instance defaults to having the ISA compatibility ports enabled. */
3915 if (iInstance == 0)
3916 rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Alternate");
3917 else
3918 rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Disabled");
3919 if (RT_FAILURE(rc))
3920 return PDMDEV_SET_ERROR(pDevIns, rc,
3921 N_("BusLogic configuration error: failed to read ISACompat as string"));
3922 Log(("%s: ISACompat=%s\n", __FUNCTION__, achISACompat));
3923
3924 /* Grok the ISACompat setting. */
3925 if (!strcmp(achISACompat, "Disabled"))
3926 pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
3927 else if (!strcmp(achISACompat, "Primary"))
3928 pThis->uDefaultISABaseCode = 0; /* I/O base at 330h. */
3929 else if (!strcmp(achISACompat, "Alternate"))
3930 pThis->uDefaultISABaseCode = 1; /* I/O base at 334h. */
3931 else
3932 return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3933 N_("BusLogic configuration error: invalid ISACompat setting"));
3934
3935 /*
3936 * Register the PCI device and its I/O regions.
3937 */
3938 rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev);
3939 if (RT_FAILURE(rc))
3940 return rc;
3941
3942 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicR3MmioMap);
3943 if (RT_FAILURE(rc))
3944 return rc;
3945
3946 rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicR3MmioMap);
3947 if (RT_FAILURE(rc))
3948 return rc;
3949
3950 if (fBootable)
3951 {
3952 /* Register I/O port space for BIOS access. */
3953 rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 4, NULL,
3954 buslogicR3BiosIoPortWrite, buslogicR3BiosIoPortRead,
3955 buslogicR3BiosIoPortWriteStr, buslogicR3BiosIoPortReadStr,
3956 "BusLogic BIOS");
3957 if (RT_FAILURE(rc))
3958 return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register BIOS I/O handlers"));
3959 }
3960
3961 /* Set up the compatibility I/O range. */
3962 rc = buslogicR3RegisterISARange(pThis, pThis->uDefaultISABaseCode);
3963 if (RT_FAILURE(rc))
3964 return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers"));
3965
3966 /* Initialize task cache. */
3967 rc = RTMemCacheCreate(&pThis->hTaskCache, sizeof(BUSLOGICTASKSTATE), 0, UINT32_MAX,
3968 NULL, NULL, NULL, 0);
3969 if (RT_FAILURE(rc))
3970 return PDMDEV_SET_ERROR(pDevIns, rc,
3971 N_("BusLogic: Failed to initialize task cache\n"));
3972
3973 /* Initialize task queue. */
3974 rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0,
3975 buslogicR3NotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);
3976 if (RT_FAILURE(rc))
3977 return rc;
3978 pThis->pNotifierQueueR0 = PDMQueueR0Ptr(pThis->pNotifierQueueR3);
3979 pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
3980
3981 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance);
3982 if (RT_FAILURE(rc))
3983 return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic: cannot create critical section"));
3984
3985 /* Initialize per device state. */
3986 for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3987 {
3988 char szName[24];
3989 PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
3990
3991 RTStrPrintf(szName, sizeof(szName), "Device%u", i);
3992
3993 /* Initialize static parts of the device. */
3994 pDevice->iLUN = i;
3995 pDevice->pBusLogicR3 = pThis;
3996 pDevice->pBusLogicR0 = PDMINS_2_DATA_R0PTR(pDevIns);
3997 pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3998 pDevice->Led.u32Magic = PDMLED_MAGIC;
3999 pDevice->IBase.pfnQueryInterface = buslogicR3DeviceQueryInterface;
4000 pDevice->ISCSIPort.pfnSCSIRequestCompleted = buslogicR3DeviceSCSIRequestCompleted;
4001 pDevice->ISCSIPort.pfnQueryDeviceLocation = buslogicR3QueryDeviceLocation;
4002 pDevice->ILed.pfnQueryStatusLed = buslogicR3DeviceQueryStatusLed;
4003
4004 /* Attach SCSI driver. */
4005 rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, szName);
4006 if (RT_SUCCESS(rc))
4007 {
4008 /* Get SCSI connector interface. */
4009 pDevice->pDrvSCSIConnector = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMISCSICONNECTOR);
4010 AssertMsgReturn(pDevice->pDrvSCSIConnector, ("Missing SCSI interface below\n"), VERR_PDM_MISSING_INTERFACE);
4011
4012 pDevice->fPresent = true;
4013 }
4014 else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
4015 {
4016 pDevice->pDrvBase = NULL;
4017 pDevice->fPresent = false;
4018 rc = VINF_SUCCESS;
4019 Log(("BusLogic: no driver attached to device %s\n", szName));
4020 }
4021 else
4022 {
4023 AssertLogRelMsgFailed(("BusLogic: Failed to attach %s\n", szName));
4024 return rc;
4025 }
4026 }
4027
4028 /*
4029 * Attach status driver (optional).
4030 */
4031 PPDMIBASE pBase;
4032 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
4033 if (RT_SUCCESS(rc))
4034 pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
4035 else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
4036 {
4037 AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
4038 return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot attach to status driver"));
4039 }
4040
4041 rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL,
4042 NULL, buslogicR3LiveExec, NULL,
4043 NULL, buslogicR3SaveExec, NULL,
4044 NULL, buslogicR3LoadExec, buslogicR3LoadDone);
4045 if (RT_FAILURE(rc))
4046 return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers"));
4047
4048 /*
4049 * Register the debugger info callback.
4050 */
4051 char szTmp[128];
4052 RTStrPrintf(szTmp, sizeof(szTmp), "%s%d", pDevIns->pReg->szName, pDevIns->iInstance);
4053 PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "BusLogic HBA info", buslogicR3Info);
4054
4055 rc = buslogicR3HwReset(pThis, true);
4056 AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc));
4057
4058 return rc;
4059}
4060
4061/**
4062 * The device registration structure.
4063 */
4064const PDMDEVREG g_DeviceBusLogic =
4065{
4066 /* u32Version */
4067 PDM_DEVREG_VERSION,
4068 /* szName */
4069 "buslogic",
4070 /* szRCMod */
4071 "VBoxDDRC.rc",
4072 /* szR0Mod */
4073 "VBoxDDR0.r0",
4074 /* pszDescription */
4075 "BusLogic BT-958 SCSI host adapter.\n",
4076 /* fFlags */
4077 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0 |
4078 PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION | PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION |
4079 PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
4080 /* fClass */
4081 PDM_DEVREG_CLASS_STORAGE,
4082 /* cMaxInstances */
4083 ~0U,
4084 /* cbInstance */
4085 sizeof(BUSLOGIC),
4086 /* pfnConstruct */
4087 buslogicR3Construct,
4088 /* pfnDestruct */
4089 buslogicR3Destruct,
4090 /* pfnRelocate */
4091 buslogicR3Relocate,
4092 /* pfnMemSetup */
4093 NULL,
4094 /* pfnPowerOn */
4095 NULL,
4096 /* pfnReset */
4097 buslogicR3Reset,
4098 /* pfnSuspend */
4099 buslogicR3Suspend,
4100 /* pfnResume */
4101 buslogicR3Resume,
4102 /* pfnAttach */
4103 buslogicR3Attach,
4104 /* pfnDetach */
4105 buslogicR3Detach,
4106 /* pfnQueryInterface. */
4107 NULL,
4108 /* pfnInitComplete */
4109 NULL,
4110 /* pfnPowerOff */
4111 buslogicR3PowerOff,
4112 /* pfnSoftReset */
4113 NULL,
4114 /* u32VersionEnd */
4115 PDM_DEVREG_VERSION
4116};
4117
4118#endif /* IN_RING3 */
4119#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
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