VirtualBox

source: vbox/trunk/src/VBox/Devices/Serial/DevSerial.cpp@ 99196

Last change on this file since 99196 was 98103, checked in by vboxsync, 23 months ago

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1/* $Id: DevSerial.cpp 98103 2023-01-17 14:15:46Z vboxsync $ */
2/** @file
3 * DevSerial - 16550A UART emulation.
4 *
5 * The documentation for this device was taken from the PC16550D spec from TI.
6 */
7
8/*
9 * Copyright (C) 2018-2023 Oracle and/or its affiliates.
10 *
11 * This file is part of VirtualBox base platform packages, as
12 * available from https://www.virtualbox.org.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation, in version 3 of the
17 * License.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see <https://www.gnu.org/licenses>.
26 *
27 * SPDX-License-Identifier: GPL-3.0-only
28 */
29
30
31/*********************************************************************************************************************************
32* Header Files *
33*********************************************************************************************************************************/
34#define LOG_GROUP LOG_GROUP_DEV_SERIAL
35#include <VBox/vmm/pdmdev.h>
36#include <VBox/vmm/pdmserialifs.h>
37#include <iprt/assert.h>
38#include <iprt/uuid.h>
39#include <iprt/string.h>
40#include <iprt/semaphore.h>
41#include <iprt/critsect.h>
42
43#include "VBoxDD.h"
44#include "UartCore.h"
45
46
47/*********************************************************************************************************************************
48* Structures and Typedefs *
49*********************************************************************************************************************************/
50
51/**
52 * Shared serial device state.
53 */
54typedef struct DEVSERIAL
55{
56 /** The IRQ value. */
57 uint8_t uIrq;
58 uint8_t bAlignment;
59 /** The base I/O port the device is registered at. */
60 RTIOPORT PortBase;
61 /** The I/O ports registration. */
62 IOMIOPORTHANDLE hIoPorts;
63
64 /** The UART core. */
65 UARTCORE UartCore;
66} DEVSERIAL;
67/** Pointer to the shared serial device state. */
68typedef DEVSERIAL *PDEVSERIAL;
69
70
71/**
72 * Serial device state for ring-3.
73 */
74typedef struct DEVSERIALR3
75{
76 /** The UART core. */
77 UARTCORER3 UartCore;
78} DEVSERIALR3;
79/** Pointer to the serial device state for ring-3. */
80typedef DEVSERIALR3 *PDEVSERIALR3;
81
82
83/**
84 * Serial device state for ring-0.
85 */
86typedef struct DEVSERIALR0
87{
88 /** The UART core. */
89 UARTCORER0 UartCore;
90} DEVSERIALR0;
91/** Pointer to the serial device state for ring-0. */
92typedef DEVSERIALR0 *PDEVSERIALR0;
93
94
95/**
96 * Serial device state for raw-mode.
97 */
98typedef struct DEVSERIALRC
99{
100 /** The UART core. */
101 UARTCORERC UartCore;
102} DEVSERIALRC;
103/** Pointer to the serial device state for raw-mode. */
104typedef DEVSERIALRC *PDEVSERIALRC;
105
106/** The serial device state for the current context. */
107typedef CTX_SUFF(DEVSERIAL) DEVSERIALCC;
108/** Pointer to the serial device state for the current context. */
109typedef CTX_SUFF(PDEVSERIAL) PDEVSERIALCC;
110
111
112#ifndef VBOX_DEVICE_STRUCT_TESTCASE
113
114
115
116static DECLCALLBACK(void) serialIrqReq(PPDMDEVINS pDevIns, PUARTCORE pUart, unsigned iLUN, int iLvl)
117{
118 RT_NOREF(pUart, iLUN);
119 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
120 PDMDevHlpISASetIrqNoWait(pDevIns, pThis->uIrq, iLvl);
121}
122
123
124/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
125
126/**
127 * @callback_method_impl{FNIOMIOPORTNEWOUT}
128 */
129static DECLCALLBACK(VBOXSTRICTRC)
130serialIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
131{
132 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
133 PDEVSERIALCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PDEVSERIALCC);
134 RT_NOREF_PV(pvUser);
135
136 return uartRegWrite(pDevIns, &pThis->UartCore, &pThisCC->UartCore, offPort, u32, cb);
137}
138
139
140/**
141 * @callback_method_impl{FNIOMIOPORTNEWIN}
142 */
143static DECLCALLBACK(VBOXSTRICTRC)
144serialIoPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
145{
146 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
147 PDEVSERIALCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PDEVSERIALCC);
148 RT_NOREF_PV(pvUser);
149
150 return uartRegRead(pDevIns, &pThis->UartCore, &pThisCC->UartCore, offPort, pu32, cb);
151}
152
153
154#ifdef IN_RING3
155
156
157/**
158 * Returns the matching UART type from the given string.
159 *
160 * @returns UART type based on the given string or UARTTYPE_INVALID if an invalid type was passed.
161 * @param pszUartType The UART type.
162 */
163static UARTTYPE serialR3GetUartTypeFromString(const char *pszUartType)
164{
165 if (!RTStrCmp(pszUartType, "16450"))
166 return UARTTYPE_16450;
167 else if (!RTStrCmp(pszUartType, "16550A"))
168 return UARTTYPE_16550A;
169 else if (!RTStrCmp(pszUartType, "16750"))
170 return UARTTYPE_16750;
171
172 AssertLogRelMsgFailedReturn(("Unknown UART type \"%s\" specified", pszUartType), UARTTYPE_INVALID);
173}
174
175
176/* -=-=-=-=-=-=-=-=- Saved State -=-=-=-=-=-=-=-=- */
177
178/**
179 * @callback_method_impl{FNSSMDEVLIVEEXEC}
180 */
181static DECLCALLBACK(int) serialR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
182{
183 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
184 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
185 RT_NOREF(uPass);
186
187 pHlp->pfnSSMPutU8(pSSM, pThis->uIrq);
188 pHlp->pfnSSMPutIOPort(pSSM, pThis->PortBase);
189 pHlp->pfnSSMPutU32(pSSM, pThis->UartCore.enmType);
190
191 return VINF_SSM_DONT_CALL_AGAIN;
192}
193
194
195/**
196 * @callback_method_impl{FNSSMDEVSAVEEXEC}
197 */
198static DECLCALLBACK(int) serialR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
199{
200 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
201 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
202
203 pHlp->pfnSSMPutU8( pSSM, pThis->uIrq);
204 pHlp->pfnSSMPutIOPort(pSSM, pThis->PortBase);
205 pHlp->pfnSSMPutU32( pSSM, pThis->UartCore.enmType);
206
207 uartR3SaveExec(pDevIns, &pThis->UartCore, pSSM);
208 return pHlp->pfnSSMPutU32(pSSM, UINT32_MAX); /* sanity/terminator */
209}
210
211
212/**
213 * @callback_method_impl{FNSSMDEVLOADEXEC}
214 */
215static DECLCALLBACK(int) serialR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
216{
217 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
218 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
219 uint8_t bIrq;
220 RTIOPORT PortBase;
221 UARTTYPE enmType;
222 int rc;
223
224 AssertMsgReturn(uVersion >= UART_SAVED_STATE_VERSION_16450, ("%d\n", uVersion), VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
225 if (uVersion > UART_SAVED_STATE_VERSION_LEGACY_CODE)
226 {
227 pHlp->pfnSSMGetU8( pSSM, &bIrq);
228 pHlp->pfnSSMGetIOPort(pSSM, &PortBase);
229 PDMDEVHLP_SSM_GET_ENUM32_RET(pHlp, pSSM, enmType, UARTTYPE);
230 if (uPass == SSM_PASS_FINAL)
231 {
232 rc = uartR3LoadExec(pDevIns, &pThis->UartCore, pSSM, uVersion, uPass, NULL, NULL);
233 AssertRCReturn(rc, rc);
234 }
235 }
236 else
237 {
238 enmType = uVersion > UART_SAVED_STATE_VERSION_16450 ? UARTTYPE_16550A : UARTTYPE_16450;
239 if (uPass != SSM_PASS_FINAL)
240 {
241 int32_t iIrqTmp;
242 pHlp->pfnSSMGetS32(pSSM, &iIrqTmp);
243 uint32_t uPortBaseTmp;
244 rc = pHlp->pfnSSMGetU32(pSSM, &uPortBaseTmp);
245 AssertRCReturn(rc, rc);
246
247 bIrq = (uint8_t)iIrqTmp;
248 PortBase = (uint32_t)uPortBaseTmp;
249 }
250 else
251 {
252 rc = uartR3LoadExec(pDevIns, &pThis->UartCore, pSSM, uVersion, uPass, &bIrq, &PortBase);
253 AssertRCReturn(rc, rc);
254 }
255 }
256
257 if (uPass == SSM_PASS_FINAL)
258 {
259 /* The marker. */
260 uint32_t u32;
261 rc = pHlp->pfnSSMGetU32(pSSM, &u32);
262 AssertRCReturn(rc, rc);
263 AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
264 }
265
266 /*
267 * Check the config.
268 */
269 if ( pThis->uIrq != bIrq
270 || pThis->PortBase != PortBase
271 || pThis->UartCore.enmType != enmType)
272 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS,
273 N_("Config mismatch - saved IRQ=%#x PortBase=%#x Type=%d; configured IRQ=%#x PortBase=%#x Type=%d"),
274 bIrq, PortBase, enmType, pThis->uIrq, pThis->PortBase, pThis->UartCore.enmType);
275
276 return VINF_SUCCESS;
277}
278
279
280/**
281 * @callback_method_impl{FNSSMDEVLOADDONE}
282 */
283static DECLCALLBACK(int) serialR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
284{
285 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
286 PDEVSERIALCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PDEVSERIALCC);
287 return uartR3LoadDone(pDevIns, &pThis->UartCore, &pThisCC->UartCore, pSSM);
288}
289
290
291/* -=-=-=-=-=-=-=-=- PDMDEVREG -=-=-=-=-=-=-=-=- */
292
293/**
294 * @interface_method_impl{PDMDEVREG,pfnReset}
295 */
296static DECLCALLBACK(void) serialR3Reset(PPDMDEVINS pDevIns)
297{
298 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
299 PDEVSERIALCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PDEVSERIALCC);
300 uartR3Reset(pDevIns, &pThis->UartCore, &pThisCC->UartCore);
301}
302
303
304/**
305 * @interface_method_impl{PDMDEVREG,pfnAttach}
306 */
307static DECLCALLBACK(int) serialR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
308{
309 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
310 PDEVSERIALCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PDEVSERIALCC);
311 RT_NOREF(fFlags);
312 AssertReturn(iLUN == 0, VERR_PDM_LUN_NOT_FOUND);
313
314 return uartR3Attach(pDevIns, &pThis->UartCore, &pThisCC->UartCore, iLUN);
315}
316
317
318/**
319 * @interface_method_impl{PDMDEVREG,pfnDetach}
320 */
321static DECLCALLBACK(void) serialR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
322{
323 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
324 PDEVSERIALCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PDEVSERIALCC);
325 RT_NOREF(fFlags);
326 AssertReturnVoid(iLUN == 0);
327
328 uartR3Detach(pDevIns, &pThis->UartCore, &pThisCC->UartCore);
329}
330
331
332/**
333 * @interface_method_impl{PDMDEVREG,pfnDestruct}
334 */
335static DECLCALLBACK(int) serialR3Destruct(PPDMDEVINS pDevIns)
336{
337 PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
338 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
339
340 uartR3Destruct(pDevIns, &pThis->UartCore);
341 return VINF_SUCCESS;
342}
343
344
345/**
346 * @interface_method_impl{PDMDEVREG,pfnConstruct}
347 */
348static DECLCALLBACK(int) serialR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
349{
350 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
351 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
352 PDEVSERIALCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PDEVSERIALCC);
353 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
354 int rc;
355
356 Assert(iInstance < 4);
357
358 /*
359 * Validate and read the configuration.
360 */
361 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|IOBase|YieldOnLSRRead|UartType", "");
362
363 bool fYieldOnLSRRead = false;
364 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "YieldOnLSRRead", &fYieldOnLSRRead, false);
365 if (RT_FAILURE(rc))
366 return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to get the \"YieldOnLSRRead\" value"));
367
368 uint8_t uIrq = 0;
369 rc = pHlp->pfnCFGMQueryU8(pCfg, "IRQ", &uIrq);
370 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
371 {
372 /* Provide sensible defaults. */
373 if (iInstance == 0)
374 uIrq = 4;
375 else if (iInstance == 1)
376 uIrq = 3;
377 else
378 AssertReleaseFailed(); /* irq_lvl is undefined. */
379 }
380 else if (RT_FAILURE(rc))
381 return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to get the \"IRQ\" value"));
382
383 uint16_t uIoBase = 0;
384 rc = pHlp->pfnCFGMQueryU16(pCfg, "IOBase", &uIoBase);
385 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
386 {
387 if (iInstance == 0)
388 uIoBase = 0x3f8;
389 else if (iInstance == 1)
390 uIoBase = 0x2f8;
391 else
392 AssertReleaseFailed(); /* uIoBase is undefined */
393 }
394 else if (RT_FAILURE(rc))
395 return PDMDEV_SET_ERROR(pDevIns, rc,
396 N_("Configuration error: Failed to get the \"IOBase\" value"));
397
398 char szUartType[32];
399 rc = pHlp->pfnCFGMQueryStringDef(pCfg, "UartType", szUartType, sizeof(szUartType), "16550A");
400 if (RT_FAILURE(rc))
401 return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: failed to read \"UartType\" as string"));
402
403 UARTTYPE enmUartType = serialR3GetUartTypeFromString(szUartType);
404 if (enmUartType != UARTTYPE_INVALID)
405 LogRel(("Serial#%d: emulating %s (IOBase: %04x IRQ: %u)\n", pDevIns->iInstance, szUartType, uIoBase, uIrq));
406 else
407 return PDMDevHlpVMSetError(pDevIns, VERR_INVALID_PARAMETER, RT_SRC_POS,
408 N_("Configuration error: Invalid \"UartType\" type value: %s"), szUartType);
409
410 pThis->uIrq = uIrq;
411 pThis->PortBase = uIoBase;
412
413 /*
414 * Init locks, using explicit locking where necessary.
415 */
416 rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
417 AssertRCReturn(rc, rc);
418
419 /*
420 * Register the I/O ports.
421 */
422 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, uIoBase, 8 /*cPorts*/, serialIoPortWrite, serialIoPortRead,
423 "SERIAL", NULL /*paExtDescs*/, &pThis->hIoPorts);
424 AssertRCReturn(rc, rc);
425
426 /*
427 * Saved state.
428 */
429 rc = PDMDevHlpSSMRegisterEx(pDevIns, UART_SAVED_STATE_VERSION, sizeof(*pThis), NULL,
430 NULL, serialR3LiveExec, NULL,
431 NULL, serialR3SaveExec, NULL,
432 NULL, serialR3LoadExec, serialR3LoadDone);
433 AssertRCReturn(rc, rc);
434
435 /*
436 * Init the UART core structure.
437 */
438 rc = uartR3Init(pDevIns, &pThis->UartCore, &pThisCC->UartCore, enmUartType, 0,
439 fYieldOnLSRRead ? UART_CORE_YIELD_ON_LSR_READ : 0, serialIrqReq);
440 AssertRCReturn(rc, rc);
441
442 serialR3Reset(pDevIns);
443 return VINF_SUCCESS;
444}
445
446#else /* !IN_RING3 */
447
448/**
449 * @callback_method_impl{PDMDEVREGR0,pfnConstruct}
450 */
451static DECLCALLBACK(int) serialRZConstruct(PPDMDEVINS pDevIns)
452{
453 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
454 PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
455 PDEVSERIALCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PDEVSERIALCC);
456
457 int rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
458 AssertRCReturn(rc, rc);
459
460 rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPorts, serialIoPortWrite, serialIoPortRead, NULL /*pvUser*/);
461 AssertRCReturn(rc, rc);
462
463 rc = uartRZInit(&pThisCC->UartCore, serialIrqReq);
464 AssertRCReturn(rc, rc);
465
466 return VINF_SUCCESS;
467}
468
469#endif /* !IN_RING3 */
470
471/**
472 * The device registration structure.
473 */
474const PDMDEVREG g_DeviceSerialPort =
475{
476 /* .u32Version = */ PDM_DEVREG_VERSION,
477 /* .uReserved0 = */ 0,
478 /* .szName = */ "serial",
479 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RZ | PDM_DEVREG_FLAGS_NEW_STYLE,
480 /* .fClass = */ PDM_DEVREG_CLASS_SERIAL,
481 /* .cMaxInstances = */ UINT32_MAX,
482 /* .uSharedVersion = */ 42,
483 /* .cbInstanceShared = */ sizeof(DEVSERIAL),
484 /* .cbInstanceCC = */ sizeof(DEVSERIALCC),
485 /* .cbInstanceRC = */ sizeof(DEVSERIALRC),
486 /* .cMaxPciDevices = */ 0,
487 /* .cMaxMsixVectors = */ 0,
488 /* .pszDescription = */ "Serial Communication Port",
489#if defined(IN_RING3)
490 /* .pszRCMod = */ "VBoxDDRC.rc",
491 /* .pszR0Mod = */ "VBoxDDR0.r0",
492 /* .pfnConstruct = */ serialR3Construct,
493 /* .pfnDestruct = */ serialR3Destruct,
494 /* .pfnRelocate = */ NULL,
495 /* .pfnMemSetup = */ NULL,
496 /* .pfnPowerOn = */ NULL,
497 /* .pfnReset = */ serialR3Reset,
498 /* .pfnSuspend = */ NULL,
499 /* .pfnResume = */ NULL,
500 /* .pfnAttach = */ serialR3Attach,
501 /* .pfnDetach = */ serialR3Detach,
502 /* .pfnQueryInterface = */ NULL,
503 /* .pfnInitComplete = */ NULL,
504 /* .pfnPowerOff = */ NULL,
505 /* .pfnSoftReset = */ NULL,
506 /* .pfnReserved0 = */ NULL,
507 /* .pfnReserved1 = */ NULL,
508 /* .pfnReserved2 = */ NULL,
509 /* .pfnReserved3 = */ NULL,
510 /* .pfnReserved4 = */ NULL,
511 /* .pfnReserved5 = */ NULL,
512 /* .pfnReserved6 = */ NULL,
513 /* .pfnReserved7 = */ NULL,
514#elif defined(IN_RING0)
515 /* .pfnEarlyConstruct = */ NULL,
516 /* .pfnConstruct = */ serialRZConstruct,
517 /* .pfnDestruct = */ NULL,
518 /* .pfnFinalDestruct = */ NULL,
519 /* .pfnRequest = */ NULL,
520 /* .pfnReserved0 = */ NULL,
521 /* .pfnReserved1 = */ NULL,
522 /* .pfnReserved2 = */ NULL,
523 /* .pfnReserved3 = */ NULL,
524 /* .pfnReserved4 = */ NULL,
525 /* .pfnReserved5 = */ NULL,
526 /* .pfnReserved6 = */ NULL,
527 /* .pfnReserved7 = */ NULL,
528#elif defined(IN_RC)
529 /* .pfnConstruct = */ serialRZConstruct,
530 /* .pfnReserved0 = */ NULL,
531 /* .pfnReserved1 = */ NULL,
532 /* .pfnReserved2 = */ NULL,
533 /* .pfnReserved3 = */ NULL,
534 /* .pfnReserved4 = */ NULL,
535 /* .pfnReserved5 = */ NULL,
536 /* .pfnReserved6 = */ NULL,
537 /* .pfnReserved7 = */ NULL,
538#else
539# error "Not in IN_RING3, IN_RING0 or IN_RC!"
540#endif
541 /* .u32VersionEnd = */ PDM_DEVREG_VERSION
542};
543
544#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
545
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