1 | /* $Id: DevParallel.cpp 4787 2007-09-14 09:08:56Z vboxsync $ */
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2 | /** @file
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3 | * VirtualBox Parallel Device Emulation.
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4 | *
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5 | * Contributed by: Alexander Eichner
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6 | */
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7 |
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8 | /*
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9 | * Copyright (C) 2006-2007 innotek GmbH
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10 | *
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11 | * This file is part of VirtualBox Open Source Edition (OSE), as
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12 | * available from http://www.virtualbox.org. This file is free software;
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13 | * you can redistribute it and/or modify it under the terms of the GNU
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14 | * General Public License as published by the Free Software Foundation,
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15 | * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
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16 | * distribution. VirtualBox OSE is distributed in the hope that it will
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17 | * be useful, but WITHOUT ANY WARRANTY of any kind.
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18 | */
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19 |
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20 | /* based on DevSerial.cpp */
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21 |
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22 | /*******************************************************************************
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23 | * Header Files *
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24 | *******************************************************************************/
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25 | #define LOG_GROUP LOG_GROUP_DEV_PARALLEL
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26 | #include <VBox/pdmdev.h>
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27 | #include <iprt/assert.h>
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28 | #include <iprt/uuid.h>
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29 | #include <iprt/string.h>
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30 | #include <iprt/semaphore.h>
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31 | #include <iprt/critsect.h>
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32 |
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33 | #include "Builtins.h"
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34 | #include "ParallelIOCtlCmd.h"
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35 |
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36 | #define PARALLEL_SAVED_STATE_VERSION 1
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37 |
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38 | /* defines for accessing the register bits */
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39 | #define LPT_STATUS_BUSY 0x80
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40 | #define LPT_STATUS_ACK 0x40
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41 | #define LPT_STATUS_PAPER_OUT 0x20
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42 | #define LPT_STATUS_SELECT_IN 0x10
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43 | #define LPT_STATUS_ERROR 0x08
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44 | #define LPT_STATUS_IRQ 0x04
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45 | #define LPT_STATUS_BIT1 0x02 /* reserved (only for completeness) */
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46 | #define LPT_STATUS_BIT0 0x01 /* reserved (only for completeness) */
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47 |
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48 | #define LPT_CONTROL_BIT7 0x80 /* reserved (only for completeness) */
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49 | #define LPT_CONTROL_BIT6 0x40 /* reserved (only for completeness) */
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50 | #define LPT_CONTROL_ENABLE_BIDIRECT 0x20
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51 | #define LPT_CONTROL_ENABLE_IRQ_VIA_ACK 0x10
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52 | #define LPT_CONTROL_SELECT_PRINTER 0x08
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53 | #define LPT_CONTROL_RESET 0x04
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54 | #define LPT_CONTROL_AUTO_LINEFEED 0x02
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55 | #define LPT_CONTROL_STROBE 0x01
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56 |
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57 | typedef struct ParallelState
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58 | {
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59 | /** Access critical section. */
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60 | PDMCRITSECT CritSect;
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61 |
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62 | /** Pointer to the device instance. */
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63 | R3R0PTRTYPE(PPDMDEVINS) pDevInsHC;
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64 | /** Pointer to the device instance. */
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65 | GCPTRTYPE(PPDMDEVINS) pDevInsGC;
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66 | #if HC_ARCH_BITS == 64 && GC_ARCH_BITS != 64
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67 | RTGCPTR Alignment0;
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68 | #endif
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69 | /** The base interface. */
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70 | R3PTRTYPE(PDMIBASE) IBase;
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71 | /** The host device port interface. */
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72 | R3PTRTYPE(PDMIHOSTDEVICEPORT) IHostDevicePort;
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73 | /** Pointer to the attached base driver. */
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74 | R3PTRTYPE(PPDMIBASE) pDrvBase;
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75 | /** Pointer to the attached host device. */
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76 | R3PTRTYPE(PPDMIHOSTDEVICECONNECTOR) pDrvHostDeviceConnector;
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77 |
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78 | uint8_t reg_data;
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79 | uint8_t reg_status;
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80 | uint8_t reg_control;
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81 |
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82 | int irq;
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83 |
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84 | bool fGCEnabled;
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85 | bool fR0Enabled;
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86 | bool afAlignment[6];
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87 |
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88 | RTSEMEVENT ReceiveSem;
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89 | uint32_t base;
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90 |
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91 | } DEVPARALLELSTATE, *PDEVPARALLELSTATE;
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92 | typedef DEVPARALLELSTATE ParallelState;
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93 |
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94 | #ifndef VBOX_DEVICE_STRUCT_TESTCASE
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95 |
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96 | #define PDMIBASE_2_PARALLELSTATE(pInstance) ( (ParallelState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ParallelState, IBase)) )
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97 | #define PDMIHOSTDEVICEPORT_2_PARALLELSTATE(pInstance) ( (ParallelState *)((uintptr_t)(pInterface) - RT_OFFSETOF(ParallelState, IHostDevicePort)) )
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98 |
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99 |
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100 | __BEGIN_DECLS
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101 | PDMBOTHCBDECL(int) parallelIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
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102 | PDMBOTHCBDECL(int) parallelIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
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103 | __END_DECLS
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104 |
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105 |
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106 | static void parallel_update_irq(ParallelState *s)
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107 | {
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108 | if (s->reg_control & LPT_CONTROL_ENABLE_IRQ_VIA_ACK) {
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109 | Log(("parallel_update_irq %d 1\n", s->irq));
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110 | PDMDevHlpISASetIrqNoWait(CTXSUFF(s->pDevIns), s->irq, 1);
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111 | } else {
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112 | Log(("parallel_update_irq %d 0\n", s->irq));
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113 | PDMDevHlpISASetIrqNoWait(CTXSUFF(s->pDevIns), s->irq, 0);
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114 | }
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115 | }
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116 |
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117 | static int parallel_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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118 | {
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119 | ParallelState *s = (ParallelState *)opaque;
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120 | unsigned char ch;
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121 |
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122 | addr &= 7;
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123 | LogFlow(("parallel: write addr=0x%02x val=0x%02x\n", addr, val));
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124 | switch(addr) {
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125 | default:
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126 | case 0:
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127 | #ifndef IN_RING3
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128 | NOREF(ch);
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129 | return VINF_IOM_HC_IOPORT_WRITE;
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130 | #else
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131 | ch = val;
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132 | s->reg_data = ch;
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133 | if (RT_LIKELY(s->pDrvHostDeviceConnector))
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134 | {
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135 | Log(("parallel_io_port_write: write 0x%X\n", ch));
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136 | size_t cbWrite = 1;
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137 | int rc = s->pDrvHostDeviceConnector->pfnWrite(s->pDrvHostDeviceConnector, &ch, &cbWrite);
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138 | AssertRC(rc);
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139 | }
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140 | #endif
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141 | break;
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142 | case 1:
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143 | break;
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144 | case 2:
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145 | s->reg_control = val;
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146 | parallel_update_irq(s);
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147 | break;
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148 | case 3:
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149 | break;
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150 | case 4:
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151 | break;
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152 | case 5:
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153 | break;
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154 | case 6:
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155 | break;
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156 | case 7:
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157 | break;
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158 | }
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159 | return VINF_SUCCESS;
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160 | }
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161 |
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162 | static uint32_t parallel_ioport_read(void *opaque, uint32_t addr, int *pRC)
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163 | {
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164 | ParallelState *s = (ParallelState *)opaque;
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165 | uint32_t ret = ~0U;
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166 |
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167 | *pRC = VINF_SUCCESS;
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168 |
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169 | addr &= 7;
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170 | switch(addr) {
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171 | default:
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172 | case 0:
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173 | #ifndef IN_RING3
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174 | *pRC = VINF_IOM_HC_IOPORT_READ;
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175 | #else
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176 | if (RT_LIKELY(s->pDrvHostDeviceConnector))
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177 | {
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178 | size_t cbRead;
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179 | int rc = s->pDrvHostDeviceConnector->pfnRead(s->pDrvHostDeviceConnector, &s->reg_data, &cbRead);
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180 | Log(("parallel_io_port_read: read 0x%X\n", s->reg_data));
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181 | AssertRC(rc);
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182 | }
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183 | ret = s->reg_data;
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184 | #endif
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185 | break;
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186 | case 1:
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187 | ret = s->reg_status;
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188 | break;
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189 | case 2:
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190 | ret = s->reg_control;
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191 | break;
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192 | case 3:
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193 | break;
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194 | case 4:
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195 | break;
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196 | case 5:
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197 | break;
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198 | case 6:
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199 | break;
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200 | case 7:
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201 | break;
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202 | }
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203 | LogFlow(("parallel: read addr=0x%02x val=0x%02x\n", addr, ret));
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204 | return ret;
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205 | }
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206 |
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207 | #ifdef IN_RING3
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208 | static DECLCALLBACK(int) parallelNotifyRead(PPDMICHARPORT pInterface, const void *pvBuf, size_t *pcbRead)
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209 | {
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210 | ParallelState *pData = PDMIHOSTDEVICEPORT_2_PARALLELSTATE(pInterface);
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211 | int rc;
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212 |
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213 | NOREF(pvBuf); NOREF(pcbRead); NOREF(pData); NOREF(rc);
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214 | return VINF_SUCCESS;
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215 | #if 0
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216 | Assert(*pcbRead != 0);
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217 |
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218 | PDMCritSectEnter(&pData->CritSect, VERR_PERMISSION_DENIED);
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219 | if (pData->lsr & UART_LSR_DR)
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220 | {
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221 | /* If a character is still in the read queue, then wait for it to be emptied. */
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222 | PDMCritSectLeave(&pData->CritSect);
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223 | rc = RTSemEventWait(pData->ReceiveSem, 250);
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224 | if (VBOX_FAILURE(rc))
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225 | return rc;
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226 |
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227 | PDMCritSectEnter(&pData->CritSect, VERR_PERMISSION_DENIED);
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228 | }
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229 |
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230 | if (!(pData->lsr & UART_LSR_DR))
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231 | {
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232 | pData->rbr = *(const char *)pvBuf;
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233 | pData->lsr |= UART_LSR_DR;
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234 | serial_update_irq(pData);
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235 | *pcbRead = 1;
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236 | rc = VINF_SUCCESS;
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237 | }
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238 | else
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239 | rc = VERR_TIMEOUT;
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240 |
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241 | PDMCritSectLeave(&pData->CritSect);
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242 |
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243 | return rc;
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244 | #endif
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245 | }
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246 | #endif /* IN_RING3 */
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247 |
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248 | /**
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249 | * Port I/O Handler for OUT operations.
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250 | *
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251 | * @returns VBox status code.
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252 | *
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253 | * @param pDevIns The device instance.
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254 | * @param pvUser User argument.
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255 | * @param Port Port number used for the IN operation.
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256 | * @param u32 The value to output.
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257 | * @param cb The value size in bytes.
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258 | */
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259 | PDMBOTHCBDECL(int) parallelIOPortWrite(PPDMDEVINS pDevIns, void *pvUser,
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260 | RTIOPORT Port, uint32_t u32, unsigned cb)
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261 | {
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262 | ParallelState *pData = PDMINS2DATA(pDevIns, ParallelState *);
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263 | int rc = VINF_SUCCESS;
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264 |
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265 | if (cb == 1)
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266 | {
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267 | rc = PDMCritSectEnter(&pData->CritSect, VINF_IOM_HC_IOPORT_WRITE);
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268 | if (rc == VINF_SUCCESS)
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269 | {
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270 | Log2(("%s: port %#06x val %#04x\n", __FUNCTION__, Port, u32));
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271 | rc = parallel_ioport_write (pData, Port, u32);
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272 | PDMCritSectLeave(&pData->CritSect);
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273 | }
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274 | }
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275 | else
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276 | AssertMsgFailed(("Port=%#x cb=%d u32=%#x\n", Port, cb, u32));
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277 |
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278 | return rc;
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279 | }
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280 |
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281 | /**
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282 | * Port I/O Handler for IN operations.
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283 | *
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284 | * @returns VBox status code.
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285 | *
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286 | * @param pDevIns The device instance.
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287 | * @param pvUser User argument.
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288 | * @param Port Port number used for the IN operation.
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289 | * @param u32 The value to output.
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290 | * @param cb The value size in bytes.
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291 | */
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292 | PDMBOTHCBDECL(int) parallelIOPortRead(PPDMDEVINS pDevIns, void *pvUser,
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293 | RTIOPORT Port, uint32_t *pu32, unsigned cb)
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294 | {
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295 | ParallelState *pData = PDMINS2DATA(pDevIns, ParallelState *);
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296 | int rc = VINF_SUCCESS;
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297 |
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298 | if (cb == 1)
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299 | {
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300 | rc = PDMCritSectEnter(&pData->CritSect, VINF_IOM_HC_IOPORT_READ);
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301 | if (rc == VINF_SUCCESS)
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302 | {
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303 | *pu32 = parallel_ioport_read (pData, Port, &rc);
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304 | Log2(("%s: port %#06x val %#04x\n", __FUNCTION__, Port, *pu32));
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305 | PDMCritSectLeave(&pData->CritSect);
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306 | }
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307 | }
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308 | else
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309 | rc = VERR_IOM_IOPORT_UNUSED;
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310 |
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311 | return rc;
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312 | }
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313 |
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314 | #ifdef IN_RING3
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315 | /**
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316 | * Saves a state of the serial port device.
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317 | *
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318 | * @returns VBox status code.
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319 | * @param pDevIns The device instance.
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320 | * @param pSSMHandle The handle to save the state to.
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321 | */
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322 | static DECLCALLBACK(int) parallelSaveExec(PPDMDEVINS pDevIns,
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323 | PSSMHANDLE pSSMHandle)
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324 | {
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325 | ParallelState *pData = PDMINS2DATA(pDevIns, ParallelState *);
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326 |
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327 | SSMR3PutU8(pSSMHandle, pData->reg_data);
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328 | SSMR3PutU8(pSSMHandle, pData->reg_status);
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329 | SSMR3PutU8(pSSMHandle, pData->reg_control);
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330 | SSMR3PutS32(pSSMHandle, pData->irq);
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331 | SSMR3PutU32(pSSMHandle, pData->base);
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332 |
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333 | return SSMR3PutU32(pSSMHandle, ~0); /* sanity/terminator */
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334 | }
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335 |
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336 | /**
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337 | * Loads a saved serial port device state.
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338 | *
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339 | * @returns VBox status code.
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340 | * @param pDevIns The device instance.
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341 | * @param pSSMHandle The handle to the saved state.
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342 | * @param u32Version The data unit version number.
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343 | */
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344 | static DECLCALLBACK(int) parallelLoadExec(PPDMDEVINS pDevIns,
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345 | PSSMHANDLE pSSMHandle,
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346 | uint32_t u32Version)
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347 | {
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348 | int rc;
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349 | uint32_t u32;
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350 | ParallelState *pData = PDMINS2DATA(pDevIns, ParallelState *);
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351 |
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352 | if (u32Version != PARALLEL_SAVED_STATE_VERSION)
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353 | {
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354 | AssertMsgFailed(("u32Version=%d\n", u32Version));
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355 | return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
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356 | }
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357 |
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358 | SSMR3GetU8(pSSMHandle, &pData->reg_data);
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359 | SSMR3GetU8(pSSMHandle, &pData->reg_status);
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360 | SSMR3GetU8(pSSMHandle, &pData->reg_control);
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361 | SSMR3GetS32(pSSMHandle, &pData->irq);
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362 | SSMR3GetU32(pSSMHandle, &pData->base);
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363 |
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364 | rc = SSMR3GetU32(pSSMHandle, &u32);
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365 | if (VBOX_FAILURE(rc))
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366 | return rc;
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367 |
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368 | if (u32 != ~0U)
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369 | {
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370 | AssertMsgFailed(("u32=%#x expected ~0\n", u32));
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371 | return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
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372 | }
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373 |
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374 | pData->pDevInsHC = pDevIns;
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375 | pData->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
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376 | return VINF_SUCCESS;
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377 | }
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378 |
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379 |
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380 | /**
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381 | * @copydoc FNPDMDEVRELOCATE
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382 | */
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383 | static DECLCALLBACK(void) parallelRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
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384 | {
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385 | ParallelState *pData = PDMINS2DATA(pDevIns, ParallelState *);
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386 | pData->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
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387 | }
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388 |
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389 | /** @copyfrom PIBASE::pfnqueryInterface */
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390 | static DECLCALLBACK(void *) parallelQueryInterface(PPDMIBASE pInterface, PDMINTERFACE enmInterface)
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391 | {
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392 | ParallelState *pData = PDMIBASE_2_PARALLELSTATE(pInterface);
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393 | switch (enmInterface)
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394 | {
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395 | case PDMINTERFACE_BASE:
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396 | return &pData->IBase;
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397 | case PDMINTERFACE_HOST_DEVICE_PORT:
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398 | return &pData->IHostDevicePort;
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399 | default:
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400 | return NULL;
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401 | }
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402 | }
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403 |
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404 | /**
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405 | * Destruct a device instance.
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406 | *
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407 | * Most VM resources are freed by the VM. This callback is provided so that any non-VM
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408 | * resources can be freed correctly.
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409 | *
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410 | * @returns VBox status.
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411 | * @param pDevIns The device instance data.
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412 | */
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413 | static DECLCALLBACK(int) parallelDestruct(PPDMDEVINS pDevIns)
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414 | {
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415 | ParallelState *pData = PDMINS2DATA(pDevIns, ParallelState *);
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416 |
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417 | RTSemEventDestroy(pData->ReceiveSem);
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418 | pData->ReceiveSem = NIL_RTSEMEVENT;
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419 |
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420 | PDMR3CritSectDelete(&pData->CritSect);
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421 | return VINF_SUCCESS;
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422 | }
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423 |
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424 |
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425 | /**
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426 | * Construct a device instance for a VM.
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427 | *
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428 | * @returns VBox status.
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429 | * @param pDevIns The device instance data.
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430 | * If the registration structure is needed, pDevIns->pDevReg points to it.
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431 | * @param iInstance Instance number. Use this to figure out which registers and such to use.
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432 | * The device number is also found in pDevIns->iInstance, but since it's
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433 | * likely to be freqently used PDM passes it as parameter.
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434 | * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
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435 | * of the device instance. It's also found in pDevIns->pCfgHandle, but like
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436 | * iInstance it's expected to be used a bit in this function.
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437 | */
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438 | static DECLCALLBACK(int) parallelConstruct(PPDMDEVINS pDevIns,
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439 | int iInstance,
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440 | PCFGMNODE pCfgHandle)
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441 | {
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442 | int rc;
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443 | ParallelState *pData = PDMINS2DATA(pDevIns, ParallelState*);
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444 | uint16_t io_base;
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445 | uint8_t irq_lvl;
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446 |
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447 | Assert(iInstance < 4);
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448 |
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449 | pData->pDevInsHC = pDevIns;
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450 | pData->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
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451 |
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452 | /*
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453 | * Validate configuration.
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454 | */
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455 | if (!CFGMR3AreValuesValid(pCfgHandle, "IRQ\0IOBase\0"))
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456 | return VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES;
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457 |
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458 | rc = CFGMR3QueryBool(pCfgHandle, "GCEnabled", &pData->fGCEnabled);
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459 | if (rc == VERR_CFGM_VALUE_NOT_FOUND)
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460 | pData->fGCEnabled = true;
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461 | else if (VBOX_FAILURE(rc))
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462 | return PDMDEV_SET_ERROR(pDevIns, rc,
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463 | N_("Configuration error: Failed to get the \"GCEnabled\" value"));
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464 |
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---|
465 | rc = CFGMR3QueryBool(pCfgHandle, "R0Enabled", &pData->fR0Enabled);
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466 | if (rc == VERR_CFGM_VALUE_NOT_FOUND)
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467 | pData->fR0Enabled = true;
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468 | else if (VBOX_FAILURE(rc))
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469 | return PDMDEV_SET_ERROR(pDevIns, rc,
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470 | N_("Configuration error: Failed to get the \"R0Enabled\" value"));
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471 |
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472 | /* IBase */
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473 | pData->IBase.pfnQueryInterface = parallelQueryInterface;
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474 |
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475 | /* ICharPort */
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476 | /* pData->ICharPort.pfnNotifyRead = parallelNotifyRead; */
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477 |
|
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478 | rc = RTSemEventCreate(&pData->ReceiveSem);
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479 | AssertRC(rc);
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480 |
|
---|
481 | /*
|
---|
482 | * Initialize critical section.
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483 | * This must of course be done before attaching drivers or anything else which can call us back..
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484 | */
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485 | char szName[24];
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486 | RTStrPrintf(szName, sizeof(szName), "Parallel#%d", iInstance);
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487 | rc = PDMDevHlpCritSectInit(pDevIns, &pData->CritSect, szName);
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488 | if (VBOX_FAILURE(rc))
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489 | return rc;
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490 |
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491 | /** @todo r=bird: Check for VERR_CFGM_VALUE_NOT_FOUND and provide sensible defaults.
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492 | * Also do AssertMsgFailed(("Configuration error:....)) in the failure cases of CFGMR3Query*()
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493 | * and CFGR3AreValuesValid() like we're doing in the other devices. */
|
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494 | rc = CFGMR3QueryU8(pCfgHandle, "IRQ", &irq_lvl);
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495 | if (VBOX_FAILURE(rc))
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496 | return rc;
|
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497 |
|
---|
498 | rc = CFGMR3QueryU16(pCfgHandle, "IOBase", &io_base);
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499 | if (VBOX_FAILURE(rc))
|
---|
500 | return rc;
|
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501 |
|
---|
502 | Log(("parallelConstruct instance %d iobase=%04x irq=%d\n", iInstance, io_base, irq_lvl));
|
---|
503 |
|
---|
504 | pData->irq = irq_lvl;
|
---|
505 | pData->reg_status = LPT_STATUS_BUSY | LPT_STATUS_IRQ;
|
---|
506 | pData->reg_control = LPT_CONTROL_STROBE | LPT_CONTROL_AUTO_LINEFEED | LPT_CONTROL_SELECT_PRINTER;
|
---|
507 | pData->base = io_base;
|
---|
508 | rc = PDMDevHlpIOPortRegister(pDevIns, io_base, 8, 0,
|
---|
509 | parallelIOPortWrite, parallelIOPortRead,
|
---|
510 | NULL, NULL, "PARALLEL");
|
---|
511 | if (VBOX_FAILURE (rc))
|
---|
512 | return rc;
|
---|
513 |
|
---|
514 | if (pData->fGCEnabled)
|
---|
515 | rc = PDMDevHlpIOPortRegisterGC(pDevIns, io_base, 8, 0, "parallelIOPortWrite",
|
---|
516 | "parallelIOPortRead", NULL, NULL, "Parallel");
|
---|
517 |
|
---|
518 | if (pData->fR0Enabled)
|
---|
519 | rc = PDMDevHlpIOPortRegisterR0(pDevIns, io_base, 8, 0, "parallelIOPortWrite",
|
---|
520 | "parallelIOPortRead", NULL, NULL, "Parallel");
|
---|
521 |
|
---|
522 | /* Attach the char driver and get the interfaces. For now no run-time
|
---|
523 | * changes are supported. */
|
---|
524 | rc = PDMDevHlpDriverAttach(pDevIns, 0, &pData->IBase, &pData->pDrvBase, "Parallel Host");
|
---|
525 | if (VBOX_SUCCESS(rc))
|
---|
526 | {
|
---|
527 | pData->pDrvHostDeviceConnector = (PDMIHOSTDEVICECONNECTOR *)pData->pDrvBase->pfnQueryInterface(pData->pDrvBase, PDMINTERFACE_HOST_DEVICE_CONNECTOR);
|
---|
528 | if (!pData->pDrvHostDeviceConnector)
|
---|
529 | {
|
---|
530 | AssertMsgFailed(("Configuration error: instance %d has no char interface!\n", iInstance));
|
---|
531 | return VERR_PDM_MISSING_INTERFACE;
|
---|
532 | }
|
---|
533 | /** @todo provide read notification interface!!!! */
|
---|
534 | }
|
---|
535 | else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
|
---|
536 | {
|
---|
537 | pData->pDrvBase = NULL;
|
---|
538 | pData->pDrvHostDeviceConnector = NULL;
|
---|
539 | LogRel(("Parallel%d: no unit\n", iInstance));
|
---|
540 | }
|
---|
541 | else
|
---|
542 | {
|
---|
543 | AssertMsgFailed(("Parallel%d: Failed to attach to host driver. rc=%Vrc\n", iInstance, rc));
|
---|
544 | return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
|
---|
545 | N_("Parallel device %d cannot attach to host driver\n"), iInstance);
|
---|
546 | }
|
---|
547 |
|
---|
548 | rc = PDMDevHlpSSMRegister(
|
---|
549 | pDevIns, /* pDevIns */
|
---|
550 | pDevIns->pDevReg->szDeviceName, /* pszName */
|
---|
551 | iInstance, /* u32Instance */
|
---|
552 | PARALLEL_SAVED_STATE_VERSION, /* u32Version */
|
---|
553 | sizeof (*pData), /* cbGuess */
|
---|
554 | NULL, /* pfnSavePrep */
|
---|
555 | parallelSaveExec, /* pfnSaveExec */
|
---|
556 | NULL, /* pfnSaveDone */
|
---|
557 | NULL, /* pfnLoadPrep */
|
---|
558 | parallelLoadExec, /* pfnLoadExec */
|
---|
559 | NULL /* pfnLoadDone */
|
---|
560 | );
|
---|
561 | if (VBOX_FAILURE(rc))
|
---|
562 | return rc;
|
---|
563 |
|
---|
564 | return VINF_SUCCESS;
|
---|
565 | }
|
---|
566 |
|
---|
567 | /**
|
---|
568 | * The device registration structure.
|
---|
569 | */
|
---|
570 | const PDMDEVREG g_DeviceParallelPort =
|
---|
571 | {
|
---|
572 | /* u32Version */
|
---|
573 | PDM_DEVREG_VERSION,
|
---|
574 | /* szDeviceName */
|
---|
575 | "parallel",
|
---|
576 | /* szGCMod */
|
---|
577 | "VBoxDDGC.gc",
|
---|
578 | /* szR0Mod */
|
---|
579 | "VBoxDDR0.r0",
|
---|
580 | /* pszDescription */
|
---|
581 | "Parallel Communication Port",
|
---|
582 | /* fFlags */
|
---|
583 | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GC | PDM_DEVREG_FLAGS_R0,
|
---|
584 | /* fClass */
|
---|
585 | PDM_DEVREG_CLASS_PARALLEL,
|
---|
586 | /* cMaxInstances */
|
---|
587 | 1,
|
---|
588 | /* cbInstance */
|
---|
589 | sizeof(ParallelState),
|
---|
590 | /* pfnConstruct */
|
---|
591 | parallelConstruct,
|
---|
592 | /* pfnDestruct */
|
---|
593 | parallelDestruct,
|
---|
594 | /* pfnRelocate */
|
---|
595 | parallelRelocate,
|
---|
596 | /* pfnIOCtl */
|
---|
597 | NULL,
|
---|
598 | /* pfnPowerOn */
|
---|
599 | NULL,
|
---|
600 | /* pfnReset */
|
---|
601 | NULL,
|
---|
602 | /* pfnSuspend */
|
---|
603 | NULL,
|
---|
604 | /* pfnResume */
|
---|
605 | NULL,
|
---|
606 | /* pfnAttach */
|
---|
607 | NULL,
|
---|
608 | /* pfnDetach */
|
---|
609 | NULL,
|
---|
610 | /* pfnQueryInterface. */
|
---|
611 | NULL
|
---|
612 | };
|
---|
613 | #endif /* IN_RING3 */
|
---|
614 |
|
---|
615 |
|
---|
616 | #endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
|
---|