VirtualBox

source: vbox/trunk/src/VBox/Devices/PC/DevPcArch.c@ 4753

Last change on this file since 4753 was 4071, checked in by vboxsync, 17 years ago

Biggest check-in ever. New source code headers for all (C) innotek files.

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1/* $Id: DevPcArch.c 4071 2007-08-07 17:07:59Z vboxsync $ */
2/** @file
3 * PC Architechture Device.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_DEV_PC_ARCH
22#include <VBox/pdmdev.h>
23#include <VBox/mm.h>
24
25#include <VBox/log.h>
26#include <iprt/assert.h>
27#include <VBox/err.h>
28
29#include <string.h>
30
31#include "Builtins.h"
32
33
34/*******************************************************************************
35* Structures and Typedefs *
36*******************************************************************************/
37
38/**
39 * PC Bios instance data structure.
40 */
41typedef struct DEVPCARCH
42{
43 /** Pointer back to the device instance. */
44 PPDMDEVINS pDevIns;
45} DEVPCARCH, *PDEVPCARCH;
46
47
48
49/**
50 * Port I/O Handler for math coprocessor IN operations.
51 *
52 * @returns VBox status code.
53 *
54 * @param pDevIns The device instance.
55 * @param pvUser User argument - ignored.
56 * @param uPort Port number used for the IN operation.
57 * @param pu32 Where to store the result.
58 * @param cb Number of bytes read.
59 */
60static DECLCALLBACK(int) pcarchIOPortFPURead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
61{
62 int rc;
63 NOREF(pvUser); NOREF(pDevIns); NOREF(pu32);
64 rc = PDMDeviceDBGFStop(pDevIns, PDM_SRC_POS, "Port=%#x cb=%d\n", Port, cb);
65 if (rc == VINF_SUCCESS)
66 rc = VERR_IOM_IOPORT_UNUSED;
67 return rc;
68}
69
70/**
71 * Port I/O Handler for math coprocessor OUT operations.
72 *
73 * @returns VBox status code.
74 *
75 * @param pDevIns The device instance.
76 * @param pvUser User argument - ignored.
77 * @param uPort Port number used for the IN operation.
78 * @param u32 The value to output.
79 * @param cb The value size in bytes.
80 * @todo Add IGNNE support.
81 */
82static DECLCALLBACK(int) pcarchIOPortFPUWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
83{
84 int rc = VINF_SUCCESS;
85 NOREF(pvUser);
86 if (cb == 1)
87 {
88 switch (Port)
89 {
90 /*
91 * Clear busy latch.
92 */
93 case 0xf0:
94 Log2(("PCARCH: FPU Clear busy latch u32=%#x\n", u32));
95/* This is triggered when booting Knoppix (3.7) */
96#if 0
97 if (!u32)
98 rc = PDMDeviceDBGFStop(pDevIns, PDM_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
99#endif
100 /* pDevIns->pDevHlp->pfnPICSetIrq(pDevIns, 13, 0); */
101 break;
102
103 /* Reset. */
104 case 0xf1:
105 Log2(("PCARCH: FPU Reset cb=%d u32=%#x\n", Port, cb, u32));
106 /** @todo figure out what the difference between FPU ports 0xf0 and 0xf1 are... */
107 /* pDevIns->pDevHlp->pfnPICSetIrq(pDevIns, 13, 0); */
108 break;
109
110 /* opcode transfers */
111 case 0xf8:
112 case 0xfa:
113 case 0xfc:
114 default:
115 rc = PDMDeviceDBGFStop(pDevIns, PDM_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
116 break;
117 }
118 /* this works better, but probably not entirely correct. */
119 PDMDevHlpISASetIrq(pDevIns, 13, 0);
120 }
121 else
122 rc = PDMDeviceDBGFStop(pDevIns, PDM_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
123 return rc;
124}
125
126
127/**
128 * Port I/O Handler for PS/2 system control port A IN operations.
129 *
130 * @returns VBox status code.
131 *
132 * @param pDevIns The device instance.
133 * @param pvUser User argument - ignored.
134 * @param uPort Port number used for the IN operation.
135 * @param pu32 Where to store the result.
136 * @param cb Number of bytes read.
137 *
138 * @todo Check if the A20 enable/disable method implemented here in any way
139 * should cooperate with the one implemented in the PS/2 keyboard device.
140 * This probably belongs together in the PS/2 keyboard device (since that
141 * is where the "port B" mentioned by Ralph Brown is implemented).
142 *
143 * @remark Ralph Brown and friends have this to say about this port:
144 *
145 * 0092 RW PS/2 system control port A (port B is at PORT 0061h) (see #P0415)
146 *
147 * Bitfields for PS/2 system control port A:
148 * Bit(s) Description (Table P0415)
149 * 7-6 any bit set to 1 turns activity light on
150 * 5 unused
151 * 4 watchdog timout occurred
152 * 3 =0 RTC/CMOS security lock (on password area) unlocked
153 * =1 CMOS locked (done by POST)
154 * 2 unused
155 * 1 A20 is active
156 * 0 =0 system reset or write
157 * =1 pulse alternate reset pin (high-speed alternate CPU reset)
158 * Notes: once set, bit 3 may only be cleared by a power-on reset
159 * on at least the C&T 82C235, bit 0 remains set through a CPU reset to
160 * allow the BIOS to determine the reset method
161 * on the PS/2 30-286 & "Tortuga" the INT 15h/87h memory copy does
162 * not use this port for A20 control, but instead uses the keyboard
163 * controller (8042). Reportedly this may cause the system to crash
164 * when access to the 8042 is disabled in password server mode
165 * (see #P0398).
166 * SeeAlso: #P0416,#P0417,MSR 00001000h
167 */
168static DECLCALLBACK(int) pcarchIOPortPS2SysControlPortARead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
169{
170 if (cb == 1)
171 {
172 *pu32 = PDMDevHlpA20IsEnabled(pDevIns) << 1;
173 return VINF_SUCCESS;
174 }
175 return PDMDeviceDBGFStop(pDevIns, PDM_SRC_POS, "Port=%#x cb=%d\n", Port, cb);
176}
177
178
179/**
180 * Port I/O Handler for PS/2 system control port A OUT operations.
181 *
182 * @returns VBox status code.
183 *
184 * @param pDevIns The device instance.
185 * @param pvUser User argument - ignored.
186 * @param uPort Port number used for the IN operation.
187 * @param u32 The value to output.
188 * @param cb The value size in bytes.
189 * @see Remark and todo of pcarchIOPortPS2SysControlPortARead().
190 */
191static DECLCALLBACK(int) pcarchIOPortPS2SysControlPortAWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
192{
193 NOREF(pvUser);
194 if (cb == 1)
195 {
196 /*
197 * Fast reset?
198 */
199 if (u32 & 1)
200 return PDMDevHlpVMReset(pDevIns);
201
202 /*
203 * A20 is the only thing we care about of the other stuff.
204 */
205 PDMDevHlpA20Set(pDevIns, !!(u32 & 2));
206 return VINF_SUCCESS;
207 }
208 return PDMDeviceDBGFStop(pDevIns, PDM_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
209}
210
211
212/**
213 * Construct a device instance for a VM.
214 *
215 * @returns VBox status.
216 * @param pDevIns The device instance data.
217 * If the registration structure is needed, pDevIns->pDevReg points to it.
218 * @param iInstance Instance number. Use this to figure out which registers and such to use.
219 * The device number is also found in pDevIns->iInstance, but since it's
220 * likely to be freqently used PDM passes it as parameter.
221 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
222 * of the device instance. It's also found in pDevIns->pCfgHandle, but like
223 * iInstance it's expected to be used a bit in this function.
224 */
225static DECLCALLBACK(int) pcarchConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle)
226{
227 PDEVPCARCH pData = PDMINS2DATA(pDevIns, PDEVPCARCH);
228 int rc;
229 Assert(iInstance == 0);
230
231 /*
232 * Validate configuration.
233 */
234 if (!CFGMR3AreValuesValid(pCfgHandle, "\0"))
235 return VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES;
236
237 /*
238 * Init the data.
239 */
240 pData->pDevIns = pDevIns;
241
242 /*
243 * Register I/O Ports
244 */
245 rc = PDMDevHlpIOPortRegister(pDevIns, 0xF0, 0x10, NULL, pcarchIOPortFPUWrite, pcarchIOPortFPURead, NULL, NULL, "Math Co-Processor (DOS/OS2 mode)");
246 if (VBOX_FAILURE(rc))
247 return rc;
248 rc = PDMDevHlpIOPortRegister(pDevIns, 0x92, 1, NULL, pcarchIOPortPS2SysControlPortAWrite, pcarchIOPortPS2SysControlPortARead, NULL, NULL, "PS/2 system control port A (A20 and more)");
249 if (VBOX_FAILURE(rc))
250 return rc;
251
252 /*
253 * Reserve ROM/MMIO areas:
254 * 1. 0x000a0000-0x000fffff
255 * 2. 0xfff80000-0xffffffff
256 */
257 rc = PDMDevHlpPhysReserve(pDevIns, 0x000a0000, 0x50000, "Low ROM Region");
258 if (VBOX_FAILURE(rc))
259 return rc;
260 rc = PDMDevHlpPhysReserve(pDevIns, 0xfff80000, 0x80000, "High ROM Region");
261 if (VBOX_FAILURE(rc))
262 return rc;
263
264 return VINF_SUCCESS;
265}
266
267
268/**
269 * The device registration structure.
270 */
271const PDMDEVREG g_DevicePcArch =
272{
273 /* u32Version */
274 PDM_DEVREG_VERSION,
275 /* szDeviceName */
276 "pcarch",
277 /* szGCMod */
278 "",
279 /* szR0Mod */
280 "",
281 /* pszDescription */
282 "PC Architecture Device",
283 /* fFlags */
284 PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_32,
285 /* fClass */
286 PDM_DEVREG_CLASS_ARCH,
287 /* cMaxInstances */
288 1,
289 /* cbInstance */
290 sizeof(DEVPCARCH),
291 /* pfnConstruct */
292 pcarchConstruct,
293 /* pfnDestruct */
294 NULL,
295 /* pfnRelocate */
296 NULL,
297 /* pfnIOCtl */
298 NULL,
299 /* pfnPowerOn */
300 NULL,
301 /* pfnReset */
302 NULL,
303 /* pfnSuspend */
304 NULL,
305 /* pfnResume */
306 NULL,
307 /* pfnAttach */
308 NULL,
309 /* pfnDetach */
310 NULL,
311 /* pfnQueryInterface. */
312 NULL,
313 /* pfnInitComplete. */
314 NULL
315};
316
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