DevFwCommon.cpp@ 26617

Last change on this file since 26617 was 26617, checked in by vboxsync, 15 years ago
DevFwCommon.cpp: Allow more than 3 chars for product version and 12 for product name. RTSystemQueryDmiString zap the buffer regardless of status, so use a 2nd buffer for the host strings. Log the values we take from the host.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 30.6 KB

Line
1	/* $Id: DevFwCommon.cpp 26617 2010-02-17 15:56:50Z vboxsync $ */
2	/** @file
3	* FwCommon - Shared firmware code (used by DevPcBios & DevEFI).
4	*/
5
6	/*
7	* Copyright (C) 2009 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	/*******************************************************************************
23	* Header Files *
24	*******************************************************************************/
25	#define LOG_GROUP LOG_GROUP_DEV
26	#include <VBox/pdmdev.h>
27
28	#include <VBox/log.h>
29	#include <VBox/err.h>
30	#include <VBox/param.h>
31
32	#include <iprt/assert.h>
33	#include <iprt/buildconfig.h>
34	#include <iprt/file.h>
35	#include <iprt/mem.h>
36	#include <iprt/string.h>
37	#include <iprt/uuid.h>
38	#include <iprt/system.h>
39
40	#include "../Builtins.h"
41	#include "../Builtins2.h"
42	#include "DevFwCommon.h"
43
44
45	/*******************************************************************************
46	* Defined Constants And Macros *
47	*******************************************************************************/
48
49	/*
50	* Default DMI data (legacy).
51	* Don't change this information otherwise Windows guests will demand re-activation!
52	*/
53	static const int32_t s_iDefDmiBIOSReleaseMajor = 0;
54	static const int32_t s_iDefDmiBIOSReleaseMinor = 0;
55	static const int32_t s_iDefDmiBIOSFirmwareMajor = 0;
56	static const int32_t s_iDefDmiBIOSFirmwareMinor = 0;
57	static const char *s_szDefDmiBIOSVendor = "innotek GmbH";
58	static const char *s_szDefDmiBIOSVersion = "VirtualBox";
59	static const char *s_szDefDmiBIOSReleaseDate = "12/01/2006";
60	static const char *s_szDefDmiSystemVendor = "innotek GmbH";
61	static const char *s_szDefDmiSystemProduct = "VirtualBox";
62	static const char *s_szDefDmiSystemVersion = "1.2";
63	static const char *s_szDefDmiSystemSerial = "0";
64	static const char *s_szDefDmiSystemFamily = "Virtual Machine";
65	static const char *s_szDefDmiChassisVendor = "Sun Microsystems, Inc.";
66	static const char *s_szDefDmiChassisVersion = "";
67	static const char *s_szDefDmiChassisSerial = "";
68	static const char *s_szDefDmiChassisAssetTag = "";
69
70	static char g_szHostDmiSystemProduct[64];
71	static char g_szHostDmiSystemVersion[64];
72
73
74	/*******************************************************************************
75	* Structures and Typedefs *
76	*******************************************************************************/
77	#pragma pack(1)
78
79	typedef struct SMBIOSHDR
80	{
81	uint8_t au8Signature[4];
82	uint8_t u8Checksum;
83	uint8_t u8Eps;
84	uint8_t u8VersionMajor;
85	uint8_t u8VersionMinor;
86	uint16_t u16MaxStructureSize;
87	uint8_t u8EntryPointRevision;
88	uint8_t u8Pad[5];
89	} *SMBIOSHDRPTR;
90	AssertCompileSize(SMBIOSHDR, 16);
91
92	typedef struct DMIMAINHDR
93	{
94	uint8_t au8Signature[5];
95	uint8_t u8Checksum;
96	uint16_t u16TablesLength;
97	uint32_t u32TableBase;
98	uint16_t u16TableEntries;
99	uint8_t u8TableVersion;
100	} *DMIMAINHDRPTR;
101	AssertCompileSize(DMIMAINHDR, 15);
102
103	/** DMI header */
104	typedef struct DMIHDR
105	{
106	uint8_t u8Type;
107	uint8_t u8Length;
108	uint16_t u16Handle;
109	} *PDMIHDR;
110	AssertCompileSize(DMIHDR, 4);
111
112	/** DMI BIOS information (Type 0) */
113	typedef struct DMIBIOSINF
114	{
115	DMIHDR header;
116	uint8_t u8Vendor;
117	uint8_t u8Version;
118	uint16_t u16Start;
119	uint8_t u8Release;
120	uint8_t u8ROMSize;
121	uint64_t u64Characteristics;
122	uint8_t u8CharacteristicsByte1;
123	uint8_t u8CharacteristicsByte2;
124	uint8_t u8ReleaseMajor;
125	uint8_t u8ReleaseMinor;
126	uint8_t u8FirmwareMajor;
127	uint8_t u8FirmwareMinor;
128	} *PDMIBIOSINF;
129	AssertCompileSize(DMIBIOSINF, 0x18);
130
131	/** DMI system information (Type 1) */
132	typedef struct DMISYSTEMINF
133	{
134	DMIHDR header;
135	uint8_t u8Manufacturer;
136	uint8_t u8ProductName;
137	uint8_t u8Version;
138	uint8_t u8SerialNumber;
139	uint8_t au8Uuid[16];
140	uint8_t u8WakeupType;
141	uint8_t u8SKUNumber;
142	uint8_t u8Family;
143	} *PDMISYSTEMINF;
144	AssertCompileSize(DMISYSTEMINF, 0x1b);
145
146	/** DMI system enclosure or chassis type (Type 3) */
147	typedef struct DMICHASSIS
148	{
149	DMIHDR header;
150	uint8_t u8Manufacturer;
151	uint8_t u8Type;
152	uint8_t u8Version;
153	uint8_t u8SerialNumber;
154	uint8_t u8AssetTag;
155	uint8_t u8BootupState;
156	uint8_t u8PowerSupplyState;
157	uint8_t u8ThermalState;
158	uint8_t u8SecurityStatus;
159	/* v2.3+, currently not supported */
160	uint32_t u32OEMdefined;
161	uint8_t u8Height;
162	uint8_t u8NumPowerChords;
163	uint8_t u8ContElems;
164	uint8_t u8ContElemRecLen;
165	} *PDMICHASSIS;
166	AssertCompileSize(DMICHASSIS, 0x15);
167
168	/** DMI processor information (Type 4) */
169	typedef struct DMIPROCESSORINF
170	{
171	DMIHDR header;
172	uint8_t u8SocketDesignation;
173	uint8_t u8ProcessorType;
174	uint8_t u8ProcessorFamily;
175	uint8_t u8ProcessorManufacturer;
176	uint64_t u64ProcessorIdentification;
177	uint8_t u8ProcessorVersion;
178	uint8_t u8Voltage;
179	uint16_t u16ExternalClock;
180	uint16_t u16MaxSpeed;
181	uint16_t u16CurrentSpeed;
182	uint8_t u8Status;
183	uint8_t u8ProcessorUpgrade;
184	uint16_t u16L1CacheHandle;
185	uint16_t u16L2CacheHandle;
186	uint16_t u16L3CacheHandle;
187	uint8_t u8SerialNumber;
188	uint8_t u8AssetTag;
189	uint8_t u8PartNumber;
190	uint8_t u8CoreCount;
191	uint8_t u8CoreEnabled;
192	uint8_t u8ThreadCount;
193	uint16_t u16ProcessorCharacteristics;
194	uint16_t u16ProcessorFamily2;
195	} *PDMIPROCESSORINF;
196	AssertCompileSize(DMIPROCESSORINF, 0x2a);
197
198	/** DMI OEM strings (Type 11) */
199	typedef struct DMIOEMSTRINGS
200	{
201	DMIHDR header;
202	uint8_t u8Count;
203	uint8_t u8VBoxVersion;
204	uint8_t u8VBoxRevision;
205	} *PDMIOEMSTRINGS;
206	AssertCompileSize(DMIOEMSTRINGS, 0x7);
207
208	/** MPS floating pointer structure */
209	typedef struct MPSFLOATPTR
210	{
211	uint8_t au8Signature[4];
212	uint32_t u32MPSAddr;
213	uint8_t u8Length;
214	uint8_t u8SpecRev;
215	uint8_t u8Checksum;
216	uint8_t au8Feature[5];
217	} *PMPSFLOATPTR;
218	AssertCompileSize(MPSFLOATPTR, 16);
219
220	/** MPS config table header */
221	typedef struct MPSCFGTBLHEADER
222	{
223	uint8_t au8Signature[4];
224	uint16_t u16Length;
225	uint8_t u8SpecRev;
226	uint8_t u8Checksum;
227	uint8_t au8OemId[8];
228	uint8_t au8ProductId[12];
229	uint32_t u32OemTablePtr;
230	uint16_t u16OemTableSize;
231	uint16_t u16EntryCount;
232	uint32_t u32AddrLocalApic;
233	uint16_t u16ExtTableLength;
234	uint8_t u8ExtTableChecksxum;
235	uint8_t u8Reserved;
236	} *PMPSCFGTBLHEADER;
237	AssertCompileSize(MPSCFGTBLHEADER, 0x2c);
238
239	/** MPS processor entry */
240	typedef struct MPSPROCENTRY
241	{
242	uint8_t u8EntryType;
243	uint8_t u8LocalApicId;
244	uint8_t u8LocalApicVersion;
245	uint8_t u8CPUFlags;
246	uint32_t u32CPUSignature;
247	uint32_t u32CPUFeatureFlags;
248	uint32_t u32Reserved[2];
249	} *PMPSPROCENTRY;
250	AssertCompileSize(MPSPROCENTRY, 20);
251
252	/** MPS bus entry */
253	typedef struct MPSBUSENTRY
254	{
255	uint8_t u8EntryType;
256	uint8_t u8BusId;
257	uint8_t au8BusTypeStr[6];
258	} *PMPSBUSENTRY;
259	AssertCompileSize(MPSBUSENTRY, 8);
260
261	/** MPS I/O-APIC entry */
262	typedef struct MPSIOAPICENTRY
263	{
264	uint8_t u8EntryType;
265	uint8_t u8Id;
266	uint8_t u8Version;
267	uint8_t u8Flags;
268	uint32_t u32Addr;
269	} *PMPSIOAPICENTRY;
270	AssertCompileSize(MPSIOAPICENTRY, 8);
271
272	/** MPS I/O-Interrupt entry */
273	typedef struct MPSIOINTERRUPTENTRY
274	{
275	uint8_t u8EntryType;
276	uint8_t u8Type;
277	uint16_t u16Flags;
278	uint8_t u8SrcBusId;
279	uint8_t u8SrcBusIrq;
280	uint8_t u8DstIOAPICId;
281	uint8_t u8DstIOAPICInt;
282	} *PMPSIOIRQENTRY;
283	AssertCompileSize(MPSIOINTERRUPTENTRY, 8);
284
285	#pragma pack()
286
287
288	/**
289	* Calculate a simple checksum for the MPS table.
290	*
291	* @param data data
292	* @param len size of data
293	*/
294	static uint8_t fwCommonChecksum(const uint8_t * const au8Data, uint32_t u32Length)
295	{
296	uint8_t u8Sum = 0;
297	for (size_t i = 0; i < u32Length; ++i)
298	u8Sum += au8Data[i];
299	return -u8Sum;
300	}
301
302	static bool fwCommonChecksumOk(const uint8_t * const au8Data, uint32_t u32Length)
303	{
304	uint8_t u8Sum = 0;
305	for (size_t i = 0; i < u32Length; i++)
306	u8Sum += au8Data[i];
307	return (u8Sum == 0);
308	}
309
310	/*
311	* Macmini2,1 - matches Mac Mini
312	*/
313	static void fwCommonUseHostDMIStrings(void)
314	{
315	int rc;
316
317	rc = RTSystemQueryDmiString(RTSYSDMISTR_PRODUCT_NAME,
318	g_szHostDmiSystemProduct, sizeof(g_szHostDmiSystemProduct));
319	if (RT_SUCCESS(rc))
320	{
321	s_szDefDmiSystemProduct = g_szHostDmiSystemProduct;
322	LogRel(("DMI: Using DmiSystemProduct from host: %s\n", g_szHostDmiSystemProduct));
323	}
324
325	rc = RTSystemQueryDmiString(RTSYSDMISTR_PRODUCT_VERSION,
326	g_szHostDmiSystemVersion, sizeof(g_szHostDmiSystemVersion));
327	if (RT_SUCCESS(rc))
328	{
329	s_szDefDmiSystemVersion = g_szHostDmiSystemVersion;
330	LogRel(("DMI: Using DmiSystemVersion from host: %s\n", g_szHostDmiSystemVersion));
331	}
332	}
333
334	/**
335	* Construct the DMI table.
336	*
337	* @returns VBox status code.
338	* @param pDevIns The device instance.
339	* @param pTable Where to create the DMI table.
340	* @param cbMax The max size of the DMI table.
341	* @param pUuid Pointer to the UUID to use if the DmiUuid
342	* configuration string isn't present.
343	* @param pCfg The handle to our config node.
344	* @param fPutSmbiosHeaders Plant SMBIOS headers if true.
345	*/
346	int FwCommonPlantDMITable(PPDMDEVINS pDevIns, uint8_t *pTable, unsigned cbMax, PCRTUUID pUuid, PCFGMNODE pCfg, bool fPutSmbiosHeaders)
347	{
348	#define CHECKSIZE(cbWant) \
349	{ \
350	size_t cbNeed = (size_t)(pszStr + cbWant - (char )pTable) + 5; / +1 for strtab terminator +4 for end-of-table entry */ \
351	if (cbNeed > cbMax) \
352	{ \
353	if (fHideErrors) \
354	{ \
355	LogRel(("One of the DMI strings is too long -- using default DMI data!\n")); \
356	continue; \
357	} \
358	return PDMDevHlpVMSetError(pDevIns, VERR_TOO_MUCH_DATA, RT_SRC_POS, \
359	N_("One of the DMI strings is too long. Check all bios/Dmi* configuration entries. At least %zu bytes are needed but there is no space for more than %d bytes"), cbNeed, cbMax); \
360	} \
361	}
362
363	#define READCFGSTRDEF(variable, name, default_value) \
364	{ \
365	if (fForceDefault) \
366	pszTmp = default_value; \
367	else \
368	{ \
369	rc = CFGMR3QueryStringDef(pCfg, name, szBuf, sizeof(szBuf), default_value); \
370	if (RT_FAILURE(rc)) \
371	{ \
372	if (fHideErrors) \
373	{ \
374	LogRel(("Configuration error: Querying \"" name "\" as a string failed -- using default DMI data!\n")); \
375	continue; \
376	} \
377	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, \
378	N_("Configuration error: Querying \"" name "\" as a string failed")); \
379	} \
380	else if (!strcmp(szBuf, "<EMPTY>")) \
381	pszTmp = ""; \
382	else \
383	pszTmp = szBuf; \
384	} \
385	if (!pszTmp[0]) \
386	variable = 0; /* empty string */ \
387	else \
388	{ \
389	variable = iStrNr++; \
390	size_t cStr = strlen(pszTmp) + 1; \
391	CHECKSIZE(cStr); \
392	memcpy(pszStr, pszTmp, cStr); \
393	pszStr += cStr ; \
394	} \
395	}
396
397	#define READCFGSTR(variable, name) \
398	READCFGSTRDEF(variable, # name, s_szDef ## name)
399
400	#define READCFGINT(variable, name) \
401	{ \
402	if (fForceDefault) \
403	variable = s_iDef ## name; \
404	else \
405	{ \
406	rc = CFGMR3QueryS32Def(pCfg, # name, & variable, s_iDef ## name); \
407	if (RT_FAILURE(rc)) \
408	{ \
409	if (fHideErrors) \
410	{ \
411	LogRel(("Configuration error: Querying \"" # name "\" as an int failed -- using default DMI data!\n")); \
412	continue; \
413	} \
414	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, \
415	N_("Configuration error: Querying \"" # name "\" as an int failed")); \
416	} \
417	} \
418	}
419
420	bool fForceDefault = false;
421	#ifdef VBOX_BIOS_DMI_FALLBACK
422	/*
423	* There will be two passes. If an error occurs during the first pass, a
424	* message will be written to the release log and we fall back to default
425	* DMI data and start a second pass.
426	*/
427	bool fHideErrors = true;
428	#else
429	/*
430	* There will be one pass, every error is fatal and will prevent the VM
431	* from starting.
432	*/
433	bool fHideErrors = false;
434	#endif
435
436	uint8_t fDmiUseHostInfo;
437	int rc = CFGMR3QueryU8Def(pCfg, "DmiUseHostInfo", &fDmiUseHostInfo, 0);
438	if (RT_FAILURE (rc))
439	return PDMDEV_SET_ERROR(pDevIns, rc,
440	N_("Configuration error: Failed to read \"DmiUseHostInfo\""));
441
442	/* Sync up with host default DMI values */
443	if (fDmiUseHostInfo)
444	fwCommonUseHostDMIStrings();
445
446	for (;; fForceDefault = true, fHideErrors = false)
447	{
448	int iStrNr;
449	char szBuf[256];
450	char pszStr = (char )pTable;
451	char szDmiSystemUuid[64];
452	char *pszDmiSystemUuid;
453	const char *pszTmp;
454
455	if (fForceDefault)
456	pszDmiSystemUuid = NULL;
457	else
458	{
459	rc = CFGMR3QueryString(pCfg, "DmiSystemUuid", szDmiSystemUuid, sizeof(szDmiSystemUuid));
460	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
461	pszDmiSystemUuid = NULL;
462	else if (RT_FAILURE(rc))
463	{
464	if (fHideErrors)
465	{
466	LogRel(("Configuration error: Querying \"DmiSystemUuid\" as a string failed, using default DMI data\n"));
467	continue;
468	}
469	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
470	N_("Configuration error: Querying \"DmiSystemUuid\" as a string failed"));
471	}
472	else
473	pszDmiSystemUuid = szDmiSystemUuid;
474	}
475
476	/*********************************
477	* DMI BIOS information (Type 0) *
478	*********************************/
479	PDMIBIOSINF pBIOSInf = (PDMIBIOSINF)pszStr;
480	CHECKSIZE(sizeof(*pBIOSInf));
481
482	pszStr = (char *)&pBIOSInf->u8ReleaseMajor;
483	pBIOSInf->header.u8Length = RT_OFFSETOF(DMIBIOSINF, u8ReleaseMajor);
484
485	/* don't set these fields by default for legacy compatibility */
486	int iDmiBIOSReleaseMajor, iDmiBIOSReleaseMinor;
487	READCFGINT(iDmiBIOSReleaseMajor, DmiBIOSReleaseMajor);
488	READCFGINT(iDmiBIOSReleaseMinor, DmiBIOSReleaseMinor);
489	if (iDmiBIOSReleaseMajor != 0 \|\| iDmiBIOSReleaseMinor != 0)
490	{
491	pszStr = (char *)&pBIOSInf->u8FirmwareMajor;
492	pBIOSInf->header.u8Length = RT_OFFSETOF(DMIBIOSINF, u8FirmwareMajor);
493	pBIOSInf->u8ReleaseMajor = iDmiBIOSReleaseMajor;
494	pBIOSInf->u8ReleaseMinor = iDmiBIOSReleaseMinor;
495
496	int iDmiBIOSFirmwareMajor, iDmiBIOSFirmwareMinor;
497	READCFGINT(iDmiBIOSFirmwareMajor, DmiBIOSFirmwareMajor);
498	READCFGINT(iDmiBIOSFirmwareMinor, DmiBIOSFirmwareMinor);
499	if (iDmiBIOSFirmwareMajor != 0 \|\| iDmiBIOSFirmwareMinor != 0)
500	{
501	pszStr = (char *)(pBIOSInf + 1);
502	pBIOSInf->header.u8Length = sizeof(DMIBIOSINF);
503	pBIOSInf->u8FirmwareMajor = iDmiBIOSFirmwareMajor;
504	pBIOSInf->u8FirmwareMinor = iDmiBIOSFirmwareMinor;
505	}
506	}
507
508	iStrNr = 1;
509	pBIOSInf->header.u8Type = 0; /* BIOS Information */
510	pBIOSInf->header.u16Handle = 0x0000;
511	READCFGSTR(pBIOSInf->u8Vendor, DmiBIOSVendor);
512	READCFGSTR(pBIOSInf->u8Version, DmiBIOSVersion);
513	pBIOSInf->u16Start = 0xE000;
514	READCFGSTR(pBIOSInf->u8Release, DmiBIOSReleaseDate);
515	pBIOSInf->u8ROMSize = 1; /* 128K */
516	pBIOSInf->u64Characteristics = RT_BIT(4) /* ISA is supported */
517	\| RT_BIT(7) /* PCI is supported */
518	\| RT_BIT(15) /* Boot from CD is supported */
519	\| RT_BIT(16) /* Selectable Boot is supported */
520	\| RT_BIT(27) /* Int 9h, 8042 Keyboard services supported */
521	\| RT_BIT(30) /* Int 10h, CGA/Mono Video Services supported */
522	/* any more?? */
523	;
524	pBIOSInf->u8CharacteristicsByte1 = RT_BIT(0) /* ACPI is supported */
525	/* any more?? */
526	;
527	pBIOSInf->u8CharacteristicsByte2 = 0
528	/* any more?? */
529	;
530	*pszStr++ = '\0';
531
532	/***********************************
533	* DMI system information (Type 1) *
534	***********************************/
535	PDMISYSTEMINF pSystemInf = (PDMISYSTEMINF)pszStr;
536	CHECKSIZE(sizeof(*pSystemInf));
537	pszStr = (char *)(pSystemInf + 1);
538	iStrNr = 1;
539	pSystemInf->header.u8Type = 1; /* System Information */
540	pSystemInf->header.u8Length = sizeof(*pSystemInf);
541	pSystemInf->header.u16Handle = 0x0001;
542	READCFGSTR(pSystemInf->u8Manufacturer, DmiSystemVendor);
543	READCFGSTR(pSystemInf->u8ProductName, DmiSystemProduct);
544	READCFGSTR(pSystemInf->u8Version, DmiSystemVersion);
545	READCFGSTR(pSystemInf->u8SerialNumber, DmiSystemSerial);
546
547	RTUUID uuid;
548	if (pszDmiSystemUuid)
549	{
550	rc = RTUuidFromStr(&uuid, pszDmiSystemUuid);
551	if (RT_FAILURE(rc))
552	{
553	if (fHideErrors)
554	{
555	LogRel(("Configuration error: Invalid UUID for DMI tables specified, using default DMI data\n"));
556	continue;
557	}
558	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
559	N_("Configuration error: Invalid UUID for DMI tables specified"));
560	}
561	uuid.Gen.u32TimeLow = RT_H2BE_U32(uuid.Gen.u32TimeLow);
562	uuid.Gen.u16TimeMid = RT_H2BE_U16(uuid.Gen.u16TimeMid);
563	uuid.Gen.u16TimeHiAndVersion = RT_H2BE_U16(uuid.Gen.u16TimeHiAndVersion);
564	pUuid = &uuid;
565	}
566	memcpy(pSystemInf->au8Uuid, pUuid, sizeof(RTUUID));
567
568	pSystemInf->u8WakeupType = 6; /* Power Switch */
569	pSystemInf->u8SKUNumber = 0;
570	READCFGSTR(pSystemInf->u8Family, DmiSystemFamily);
571	*pszStr++ = '\0';
572
573	/********************************************
574	* DMI System Enclosure or Chassis (Type 3) *
575	********************************************/
576	PDMICHASSIS pChassis = (PDMICHASSIS)pszStr;
577	CHECKSIZE(sizeof(*pChassis));
578	pszStr = (char*)&pChassis->u32OEMdefined;
579	iStrNr = 1;
580	#ifdef VBOX_WITH_DMI_CHASSIS
581	pChassis->header.u8Type = 3; /* System Enclosure or Chassis */
582	#else
583	pChassis->header.u8Type = 0x7e; /* inactive */
584	#endif
585	pChassis->header.u8Length = RT_OFFSETOF(DMICHASSIS, u32OEMdefined);
586	pChassis->header.u16Handle = 0x0003;
587	READCFGSTR(pChassis->u8Manufacturer, DmiChassisVendor);
588	pChassis->u8Type = 0x01; /* ''other'', no chassis lock present */
589	READCFGSTR(pChassis->u8Version, DmiChassisVersion);
590	READCFGSTR(pChassis->u8SerialNumber, DmiChassisSerial);
591	READCFGSTR(pChassis->u8AssetTag, DmiChassisAssetTag);
592	pChassis->u8BootupState = 0x03; /* safe */
593	pChassis->u8PowerSupplyState = 0x03; /* safe */
594	pChassis->u8ThermalState = 0x03; /* safe */
595	pChassis->u8SecurityStatus = 0x03; /* none XXX */
596	# if 0
597	/* v2.3+, currently not supported */
598	pChassis->u32OEMdefined = 0;
599	pChassis->u8Height = 0; /* unspecified */
600	pChassis->u8NumPowerChords = 0; /* unspecified */
601	pChassis->u8ContElems = 0; /* no contained elements */
602	pChassis->u8ContElemRecLen = 0; /* no contained elements */
603	# endif
604	*pszStr++ = '\0';
605
606	/*****************************
607	* DMI OEM strings (Type 11) *
608	*****************************/
609	PDMIOEMSTRINGS pOEMStrings = (PDMIOEMSTRINGS)pszStr;
610	CHECKSIZE(sizeof(*pOEMStrings));
611	pszStr = (char *)(pOEMStrings + 1);
612	iStrNr = 1;
613	#ifdef VBOX_WITH_DMI_OEMSTRINGS
614	pOEMStrings->header.u8Type = 0xb; /* OEM Strings */
615	#else
616	pOEMStrings->header.u8Type = 0x7e; /* inactive */
617	#endif
618	pOEMStrings->header.u8Length = sizeof(*pOEMStrings);
619	pOEMStrings->header.u16Handle = 0x0002;
620	pOEMStrings->u8Count = 2;
621
622	char szTmp[64];
623	RTStrPrintf(szTmp, sizeof(szTmp), "vboxVer_%u.%u.%u",
624	RTBldCfgVersionMajor(), RTBldCfgVersionMinor(), RTBldCfgVersionBuild());
625	READCFGSTRDEF(pOEMStrings->u8VBoxVersion, "DmiOEMVBoxVer", szTmp);
626	RTStrPrintf(szTmp, sizeof(szTmp), "vboxRev_%u", RTBldCfgRevision());
627	READCFGSTRDEF(pOEMStrings->u8VBoxRevision, "DmiOEMVBoxRev", szTmp);
628	*pszStr++ = '\0';
629
630	/* End-of-table marker - includes padding to account for fixed table size. */
631	PDMIHDR pEndOfTable = (PDMIHDR)pszStr;
632	pEndOfTable->u8Type = 0x7f;
633	pEndOfTable->u8Length = cbMax - ((char )pszStr - (char )pTable) - 2;
634	pEndOfTable->u16Handle = 0xFEFF;
635
636	/* If more fields are added here, fix the size check in READCFGSTR */
637
638	/* Success! */
639	break;
640	}
641
642	#undef READCFGSTR
643	#undef READCFGINT
644	#undef CHECKSIZE
645
646	if (fPutSmbiosHeaders)
647	{
648	struct {
649	struct SMBIOSHDR smbios;
650	struct DMIMAINHDR dmi;
651	} aBiosHeaders
652	=
653	{
654	// The SMBIOS header
655	{
656	{ 0x5f, 0x53, 0x4d, 0x5f}, // "_SM_" signature
657	0x00, // checksum
658	0x1f, // EPS length, defined by standard
659	VBOX_SMBIOS_MAJOR_VER, // SMBIOS major version
660	VBOX_SMBIOS_MINOR_VER, // SMBIOS minor version
661	VBOX_SMBIOS_MAXSS, // Maximum structure size
662	0x00, // Entry point revision
663	{ 0x00, 0x00, 0x00, 0x00, 0x00 } // padding
664	},
665	// The DMI header
666	{
667	{ 0x5f, 0x44, 0x4d, 0x49, 0x5f }, // "_DMI_" signature
668	0x00, // checksum
669	VBOX_DMI_TABLE_SIZE, // DMI tables length
670	VBOX_DMI_TABLE_BASE, // DMI tables base
671	VBOX_DMI_TABLE_ENTR, // DMI tables entries
672	VBOX_DMI_TABLE_VER, // DMI version
673	}
674	};
675
676	aBiosHeaders.smbios.u8Checksum = fwCommonChecksum((uint8_t*)&aBiosHeaders.smbios, sizeof(aBiosHeaders.smbios));
677	aBiosHeaders.dmi.u8Checksum = fwCommonChecksum((uint8_t*)&aBiosHeaders.dmi, sizeof(aBiosHeaders.dmi));
678
679	PDMDevHlpPhysWrite (pDevIns, 0xfe300, &aBiosHeaders, sizeof(aBiosHeaders));
680	}
681
682	return VINF_SUCCESS;
683	}
684	AssertCompile(VBOX_DMI_TABLE_ENTR == 5);
685
686	/**
687	* Construct the MPS table. Only applicable if IOAPIC is active!
688	*
689	* See ``MultiProcessor Specificatiton Version 1.4 (May 1997)'':
690	* ``1.3 Scope
691	* ...
692	* The hardware required to implement the MP specification is kept to a
693	* minimum, as follows:
694	* * One or more processors that are Intel architecture instruction set
695	* compatible, such as the CPUs in the Intel486 or Pentium processor
696	* family.
697	* * One or more APICs, such as the Intel 82489DX Advanced Programmable
698	* Interrupt Controller or the integrated APIC, such as that on the
699	* Intel Pentium 735\\90 and 815\\100 processors, together with a discrete
700	* I/O APIC unit.''
701	* and later:
702	* ``4.3.3 I/O APIC Entries
703	* The configuration table contains one or more entries for I/O APICs.
704	* ...
705	* I/O APIC FLAGS: EN 3:0 1 If zero, this I/O APIC is unusable, and the
706	* operating system should not attempt to access
707	* this I/O APIC.
708	* At least one I/O APIC must be enabled.''
709	*
710	* @param pDevIns The device instance data.
711	* @param addr physical address in guest memory.
712	*/
713	void FwCommonPlantMpsTable(PPDMDEVINS pDevIns, uint8_t *pTable, uint16_t cCpus)
714	{
715	/* configuration table */
716	PMPSCFGTBLHEADER pCfgTab = (MPSCFGTBLHEADER*)pTable;
717	memcpy(pCfgTab->au8Signature, "PCMP", 4);
718	pCfgTab->u8SpecRev = 4; /* 1.4 */
719	memcpy(pCfgTab->au8OemId, "VBOXCPU ", 8);
720	memcpy(pCfgTab->au8ProductId, "VirtualBox ", 12);
721	pCfgTab->u32OemTablePtr = 0;
722	pCfgTab->u16OemTableSize = 0;
723	pCfgTab->u16EntryCount = cCpus /* Processors */
724	+ 1 /* ISA Bus */
725	+ 1 /* I/O-APIC */
726	+ 16 /* Interrupts */;
727	pCfgTab->u32AddrLocalApic = 0xfee00000;
728	pCfgTab->u16ExtTableLength = 0;
729	pCfgTab->u8ExtTableChecksxum = 0;
730	pCfgTab->u8Reserved = 0;
731
732	uint32_t u32Eax, u32Ebx, u32Ecx, u32Edx;
733	uint32_t u32CPUSignature = 0x0520; /* default: Pentium 100 */
734	uint32_t u32FeatureFlags = 0x0001; /* default: FPU */
735	PDMDevHlpGetCpuId(pDevIns, 0, &u32Eax, &u32Ebx, &u32Ecx, &u32Edx);
736	if (u32Eax >= 1)
737	{
738	PDMDevHlpGetCpuId(pDevIns, 1, &u32Eax, &u32Ebx, &u32Ecx, &u32Edx);
739	u32CPUSignature = u32Eax & 0xfff;
740	/* Local APIC will be enabled later so override it here. Since we provide
741	* an MP table we have an IOAPIC and therefore a Local APIC. */
742	u32FeatureFlags = u32Edx \| X86_CPUID_FEATURE_EDX_APIC;
743	}
744	/* Construct MPS table for each VCPU. */
745	PMPSPROCENTRY pProcEntry = (PMPSPROCENTRY)(pCfgTab+1);
746	for (int i = 0; i < cCpus; i++)
747	{
748	pProcEntry->u8EntryType = 0; /* processor entry */
749	pProcEntry->u8LocalApicId = i;
750	pProcEntry->u8LocalApicVersion = 0x11;
751	pProcEntry->u8CPUFlags = (i == 0 ? 2 /* bootstrap processor / : 0 / application processor /) \| 1 / enabled */;
752	pProcEntry->u32CPUSignature = u32CPUSignature;
753	pProcEntry->u32CPUFeatureFlags = u32FeatureFlags;
754	pProcEntry->u32Reserved[0] =
755	pProcEntry->u32Reserved[1] = 0;
756	pProcEntry++;
757	}
758
759	/* ISA bus */
760	PMPSBUSENTRY pBusEntry = (PMPSBUSENTRY)pProcEntry;
761	pBusEntry->u8EntryType = 1; /* bus entry */
762	pBusEntry->u8BusId = 0; /* this ID is referenced by the interrupt entries */
763	memcpy(pBusEntry->au8BusTypeStr, "ISA ", 6);
764
765	/* PCI bus? */
766
767	/* I/O-APIC.
768	* MP spec: "The configuration table contains one or more entries for I/O APICs.
769	* ... At least one I/O APIC must be enabled." */
770	PMPSIOAPICENTRY pIOAPICEntry = (PMPSIOAPICENTRY)(pBusEntry+1);
771	uint16_t apicId = cCpus;
772	pIOAPICEntry->u8EntryType = 2; /* I/O-APIC entry */
773	pIOAPICEntry->u8Id = apicId; /* this ID is referenced by the interrupt entries */
774	pIOAPICEntry->u8Version = 0x11;
775	pIOAPICEntry->u8Flags = 1 /* enable */;
776	pIOAPICEntry->u32Addr = 0xfec00000;
777
778	PMPSIOIRQENTRY pIrqEntry = (PMPSIOIRQENTRY)(pIOAPICEntry+1);
779	for (int i = 0; i < 16; i++, pIrqEntry++)
780	{
781	pIrqEntry->u8EntryType = 3; /* I/O interrupt entry */
782	pIrqEntry->u8Type = 0; /* INT, vectored interrupt */
783	pIrqEntry->u16Flags = 0; /* polarity of APIC I/O input signal = conforms to bus,
784	trigger mode = conforms to bus */
785	pIrqEntry->u8SrcBusId = 0; /* ISA bus */
786	pIrqEntry->u8SrcBusIrq = i;
787	pIrqEntry->u8DstIOAPICId = apicId;
788	pIrqEntry->u8DstIOAPICInt = i;
789	}
790
791	pCfgTab->u16Length = (uint8_t*)pIrqEntry - pTable;
792	pCfgTab->u8Checksum = fwCommonChecksum(pTable, pCfgTab->u16Length);
793
794	AssertMsg(pCfgTab->u16Length < 0x1000 - 0x100,
795	("VBOX_MPS_TABLE_SIZE=%d, maximum allowed size is %d",
796	pCfgTab->u16Length, 0x1000-0x100));
797
798	MPSFLOATPTR floatPtr;
799	floatPtr.au8Signature[0] = '_';
800	floatPtr.au8Signature[1] = 'M';
801	floatPtr.au8Signature[2] = 'P';
802	floatPtr.au8Signature[3] = '_';
803	floatPtr.u32MPSAddr = VBOX_MPS_TABLE_BASE;
804	floatPtr.u8Length = 1; /* structure size in paragraphs */
805	floatPtr.u8SpecRev = 4; /* MPS revision 1.4 */
806	floatPtr.u8Checksum = 0;
807	floatPtr.au8Feature[0] = 0;
808	floatPtr.au8Feature[1] = 0;
809	floatPtr.au8Feature[2] = 0;
810	floatPtr.au8Feature[3] = 0;
811	floatPtr.au8Feature[4] = 0;
812	floatPtr.u8Checksum = fwCommonChecksum((uint8_t*)&floatPtr, 16);
813	PDMDevHlpPhysWrite (pDevIns, 0x9fff0, &floatPtr, 16);
814	}

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/Devices/PC/DevFwCommon.cpp@ 26617

Download in other formats: