VirtualBox

source: vbox/trunk/src/VBox/Devices/PC/BIOS/ata.h@ 62564

Last change on this file since 62564 was 62509, checked in by vboxsync, 8 years ago

(C) 2016

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1/*
2 * Copyright (C) 2006-2016 Oracle Corporation
3 *
4 * This file is part of VirtualBox Open Source Edition (OSE), as
5 * available from http://www.virtualbox.org. This file is free software;
6 * you can redistribute it and/or modify it under the terms of the GNU
7 * General Public License (GPL) as published by the Free Software
8 * Foundation, in version 2 as it comes in the "COPYING" file of the
9 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
10 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
11 * --------------------------------------------------------------------
12 *
13 * This code is based on:
14 *
15 * ROM BIOS for use with Bochs/Plex86/QEMU emulation environment
16 *
17 * Copyright (C) 2002 MandrakeSoft S.A.
18 *
19 * MandrakeSoft S.A.
20 * 43, rue d'Aboukir
21 * 75002 Paris - France
22 * http://www.linux-mandrake.com/
23 * http://www.mandrakesoft.com/
24 *
25 * This library is free software; you can redistribute it and/or
26 * modify it under the terms of the GNU Lesser General Public
27 * License as published by the Free Software Foundation; either
28 * version 2 of the License, or (at your option) any later version.
29 *
30 * This library is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
33 * Lesser General Public License for more details.
34 *
35 * You should have received a copy of the GNU Lesser General Public
36 * License along with this library; if not, write to the Free Software
37 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
38 *
39 */
40
41
42#define ATA_DATA_NO 0x00
43#define ATA_DATA_IN 0x01
44#define ATA_DATA_OUT 0x02
45
46#define ATA_IFACE_NONE 0x00
47#define ATA_IFACE_ISA 0x00
48#define ATA_IFACE_PCI 0x01
49
50#define ATA_MODE_NONE 0x00
51#define ATA_MODE_PIO16 0x00
52#if VBOX_BIOS_CPU >= 80386
53# define ATA_MODE_PIO32 0x01
54#endif
55#define ATA_MODE_ISADMA 0x02
56#define ATA_MODE_PCIDMA 0x03
57#define ATA_MODE_USEIRQ 0x10
58
59// Global defines -- ATA register and register bits.
60// command block & control block regs
61#define ATA_CB_DATA 0 // data reg in/out pio_base_addr1+0
62#define ATA_CB_ERR 1 // error in pio_base_addr1+1
63#define ATA_CB_FR 1 // feature reg out pio_base_addr1+1
64#define ATA_CB_SC 2 // sector count in/out pio_base_addr1+2
65#define ATA_CB_SN 3 // sector number in/out pio_base_addr1+3
66#define ATA_CB_CL 4 // cylinder low in/out pio_base_addr1+4
67#define ATA_CB_CH 5 // cylinder high in/out pio_base_addr1+5
68#define ATA_CB_DH 6 // device head in/out pio_base_addr1+6
69#define ATA_CB_STAT 7 // primary status in pio_base_addr1+7
70#define ATA_CB_CMD 7 // command out pio_base_addr1+7
71#define ATA_CB_ASTAT 6 // alternate status in pio_base_addr2+6
72#define ATA_CB_DC 6 // device control out pio_base_addr2+6
73#define ATA_CB_DA 7 // device address in pio_base_addr2+7
74
75#define ATA_CB_ER_ICRC 0x80 // ATA Ultra DMA bad CRC
76#define ATA_CB_ER_BBK 0x80 // ATA bad block
77#define ATA_CB_ER_UNC 0x40 // ATA uncorrected error
78#define ATA_CB_ER_MC 0x20 // ATA media change
79#define ATA_CB_ER_IDNF 0x10 // ATA id not found
80#define ATA_CB_ER_MCR 0x08 // ATA media change request
81#define ATA_CB_ER_ABRT 0x04 // ATA command aborted
82#define ATA_CB_ER_NTK0 0x02 // ATA track 0 not found
83#define ATA_CB_ER_NDAM 0x01 // ATA address mark not found
84
85#define ATA_CB_ER_P_SNSKEY 0xf0 // ATAPI sense key (mask)
86#define ATA_CB_ER_P_MCR 0x08 // ATAPI Media Change Request
87#define ATA_CB_ER_P_ABRT 0x04 // ATAPI command abort
88#define ATA_CB_ER_P_EOM 0x02 // ATAPI End of Media
89#define ATA_CB_ER_P_ILI 0x01 // ATAPI Illegal Length Indication
90
91// ATAPI Interrupt Reason bits in the Sector Count reg (CB_SC)
92#define ATA_CB_SC_P_TAG 0xf8 // ATAPI tag (mask)
93#define ATA_CB_SC_P_REL 0x04 // ATAPI release
94#define ATA_CB_SC_P_IO 0x02 // ATAPI I/O
95#define ATA_CB_SC_P_CD 0x01 // ATAPI C/D
96
97// bits 7-4 of the device/head (CB_DH) reg
98#define ATA_CB_DH_DEV0 0xa0 // select device 0
99#define ATA_CB_DH_DEV1 0xb0 // select device 1
100
101// status reg (CB_STAT and CB_ASTAT) bits
102#define ATA_CB_STAT_BSY 0x80 // busy
103#define ATA_CB_STAT_RDY 0x40 // ready
104#define ATA_CB_STAT_DF 0x20 // device fault
105#define ATA_CB_STAT_WFT 0x20 // write fault (old name)
106#define ATA_CB_STAT_SKC 0x10 // seek complete
107#define ATA_CB_STAT_SERV 0x10 // service
108#define ATA_CB_STAT_DRQ 0x08 // data request
109#define ATA_CB_STAT_CORR 0x04 // corrected
110#define ATA_CB_STAT_IDX 0x02 // index
111#define ATA_CB_STAT_ERR 0x01 // error (ATA)
112#define ATA_CB_STAT_CHK 0x01 // check (ATAPI)
113
114// device control reg (CB_DC) bits
115#define ATA_CB_DC_HD15 0x08 // bit should always be set to one
116#define ATA_CB_DC_SRST 0x04 // soft reset
117#define ATA_CB_DC_NIEN 0x02 // disable interrupts
118
119// Most mandatory and optional ATA commands (from ATA-3),
120#define ATA_CMD_CFA_ERASE_SECTORS 0xC0
121#define ATA_CMD_CFA_REQUEST_EXT_ERR_CODE 0x03
122#define ATA_CMD_CFA_TRANSLATE_SECTOR 0x87
123#define ATA_CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD
124#define ATA_CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38
125#define ATA_CMD_CHECK_POWER_MODE1 0xE5
126#define ATA_CMD_CHECK_POWER_MODE2 0x98
127#define ATA_CMD_DEVICE_RESET 0x08
128#define ATA_CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90
129#define ATA_CMD_FLUSH_CACHE 0xE7
130#define ATA_CMD_FORMAT_TRACK 0x50
131#define ATA_CMD_IDENTIFY_DEVICE 0xEC
132#define ATA_CMD_IDENTIFY_PACKET 0xA1
133#define ATA_CMD_IDLE1 0xE3
134#define ATA_CMD_IDLE2 0x97
135#define ATA_CMD_IDLE_IMMEDIATE1 0xE1
136#define ATA_CMD_IDLE_IMMEDIATE2 0x95
137#define ATA_CMD_INITIALIZE_DRIVE_PARAMETERS 0x91
138#define ATA_CMD_INITIALIZE_DEVICE_PARAMETERS 0x91
139#define ATA_CMD_NOP 0x00
140#define ATA_CMD_PACKET 0xA0
141#define ATA_CMD_READ_BUFFER 0xE4
142#define ATA_CMD_READ_DMA 0xC8
143#define ATA_CMD_READ_DMA_QUEUED 0xC7
144#define ATA_CMD_READ_MULTIPLE 0xC4
145#define ATA_CMD_READ_SECTORS 0x20
146#define ATA_CMD_READ_SECTORS_EXT 0x24
147#define ATA_CMD_READ_MULTIPLE_EXT 0x29
148#define ATA_CMD_WRITE_MULTIPLE_EXT 0x39
149#define ATA_CMD_READ_VERIFY_SECTORS 0x40
150#define ATA_CMD_RECALIBRATE 0x10
151#define ATA_CMD_SEEK 0x70
152#define ATA_CMD_SET_FEATURES 0xEF
153#define ATA_CMD_SET_MULTIPLE_MODE 0xC6
154#define ATA_CMD_SLEEP1 0xE6
155#define ATA_CMD_SLEEP2 0x99
156#define ATA_CMD_STANDBY1 0xE2
157#define ATA_CMD_STANDBY2 0x96
158#define ATA_CMD_STANDBY_IMMEDIATE1 0xE0
159#define ATA_CMD_STANDBY_IMMEDIATE2 0x94
160#define ATA_CMD_WRITE_BUFFER 0xE8
161#define ATA_CMD_WRITE_DMA 0xCA
162#define ATA_CMD_WRITE_DMA_QUEUED 0xCC
163#define ATA_CMD_WRITE_MULTIPLE 0xC5
164#define ATA_CMD_WRITE_SECTORS 0x30
165#define ATA_CMD_WRITE_SECTORS_EXT 0x34
166#define ATA_CMD_WRITE_VERIFY 0x3C
167
168// for access to the int13ext structure
169typedef struct {
170 uint8_t size;
171 uint8_t reserved;
172 uint16_t count;
173 uint16_t offset;
174 uint16_t segment;
175 uint32_t lba1;
176 uint32_t lba2;
177} int13ext_t;
178
179#define Int13Ext ((int13ext_t *) 0)
180
181// Disk Physical Table definition
182typedef struct {
183 uint16_t size;
184 uint16_t infos;
185 uint32_t cylinders;
186 uint32_t heads;
187 uint32_t spt;
188 uint32_t sector_count1;
189 uint32_t sector_count2;
190 uint16_t blksize;
191 uint16_t dpte_offset;
192 uint16_t dpte_segment;
193 uint16_t key;
194 uint8_t dpi_length;
195 uint8_t reserved1;
196 uint16_t reserved2;
197 uint8_t host_bus[4];
198 uint8_t iface_type[8];
199 uint8_t iface_path[8];
200 uint8_t device_path[8];
201 uint8_t reserved3;
202 uint8_t checksum;
203} dpt_t;
204
205#define Int13DPT ((dpt_t *) 0)
206
207extern void ata_reset(uint16_t device);
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