| 1 | /* $Id: DevEEPROM.h 56292 2015-06-09 14:20:46Z vboxsync $ */
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| 2 | /** @file
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| 3 | * DevEEPROM - Microware-compatible 64x16-bit 93C46 EEPROM Emulation, Header.
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| 4 | */
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| 5 |
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| 6 | /*
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| 7 | * Copyright (C) 2007-2015 Oracle Corporation
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| 8 | *
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| 9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | * available from http://www.virtualbox.org. This file is free software;
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| 11 | * you can redistribute it and/or modify it under the terms of the GNU
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| 12 | * General Public License (GPL) as published by the Free Software
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| 13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | */
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| 17 |
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| 18 | /* Interface */
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| 19 | #include <iprt/types.h>
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| 20 |
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| 21 | /** The current Saved state version. */
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| 22 | #define EEPROM93C46_SAVEDSTATE_VERSION 1
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| 23 |
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| 24 | /**
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| 25 | * 93C46-compatible EEPROM device emulation.
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| 26 | *
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| 27 | * @remarks This class is intended to be used in device
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| 28 | * emulation which imposes some restrictions if the
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| 29 | * device supports GC execution. This is why it is a
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| 30 | * plain-old-data structure.
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| 31 | */
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| 32 | struct EEPROM93C46
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| 33 | {
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| 34 | /** General definitions */
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| 35 | enum {
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| 36 | /** Size of EEPROM in words */
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| 37 | SIZE = 64,
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| 38 | /** Number of bits per word */
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| 39 | WORD_SIZE = 16,
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| 40 | /** Number of address bits */
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| 41 | ADDR_SIZE = 6,
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| 42 | /** Number of bits in opcode */
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| 43 | OPCODE_SIZE = 2,
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| 44 | /** The most significant bit mask in data word */
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| 45 | DATA_MSB = 1<<(WORD_SIZE-1),
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| 46 | /** Address mask */
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| 47 | ADDR_MASK = (1<<ADDR_SIZE)-1,
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| 48 | /** The most significant bit mask in op+addr bit sequence */
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| 49 | OPADDR_MSB = 1<<(OPCODE_SIZE+ADDR_SIZE-1)
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| 50 | };
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| 51 |
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| 52 | enum OP {
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| 53 | OP_READ,
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| 54 | OP_WRITE,
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| 55 | OP_WRITE_ALL,
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| 56 | OP_DECODE,
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| 57 | OP_32BIT_HACK = 0x7fffffff
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| 58 | };
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| 59 |
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| 60 | /**
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| 61 | * Names of signal wires
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| 62 | */
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| 63 | enum Wires {
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| 64 | WIRES_SK=0x1, ///< Clock
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| 65 | WIRES_CS=0x2, ///< Chip Select
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| 66 | WIRES_DI=0x4, ///< Data In
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| 67 | WIRES_DO=0x8 ///< Data Out
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| 68 | };
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| 69 |
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| 70 |
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| 71 | /** @todo save and load methods */
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| 72 | void save(PSSMHANDLE pSSM);
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| 73 | int load(PSSMHANDLE pSSM);
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| 74 |
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| 75 | /** Actual content of EEPROM */
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| 76 | uint16_t m_au16Data[SIZE];
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| 77 |
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| 78 | /** current state.
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| 79 | *
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| 80 | * EEPROM operates as a simple state machine. Events are primarily
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| 81 | * triggered at positive edge of clock signal (SK). Refer to the
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| 82 | * timing diagrams of 93C46 to get better understanding.
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| 83 | */
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| 84 | enum State {
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| 85 | /** Initial state. Waiting for start condition (CS, SK, DI high). */
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| 86 | STANDBY,
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| 87 | /** Reading data in, shifting in the bits into 'word'. */
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| 88 | READING_DI,
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| 89 | /** Writing data out, shifting out the bits from 'word'. */
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| 90 | WRITING_DO,
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| 91 | /** Waiting for CS=0 to indicate we are busy (DO=0). */
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| 92 | WAITING_CS_FALL,
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| 93 | /** Waiting for CS=1 to indicate we are ready (DO=1). */
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| 94 | WAITING_CS_RISE,
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| 95 | /** Make this enum 4-byte */
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| 96 | STATE_MAKE_32BIT_HACK = 0x7fffffff
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| 97 | } m_eState;
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| 98 | /** setting writeEnable to false prevents write and erase operations */
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| 99 | bool m_fWriteEnabled;
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| 100 | uint8_t Alignment1;
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| 101 | /** intermediate storage */
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| 102 | uint16_t m_u16Word;
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| 103 | /** currently processed bit in 'word' */
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| 104 | uint16_t m_u16Mask;
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| 105 | /** decoded address */
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| 106 | uint16_t m_u16Addr;
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| 107 | /** Data Out, Data In, Chip Select, Clock */
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| 108 | uint32_t m_u32InternalWires;
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| 109 |
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| 110 | /** Current opcode decoder. When no operation has been decoded yet
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| 111 | * it is set to OP_DECODE.
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| 112 | */
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| 113 | OP m_eOp;
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| 114 | #if HC_ARCH_BITS == 64
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| 115 | uint32_t Alignment2;
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| 116 | #endif
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| 117 |
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| 118 | #ifdef IN_RING3
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| 119 | uint32_t read();
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| 120 | void write(uint32_t u32Wires);
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| 121 | bool readWord(uint32_t u32Addr, uint16_t *pu16Value);
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| 122 |
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| 123 | void init(const uint16_t *pu16Initial = 0);
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| 124 |
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| 125 | // Operation handlers
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| 126 | State opDecode();
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| 127 | State opRead();
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| 128 | State opWrite();
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| 129 | State opWriteAll();
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| 130 |
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| 131 | /** Helper method to implement write protection */
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| 132 | void storeWord(uint32_t u32Addr, uint16_t u16Value);
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| 133 | #endif /* IN_RING3 */
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| 134 | };
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