VirtualBox

source: vbox/trunk/src/VBox/Devices/Network/DevEEPROM.h@ 34244

Last change on this file since 34244 was 28800, checked in by vboxsync, 15 years ago

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1/* $Id: DevEEPROM.h 28800 2010-04-27 08:22:32Z vboxsync $ */
2/** @file
3 * DevEEPROM - Microware-compatible 64x16-bit 93C46 EEPROM Emulation, Header.
4 */
5
6/*
7 * Copyright (C) 2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/* Interface */
19#include <iprt/types.h>
20
21/** The current Saved state version. */
22#define EEPROM93C46_SAVEDSTATE_VERSION 1
23
24/**
25 * 93C46-compatible EEPROM device emulation.
26 *
27 * @remarks This class is intended to be used in device
28 * emulation which imposes some restrictions if the
29 * device supports GC execution. This is why it is a
30 * plain-old-data structure.
31 */
32struct EEPROM93C46 {
33 /** General definitions */
34 enum {
35 /** Size of EEPROM in words */
36 SIZE = 64,
37 /** Number of bits per word */
38 WORD_SIZE = 16,
39 /** Number of address bits */
40 ADDR_SIZE = 6,
41 /** Number of bits in opcode */
42 OPCODE_SIZE = 2,
43 /** The most significant bit mask in data word */
44 DATA_MSB = 1<<(WORD_SIZE-1),
45 /** Address mask */
46 ADDR_MASK = (1<<ADDR_SIZE)-1,
47 /** The most significant bit mask in op+addr bit sequence */
48 OPADDR_MSB = 1<<(OPCODE_SIZE+ADDR_SIZE-1)
49 };
50
51 enum OP {
52 OP_READ,
53 OP_WRITE,
54 OP_WRITE_ALL,
55 OP_DECODE,
56 OP_32BIT_HACK = 0x7fffffff
57 };
58
59 /**
60 * Names of signal wires
61 */
62 enum Wires {
63 WIRES_SK=0x1, ///< Clock
64 WIRES_CS=0x2, ///< Chip Select
65 WIRES_DI=0x4, ///< Data In
66 WIRES_DO=0x8 ///< Data Out
67 };
68
69
70 /** @todo save and load methods */
71 void save(PSSMHANDLE pSSM);
72 int load(PSSMHANDLE pSSM);
73
74 /** Actual content of EEPROM */
75 uint16_t m_au16Data[SIZE];
76
77 /** current state.
78 *
79 * EEPROM operates as a simple state machine. Events are primarily
80 * triggered at positive edge of clock signal (SK). Refer to the
81 * timing diagrams of 93C46 to get better understanding.
82 */
83 enum State {
84 /** Initial state. Waiting for start condition (CS, SK, DI high). */
85 STANDBY,
86 /** Reading data in, shifting in the bits into 'word'. */
87 READING_DI,
88 /** Writing data out, shifting out the bits from 'word'. */
89 WRITING_DO,
90 /** Waiting for CS=0 to indicate we are busy (DO=0). */
91 WAITING_CS_FALL,
92 /** Waiting for CS=1 to indicate we are ready (DO=1). */
93 WAITING_CS_RISE,
94 /** Make this enum 4-byte */
95 STATE_MAKE_32BIT_HACK = 0x7fffffff
96 } m_eState;
97 /** setting writeEnable to false prevents write and erase operations */
98 bool m_fWriteEnabled;
99 uint8_t Alignment1;
100 /** intermediate storage */
101 uint16_t m_u16Word;
102 /** currently processed bit in 'word' */
103 uint16_t m_u16Mask;
104 /** decoded address */
105 uint16_t m_u16Addr;
106 /** Data Out, Data In, Chip Select, Clock */
107 uint32_t m_u32InternalWires;
108
109 /** Current opcode decoder. When no operation has been decoded yet
110 * it is set to OP_DECODE.
111 */
112 OP m_eOp;
113#if HC_ARCH_BITS == 64
114 uint32_t Alignment2;
115#endif
116
117#ifdef IN_RING3
118 uint32_t read();
119 void write(uint32_t u32Wires);
120 bool readWord(uint32_t u32Addr, uint16_t *pu16Value);
121
122 void init(const uint16_t *pu16Initial = 0);
123
124 // Operation handlers
125 State opDecode();
126 State opRead();
127 State opWrite();
128 State opWriteAll();
129
130 /** Helper method to implement write protection */
131 void storeWord(uint32_t u32Addr, uint16_t u16Value);
132#endif /* IN_RING3 */
133};
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