1 | /* $Id: DevEEPROM.cpp 98172 2023-01-21 13:01:48Z vboxsync $ */
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2 | /** @file
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3 | * DevEEPROM - Microwire-compatible 64x16-bit 93C46 EEPROM Emulation.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2007-2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 | #define LOG_GROUP LOG_GROUP_DEV_E1000 /// @todo Add a EEPROM logging group.
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29 | #include <VBox/log.h>
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30 | #include <VBox/vmm/pdmdev.h>
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31 | #include <iprt/string.h>
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32 | #include "DevEEPROM.h"
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33 |
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34 | #define E1kLog(a) Log(a)
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35 |
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36 | /**
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37 | * Initialize EEPROM device.
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38 | *
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39 | * @param pu16Initial Initial EEPROM content (optional). The size of initial
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40 | * content must be sizeof(uint16_t)*EEPROM93C46::SIZE
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41 | * bytes.
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42 | */
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43 | void EEPROM93C46::init(const uint16_t *pu16Initial)
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44 | {
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45 | if ( pu16Initial )
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46 | memcpy(this->m_au16Data, pu16Initial, sizeof(this->m_au16Data));
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47 | else
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48 | memset(this->m_au16Data, 0, sizeof(this->m_au16Data));
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49 | m_fWriteEnabled = false;
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50 | m_u32InternalWires = 0;
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51 | m_eState = STANDBY;
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52 | }
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53 |
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54 | /**
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55 | * Writes one word to specified location if write is enabled.
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56 | *
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57 | * @param u32Addr Address to write at
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58 | * @param u16Value Value to store
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59 | */
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60 | void EEPROM93C46::storeWord(uint32_t u32Addr, uint16_t u16Value)
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61 | {
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62 | if (m_fWriteEnabled) {
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63 | E1kLog(("EEPROM: Stored word %04x at %08x\n", u16Value, u32Addr));
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64 | m_au16Data[u32Addr] = u16Value;
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65 | }
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66 | m_u16Mask = DATA_MSB;
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67 | }
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68 |
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69 | /**
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70 | * Reads one word at specified location.
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71 | *
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72 | * @returns True if read was successful.
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73 | *
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74 | * @param u32Addr Address to read from
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75 | * @param pu16Value Placeholder to store the value
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76 | */
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77 | bool EEPROM93C46::readWord(uint32_t u32Addr, uint16_t *pu16Value)
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78 | {
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79 | if (u32Addr < SIZE)
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80 | {
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81 | *pu16Value = m_au16Data[u32Addr];
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82 | return true;
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83 | }
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84 |
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85 | return false;
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86 | }
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87 |
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88 | /**
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89 | * Fetch next word pointer by m_u16Addr.
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90 | *
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91 | * m_u16Addr is advanced and mask is reset to support sequential reads.
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92 | *
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93 | * @returns New state
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94 | */
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95 | EEPROM93C46::State EEPROM93C46::opRead()
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96 | {
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97 | m_u16Word = m_au16Data[m_u16Addr];
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98 | E1kLog(("EEPROM: Reading word %04x at %08x\n", m_u16Word, m_u16Addr));
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99 | m_u16Addr = (m_u16Addr + 1) & ADDR_MASK;
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100 | m_u16Mask = DATA_MSB;
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101 | return WRITING_DO;
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102 | }
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103 |
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104 | /**
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105 | * Write the value of m_u16Word to the location specified by m_u16Addr.
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106 | *
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107 | * @returns New state
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108 | *
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109 | * @remarks Need to wait for CS lower/raise to show busy/ready indication.
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110 | */
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111 | EEPROM93C46::State EEPROM93C46::opWrite()
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112 | {
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113 | storeWord(m_u16Addr, m_u16Word);
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114 | return WAITING_CS_FALL;
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115 | }
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116 |
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117 | /**
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118 | * Overwrite the entire contents of EEPROM with the value of m_u16Word.
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119 | *
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120 | * @returns New state
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121 | *
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122 | * @remarks Need to wait for CS lower/raise to show busy/ready indication.
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123 | */
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124 | EEPROM93C46::State EEPROM93C46::opWriteAll()
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125 | {
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126 | for (unsigned i = 0; i < SIZE; i++)
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127 | storeWord(i, m_u16Word);
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128 | return WAITING_CS_FALL;
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129 | }
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130 |
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131 | /**
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132 | * Decode opcode and address from 'opAddr' member.
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133 | *
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134 | * Decodes operation and executes it immediately if possible; otherwise, stores
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135 | * the decoded operation and address.
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136 | *
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137 | * @returns New state
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138 | */
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139 | EEPROM93C46::State EEPROM93C46::opDecode()
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140 | {
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141 | switch (m_u16Word>>6) {
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142 | case 3: /* ERASE */
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143 | storeWord(m_u16Word & ADDR_MASK, 0xFFFF);
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144 | return WAITING_CS_FALL;
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145 | case 2: /* READ */
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146 | m_eOp = OP_READ;
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147 | m_u16Addr = m_u16Word & ADDR_MASK;
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148 | return opRead(); /* Load first word */
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149 | case 1: /* WRITE */
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150 | m_eOp = OP_WRITE;
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151 | m_u16Addr = m_u16Word & ADDR_MASK;
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152 | m_u16Word = 0;
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153 | m_u16Mask = DATA_MSB;
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154 | return READING_DI;
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155 | case 0:
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156 | switch (m_u16Word>>4) {
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157 | case 0: /* ERASE/WRITE DISABLE */
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158 | m_fWriteEnabled = false;
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159 | return STANDBY;
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160 | case 1: /* WRITE ALL */
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161 | m_eOp = OP_WRITE_ALL;
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162 | m_u16Word = 0;
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163 | m_u16Mask = DATA_MSB;
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164 | return READING_DI;
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165 | case 2: /* ERASE ALL */
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166 | /* Re-use opWriteAll */
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167 | m_u16Word = 0xFFFF;
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168 | return opWriteAll();
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169 | case 3: /* ERASE/WRITE ENABLE */
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170 | m_fWriteEnabled = true;
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171 | return STANDBY;
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172 | }
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173 | }
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174 | return m_eState;
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175 | }
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176 |
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177 | /**
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178 | * Set bits in EEPROM 4-wire interface.
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179 | *
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180 | * @param u32Wires Values of DI, CS, SK.
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181 | * @remarks The value of DO bit in 'u32Wires' is ignored.
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182 | */
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183 | void EEPROM93C46::write(uint32_t u32Wires)
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184 | {
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185 | if (u32Wires & WIRES_CS) {
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186 | if (!(m_u32InternalWires & WIRES_SK) && (u32Wires & WIRES_SK)) {
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187 | /* Positive edge of clock */
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188 | if (m_eState == STANDBY) {
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189 | if (u32Wires & WIRES_DI) {
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190 | m_eState = READING_DI;
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191 | m_eOp = OP_DECODE;
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192 | m_u16Mask = OPADDR_MSB;
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193 | m_u16Word = 0;
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194 | }
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195 | }
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196 | else {
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197 | if (m_eState == READING_DI) {
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198 | if (u32Wires & WIRES_DI) {
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199 | m_u16Word |= m_u16Mask;
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200 | }
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201 | }
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202 | else if (m_eState == WRITING_DO) {
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203 | m_u32InternalWires &= ~WIRES_DO;
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204 | if (m_u16Word & m_u16Mask) {
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205 | m_u32InternalWires |= WIRES_DO;
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206 | }
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207 | }
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208 | else return;
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209 | /* Next bit */
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210 | m_u16Mask >>= 1;
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211 | if (m_u16Mask == 0)
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212 | {
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213 | switch (this->m_eOp)
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214 | {
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215 | case OP_READ:
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216 | m_eState = opRead();
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217 | break;
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218 | case OP_WRITE:
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219 | m_eState = opWrite();
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220 | break;
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221 | case OP_WRITE_ALL:
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222 | m_eState = opWriteAll();
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223 | break;
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224 | case OP_DECODE:
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225 | m_eState = opDecode();
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226 | break;
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227 | default:
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228 | ;
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229 | }
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230 | }
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231 | }
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232 | }
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233 | else if (m_eState == WAITING_CS_RISE) {
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234 | m_u32InternalWires |= WIRES_DO; /* ready */
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235 | m_eState = STANDBY;
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236 | }
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237 | }
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238 | else {
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239 | switch(m_eState) {
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240 | case WAITING_CS_FALL:
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241 | m_eState = WAITING_CS_RISE;
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242 | m_u32InternalWires &= ~WIRES_DO; /* busy */
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243 | break;
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244 | case WAITING_CS_RISE:
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245 | break;
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246 | case READING_DI:
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247 | m_u32InternalWires &= ~WIRES_DO; /* Clear ready/busy status from DO. */
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248 | RT_FALL_THRU();
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249 | default:
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250 | m_eState = STANDBY;
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251 | break;
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252 | }
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253 | }
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254 | m_u32InternalWires &= WIRES_DO;
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255 | m_u32InternalWires |= u32Wires & ~WIRES_DO; /* Do not overwrite DO */
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256 | }
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257 |
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258 | /**
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259 | * Read bits in EEPROM 4-wire interface.
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260 | *
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261 | * @returns Current values of DO, DI, CS, SK.
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262 | *
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263 | * @remarks Only DO is controlled by EEPROM, other bits are returned as they
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264 | * were written by 'write'.
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265 | */
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266 | uint32_t EEPROM93C46::read()
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267 | {
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268 | return m_u32InternalWires;
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269 | }
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270 |
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271 | void EEPROM93C46::save(PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
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272 | {
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273 | pHlp->pfnSSMPutU8( pSSM, EEPROM93C46_SAVEDSTATE_VERSION);
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274 | Assert((uint32_t)m_eState < UINT32_C(256));
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275 | pHlp->pfnSSMPutU8( pSSM, (uint8_t)m_eState);
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276 | Assert((uint32_t)m_eOp < UINT32_C(256));
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277 | pHlp->pfnSSMPutU8( pSSM, (uint8_t)m_eOp);
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278 | pHlp->pfnSSMPutBool(pSSM, m_fWriteEnabled);
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279 | pHlp->pfnSSMPutU32( pSSM, m_u32InternalWires);
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280 | pHlp->pfnSSMPutU16( pSSM, m_u16Word);
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281 | pHlp->pfnSSMPutU16( pSSM, m_u16Mask);
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282 | pHlp->pfnSSMPutU16( pSSM, m_u16Addr);
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283 | pHlp->pfnSSMPutMem( pSSM, m_au16Data, sizeof(m_au16Data));
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284 | }
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285 |
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286 | int EEPROM93C46::load(PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
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287 | {
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288 | uint8_t uVersion;
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289 | int rc = pHlp->pfnSSMGetU8(pSSM, &uVersion);
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290 | AssertRCReturn(rc, rc);
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291 | if (uVersion != EEPROM93C46_SAVEDSTATE_VERSION)
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292 | return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
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293 |
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294 | PDMDEVHLP_SSM_GET_ENUM8_RET(pHlp, pSSM, m_eState, EEPROM93C46::State);
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295 | PDMDEVHLP_SSM_GET_ENUM8_RET(pHlp, pSSM, m_eOp, EEPROM93C46::OP);
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296 | pHlp->pfnSSMGetBool(pSSM, &m_fWriteEnabled);
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297 | pHlp->pfnSSMGetU32( pSSM, &m_u32InternalWires);
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298 | pHlp->pfnSSMGetU16( pSSM, &m_u16Word);
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299 | pHlp->pfnSSMGetU16( pSSM, &m_u16Mask);
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300 | pHlp->pfnSSMGetU16( pSSM, &m_u16Addr);
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301 | return pHlp->pfnSSMGetMem( pSSM, m_au16Data, sizeof(m_au16Data));
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302 | }
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