VirtualBox

source: vbox/trunk/src/VBox/Devices/Network/DevE1000Phy.h@ 97441

Last change on this file since 97441 was 96407, checked in by vboxsync, 2 years ago

scm copyright and license note update

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1/** $Id: DevE1000Phy.h 96407 2022-08-22 17:43:14Z vboxsync $ */
2/** @file
3 * DevE1000Phy - Intel 82540EM Ethernet Controller Internal PHY Emulation, Header.
4 */
5
6/*
7 * Copyright (C) 2007-2022 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28#ifndef VBOX_INCLUDED_SRC_Network_DevE1000Phy_h
29#define VBOX_INCLUDED_SRC_Network_DevE1000Phy_h
30#ifndef RT_WITHOUT_PRAGMA_ONCE
31# pragma once
32#endif
33
34#include <VBox/types.h>
35
36#define PHY_EPID_M881000 0xC50
37#define PHY_EPID_M881011 0xC24
38
39#define PCTRL_SPDSELM 0x0040
40#define PCTRL_DUPMOD 0x0100
41#define PCTRL_ANEG 0x1000
42#define PCTRL_SPDSELL 0x2000
43#define PCTRL_RESET 0x8000
44
45#define PSTATUS_LNKSTAT 0x0004
46#define PSTATUS_NEGCOMP 0x0020
47
48/*
49 * Speed: 1000 Mb/s
50 * Duplex: full
51 * Page received
52 * Resolved
53 * Link up
54 * Receive Pause Enable
55 */
56#define PSSTAT_LINK_ALL 0xBC08
57#define PSSTAT_LINK 0x0400
58
59namespace Phy
60{
61 /**
62 * Indices of memory-mapped registers in register table
63 */
64 enum enmRegIdx
65 {
66 PCTRL_IDX,
67 PSTATUS_IDX,
68 PID_IDX,
69 EPID_IDX,
70 ANA_IDX,
71 LPA_IDX,
72 ANE_IDX,
73 NPT_IDX,
74 LPN_IDX,
75 GCON_IDX,
76 GSTATUS_IDX,
77 EPSTATUS_IDX,
78 PSCON_IDX,
79 PSSTAT_IDX,
80 PINTE_IDX,
81 PINTS_IDX,
82 EPSCON1_IDX,
83 PREC_IDX,
84 EPSCON2_IDX,
85 R30PS_IDX,
86 R30AW_IDX,
87 NUM_OF_PHY_REGS
88 };
89 /**
90 * Emulation state of PHY.
91 */
92 struct Phy_st
93 {
94 /** Network controller instance this PHY is attached to. */
95 int iInstance;
96 /** Register storage. */
97 uint16_t au16Regs[NUM_OF_PHY_REGS];
98 /** Current state of serial MDIO interface. */
99 uint16_t u16State;
100 /** Current state of serial MDIO interface. */
101 uint16_t u16Acc;
102 /** Number of bits remaining to be shifted into/out of accumulator. */
103 uint16_t u16Cnt;
104 /** PHY register offset selected for MDIO operation. */
105 uint16_t u16RegAdr;
106 };
107}
108
109#define MDIO_IDLE 0
110#define MDIO_ST 1
111#define MDIO_OP_ADR 2
112#define MDIO_TA_RD 3
113#define MDIO_TA_WR 4
114#define MDIO_READ 5
115#define MDIO_WRITE 6
116
117#define MDIO_READ_OP 2
118#define MDIO_WRITE_OP 1
119
120/* External callback declaration */
121void e1kPhyLinkResetCallback(PPDMDEVINS pDevIns);
122
123
124typedef struct Phy::Phy_st PHY;
125typedef PHY *PPHY;
126
127/* Interface *****************************************************************/
128namespace Phy
129{
130 /** Initialize PHY. */
131 void init(PPHY pPhy, int iNICInstance, uint16_t u16EPid);
132 /** Read PHY register at specified address. */
133 uint16_t readRegister(PPHY pPhy, uint32_t u32Address, PPDMDEVINS pDevIns);
134 /** Write to PHY register at specified address. */
135 void writeRegister(PPHY pPhy, uint32_t u32Address, uint16_t u16Value, PPDMDEVINS pDevIns);
136 /** Read the value on MDIO pin. */
137 bool readMDIO(PPHY pPhy);
138 /** Set the value of MDIO pin. */
139 void writeMDIO(PPHY pPhy, bool fPin, PPDMDEVINS pDevIns);
140 /** Hardware reset. */
141 void hardReset(PPHY pPhy);
142 /** Query link status. */
143 bool isLinkUp(PPHY pPhy);
144 /** Set link status. */
145 void setLinkStatus(PPHY pPhy, bool fLinkIsUp);
146 /** Save PHY state. */
147 int saveState(struct PDMDEVHLPR3 const *pHlp, PSSMHANDLE pSSM, PPHY pPhy);
148 /** Restore previously saved PHY state. */
149 int loadState(struct PDMDEVHLPR3 const *pHlp, PSSMHANDLE pSSM, PPHY pPhy);
150}
151
152#endif /* !VBOX_INCLUDED_SRC_Network_DevE1000Phy_h */
153
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