1 | /** $Id: DevE1000Phy.h 98103 2023-01-17 14:15:46Z vboxsync $ */
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2 | /** @file
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3 | * DevE1000Phy - Intel 82540EM Ethernet Controller Internal PHY Emulation, Header.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2007-2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 | #ifndef VBOX_INCLUDED_SRC_Network_DevE1000Phy_h
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29 | #define VBOX_INCLUDED_SRC_Network_DevE1000Phy_h
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30 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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31 | # pragma once
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32 | #endif
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33 |
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34 | #include <VBox/types.h>
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35 |
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36 | #define PHY_EPID_M881000 0xC50
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37 | #define PHY_EPID_M881011 0xC24
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38 |
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39 | #define PCTRL_SPDSELM 0x0040
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40 | #define PCTRL_DUPMOD 0x0100
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41 | #define PCTRL_ANEG 0x1000
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42 | #define PCTRL_SPDSELL 0x2000
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43 | #define PCTRL_RESET 0x8000
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44 |
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45 | #define PSTATUS_LNKSTAT 0x0004
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46 | #define PSTATUS_NEGCOMP 0x0020
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47 |
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48 | /*
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49 | * Speed: 1000 Mb/s
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50 | * Duplex: full
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51 | * Page received
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52 | * Resolved
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53 | * Link up
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54 | * Receive Pause Enable
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55 | */
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56 | #define PSSTAT_LINK_ALL 0xBC08
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57 | #define PSSTAT_LINK 0x0400
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58 |
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59 | namespace Phy
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60 | {
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61 | /**
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62 | * Indices of memory-mapped registers in register table
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63 | */
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64 | enum enmRegIdx
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65 | {
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66 | PCTRL_IDX,
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67 | PSTATUS_IDX,
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68 | PID_IDX,
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69 | EPID_IDX,
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70 | ANA_IDX,
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71 | LPA_IDX,
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72 | ANE_IDX,
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73 | NPT_IDX,
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74 | LPN_IDX,
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75 | GCON_IDX,
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76 | GSTATUS_IDX,
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77 | EPSTATUS_IDX,
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78 | PSCON_IDX,
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79 | PSSTAT_IDX,
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80 | PINTE_IDX,
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81 | PINTS_IDX,
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82 | EPSCON1_IDX,
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83 | PREC_IDX,
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84 | EPSCON2_IDX,
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85 | R30PS_IDX,
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86 | R30AW_IDX,
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87 | NUM_OF_PHY_REGS
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88 | };
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89 | /**
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90 | * Emulation state of PHY.
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91 | */
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92 | struct Phy_st
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93 | {
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94 | /** Network controller instance this PHY is attached to. */
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95 | int iInstance;
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96 | /** Register storage. */
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97 | uint16_t au16Regs[NUM_OF_PHY_REGS];
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98 | /** Current state of serial MDIO interface. */
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99 | uint16_t u16State;
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100 | /** Current state of serial MDIO interface. */
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101 | uint16_t u16Acc;
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102 | /** Number of bits remaining to be shifted into/out of accumulator. */
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103 | uint16_t u16Cnt;
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104 | /** PHY register offset selected for MDIO operation. */
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105 | uint16_t u16RegAdr;
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106 | };
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107 | }
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108 |
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109 | #define MDIO_IDLE 0
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110 | #define MDIO_ST 1
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111 | #define MDIO_OP_ADR 2
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112 | #define MDIO_TA_RD 3
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113 | #define MDIO_TA_WR 4
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114 | #define MDIO_READ 5
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115 | #define MDIO_WRITE 6
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116 |
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117 | #define MDIO_READ_OP 2
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118 | #define MDIO_WRITE_OP 1
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119 |
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120 | /* External callback declaration */
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121 | void e1kPhyLinkResetCallback(PPDMDEVINS pDevIns);
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122 |
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123 |
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124 | typedef struct Phy::Phy_st PHY;
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125 | typedef PHY *PPHY;
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126 |
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127 | /* Interface *****************************************************************/
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128 | namespace Phy
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129 | {
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130 | /** Initialize PHY. */
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131 | void init(PPHY pPhy, int iNICInstance, uint16_t u16EPid);
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132 | /** Read PHY register at specified address. */
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133 | uint16_t readRegister(PPHY pPhy, uint32_t u32Address, PPDMDEVINS pDevIns);
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134 | /** Write to PHY register at specified address. */
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135 | void writeRegister(PPHY pPhy, uint32_t u32Address, uint16_t u16Value, PPDMDEVINS pDevIns);
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136 | /** Read the value on MDIO pin. */
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137 | bool readMDIO(PPHY pPhy);
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138 | /** Set the value of MDIO pin. */
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139 | void writeMDIO(PPHY pPhy, bool fPin, PPDMDEVINS pDevIns);
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140 | /** Hardware reset. */
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141 | void hardReset(PPHY pPhy);
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142 | /** Query link status. */
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143 | bool isLinkUp(PPHY pPhy);
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144 | /** Set link status. */
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145 | void setLinkStatus(PPHY pPhy, bool fLinkIsUp);
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146 | /** Save PHY state. */
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147 | int saveState(struct PDMDEVHLPR3 const *pHlp, PSSMHANDLE pSSM, PPHY pPhy);
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148 | /** Restore previously saved PHY state. */
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149 | int loadState(struct PDMDEVHLPR3 const *pHlp, PSSMHANDLE pSSM, PPHY pPhy);
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150 | }
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151 |
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152 | #endif /* !VBOX_INCLUDED_SRC_Network_DevE1000Phy_h */
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153 |
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