DevVGA.h@ 94125

Last change on this file since 94125 was 93944, checked in by vboxsync, 3 years ago
Devices: Must not use PAGE_SIZE, PAGE_SHIFT, PAGE_OFFSET_MASK, PAGE_ADDRESS or PHYS_PAGE_ADDRESS here either. bugref:9898
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 29.7 KB

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1	/* $Id: DevVGA.h 93944 2022-02-24 21:15:14Z vboxsync $ */
2	/** @file
3	* DevVGA - VBox VGA/VESA device, internal header.
4	*/
5
6	/*
7	* Copyright (C) 2006-2022 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	* --------------------------------------------------------------------
17	*
18	* This code is based on:
19	*
20	* QEMU internal VGA defines.
21	*
22	* Copyright (c) 2003-2004 Fabrice Bellard
23	*
24	* Permission is hereby granted, free of charge, to any person obtaining a copy
25	* of this software and associated documentation files (the "Software"), to deal
26	* in the Software without restriction, including without limitation the rights
27	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28	* copies of the Software, and to permit persons to whom the Software is
29	* furnished to do so, subject to the following conditions:
30	*
31	* The above copyright notice and this permission notice shall be included in
32	* all copies or substantial portions of the Software.
33	*
34	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40	* THE SOFTWARE.
41	*/
42
43	#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_h
44	#define VBOX_INCLUDED_SRC_Graphics_DevVGA_h
45	#ifndef RT_WITHOUT_PRAGMA_ONCE
46	# pragma once
47	#endif
48
49	#include <VBoxVideoVBE.h>
50	#include <VBoxVideoVBEPrivate.h>
51
52	#ifdef VBOX_WITH_HGSMI
53	# include "HGSMI/HGSMIHost.h"
54	#endif /* VBOX_WITH_HGSMI */
55	#include "DevVGASavedState.h"
56
57	#ifdef VBOX_WITH_VMSVGA
58	# include "DevVGA-SVGA.h"
59	#endif
60
61	#include <iprt/list.h>
62
63
64	/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
65	#define VBE_BYTEWISE_IO
66
67	#ifdef VBOX
68	/** The default amount of VRAM. */
69	# define VGA_VRAM_DEFAULT (_4M)
70	/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
71	# define VGA_VRAM_MAX (256 * _1M)
72	/** The minimum amount of VRAM. */
73	# define VGA_VRAM_MIN (_1M)
74	#endif
75
76
77	/** @name Macros dealing with partial ring-0/raw-mode VRAM mappings.
78	* @{ */
79	/** The size of the VGA ring-0 and raw-mode mapping.
80	*
81	* This is supposed to be all the VGA memory accessible to the guest.
82	* The initial value was 256KB but NTAllInOne.iso appears to access more
83	* thus the limit was upped to 512KB.
84	*
85	* @todo Someone with some VGA knowhow should make a better guess at this value.
86	*/
87	#define VGA_MAPPING_SIZE _512K
88	/** Enables partially mapping the VRAM into ring-0 rather than using the ring-3.
89	* The VGA_MAPPING_SIZE define sets the number of bytes that will be mapped. */
90	#define VGA_WITH_PARTIAL_RING0_MAPPING
91
92	/**
93	* Check buffer if an VRAM offset is within the right range or not.
94	*/
95	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) \|\| (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
96	# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
97	do { \
98	if ((off) < VGA_MAPPING_SIZE) \
99	RT_UNTRUSTED_VALIDATED_FENCE(); \
100	else \
101	{ \
102	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
103	Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
104	return VINF_IOM_R3_MMIO_WRITE; \
105	} \
106	} while (0)
107	#else
108	# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
109	do { \
110	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
111	RT_UNTRUSTED_VALIDATED_FENCE(); \
112	} while (0)
113	#endif
114
115	/**
116	* Check buffer if an VRAM offset is within the right range or not.
117	*/
118	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) \|\| (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
119	# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
120	do { \
121	if ((off) < VGA_MAPPING_SIZE) \
122	RT_UNTRUSTED_VALIDATED_FENCE(); \
123	else \
124	{ \
125	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
126	Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
127	(rcVar) = VINF_IOM_R3_MMIO_READ; \
128	return 0; \
129	} \
130	} while (0)
131	#else
132	# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
133	do { \
134	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
135	RT_UNTRUSTED_VALIDATED_FENCE(); \
136	NOREF(rcVar); \
137	} while (0)
138	#endif
139	/** @} */
140
141
142	#define MSR_COLOR_EMULATION 0x01
143	#define MSR_PAGE_SELECT 0x20
144
145	#define ST01_V_RETRACE 0x08
146	#define ST01_DISP_ENABLE 0x01
147
148	/* bochs VBE support */
149	#define CONFIG_BOCHS_VBE
150
151	#ifdef CONFIG_BOCHS_VBE
152
153	/* Cross reference with <VBoxVideoVBE.h> */
154	#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
155	#define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
156
157	#define VGA_STATE_COMMON_BOCHS_VBE \
158	uint16_t vbe_index; \
159	uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
160	uint16_t alignment[2]; /* pad to 64 bits */ \
161	uint32_t vbe_start_addr; \
162	uint32_t vbe_line_offset; \
163	uint32_t vbe_bank_max;
164
165	#else
166
167	#define VGA_STATE_COMMON_BOCHS_VBE
168
169	#endif /* !CONFIG_BOCHS_VBE */
170
171	#define CH_ATTR_SIZE (160 * 100)
172	#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
173
174	typedef struct vga_retrace_s {
175	unsigned frame_cclks; /* Character clocks per frame. */
176	unsigned frame_ns; /* Frame duration in ns. */
177	unsigned cclk_ns; /* Character clock duration in ns. */
178	unsigned vb_start; /* Vertical blanking start (scanline). */
179	unsigned vb_end; /* Vertical blanking end (scanline). */
180	unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
181	unsigned vs_start; /* Vertical sync start (scanline). */
182	unsigned vs_end; /* Vertical sync end (scanline). */
183	unsigned vs_start_ns; /* Vertical sync start time in ns. */
184	unsigned vs_end_ns; /* Vertical sync end time in ns. */
185	unsigned h_total; /* Horizontal total (cclks per scanline). */
186	unsigned h_total_ns; /* Scanline duration in ns. */
187	unsigned hb_start; /* Horizontal blanking start (cclk). */
188	unsigned hb_end; /* Horizontal blanking end (cclk). */
189	unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
190	unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
191	} vga_retrace_s;
192
193	#ifndef VBOX
194	#define VGA_STATE_COMMON \
195	unsigned long vram_offset; \
196	unsigned int vram_size; \
197	uint32_t latch; \
198	uint8_t sr_index; \
199	uint8_t sr[256]; \
200	uint8_t gr_index; \
201	uint8_t gr[256]; \
202	uint8_t ar_index; \
203	uint8_t ar[21]; \
204	int ar_flip_flop; \
205	uint8_t cr_index; \
206	uint8_t cr[256]; /* CRT registers */ \
207	uint8_t msr; /* Misc Output Register */ \
208	uint8_t fcr; /* Feature Control Register */ \
209	uint8_t st00; /* status 0 */ \
210	uint8_t st01; /* status 1 */ \
211	uint8_t dac_state; \
212	uint8_t dac_sub_index; \
213	uint8_t dac_read_index; \
214	uint8_t dac_write_index; \
215	uint8_t dac_cache[3]; /* used when writing */ \
216	uint8_t palette[768]; \
217	int32_t bank_offset; \
218	int (get_bpp)(struct VGAState s); \
219	void (get_offsets)(struct VGAState s, \
220	uint32_t *pline_offset, \
221	uint32_t *pstart_addr, \
222	uint32_t *pline_compare); \
223	void (get_resolution)(struct VGAState s, \
224	int *pwidth, \
225	int *pheight); \
226	VGA_STATE_COMMON_BOCHS_VBE \
227	/* display refresh support */ \
228	DisplayState *ds; \
229	uint32_t font_offsets[2]; \
230	int graphic_mode; \
231	uint8_t shift_control; \
232	uint8_t double_scan; \
233	uint32_t line_offset; \
234	uint32_t line_compare; \
235	uint32_t start_addr; \
236	uint32_t plane_updated; \
237	uint8_t last_cw, last_ch; \
238	uint32_t last_width, last_height; /* in chars or pixels */ \
239	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
240	uint8_t cursor_start, cursor_end; \
241	uint32_t cursor_offset; \
242	unsigned int (*rgb_to_pixel)(unsigned int r, \
243	unsigned int g, unsigned b); \
244	/* hardware mouse cursor support */ \
245	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
246	void (cursor_invalidate)(struct VGAState s); \
247	void (cursor_draw_line)(struct VGAState s, uint8_t *d, int y); \
248	/* tell for each page if it has been updated since the last time */ \
249	uint32_t last_palette[256]; \
250	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
251
252	#else /* VBOX */
253
254	/* bird: Since we've changed types, reordered members, done alignment
255	paddings and more, VGA_STATE_COMMON was added directly to the
256	struct to make it more readable and easier to handle. */
257
258	struct VGAState;
259	typedef int FNGETBPP(struct VGAState *s);
260	typedef void FNGETOFFSETS(struct VGAState s, uint32_t pline_offset, uint32_t pstart_addr, uint32_t pline_compare);
261	typedef void FNGETRESOLUTION(struct VGAState s, int pwidth, int *pheight);
262	typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
263	typedef void FNCURSORINVALIDATE(struct VGAState *s);
264	typedef void FNCURSORDRAWLINE(struct VGAState s, uint8_t d, int y);
265
266	#endif /* VBOX */
267
268	#ifdef VBOX_WITH_VDMA
269	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
270	#endif
271
272	#ifdef VBOX_WITH_VIDEOHWACCEL
273	#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
274
275	typedef struct _VBOX_VHWA_PENDINGCMD
276	{
277	RTLISTNODE Node;
278	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
279	} VBOX_VHWA_PENDINGCMD;
280	#endif
281
282
283	/**
284	* The shared VGA state data.
285	*/
286	typedef struct VGAState
287	{
288	uint32_t vram_size;
289	uint32_t latch;
290	uint8_t sr_index;
291	uint8_t sr[256];
292	uint8_t gr_index;
293	uint8_t gr[256];
294	uint8_t ar_index;
295	uint8_t ar[21];
296	int32_t ar_flip_flop;
297	uint8_t cr_index;
298	uint8_t cr[256]; /* CRT registers */
299	uint8_t msr; /* Misc Output Register */
300	uint8_t fcr; /* Feature Control Register */
301	uint8_t st00; /* status 0 */
302	uint8_t st01; /* status 1 */
303	uint8_t dac_state;
304	uint8_t dac_sub_index;
305	uint8_t dac_read_index;
306	uint8_t dac_write_index;
307	uint8_t dac_cache[3]; /* used when writing */
308	uint8_t palette[768];
309	int32_t bank_offset;
310	VGA_STATE_COMMON_BOCHS_VBE
311	/* display refresh support */
312	uint32_t font_offsets[2];
313	int32_t graphic_mode;
314	uint8_t shift_control;
315	uint8_t double_scan;
316	uint8_t padding1[2];
317	uint32_t line_offset;
318	uint32_t vga_addr_mask;
319	uint32_t padding1a;
320	uint32_t line_compare;
321	uint32_t start_addr;
322	uint32_t plane_updated;
323	uint8_t last_cw, last_ch;
324	uint8_t last_uline; \
325	bool last_blink; \
326	uint32_t last_width, last_height; /* in chars or pixels */
327	uint32_t last_scr_width, last_scr_height; /* in pixels */
328	uint32_t last_bpp;
329	uint8_t cursor_start, cursor_end;
330	bool last_cur_blink, last_chr_blink;
331	uint32_t cursor_offset;
332	/** hardware mouse cursor support */
333	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
334	/** tell for each page if it has been updated since the last time */
335	uint32_t last_palette[256];
336	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
337
338	/** end-of-common-state-marker */
339	uint32_t u32Marker;
340
341	/** Refresh timer handle - HC. */
342	TMTIMERHANDLE hRefreshTimer;
343
344	#ifdef VBOX_WITH_VMSVGA
345	VMSVGASTATE svga;
346	#endif
347
348	/** The number of monitors. */
349	uint32_t cMonitors;
350	/** Current refresh timer interval. */
351	uint32_t cMilliesRefreshInterval;
352	/** Bitmap tracking dirty pages. */
353	uint64_t bmDirtyBitmap[VGA_VRAM_MAX / GUEST_PAGE_SIZE / 64];
354
355	/** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
356	bool fHasDirtyBits;
357	/** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
358	bool fRemappedVGA;
359	/** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
360	bool fRenderVRAM;
361	/** Whether 3D is enabled for the VM. */
362	bool f3DEnabled;
363	/** Set if state has been restored. */
364	bool fStateLoaded;
365	#ifdef VBOX_WITH_VMSVGA
366	/* Whether the SVGA emulation is enabled or not. */
367	bool fVMSVGAEnabled;
368	bool fVMSVGA10;
369	bool fVMSVGAPciId;
370	bool fVMSVGAPciBarLayout;
371	bool Padding4[3];
372	#else
373	bool Padding4[4+3];
374	#endif
375
376	struct {
377	uint32_t u32Padding1;
378	uint32_t iVRAM;
379	#ifdef VBOX_WITH_VMSVGA
380	uint32_t iIO;
381	uint32_t iFIFO;
382	#endif
383	} pciRegions;
384
385	/** The physical address the VRAM was assigned. */
386	RTGCPHYS GCPhysVRAM;
387	/** The critical section protect the instance data. */
388	PDMCRITSECT CritSect;
389
390	/* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
391	uint64_t u64LastLatchedAccess;
392	uint32_t cLatchAccesses;
393	uint16_t uMaskLatchAccess;
394	uint16_t iMask;
395
396	#ifdef VBE_BYTEWISE_IO
397	/** VBE read/write data/index flags */
398	uint8_t fReadVBEData;
399	uint8_t fWriteVBEData;
400	uint8_t fReadVBEIndex;
401	uint8_t fWriteVBEIndex;
402	/** VBE write data/index one byte buffer */
403	uint8_t cbWriteVBEData;
404	uint8_t cbWriteVBEIndex;
405	/** VBE Extra Data write address one byte buffer */
406	uint8_t cbWriteVBEExtraAddress;
407	uint8_t Padding5;
408	#endif
409
410	/** Retrace emulation state */
411	bool fRealRetrace;
412	bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
413	vga_retrace_s retrace_state;
414
415	#ifdef VBOX_WITH_HGSMI
416	/** Base port in the assigned PCI I/O space. */
417	RTIOPORT IOPortBase;
418	# ifdef VBOX_WITH_WDDM
419	uint8_t Padding10[2];
420	/** Specifies guest driver caps, i.e. whether it can handle IRQs from the
421	* adapter, the way it can handle async HGSMI command completion, etc. */
422	uint32_t fGuestCaps;
423	uint32_t fScanLineCfg;
424	uint32_t Padding11;
425	# else
426	uint8_t Padding11[14];
427	# endif
428
429	/** The critical section serializes the HGSMI IRQ setting/clearing. */
430	PDMCRITSECT CritSectIRQ;
431	/** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
432	uint32_t fu32PendingGuestFlags;
433	uint32_t Padding12;
434	#endif /* VBOX_WITH_HGSMI */
435
436	PDMLED Led3D;
437
438	struct {
439	volatile uint32_t cPending;
440	uint32_t Padding1;
441	union
442	{
443	RTLISTNODE PendingList;
444	/* make sure the structure sized cross different contexts correctly */
445	struct
446	{
447	R3PTRTYPE(void *) dummy1;
448	R3PTRTYPE(void *) dummy2;
449	} dummy;
450	};
451	} pendingVhwaCommands;
452
453	/** The MMIO handle of the legacy graphics buffer/regs at 0xa0000-0xbffff. */
454	PGMMMIO2HANDLE hMmioLegacy;
455
456	/** @name I/O ports for range 0x3c0-3cf.
457	* @{ */
458	IOMIOPORTHANDLE hIoPortAr;
459	IOMIOPORTHANDLE hIoPortMsrSt00;
460	IOMIOPORTHANDLE hIoPort3c3;
461	IOMIOPORTHANDLE hIoPortSr;
462	IOMIOPORTHANDLE hIoPortDac;
463	IOMIOPORTHANDLE hIoPortPos;
464	IOMIOPORTHANDLE hIoPortGr;
465	/** @} */
466
467	/** @name I/O ports for MDA 0x3b0-0x3bf (sparse)
468	* @{ */
469	IOMIOPORTHANDLE hIoPortMdaCrt;
470	IOMIOPORTHANDLE hIoPortMdaFcrSt;
471	/** @} */
472
473	/** @name I/O ports for CGA 0x3d0-0x3df (sparse)
474	* @{ */
475	IOMIOPORTHANDLE hIoPortCgaCrt;
476	IOMIOPORTHANDLE hIoPortCgaFcrSt;
477	/** @} */
478
479	#ifdef VBOX_WITH_HGSMI
480	/** @name I/O ports for HGSMI 0x3b0-03b3 and 0x3d0-03d3 (ring-3 only)
481	* @{ */
482	IOMIOPORTHANDLE hIoPortHgsmiHost;
483	IOMIOPORTHANDLE hIoPortHgsmiGuest;
484	/** @} */
485	#endif
486
487	/** @name I/O ports for Boch VBE 0x1ce-0x1cf
488	* @{ */
489	IOMIOPORTHANDLE hIoPortVbeIndex;
490	IOMIOPORTHANDLE hIoPortVbeData;
491	/** @} */
492
493	/** The BIOS printf I/O port. */
494	IOMIOPORTHANDLE hIoPortBios;
495	/** The VBE extra data I/O port. */
496	IOMIOPORTHANDLE hIoPortVbeExtra;
497	/** The logo command I/O port. */
498	IOMIOPORTHANDLE hIoPortCmdLogo;
499
500	#ifdef VBOX_WITH_VMSVGA
501	/** VMSVGA: I/O port PCI region. */
502	IOMIOPORTHANDLE hIoPortVmSvga;
503	/** VMSVGA: The MMIO2 handle of the FIFO PCI region. */
504	PGMMMIO2HANDLE hMmio2VmSvgaFifo;
505	#endif
506	/** The MMIO2 handle of the VRAM. */
507	PGMMMIO2HANDLE hMmio2VRam;
508
509	STAMPROFILE StatRZMemoryRead;
510	STAMPROFILE StatR3MemoryRead;
511	STAMPROFILE StatRZMemoryWrite;
512	STAMPROFILE StatR3MemoryWrite;
513	STAMCOUNTER StatMapPage; /*< Counts IOMMMIOMapMMIO2Page calls. /
514	STAMCOUNTER StatUpdateDisp; /*< Counts vgaPortUpdateDisplay calls. /
515	#ifdef VBOX_WITH_HGSMI
516	STAMCOUNTER StatHgsmiMdaCgaAccesses;
517	#endif
518	} VGAState;
519	#ifdef VBOX
520	/** VGA state. */
521	typedef VGAState VGASTATE;
522	/** Pointer to the VGA state. */
523	typedef VGASTATE *PVGASTATE;
524	AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
525	AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
526	AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
527	AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
528	#endif
529
530
531	/**
532	* The VGA state data for ring-3 context.
533	*/
534	typedef struct VGASTATER3
535	{
536	R3PTRTYPE(uint8_t *) pbVRam;
537	R3PTRTYPE(FNGETBPP *) get_bpp;
538	R3PTRTYPE(FNGETOFFSETS *) get_offsets;
539	R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
540	R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
541	R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
542	R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
543
544	/** Pointer to the device instance.
545	* @note Only for getting our bearings in interface methods. */
546	PPDMDEVINSR3 pDevIns;
547	#ifdef VBOX_WITH_HGSMI
548	R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
549	#endif
550	#ifdef VBOX_WITH_VDMA
551	R3PTRTYPE(PVBOXVDMAHOST) pVdma;
552	#endif
553
554	/** LUN\#0: The display port base interface. */
555	PDMIBASE IBase;
556	/** LUN\#0: The display port interface. */
557	PDMIDISPLAYPORT IPort;
558	#ifdef VBOX_WITH_HGSMI
559	/** LUN\#0: VBVA callbacks interface */
560	PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
561	#endif
562	/** Status LUN: Leds interface. */
563	PDMILEDPORTS ILeds;
564
565	/** Pointer to base interface of the driver. */
566	R3PTRTYPE(PPDMIBASE) pDrvBase;
567	/** Pointer to display connector interface of the driver. */
568	R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
569
570	/** Status LUN: Partner of ILeds. */
571	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
572
573	#ifdef VBOX_WITH_VMSVGA
574	/** The VMSVGA ring-3 state. */
575	VMSVGASTATER3 svga;
576	#endif
577
578	/** The VGA BIOS ROM data. */
579	R3PTRTYPE(uint8_t *) pbVgaBios;
580	/** The size of the VGA BIOS ROM. */
581	uint64_t cbVgaBios;
582	/** The name of the VGA BIOS ROM file. */
583	R3PTRTYPE(char *) pszVgaBiosFile;
584
585	/** @name Logo data
586	* @{ */
587	/** Current logo data offset. */
588	uint32_t offLogoData;
589	/** The size of the BIOS logo data. */
590	uint32_t cbLogo;
591	/** Current logo command. */
592	uint16_t LogoCommand;
593	/** Bitmap width. */
594	uint16_t cxLogo;
595	/** Bitmap height. */
596	uint16_t cyLogo;
597	/** Bitmap planes. */
598	uint16_t cLogoPlanes;
599	/** Bitmap depth. */
600	uint16_t cLogoBits;
601	/** Bitmap compression. */
602	uint16_t LogoCompression;
603	/** Bitmap colors used. */
604	uint16_t cLogoUsedColors;
605	/** Palette size. */
606	uint16_t cLogoPalEntries;
607	/** Clear screen flag. */
608	uint8_t fLogoClearScreen;
609	bool fBootMenuInverse;
610	uint8_t Padding8[6];
611	/** Palette data. */
612	uint32_t au32LogoPalette[256];
613	/** The BIOS logo data. */
614	R3PTRTYPE(uint8_t *) pbLogo;
615	/** The name of the logo file. */
616	R3PTRTYPE(char *) pszLogoFile;
617	/** Bitmap image data. */
618	R3PTRTYPE(uint8_t *) pbLogoBitmap;
619	/** @} */
620
621	/** @name VBE extra data (modes)
622	* @{ */
623	/** The VBE BIOS extra data. */
624	R3PTRTYPE(uint8_t *) pbVBEExtraData;
625	/** The size of the VBE BIOS extra data. */
626	uint16_t cbVBEExtraData;
627	/** The VBE BIOS current memory address. */
628	uint16_t u16VBEExtraAddress;
629	uint16_t Padding7[2];
630	/** @} */
631
632	} VGASTATER3;
633	/** Pointer to the ring-3 VGA state. */
634	typedef VGASTATER3 *PVGASTATER3;
635
636
637	/**
638	* The VGA state data for ring-0 context.
639	*/
640	typedef struct VGASTATER0
641	{
642	/** The R0 vram pointer. */
643	R0PTRTYPE(uint8_t *) pbVRam;
644	#ifdef VBOX_WITH_VMSVGA
645	/** The VMSVGA ring-0 state. */
646	VMSVGASTATER0 svga;
647	#endif
648	} VGASTATER0;
649	/** Pointer to the ring-0 VGA state. */
650	typedef VGASTATER0 *PVGASTATER0;
651
652
653	/**
654	* The VGA state data for raw-mode context.
655	*/
656	typedef struct VGASTATERC
657	{
658	/** Pointer to the RC vram mapping. */
659	RCPTRTYPE(uint8_t *) pbVRam;
660	} VGASTATERC;
661	/** Pointer to the raw-mode VGA state. */
662	typedef VGASTATERC *PVGASTATERC;
663
664
665	/** The VGA state for the current context. */
666	typedef CTX_SUFF(VGASTATE) VGASTATECC;
667	/** Pointer to the VGA state for the current context. */
668	typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
669
670
671
672	/** VBE Extra Data. */
673	typedef VBEHeader VBEHEADER;
674	/** Pointer to the VBE Extra Data. */
675	typedef VBEHEADER *PVBEHEADER;
676
677	#if !defined(VBOX) \|\| defined(IN_RING3)
678	static inline int c6_to_8(int v)
679	{
680	int b;
681	v &= 0x3f;
682	b = v & 1;
683	return (v << 2) \| (b << 1) \| b;
684	}
685	#endif /* !VBOX \|\| IN_RING3 */
686
687
688	#ifdef VBOX_WITH_HGSMI
689	int VBVAInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
690	void VBVADestroy(PVGASTATECC pThisCC);
691	int VBVAUpdateDisplay(PVGASTATE pThis, PVGASTATECC pThisCC);
692	void VBVAReset(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
693	void VBVAOnVBEChanged(PVGASTATE pThis, PVGASTATECC pThisCC);
694	void VBVAOnResume(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
695
696	bool VBVAIsPaused(PVGASTATECC pThisCC);
697	#ifdef UNUSED_FUNCTION
698	bool VBVAIsEnabled(PVGASTATECC pThisCC);
699	#endif
700
701	void VBVARaiseIrq(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t fFlags);
702
703	int VBVAInfoScreen(PVGASTATE pThis, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
704	#ifdef UNUSED_FUNCTION
705	int VBVAGetInfoViewAndScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t u32ViewIndex,
706	VBVAINFOVIEW pView, VBVAINFOSCREEN pScreen);
707	#endif
708
709	/* @return host-guest flags that were set on reset
710	* this allows the caller to make further cleaning when needed,
711	* e.g. reset the IRQ */
712	uint32_t HGSMIReset(PHGSMIINSTANCE pIns);
713
714	# ifdef VBOX_WITH_VIDEOHWACCEL
715	DECLCALLBACK(int) vbvaR3VHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
716	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
717	int vbvaVHWAConstruct(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
718
719	void vbvaTimerCb(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
720
721	int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
722	int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
723	# endif
724
725	int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
726	int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
727	int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
728
729	DECLCALLBACK(int) vbvaR3PortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx, uint32_t cy, uint32_t cBPP,
730	uint32_t cDisplay, uint32_t dx, uint32_t dy, uint32_t fEnabled, uint32_t fNotifyGuest);
731
732	# ifdef VBOX_WITH_VDMA
733	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
734	int vboxVDMAConstruct(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cPipeElements);
735	void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
736	void vboxVDMAReset(PVBOXVDMAHOST pVdma);
737	void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
738	void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
739	int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
740	int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
741	int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
742	int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
743	int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
744	# endif /* VBOX_WITH_VDMA */
745
746	#endif /* VBOX_WITH_HGSMI */
747
748	# ifdef VBOX_WITH_VMSVGA
749	int vgaR3UnregisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis);
750	int vgaR3RegisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis, uint64_t cbFrameBuffer);
751	int vgaR3UpdateDisplay(PVGASTATE pThis, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
752	# endif
753
754	#ifndef VBOX
755	void vga_common_init(VGAState s, DisplayState ds, uint8_t *vga_ram_base,
756	unsigned long vga_ram_offset, int vga_ram_size);
757	uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
758	void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
759	void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
760
761	void vga_draw_cursor_line_8(uint8_t d1, const uint8_t src1,
762	int poffset, int w,
763	unsigned int color0, unsigned int color1,
764	unsigned int color_xor);
765	void vga_draw_cursor_line_16(uint8_t d1, const uint8_t src1,
766	int poffset, int w,
767	unsigned int color0, unsigned int color1,
768	unsigned int color_xor);
769	void vga_draw_cursor_line_32(uint8_t d1, const uint8_t src1,
770	int poffset, int w,
771	unsigned int color0, unsigned int color1,
772	unsigned int color_xor);
773
774	extern const uint8_t sr_mask[8];
775	extern const uint8_t gr_mask[16];
776	#endif /* !VBOX */
777
778	#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_h */
779

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 94125

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