DevVGA.h@ 55909

Last change on this file since 55909 was 55844, checked in by vboxsync, 10 years ago
DevVGA: screen resize cleanup, logging
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1	/* $Id: DevVGA.h 55844 2015-05-13 12:46:52Z vboxsync $ */
2	/** @file
3	* DevVGA - VBox VGA/VESA device, internal header.
4	*/
5
6	/*
7	* Copyright (C) 2006-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	* --------------------------------------------------------------------
17	*
18	* This code is based on:
19	*
20	* QEMU internal VGA defines.
21	*
22	* Copyright (c) 2003-2004 Fabrice Bellard
23	*
24	* Permission is hereby granted, free of charge, to any person obtaining a copy
25	* of this software and associated documentation files (the "Software"), to deal
26	* in the Software without restriction, including without limitation the rights
27	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28	* copies of the Software, and to permit persons to whom the Software is
29	* furnished to do so, subject to the following conditions:
30	*
31	* The above copyright notice and this permission notice shall be included in
32	* all copies or substantial portions of the Software.
33	*
34	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40	* THE SOFTWARE.
41	*/
42
43	/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
44	#define VBE_BYTEWISE_IO
45
46	/** Use VBE new dynamic mode list.
47	* If this is not defined, no checks are carried out to see if the modes all
48	* fit into the framebuffer! See the VRAM_SIZE_FIX define. */
49	#define VBE_NEW_DYN_LIST
50
51	#ifdef VBOX
52	/** The default amount of VRAM. */
53	# define VGA_VRAM_DEFAULT (_4M)
54	/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
55	# define VGA_VRAM_MAX (256 * _1M)
56	/** The minimum amount of VRAM. */
57	# define VGA_VRAM_MIN (_1M)
58	#endif
59
60	#include <VBox/Hardware/VBoxVideoVBE.h>
61
62	#ifdef VBOX_WITH_HGSMI
63	# include "HGSMI/HGSMIHost.h"
64	#endif /* VBOX_WITH_HGSMI */
65	#include "DevVGASavedState.h"
66
67	#ifdef VBOX_WITH_VMSVGA
68	# include "DevVGA-SVGA.h"
69	#endif
70
71	# include <iprt/list.h>
72
73	#define MSR_COLOR_EMULATION 0x01
74	#define MSR_PAGE_SELECT 0x20
75
76	#define ST01_V_RETRACE 0x08
77	#define ST01_DISP_ENABLE 0x01
78
79	/* bochs VBE support */
80	#define CONFIG_BOCHS_VBE
81
82	#ifdef CONFIG_BOCHS_VBE
83
84	/* Cross reference with <VBox/Hardware/VBoxVideoVBE.h> */
85	#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Number of saved registers (vbe_regs array) */
86	#define VBE_DISPI_INDEX_NB 0xc /* Total number of VBE registers */
87
88	#define VGA_STATE_COMMON_BOCHS_VBE \
89	uint16_t vbe_index; \
90	uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
91	uint16_t alignment[3]; /* pad to 64 bits */ \
92	uint32_t vbe_start_addr; \
93	uint32_t vbe_line_offset; \
94	uint32_t vbe_bank_max;
95
96	#else
97
98	#define VGA_STATE_COMMON_BOCHS_VBE
99
100	#endif /* !CONFIG_BOCHS_VBE */
101
102	#define CH_ATTR_SIZE (160 * 100)
103	#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
104
105	typedef struct vga_retrace_s {
106	unsigned frame_cclks; /* Character clocks per frame. */
107	unsigned frame_ns; /* Frame duration in ns. */
108	unsigned cclk_ns; /* Character clock duration in ns. */
109	unsigned vb_start; /* Vertical blanking start (scanline). */
110	unsigned vb_end; /* Vertical blanking end (scanline). */
111	unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
112	unsigned vs_start; /* Vertical sync start (scanline). */
113	unsigned vs_end; /* Vertical sync end (scanline). */
114	unsigned vs_start_ns; /* Vertical sync start time in ns. */
115	unsigned vs_end_ns; /* Vertical sync end time in ns. */
116	unsigned h_total; /* Horizontal total (cclks per scanline). */
117	unsigned h_total_ns; /* Scanline duration in ns. */
118	unsigned hb_start; /* Horizontal blanking start (cclk). */
119	unsigned hb_end; /* Horizontal blanking end (cclk). */
120	unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
121	unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
122	} vga_retrace_s;
123
124	#ifndef VBOX
125	#define VGA_STATE_COMMON \
126	uint8_t *vram_ptr; \
127	unsigned long vram_offset; \
128	unsigned int vram_size; \
129	uint32_t latch; \
130	uint8_t sr_index; \
131	uint8_t sr[256]; \
132	uint8_t gr_index; \
133	uint8_t gr[256]; \
134	uint8_t ar_index; \
135	uint8_t ar[21]; \
136	int ar_flip_flop; \
137	uint8_t cr_index; \
138	uint8_t cr[256]; /* CRT registers */ \
139	uint8_t msr; /* Misc Output Register */ \
140	uint8_t fcr; /* Feature Control Register */ \
141	uint8_t st00; /* status 0 */ \
142	uint8_t st01; /* status 1 */ \
143	uint8_t dac_state; \
144	uint8_t dac_sub_index; \
145	uint8_t dac_read_index; \
146	uint8_t dac_write_index; \
147	uint8_t dac_cache[3]; /* used when writing */ \
148	uint8_t palette[768]; \
149	int32_t bank_offset; \
150	int (get_bpp)(struct VGAState s); \
151	void (get_offsets)(struct VGAState s, \
152	uint32_t *pline_offset, \
153	uint32_t *pstart_addr, \
154	uint32_t *pline_compare); \
155	void (get_resolution)(struct VGAState s, \
156	int *pwidth, \
157	int *pheight); \
158	VGA_STATE_COMMON_BOCHS_VBE \
159	/* display refresh support */ \
160	DisplayState *ds; \
161	uint32_t font_offsets[2]; \
162	int graphic_mode; \
163	uint8_t shift_control; \
164	uint8_t double_scan; \
165	uint32_t line_offset; \
166	uint32_t line_compare; \
167	uint32_t start_addr; \
168	uint32_t plane_updated; \
169	uint8_t last_cw, last_ch; \
170	uint32_t last_width, last_height; /* in chars or pixels */ \
171	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
172	uint8_t cursor_start, cursor_end; \
173	uint32_t cursor_offset; \
174	unsigned int (*rgb_to_pixel)(unsigned int r, \
175	unsigned int g, unsigned b); \
176	/* hardware mouse cursor support */ \
177	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
178	void (cursor_invalidate)(struct VGAState s); \
179	void (cursor_draw_line)(struct VGAState s, uint8_t *d, int y); \
180	/* tell for each page if it has been updated since the last time */ \
181	uint32_t last_palette[256]; \
182	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
183
184	#else /* VBOX */
185
186	/* bird: Since we've changed types, reordered members, done alignment
187	paddings and more, VGA_STATE_COMMON was added directly to the
188	struct to make it more readable and easier to handle. */
189
190	struct VGAState;
191	typedef int FNGETBPP(struct VGAState *s);
192	typedef void FNGETOFFSETS(struct VGAState s, uint32_t pline_offset, uint32_t pstart_addr, uint32_t pline_compare);
193	typedef void FNGETRESOLUTION(struct VGAState s, int pwidth, int *pheight);
194	typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
195	typedef void FNCURSORINVALIDATE(struct VGAState *s);
196	typedef void FNCURSORDRAWLINE(struct VGAState s, uint8_t d, int y);
197
198	#endif /* VBOX */
199
200	#ifdef VBOX_WITH_VDMA
201	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
202	#endif
203
204	#ifdef VBOX_WITH_VIDEOHWACCEL
205	#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
206
207	typedef struct _VBOX_VHWA_PENDINGCMD
208	{
209	RTLISTNODE Node;
210	PVBOXVHWACMD pCommand;
211	} VBOX_VHWA_PENDINGCMD;
212	#endif
213
214	#ifdef VBOX_WITH_VMSVGA
215
216	#define VMSVGA_FIFO_EXTCMD_NONE 0
217	#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
218	#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
219	#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
220	#define VMSVGA_FIFO_EXTCMD_RESET 4
221
222	/** Size of the region to backup when switching into svga mode. */
223	#define VMSVGA_FRAMEBUFFER_BACKUP_SIZE (32*1024)
224
225	typedef struct
226	{
227	PSSMHANDLE pSSM;
228	uint32_t uVersion;
229	uint32_t uPass;
230	} VMSVGA_STATE_LOAD, *PVMSVGA_STATE_LOAD;
231
232	typedef struct
233	{
234	/** The host window handle */
235	uint64_t u64HostWindowId;
236	/** The R3 FIFO pointer. */
237	R3PTRTYPE(uint32_t *) pFIFOR3;
238	/** The R0 FIFO pointer. */
239	R0PTRTYPE(uint32_t *) pFIFOR0;
240	/** R3 Opaque pointer to svga state. */
241	R3PTRTYPE(void *) pSVGAState;
242	/** R3 Opaque pointer to 3d state. */
243	R3PTRTYPE(void *) p3dState;
244	/** R3 Opaque pointer to a copy of the first 32k of the framebuffer before switching into svga mode. */
245	R3PTRTYPE(void *) pFrameBufferBackup;
246	/** R3 Opaque pointer to an external fifo cmd parameter. */
247	R3PTRTYPE(void *) pFIFOExtCmdParam;
248
249	/** Guest physical address of the FIFO memory range. */
250	RTGCPHYS GCPhysFIFO;
251	/** Size in bytes of the FIFO memory range. */
252	uint32_t cbFIFO;
253	/** SVGA id. */
254	uint32_t u32SVGAId;
255	/** SVGA extensions enabled or not. */
256	uint32_t fEnabled;
257	/** SVGA memory area configured status. */
258	uint32_t fConfigured;
259	/** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
260	* VMSVGA_BUSY_F_EMT_FORCE). */
261	uint32_t volatile fBusy;
262	#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /*< The normal true/false busy FIFO bit. /
263	#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /*< Bit preventing race status flickering when EMT kicks the FIFO thread. /
264	/** Traces (dirty page detection) enabled or not. */
265	uint32_t fTraces;
266	/** Guest OS identifier. */
267	uint32_t u32GuestId;
268	/** Scratch region size. */
269	uint32_t cScratchRegion;
270	/** Scratch array. */
271	uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
272	/** Irq status. */
273	uint32_t u32IrqStatus;
274	/** Irq mask. */
275	uint32_t u32IrqMask;
276	/** Pitch lock. */
277	uint32_t u32PitchLock;
278	/** Current GMR id. (SVGA_REG_GMR_ID) */
279	uint32_t u32CurrentGMRId;
280	/** Register caps. */
281	uint32_t u32RegCaps;
282	uint32_t Padding2;
283	/** Physical address of command mmio range. */
284	RTIOPORT BasePort;
285	/** Port io index register. */
286	uint32_t u32IndexReg;
287	/** The support driver session handle for use with FIFORequestSem. */
288	R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
289	/** FIFO request semaphore. */
290	SUPSEMEVENT FIFORequestSem;
291	/** FIFO external command semaphore. */
292	R3PTRTYPE(RTSEMEVENT) FIFOExtCmdSem;
293	/** FIFO IO Thread. */
294	R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
295	uint32_t uWidth;
296	uint32_t uHeight;
297	uint32_t uBpp;
298	uint32_t cbScanline;
299	/** Maximum width supported. */
300	uint32_t u32MaxWidth;
301	/** Maximum height supported. */
302	uint32_t u32MaxHeight;
303	/** Viewport rectangle */
304	struct
305	{
306	uint32_t x;
307	uint32_t y;
308	uint32_t cx;
309	uint32_t cy;
310	} viewport;
311	/** Action flags */
312	uint32_t u32ActionFlags;
313	/** SVGA 3d extensions enabled or not. */
314	bool f3DEnabled;
315	/** VRAM page monitoring enabled or not. */
316	bool fVRAMTracking;
317	/** External command to be executed in the FIFO thread. */
318	uint8_t u8FIFOExtCommand;
319	bool Padding6;
320	# if defined(DEBUG_GMR_ACCESS) \|\| defined(DEBUG_FIFO_ACCESS)
321	/** GMR debug access handler type handle. */
322	PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
323	/** FIFO debug access handler type handle. */
324	PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
325	# endif
326	} VMSVGAState;
327	#endif /* VBOX_WITH_VMSVGA */
328
329
330	typedef struct VGAState {
331	#ifndef VBOX
332	VGA_STATE_COMMON
333	#else /* VBOX */
334	R3PTRTYPE(uint8_t *) vram_ptrR3;
335	R3PTRTYPE(FNGETBPP *) get_bpp;
336	R3PTRTYPE(FNGETOFFSETS *) get_offsets;
337	R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
338	R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
339	R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
340	R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
341	RTR3PTR R3PtrCmnAlignment;
342	uint32_t vram_size;
343	uint32_t latch;
344	uint8_t sr_index;
345	uint8_t sr[256];
346	uint8_t gr_index;
347	uint8_t gr[256];
348	uint8_t ar_index;
349	uint8_t ar[21];
350	int32_t ar_flip_flop;
351	uint8_t cr_index;
352	uint8_t cr[256]; /* CRT registers */
353	uint8_t msr; /* Misc Output Register */
354	uint8_t fcr; /* Feature Control Register */
355	uint8_t st00; /* status 0 */
356	uint8_t st01; /* status 1 */
357	uint8_t dac_state;
358	uint8_t dac_sub_index;
359	uint8_t dac_read_index;
360	uint8_t dac_write_index;
361	uint8_t dac_cache[3]; /* used when writing */
362	uint8_t palette[768];
363	int32_t bank_offset;
364	VGA_STATE_COMMON_BOCHS_VBE
365	/* display refresh support */
366	uint32_t font_offsets[2];
367	int32_t graphic_mode;
368	uint8_t shift_control;
369	uint8_t double_scan;
370	uint8_t padding1[2];
371	uint32_t line_offset;
372	uint32_t line_compare;
373	uint32_t start_addr;
374	uint32_t plane_updated;
375	uint8_t last_cw, last_ch, padding2[2];
376	uint32_t last_width, last_height; /* in chars or pixels */
377	uint32_t last_scr_width, last_scr_height; /* in pixels */
378	uint32_t last_bpp;
379	uint8_t cursor_start, cursor_end, padding3[2];
380	uint32_t cursor_offset;
381	/* hardware mouse cursor support */
382	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
383	/* tell for each page if it has been updated since the last time */
384	uint32_t last_palette[256];
385	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
386
387	/** end-of-common-state-marker */
388	uint32_t u32Marker;
389
390	/** Pointer to the device instance - RC Ptr. */
391	PPDMDEVINSRC pDevInsRC;
392	/** Pointer to the GC vram mapping. */
393	RCPTRTYPE(uint8_t *) vram_ptrRC;
394	uint32_t PaddingMinus1;
395
396	/** Pointer to the device instance - R3 Ptr. */
397	PPDMDEVINSR3 pDevInsR3;
398	# ifdef VBOX_WITH_HGSMI
399	R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
400	# endif
401	# ifdef VBOX_WITH_VDMA
402	R3PTRTYPE(PVBOXVDMAHOST) pVdma;
403	# endif
404	/** LUN\#0: The display port base interface. */
405	PDMIBASE IBase;
406	/** LUN\#0: The display port interface. */
407	PDMIDISPLAYPORT IPort;
408	# if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) \|\| defined(VBOX_WITH_CRHGSMI))
409	/** LUN\#0: VBVA callbacks interface */
410	PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
411	# else
412	RTR3PTR Padding2;
413	# endif
414	/** Status LUN\#0: Leds interface. */
415	PDMILEDPORTS ILeds;
416
417	/** Pointer to base interface of the driver. */
418	R3PTRTYPE(PPDMIBASE) pDrvBase;
419	/** Pointer to display connector interface of the driver. */
420	R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
421
422	/** Status LUN: Partner of ILeds. */
423	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
424	/** Status LUN: Media Notifys. */
425	R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
426
427	/** Refresh timer handle - HC. */
428	PTMTIMERR3 RefreshTimer;
429
430	/** Pointer to the device instance - R0 Ptr. */
431	PPDMDEVINSR0 pDevInsR0;
432	/** The R0 vram pointer... */
433	R0PTRTYPE(uint8_t *) vram_ptrR0;
434
435	#ifdef VBOX_WITH_VMSVGA
436	# if HC_ARCH_BITS == 32
437	uint32_t Padding3;
438	# endif
439	VMSVGAState svga;
440	#endif
441
442	/** The number of monitors. */
443	uint32_t cMonitors;
444	/** Current refresh timer interval. */
445	uint32_t cMilliesRefreshInterval;
446	/** Bitmap tracking dirty pages. */
447	uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
448
449	/** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
450	bool fHasDirtyBits;
451	/** LFB was updated flag. */
452	bool fLFBUpdated;
453	/** Indicates if the GC extensions are enabled or not. */
454	bool fGCEnabled;
455	/** Indicates if the R0 extensions are enabled or not. */
456	bool fR0Enabled;
457	/** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
458	bool fRemappedVGA;
459	/** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
460	bool fRenderVRAM;
461	#ifdef VBOX_WITH_VMSVGA
462	/* Whether the SVGA emulation is enabled or not. */
463	bool fVMSVGAEnabled;
464	bool Padding1[1+4];
465	#else
466	bool Padding1[2+4];
467	#endif
468
469	/** Physical access type for the linear frame buffer dirty page tracking. */
470	PGMPHYSHANDLERTYPE hLfbAccessHandlerType;
471
472	/** The physical address the VRAM was assigned. */
473	RTGCPHYS GCPhysVRAM;
474	/** The critical section protect the instance data. */
475	PDMCRITSECT CritSect;
476	/** The PCI device. */
477	PCIDEVICE Dev;
478
479	STAMPROFILE StatRZMemoryRead;
480	STAMPROFILE StatR3MemoryRead;
481	STAMPROFILE StatRZMemoryWrite;
482	STAMPROFILE StatR3MemoryWrite;
483	STAMCOUNTER StatMapPage; /*< Counts IOMMMIOMapMMIO2Page calls. /
484	STAMCOUNTER StatUpdateDisp; /*< Counts vgaPortUpdateDisplay calls. /
485
486	/* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
487	uint64_t u64LastLatchedAccess;
488	uint32_t cLatchAccesses;
489	uint16_t uMaskLatchAccess;
490	uint16_t iMask;
491
492	# ifdef VBE_BYTEWISE_IO
493	/** VBE read/write data/index flags */
494	uint8_t fReadVBEData;
495	uint8_t fWriteVBEData;
496	uint8_t fReadVBEIndex;
497	uint8_t fWriteVBEIndex;
498	/** VBE write data/index one byte buffer */
499	uint8_t cbWriteVBEData;
500	uint8_t cbWriteVBEIndex;
501	# ifdef VBE_NEW_DYN_LIST
502	/** VBE Extra Data write address one byte buffer */
503	uint8_t cbWriteVBEExtraAddress;
504	uint8_t Padding5;
505	# else
506	uint8_t Padding5[2];
507	# endif
508	# endif
509
510	/** Retrace emulation state */
511	bool fRealRetrace;
512	bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
513	vga_retrace_s retrace_state;
514
515	# ifdef VBE_NEW_DYN_LIST
516	/** The VBE BIOS extra data. */
517	R3PTRTYPE(uint8_t *) pu8VBEExtraData;
518	/** The size of the VBE BIOS extra data. */
519	uint16_t cbVBEExtraData;
520	/** The VBE BIOS current memory address. */
521	uint16_t u16VBEExtraAddress;
522	uint16_t Padding7[2];
523	# endif
524
525	/** The BIOS logo data. */
526	R3PTRTYPE(uint8_t *) pu8Logo;
527	/** The name of the logo file. */
528	R3PTRTYPE(char *) pszLogoFile;
529	/** Bitmap image data. */
530	R3PTRTYPE(uint8_t *) pu8LogoBitmap;
531	/** Current logo data offset. */
532	uint32_t offLogoData;
533	/** The size of the BIOS logo data. */
534	uint32_t cbLogo;
535	/** Current logo command. */
536	uint16_t LogoCommand;
537	/** Bitmap width. */
538	uint16_t cxLogo;
539	/** Bitmap height. */
540	uint16_t cyLogo;
541	/** Bitmap planes. */
542	uint16_t cLogoPlanes;
543	/** Bitmap depth. */
544	uint16_t cLogoBits;
545	/** Bitmap compression. */
546	uint16_t LogoCompression;
547	/** Bitmap colors used. */
548	uint16_t cLogoUsedColors;
549	/** Palette size. */
550	uint16_t cLogoPalEntries;
551	/** Clear screen flag. */
552	uint8_t fLogoClearScreen;
553	uint8_t Padding8[7];
554	/** Palette data. */
555	uint32_t au32LogoPalette[256];
556
557	/** The VGA BIOS ROM data. */
558	R3PTRTYPE(uint8_t *) pu8VgaBios;
559	/** The size of the VGA BIOS ROM. */
560	uint64_t cbVgaBios;
561	/** The name of the VGA BIOS ROM file. */
562	R3PTRTYPE(char *) pszVgaBiosFile;
563
564	# ifdef VBOX_WITH_HGSMI
565	/** Base port in the assigned PCI I/O space. */
566	RTIOPORT IOPortBase;
567	# ifdef VBOX_WITH_WDDM
568	uint8_t Padding9[2];
569	/** Specifies guest driver caps, i.e. whether it can handle IRQs from the
570	* adapter, the way it can handle async HGSMI command completion, etc. */
571	uint32_t fGuestCaps;
572	uint32_t fScanLineCfg;
573	uint32_t fHostCursorCapabilities;
574	# else
575	uint8_t Padding10[14];
576	# endif
577	# endif /* VBOX_WITH_HGSMI */
578
579	PDMLED Led3D;
580
581	struct {
582	volatile uint32_t cPending;
583	uint32_t Padding1;
584	union
585	{
586	RTLISTNODE PendingList;
587	/* make sure the structure sized cross different contexts correctly */
588	struct
589	{
590	R3PTRTYPE(void *) dummy1;
591	R3PTRTYPE(void *) dummy2;
592	} dummy;
593	};
594	} pendingVhwaCommands;
595	#endif /* VBOX */
596	} VGAState;
597	#ifdef VBOX
598	/** VGA state. */
599	typedef VGAState VGASTATE;
600	/** Pointer to the VGA state. */
601	typedef VGASTATE *PVGASTATE;
602	AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
603	AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
604	AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
605	AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
606	#endif
607
608	#ifdef VBE_NEW_DYN_LIST
609	/**
610	* VBE Bios Extra Data structure.
611	* @remark duplicated in vbe.h.
612	*/
613	typedef struct VBEHeader
614	{
615	/** Signature (VBEHEADER_MAGIC). */
616	uint16_t u16Signature;
617	/** Data size. */
618	uint16_t cbData;
619	} VBEHeader;
620
621	/** VBE Extra Data. */
622	typedef VBEHeader VBEHEADER;
623	/** Pointer to the VBE Extra Data. */
624	typedef VBEHEADER *PVBEHEADER;
625
626	/** The value of the VBEHEADER::u16Signature field.
627	* @remark duplicated in vbe.h. */
628	#define VBEHEADER_MAGIC 0x77CC
629
630	/** The extra port which is used to read the mode list.
631	* @remark duplicated in vbe.h. */
632	#define VBE_EXTRA_PORT 0x3b6
633
634	/** The extra port which is used for debug printf.
635	* @remark duplicated in vbe.h. */
636	#define VBE_PRINTF_PORT 0x3b7
637
638	#endif /* VBE_NEW_DYN_LIST */
639
640	#if !defined(VBOX) \|\| defined(IN_RING3)
641	static inline int c6_to_8(int v)
642	{
643	int b;
644	v &= 0x3f;
645	b = v & 1;
646	return (v << 2) \| (b << 1) \| b;
647	}
648	#endif /* !VBOX \|\| IN_RING3 */
649
650
651	#ifdef VBOX_WITH_HGSMI
652	int VBVAInit (PVGASTATE pVGAState);
653	void VBVADestroy (PVGASTATE pVGAState);
654	int VBVAUpdateDisplay (PVGASTATE pVGAState);
655	void VBVAReset (PVGASTATE pVGAState);
656	void VBVAPause (PVGASTATE pVGAState, bool fPause);
657
658	bool VBVAIsEnabled(PVGASTATE pVGAState);
659
660	void VBVARaiseIrq (PVGASTATE pVGAState, uint32_t fFlags);
661	void VBVARaiseIrqNoWait(PVGASTATE pVGAState, uint32_t fFlags);
662
663	int VBVAInfoView(PVGASTATE pVGAState, const VBVAINFOVIEW *pView);
664	int VBVAInfoScreen(PVGASTATE pVGAState, const VBVAINFOSCREEN *pScreen);
665	int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW pView, VBVAINFOSCREEN pScreen);
666
667	/* @return host-guest flags that were set on reset
668	* this allows the caller to make further cleaning when needed,
669	* e.g. reset the IRQ */
670	uint32_t HGSMIReset (PHGSMIINSTANCE pIns);
671
672	# ifdef VBOX_WITH_VIDEOHWACCEL
673	int vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd);
674	int vbvaVHWAConstruct (PVGASTATE pVGAState);
675	int vbvaVHWAReset (PVGASTATE pVGAState);
676
677	void vbvaTimerCb(PVGASTATE pVGAState);
678
679	int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
680	int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
681	# endif
682
683	#ifdef VBOX_WITH_HGSMI
684	#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
685	#endif
686
687	# ifdef VBOX_WITH_CRHGSMI
688	int vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
689	int vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
690	int vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
691	struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
692	PFNCRCTLCOMPLETION pfnCompletion,
693	void *pvCompletion);
694	int vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface,
695	struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd);
696	# endif
697
698	int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
699	int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
700	int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
701
702	DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
703	DECLCALLBACK(int) vbvaPortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx,
704	uint32_t cy, uint32_t cBPP,
705	uint32_t cDisplay, uint32_t dx,
706	uint32_t dy, uint32_t fEnabled,
707	uint32_t fNotifyGuest);
708	DECLCALLBACK(void) vbvaPortReportHostCursorCapabilities(PPDMIDISPLAYPORT pInterface, uint32_t fCapabilitiesAdded,
709	uint32_t fCapabilitiesRemoved);
710	DECLCALLBACK(void) vbvaPortReportHostCursorPosition(PPDMIDISPLAYPORT pInterface, uint32_t x, uint32_t y);
711
712	# ifdef VBOX_WITH_VDMA
713	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
714	int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
715	int vboxVDMADestruct(PVBOXVDMAHOST pVdma);
716	int vboxVDMAReset(PVBOXVDMAHOST pVdma);
717	void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd);
718	void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd);
719	int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
720	int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
721	int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
722	int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
723	int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
724	# endif /* VBOX_WITH_VDMA */
725
726	# ifdef VBOX_WITH_CRHGSMI
727	int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState);
728	int vboxCmdVBVACmdFlush(PVGASTATE pVGAState);
729	void vboxCmdVBVACmdTimer(PVGASTATE pVGAState);
730	int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl);
731	bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState);
732	# endif /* VBOX_WITH_CRHGSMI */
733	#endif /* VBOX_WITH_HGSMI */
734
735	# ifdef VBOX_WITH_VMSVGA
736	int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
737	int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
738	int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
739	# endif
740
741	#ifndef VBOX
742	void vga_common_init(VGAState s, DisplayState ds, uint8_t *vga_ram_base,
743	unsigned long vga_ram_offset, int vga_ram_size);
744	uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
745	void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
746	void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
747
748	void vga_draw_cursor_line_8(uint8_t d1, const uint8_t src1,
749	int poffset, int w,
750	unsigned int color0, unsigned int color1,
751	unsigned int color_xor);
752	void vga_draw_cursor_line_16(uint8_t d1, const uint8_t src1,
753	int poffset, int w,
754	unsigned int color0, unsigned int color1,
755	unsigned int color_xor);
756	void vga_draw_cursor_line_32(uint8_t d1, const uint8_t src1,
757	int poffset, int w,
758	unsigned int color0, unsigned int color1,
759	unsigned int color_xor);
760
761	extern const uint8_t sr_mask[8];
762	extern const uint8_t gr_mask[16];
763	#endif /* !VBOX */
764

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 55909

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