VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 97405

Last change on this file since 97405 was 96407, checked in by vboxsync, 2 years ago

scm copyright and license note update
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1/* $Id: DevVGA-SVGA3d.cpp 96407 2022-08-22 17:43:14Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4 */
5
6/*
7 * Copyright (C) 2013-2022 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33#include <VBox/AssertGuest.h>
34#include <VBox/vmm/pdmdev.h>
35#include <iprt/errcore.h>
36#include <VBox/log.h>
37
38#include <iprt/assert.h>
39#include <iprt/mem.h>
40
41#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
42#include <VBoxVideo.h> /* required by DevVGA.h */
43
44/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
45#include "DevVGA.h"
46
47#include "DevVGA-SVGA.h"
48#include "DevVGA-SVGA3d.h"
49#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
50#include "DevVGA-SVGA3d-internal.h"
51#include "DevVGA-SVGA-internal.h"
52
53
54static int vmsvga3dSurfaceAllocMipLevels(PVMSVGA3DSURFACE pSurface)
55{
56 /* Allocate buffer to hold the surface data until we can move it into a D3D object */
57 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
58 {
59 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
60 AssertReturn(pMipmapLevel->pSurfaceData == NULL, VERR_INVALID_STATE);
61 pMipmapLevel->pSurfaceData = RTMemAllocZ(pMipmapLevel->cbSurface);
62 AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
63 }
64 return VINF_SUCCESS;
65}
66
67
68static void vmsvga3dSurfaceFreeMipLevels(PVMSVGA3DSURFACE pSurface)
69{
70 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
71 {
72 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
73 RTMemFreeZ(pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);
74 pMipmapLevel->pSurfaceData = NULL;
75 }
76}
77
78
79/**
80 * Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
81 * commands (fifo).
82 *
83 * @returns VBox status code (currently ignored).
84 * @param pThisCC The VGA/VMSVGA state for ring-3.
85 * @param sid The ID of the surface to (re-)define.
86 * @param surfaceFlags .
87 * @param format .
88 * @param multisampleCount .
89 * @param autogenFilter .
90 * @param numMipLevels .
91 * @param pMipLevel0Size .
92 * @param arraySize Number of elements in a texture array.
93 * @param fAllocMipLevels .
94 */
95int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, SVGA3dSurfaceAllFlags surfaceFlags, SVGA3dSurfaceFormat format,
96 uint32_t multisampleCount, SVGA3dTextureFilter autogenFilter,
97 uint32_t numMipLevels, SVGA3dSize const *pMipLevel0Size, uint32_t arraySize, bool fAllocMipLevels)
98{
99 PVMSVGA3DSURFACE pSurface;
100 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
101 AssertReturn(pState, VERR_INVALID_STATE);
102
103 LogFunc(("sid=%u surfaceFlags=%#x format=%s (%#x) multiSampleCount=%d autogenFilter=%d, numMipLevels=%d size=(%dx%dx%d)\n",
104 sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
105 numMipLevels, pMipLevel0Size->width, pMipLevel0Size->height, pMipLevel0Size->depth));
106
107 ASSERT_GUEST_RETURN(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
108 ASSERT_GUEST_RETURN(numMipLevels >= 1 && numMipLevels <= SVGA3D_MAX_MIP_LEVELS, VERR_INVALID_PARAMETER);
109 ASSERT_GUEST_RETURN(arraySize <= SVGA3D_MAX_SURFACE_ARRAYSIZE, VERR_INVALID_PARAMETER);
110
111 if (sid >= pState->cSurfaces)
112 {
113 /* Grow the array. */
114 uint32_t cNew = RT_ALIGN(sid + 15, 16);
115 void *pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) * cNew);
116 AssertReturn(pvNew, VERR_NO_MEMORY);
117 pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
118 while (pState->cSurfaces < cNew)
119 {
120 pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
121 AssertReturn(pSurface, VERR_NO_MEMORY);
122 pSurface->id = SVGA3D_INVALID_ID;
123 pState->papSurfaces[pState->cSurfaces++] = pSurface;
124 }
125 }
126 pSurface = pState->papSurfaces[sid];
127
128 /* If one already exists with this id, then destroy it now. */
129 if (pSurface->id != SVGA3D_INVALID_ID)
130 vmsvga3dSurfaceDestroy(pThisCC, sid);
131
132 RT_ZERO(*pSurface);
133 // pSurface->pBackendSurface = NULL;
134 pSurface->id = SVGA3D_INVALID_ID; /* Keep this value until the surface init completes */
135 pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
136
137 if (arraySize)
138 pSurface->surfaceDesc.numArrayElements = arraySize; /* Also for an array of cubemaps where arraySize = 6 * numCubes. */
139 else if (surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
140 pSurface->surfaceDesc.numArrayElements = SVGA3D_MAX_SURFACE_FACES;
141 else
142 pSurface->surfaceDesc.numArrayElements = 1;
143
144 /** @todo This 'switch' and the surfaceFlags tweaks should not be necessary.
145 * The actual surface type will be figured out when the surface is actually used later.
146 * The backends code must be reviewed for unnecessary dependencies on the surfaceFlags value.
147 */
148 /* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
149 * In some case we'll have to wait until the surface is used to create the D3D object.
150 */
151 switch (format)
152 {
153 case SVGA3D_Z_D32:
154 case SVGA3D_Z_D16:
155 case SVGA3D_Z_D24S8:
156 case SVGA3D_Z_D15S1:
157 case SVGA3D_Z_D24X8:
158 case SVGA3D_Z_DF16:
159 case SVGA3D_Z_DF24:
160 case SVGA3D_Z_D24S8_INT:
161 Assert(surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL);
162 surfaceFlags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
163 break;
164
165 /* Texture compression formats */
166 case SVGA3D_DXT1:
167 case SVGA3D_DXT2:
168 case SVGA3D_DXT3:
169 case SVGA3D_DXT4:
170 case SVGA3D_DXT5:
171 /* Bump-map formats */
172 case SVGA3D_BUMPU8V8:
173 case SVGA3D_BUMPL6V5U5:
174 case SVGA3D_BUMPX8L8V8U8:
175 case SVGA3D_V8U8:
176 case SVGA3D_Q8W8V8U8:
177 case SVGA3D_CxV8U8:
178 case SVGA3D_X8L8V8U8:
179 case SVGA3D_A2W10V10U10:
180 case SVGA3D_V16U16:
181 /* Typical render target formats; we should allow render target buffers to be used as textures. */
182 case SVGA3D_X8R8G8B8:
183 case SVGA3D_A8R8G8B8:
184 case SVGA3D_R5G6B5:
185 case SVGA3D_X1R5G5B5:
186 case SVGA3D_A1R5G5B5:
187 case SVGA3D_A4R4G4B4:
188 Assert(surfaceFlags & (SVGA3D_SURFACE_HINT_TEXTURE | SVGA3D_SURFACE_SCREENTARGET));
189 surfaceFlags |= SVGA3D_SURFACE_HINT_TEXTURE;
190 break;
191
192 case SVGA3D_LUMINANCE8:
193 case SVGA3D_LUMINANCE4_ALPHA4:
194 case SVGA3D_LUMINANCE16:
195 case SVGA3D_LUMINANCE8_ALPHA8:
196 case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
197 case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
198 case SVGA3D_A2R10G10B10:
199 case SVGA3D_ALPHA8:
200 case SVGA3D_R_S10E5:
201 case SVGA3D_R_S23E8:
202 case SVGA3D_RG_S10E5:
203 case SVGA3D_RG_S23E8:
204 case SVGA3D_G16R16:
205 case SVGA3D_A16B16G16R16:
206 case SVGA3D_UYVY:
207 case SVGA3D_YUY2:
208 case SVGA3D_NV12:
209 case SVGA3D_FORMAT_DEAD2: /* Old SVGA3D_AYUV */
210 case SVGA3D_ATI1:
211 case SVGA3D_ATI2:
212 break;
213
214 /*
215 * Any surface can be used as a buffer object, but SVGA3D_BUFFER is
216 * the most efficient format to use when creating new surfaces
217 * expressly for index or vertex data.
218 */
219 case SVGA3D_BUFFER:
220 break;
221
222 default:
223 break;
224 }
225
226 pSurface->f.surfaceFlags = surfaceFlags;
227 pSurface->format = format;
228 /* cFaces is 6 for a cubemaps and 1 otherwise. */
229 pSurface->cFaces = (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1);
230 pSurface->cLevels = numMipLevels;
231 pSurface->multiSampleCount = multisampleCount;
232 pSurface->autogenFilter = autogenFilter;
233 Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
234 Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
235 pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(numMipLevels * pSurface->surfaceDesc.numArrayElements * sizeof(VMSVGA3DMIPMAPLEVEL));
236 AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
237
238 pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock);
239 AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
240
241 /** @todo cbMemRemaining = value of SVGA_REG_MOB_MAX_SIZE */
242 uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
243 SVGA3dSize mipmapSize = *pMipLevel0Size;
244 int rc = VINF_SUCCESS;
245
246 for (uint32_t i = 0; i < numMipLevels; ++i)
247 {
248 for (uint32_t iArray = 0; iArray < pSurface->surfaceDesc.numArrayElements; ++iArray)
249 {
250 uint32_t const iMipmap = vmsvga3dCalcSubresource(i, iArray, numMipLevels);
251 LogFunc(("[%d] array %d mip level %d (%d,%d,%d) cbBlock=%#x block %dx%d\n",
252 iMipmap, iArray, i, mipmapSize.width, mipmapSize.height, mipmapSize.depth,
253 pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
254
255 uint32_t cBlocksX;
256 uint32_t cBlocksY;
257 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
258 {
259 cBlocksX = mipmapSize.width;
260 cBlocksY = mipmapSize.height;
261 }
262 else
263 {
264 cBlocksX = mipmapSize.width / pSurface->cxBlock;
265 if (mipmapSize.width % pSurface->cxBlock)
266 ++cBlocksX;
267 cBlocksY = mipmapSize.height / pSurface->cyBlock;
268 if (mipmapSize.height % pSurface->cyBlock)
269 ++cBlocksY;
270 }
271
272 AssertBreakStmt(cBlocksX > 0 && cBlocksY > 0 && mipmapSize.depth > 0, rc = VERR_INVALID_PARAMETER);
273
274 const uint32_t cMaxBlocksX = cbMemRemaining / pSurface->cbBlock;
275 AssertBreakStmt(cBlocksX < cMaxBlocksX, rc = VERR_INVALID_PARAMETER);
276
277 const uint32_t cbSurfacePitch = pSurface->cbBlock * cBlocksX;
278 LogFunc(("cbSurfacePitch=0x%x\n", cbSurfacePitch));
279
280 const uint32_t cMaxBlocksY = cbMemRemaining / cbSurfacePitch;
281 AssertBreakStmt(cBlocksY < cMaxBlocksY, rc = VERR_INVALID_PARAMETER);
282
283 const uint32_t cbSurfacePlane = cbSurfacePitch * cBlocksY;
284
285 const uint32_t cMaxDepth = cbMemRemaining / cbSurfacePlane;
286 AssertBreakStmt(mipmapSize.depth < cMaxDepth, rc = VERR_INVALID_PARAMETER);
287
288 const uint32_t cbSurface = cbSurfacePlane * mipmapSize.depth;
289
290 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iMipmap];
291 pMipmapLevel->mipmapSize = mipmapSize;
292 pMipmapLevel->cBlocksX = cBlocksX;
293 pMipmapLevel->cBlocksY = cBlocksY;
294 pMipmapLevel->cBlocks = cBlocksX * cBlocksY * mipmapSize.depth;
295 pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
296 pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
297 pMipmapLevel->cbSurface = cbSurface;
298 pMipmapLevel->pSurfaceData = NULL;
299
300 cbMemRemaining -= cbSurface;
301 }
302
303 AssertRCBreak(rc);
304
305 mipmapSize.width >>= 1;
306 if (mipmapSize.width == 0) mipmapSize.width = 1;
307 mipmapSize.height >>= 1;
308 if (mipmapSize.height == 0) mipmapSize.height = 1;
309 mipmapSize.depth >>= 1;
310 if (mipmapSize.depth == 0) mipmapSize.depth = 1;
311 }
312
313 AssertLogRelRCReturnStmt(rc, RTMemFree(pSurface->paMipmapLevels), rc);
314
315 /* Compute the size of one array element. */
316 pSurface->surfaceDesc.cbArrayElement = 0;
317 for (uint32_t i = 0; i < pSurface->cLevels; ++i)
318 {
319 PVMSVGA3DMIPMAPLEVEL pMipLevel = &pSurface->paMipmapLevels[i];
320 pSurface->surfaceDesc.cbArrayElement += pMipLevel->cbSurface;
321 }
322
323 if (vmsvga3dIsLegacyBackend(pThisCC))
324 {
325#ifdef VMSVGA3D_DIRECT3D
326 /* pSurface->hSharedObject = NULL; */
327 /* pSurface->pSharedObjectTree = NULL; */
328 /* Translate the format and usage flags to D3D. */
329 pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
330 pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
331 pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
332 pSurface->fUsageD3D = 0;
333 if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
334 pSurface->fUsageD3D |= D3DUSAGE_DYNAMIC;
335 if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
336 pSurface->fUsageD3D |= D3DUSAGE_RENDERTARGET;
337 if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
338 pSurface->fUsageD3D |= D3DUSAGE_DEPTHSTENCIL;
339 if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
340 pSurface->fUsageD3D |= D3DUSAGE_WRITEONLY;
341 if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
342 pSurface->fUsageD3D |= D3DUSAGE_AUTOGENMIPMAP;
343 pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
344 /* pSurface->u.pSurface = NULL; */
345 /* pSurface->bounce.pTexture = NULL; */
346 /* pSurface->emulated.pTexture = NULL; */
347#else
348 /* pSurface->oglId.buffer = OPENGL_INVALID_ID; */
349 /* pSurface->fEmulated = false; */
350 /* pSurface->idEmulated = OPENGL_INVALID_ID; */
351 vmsvga3dSurfaceFormat2OGL(pSurface, format);
352#endif
353 }
354
355#ifdef LOG_ENABLED
356 SVGA3dSurfaceAllFlags const f = surfaceFlags;
357 LogFunc(("surface flags:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x%RX64\n",
358 (f & SVGA3D_SURFACE_CUBEMAP) ? " CUBEMAP" : "",
359 (f & SVGA3D_SURFACE_HINT_STATIC) ? " HINT_STATIC" : "",
360 (f & SVGA3D_SURFACE_HINT_DYNAMIC) ? " HINT_DYNAMIC" : "",
361 (f & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " HINT_INDEXBUFFER" : "",
362 (f & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " HINT_VERTEXBUFFER" : "",
363 (f & SVGA3D_SURFACE_HINT_TEXTURE) ? " HINT_TEXTURE" : "",
364 (f & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " HINT_RENDERTARGET" : "",
365 (f & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " HINT_DEPTHSTENCIL" : "",
366 (f & SVGA3D_SURFACE_HINT_WRITEONLY) ? " HINT_WRITEONLY" : "",
367 (f & SVGA3D_SURFACE_DEAD2) ? " DEAD2" : "",
368 (f & SVGA3D_SURFACE_AUTOGENMIPMAPS) ? " AUTOGENMIPMAPS" : "",
369 (f & SVGA3D_SURFACE_DEAD1) ? " DEAD1" : "",
370 (f & SVGA3D_SURFACE_MOB_PITCH) ? " MOB_PITCH" : "",
371 (f & SVGA3D_SURFACE_INACTIVE) ? " INACTIVE" : "",
372 (f & SVGA3D_SURFACE_HINT_RT_LOCKABLE) ? " HINT_RT_LOCKABLE" : "",
373 (f & SVGA3D_SURFACE_VOLUME) ? " VOLUME" : "",
374 (f & SVGA3D_SURFACE_SCREENTARGET) ? " SCREENTARGET" : "",
375 (f & SVGA3D_SURFACE_ALIGN16) ? " ALIGN16" : "",
376 (f & SVGA3D_SURFACE_1D) ? " 1D" : "",
377 (f & SVGA3D_SURFACE_ARRAY) ? " ARRAY" : "",
378 (f & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) ? " BIND_VERTEX_BUFFER" : "",
379 (f & SVGA3D_SURFACE_BIND_INDEX_BUFFER) ? " BIND_INDEX_BUFFER" : "",
380 (f & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) ? " BIND_CONSTANT_BUFFER" : "",
381 (f & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) ? " BIND_SHADER_RESOURCE" : "",
382 (f & SVGA3D_SURFACE_BIND_RENDER_TARGET) ? " BIND_RENDER_TARGET" : "",
383 (f & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) ? " BIND_DEPTH_STENCIL" : "",
384 (f & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) ? " BIND_STREAM_OUTPUT" : "",
385 (f & SVGA3D_SURFACE_STAGING_UPLOAD) ? " STAGING_UPLOAD" : "",
386 (f & SVGA3D_SURFACE_STAGING_DOWNLOAD) ? " STAGING_DOWNLOAD" : "",
387 (f & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE) ? " HINT_INDIRECT_UPDATE" : "",
388 (f & SVGA3D_SURFACE_TRANSFER_FROM_BUFFER) ? " TRANSFER_FROM_BUFFER" : "",
389 (f & SVGA3D_SURFACE_RESERVED1) ? " RESERVED1" : "",
390 (f & SVGA3D_SURFACE_MULTISAMPLE) ? " MULTISAMPLE" : "",
391 (f & SVGA3D_SURFACE_BIND_UAVIEW) ? " BIND_UAVIEW" : "",
392 (f & SVGA3D_SURFACE_TRANSFER_TO_BUFFER) ? " TRANSFER_TO_BUFFER" : "",
393 (f & SVGA3D_SURFACE_BIND_LOGICOPS) ? " BIND_LOGICOPS" : "",
394 (f & SVGA3D_SURFACE_BIND_RAW_VIEWS) ? " BIND_RAW_VIEWS" : "",
395 (f & SVGA3D_SURFACE_BUFFER_STRUCTURED) ? " BUFFER_STRUCTURED" : "",
396 (f & SVGA3D_SURFACE_DRAWINDIRECT_ARGS) ? " DRAWINDIRECT_ARGS" : "",
397 (f & SVGA3D_SURFACE_RESOURCE_CLAMP) ? " RESOURCE_CLAMP" : "",
398 (f & SVGA3D_SURFACE_FLAG_MAX) ? " FLAG_MAX" : "",
399 f & ~(SVGA3D_SURFACE_FLAG_MAX - 1ULL)
400 ));
401#endif
402
403 Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
404
405 if (fAllocMipLevels)
406 {
407 rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
408 AssertRCReturn(rc, rc);
409 }
410
411 pSurface->id = sid;
412 return VINF_SUCCESS;
413}
414
415
416/**
417 * Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
418 *
419 * @returns VBox status code (currently ignored).
420 * @param pThisCC The VGA/VMSVGA state for ring-3.
421 * @param sid The ID of the surface to destroy.
422 */
423int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
424{
425 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
426 AssertReturn(pState, VERR_NO_MEMORY);
427
428 PVMSVGA3DSURFACE pSurface;
429 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
430 AssertRCReturn(rc, rc);
431
432 LogFunc(("sid=%u\n", sid));
433
434 /* Check all contexts if this surface is used as a render target or active texture. */
435 for (uint32_t cid = 0; cid < pState->cContexts; cid++)
436 {
437 PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
438 if (pContext->id == cid)
439 {
440 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
441 if (pContext->aSidActiveTextures[i] == sid)
442 pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
443 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
444 if (pContext->state.aRenderTargets[i] == sid)
445 pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
446 }
447 }
448
449 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
450 if (pSvgaR3State->pFuncs3D)
451 pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, true, pSurface);
452
453 if (pSurface->paMipmapLevels)
454 {
455 vmsvga3dSurfaceFreeMipLevels(pSurface);
456 RTMemFree(pSurface->paMipmapLevels);
457 }
458
459 memset(pSurface, 0, sizeof(*pSurface));
460 pSurface->id = SVGA3D_INVALID_ID;
461
462 return VINF_SUCCESS;
463}
464
465
466/**
467 * Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
468 *
469 * @returns VBox status code (currently ignored).
470 * @param pThis The shared VGA/VMSVGA state.
471 * @param pThisCC The VGA/VMSVGA state for ring-3.
472 * @param pDstSfcImg
473 * @param pDstBox
474 * @param pSrcSfcImg
475 * @param pSrcBox
476 * @param enmMode
477 */
478int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pDstSfcImg, SVGA3dBox const *pDstBox,
479 SVGA3dSurfaceImageId const *pSrcSfcImg, SVGA3dBox const *pSrcBox, SVGA3dStretchBltMode enmMode)
480{
481 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
482 AssertReturn(pState, VERR_NO_MEMORY);
483
484 int rc;
485
486 uint32_t const sidSrc = pSrcSfcImg->sid;
487 PVMSVGA3DSURFACE pSrcSurface;
488 rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
489 AssertRCReturn(rc, rc);
490
491 uint32_t const sidDst = pDstSfcImg->sid;
492 PVMSVGA3DSURFACE pDstSurface;
493 rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
494 AssertRCReturn(rc, rc);
495
496 AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
497 AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->cLevels, VERR_INVALID_PARAMETER);
498 AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
499 AssertReturn(pDstSfcImg->mipmap < pDstSurface->cLevels, VERR_INVALID_PARAMETER);
500
501 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
502 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
503
504 PVMSVGA3DCONTEXT pContext;
505#ifdef VMSVGA3D_OPENGL
506 LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
507 sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
508 sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
509 pContext = &pState->SharedCtx;
510 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
511#else
512 LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
513 sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
514 sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
515
516 uint32_t cid = pDstSurface->idAssociatedContext;
517 if (cid == SVGA3D_INVALID_ID)
518 cid = pSrcSurface->idAssociatedContext;
519
520 /* At least one of surfaces must be in hardware. */
521 AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
522
523 rc = vmsvga3dContextFromCid(pState, cid, &pContext);
524 AssertRCReturn(rc, rc);
525#endif
526
527 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
528 {
529 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
530 LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->f.s.surface1Flags, pSrcSurface->format));
531 rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pSrcSurface);
532 AssertRCReturn(rc, rc);
533 }
534
535 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
536 {
537 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
538 LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->f.s.surface1Flags, pDstSurface->format));
539 rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pDstSurface);
540 AssertRCReturn(rc, rc);
541 }
542
543 PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
544 rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
545 AssertRCReturn(rc, rc);
546
547 PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
548 rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
549 AssertRCReturn(rc, rc);
550
551 SVGA3dBox clipSrcBox = *pSrcBox;
552 SVGA3dBox clipDstBox = *pDstBox;
553 vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
554 vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
555
556 return pSvgaR3State->pFuncs3D->pfnSurfaceStretchBlt(pThis, pState,
557 pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
558 pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
559 enmMode, pContext);
560}
561
562/**
563 * Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
564 *
565 * @returns VBox status code (currently ignored).
566 * @param pThis The shared VGA/VMSVGA instance data.
567 * @param pThisCC The VGA/VMSVGA state for ring-3.
568 * @param guest .
569 * @param host .
570 * @param transfer .
571 * @param cCopyBoxes .
572 * @param paBoxes .
573 */
574int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestImage guest, SVGA3dSurfaceImageId host,
575 SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
576{
577 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
578 AssertReturn(pState, VERR_NO_MEMORY);
579
580 PVMSVGA3DSURFACE pSurface;
581 int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
582 AssertRCReturn(rc, rc);
583
584 LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
585 (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
586 guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
587 host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
588
589 PVMSVGA3DMIPMAPLEVEL pMipLevel;
590 rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
591 AssertRCReturn(rc, rc);
592
593 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
594 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
595
596 PVMSVGA3DCONTEXT pContext = NULL;
597 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
598 {
599 /*
600 * Not realized in host hardware/library yet, we have to work with
601 * the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
602 */
603 if (!pMipLevel->pSurfaceData)
604 {
605 rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
606 AssertRCReturn(rc, rc);
607 }
608 }
609 else if (vmsvga3dIsLegacyBackend(pThisCC))
610 {
611#ifdef VMSVGA3D_DIRECT3D
612 /* Flush the drawing pipeline for this surface as it could be used in a shared context. */
613 vmsvga3dSurfaceFlush(pSurface);
614#else /* VMSVGA3D_OPENGL */
615 pContext = &pState->SharedCtx;
616 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
617#endif
618 }
619
620 /* SVGA_3D_CMD_SURFACE_DMA:
621 * "define the 'source' in each copyBox as the guest image and the
622 * 'destination' as the host image, regardless of transfer direction."
623 */
624 for (uint32_t i = 0; i < cCopyBoxes; ++i)
625 {
626 Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
627 VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
628 i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
629
630 /* Apparently we're supposed to clip it (gmr test sample) */
631
632 /* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
633 SVGA3dBox hostBox;
634 hostBox.x = paBoxes[i].x;
635 hostBox.y = paBoxes[i].y;
636 hostBox.z = paBoxes[i].z;
637 hostBox.w = paBoxes[i].w;
638 hostBox.h = paBoxes[i].h;
639 hostBox.d = paBoxes[i].d;
640 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
641
642 if ( !hostBox.w
643 || !hostBox.h
644 || !hostBox.d)
645 {
646 Log(("Skip empty box\n"));
647 continue;
648 }
649 RT_UNTRUSTED_VALIDATED_FENCE();
650
651 /* Adjust the guest, i.e. "src", point.
652 * Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
653 */
654 uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
655 uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
656 uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
657
658 /* Calculate offsets of the image blocks for the transfer. */
659 uint32_t u32HostBlockX;
660 uint32_t u32HostBlockY;
661 uint32_t u32GuestBlockX;
662 uint32_t u32GuestBlockY;
663 uint32_t cBlocksX;
664 uint32_t cBlocksY;
665 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
666 {
667 u32HostBlockX = hostBox.x;
668 u32HostBlockY = hostBox.y;
669
670 u32GuestBlockX = srcx;
671 u32GuestBlockY = srcy;
672
673 cBlocksX = hostBox.w;
674 cBlocksY = hostBox.h;
675 }
676 else
677 {
678 /* Pixels to blocks. */
679 u32HostBlockX = hostBox.x / pSurface->cxBlock;
680 u32HostBlockY = hostBox.y / pSurface->cyBlock;
681 Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
682 Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
683
684 u32GuestBlockX = srcx / pSurface->cxBlock;
685 u32GuestBlockY = srcy / pSurface->cyBlock;
686 Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
687 Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
688
689 cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
690 cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
691 }
692
693 uint32_t cbGuestPitch = guest.pitch;
694 if (cbGuestPitch == 0)
695 {
696 /* Host must "assume image is tightly packed". Our surfaces are. */
697 cbGuestPitch = pMipLevel->cbSurfacePitch;
698 }
699 else
700 {
701 /* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
702 AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
703 RT_UNTRUSTED_VALIDATED_FENCE();
704 }
705
706 /* srcx, srcy and srcz values are used to calculate the guest offset.
707 * The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
708 */
709 AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
710 AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
711 AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
712 RT_UNTRUSTED_VALIDATED_FENCE();
713
714 if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
715 || VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
716 {
717 uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
718 u32GuestBlockY * cbGuestPitch +
719 srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
720 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
721
722 /* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
723 uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
724 u32HostBlockY * pMipLevel->cbSurfacePitch +
725 hostBox.z * pMipLevel->cbSurfacePlane;
726 AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
727
728 for (uint32_t z = 0; z < hostBox.d; ++z)
729 {
730 rc = vmsvgaR3GmrTransfer(pThis,
731 pThisCC,
732 transfer,
733 (uint8_t *)pMipLevel->pSurfaceData,
734 pMipLevel->cbSurface,
735 uHostOffset,
736 (int32_t)pMipLevel->cbSurfacePitch,
737 guest.ptr,
738 (uint32_t)uGuestOffset,
739 cbGuestPitch,
740 cBlocksX * pSurface->cbBlock,
741 cBlocksY);
742 AssertRC(rc);
743
744 Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
745 z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
746
747 uHostOffset += pMipLevel->cbSurfacePlane;
748 uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
749 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
750 }
751 }
752
753 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
754 {
755 SVGA3dCopyBox clipBox;
756 clipBox.x = hostBox.x;
757 clipBox.y = hostBox.y;
758 clipBox.z = hostBox.z;
759 clipBox.w = hostBox.w;
760 clipBox.h = hostBox.h;
761 clipBox.d = hostBox.d;
762 clipBox.srcx = srcx;
763 clipBox.srcy = srcy;
764 clipBox.srcz = srcz;
765 rc = pSvgaR3State->pFuncs3D->pfnSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
766 guest.ptr, cbGuestPitch, transfer,
767 &clipBox, pContext, rc, i);
768 AssertRC(rc);
769 }
770 }
771
772 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
773 {
774 pMipLevel->fDirty = true;
775 pSurface->fDirty = true;
776 }
777
778 return rc;
779}
780
781static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr const *pGuestResult,
782 SVGA3dQueryState enmState, uint32_t u32Result)
783{
784 SVGA3dQueryResult queryResult;
785 queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
786 queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
787 queryResult.result32 = u32Result;
788
789 int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
790 (uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
791 *pGuestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
792 AssertRC(rc);
793 return rc;
794}
795
796/* Used with saved state. */
797int vmsvga3dQueryCreate(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
798{
799 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
800 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
801
802 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
803 AssertReturn(pState, VERR_NO_MEMORY);
804
805 LogFunc(("cid=%u type=%d\n", cid, type));
806
807 PVMSVGA3DCONTEXT pContext;
808 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
809 AssertRCReturn(rc, rc);
810
811 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
812 {
813 VMSVGA3DQUERY *p = &pContext->occlusion;
814 if (!VMSVGA3DQUERY_EXISTS(p))
815 {
816 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
817 AssertRCReturn(rc, rc);
818 }
819
820 return VINF_SUCCESS;
821 }
822
823 /* Nothing else for VGPU9. */
824 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
825}
826
827int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
828{
829 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
830 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
831
832 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
833 AssertReturn(pState, VERR_NO_MEMORY);
834
835 LogFunc(("cid=%u type=%d\n", cid, type));
836
837 PVMSVGA3DCONTEXT pContext;
838 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
839 AssertRCReturn(rc, rc);
840
841 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
842 {
843 VMSVGA3DQUERY *p = &pContext->occlusion;
844 if (!VMSVGA3DQUERY_EXISTS(p))
845 {
846 /* Lazy creation of the query object. */
847 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
848 AssertRCReturn(rc, rc);
849 }
850
851 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryBegin(pThisCC, pContext);
852 AssertRCReturn(rc, rc);
853
854 p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
855 p->u32QueryResult = 0;
856
857 return VINF_SUCCESS;
858 }
859
860 /* Nothing else for VGPU9. */
861 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
862}
863
864int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
865{
866 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
867 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
868
869 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
870 AssertReturn(pState, VERR_NO_MEMORY);
871
872 LogFunc(("cid=%u type=%d\n", cid, type));
873
874 PVMSVGA3DCONTEXT pContext;
875 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
876 AssertRCReturn(rc, rc);
877
878 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
879 {
880 VMSVGA3DQUERY *p = &pContext->occlusion;
881 Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
882 AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
883
884 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryEnd(pThisCC, pContext);
885 AssertRCReturn(rc, rc);
886
887 p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
888 return VINF_SUCCESS;
889 }
890
891 /* Nothing else for VGPU9. */
892 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
893}
894
895int vmsvga3dQueryWait(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, PVGASTATE pThis, SVGAGuestPtr const *pGuestResult)
896{
897 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
898 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
899
900 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
901 AssertReturn(pState, VERR_NO_MEMORY);
902
903 LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, pGuestResult->gmrId, pGuestResult->offset));
904
905 PVMSVGA3DCONTEXT pContext;
906 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
907 AssertRCReturn(rc, rc);
908
909 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
910 {
911 VMSVGA3DQUERY *p = &pContext->occlusion;
912 if (VMSVGA3DQUERY_EXISTS(p))
913 {
914 if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
915 {
916 /* Only if not already in SIGNALED state,
917 * i.e. not a second read from the guest or after restoring saved state.
918 */
919 uint32_t u32Pixels = 0;
920 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryGetData(pThisCC, pContext, &u32Pixels);
921 if (RT_SUCCESS(rc))
922 {
923 p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
924 p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
925 }
926 }
927
928 if (RT_SUCCESS(rc))
929 {
930 /* pGuestResult can be NULL when saving the state. */
931 if (pGuestResult)
932 {
933 /* Return data to the guest. */
934 vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
935 }
936 return VINF_SUCCESS;
937 }
938 }
939 else
940 {
941 AssertMsgFailed(("GetData Query is NULL\n"));
942 }
943
944 rc = VERR_INTERNAL_ERROR;
945 }
946 else
947 {
948 rc = VERR_NOT_IMPLEMENTED;
949 }
950
951 if (pGuestResult)
952 vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_FAILED, 0);
953 AssertFailedReturn(rc);
954}
955
956int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
957 SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
958{
959 /* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
960 LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
961 idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
962 srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
963 for (uint32_t i = 0; i < cRects; i++)
964 {
965 LogFunc(("clipping rect %d (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
966 }
967
968 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
969 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
970
971 /* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
972 SVGA3dSurfaceImageId src;
973 src.sid = srcImage.sid;
974 src.mipmap = 0;
975 src.face = 0;
976
977 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
978 if (pScreen->pHwScreen)
979 {
980 /* Use the backend accelerated method, if available. */
981 if (pSvgaR3State->pFuncs3D)
982 {
983 int rc = pSvgaR3State->pFuncs3D->pfnSurfaceBlitToScreen(pThisCC, pScreen, destRect, src, srcRect, cRects, pRect);
984 if (rc == VINF_SUCCESS)
985 {
986 return VINF_SUCCESS;
987 }
988 }
989 }
990
991 if (pSvgaR3State->pFuncsMap)
992 return vmsvga3dScreenUpdate(pThisCC, idDstScreen, destRect, src, srcRect, cRects, pRect);
993
994 /** @todo scaling */
995 AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
996
997 SVGA3dCopyBox box;
998 SVGAGuestImage dest;
999
1000 box.srcz = 0;
1001 box.z = 0;
1002 box.d = 1;
1003
1004 dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
1005 dest.ptr.offset = pScreen->offVRAM;
1006 dest.pitch = pScreen->cbPitch;
1007
1008 if (cRects == 0)
1009 {
1010 /* easy case; no clipping */
1011
1012 /* SVGA_3D_CMD_SURFACE_DMA:
1013 * 'define the "source" in each copyBox as the guest image and the
1014 * "destination" as the host image, regardless of transfer direction.'
1015 *
1016 * Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
1017 * it must set the copyBox "source" to the guest destination coords and
1018 * the copyBox "destination" to the host surface source coords.
1019 */
1020 /* Host image. */
1021 box.x = srcRect.left;
1022 box.y = srcRect.top;
1023 box.w = srcRect.right - srcRect.left;
1024 box.h = srcRect.bottom - srcRect.top;
1025 /* Guest image. */
1026 box.srcx = destRect.left;
1027 box.srcy = destRect.top;
1028
1029 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1030 AssertRCReturn(rc, rc);
1031
1032 /* Update the guest image, which is at box.src. */
1033 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1034 }
1035 else
1036 {
1037 /** @todo merge into one SurfaceDMA call */
1038 for (uint32_t i = 0; i < cRects; i++)
1039 {
1040 /* "The clip rectangle coordinates are measured
1041 * relative to the top-left corner of destRect."
1042 * Therefore they are relative to the top-left corner of srcRect as well.
1043 */
1044
1045 /* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
1046 box.x = srcRect.left + pRect[i].left;
1047 box.y = srcRect.top + pRect[i].top;
1048 box.w = pRect[i].right - pRect[i].left;
1049 box.h = pRect[i].bottom - pRect[i].top;
1050 /* Guest image. The target screen memory is currently in the guest VRAM. */
1051 box.srcx = destRect.left + pRect[i].left;
1052 box.srcy = destRect.top + pRect[i].top;
1053
1054 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1055 AssertRCReturn(rc, rc);
1056
1057 /* Update the guest image, which is at box.src. */
1058 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1059 }
1060 }
1061
1062 return VINF_SUCCESS;
1063}
1064
1065int vmsvga3dScreenUpdate(PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect const &dstRect,
1066 SVGA3dSurfaceImageId const &srcImage, SVGASignedRect const &srcRect,
1067 uint32_t cDstClipRects, SVGASignedRect *paDstClipRect)
1068{
1069 //DEBUG_BREAKPOINT_TEST();
1070 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1071
1072#ifdef LOG_ENABLED
1073 LogFunc(("[%u] %d,%d %d,%d (%dx%d) -> %d,%d %d,%d (%dx%d), %u clip rects\n",
1074 idDstScreen, srcRect.left, srcRect.top, srcRect.right, srcRect.bottom,
1075 srcRect.right - srcRect.left, srcRect.bottom - srcRect.top,
1076 dstRect.left, dstRect.top, dstRect.right, dstRect.bottom,
1077 dstRect.right - dstRect.left, dstRect.bottom - dstRect.top, cDstClipRects));
1078 for (uint32_t i = 0; i < cDstClipRects; i++)
1079 {
1080 LogFunc((" [%u] %d,%d %d,%d (%dx%d)\n",
1081 i, paDstClipRect[i].left, paDstClipRect[i].top, paDstClipRect[i].right, paDstClipRect[i].bottom,
1082 paDstClipRect[i].right - paDstClipRect[i].left, paDstClipRect[i].bottom - paDstClipRect[i].top));
1083 }
1084#endif
1085
1086 PVMSVGA3DSURFACE pSurface;
1087 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcImage.sid, &pSurface);
1088 AssertRCReturn(rc, rc);
1089
1090 /* Update the screen from a surface. */
1091 ASSERT_GUEST_RETURN(idDstScreen < RT_ELEMENTS(pSvgaR3State->aScreens), VERR_INVALID_PARAMETER);
1092 RT_UNTRUSTED_VALIDATED_FENCE();
1093
1094 VMSVGASCREENOBJECT *pScreen = &pSvgaR3State->aScreens[idDstScreen];
1095
1096 if ( srcRect.right <= srcRect.left
1097 || srcRect.bottom <= srcRect.top)
1098 return VINF_SUCCESS; /* Empty src rect. */
1099
1100 if ( dstRect.right <= dstRect.left
1101 || dstRect.bottom <= dstRect.top)
1102 return VINF_SUCCESS; /* Empty dst rect. */
1103 RT_UNTRUSTED_VALIDATED_FENCE();
1104
1105 ASSERT_GUEST_RETURN( srcRect.right - srcRect.left == dstRect.right - dstRect.left
1106 && srcRect.bottom - srcRect.top == dstRect.bottom - dstRect.top,
1107 VERR_INVALID_PARAMETER); /* Stretch is not supported. */
1108
1109 /* Destination box should be within the screen rectangle. */
1110 SVGA3dBox dstBox;
1111 dstBox.x = dstRect.left;
1112 dstBox.y = dstRect.top;
1113 dstBox.z = 0;
1114 dstBox.w = dstRect.right - dstRect.left;
1115 dstBox.h = dstRect.bottom - dstRect.top;
1116 dstBox.d = 1;
1117
1118 SVGA3dSize dstBound;
1119 dstBound.width = pScreen->cWidth;
1120 dstBound.height = pScreen->cHeight;
1121 dstBound.depth = 1;
1122
1123 vmsvgaR3ClipBox(&dstBound, &dstBox);
1124 ASSERT_GUEST_RETURN(dstBox.w > 0 && dstBox.h > 0, VERR_INVALID_PARAMETER);
1125 RT_UNTRUSTED_VALIDATED_FENCE();
1126
1127 /* All dst clip rects will be clipped by the dst box because
1128 * "The clip rectangle coordinates are measured relative to the top-left corner of destRect."
1129 * Therefore they are relative to the top-left corner of srcRect as well.
1130 */
1131 dstBound.width = dstBox.w;
1132 dstBound.height = dstBox.h;
1133 dstBound.depth = 1;
1134
1135 SVGA3dBox srcBox; /* SurfaceMap will clip the box as necessary (srcMap.box). */
1136 srcBox.x = srcRect.left;
1137 srcBox.y = srcRect.top;
1138 srcBox.z = 0;
1139 srcBox.w = srcRect.right - srcRect.left;
1140 srcBox.h = srcRect.bottom - srcRect.top;
1141 srcBox.d = 1;
1142
1143 VMSVGA3D_MAPPED_SURFACE srcMap;
1144 rc = vmsvga3dSurfaceMap(pThisCC, &srcImage, &srcBox, VMSVGA3D_SURFACE_MAP_READ, &srcMap);
1145 if (RT_SUCCESS(rc))
1146 {
1147 uint8_t const *pu8Src = (uint8_t *)srcMap.pvData;
1148
1149 uint32_t const cbDst = pScreen->cHeight * pScreen->cbPitch;
1150 uint8_t *pu8Dst;
1151 if (pScreen->pvScreenBitmap)
1152 pu8Dst = (uint8_t *)pScreen->pvScreenBitmap;
1153 else
1154 pu8Dst = (uint8_t *)pThisCC->pbVRam + pScreen->offVRAM;
1155
1156 SVGASignedRect dstClipRect;
1157 if (cDstClipRects == 0)
1158 {
1159 /* Entire source rect "relative to the top-left corner of destRect." */
1160 dstClipRect.left = 0;
1161 dstClipRect.top = 0;
1162 dstClipRect.right = dstBox.w;
1163 dstClipRect.bottom = dstBox.h;
1164
1165 cDstClipRects = 1;
1166 paDstClipRect = &dstClipRect;
1167 }
1168
1169 for (uint32_t i = 0; i < cDstClipRects; i++)
1170 {
1171 SVGASignedRect const *pDstClipRect = &paDstClipRect[i];
1172
1173 SVGA3dBox box;
1174 box.x = pDstClipRect->left;
1175 box.y = pDstClipRect->top;
1176 box.z = 0;
1177 box.w = pDstClipRect->right - pDstClipRect->left;
1178 box.h = pDstClipRect->bottom - pDstClipRect->top;
1179 box.d = 1;
1180
1181 vmsvgaR3ClipBox(&dstBound, &box);
1182 ASSERT_GUEST_CONTINUE(box.w > 0 && box.h > 0);
1183
1184 /* 'pu8Src' points to the mapped 'srcRect'. Take the clipping box into account. */
1185 uint8_t const *pu8SrcBox = pu8Src
1186 + ((box.x + pSurface->cxBlock - 1) / pSurface->cxBlock) * pSurface->cxBlock * pSurface->cbBlock
1187 + ((box.y + pSurface->cyBlock - 1) / pSurface->cyBlock) * pSurface->cyBlock * srcMap.cbRowPitch;
1188
1189 /* The 'box' is actually in the destination coordinates relative to the top-left corner of destRect.
1190 * Therefore it is relative to the top-left corner of srcRect as well.
1191 */
1192 box.x += srcBox.x;
1193 box.y += srcBox.y;
1194
1195 VMSGA3D_BOX_DIMENSIONS srcDims;
1196 rc = vmsvga3dGetBoxDimensions(pThisCC, &srcImage, &box, &srcDims);
1197 if (RT_SUCCESS(rc))
1198 {
1199 AssertContinue(srcDims.cyBlocks > 0);
1200
1201 ASSERT_GUEST_BREAK( srcDims.offBox <= cbDst
1202 && pScreen->cbPitch * (srcDims.cyBlocks - 1) + srcDims.cbRow <= cbDst - srcDims.offBox);
1203 RT_UNTRUSTED_VALIDATED_FENCE();
1204
1205 uint8_t *pu8DstBox = pu8Dst + srcDims.offBox;
1206
1207 if ( pSurface->format == SVGA3D_R8G8B8A8_UNORM
1208 || pSurface->format == SVGA3D_R8G8B8A8_UNORM_SRGB)
1209 {
1210 for (uint32_t iRow = 0; iRow < srcDims.cyBlocks; ++iRow)
1211 {
1212 for (uint32_t x = 0; x < box.w * 4; x += 4) /* 'x' is a byte index. */
1213 {
1214 pu8DstBox[x ] = pu8SrcBox[x + 2];
1215 pu8DstBox[x + 1] = pu8SrcBox[x + 1];
1216 pu8DstBox[x + 2] = pu8SrcBox[x ];
1217 pu8DstBox[x + 3] = pu8SrcBox[x + 3];
1218 }
1219
1220 pu8SrcBox += srcMap.cbRowPitch;
1221 pu8DstBox += pScreen->cbPitch;
1222 }
1223 }
1224 else
1225 {
1226 for (uint32_t iRow = 0; iRow < srcDims.cyBlocks; ++iRow)
1227 {
1228 memcpy(pu8DstBox, pu8SrcBox, srcDims.cbRow);
1229
1230 pu8SrcBox += srcMap.cbRowPitch;
1231 pu8DstBox += pScreen->cbPitch;
1232 }
1233 }
1234 }
1235 }
1236
1237 vmsvga3dSurfaceUnmap(pThisCC, &srcImage, &srcMap, /* fWritten = */ false);
1238
1239 vmsvgaR3UpdateScreen(pThisCC, pScreen, dstBox.x, dstBox.y, dstBox.w, dstBox.h);
1240 }
1241
1242 return rc;
1243}
1244
1245int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
1246{
1247 /* Deprecated according to svga3d_reg.h. */
1248 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1249 AssertReturn(pState, VERR_NO_MEMORY);
1250
1251 PVMSVGA3DSURFACE pSurface;
1252 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1253 AssertRCReturn(rc, rc);
1254
1255 /** @todo Detect screen from coords? Or split rect to screens? */
1256 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
1257 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
1258
1259 /* If there are no recangles specified, just grab a screenful. */
1260 SVGA3dCopyRect DummyRect;
1261 if (cRects != 0)
1262 { /* likely */ }
1263 else
1264 {
1265 /** @todo Find the usecase for this or check what the original device does.
1266 * The original code was doing some scaling based on the surface
1267 * size... */
1268 AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
1269 DummyRect.x = DummyRect.srcx = 0;
1270 DummyRect.y = DummyRect.srcy = 0;
1271 DummyRect.w = pScreen->cWidth;
1272 DummyRect.h = pScreen->cHeight;
1273 cRects = 1;
1274 pRect = &DummyRect;
1275 }
1276
1277 uint32_t i;
1278 for (i = 0; i < cRects; ++i)
1279 {
1280 uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
1281 SVGASignedRect destRect;
1282 destRect.left = pRect[i].x;
1283 destRect.top = pRect[i].y;
1284 destRect.right = pRect[i].x + pRect[i].w;
1285 destRect.bottom = pRect[i].y + pRect[i].h;
1286
1287 SVGA3dSurfaceImageId src;
1288 src.sid = sid;
1289 src.face = 0;
1290 src.mipmap = 0;
1291
1292 SVGASignedRect srcRect;
1293 srcRect.left = pRect[i].srcx;
1294 srcRect.top = pRect[i].srcy;
1295 srcRect.right = pRect[i].srcx + pRect[i].w;
1296 srcRect.bottom = pRect[i].srcy + pRect[i].h;
1297
1298 /* Entire rect. */
1299 rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
1300 AssertRCReturn(rc, rc);
1301 }
1302
1303 return VINF_SUCCESS;
1304}
1305
1306int vmsvga3dDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1307{
1308 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1309 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1310
1311 if (pScreen->pHwScreen)
1312 {
1313 pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1314 }
1315
1316 int rc = pSvgaR3State->pFuncs3D->pfnDefineScreen(pThis, pThisCC, pScreen);
1317 if (RT_SUCCESS(rc))
1318 {
1319 LogRelMax(1, ("VMSVGA: using accelerated graphics output\n"));
1320 }
1321 return rc;
1322}
1323
1324int vmsvga3dDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1325{
1326 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1327 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1328
1329 return pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1330}
1331
1332int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap)
1333{
1334 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1335 AssertReturn(pState, VERR_INVALID_STATE);
1336
1337 PVMSVGA3DSURFACE pSurface;
1338 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1339 AssertRCReturn(rc, rc);
1340
1341 if (face == SVGA_ID_INVALID && mipmap == SVGA_ID_INVALID)
1342 {
1343 /* This is a notification that "All images can be lost", i.e. the backend surface is not needed anymore. */
1344 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1345 if (pSvgaR3State->pFuncs3D)
1346 pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, false, pSurface);
1347
1348 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
1349 {
1350 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1351 pMipmapLevel->fDirty = true;
1352 }
1353 }
1354 else
1355 {
1356 PVMSVGA3DMIPMAPLEVEL pMipmapLevel;
1357 rc = vmsvga3dMipmapLevel(pSurface, face, mipmap, &pMipmapLevel);
1358 AssertRCReturn(rc, rc);
1359
1360 /* Invalidate views, etc. */
1361 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1362 if (pSvgaR3State->pFuncs3D)
1363 pSvgaR3State->pFuncs3D->pfnSurfaceInvalidateImage(pThisCC, pSurface, face, mipmap);
1364
1365 pMipmapLevel->fDirty = true;
1366 }
1367 pSurface->fDirty = true;
1368
1369 return rc;
1370}
1371
1372
1373/*
1374 *
1375 * 3D
1376 *
1377 */
1378
1379int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
1380{
1381 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1382 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1383 return pSvgaR3State->pFuncs3D->pfnQueryCaps(pThisCC, idx3dCaps, pu32Val);
1384}
1385
1386int vmsvga3dChangeMode(PVGASTATECC pThisCC)
1387{
1388 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1389 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1390 return pSvgaR3State->pFuncs3D->pfnChangeMode(pThisCC);
1391}
1392
1393int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src, uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
1394{
1395 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1396 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1397 return pSvgaR3State->pFuncs3D->pfnSurfaceCopy(pThisCC, dest, src, cCopyBoxes, pBox);
1398}
1399
1400void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
1401{
1402 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1403 AssertReturnVoid(pSvgaR3State->pFuncs3D);
1404 pSvgaR3State->pFuncs3D->pfnUpdateHostScreenViewport(pThisCC, idScreen, pOldViewport);
1405}
1406
1407/**
1408 * Updates the heap buffers for all surfaces or one specific one.
1409 *
1410 * @param pThisCC The VGA/VMSVGA state for ring-3.
1411 * @param sid The surface ID, UINT32_MAX if all.
1412 * @thread VMSVGAFIFO
1413 */
1414void vmsvga3dUpdateHeapBuffersForSurfaces(PVGASTATECC pThisCC, uint32_t sid)
1415{
1416 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1417 AssertReturnVoid(pSvgaR3State->pFuncs3D);
1418
1419 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1420 AssertReturnVoid(pState);
1421
1422 if (sid == UINT32_MAX)
1423 {
1424 uint32_t cSurfaces = pState->cSurfaces;
1425 for (sid = 0; sid < cSurfaces; sid++)
1426 {
1427 PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1428 if (pSurface && pSurface->id == sid)
1429 pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1430 }
1431 }
1432 else if (sid < pState->cSurfaces)
1433 {
1434 PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1435 if (pSurface && pSurface->id == sid)
1436 pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1437 }
1438}
1439
1440
1441/*
1442 *
1443 * VGPU9
1444 *
1445 */
1446
1447int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
1448{
1449 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1450 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1451 return pSvgaR3State->pFuncsVGPU9->pfnContextDefine(pThisCC, cid);
1452}
1453
1454int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
1455{
1456 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1457 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1458 return pSvgaR3State->pFuncsVGPU9->pfnContextDestroy(pThisCC, cid);
1459}
1460
1461int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
1462{
1463 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1464 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1465 return pSvgaR3State->pFuncsVGPU9->pfnSetTransform(pThisCC, cid, type, matrix);
1466}
1467
1468int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
1469{
1470 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1471 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1472 return pSvgaR3State->pFuncsVGPU9->pfnSetZRange(pThisCC, cid, zRange);
1473}
1474
1475int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
1476{
1477 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1478 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1479 return pSvgaR3State->pFuncsVGPU9->pfnSetRenderState(pThisCC, cid, cRenderStates, pRenderState);
1480}
1481
1482int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
1483{
1484 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1485 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1486 return pSvgaR3State->pFuncsVGPU9->pfnSetRenderTarget(pThisCC, cid, type, target);
1487}
1488
1489int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
1490{
1491 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1492 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1493 return pSvgaR3State->pFuncsVGPU9->pfnSetTextureState(pThisCC, cid, cTextureStates, pTextureState);
1494}
1495
1496int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
1497{
1498 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1499 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1500 return pSvgaR3State->pFuncsVGPU9->pfnSetMaterial(pThisCC, cid, face, pMaterial);
1501}
1502
1503int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
1504{
1505 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1506 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1507 return pSvgaR3State->pFuncsVGPU9->pfnSetLightData(pThisCC, cid, index, pData);
1508}
1509
1510int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
1511{
1512 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1513 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1514 return pSvgaR3State->pFuncsVGPU9->pfnSetLightEnabled(pThisCC, cid, index, enabled);
1515}
1516
1517int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1518{
1519 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1520 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1521 return pSvgaR3State->pFuncsVGPU9->pfnSetViewPort(pThisCC, cid, pRect);
1522}
1523
1524int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
1525{
1526 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1527 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1528 return pSvgaR3State->pFuncsVGPU9->pfnSetClipPlane(pThisCC, cid, index, plane);
1529}
1530
1531int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth, uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
1532{
1533 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1534 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1535 return pSvgaR3State->pFuncsVGPU9->pfnCommandClear(pThisCC, cid, clearFlag, color, depth, stencil, cRects, pRect);
1536}
1537
1538int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl, uint32_t numRanges, SVGA3dPrimitiveRange *pNumRange, uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
1539{
1540 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1541 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1542 return pSvgaR3State->pFuncsVGPU9->pfnDrawPrimitives(pThisCC, cid, numVertexDecls, pVertexDecl, numRanges, pNumRange, cVertexDivisor, pVertexDivisor);
1543}
1544
1545int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1546{
1547 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1548 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1549 return pSvgaR3State->pFuncsVGPU9->pfnSetScissorRect(pThisCC, cid, pRect);
1550}
1551
1552int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
1553{
1554 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1555 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1556 return pSvgaR3State->pFuncsVGPU9->pfnGenerateMipmaps(pThisCC, sid, filter);
1557}
1558
1559int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type, uint32_t cbData, uint32_t *pShaderData)
1560{
1561 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1562 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1563 return pSvgaR3State->pFuncsVGPU9->pfnShaderDefine(pThisCC, cid, shid, type, cbData, pShaderData);
1564}
1565
1566int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
1567{
1568 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1569 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1570 return pSvgaR3State->pFuncsVGPU9->pfnShaderDestroy(pThisCC, cid, shid, type);
1571}
1572
1573int vmsvga3dShaderSet(PVGASTATECC pThisCC, struct VMSVGA3DCONTEXT *pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
1574{
1575 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1576 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1577 return pSvgaR3State->pFuncsVGPU9->pfnShaderSet(pThisCC, pContext, cid, type, shid);
1578}
1579
1580int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type, SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
1581{
1582 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1583 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1584 return pSvgaR3State->pFuncsVGPU9->pfnShaderSetConst(pThisCC, cid, reg, type, ctype, cRegisters, pValues);
1585}
1586
1587
1588/*
1589 *
1590 * Map
1591 *
1592 */
1593
1594void vmsvga3dSurfaceMapInit(VMSVGA3D_MAPPED_SURFACE *pMap, VMSVGA3D_SURFACE_MAP enmMapType, SVGA3dBox const *pBox,
1595 PVMSVGA3DSURFACE pSurface, void *pvData, uint32_t cbRowPitch, uint32_t cbDepthPitch)
1596{
1597 uint32_t const cxBlocks = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1598 uint32_t const cyBlocks = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1599
1600 pMap->enmMapType = enmMapType;
1601 pMap->format = pSurface->format;
1602 pMap->box = *pBox;
1603 pMap->cbBlock = pSurface->cbBlock;
1604 pMap->cbRow = cxBlocks * pSurface->cbBlock;
1605 pMap->cbRowPitch = cbRowPitch;
1606 pMap->cRows = cyBlocks;
1607 pMap->cbDepthPitch = cbDepthPitch;
1608 pMap->pvData = (uint8_t *)pvData
1609 + (pBox->x / pSurface->cxBlock) * pSurface->cbBlock
1610 + (pBox->y / pSurface->cyBlock) * cbRowPitch
1611 + pBox->z * cbDepthPitch;
1612}
1613
1614
1615int vmsvga3dSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
1616 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
1617{
1618 PVMSVGA3DSURFACE pSurface;
1619 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1620 AssertRCReturn(rc, rc);
1621
1622 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1623 {
1624 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1625 AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1626 return pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, pImage, pBox, enmMapType, pMap);
1627 }
1628
1629 PVMSVGA3DMIPMAPLEVEL pMipLevel;
1630 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1631 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1632
1633 if (!pMipLevel->pSurfaceData)
1634 {
1635 rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
1636 AssertRCReturn(rc, rc);
1637 }
1638
1639 SVGA3dBox clipBox;
1640 if (pBox)
1641 {
1642 clipBox = *pBox;
1643 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1644 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1645 }
1646 else
1647 {
1648 clipBox.x = 0;
1649 clipBox.y = 0;
1650 clipBox.z = 0;
1651 clipBox.w = pMipLevel->mipmapSize.width;
1652 clipBox.h = pMipLevel->mipmapSize.height;
1653 clipBox.d = pMipLevel->mipmapSize.depth;
1654 }
1655
1656 /// @todo Zero the box?
1657 //if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD)
1658 // RT_BZERO(.);
1659
1660 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
1661 pMipLevel->pSurfaceData, pMipLevel->cbSurfacePitch, pMipLevel->cbSurfacePlane);
1662
1663 LogFunc(("SysMem: sid = %u, pvData %p\n", pImage->sid, pMap->pvData));
1664 return VINF_SUCCESS;
1665}
1666
1667int vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
1668{
1669 PVMSVGA3DSURFACE pSurface;
1670 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1671 AssertRCReturn(rc, rc);
1672
1673 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1674 {
1675 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1676 AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1677 return pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, pImage, pMap, fWritten);
1678 }
1679
1680 PVMSVGA3DMIPMAPLEVEL pMipLevel;
1681 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1682 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1683
1684 if ( fWritten
1685 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
1686 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
1687 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
1688 {
1689 pMipLevel->fDirty = true;
1690 pSurface->fDirty = true;
1691 }
1692
1693 return VINF_SUCCESS;
1694}
1695
1696
1697int vmsvga3dCalcSurfaceMipmapAndFace(PVGASTATECC pThisCC, uint32_t sid, uint32_t iSubresource, uint32_t *piMipmap, uint32_t *piFace)
1698{
1699 PVMSVGA3DSURFACE pSurface;
1700 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1701 AssertRCReturn(rc, rc);
1702
1703 vmsvga3dCalcMipmapAndFace(pSurface->cLevels, iSubresource, piMipmap, piFace);
1704 return VINF_SUCCESS;
1705}
1706
1707
1708uint32_t vmsvga3dCalcSubresourceOffset(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage)
1709{
1710 PVMSVGA3DSURFACE pSurface;
1711 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1712 AssertRCReturn(rc, 0);
1713
1714 ASSERT_GUEST_RETURN(pImage->face < pSurface->surfaceDesc.numArrayElements, 0);
1715
1716 uint32_t offMipLevel = 0;
1717 for (uint32_t i = 0; i < pImage->mipmap; ++i)
1718 {
1719 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1720 offMipLevel += pMipmapLevel->cbSurface;
1721 }
1722
1723 uint32_t offSubresource = pSurface->surfaceDesc.cbArrayElement * pImage->face + offMipLevel;
1724 /** @todo Multisample? */
1725 return offSubresource;
1726}
1727
1728
1729uint32_t vmsvga3dGetArrayElements(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1730{
1731 PVMSVGA3DSURFACE pSurface;
1732 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1733 AssertRCReturn(rc, 0);
1734
1735 return pSurface->surfaceDesc.numArrayElements;
1736}
1737
1738
1739uint32_t vmsvga3dGetSubresourceCount(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1740{
1741 PVMSVGA3DSURFACE pSurface;
1742 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1743 AssertRCReturn(rc, 0);
1744
1745 return pSurface->surfaceDesc.numArrayElements * pSurface->cLevels;
1746}
1747
1748
1749/*
1750 * Calculates memory layout of a surface box for memcpy:
1751 */
1752int vmsvga3dGetBoxDimensions(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
1753 VMSGA3D_BOX_DIMENSIONS *pResult)
1754{
1755 PVMSVGA3DSURFACE pSurface;
1756 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1757 AssertRCReturn(rc, rc);
1758
1759 PVMSVGA3DMIPMAPLEVEL pMipLevel;
1760 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1761 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1762
1763 /* Clip the box. */
1764 SVGA3dBox clipBox;
1765 if (pBox)
1766 {
1767 clipBox = *pBox;
1768 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1769 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1770 }
1771 else
1772 {
1773 clipBox.x = 0;
1774 clipBox.y = 0;
1775 clipBox.z = 0;
1776 clipBox.w = pMipLevel->mipmapSize.width;
1777 clipBox.h = pMipLevel->mipmapSize.height;
1778 clipBox.d = pMipLevel->mipmapSize.depth;
1779 }
1780
1781 uint32_t const cBlocksX = (clipBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1782 uint32_t const cBlocksY = (clipBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1783
1784 pResult->offSubresource = vmsvga3dCalcSubresourceOffset(pThisCC, pImage);
1785 pResult->offBox = (clipBox.x / pSurface->cxBlock) * pSurface->cbBlock
1786 + (clipBox.y / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
1787 + clipBox.z * pMipLevel->cbSurfacePlane;
1788 pResult->cbRow = cBlocksX * pSurface->cbBlock;
1789 pResult->cbPitch = pMipLevel->cbSurfacePitch;
1790 pResult->cyBlocks = cBlocksY;
1791 pResult->cbDepthPitch = pMipLevel->cbSurfacePlane;
1792
1793 return VINF_SUCCESS;
1794}
1795
1796
1797/*
1798 * Whether a legacy 3D backend is used.
1799 * The new DX context can be built together with the legacy D3D9 or OpenGL backend.
1800 * The actual backend is selected at the VM startup.
1801 */
1802bool vmsvga3dIsLegacyBackend(PVGASTATECC pThisCC)
1803{
1804 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1805 return pSvgaR3State->pFuncsDX == NULL;
1806}
1807
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