VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 95288

Last change on this file since 95288 was 95288, checked in by vboxsync, 2 years ago

Devices/Graphics: generic screen update function. bugref:9830
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 70.4 KB
Line 
1/* $Id: DevVGA-SVGA3d.cpp 95288 2022-06-15 15:11:14Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4 */
5
6/*
7 * Copyright (C) 2013-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/vmm/pdmdev.h>
25#include <iprt/errcore.h>
26#include <VBox/log.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
32#include <VBoxVideo.h> /* required by DevVGA.h */
33
34/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
35#include "DevVGA.h"
36
37#include "DevVGA-SVGA.h"
38#include "DevVGA-SVGA3d.h"
39#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
40#include "DevVGA-SVGA3d-internal.h"
41#include "DevVGA-SVGA-internal.h"
42
43
44static int vmsvga3dSurfaceAllocMipLevels(PVMSVGA3DSURFACE pSurface)
45{
46 /* Allocate buffer to hold the surface data until we can move it into a D3D object */
47 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
48 {
49 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
50 AssertReturn(pMipmapLevel->pSurfaceData == NULL, VERR_INVALID_STATE);
51 pMipmapLevel->pSurfaceData = RTMemAllocZ(pMipmapLevel->cbSurface);
52 AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
53 }
54 return VINF_SUCCESS;
55}
56
57
58static void vmsvga3dSurfaceFreeMipLevels(PVMSVGA3DSURFACE pSurface)
59{
60 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
61 {
62 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
63 RTMemFreeZ(pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);
64 pMipmapLevel->pSurfaceData = NULL;
65 }
66}
67
68
69/**
70 * Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
71 * commands (fifo).
72 *
73 * @returns VBox status code (currently ignored).
74 * @param pThisCC The VGA/VMSVGA state for ring-3.
75 * @param sid The ID of the surface to (re-)define.
76 * @param surfaceFlags .
77 * @param format .
78 * @param multisampleCount .
79 * @param autogenFilter .
80 * @param numMipLevels .
81 * @param pMipLevel0Size .
82 * @param arraySize Number of elements in a texture array.
83 * @param fAllocMipLevels .
84 */
85int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, SVGA3dSurfaceAllFlags surfaceFlags, SVGA3dSurfaceFormat format,
86 uint32_t multisampleCount, SVGA3dTextureFilter autogenFilter,
87 uint32_t numMipLevels, SVGA3dSize const *pMipLevel0Size, uint32_t arraySize, bool fAllocMipLevels)
88{
89 PVMSVGA3DSURFACE pSurface;
90 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
91 AssertReturn(pState, VERR_INVALID_STATE);
92
93 LogFunc(("sid=%u surfaceFlags=%#x format=%s (%#x) multiSampleCount=%d autogenFilter=%d, numMipLevels=%d size=(%dx%dx%d)\n",
94 sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
95 numMipLevels, pMipLevel0Size->width, pMipLevel0Size->height, pMipLevel0Size->depth));
96
97 ASSERT_GUEST_RETURN(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
98 ASSERT_GUEST_RETURN(numMipLevels >= 1 && numMipLevels <= SVGA3D_MAX_MIP_LEVELS, VERR_INVALID_PARAMETER);
99 ASSERT_GUEST_RETURN(arraySize <= SVGA3D_MAX_SURFACE_ARRAYSIZE, VERR_INVALID_PARAMETER);
100
101 if (sid >= pState->cSurfaces)
102 {
103 /* Grow the array. */
104 uint32_t cNew = RT_ALIGN(sid + 15, 16);
105 void *pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) * cNew);
106 AssertReturn(pvNew, VERR_NO_MEMORY);
107 pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
108 while (pState->cSurfaces < cNew)
109 {
110 pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
111 AssertReturn(pSurface, VERR_NO_MEMORY);
112 pSurface->id = SVGA3D_INVALID_ID;
113 pState->papSurfaces[pState->cSurfaces++] = pSurface;
114 }
115 }
116 pSurface = pState->papSurfaces[sid];
117
118 /* If one already exists with this id, then destroy it now. */
119 if (pSurface->id != SVGA3D_INVALID_ID)
120 vmsvga3dSurfaceDestroy(pThisCC, sid);
121
122 RT_ZERO(*pSurface);
123 // pSurface->pBackendSurface = NULL;
124 pSurface->id = SVGA3D_INVALID_ID; /* Keep this value until the surface init completes */
125 pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
126
127 if (arraySize)
128 pSurface->surfaceDesc.numArrayElements = arraySize; /* Also for an array of cubemaps where arraySize = 6 * numCubes. */
129 else if (surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
130 pSurface->surfaceDesc.numArrayElements = SVGA3D_MAX_SURFACE_FACES;
131 else
132 pSurface->surfaceDesc.numArrayElements = 1;
133
134 /** @todo This 'switch' and the surfaceFlags tweaks should not be necessary.
135 * The actual surface type will be figured out when the surface is actually used later.
136 * The backends code must be reviewed for unnecessary dependencies on the surfaceFlags value.
137 */
138 /* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
139 * In some case we'll have to wait until the surface is used to create the D3D object.
140 */
141 switch (format)
142 {
143 case SVGA3D_Z_D32:
144 case SVGA3D_Z_D16:
145 case SVGA3D_Z_D24S8:
146 case SVGA3D_Z_D15S1:
147 case SVGA3D_Z_D24X8:
148 case SVGA3D_Z_DF16:
149 case SVGA3D_Z_DF24:
150 case SVGA3D_Z_D24S8_INT:
151 Assert(surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL);
152 surfaceFlags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
153 break;
154
155 /* Texture compression formats */
156 case SVGA3D_DXT1:
157 case SVGA3D_DXT2:
158 case SVGA3D_DXT3:
159 case SVGA3D_DXT4:
160 case SVGA3D_DXT5:
161 /* Bump-map formats */
162 case SVGA3D_BUMPU8V8:
163 case SVGA3D_BUMPL6V5U5:
164 case SVGA3D_BUMPX8L8V8U8:
165 case SVGA3D_V8U8:
166 case SVGA3D_Q8W8V8U8:
167 case SVGA3D_CxV8U8:
168 case SVGA3D_X8L8V8U8:
169 case SVGA3D_A2W10V10U10:
170 case SVGA3D_V16U16:
171 /* Typical render target formats; we should allow render target buffers to be used as textures. */
172 case SVGA3D_X8R8G8B8:
173 case SVGA3D_A8R8G8B8:
174 case SVGA3D_R5G6B5:
175 case SVGA3D_X1R5G5B5:
176 case SVGA3D_A1R5G5B5:
177 case SVGA3D_A4R4G4B4:
178 Assert(surfaceFlags & (SVGA3D_SURFACE_HINT_TEXTURE | SVGA3D_SURFACE_SCREENTARGET));
179 surfaceFlags |= SVGA3D_SURFACE_HINT_TEXTURE;
180 break;
181
182 case SVGA3D_LUMINANCE8:
183 case SVGA3D_LUMINANCE4_ALPHA4:
184 case SVGA3D_LUMINANCE16:
185 case SVGA3D_LUMINANCE8_ALPHA8:
186 case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
187 case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
188 case SVGA3D_A2R10G10B10:
189 case SVGA3D_ALPHA8:
190 case SVGA3D_R_S10E5:
191 case SVGA3D_R_S23E8:
192 case SVGA3D_RG_S10E5:
193 case SVGA3D_RG_S23E8:
194 case SVGA3D_G16R16:
195 case SVGA3D_A16B16G16R16:
196 case SVGA3D_UYVY:
197 case SVGA3D_YUY2:
198 case SVGA3D_NV12:
199 case SVGA3D_FORMAT_DEAD2: /* Old SVGA3D_AYUV */
200 case SVGA3D_ATI1:
201 case SVGA3D_ATI2:
202 break;
203
204 /*
205 * Any surface can be used as a buffer object, but SVGA3D_BUFFER is
206 * the most efficient format to use when creating new surfaces
207 * expressly for index or vertex data.
208 */
209 case SVGA3D_BUFFER:
210 break;
211
212 default:
213 break;
214 }
215
216 pSurface->f.surfaceFlags = surfaceFlags;
217 pSurface->format = format;
218 /* cFaces is 6 for a cubemaps and 1 otherwise. */
219 pSurface->cFaces = (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1);
220 pSurface->cLevels = numMipLevels;
221 pSurface->multiSampleCount = multisampleCount;
222 pSurface->autogenFilter = autogenFilter;
223 Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
224 Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
225 pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(numMipLevels * pSurface->surfaceDesc.numArrayElements * sizeof(VMSVGA3DMIPMAPLEVEL));
226 AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
227
228 pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock);
229 AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
230
231 /** @todo cbMemRemaining = value of SVGA_REG_MOB_MAX_SIZE */
232 uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
233 SVGA3dSize mipmapSize = *pMipLevel0Size;
234 int rc = VINF_SUCCESS;
235
236 for (uint32_t i = 0; i < numMipLevels; ++i)
237 {
238 for (uint32_t iArray = 0; iArray < pSurface->surfaceDesc.numArrayElements; ++iArray)
239 {
240 uint32_t const iMipmap = vmsvga3dCalcSubresource(i, iArray, numMipLevels);
241 LogFunc(("[%d] array %d mip level %d (%d,%d,%d) cbBlock=%#x block %dx%d\n",
242 iMipmap, iArray, i, mipmapSize.width, mipmapSize.height, mipmapSize.depth,
243 pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
244
245 uint32_t cBlocksX;
246 uint32_t cBlocksY;
247 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
248 {
249 cBlocksX = mipmapSize.width;
250 cBlocksY = mipmapSize.height;
251 }
252 else
253 {
254 cBlocksX = mipmapSize.width / pSurface->cxBlock;
255 if (mipmapSize.width % pSurface->cxBlock)
256 ++cBlocksX;
257 cBlocksY = mipmapSize.height / pSurface->cyBlock;
258 if (mipmapSize.height % pSurface->cyBlock)
259 ++cBlocksY;
260 }
261
262 AssertBreakStmt(cBlocksX > 0 && cBlocksY > 0 && mipmapSize.depth > 0, rc = VERR_INVALID_PARAMETER);
263
264 const uint32_t cMaxBlocksX = cbMemRemaining / pSurface->cbBlock;
265 AssertBreakStmt(cBlocksX < cMaxBlocksX, rc = VERR_INVALID_PARAMETER);
266
267 const uint32_t cbSurfacePitch = pSurface->cbBlock * cBlocksX;
268 LogFunc(("cbSurfacePitch=0x%x\n", cbSurfacePitch));
269
270 const uint32_t cMaxBlocksY = cbMemRemaining / cbSurfacePitch;
271 AssertBreakStmt(cBlocksY < cMaxBlocksY, rc = VERR_INVALID_PARAMETER);
272
273 const uint32_t cbSurfacePlane = cbSurfacePitch * cBlocksY;
274
275 const uint32_t cMaxDepth = cbMemRemaining / cbSurfacePlane;
276 AssertBreakStmt(mipmapSize.depth < cMaxDepth, rc = VERR_INVALID_PARAMETER);
277
278 const uint32_t cbSurface = cbSurfacePlane * mipmapSize.depth;
279
280 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iMipmap];
281 pMipmapLevel->mipmapSize = mipmapSize;
282 pMipmapLevel->cBlocksX = cBlocksX;
283 pMipmapLevel->cBlocksY = cBlocksY;
284 pMipmapLevel->cBlocks = cBlocksX * cBlocksY * mipmapSize.depth;
285 pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
286 pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
287 pMipmapLevel->cbSurface = cbSurface;
288 pMipmapLevel->pSurfaceData = NULL;
289
290 cbMemRemaining -= cbSurface;
291 }
292
293 AssertRCBreak(rc);
294
295 mipmapSize.width >>= 1;
296 if (mipmapSize.width == 0) mipmapSize.width = 1;
297 mipmapSize.height >>= 1;
298 if (mipmapSize.height == 0) mipmapSize.height = 1;
299 mipmapSize.depth >>= 1;
300 if (mipmapSize.depth == 0) mipmapSize.depth = 1;
301 }
302
303 AssertLogRelRCReturnStmt(rc, RTMemFree(pSurface->paMipmapLevels), rc);
304
305 /* Compute the size of one array element. */
306 pSurface->surfaceDesc.cbArrayElement = 0;
307 for (uint32_t i = 0; i < pSurface->cLevels; ++i)
308 {
309 PVMSVGA3DMIPMAPLEVEL pMipLevel = &pSurface->paMipmapLevels[i];
310 pSurface->surfaceDesc.cbArrayElement += pMipLevel->cbSurface;
311 }
312
313 if (vmsvga3dIsLegacyBackend(pThisCC))
314 {
315#ifdef VMSVGA3D_DIRECT3D
316 /* pSurface->hSharedObject = NULL; */
317 /* pSurface->pSharedObjectTree = NULL; */
318 /* Translate the format and usage flags to D3D. */
319 pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
320 pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
321 pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
322 pSurface->fUsageD3D = 0;
323 if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
324 pSurface->fUsageD3D |= D3DUSAGE_DYNAMIC;
325 if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
326 pSurface->fUsageD3D |= D3DUSAGE_RENDERTARGET;
327 if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
328 pSurface->fUsageD3D |= D3DUSAGE_DEPTHSTENCIL;
329 if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
330 pSurface->fUsageD3D |= D3DUSAGE_WRITEONLY;
331 if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
332 pSurface->fUsageD3D |= D3DUSAGE_AUTOGENMIPMAP;
333 pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
334 /* pSurface->u.pSurface = NULL; */
335 /* pSurface->bounce.pTexture = NULL; */
336 /* pSurface->emulated.pTexture = NULL; */
337#else
338 /* pSurface->oglId.buffer = OPENGL_INVALID_ID; */
339 /* pSurface->fEmulated = false; */
340 /* pSurface->idEmulated = OPENGL_INVALID_ID; */
341 vmsvga3dSurfaceFormat2OGL(pSurface, format);
342#endif
343 }
344
345#ifdef LOG_ENABLED
346 SVGA3dSurfaceAllFlags const f = surfaceFlags;
347 LogFunc(("surface flags:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x%RX64\n",
348 (f & SVGA3D_SURFACE_CUBEMAP) ? " CUBEMAP" : "",
349 (f & SVGA3D_SURFACE_HINT_STATIC) ? " HINT_STATIC" : "",
350 (f & SVGA3D_SURFACE_HINT_DYNAMIC) ? " HINT_DYNAMIC" : "",
351 (f & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " HINT_INDEXBUFFER" : "",
352 (f & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " HINT_VERTEXBUFFER" : "",
353 (f & SVGA3D_SURFACE_HINT_TEXTURE) ? " HINT_TEXTURE" : "",
354 (f & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " HINT_RENDERTARGET" : "",
355 (f & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " HINT_DEPTHSTENCIL" : "",
356 (f & SVGA3D_SURFACE_HINT_WRITEONLY) ? " HINT_WRITEONLY" : "",
357 (f & SVGA3D_SURFACE_DEAD2) ? " DEAD2" : "",
358 (f & SVGA3D_SURFACE_AUTOGENMIPMAPS) ? " AUTOGENMIPMAPS" : "",
359 (f & SVGA3D_SURFACE_DEAD1) ? " DEAD1" : "",
360 (f & SVGA3D_SURFACE_MOB_PITCH) ? " MOB_PITCH" : "",
361 (f & SVGA3D_SURFACE_INACTIVE) ? " INACTIVE" : "",
362 (f & SVGA3D_SURFACE_HINT_RT_LOCKABLE) ? " HINT_RT_LOCKABLE" : "",
363 (f & SVGA3D_SURFACE_VOLUME) ? " VOLUME" : "",
364 (f & SVGA3D_SURFACE_SCREENTARGET) ? " SCREENTARGET" : "",
365 (f & SVGA3D_SURFACE_ALIGN16) ? " ALIGN16" : "",
366 (f & SVGA3D_SURFACE_1D) ? " 1D" : "",
367 (f & SVGA3D_SURFACE_ARRAY) ? " ARRAY" : "",
368 (f & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) ? " BIND_VERTEX_BUFFER" : "",
369 (f & SVGA3D_SURFACE_BIND_INDEX_BUFFER) ? " BIND_INDEX_BUFFER" : "",
370 (f & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) ? " BIND_CONSTANT_BUFFER" : "",
371 (f & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) ? " BIND_SHADER_RESOURCE" : "",
372 (f & SVGA3D_SURFACE_BIND_RENDER_TARGET) ? " BIND_RENDER_TARGET" : "",
373 (f & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) ? " BIND_DEPTH_STENCIL" : "",
374 (f & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) ? " BIND_STREAM_OUTPUT" : "",
375 (f & SVGA3D_SURFACE_STAGING_UPLOAD) ? " STAGING_UPLOAD" : "",
376 (f & SVGA3D_SURFACE_STAGING_DOWNLOAD) ? " STAGING_DOWNLOAD" : "",
377 (f & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE) ? " HINT_INDIRECT_UPDATE" : "",
378 (f & SVGA3D_SURFACE_TRANSFER_FROM_BUFFER) ? " TRANSFER_FROM_BUFFER" : "",
379 (f & SVGA3D_SURFACE_RESERVED1) ? " RESERVED1" : "",
380 (f & SVGA3D_SURFACE_MULTISAMPLE) ? " MULTISAMPLE" : "",
381 (f & SVGA3D_SURFACE_BIND_UAVIEW) ? " BIND_UAVIEW" : "",
382 (f & SVGA3D_SURFACE_TRANSFER_TO_BUFFER) ? " TRANSFER_TO_BUFFER" : "",
383 (f & SVGA3D_SURFACE_BIND_LOGICOPS) ? " BIND_LOGICOPS" : "",
384 (f & SVGA3D_SURFACE_BIND_RAW_VIEWS) ? " BIND_RAW_VIEWS" : "",
385 (f & SVGA3D_SURFACE_BUFFER_STRUCTURED) ? " BUFFER_STRUCTURED" : "",
386 (f & SVGA3D_SURFACE_DRAWINDIRECT_ARGS) ? " DRAWINDIRECT_ARGS" : "",
387 (f & SVGA3D_SURFACE_RESOURCE_CLAMP) ? " RESOURCE_CLAMP" : "",
388 (f & SVGA3D_SURFACE_FLAG_MAX) ? " FLAG_MAX" : "",
389 f & ~(SVGA3D_SURFACE_FLAG_MAX - 1ULL)
390 ));
391#endif
392
393 Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
394
395 if (fAllocMipLevels)
396 {
397 rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
398 AssertRCReturn(rc, rc);
399 }
400
401 pSurface->id = sid;
402 return VINF_SUCCESS;
403}
404
405
406/**
407 * Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
408 *
409 * @returns VBox status code (currently ignored).
410 * @param pThisCC The VGA/VMSVGA state for ring-3.
411 * @param sid The ID of the surface to destroy.
412 */
413int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
414{
415 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
416 AssertReturn(pState, VERR_NO_MEMORY);
417
418 PVMSVGA3DSURFACE pSurface;
419 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
420 AssertRCReturn(rc, rc);
421
422 LogFunc(("sid=%u\n", sid));
423
424 /* Check all contexts if this surface is used as a render target or active texture. */
425 for (uint32_t cid = 0; cid < pState->cContexts; cid++)
426 {
427 PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
428 if (pContext->id == cid)
429 {
430 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
431 if (pContext->aSidActiveTextures[i] == sid)
432 pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
433 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
434 if (pContext->state.aRenderTargets[i] == sid)
435 pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
436 }
437 }
438
439 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
440 if (pSvgaR3State->pFuncs3D)
441 pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, true, pSurface);
442
443 if (pSurface->paMipmapLevels)
444 {
445 vmsvga3dSurfaceFreeMipLevels(pSurface);
446 RTMemFree(pSurface->paMipmapLevels);
447 }
448
449 memset(pSurface, 0, sizeof(*pSurface));
450 pSurface->id = SVGA3D_INVALID_ID;
451
452 return VINF_SUCCESS;
453}
454
455
456/**
457 * Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
458 *
459 * @returns VBox status code (currently ignored).
460 * @param pThis The shared VGA/VMSVGA state.
461 * @param pThisCC The VGA/VMSVGA state for ring-3.
462 * @param pDstSfcImg
463 * @param pDstBox
464 * @param pSrcSfcImg
465 * @param pSrcBox
466 * @param enmMode
467 */
468int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pDstSfcImg, SVGA3dBox const *pDstBox,
469 SVGA3dSurfaceImageId const *pSrcSfcImg, SVGA3dBox const *pSrcBox, SVGA3dStretchBltMode enmMode)
470{
471 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
472 AssertReturn(pState, VERR_NO_MEMORY);
473
474 int rc;
475
476 uint32_t const sidSrc = pSrcSfcImg->sid;
477 PVMSVGA3DSURFACE pSrcSurface;
478 rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
479 AssertRCReturn(rc, rc);
480
481 uint32_t const sidDst = pDstSfcImg->sid;
482 PVMSVGA3DSURFACE pDstSurface;
483 rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
484 AssertRCReturn(rc, rc);
485
486 AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
487 AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->cLevels, VERR_INVALID_PARAMETER);
488 AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
489 AssertReturn(pDstSfcImg->mipmap < pDstSurface->cLevels, VERR_INVALID_PARAMETER);
490
491 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
492 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
493
494 PVMSVGA3DCONTEXT pContext;
495#ifdef VMSVGA3D_OPENGL
496 LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
497 sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
498 sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
499 pContext = &pState->SharedCtx;
500 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
501#else
502 LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
503 sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
504 sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
505
506 uint32_t cid = pDstSurface->idAssociatedContext;
507 if (cid == SVGA3D_INVALID_ID)
508 cid = pSrcSurface->idAssociatedContext;
509
510 /* At least one of surfaces must be in hardware. */
511 AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
512
513 rc = vmsvga3dContextFromCid(pState, cid, &pContext);
514 AssertRCReturn(rc, rc);
515#endif
516
517 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
518 {
519 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
520 LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->f.s.surface1Flags, pSrcSurface->format));
521 rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pSrcSurface);
522 AssertRCReturn(rc, rc);
523 }
524
525 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
526 {
527 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
528 LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->f.s.surface1Flags, pDstSurface->format));
529 rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pDstSurface);
530 AssertRCReturn(rc, rc);
531 }
532
533 PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
534 rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
535 AssertRCReturn(rc, rc);
536
537 PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
538 rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
539 AssertRCReturn(rc, rc);
540
541 SVGA3dBox clipSrcBox = *pSrcBox;
542 SVGA3dBox clipDstBox = *pDstBox;
543 vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
544 vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
545
546 return pSvgaR3State->pFuncs3D->pfnSurfaceStretchBlt(pThis, pState,
547 pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
548 pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
549 enmMode, pContext);
550}
551
552/**
553 * Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
554 *
555 * @returns VBox status code (currently ignored).
556 * @param pThis The shared VGA/VMSVGA instance data.
557 * @param pThisCC The VGA/VMSVGA state for ring-3.
558 * @param guest .
559 * @param host .
560 * @param transfer .
561 * @param cCopyBoxes .
562 * @param paBoxes .
563 */
564int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestImage guest, SVGA3dSurfaceImageId host,
565 SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
566{
567 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
568 AssertReturn(pState, VERR_NO_MEMORY);
569
570 PVMSVGA3DSURFACE pSurface;
571 int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
572 AssertRCReturn(rc, rc);
573
574 LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
575 (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
576 guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
577 host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
578
579 PVMSVGA3DMIPMAPLEVEL pMipLevel;
580 rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
581 AssertRCReturn(rc, rc);
582
583 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
584 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
585
586 PVMSVGA3DCONTEXT pContext = NULL;
587 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
588 {
589 /*
590 * Not realized in host hardware/library yet, we have to work with
591 * the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
592 */
593 if (!pMipLevel->pSurfaceData)
594 {
595 rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
596 AssertRCReturn(rc, rc);
597 }
598 }
599 else if (vmsvga3dIsLegacyBackend(pThisCC))
600 {
601#ifdef VMSVGA3D_DIRECT3D
602 /* Flush the drawing pipeline for this surface as it could be used in a shared context. */
603 vmsvga3dSurfaceFlush(pSurface);
604#else /* VMSVGA3D_OPENGL */
605 pContext = &pState->SharedCtx;
606 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
607#endif
608 }
609
610 /* SVGA_3D_CMD_SURFACE_DMA:
611 * "define the 'source' in each copyBox as the guest image and the
612 * 'destination' as the host image, regardless of transfer direction."
613 */
614 for (uint32_t i = 0; i < cCopyBoxes; ++i)
615 {
616 Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
617 VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
618 i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
619
620 /* Apparently we're supposed to clip it (gmr test sample) */
621
622 /* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
623 SVGA3dBox hostBox;
624 hostBox.x = paBoxes[i].x;
625 hostBox.y = paBoxes[i].y;
626 hostBox.z = paBoxes[i].z;
627 hostBox.w = paBoxes[i].w;
628 hostBox.h = paBoxes[i].h;
629 hostBox.d = paBoxes[i].d;
630 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
631
632 if ( !hostBox.w
633 || !hostBox.h
634 || !hostBox.d)
635 {
636 Log(("Skip empty box\n"));
637 continue;
638 }
639 RT_UNTRUSTED_VALIDATED_FENCE();
640
641 /* Adjust the guest, i.e. "src", point.
642 * Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
643 */
644 uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
645 uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
646 uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
647
648 /* Calculate offsets of the image blocks for the transfer. */
649 uint32_t u32HostBlockX;
650 uint32_t u32HostBlockY;
651 uint32_t u32GuestBlockX;
652 uint32_t u32GuestBlockY;
653 uint32_t cBlocksX;
654 uint32_t cBlocksY;
655 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
656 {
657 u32HostBlockX = hostBox.x;
658 u32HostBlockY = hostBox.y;
659
660 u32GuestBlockX = srcx;
661 u32GuestBlockY = srcy;
662
663 cBlocksX = hostBox.w;
664 cBlocksY = hostBox.h;
665 }
666 else
667 {
668 /* Pixels to blocks. */
669 u32HostBlockX = hostBox.x / pSurface->cxBlock;
670 u32HostBlockY = hostBox.y / pSurface->cyBlock;
671 Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
672 Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
673
674 u32GuestBlockX = srcx / pSurface->cxBlock;
675 u32GuestBlockY = srcy / pSurface->cyBlock;
676 Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
677 Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
678
679 cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
680 cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
681 }
682
683 uint32_t cbGuestPitch = guest.pitch;
684 if (cbGuestPitch == 0)
685 {
686 /* Host must "assume image is tightly packed". Our surfaces are. */
687 cbGuestPitch = pMipLevel->cbSurfacePitch;
688 }
689 else
690 {
691 /* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
692 AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
693 RT_UNTRUSTED_VALIDATED_FENCE();
694 }
695
696 /* srcx, srcy and srcz values are used to calculate the guest offset.
697 * The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
698 */
699 AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
700 AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
701 AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
702 RT_UNTRUSTED_VALIDATED_FENCE();
703
704 if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
705 || VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
706 {
707 uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
708 u32GuestBlockY * cbGuestPitch +
709 srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
710 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
711
712 /* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
713 uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
714 u32HostBlockY * pMipLevel->cbSurfacePitch +
715 hostBox.z * pMipLevel->cbSurfacePlane;
716 AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
717
718 for (uint32_t z = 0; z < hostBox.d; ++z)
719 {
720 rc = vmsvgaR3GmrTransfer(pThis,
721 pThisCC,
722 transfer,
723 (uint8_t *)pMipLevel->pSurfaceData,
724 pMipLevel->cbSurface,
725 uHostOffset,
726 (int32_t)pMipLevel->cbSurfacePitch,
727 guest.ptr,
728 (uint32_t)uGuestOffset,
729 cbGuestPitch,
730 cBlocksX * pSurface->cbBlock,
731 cBlocksY);
732 AssertRC(rc);
733
734 Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
735 z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
736
737 uHostOffset += pMipLevel->cbSurfacePlane;
738 uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
739 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
740 }
741 }
742
743 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
744 {
745 SVGA3dCopyBox clipBox;
746 clipBox.x = hostBox.x;
747 clipBox.y = hostBox.y;
748 clipBox.z = hostBox.z;
749 clipBox.w = hostBox.w;
750 clipBox.h = hostBox.h;
751 clipBox.d = hostBox.d;
752 clipBox.srcx = srcx;
753 clipBox.srcy = srcy;
754 clipBox.srcz = srcz;
755 rc = pSvgaR3State->pFuncs3D->pfnSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
756 guest.ptr, cbGuestPitch, transfer,
757 &clipBox, pContext, rc, i);
758 AssertRC(rc);
759 }
760 }
761
762 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
763 {
764 pMipLevel->fDirty = true;
765 pSurface->fDirty = true;
766 }
767
768 return rc;
769}
770
771static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr const *pGuestResult,
772 SVGA3dQueryState enmState, uint32_t u32Result)
773{
774 SVGA3dQueryResult queryResult;
775 queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
776 queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
777 queryResult.result32 = u32Result;
778
779 int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
780 (uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
781 *pGuestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
782 AssertRC(rc);
783 return rc;
784}
785
786/* Used with saved state. */
787int vmsvga3dQueryCreate(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
788{
789 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
790 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
791
792 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
793 AssertReturn(pState, VERR_NO_MEMORY);
794
795 LogFunc(("cid=%u type=%d\n", cid, type));
796
797 PVMSVGA3DCONTEXT pContext;
798 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
799 AssertRCReturn(rc, rc);
800
801 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
802 {
803 VMSVGA3DQUERY *p = &pContext->occlusion;
804 if (!VMSVGA3DQUERY_EXISTS(p))
805 {
806 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
807 AssertRCReturn(rc, rc);
808 }
809
810 return VINF_SUCCESS;
811 }
812
813 /* Nothing else for VGPU9. */
814 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
815}
816
817int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
818{
819 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
820 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
821
822 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
823 AssertReturn(pState, VERR_NO_MEMORY);
824
825 LogFunc(("cid=%u type=%d\n", cid, type));
826
827 PVMSVGA3DCONTEXT pContext;
828 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
829 AssertRCReturn(rc, rc);
830
831 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
832 {
833 VMSVGA3DQUERY *p = &pContext->occlusion;
834 if (!VMSVGA3DQUERY_EXISTS(p))
835 {
836 /* Lazy creation of the query object. */
837 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
838 AssertRCReturn(rc, rc);
839 }
840
841 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryBegin(pThisCC, pContext);
842 AssertRCReturn(rc, rc);
843
844 p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
845 p->u32QueryResult = 0;
846
847 return VINF_SUCCESS;
848 }
849
850 /* Nothing else for VGPU9. */
851 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
852}
853
854int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
855{
856 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
857 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
858
859 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
860 AssertReturn(pState, VERR_NO_MEMORY);
861
862 LogFunc(("cid=%u type=%d\n", cid, type));
863
864 PVMSVGA3DCONTEXT pContext;
865 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
866 AssertRCReturn(rc, rc);
867
868 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
869 {
870 VMSVGA3DQUERY *p = &pContext->occlusion;
871 Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
872 AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
873
874 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryEnd(pThisCC, pContext);
875 AssertRCReturn(rc, rc);
876
877 p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
878 return VINF_SUCCESS;
879 }
880
881 /* Nothing else for VGPU9. */
882 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
883}
884
885int vmsvga3dQueryWait(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, PVGASTATE pThis, SVGAGuestPtr const *pGuestResult)
886{
887 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
888 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
889
890 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
891 AssertReturn(pState, VERR_NO_MEMORY);
892
893 LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, pGuestResult->gmrId, pGuestResult->offset));
894
895 PVMSVGA3DCONTEXT pContext;
896 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
897 AssertRCReturn(rc, rc);
898
899 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
900 {
901 VMSVGA3DQUERY *p = &pContext->occlusion;
902 if (VMSVGA3DQUERY_EXISTS(p))
903 {
904 if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
905 {
906 /* Only if not already in SIGNALED state,
907 * i.e. not a second read from the guest or after restoring saved state.
908 */
909 uint32_t u32Pixels = 0;
910 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryGetData(pThisCC, pContext, &u32Pixels);
911 if (RT_SUCCESS(rc))
912 {
913 p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
914 p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
915 }
916 }
917
918 if (RT_SUCCESS(rc))
919 {
920 /* pGuestResult can be NULL when saving the state. */
921 if (pGuestResult)
922 {
923 /* Return data to the guest. */
924 vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
925 }
926 return VINF_SUCCESS;
927 }
928 }
929 else
930 {
931 AssertMsgFailed(("GetData Query is NULL\n"));
932 }
933
934 rc = VERR_INTERNAL_ERROR;
935 }
936 else
937 {
938 rc = VERR_NOT_IMPLEMENTED;
939 }
940
941 if (pGuestResult)
942 vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_FAILED, 0);
943 AssertFailedReturn(rc);
944}
945
946int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
947 SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
948{
949 /* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
950 LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
951 idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
952 srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
953 for (uint32_t i = 0; i < cRects; i++)
954 {
955 LogFunc(("clipping rect %d (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
956 }
957
958 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
959 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
960
961 /* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
962 SVGA3dSurfaceImageId src;
963 src.sid = srcImage.sid;
964 src.mipmap = 0;
965 src.face = 0;
966
967 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
968 if (pScreen->pHwScreen)
969 {
970 /* Use the backend accelerated method, if available. */
971 if (pSvgaR3State->pFuncs3D)
972 {
973 int rc = pSvgaR3State->pFuncs3D->pfnSurfaceBlitToScreen(pThisCC, pScreen, destRect, src, srcRect, cRects, pRect);
974 if (rc == VINF_SUCCESS)
975 {
976 return VINF_SUCCESS;
977 }
978 }
979 }
980
981 if (pSvgaR3State->pFuncsMap)
982 return vmsvga3dScreenUpdate(pThisCC, idDstScreen, destRect, src, srcRect, cRects, pRect);
983
984 /** @todo scaling */
985 AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
986
987 SVGA3dCopyBox box;
988 SVGAGuestImage dest;
989
990 box.srcz = 0;
991 box.z = 0;
992 box.d = 1;
993
994 dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
995 dest.ptr.offset = pScreen->offVRAM;
996 dest.pitch = pScreen->cbPitch;
997
998 if (cRects == 0)
999 {
1000 /* easy case; no clipping */
1001
1002 /* SVGA_3D_CMD_SURFACE_DMA:
1003 * 'define the "source" in each copyBox as the guest image and the
1004 * "destination" as the host image, regardless of transfer direction.'
1005 *
1006 * Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
1007 * it must set the copyBox "source" to the guest destination coords and
1008 * the copyBox "destination" to the host surface source coords.
1009 */
1010 /* Host image. */
1011 box.x = srcRect.left;
1012 box.y = srcRect.top;
1013 box.w = srcRect.right - srcRect.left;
1014 box.h = srcRect.bottom - srcRect.top;
1015 /* Guest image. */
1016 box.srcx = destRect.left;
1017 box.srcy = destRect.top;
1018
1019 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1020 AssertRCReturn(rc, rc);
1021
1022 /* Update the guest image, which is at box.src. */
1023 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1024 }
1025 else
1026 {
1027 /** @todo merge into one SurfaceDMA call */
1028 for (uint32_t i = 0; i < cRects; i++)
1029 {
1030 /* "The clip rectangle coordinates are measured
1031 * relative to the top-left corner of destRect."
1032 * Therefore they are relative to the top-left corner of srcRect as well.
1033 */
1034
1035 /* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
1036 box.x = srcRect.left + pRect[i].left;
1037 box.y = srcRect.top + pRect[i].top;
1038 box.w = pRect[i].right - pRect[i].left;
1039 box.h = pRect[i].bottom - pRect[i].top;
1040 /* Guest image. The target screen memory is currently in the guest VRAM. */
1041 box.srcx = destRect.left + pRect[i].left;
1042 box.srcy = destRect.top + pRect[i].top;
1043
1044 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1045 AssertRCReturn(rc, rc);
1046
1047 /* Update the guest image, which is at box.src. */
1048 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1049 }
1050 }
1051
1052 return VINF_SUCCESS;
1053}
1054
1055int vmsvga3dScreenUpdate(PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect const &dstRect,
1056 SVGA3dSurfaceImageId const &srcImage, SVGASignedRect const &srcRect,
1057 uint32_t cDstClipRects, SVGASignedRect *paDstClipRect)
1058{
1059 //DEBUG_BREAKPOINT_TEST();
1060 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1061
1062#ifdef LOG_ENABLED
1063 LogFunc(("[%u] %d,%d %d,%d (%dx%d) -> %d,%d %d,%d (%dx%d), %u clip rects\n",
1064 idDstScreen, srcRect.left, srcRect.top, srcRect.right, srcRect.bottom,
1065 srcRect.right - srcRect.left, srcRect.bottom - srcRect.top,
1066 dstRect.left, dstRect.top, dstRect.right, dstRect.bottom,
1067 dstRect.right - dstRect.left, dstRect.bottom - dstRect.top, cDstClipRects));
1068 for (uint32_t i = 0; i < cDstClipRects; i++)
1069 {
1070 LogFunc((" [%u] %d,%d %d,%d (%dx%d)\n",
1071 i, paDstClipRect[i].left, paDstClipRect[i].top, paDstClipRect[i].right, paDstClipRect[i].bottom,
1072 paDstClipRect[i].right - paDstClipRect[i].left, paDstClipRect[i].bottom - paDstClipRect[i].top));
1073 }
1074#endif
1075
1076 PVMSVGA3DSURFACE pSurface;
1077 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcImage.sid, &pSurface);
1078 AssertRCReturn(rc, rc);
1079
1080 /* Update the screen from a surface. */
1081 ASSERT_GUEST_RETURN(idDstScreen < RT_ELEMENTS(pSvgaR3State->aScreens), VERR_INVALID_PARAMETER);
1082 RT_UNTRUSTED_VALIDATED_FENCE();
1083
1084 VMSVGASCREENOBJECT *pScreen = &pSvgaR3State->aScreens[idDstScreen];
1085
1086 if ( srcRect.right <= srcRect.left
1087 || srcRect.bottom <= srcRect.top)
1088 return VINF_SUCCESS; /* Empty src rect. */
1089
1090 if ( dstRect.right <= dstRect.left
1091 || dstRect.bottom <= dstRect.top)
1092 return VINF_SUCCESS; /* Empty dst rect. */
1093 RT_UNTRUSTED_VALIDATED_FENCE();
1094
1095 ASSERT_GUEST_RETURN( srcRect.right - srcRect.left == dstRect.right - dstRect.left
1096 && srcRect.bottom - srcRect.top == dstRect.bottom - dstRect.top,
1097 VERR_INVALID_PARAMETER); /* Stretch is not supported. */
1098
1099 /* Destination box should be within the screen rectangle. */
1100 SVGA3dBox dstBox;
1101 dstBox.x = dstRect.left;
1102 dstBox.y = dstRect.top;
1103 dstBox.z = 0;
1104 dstBox.w = dstRect.right - dstRect.left;
1105 dstBox.h = dstRect.bottom - dstRect.top;
1106 dstBox.d = 1;
1107
1108 SVGA3dSize dstBound;
1109 dstBound.width = pScreen->cWidth;
1110 dstBound.height = pScreen->cHeight;
1111 dstBound.depth = 1;
1112
1113 vmsvgaR3ClipBox(&dstBound, &dstBox);
1114 ASSERT_GUEST_RETURN(dstBox.w > 0 && dstBox.h > 0, VERR_INVALID_PARAMETER);
1115 RT_UNTRUSTED_VALIDATED_FENCE();
1116
1117 /* All dst clip rects will be clipped by the dst box because
1118 * "The clip rectangle coordinates are measured relative to the top-left corner of destRect."
1119 * Therefore they are relative to the top-left corner of srcRect as well.
1120 */
1121 dstBound.width = dstBox.w;
1122 dstBound.height = dstBox.h;
1123 dstBound.depth = 1;
1124
1125 SVGA3dBox srcBox; /* SurfaceMap will clip the box as necessary (srcMap.box). */
1126 srcBox.x = srcRect.left;
1127 srcBox.y = srcRect.top;
1128 srcBox.z = 0;
1129 srcBox.w = srcRect.right - srcRect.left;
1130 srcBox.h = srcRect.bottom - srcRect.top;
1131 srcBox.d = 1;
1132
1133 VMSVGA3D_MAPPED_SURFACE srcMap;
1134 rc = vmsvga3dSurfaceMap(pThisCC, &srcImage, &srcBox, VMSVGA3D_SURFACE_MAP_READ, &srcMap);
1135 if (RT_SUCCESS(rc))
1136 {
1137 uint8_t const *pu8Src = (uint8_t *)srcMap.pvData;
1138
1139 uint32_t const cbDst = pScreen->cHeight * pScreen->cbPitch;
1140 uint8_t *pu8Dst;
1141 if (pScreen->pvScreenBitmap)
1142 pu8Dst = (uint8_t *)pScreen->pvScreenBitmap;
1143 else
1144 pu8Dst = (uint8_t *)pThisCC->pbVRam + pScreen->offVRAM;
1145
1146 SVGASignedRect dstClipRect;
1147 if (cDstClipRects == 0)
1148 {
1149 /* Entire source rect "relative to the top-left corner of destRect." */
1150 dstClipRect.left = 0;
1151 dstClipRect.top = 0;
1152 dstClipRect.right = dstBox.w;
1153 dstClipRect.bottom = dstBox.h;
1154
1155 cDstClipRects = 1;
1156 paDstClipRect = &dstClipRect;
1157 }
1158
1159 for (uint32_t i = 0; i < cDstClipRects; i++)
1160 {
1161 SVGASignedRect const *pDstClipRect = &paDstClipRect[i];
1162
1163 SVGA3dBox box;
1164 box.x = pDstClipRect->left;
1165 box.y = pDstClipRect->top;
1166 box.z = 0;
1167 box.w = pDstClipRect->right - pDstClipRect->left;
1168 box.h = pDstClipRect->bottom - pDstClipRect->top;
1169 box.d = 1;
1170
1171 vmsvgaR3ClipBox(&dstBound, &box);
1172 ASSERT_GUEST_CONTINUE(box.w > 0 && box.h > 0);
1173
1174 /* 'pu8Src' points to the mapped 'srcRect'. Take the clipping box into account. */
1175 uint8_t const *pu8SrcBox = pu8Src
1176 + ((box.x + pSurface->cxBlock - 1) / pSurface->cxBlock) * pSurface->cxBlock * pSurface->cbBlock
1177 + ((box.y + pSurface->cyBlock - 1) / pSurface->cyBlock) * pSurface->cyBlock * srcMap.cbRowPitch;
1178
1179 /* The 'box' is actually in the destination coordinates relative to the top-left corner of destRect.
1180 * Therefore it is relative to the top-left corner of srcRect as well.
1181 */
1182 box.x += srcBox.x;
1183 box.y += srcBox.y;
1184
1185 VMSGA3D_BOX_DIMENSIONS srcDims;
1186 rc = vmsvga3dGetBoxDimensions(pThisCC, &srcImage, &box, &srcDims);
1187 if (RT_SUCCESS(rc))
1188 {
1189 AssertContinue(srcDims.cyBlocks > 0);
1190
1191 ASSERT_GUEST_BREAK( srcDims.offBox <= cbDst
1192 && pScreen->cbPitch * (srcDims.cyBlocks - 1) + srcDims.cbRow <= cbDst - srcDims.offBox);
1193 RT_UNTRUSTED_VALIDATED_FENCE();
1194
1195 uint8_t *pu8DstBox = pu8Dst + srcDims.offBox;
1196
1197 if ( pSurface->format == SVGA3D_R8G8B8A8_UNORM
1198 || pSurface->format == SVGA3D_R8G8B8A8_UNORM_SRGB)
1199 {
1200 for (uint32_t iRow = 0; iRow < srcDims.cyBlocks; ++iRow)
1201 {
1202 for (uint32_t x = 0; x < box.w * 4; x += 4) /* 'x' is a byte index. */
1203 {
1204 pu8DstBox[x ] = pu8SrcBox[x + 2];
1205 pu8DstBox[x + 1] = pu8SrcBox[x + 1];
1206 pu8DstBox[x + 2] = pu8SrcBox[x ];
1207 pu8DstBox[x + 3] = pu8SrcBox[x + 3];
1208 }
1209
1210 pu8SrcBox += srcMap.cbRowPitch;
1211 pu8DstBox += pScreen->cbPitch;
1212 }
1213 }
1214 else
1215 {
1216 for (uint32_t iRow = 0; iRow < srcDims.cyBlocks; ++iRow)
1217 {
1218 memcpy(pu8DstBox, pu8SrcBox, srcDims.cbRow);
1219
1220 pu8SrcBox += srcMap.cbRowPitch;
1221 pu8DstBox += pScreen->cbPitch;
1222 }
1223 }
1224 }
1225 }
1226
1227 vmsvga3dSurfaceUnmap(pThisCC, &srcImage, &srcMap, /* fWritten = */ false);
1228
1229 vmsvgaR3UpdateScreen(pThisCC, pScreen, dstBox.x, dstBox.y, dstBox.w, dstBox.h);
1230 }
1231
1232 return rc;
1233}
1234
1235int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
1236{
1237 /* Deprecated according to svga3d_reg.h. */
1238 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1239 AssertReturn(pState, VERR_NO_MEMORY);
1240
1241 PVMSVGA3DSURFACE pSurface;
1242 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1243 AssertRCReturn(rc, rc);
1244
1245 /** @todo Detect screen from coords? Or split rect to screens? */
1246 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
1247 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
1248
1249 /* If there are no recangles specified, just grab a screenful. */
1250 SVGA3dCopyRect DummyRect;
1251 if (cRects != 0)
1252 { /* likely */ }
1253 else
1254 {
1255 /** @todo Find the usecase for this or check what the original device does.
1256 * The original code was doing some scaling based on the surface
1257 * size... */
1258 AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
1259 DummyRect.x = DummyRect.srcx = 0;
1260 DummyRect.y = DummyRect.srcy = 0;
1261 DummyRect.w = pScreen->cWidth;
1262 DummyRect.h = pScreen->cHeight;
1263 cRects = 1;
1264 pRect = &DummyRect;
1265 }
1266
1267 uint32_t i;
1268 for (i = 0; i < cRects; ++i)
1269 {
1270 uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
1271 SVGASignedRect destRect;
1272 destRect.left = pRect[i].x;
1273 destRect.top = pRect[i].y;
1274 destRect.right = pRect[i].x + pRect[i].w;
1275 destRect.bottom = pRect[i].y + pRect[i].h;
1276
1277 SVGA3dSurfaceImageId src;
1278 src.sid = sid;
1279 src.face = 0;
1280 src.mipmap = 0;
1281
1282 SVGASignedRect srcRect;
1283 srcRect.left = pRect[i].srcx;
1284 srcRect.top = pRect[i].srcy;
1285 srcRect.right = pRect[i].srcx + pRect[i].w;
1286 srcRect.bottom = pRect[i].srcy + pRect[i].h;
1287
1288 /* Entire rect. */
1289 rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
1290 AssertRCReturn(rc, rc);
1291 }
1292
1293 return VINF_SUCCESS;
1294}
1295
1296int vmsvga3dDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1297{
1298 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1299 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1300
1301 if (pScreen->pHwScreen)
1302 {
1303 pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1304 }
1305
1306 int rc = pSvgaR3State->pFuncs3D->pfnDefineScreen(pThis, pThisCC, pScreen);
1307 if (RT_SUCCESS(rc))
1308 {
1309 LogRelMax(1, ("VMSVGA: using accelerated graphics output\n"));
1310 }
1311 return rc;
1312}
1313
1314int vmsvga3dDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1315{
1316 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1317 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1318
1319 return pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1320}
1321
1322int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap)
1323{
1324 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1325 AssertReturn(pState, VERR_INVALID_STATE);
1326
1327 PVMSVGA3DSURFACE pSurface;
1328 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1329 AssertRCReturn(rc, rc);
1330
1331 if (face == SVGA_ID_INVALID && mipmap == SVGA_ID_INVALID)
1332 {
1333 /* This is a notification that "All images can be lost", i.e. the backend surface is not needed anymore. */
1334 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1335 if (pSvgaR3State->pFuncs3D)
1336 pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, false, pSurface);
1337
1338 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
1339 {
1340 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1341 pMipmapLevel->fDirty = true;
1342 }
1343 }
1344 else
1345 {
1346 PVMSVGA3DMIPMAPLEVEL pMipmapLevel;
1347 rc = vmsvga3dMipmapLevel(pSurface, face, mipmap, &pMipmapLevel);
1348 AssertRCReturn(rc, rc);
1349
1350 /* Invalidate views, etc. */
1351 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1352 if (pSvgaR3State->pFuncs3D)
1353 pSvgaR3State->pFuncs3D->pfnSurfaceInvalidateImage(pThisCC, pSurface, face, mipmap);
1354
1355 pMipmapLevel->fDirty = true;
1356 }
1357 pSurface->fDirty = true;
1358
1359 return rc;
1360}
1361
1362
1363/*
1364 *
1365 * 3D
1366 *
1367 */
1368
1369int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
1370{
1371 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1372 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1373 return pSvgaR3State->pFuncs3D->pfnQueryCaps(pThisCC, idx3dCaps, pu32Val);
1374}
1375
1376int vmsvga3dChangeMode(PVGASTATECC pThisCC)
1377{
1378 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1379 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1380 return pSvgaR3State->pFuncs3D->pfnChangeMode(pThisCC);
1381}
1382
1383int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src, uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
1384{
1385 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1386 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1387 return pSvgaR3State->pFuncs3D->pfnSurfaceCopy(pThisCC, dest, src, cCopyBoxes, pBox);
1388}
1389
1390void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
1391{
1392 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1393 AssertReturnVoid(pSvgaR3State->pFuncs3D);
1394 pSvgaR3State->pFuncs3D->pfnUpdateHostScreenViewport(pThisCC, idScreen, pOldViewport);
1395}
1396
1397/**
1398 * Updates the heap buffers for all surfaces or one specific one.
1399 *
1400 * @param pThisCC The VGA/VMSVGA state for ring-3.
1401 * @param sid The surface ID, UINT32_MAX if all.
1402 * @thread VMSVGAFIFO
1403 */
1404void vmsvga3dUpdateHeapBuffersForSurfaces(PVGASTATECC pThisCC, uint32_t sid)
1405{
1406 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1407 AssertReturnVoid(pSvgaR3State->pFuncs3D);
1408
1409 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1410 AssertReturnVoid(pState);
1411
1412 if (sid == UINT32_MAX)
1413 {
1414 uint32_t cSurfaces = pState->cSurfaces;
1415 for (sid = 0; sid < cSurfaces; sid++)
1416 {
1417 PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1418 if (pSurface && pSurface->id == sid)
1419 pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1420 }
1421 }
1422 else if (sid < pState->cSurfaces)
1423 {
1424 PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1425 if (pSurface && pSurface->id == sid)
1426 pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1427 }
1428}
1429
1430
1431/*
1432 *
1433 * VGPU9
1434 *
1435 */
1436
1437int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
1438{
1439 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1440 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1441 return pSvgaR3State->pFuncsVGPU9->pfnContextDefine(pThisCC, cid);
1442}
1443
1444int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
1445{
1446 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1447 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1448 return pSvgaR3State->pFuncsVGPU9->pfnContextDestroy(pThisCC, cid);
1449}
1450
1451int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
1452{
1453 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1454 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1455 return pSvgaR3State->pFuncsVGPU9->pfnSetTransform(pThisCC, cid, type, matrix);
1456}
1457
1458int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
1459{
1460 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1461 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1462 return pSvgaR3State->pFuncsVGPU9->pfnSetZRange(pThisCC, cid, zRange);
1463}
1464
1465int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
1466{
1467 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1468 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1469 return pSvgaR3State->pFuncsVGPU9->pfnSetRenderState(pThisCC, cid, cRenderStates, pRenderState);
1470}
1471
1472int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
1473{
1474 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1475 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1476 return pSvgaR3State->pFuncsVGPU9->pfnSetRenderTarget(pThisCC, cid, type, target);
1477}
1478
1479int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
1480{
1481 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1482 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1483 return pSvgaR3State->pFuncsVGPU9->pfnSetTextureState(pThisCC, cid, cTextureStates, pTextureState);
1484}
1485
1486int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
1487{
1488 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1489 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1490 return pSvgaR3State->pFuncsVGPU9->pfnSetMaterial(pThisCC, cid, face, pMaterial);
1491}
1492
1493int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
1494{
1495 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1496 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1497 return pSvgaR3State->pFuncsVGPU9->pfnSetLightData(pThisCC, cid, index, pData);
1498}
1499
1500int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
1501{
1502 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1503 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1504 return pSvgaR3State->pFuncsVGPU9->pfnSetLightEnabled(pThisCC, cid, index, enabled);
1505}
1506
1507int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1508{
1509 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1510 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1511 return pSvgaR3State->pFuncsVGPU9->pfnSetViewPort(pThisCC, cid, pRect);
1512}
1513
1514int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
1515{
1516 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1517 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1518 return pSvgaR3State->pFuncsVGPU9->pfnSetClipPlane(pThisCC, cid, index, plane);
1519}
1520
1521int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth, uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
1522{
1523 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1524 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1525 return pSvgaR3State->pFuncsVGPU9->pfnCommandClear(pThisCC, cid, clearFlag, color, depth, stencil, cRects, pRect);
1526}
1527
1528int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl, uint32_t numRanges, SVGA3dPrimitiveRange *pNumRange, uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
1529{
1530 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1531 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1532 return pSvgaR3State->pFuncsVGPU9->pfnDrawPrimitives(pThisCC, cid, numVertexDecls, pVertexDecl, numRanges, pNumRange, cVertexDivisor, pVertexDivisor);
1533}
1534
1535int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1536{
1537 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1538 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1539 return pSvgaR3State->pFuncsVGPU9->pfnSetScissorRect(pThisCC, cid, pRect);
1540}
1541
1542int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
1543{
1544 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1545 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1546 return pSvgaR3State->pFuncsVGPU9->pfnGenerateMipmaps(pThisCC, sid, filter);
1547}
1548
1549int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type, uint32_t cbData, uint32_t *pShaderData)
1550{
1551 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1552 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1553 return pSvgaR3State->pFuncsVGPU9->pfnShaderDefine(pThisCC, cid, shid, type, cbData, pShaderData);
1554}
1555
1556int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
1557{
1558 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1559 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1560 return pSvgaR3State->pFuncsVGPU9->pfnShaderDestroy(pThisCC, cid, shid, type);
1561}
1562
1563int vmsvga3dShaderSet(PVGASTATECC pThisCC, struct VMSVGA3DCONTEXT *pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
1564{
1565 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1566 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1567 return pSvgaR3State->pFuncsVGPU9->pfnShaderSet(pThisCC, pContext, cid, type, shid);
1568}
1569
1570int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type, SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
1571{
1572 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1573 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1574 return pSvgaR3State->pFuncsVGPU9->pfnShaderSetConst(pThisCC, cid, reg, type, ctype, cRegisters, pValues);
1575}
1576
1577
1578/*
1579 *
1580 * Map
1581 *
1582 */
1583
1584void vmsvga3dSurfaceMapInit(VMSVGA3D_MAPPED_SURFACE *pMap, VMSVGA3D_SURFACE_MAP enmMapType, SVGA3dBox const *pBox,
1585 PVMSVGA3DSURFACE pSurface, void *pvData, uint32_t cbRowPitch, uint32_t cbDepthPitch)
1586{
1587 uint32_t const cxBlocks = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1588 uint32_t const cyBlocks = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1589
1590 pMap->enmMapType = enmMapType;
1591 pMap->format = pSurface->format;
1592 pMap->box = *pBox;
1593 pMap->cbBlock = pSurface->cbBlock;
1594 pMap->cbRow = cxBlocks * pSurface->cbBlock;
1595 pMap->cbRowPitch = cbRowPitch;
1596 pMap->cRows = cyBlocks;
1597 pMap->cbDepthPitch = cbDepthPitch;
1598 pMap->pvData = (uint8_t *)pvData
1599 + (pBox->x / pSurface->cxBlock) * pSurface->cbBlock
1600 + (pBox->y / pSurface->cyBlock) * cbRowPitch
1601 + pBox->z * cbDepthPitch;
1602}
1603
1604
1605int vmsvga3dSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
1606 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
1607{
1608 PVMSVGA3DSURFACE pSurface;
1609 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1610 AssertRCReturn(rc, rc);
1611
1612 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1613 {
1614 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1615 AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1616 return pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, pImage, pBox, enmMapType, pMap);
1617 }
1618
1619 PVMSVGA3DMIPMAPLEVEL pMipLevel;
1620 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1621 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1622
1623 if (!pMipLevel->pSurfaceData)
1624 {
1625 rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
1626 AssertRCReturn(rc, rc);
1627 }
1628
1629 SVGA3dBox clipBox;
1630 if (pBox)
1631 {
1632 clipBox = *pBox;
1633 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1634 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1635 }
1636 else
1637 {
1638 clipBox.x = 0;
1639 clipBox.y = 0;
1640 clipBox.z = 0;
1641 clipBox.w = pMipLevel->mipmapSize.width;
1642 clipBox.h = pMipLevel->mipmapSize.height;
1643 clipBox.d = pMipLevel->mipmapSize.depth;
1644 }
1645
1646 /// @todo Zero the box?
1647 //if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD)
1648 // RT_BZERO(.);
1649
1650 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
1651 pMipLevel->pSurfaceData, pMipLevel->cbSurfacePitch, pMipLevel->cbSurfacePlane);
1652
1653 LogFunc(("SysMem: sid = %u, pvData %p\n", pImage->sid, pMap->pvData));
1654 return VINF_SUCCESS;
1655}
1656
1657int vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
1658{
1659 PVMSVGA3DSURFACE pSurface;
1660 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1661 AssertRCReturn(rc, rc);
1662
1663 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1664 {
1665 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1666 AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1667 return pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, pImage, pMap, fWritten);
1668 }
1669
1670 PVMSVGA3DMIPMAPLEVEL pMipLevel;
1671 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1672 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1673
1674 if ( fWritten
1675 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
1676 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
1677 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
1678 {
1679 pMipLevel->fDirty = true;
1680 pSurface->fDirty = true;
1681 }
1682
1683 return VINF_SUCCESS;
1684}
1685
1686
1687int vmsvga3dCalcSurfaceMipmapAndFace(PVGASTATECC pThisCC, uint32_t sid, uint32_t iSubresource, uint32_t *piMipmap, uint32_t *piFace)
1688{
1689 PVMSVGA3DSURFACE pSurface;
1690 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1691 AssertRCReturn(rc, rc);
1692
1693 vmsvga3dCalcMipmapAndFace(pSurface->cLevels, iSubresource, piMipmap, piFace);
1694 return VINF_SUCCESS;
1695}
1696
1697
1698uint32_t vmsvga3dCalcSubresourceOffset(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage)
1699{
1700 PVMSVGA3DSURFACE pSurface;
1701 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1702 AssertRCReturn(rc, 0);
1703
1704 ASSERT_GUEST_RETURN(pImage->face < pSurface->surfaceDesc.numArrayElements, 0);
1705
1706 uint32_t offMipLevel = 0;
1707 for (uint32_t i = 0; i < pImage->mipmap; ++i)
1708 {
1709 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1710 offMipLevel += pMipmapLevel->cbSurface;
1711 }
1712
1713 uint32_t offSubresource = pSurface->surfaceDesc.cbArrayElement * pImage->face + offMipLevel;
1714 /** @todo Multisample? */
1715 return offSubresource;
1716}
1717
1718
1719uint32_t vmsvga3dGetArrayElements(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1720{
1721 PVMSVGA3DSURFACE pSurface;
1722 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1723 AssertRCReturn(rc, 0);
1724
1725 return pSurface->surfaceDesc.numArrayElements;
1726}
1727
1728
1729uint32_t vmsvga3dGetSubresourceCount(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1730{
1731 PVMSVGA3DSURFACE pSurface;
1732 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1733 AssertRCReturn(rc, 0);
1734
1735 return pSurface->surfaceDesc.numArrayElements * pSurface->cLevels;
1736}
1737
1738
1739/*
1740 * Calculates memory layout of a surface box for memcpy:
1741 */
1742int vmsvga3dGetBoxDimensions(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
1743 VMSGA3D_BOX_DIMENSIONS *pResult)
1744{
1745 PVMSVGA3DSURFACE pSurface;
1746 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1747 AssertRCReturn(rc, rc);
1748
1749 PVMSVGA3DMIPMAPLEVEL pMipLevel;
1750 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1751 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1752
1753 /* Clip the box. */
1754 SVGA3dBox clipBox;
1755 if (pBox)
1756 {
1757 clipBox = *pBox;
1758 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1759 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1760 }
1761 else
1762 {
1763 clipBox.x = 0;
1764 clipBox.y = 0;
1765 clipBox.z = 0;
1766 clipBox.w = pMipLevel->mipmapSize.width;
1767 clipBox.h = pMipLevel->mipmapSize.height;
1768 clipBox.d = pMipLevel->mipmapSize.depth;
1769 }
1770
1771 uint32_t const cBlocksX = (clipBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1772 uint32_t const cBlocksY = (clipBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1773
1774 pResult->offSubresource = vmsvga3dCalcSubresourceOffset(pThisCC, pImage);
1775 pResult->offBox = (clipBox.x / pSurface->cxBlock) * pSurface->cbBlock
1776 + (clipBox.y / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
1777 + clipBox.z * pMipLevel->cbSurfacePlane;
1778 pResult->cbRow = cBlocksX * pSurface->cbBlock;
1779 pResult->cbPitch = pMipLevel->cbSurfacePitch;
1780 pResult->cyBlocks = cBlocksY;
1781 pResult->cbDepthPitch = pMipLevel->cbSurfacePlane;
1782
1783 return VINF_SUCCESS;
1784}
1785
1786
1787/*
1788 * Whether a legacy 3D backend is used.
1789 * The new DX context can be built together with the legacy D3D9 or OpenGL backend.
1790 * The actual backend is selected at the VM startup.
1791 */
1792bool vmsvga3dIsLegacyBackend(PVGASTATECC pThisCC)
1793{
1794 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1795 return pSvgaR3State->pFuncsDX == NULL;
1796}
1797
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette