DevVGA-SVGA3d.cpp@ 94377

Last change on this file since 94377 was 94377, checked in by vboxsync, 3 years ago
Devices/Graphics: surface mapping cleanup and fixes: bugref:9830
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1	/* $Id: DevVGA-SVGA3d.cpp 94377 2022-03-25 18:26:29Z vboxsync $ */
2	/** @file
3	* DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4	*/
5
6	/*
7	* Copyright (C) 2013-2022 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23	#include <VBox/AssertGuest.h>
24	#include <VBox/vmm/pdmdev.h>
25	#include <iprt/errcore.h>
26	#include <VBox/log.h>
27
28	#include <iprt/assert.h>
29	#include <iprt/mem.h>
30
31	#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
32	#include <VBoxVideo.h> /* required by DevVGA.h */
33
34	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
35	#include "DevVGA.h"
36
37	#include "DevVGA-SVGA.h"
38	#include "DevVGA-SVGA3d.h"
39	#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
40	#include "DevVGA-SVGA3d-internal.h"
41	#include "DevVGA-SVGA-internal.h"
42
43
44	static int vmsvga3dSurfaceAllocMipLevels(PVMSVGA3DSURFACE pSurface)
45	{
46	/* Allocate buffer to hold the surface data until we can move it into a D3D object */
47	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
48	{
49	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
50	AssertReturn(pMipmapLevel->pSurfaceData == NULL, VERR_INVALID_STATE);
51	pMipmapLevel->pSurfaceData = RTMemAllocZ(pMipmapLevel->cbSurface);
52	AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
53	}
54	return VINF_SUCCESS;
55	}
56
57
58	static void vmsvga3dSurfaceFreeMipLevels(PVMSVGA3DSURFACE pSurface)
59	{
60	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
61	{
62	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
63	RTMemFreeZ(pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);
64	pMipmapLevel->pSurfaceData = NULL;
65	}
66	}
67
68
69	/**
70	* Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
71	* commands (fifo).
72	*
73	* @returns VBox status code (currently ignored).
74	* @param pThisCC The VGA/VMSVGA state for ring-3.
75	* @param sid The ID of the surface to (re-)define.
76	* @param surfaceFlags .
77	* @param format .
78	* @param multisampleCount .
79	* @param autogenFilter .
80	* @param numMipLevels .
81	* @param pMipLevel0Size .
82	* @param arraySize Number of elements in a texture array.
83	* @param fAllocMipLevels .
84	*/
85	int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, SVGA3dSurface1Flags surfaceFlags, SVGA3dSurfaceFormat format,
86	uint32_t multisampleCount, SVGA3dTextureFilter autogenFilter,
87	uint32_t numMipLevels, SVGA3dSize const *pMipLevel0Size, uint32_t arraySize, bool fAllocMipLevels)
88	{
89	PVMSVGA3DSURFACE pSurface;
90	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
91	AssertReturn(pState, VERR_INVALID_STATE);
92
93	LogFunc(("sid=%u surfaceFlags=%#x format=%s (%#x) multiSampleCount=%d autogenFilter=%d, numMipLevels=%d size=(%dx%dx%d)\n",
94	sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
95	numMipLevels, pMipLevel0Size->width, pMipLevel0Size->height, pMipLevel0Size->depth));
96
97	ASSERT_GUEST_RETURN(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
98	ASSERT_GUEST_RETURN(numMipLevels >= 1 && numMipLevels <= SVGA3D_MAX_MIP_LEVELS, VERR_INVALID_PARAMETER);
99	ASSERT_GUEST_RETURN(arraySize <= SVGA3D_MAX_SURFACE_ARRAYSIZE, VERR_INVALID_PARAMETER);
100
101	if (sid >= pState->cSurfaces)
102	{
103	/* Grow the array. */
104	uint32_t cNew = RT_ALIGN(sid + 15, 16);
105	void pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) cNew);
106	AssertReturn(pvNew, VERR_NO_MEMORY);
107	pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
108	while (pState->cSurfaces < cNew)
109	{
110	pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
111	AssertReturn(pSurface, VERR_NO_MEMORY);
112	pSurface->id = SVGA3D_INVALID_ID;
113	pState->papSurfaces[pState->cSurfaces++] = pSurface;
114	}
115	}
116	pSurface = pState->papSurfaces[sid];
117
118	/* If one already exists with this id, then destroy it now. */
119	if (pSurface->id != SVGA3D_INVALID_ID)
120	vmsvga3dSurfaceDestroy(pThisCC, sid);
121
122	RT_ZERO(*pSurface);
123	// pSurface->pBackendSurface = NULL;
124	pSurface->id = SVGA3D_INVALID_ID; /* Keep this value until the surface init completes */
125	pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
126
127	if (arraySize)
128	pSurface->surfaceDesc.numArrayElements = arraySize; /* Also for an array of cubemaps where arraySize = 6 * numCubes. */
129	else if (surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
130	pSurface->surfaceDesc.numArrayElements = SVGA3D_MAX_SURFACE_FACES;
131	else
132	pSurface->surfaceDesc.numArrayElements = 1;
133
134	/** @todo This 'switch' and the surfaceFlags tweaks should not be necessary.
135	* The actual surface type will be figured out when the surface is actually used later.
136	* The backends code must be reviewed for unnecessary dependencies on the surfaceFlags value.
137	*/
138	/* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
139	* In some case we'll have to wait until the surface is used to create the D3D object.
140	*/
141	switch (format)
142	{
143	case SVGA3D_Z_D32:
144	case SVGA3D_Z_D16:
145	case SVGA3D_Z_D24S8:
146	case SVGA3D_Z_D15S1:
147	case SVGA3D_Z_D24X8:
148	case SVGA3D_Z_DF16:
149	case SVGA3D_Z_DF24:
150	case SVGA3D_Z_D24S8_INT:
151	Assert(surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL);
152	surfaceFlags \|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
153	break;
154
155	/* Texture compression formats */
156	case SVGA3D_DXT1:
157	case SVGA3D_DXT2:
158	case SVGA3D_DXT3:
159	case SVGA3D_DXT4:
160	case SVGA3D_DXT5:
161	/* Bump-map formats */
162	case SVGA3D_BUMPU8V8:
163	case SVGA3D_BUMPL6V5U5:
164	case SVGA3D_BUMPX8L8V8U8:
165	case SVGA3D_V8U8:
166	case SVGA3D_Q8W8V8U8:
167	case SVGA3D_CxV8U8:
168	case SVGA3D_X8L8V8U8:
169	case SVGA3D_A2W10V10U10:
170	case SVGA3D_V16U16:
171	/* Typical render target formats; we should allow render target buffers to be used as textures. */
172	case SVGA3D_X8R8G8B8:
173	case SVGA3D_A8R8G8B8:
174	case SVGA3D_R5G6B5:
175	case SVGA3D_X1R5G5B5:
176	case SVGA3D_A1R5G5B5:
177	case SVGA3D_A4R4G4B4:
178	Assert(surfaceFlags & (SVGA3D_SURFACE_HINT_TEXTURE \| SVGA3D_SURFACE_SCREENTARGET));
179	surfaceFlags \|= SVGA3D_SURFACE_HINT_TEXTURE;
180	break;
181
182	case SVGA3D_LUMINANCE8:
183	case SVGA3D_LUMINANCE4_ALPHA4:
184	case SVGA3D_LUMINANCE16:
185	case SVGA3D_LUMINANCE8_ALPHA8:
186	case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
187	case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
188	case SVGA3D_A2R10G10B10:
189	case SVGA3D_ALPHA8:
190	case SVGA3D_R_S10E5:
191	case SVGA3D_R_S23E8:
192	case SVGA3D_RG_S10E5:
193	case SVGA3D_RG_S23E8:
194	case SVGA3D_G16R16:
195	case SVGA3D_A16B16G16R16:
196	case SVGA3D_UYVY:
197	case SVGA3D_YUY2:
198	case SVGA3D_NV12:
199	case SVGA3D_FORMAT_DEAD2: /* Old SVGA3D_AYUV */
200	case SVGA3D_ATI1:
201	case SVGA3D_ATI2:
202	break;
203
204	/*
205	* Any surface can be used as a buffer object, but SVGA3D_BUFFER is
206	* the most efficient format to use when creating new surfaces
207	* expressly for index or vertex data.
208	*/
209	case SVGA3D_BUFFER:
210	break;
211
212	default:
213	break;
214	}
215
216	pSurface->surfaceFlags = surfaceFlags;
217	pSurface->format = format;
218	/* cFaces is 6 for a cubemaps and 1 otherwise. */
219	pSurface->cFaces = (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1);
220	pSurface->cLevels = numMipLevels;
221	pSurface->multiSampleCount = multisampleCount;
222	pSurface->autogenFilter = autogenFilter;
223	Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
224	Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
225	pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(numMipLevels * pSurface->surfaceDesc.numArrayElements * sizeof(VMSVGA3DMIPMAPLEVEL));
226	AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
227
228	pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock);
229	AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
230
231	/** @todo cbMemRemaining = value of SVGA_REG_MOB_MAX_SIZE */
232	uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
233	SVGA3dSize mipmapSize = *pMipLevel0Size;
234	int rc = VINF_SUCCESS;
235
236	for (uint32_t i = 0; i < numMipLevels; ++i)
237	{
238	for (uint32_t iArray = 0; iArray < pSurface->surfaceDesc.numArrayElements; ++iArray)
239	{
240	uint32_t const iMipmap = vmsvga3dCalcSubresource(i, iArray, numMipLevels);
241	LogFunc(("[%d] array %d mip level %d (%d,%d,%d) cbBlock=%#x block %dx%d\n",
242	iMipmap, iArray, i, mipmapSize.width, mipmapSize.height, mipmapSize.depth,
243	pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
244
245	uint32_t cBlocksX;
246	uint32_t cBlocksY;
247	if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
248	{
249	cBlocksX = mipmapSize.width;
250	cBlocksY = mipmapSize.height;
251	}
252	else
253	{
254	cBlocksX = mipmapSize.width / pSurface->cxBlock;
255	if (mipmapSize.width % pSurface->cxBlock)
256	++cBlocksX;
257	cBlocksY = mipmapSize.height / pSurface->cyBlock;
258	if (mipmapSize.height % pSurface->cyBlock)
259	++cBlocksY;
260	}
261
262	AssertBreakStmt(cBlocksX > 0 && cBlocksY > 0 && mipmapSize.depth > 0, rc = VERR_INVALID_PARAMETER);
263
264	const uint32_t cMaxBlocksX = cbMemRemaining / pSurface->cbBlock;
265	AssertBreakStmt(cBlocksX < cMaxBlocksX, rc = VERR_INVALID_PARAMETER);
266
267	const uint32_t cbSurfacePitch = pSurface->cbBlock * cBlocksX;
268	LogFunc(("cbSurfacePitch=0x%x\n", cbSurfacePitch));
269
270	const uint32_t cMaxBlocksY = cbMemRemaining / cbSurfacePitch;
271	AssertBreakStmt(cBlocksY < cMaxBlocksY, rc = VERR_INVALID_PARAMETER);
272
273	const uint32_t cbSurfacePlane = cbSurfacePitch * cBlocksY;
274
275	const uint32_t cMaxDepth = cbMemRemaining / cbSurfacePlane;
276	AssertBreakStmt(mipmapSize.depth < cMaxDepth, rc = VERR_INVALID_PARAMETER);
277
278	const uint32_t cbSurface = cbSurfacePlane * mipmapSize.depth;
279
280	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iMipmap];
281	pMipmapLevel->mipmapSize = mipmapSize;
282	pMipmapLevel->cBlocksX = cBlocksX;
283	pMipmapLevel->cBlocksY = cBlocksY;
284	pMipmapLevel->cBlocks = cBlocksX * cBlocksY * mipmapSize.depth;
285	pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
286	pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
287	pMipmapLevel->cbSurface = cbSurface;
288	pMipmapLevel->pSurfaceData = NULL;
289
290	cbMemRemaining -= cbSurface;
291	}
292
293	AssertRCBreak(rc);
294
295	mipmapSize.width >>= 1;
296	if (mipmapSize.width == 0) mipmapSize.width = 1;
297	mipmapSize.height >>= 1;
298	if (mipmapSize.height == 0) mipmapSize.height = 1;
299	mipmapSize.depth >>= 1;
300	if (mipmapSize.depth == 0) mipmapSize.depth = 1;
301	}
302
303	AssertLogRelRCReturnStmt(rc, RTMemFree(pSurface->paMipmapLevels), rc);
304
305	/* Compute the size of one array element. */
306	pSurface->surfaceDesc.cbArrayElement = 0;
307	for (uint32_t i = 0; i < pSurface->cLevels; ++i)
308	{
309	PVMSVGA3DMIPMAPLEVEL pMipLevel = &pSurface->paMipmapLevels[i];
310	pSurface->surfaceDesc.cbArrayElement += pMipLevel->cbSurface;
311	}
312
313	if (vmsvga3dIsLegacyBackend(pThisCC))
314	{
315	#ifdef VMSVGA3D_DIRECT3D
316	/* pSurface->hSharedObject = NULL; */
317	/* pSurface->pSharedObjectTree = NULL; */
318	/* Translate the format and usage flags to D3D. */
319	pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
320	pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
321	pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
322	pSurface->fUsageD3D = 0;
323	if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
324	pSurface->fUsageD3D \|= D3DUSAGE_DYNAMIC;
325	if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
326	pSurface->fUsageD3D \|= D3DUSAGE_RENDERTARGET;
327	if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
328	pSurface->fUsageD3D \|= D3DUSAGE_DEPTHSTENCIL;
329	if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
330	pSurface->fUsageD3D \|= D3DUSAGE_WRITEONLY;
331	if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
332	pSurface->fUsageD3D \|= D3DUSAGE_AUTOGENMIPMAP;
333	pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
334	/* pSurface->u.pSurface = NULL; */
335	/* pSurface->bounce.pTexture = NULL; */
336	/* pSurface->emulated.pTexture = NULL; */
337	#else
338	/* pSurface->oglId.buffer = OPENGL_INVALID_ID; */
339	/* pSurface->fEmulated = false; */
340	/* pSurface->idEmulated = OPENGL_INVALID_ID; */
341	vmsvga3dSurfaceFormat2OGL(pSurface, format);
342	#endif
343	}
344
345	#ifdef LOG_ENABLED
346	SVGA3dSurfaceAllFlags const f = surfaceFlags;
347	LogFunc(("surface flags:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x%RX64\n",
348	(f & SVGA3D_SURFACE_CUBEMAP) ? " CUBEMAP" : "",
349	(f & SVGA3D_SURFACE_HINT_STATIC) ? " HINT_STATIC" : "",
350	(f & SVGA3D_SURFACE_HINT_DYNAMIC) ? " HINT_DYNAMIC" : "",
351	(f & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " HINT_INDEXBUFFER" : "",
352	(f & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " HINT_VERTEXBUFFER" : "",
353	(f & SVGA3D_SURFACE_HINT_TEXTURE) ? " HINT_TEXTURE" : "",
354	(f & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " HINT_RENDERTARGET" : "",
355	(f & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " HINT_DEPTHSTENCIL" : "",
356	(f & SVGA3D_SURFACE_HINT_WRITEONLY) ? " HINT_WRITEONLY" : "",
357	(f & SVGA3D_SURFACE_DEAD2) ? " DEAD2" : "",
358	(f & SVGA3D_SURFACE_AUTOGENMIPMAPS) ? " AUTOGENMIPMAPS" : "",
359	(f & SVGA3D_SURFACE_DEAD1) ? " DEAD1" : "",
360	(f & SVGA3D_SURFACE_MOB_PITCH) ? " MOB_PITCH" : "",
361	(f & SVGA3D_SURFACE_INACTIVE) ? " INACTIVE" : "",
362	(f & SVGA3D_SURFACE_HINT_RT_LOCKABLE) ? " HINT_RT_LOCKABLE" : "",
363	(f & SVGA3D_SURFACE_VOLUME) ? " VOLUME" : "",
364	(f & SVGA3D_SURFACE_SCREENTARGET) ? " SCREENTARGET" : "",
365	(f & SVGA3D_SURFACE_ALIGN16) ? " ALIGN16" : "",
366	(f & SVGA3D_SURFACE_1D) ? " 1D" : "",
367	(f & SVGA3D_SURFACE_ARRAY) ? " ARRAY" : "",
368	(f & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) ? " BIND_VERTEX_BUFFER" : "",
369	(f & SVGA3D_SURFACE_BIND_INDEX_BUFFER) ? " BIND_INDEX_BUFFER" : "",
370	(f & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) ? " BIND_CONSTANT_BUFFER" : "",
371	(f & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) ? " BIND_SHADER_RESOURCE" : "",
372	(f & SVGA3D_SURFACE_BIND_RENDER_TARGET) ? " BIND_RENDER_TARGET" : "",
373	(f & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) ? " BIND_DEPTH_STENCIL" : "",
374	(f & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) ? " BIND_STREAM_OUTPUT" : "",
375	(f & SVGA3D_SURFACE_STAGING_UPLOAD) ? " STAGING_UPLOAD" : "",
376	(f & SVGA3D_SURFACE_STAGING_DOWNLOAD) ? " STAGING_DOWNLOAD" : "",
377	(f & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE) ? " HINT_INDIRECT_UPDATE" : "",
378	(f & SVGA3D_SURFACE_TRANSFER_FROM_BUFFER) ? " TRANSFER_FROM_BUFFER" : "",
379	(f & SVGA3D_SURFACE_RESERVED1) ? " RESERVED1" : "",
380	(f & SVGA3D_SURFACE_MULTISAMPLE) ? " MULTISAMPLE" : "",
381	(f & SVGA3D_SURFACE_BIND_UAVIEW) ? " BIND_UAVIEW" : "",
382	(f & SVGA3D_SURFACE_TRANSFER_TO_BUFFER) ? " TRANSFER_TO_BUFFER" : "",
383	(f & SVGA3D_SURFACE_BIND_LOGICOPS) ? " BIND_LOGICOPS" : "",
384	(f & SVGA3D_SURFACE_BIND_RAW_VIEWS) ? " BIND_RAW_VIEWS" : "",
385	(f & SVGA3D_SURFACE_BUFFER_STRUCTURED) ? " BUFFER_STRUCTURED" : "",
386	(f & SVGA3D_SURFACE_DRAWINDIRECT_ARGS) ? " DRAWINDIRECT_ARGS" : "",
387	(f & SVGA3D_SURFACE_RESOURCE_CLAMP) ? " RESOURCE_CLAMP" : "",
388	(f & SVGA3D_SURFACE_FLAG_MAX) ? " FLAG_MAX" : "",
389	f & ~(SVGA3D_SURFACE_FLAG_MAX - 1ULL)
390	));
391	#endif
392
393	Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
394
395	if (fAllocMipLevels)
396	{
397	rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
398	AssertRCReturn(rc, rc);
399	}
400
401	pSurface->id = sid;
402	return VINF_SUCCESS;
403	}
404
405
406	/**
407	* Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
408	*
409	* @returns VBox status code (currently ignored).
410	* @param pThisCC The VGA/VMSVGA state for ring-3.
411	* @param sid The ID of the surface to destroy.
412	*/
413	int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
414	{
415	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
416	AssertReturn(pState, VERR_NO_MEMORY);
417
418	PVMSVGA3DSURFACE pSurface;
419	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
420	AssertRCReturn(rc, rc);
421
422	LogFunc(("sid=%u\n", sid));
423
424	/* Check all contexts if this surface is used as a render target or active texture. */
425	for (uint32_t cid = 0; cid < pState->cContexts; cid++)
426	{
427	PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
428	if (pContext->id == cid)
429	{
430	for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
431	if (pContext->aSidActiveTextures[i] == sid)
432	pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
433	for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
434	if (pContext->state.aRenderTargets[i] == sid)
435	pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
436	}
437	}
438
439	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
440	if (pSvgaR3State->pFuncs3D)
441	pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, pSurface);
442
443	if (pSurface->paMipmapLevels)
444	{
445	vmsvga3dSurfaceFreeMipLevels(pSurface);
446	RTMemFree(pSurface->paMipmapLevels);
447	}
448
449	memset(pSurface, 0, sizeof(*pSurface));
450	pSurface->id = SVGA3D_INVALID_ID;
451
452	return VINF_SUCCESS;
453	}
454
455
456	/**
457	* Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
458	*
459	* @returns VBox status code (currently ignored).
460	* @param pThis The shared VGA/VMSVGA state.
461	* @param pThisCC The VGA/VMSVGA state for ring-3.
462	* @param pDstSfcImg
463	* @param pDstBox
464	* @param pSrcSfcImg
465	* @param pSrcBox
466	* @param enmMode
467	*/
468	int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pDstSfcImg, SVGA3dBox const pDstBox,
469	SVGA3dSurfaceImageId const pSrcSfcImg, SVGA3dBox const pSrcBox, SVGA3dStretchBltMode enmMode)
470	{
471	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
472	AssertReturn(pState, VERR_NO_MEMORY);
473
474	int rc;
475
476	uint32_t const sidSrc = pSrcSfcImg->sid;
477	PVMSVGA3DSURFACE pSrcSurface;
478	rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
479	AssertRCReturn(rc, rc);
480
481	uint32_t const sidDst = pDstSfcImg->sid;
482	PVMSVGA3DSURFACE pDstSurface;
483	rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
484	AssertRCReturn(rc, rc);
485
486	AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
487	AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->cLevels, VERR_INVALID_PARAMETER);
488	AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
489	AssertReturn(pDstSfcImg->mipmap < pDstSurface->cLevels, VERR_INVALID_PARAMETER);
490
491	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
492	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
493
494	PVMSVGA3DCONTEXT pContext;
495	#ifdef VMSVGA3D_OPENGL
496	LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
497	sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
498	sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
499	pContext = &pState->SharedCtx;
500	VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
501	#else
502	LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
503	sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
504	sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
505
506	uint32_t cid = pDstSurface->idAssociatedContext;
507	if (cid == SVGA3D_INVALID_ID)
508	cid = pSrcSurface->idAssociatedContext;
509
510	/* At least one of surfaces must be in hardware. */
511	AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
512
513	rc = vmsvga3dContextFromCid(pState, cid, &pContext);
514	AssertRCReturn(rc, rc);
515	#endif
516
517	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
518	{
519	/* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
520	LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->surfaceFlags, pSrcSurface->format));
521	rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pSrcSurface);
522	AssertRCReturn(rc, rc);
523	}
524
525	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
526	{
527	/* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
528	LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->surfaceFlags, pDstSurface->format));
529	rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pDstSurface);
530	AssertRCReturn(rc, rc);
531	}
532
533	PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
534	rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
535	AssertRCReturn(rc, rc);
536
537	PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
538	rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
539	AssertRCReturn(rc, rc);
540
541	SVGA3dBox clipSrcBox = *pSrcBox;
542	SVGA3dBox clipDstBox = *pDstBox;
543	vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
544	vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
545
546	return pSvgaR3State->pFuncs3D->pfnSurfaceStretchBlt(pThis, pState,
547	pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
548	pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
549	enmMode, pContext);
550	}
551
552	/**
553	* Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
554	*
555	* @returns VBox status code (currently ignored).
556	* @param pThis The shared VGA/VMSVGA instance data.
557	* @param pThisCC The VGA/VMSVGA state for ring-3.
558	* @param guest .
559	* @param host .
560	* @param transfer .
561	* @param cCopyBoxes .
562	* @param paBoxes .
563	*/
564	int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestImage guest, SVGA3dSurfaceImageId host,
565	SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
566	{
567	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
568	AssertReturn(pState, VERR_NO_MEMORY);
569
570	PVMSVGA3DSURFACE pSurface;
571	int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
572	AssertRCReturn(rc, rc);
573
574	LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
575	(pSurface->surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
576	guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
577	host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
578
579	PVMSVGA3DMIPMAPLEVEL pMipLevel;
580	rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
581	AssertRCReturn(rc, rc);
582
583	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
584	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
585
586	PVMSVGA3DCONTEXT pContext = NULL;
587	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
588	{
589	/*
590	* Not realized in host hardware/library yet, we have to work with
591	* the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
592	*/
593	if (!pMipLevel->pSurfaceData)
594	{
595	rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
596	AssertRCReturn(rc, rc);
597	}
598	}
599	else if (vmsvga3dIsLegacyBackend(pThisCC))
600	{
601	#ifdef VMSVGA3D_DIRECT3D
602	/* Flush the drawing pipeline for this surface as it could be used in a shared context. */
603	vmsvga3dSurfaceFlush(pSurface);
604	#else /* VMSVGA3D_OPENGL */
605	pContext = &pState->SharedCtx;
606	VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
607	#endif
608	}
609
610	/* SVGA_3D_CMD_SURFACE_DMA:
611	* "define the 'source' in each copyBox as the guest image and the
612	* 'destination' as the host image, regardless of transfer direction."
613	*/
614	for (uint32_t i = 0; i < cCopyBoxes; ++i)
615	{
616	Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
617	VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
618	i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
619
620	/* Apparently we're supposed to clip it (gmr test sample) */
621
622	/* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
623	SVGA3dBox hostBox;
624	hostBox.x = paBoxes[i].x;
625	hostBox.y = paBoxes[i].y;
626	hostBox.z = paBoxes[i].z;
627	hostBox.w = paBoxes[i].w;
628	hostBox.h = paBoxes[i].h;
629	hostBox.d = paBoxes[i].d;
630	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
631
632	if ( !hostBox.w
633	\|\| !hostBox.h
634	\|\| !hostBox.d)
635	{
636	Log(("Skip empty box\n"));
637	continue;
638	}
639	RT_UNTRUSTED_VALIDATED_FENCE();
640
641	/* Adjust the guest, i.e. "src", point.
642	* Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
643	*/
644	uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
645	uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
646	uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
647
648	/* Calculate offsets of the image blocks for the transfer. */
649	uint32_t u32HostBlockX;
650	uint32_t u32HostBlockY;
651	uint32_t u32GuestBlockX;
652	uint32_t u32GuestBlockY;
653	uint32_t cBlocksX;
654	uint32_t cBlocksY;
655	if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
656	{
657	u32HostBlockX = hostBox.x;
658	u32HostBlockY = hostBox.y;
659
660	u32GuestBlockX = srcx;
661	u32GuestBlockY = srcy;
662
663	cBlocksX = hostBox.w;
664	cBlocksY = hostBox.h;
665	}
666	else
667	{
668	/* Pixels to blocks. */
669	u32HostBlockX = hostBox.x / pSurface->cxBlock;
670	u32HostBlockY = hostBox.y / pSurface->cyBlock;
671	Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
672	Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
673
674	u32GuestBlockX = srcx / pSurface->cxBlock;
675	u32GuestBlockY = srcy / pSurface->cyBlock;
676	Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
677	Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
678
679	cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
680	cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
681	}
682
683	uint32_t cbGuestPitch = guest.pitch;
684	if (cbGuestPitch == 0)
685	{
686	/* Host must "assume image is tightly packed". Our surfaces are. */
687	cbGuestPitch = pMipLevel->cbSurfacePitch;
688	}
689	else
690	{
691	/* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
692	AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
693	RT_UNTRUSTED_VALIDATED_FENCE();
694	}
695
696	/* srcx, srcy and srcz values are used to calculate the guest offset.
697	* The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
698	*/
699	AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
700	AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
701	AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
702	RT_UNTRUSTED_VALIDATED_FENCE();
703
704	if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
705	\|\| VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
706	{
707	uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
708	u32GuestBlockY * cbGuestPitch +
709	srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
710	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
711
712	/* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
713	uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
714	u32HostBlockY * pMipLevel->cbSurfacePitch +
715	hostBox.z * pMipLevel->cbSurfacePlane;
716	AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
717
718	for (uint32_t z = 0; z < hostBox.d; ++z)
719	{
720	rc = vmsvgaR3GmrTransfer(pThis,
721	pThisCC,
722	transfer,
723	(uint8_t *)pMipLevel->pSurfaceData,
724	pMipLevel->cbSurface,
725	uHostOffset,
726	(int32_t)pMipLevel->cbSurfacePitch,
727	guest.ptr,
728	(uint32_t)uGuestOffset,
729	cbGuestPitch,
730	cBlocksX * pSurface->cbBlock,
731	cBlocksY);
732	AssertRC(rc);
733
734	Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
735	z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
736
737	uHostOffset += pMipLevel->cbSurfacePlane;
738	uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
739	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
740	}
741	}
742
743	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
744	{
745	SVGA3dCopyBox clipBox;
746	clipBox.x = hostBox.x;
747	clipBox.y = hostBox.y;
748	clipBox.z = hostBox.z;
749	clipBox.w = hostBox.w;
750	clipBox.h = hostBox.h;
751	clipBox.d = hostBox.d;
752	clipBox.srcx = srcx;
753	clipBox.srcy = srcy;
754	clipBox.srcz = srcz;
755	rc = pSvgaR3State->pFuncs3D->pfnSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
756	guest.ptr, cbGuestPitch, transfer,
757	&clipBox, pContext, rc, i);
758	AssertRC(rc);
759	}
760	}
761
762	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
763	{
764	pMipLevel->fDirty = true;
765	pSurface->fDirty = true;
766	}
767
768	return rc;
769	}
770
771	static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr const *pGuestResult,
772	SVGA3dQueryState enmState, uint32_t u32Result)
773	{
774	SVGA3dQueryResult queryResult;
775	queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
776	queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
777	queryResult.result32 = u32Result;
778
779	int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
780	(uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
781	*pGuestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
782	AssertRC(rc);
783	return rc;
784	}
785
786	/* Used with saved state. */
787	int vmsvga3dQueryCreate(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
788	{
789	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
790	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
791
792	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
793	AssertReturn(pState, VERR_NO_MEMORY);
794
795	LogFunc(("cid=%u type=%d\n", cid, type));
796
797	PVMSVGA3DCONTEXT pContext;
798	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
799	AssertRCReturn(rc, rc);
800
801	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
802	{
803	VMSVGA3DQUERY *p = &pContext->occlusion;
804	if (!VMSVGA3DQUERY_EXISTS(p))
805	{
806	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
807	AssertRCReturn(rc, rc);
808	}
809
810	return VINF_SUCCESS;
811	}
812
813	/* Nothing else for VGPU9. */
814	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
815	}
816
817	int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
818	{
819	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
820	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
821
822	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
823	AssertReturn(pState, VERR_NO_MEMORY);
824
825	LogFunc(("cid=%u type=%d\n", cid, type));
826
827	PVMSVGA3DCONTEXT pContext;
828	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
829	AssertRCReturn(rc, rc);
830
831	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
832	{
833	VMSVGA3DQUERY *p = &pContext->occlusion;
834	if (!VMSVGA3DQUERY_EXISTS(p))
835	{
836	/* Lazy creation of the query object. */
837	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
838	AssertRCReturn(rc, rc);
839	}
840
841	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryBegin(pThisCC, pContext);
842	AssertRCReturn(rc, rc);
843
844	p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
845	p->u32QueryResult = 0;
846
847	return VINF_SUCCESS;
848	}
849
850	/* Nothing else for VGPU9. */
851	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
852	}
853
854	int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
855	{
856	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
857	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
858
859	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
860	AssertReturn(pState, VERR_NO_MEMORY);
861
862	LogFunc(("cid=%u type=%d\n", cid, type));
863
864	PVMSVGA3DCONTEXT pContext;
865	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
866	AssertRCReturn(rc, rc);
867
868	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
869	{
870	VMSVGA3DQUERY *p = &pContext->occlusion;
871	Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
872	AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
873
874	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryEnd(pThisCC, pContext);
875	AssertRCReturn(rc, rc);
876
877	p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
878	return VINF_SUCCESS;
879	}
880
881	/* Nothing else for VGPU9. */
882	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
883	}
884
885	int vmsvga3dQueryWait(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, PVGASTATE pThis, SVGAGuestPtr const *pGuestResult)
886	{
887	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
888	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
889
890	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
891	AssertReturn(pState, VERR_NO_MEMORY);
892
893	LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, pGuestResult->gmrId, pGuestResult->offset));
894
895	PVMSVGA3DCONTEXT pContext;
896	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
897	AssertRCReturn(rc, rc);
898
899	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
900	{
901	VMSVGA3DQUERY *p = &pContext->occlusion;
902	if (VMSVGA3DQUERY_EXISTS(p))
903	{
904	if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
905	{
906	/* Only if not already in SIGNALED state,
907	* i.e. not a second read from the guest or after restoring saved state.
908	*/
909	uint32_t u32Pixels = 0;
910	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryGetData(pThisCC, pContext, &u32Pixels);
911	if (RT_SUCCESS(rc))
912	{
913	p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
914	p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
915	}
916	}
917
918	if (RT_SUCCESS(rc))
919	{
920	/* pGuestResult can be NULL when saving the state. */
921	if (pGuestResult)
922	{
923	/* Return data to the guest. */
924	vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
925	}
926	return VINF_SUCCESS;
927	}
928	}
929	else
930	{
931	AssertMsgFailed(("GetData Query is NULL\n"));
932	}
933
934	rc = VERR_INTERNAL_ERROR;
935	}
936	else
937	{
938	rc = VERR_NOT_IMPLEMENTED;
939	}
940
941	if (pGuestResult)
942	vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_FAILED, 0);
943	AssertFailedReturn(rc);
944	}
945
946	int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
947	SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
948	{
949	/* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
950	LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
951	idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
952	srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
953	for (uint32_t i = 0; i < cRects; i++)
954	{
955	LogFunc(("clipping rect %d (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
956	}
957
958	VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
959	AssertReturn(pScreen, VERR_INTERNAL_ERROR);
960
961	/* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
962	SVGA3dSurfaceImageId src;
963	src.sid = srcImage.sid;
964	src.mipmap = 0;
965	src.face = 0;
966
967	if (pScreen->pHwScreen)
968	{
969	/* Use the backend accelerated method, if available. */
970	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
971	if (pSvgaR3State->pFuncs3D)
972	{
973	int rc = pSvgaR3State->pFuncs3D->pfnSurfaceBlitToScreen(pThisCC, pScreen, destRect, src, srcRect, cRects, pRect);
974	if (rc == VINF_SUCCESS)
975	{
976	return VINF_SUCCESS;
977	}
978	}
979	}
980
981	/** @todo scaling */
982	AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
983
984	SVGA3dCopyBox box;
985	SVGAGuestImage dest;
986
987	box.srcz = 0;
988	box.z = 0;
989	box.d = 1;
990
991	dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
992	dest.ptr.offset = pScreen->offVRAM;
993	dest.pitch = pScreen->cbPitch;
994
995	if (cRects == 0)
996	{
997	/* easy case; no clipping */
998
999	/* SVGA_3D_CMD_SURFACE_DMA:
1000	* 'define the "source" in each copyBox as the guest image and the
1001	* "destination" as the host image, regardless of transfer direction.'
1002	*
1003	* Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
1004	* it must set the copyBox "source" to the guest destination coords and
1005	* the copyBox "destination" to the host surface source coords.
1006	*/
1007	/* Host image. */
1008	box.x = srcRect.left;
1009	box.y = srcRect.top;
1010	box.w = srcRect.right - srcRect.left;
1011	box.h = srcRect.bottom - srcRect.top;
1012	/* Guest image. */
1013	box.srcx = destRect.left;
1014	box.srcy = destRect.top;
1015
1016	int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1017	AssertRCReturn(rc, rc);
1018
1019	/* Update the guest image, which is at box.src. */
1020	vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1021	}
1022	else
1023	{
1024	/** @todo merge into one SurfaceDMA call */
1025	for (uint32_t i = 0; i < cRects; i++)
1026	{
1027	/* "The clip rectangle coordinates are measured
1028	* relative to the top-left corner of destRect."
1029	* Therefore they are relative to the top-left corner of srcRect as well.
1030	*/
1031
1032	/* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
1033	box.x = srcRect.left + pRect[i].left;
1034	box.y = srcRect.top + pRect[i].top;
1035	box.w = pRect[i].right - pRect[i].left;
1036	box.h = pRect[i].bottom - pRect[i].top;
1037	/* Guest image. The target screen memory is currently in the guest VRAM. */
1038	box.srcx = destRect.left + pRect[i].left;
1039	box.srcy = destRect.top + pRect[i].top;
1040
1041	int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1042	AssertRCReturn(rc, rc);
1043
1044	/* Update the guest image, which is at box.src. */
1045	vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1046	}
1047	}
1048
1049	return VINF_SUCCESS;
1050	}
1051
1052	int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
1053	{
1054	/* Deprecated according to svga3d_reg.h. */
1055	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1056	AssertReturn(pState, VERR_NO_MEMORY);
1057
1058	PVMSVGA3DSURFACE pSurface;
1059	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1060	AssertRCReturn(rc, rc);
1061
1062	/** @todo Detect screen from coords? Or split rect to screens? */
1063	VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
1064	AssertReturn(pScreen, VERR_INTERNAL_ERROR);
1065
1066	/* If there are no recangles specified, just grab a screenful. */
1067	SVGA3dCopyRect DummyRect;
1068	if (cRects != 0)
1069	{ /* likely */ }
1070	else
1071	{
1072	/** @todo Find the usecase for this or check what the original device does.
1073	* The original code was doing some scaling based on the surface
1074	* size... */
1075	AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
1076	DummyRect.x = DummyRect.srcx = 0;
1077	DummyRect.y = DummyRect.srcy = 0;
1078	DummyRect.w = pScreen->cWidth;
1079	DummyRect.h = pScreen->cHeight;
1080	cRects = 1;
1081	pRect = &DummyRect;
1082	}
1083
1084	uint32_t i;
1085	for (i = 0; i < cRects; ++i)
1086	{
1087	uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
1088	SVGASignedRect destRect;
1089	destRect.left = pRect[i].x;
1090	destRect.top = pRect[i].y;
1091	destRect.right = pRect[i].x + pRect[i].w;
1092	destRect.bottom = pRect[i].y + pRect[i].h;
1093
1094	SVGA3dSurfaceImageId src;
1095	src.sid = sid;
1096	src.face = 0;
1097	src.mipmap = 0;
1098
1099	SVGASignedRect srcRect;
1100	srcRect.left = pRect[i].srcx;
1101	srcRect.top = pRect[i].srcy;
1102	srcRect.right = pRect[i].srcx + pRect[i].w;
1103	srcRect.bottom = pRect[i].srcy + pRect[i].h;
1104
1105	/* Entire rect. */
1106	rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
1107	AssertRCReturn(rc, rc);
1108	}
1109
1110	return VINF_SUCCESS;
1111	}
1112
1113	int vmsvga3dDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1114	{
1115	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1116	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1117
1118	if (pScreen->pHwScreen)
1119	{
1120	pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1121	}
1122
1123	int rc = pSvgaR3State->pFuncs3D->pfnDefineScreen(pThis, pThisCC, pScreen);
1124	if (RT_SUCCESS(rc))
1125	{
1126	LogRelMax(1, ("VMSVGA: using accelerated graphics output\n"));
1127	}
1128	return rc;
1129	}
1130
1131	int vmsvga3dDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1132	{
1133	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1134	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1135
1136	return pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1137	}
1138
1139	int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap)
1140	{
1141	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1142	AssertReturn(pState, VERR_INVALID_STATE);
1143
1144	PVMSVGA3DSURFACE pSurface;
1145	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1146	AssertRCReturn(rc, rc);
1147
1148	if (face == SVGA_ID_INVALID && mipmap == SVGA_ID_INVALID)
1149	{
1150	/* This is a notification that "All images can be lost", i.e. the backend surface is not needed anymore. */
1151	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1152	if (pSvgaR3State->pFuncs3D)
1153	pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, pSurface);
1154
1155	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
1156	{
1157	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1158	pMipmapLevel->fDirty = true;
1159	}
1160	}
1161	else
1162	{
1163	PVMSVGA3DMIPMAPLEVEL pMipmapLevel;
1164	rc = vmsvga3dMipmapLevel(pSurface, face, mipmap, &pMipmapLevel);
1165	AssertRCReturn(rc, rc);
1166
1167	/* Invalidate views, etc. */
1168	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1169	if (pSvgaR3State->pFuncs3D)
1170	pSvgaR3State->pFuncs3D->pfnSurfaceInvalidateImage(pThisCC, pSurface, face, mipmap);
1171
1172	pMipmapLevel->fDirty = true;
1173	}
1174	pSurface->fDirty = true;
1175
1176	return rc;
1177	}
1178
1179
1180	/*
1181	*
1182	* 3D
1183	*
1184	*/
1185
1186	int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
1187	{
1188	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1189	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1190	return pSvgaR3State->pFuncs3D->pfnQueryCaps(pThisCC, idx3dCaps, pu32Val);
1191	}
1192
1193	int vmsvga3dChangeMode(PVGASTATECC pThisCC)
1194	{
1195	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1196	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1197	return pSvgaR3State->pFuncs3D->pfnChangeMode(pThisCC);
1198	}
1199
1200	int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src, uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
1201	{
1202	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1203	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1204	return pSvgaR3State->pFuncs3D->pfnSurfaceCopy(pThisCC, dest, src, cCopyBoxes, pBox);
1205	}
1206
1207	void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
1208	{
1209	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1210	AssertReturnVoid(pSvgaR3State->pFuncs3D);
1211	pSvgaR3State->pFuncs3D->pfnUpdateHostScreenViewport(pThisCC, idScreen, pOldViewport);
1212	}
1213
1214	/**
1215	* Updates the heap buffers for all surfaces or one specific one.
1216	*
1217	* @param pThisCC The VGA/VMSVGA state for ring-3.
1218	* @param sid The surface ID, UINT32_MAX if all.
1219	* @thread VMSVGAFIFO
1220	*/
1221	void vmsvga3dUpdateHeapBuffersForSurfaces(PVGASTATECC pThisCC, uint32_t sid)
1222	{
1223	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1224	AssertReturnVoid(pSvgaR3State->pFuncs3D);
1225
1226	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1227	AssertReturnVoid(pState);
1228
1229	if (sid == UINT32_MAX)
1230	{
1231	uint32_t cSurfaces = pState->cSurfaces;
1232	for (sid = 0; sid < cSurfaces; sid++)
1233	{
1234	PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1235	if (pSurface && pSurface->id == sid)
1236	pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1237	}
1238	}
1239	else if (sid < pState->cSurfaces)
1240	{
1241	PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1242	if (pSurface && pSurface->id == sid)
1243	pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1244	}
1245	}
1246
1247
1248	/*
1249	*
1250	* VGPU9
1251	*
1252	*/
1253
1254	int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
1255	{
1256	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1257	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1258	return pSvgaR3State->pFuncsVGPU9->pfnContextDefine(pThisCC, cid);
1259	}
1260
1261	int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
1262	{
1263	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1264	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1265	return pSvgaR3State->pFuncsVGPU9->pfnContextDestroy(pThisCC, cid);
1266	}
1267
1268	int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
1269	{
1270	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1271	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1272	return pSvgaR3State->pFuncsVGPU9->pfnSetTransform(pThisCC, cid, type, matrix);
1273	}
1274
1275	int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
1276	{
1277	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1278	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1279	return pSvgaR3State->pFuncsVGPU9->pfnSetZRange(pThisCC, cid, zRange);
1280	}
1281
1282	int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
1283	{
1284	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1285	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1286	return pSvgaR3State->pFuncsVGPU9->pfnSetRenderState(pThisCC, cid, cRenderStates, pRenderState);
1287	}
1288
1289	int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
1290	{
1291	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1292	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1293	return pSvgaR3State->pFuncsVGPU9->pfnSetRenderTarget(pThisCC, cid, type, target);
1294	}
1295
1296	int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
1297	{
1298	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1299	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1300	return pSvgaR3State->pFuncsVGPU9->pfnSetTextureState(pThisCC, cid, cTextureStates, pTextureState);
1301	}
1302
1303	int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
1304	{
1305	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1306	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1307	return pSvgaR3State->pFuncsVGPU9->pfnSetMaterial(pThisCC, cid, face, pMaterial);
1308	}
1309
1310	int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
1311	{
1312	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1313	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1314	return pSvgaR3State->pFuncsVGPU9->pfnSetLightData(pThisCC, cid, index, pData);
1315	}
1316
1317	int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
1318	{
1319	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1320	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1321	return pSvgaR3State->pFuncsVGPU9->pfnSetLightEnabled(pThisCC, cid, index, enabled);
1322	}
1323
1324	int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1325	{
1326	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1327	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1328	return pSvgaR3State->pFuncsVGPU9->pfnSetViewPort(pThisCC, cid, pRect);
1329	}
1330
1331	int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
1332	{
1333	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1334	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1335	return pSvgaR3State->pFuncsVGPU9->pfnSetClipPlane(pThisCC, cid, index, plane);
1336	}
1337
1338	int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth, uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
1339	{
1340	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1341	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1342	return pSvgaR3State->pFuncsVGPU9->pfnCommandClear(pThisCC, cid, clearFlag, color, depth, stencil, cRects, pRect);
1343	}
1344
1345	int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl pVertexDecl, uint32_t numRanges, SVGA3dPrimitiveRange pNumRange, uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
1346	{
1347	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1348	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1349	return pSvgaR3State->pFuncsVGPU9->pfnDrawPrimitives(pThisCC, cid, numVertexDecls, pVertexDecl, numRanges, pNumRange, cVertexDivisor, pVertexDivisor);
1350	}
1351
1352	int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1353	{
1354	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1355	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1356	return pSvgaR3State->pFuncsVGPU9->pfnSetScissorRect(pThisCC, cid, pRect);
1357	}
1358
1359	int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
1360	{
1361	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1362	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1363	return pSvgaR3State->pFuncsVGPU9->pfnGenerateMipmaps(pThisCC, sid, filter);
1364	}
1365
1366	int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type, uint32_t cbData, uint32_t *pShaderData)
1367	{
1368	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1369	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1370	return pSvgaR3State->pFuncsVGPU9->pfnShaderDefine(pThisCC, cid, shid, type, cbData, pShaderData);
1371	}
1372
1373	int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
1374	{
1375	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1376	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1377	return pSvgaR3State->pFuncsVGPU9->pfnShaderDestroy(pThisCC, cid, shid, type);
1378	}
1379
1380	int vmsvga3dShaderSet(PVGASTATECC pThisCC, struct VMSVGA3DCONTEXT *pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
1381	{
1382	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1383	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1384	return pSvgaR3State->pFuncsVGPU9->pfnShaderSet(pThisCC, pContext, cid, type, shid);
1385	}
1386
1387	int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type, SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
1388	{
1389	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1390	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1391	return pSvgaR3State->pFuncsVGPU9->pfnShaderSetConst(pThisCC, cid, reg, type, ctype, cRegisters, pValues);
1392	}
1393
1394
1395	/*
1396	*
1397	* Map
1398	*
1399	*/
1400
1401	void vmsvga3dSurfaceMapInit(VMSVGA3D_MAPPED_SURFACE pMap, VMSVGA3D_SURFACE_MAP enmMapType, SVGA3dBox const pBox,
1402	PVMSVGA3DSURFACE pSurface, void *pvData, uint32_t cbRowPitch, uint32_t cbDepthPitch)
1403	{
1404	uint32_t const cxBlocks = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1405	uint32_t const cyBlocks = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1406
1407	pMap->enmMapType = enmMapType;
1408	pMap->format = pSurface->format;
1409	pMap->box = *pBox;
1410	pMap->cbBlock = pSurface->cbBlock;
1411	pMap->cbRow = cxBlocks * pSurface->cbBlock;
1412	pMap->cbRowPitch = cbRowPitch;
1413	pMap->cRows = cyBlocks;
1414	pMap->cbDepthPitch = cbDepthPitch;
1415	pMap->pvData = (uint8_t *)pvData
1416	+ (pBox->x / pSurface->cxBlock) * pSurface->cbBlock
1417	+ (pBox->y / pSurface->cyBlock) * cbRowPitch
1418	+ pBox->z * cbDepthPitch;
1419	}
1420
1421
1422	int vmsvga3dSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
1423	VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
1424	{
1425	PVMSVGA3DSURFACE pSurface;
1426	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1427	AssertRCReturn(rc, rc);
1428
1429	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1430	{
1431	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1432	AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1433	return pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, pImage, pBox, enmMapType, pMap);
1434	}
1435
1436	PVMSVGA3DMIPMAPLEVEL pMipLevel;
1437	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1438	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1439
1440	if (!pMipLevel->pSurfaceData)
1441	{
1442	rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
1443	AssertRCReturn(rc, rc);
1444	}
1445
1446	SVGA3dBox clipBox;
1447	if (pBox)
1448	{
1449	clipBox = *pBox;
1450	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1451	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1452	}
1453	else
1454	{
1455	clipBox.x = 0;
1456	clipBox.y = 0;
1457	clipBox.z = 0;
1458	clipBox.w = pMipLevel->mipmapSize.width;
1459	clipBox.h = pMipLevel->mipmapSize.height;
1460	clipBox.d = pMipLevel->mipmapSize.depth;
1461	}
1462
1463	/// @todo Zero the box?
1464	//if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD)
1465	// RT_BZERO(.);
1466
1467	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
1468	pMipLevel->pSurfaceData, pMipLevel->cbSurfacePitch, pMipLevel->cbSurfacePlane);
1469
1470	LogFunc(("SysMem: pvData %p\n", pMap->pvData));
1471	return VINF_SUCCESS;
1472	}
1473
1474	int vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, VMSVGA3D_MAPPED_SURFACE pMap, bool fWritten)
1475	{
1476	PVMSVGA3DSURFACE pSurface;
1477	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1478	AssertRCReturn(rc, rc);
1479
1480	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1481	{
1482	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1483	AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1484	return pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, pImage, pMap, fWritten);
1485	}
1486
1487	PVMSVGA3DMIPMAPLEVEL pMipLevel;
1488	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1489	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1490
1491	if ( fWritten
1492	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
1493	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
1494	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
1495	{
1496	pMipLevel->fDirty = true;
1497	pSurface->fDirty = true;
1498	}
1499
1500	return VINF_SUCCESS;
1501	}
1502
1503
1504	int vmsvga3dCalcSurfaceMipmapAndFace(PVGASTATECC pThisCC, uint32_t sid, uint32_t iSubresource, uint32_t piMipmap, uint32_t piFace)
1505	{
1506	PVMSVGA3DSURFACE pSurface;
1507	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1508	AssertRCReturn(rc, rc);
1509
1510	vmsvga3dCalcMipmapAndFace(pSurface->cLevels, iSubresource, piMipmap, piFace);
1511	return VINF_SUCCESS;
1512	}
1513
1514
1515	uint32_t vmsvga3dCalcSubresourceOffset(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage)
1516	{
1517	PVMSVGA3DSURFACE pSurface;
1518	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1519	AssertRCReturn(rc, 0);
1520
1521	ASSERT_GUEST_RETURN(pImage->face < pSurface->surfaceDesc.numArrayElements, 0);
1522
1523	uint32_t offMipLevel = 0;
1524	for (uint32_t i = 0; i < pImage->mipmap; ++i)
1525	{
1526	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1527	offMipLevel += pMipmapLevel->cbSurface;
1528	}
1529
1530	uint32_t offSubresource = pSurface->surfaceDesc.cbArrayElement * pImage->face + offMipLevel;
1531	/** @todo Multisample? */
1532	return offSubresource;
1533	}
1534
1535
1536	uint32_t vmsvga3dGetArrayElements(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1537	{
1538	PVMSVGA3DSURFACE pSurface;
1539	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1540	AssertRCReturn(rc, 0);
1541
1542	return pSurface->surfaceDesc.numArrayElements;
1543	}
1544
1545
1546	uint32_t vmsvga3dGetSubresourceCount(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1547	{
1548	PVMSVGA3DSURFACE pSurface;
1549	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1550	AssertRCReturn(rc, 0);
1551
1552	return pSurface->surfaceDesc.numArrayElements * pSurface->cLevels;
1553	}
1554
1555
1556	/*
1557	* Calculates memory layout of a surface box for memcpy:
1558	*/
1559	int vmsvga3dGetBoxDimensions(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
1560	VMSGA3D_BOX_DIMENSIONS *pResult)
1561	{
1562	PVMSVGA3DSURFACE pSurface;
1563	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1564	AssertRCReturn(rc, rc);
1565
1566	PVMSVGA3DMIPMAPLEVEL pMipLevel;
1567	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1568	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1569
1570	/* Clip the box. */
1571	SVGA3dBox clipBox;
1572	if (pBox)
1573	{
1574	clipBox = *pBox;
1575	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1576	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1577	}
1578	else
1579	{
1580	clipBox.x = 0;
1581	clipBox.y = 0;
1582	clipBox.z = 0;
1583	clipBox.w = pMipLevel->mipmapSize.width;
1584	clipBox.h = pMipLevel->mipmapSize.height;
1585	clipBox.d = pMipLevel->mipmapSize.depth;
1586	}
1587
1588	uint32_t const cBlocksX = (clipBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1589	uint32_t const cBlocksY = (clipBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1590
1591	pResult->offSubresource = vmsvga3dCalcSubresourceOffset(pThisCC, pImage);
1592	pResult->offBox = (clipBox.x / pSurface->cxBlock) * pSurface->cbBlock
1593	+ (clipBox.y / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
1594	+ clipBox.z * pMipLevel->cbSurfacePlane;
1595	pResult->cbRow = cBlocksX * pSurface->cbBlock;
1596	pResult->cbPitch = pMipLevel->cbSurfacePitch;
1597	pResult->cyBlocks = cBlocksY;
1598	pResult->cbDepthPitch = pMipLevel->cbSurfacePlane;
1599
1600	return VINF_SUCCESS;
1601	}
1602
1603
1604	/*
1605	* Whether a legacy 3D backend is used.
1606	* The new DX context can be built together with the legacy D3D9 or OpenGL backend.
1607	* The actual backend is selected at the VM startup.
1608	*/
1609	bool vmsvga3dIsLegacyBackend(PVGASTATECC pThisCC)
1610	{
1611	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1612	return pSvgaR3State->pFuncsDX == NULL;
1613	}
1614

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 94377

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