DevVGA-SVGA3d.cpp@ 94267

Last change on this file since 94267 was 94267, checked in by vboxsync, 3 years ago
Devices/Graphics: doxygen fix: bugref:9830
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1	/* $Id: DevVGA-SVGA3d.cpp 94267 2022-03-16 10:43:21Z vboxsync $ */
2	/** @file
3	* DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4	*/
5
6	/*
7	* Copyright (C) 2013-2022 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23	#include <VBox/AssertGuest.h>
24	#include <VBox/vmm/pdmdev.h>
25	#include <iprt/errcore.h>
26	#include <VBox/log.h>
27
28	#include <iprt/assert.h>
29	#include <iprt/mem.h>
30
31	#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
32	#include <VBoxVideo.h> /* required by DevVGA.h */
33
34	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
35	#include "DevVGA.h"
36
37	#include "DevVGA-SVGA.h"
38	#include "DevVGA-SVGA3d.h"
39	#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
40	#include "DevVGA-SVGA3d-internal.h"
41	#include "DevVGA-SVGA-internal.h"
42
43
44	static int vmsvga3dSurfaceAllocMipLevels(PVMSVGA3DSURFACE pSurface)
45	{
46	/* Allocate buffer to hold the surface data until we can move it into a D3D object */
47	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
48	{
49	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
50	AssertReturn(pMipmapLevel->pSurfaceData == NULL, VERR_INVALID_STATE);
51	pMipmapLevel->pSurfaceData = RTMemAllocZ(pMipmapLevel->cbSurface);
52	AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
53	}
54	return VINF_SUCCESS;
55	}
56
57
58	static void vmsvga3dSurfaceFreeMipLevels(PVMSVGA3DSURFACE pSurface)
59	{
60	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
61	{
62	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
63	RTMemFreeZ(pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);
64	pMipmapLevel->pSurfaceData = NULL;
65	}
66	}
67
68
69	/**
70	* Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
71	* commands (fifo).
72	*
73	* @returns VBox status code (currently ignored).
74	* @param pThisCC The VGA/VMSVGA state for ring-3.
75	* @param sid The ID of the surface to (re-)define.
76	* @param surfaceFlags .
77	* @param format .
78	* @param multisampleCount .
79	* @param autogenFilter .
80	* @param numMipLevels .
81	* @param pMipLevel0Size .
82	* @param arraySize Number of elements in a texture array.
83	* @param fAllocMipLevels .
84	*/
85	int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, SVGA3dSurface1Flags surfaceFlags, SVGA3dSurfaceFormat format,
86	uint32_t multisampleCount, SVGA3dTextureFilter autogenFilter,
87	uint32_t numMipLevels, SVGA3dSize const *pMipLevel0Size, uint32_t arraySize, bool fAllocMipLevels)
88	{
89	PVMSVGA3DSURFACE pSurface;
90	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
91	AssertReturn(pState, VERR_INVALID_STATE);
92
93	LogFunc(("sid=%u surfaceFlags=%#x format=%s (%#x) multiSampleCount=%d autogenFilter=%d, numMipLevels=%d size=(%dx%dx%d)\n",
94	sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
95	numMipLevels, pMipLevel0Size->width, pMipLevel0Size->height, pMipLevel0Size->depth));
96
97	ASSERT_GUEST_RETURN(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
98	ASSERT_GUEST_RETURN(numMipLevels >= 1 && numMipLevels <= SVGA3D_MAX_MIP_LEVELS, VERR_INVALID_PARAMETER);
99	ASSERT_GUEST_RETURN(arraySize <= SVGA3D_MAX_SURFACE_ARRAYSIZE, VERR_INVALID_PARAMETER);
100
101	if (sid >= pState->cSurfaces)
102	{
103	/* Grow the array. */
104	uint32_t cNew = RT_ALIGN(sid + 15, 16);
105	void pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) cNew);
106	AssertReturn(pvNew, VERR_NO_MEMORY);
107	pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
108	while (pState->cSurfaces < cNew)
109	{
110	pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
111	AssertReturn(pSurface, VERR_NO_MEMORY);
112	pSurface->id = SVGA3D_INVALID_ID;
113	pState->papSurfaces[pState->cSurfaces++] = pSurface;
114	}
115	}
116	pSurface = pState->papSurfaces[sid];
117
118	/* If one already exists with this id, then destroy it now. */
119	if (pSurface->id != SVGA3D_INVALID_ID)
120	vmsvga3dSurfaceDestroy(pThisCC, sid);
121
122	RT_ZERO(*pSurface);
123	// pSurface->pBackendSurface = NULL;
124	pSurface->id = SVGA3D_INVALID_ID; /* Keep this value until the surface init completes */
125	pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
126
127	if (arraySize)
128	pSurface->surfaceDesc.numArrayElements = arraySize; /* Also for an array of cubemaps where arraySize = 6 * numCubes. */
129	else if (surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
130	pSurface->surfaceDesc.numArrayElements = SVGA3D_MAX_SURFACE_FACES;
131	else
132	pSurface->surfaceDesc.numArrayElements = 1;
133
134	/** @todo This 'switch' and the surfaceFlags tweaks should not be necessary.
135	* The actual surface type will be figured out when the surface is actually used later.
136	* The backends code must be reviewed for unnecessary dependencies on the surfaceFlags value.
137	*/
138	/* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
139	* In some case we'll have to wait until the surface is used to create the D3D object.
140	*/
141	switch (format)
142	{
143	case SVGA3D_Z_D32:
144	case SVGA3D_Z_D16:
145	case SVGA3D_Z_D24S8:
146	case SVGA3D_Z_D15S1:
147	case SVGA3D_Z_D24X8:
148	case SVGA3D_Z_DF16:
149	case SVGA3D_Z_DF24:
150	case SVGA3D_Z_D24S8_INT:
151	Assert(surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL);
152	surfaceFlags \|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
153	break;
154
155	/* Texture compression formats */
156	case SVGA3D_DXT1:
157	case SVGA3D_DXT2:
158	case SVGA3D_DXT3:
159	case SVGA3D_DXT4:
160	case SVGA3D_DXT5:
161	/* Bump-map formats */
162	case SVGA3D_BUMPU8V8:
163	case SVGA3D_BUMPL6V5U5:
164	case SVGA3D_BUMPX8L8V8U8:
165	case SVGA3D_V8U8:
166	case SVGA3D_Q8W8V8U8:
167	case SVGA3D_CxV8U8:
168	case SVGA3D_X8L8V8U8:
169	case SVGA3D_A2W10V10U10:
170	case SVGA3D_V16U16:
171	/* Typical render target formats; we should allow render target buffers to be used as textures. */
172	case SVGA3D_X8R8G8B8:
173	case SVGA3D_A8R8G8B8:
174	case SVGA3D_R5G6B5:
175	case SVGA3D_X1R5G5B5:
176	case SVGA3D_A1R5G5B5:
177	case SVGA3D_A4R4G4B4:
178	Assert(surfaceFlags & (SVGA3D_SURFACE_HINT_TEXTURE \| SVGA3D_SURFACE_SCREENTARGET));
179	surfaceFlags \|= SVGA3D_SURFACE_HINT_TEXTURE;
180	break;
181
182	case SVGA3D_LUMINANCE8:
183	case SVGA3D_LUMINANCE4_ALPHA4:
184	case SVGA3D_LUMINANCE16:
185	case SVGA3D_LUMINANCE8_ALPHA8:
186	case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
187	case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
188	case SVGA3D_A2R10G10B10:
189	case SVGA3D_ALPHA8:
190	case SVGA3D_R_S10E5:
191	case SVGA3D_R_S23E8:
192	case SVGA3D_RG_S10E5:
193	case SVGA3D_RG_S23E8:
194	case SVGA3D_G16R16:
195	case SVGA3D_A16B16G16R16:
196	case SVGA3D_UYVY:
197	case SVGA3D_YUY2:
198	case SVGA3D_NV12:
199	case SVGA3D_FORMAT_DEAD2: /* Old SVGA3D_AYUV */
200	case SVGA3D_ATI1:
201	case SVGA3D_ATI2:
202	break;
203
204	/*
205	* Any surface can be used as a buffer object, but SVGA3D_BUFFER is
206	* the most efficient format to use when creating new surfaces
207	* expressly for index or vertex data.
208	*/
209	case SVGA3D_BUFFER:
210	break;
211
212	default:
213	break;
214	}
215
216	pSurface->surfaceFlags = surfaceFlags;
217	pSurface->format = format;
218	/* cFaces is 6 for a cubemaps and 1 otherwise. */
219	pSurface->cFaces = (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1);
220	pSurface->cLevels = numMipLevels;
221	pSurface->multiSampleCount = multisampleCount;
222	pSurface->autogenFilter = autogenFilter;
223	Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
224	Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
225	pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(numMipLevels * pSurface->surfaceDesc.numArrayElements * sizeof(VMSVGA3DMIPMAPLEVEL));
226	AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
227
228	pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock);
229	AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
230
231	/** @todo cbMemRemaining = value of SVGA_REG_MOB_MAX_SIZE */
232	uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
233	SVGA3dSize mipmapSize = *pMipLevel0Size;
234	int rc = VINF_SUCCESS;
235
236	for (uint32_t i = 0; i < numMipLevels; ++i)
237	{
238	for (uint32_t iArray = 0; iArray < pSurface->surfaceDesc.numArrayElements; ++iArray)
239	{
240	uint32_t const iMipmap = vmsvga3dCalcSubresource(i, iArray, numMipLevels);
241	LogFunc(("[%d] array %d mip level %d (%d,%d,%d) cbBlock=%#x block %dx%d\n",
242	iMipmap, iArray, i, mipmapSize.width, mipmapSize.height, mipmapSize.depth,
243	pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
244
245	uint32_t cBlocksX;
246	uint32_t cBlocksY;
247	if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
248	{
249	cBlocksX = mipmapSize.width;
250	cBlocksY = mipmapSize.height;
251	}
252	else
253	{
254	cBlocksX = mipmapSize.width / pSurface->cxBlock;
255	if (mipmapSize.width % pSurface->cxBlock)
256	++cBlocksX;
257	cBlocksY = mipmapSize.height / pSurface->cyBlock;
258	if (mipmapSize.height % pSurface->cyBlock)
259	++cBlocksY;
260	}
261
262	AssertBreakStmt(cBlocksX > 0 && cBlocksY > 0 && mipmapSize.depth > 0, rc = VERR_INVALID_PARAMETER);
263
264	const uint32_t cMaxBlocksX = cbMemRemaining / pSurface->cbBlock;
265	AssertBreakStmt(cBlocksX < cMaxBlocksX, rc = VERR_INVALID_PARAMETER);
266
267	const uint32_t cbSurfacePitch = pSurface->cbBlock * cBlocksX;
268	LogFunc(("cbSurfacePitch=0x%x\n", cbSurfacePitch));
269
270	const uint32_t cMaxBlocksY = cbMemRemaining / cbSurfacePitch;
271	AssertBreakStmt(cBlocksY < cMaxBlocksY, rc = VERR_INVALID_PARAMETER);
272
273	const uint32_t cbSurfacePlane = cbSurfacePitch * cBlocksY;
274
275	const uint32_t cMaxDepth = cbMemRemaining / cbSurfacePlane;
276	AssertBreakStmt(mipmapSize.depth < cMaxDepth, rc = VERR_INVALID_PARAMETER);
277
278	const uint32_t cbSurface = cbSurfacePlane * mipmapSize.depth;
279
280	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iMipmap];
281	pMipmapLevel->mipmapSize = mipmapSize;
282	pMipmapLevel->cBlocksX = cBlocksX;
283	pMipmapLevel->cBlocksY = cBlocksY;
284	pMipmapLevel->cBlocks = cBlocksX * cBlocksY * mipmapSize.depth;
285	pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
286	pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
287	pMipmapLevel->cbSurface = cbSurface;
288	pMipmapLevel->pSurfaceData = NULL;
289
290	cbMemRemaining -= cbSurface;
291	}
292
293	AssertRCBreak(rc);
294
295	mipmapSize.width >>= 1;
296	if (mipmapSize.width == 0) mipmapSize.width = 1;
297	mipmapSize.height >>= 1;
298	if (mipmapSize.height == 0) mipmapSize.height = 1;
299	mipmapSize.depth >>= 1;
300	if (mipmapSize.depth == 0) mipmapSize.depth = 1;
301	}
302
303	AssertLogRelRCReturnStmt(rc, RTMemFree(pSurface->paMipmapLevels), rc);
304
305	if (vmsvga3dIsLegacyBackend(pThisCC))
306	{
307	#ifdef VMSVGA3D_DIRECT3D
308	/* pSurface->hSharedObject = NULL; */
309	/* pSurface->pSharedObjectTree = NULL; */
310	/* Translate the format and usage flags to D3D. */
311	pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
312	pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
313	pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
314	pSurface->fUsageD3D = 0;
315	if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
316	pSurface->fUsageD3D \|= D3DUSAGE_DYNAMIC;
317	if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
318	pSurface->fUsageD3D \|= D3DUSAGE_RENDERTARGET;
319	if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
320	pSurface->fUsageD3D \|= D3DUSAGE_DEPTHSTENCIL;
321	if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
322	pSurface->fUsageD3D \|= D3DUSAGE_WRITEONLY;
323	if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
324	pSurface->fUsageD3D \|= D3DUSAGE_AUTOGENMIPMAP;
325	pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
326	/* pSurface->u.pSurface = NULL; */
327	/* pSurface->bounce.pTexture = NULL; */
328	/* pSurface->emulated.pTexture = NULL; */
329	#else
330	/* pSurface->oglId.buffer = OPENGL_INVALID_ID; */
331	/* pSurface->fEmulated = false; */
332	/* pSurface->idEmulated = OPENGL_INVALID_ID; */
333	vmsvga3dSurfaceFormat2OGL(pSurface, format);
334	#endif
335	}
336
337	#ifdef LOG_ENABLED
338	SVGA3dSurfaceAllFlags const f = surfaceFlags;
339	LogFunc(("surface flags:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x%RX64\n",
340	(f & SVGA3D_SURFACE_CUBEMAP) ? " CUBEMAP" : "",
341	(f & SVGA3D_SURFACE_HINT_STATIC) ? " HINT_STATIC" : "",
342	(f & SVGA3D_SURFACE_HINT_DYNAMIC) ? " HINT_DYNAMIC" : "",
343	(f & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " HINT_INDEXBUFFER" : "",
344	(f & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " HINT_VERTEXBUFFER" : "",
345	(f & SVGA3D_SURFACE_HINT_TEXTURE) ? " HINT_TEXTURE" : "",
346	(f & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " HINT_RENDERTARGET" : "",
347	(f & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " HINT_DEPTHSTENCIL" : "",
348	(f & SVGA3D_SURFACE_HINT_WRITEONLY) ? " HINT_WRITEONLY" : "",
349	(f & SVGA3D_SURFACE_DEAD2) ? " DEAD2" : "",
350	(f & SVGA3D_SURFACE_AUTOGENMIPMAPS) ? " AUTOGENMIPMAPS" : "",
351	(f & SVGA3D_SURFACE_DEAD1) ? " DEAD1" : "",
352	(f & SVGA3D_SURFACE_MOB_PITCH) ? " MOB_PITCH" : "",
353	(f & SVGA3D_SURFACE_INACTIVE) ? " INACTIVE" : "",
354	(f & SVGA3D_SURFACE_HINT_RT_LOCKABLE) ? " HINT_RT_LOCKABLE" : "",
355	(f & SVGA3D_SURFACE_VOLUME) ? " VOLUME" : "",
356	(f & SVGA3D_SURFACE_SCREENTARGET) ? " SCREENTARGET" : "",
357	(f & SVGA3D_SURFACE_ALIGN16) ? " ALIGN16" : "",
358	(f & SVGA3D_SURFACE_1D) ? " 1D" : "",
359	(f & SVGA3D_SURFACE_ARRAY) ? " ARRAY" : "",
360	(f & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) ? " BIND_VERTEX_BUFFER" : "",
361	(f & SVGA3D_SURFACE_BIND_INDEX_BUFFER) ? " BIND_INDEX_BUFFER" : "",
362	(f & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) ? " BIND_CONSTANT_BUFFER" : "",
363	(f & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) ? " BIND_SHADER_RESOURCE" : "",
364	(f & SVGA3D_SURFACE_BIND_RENDER_TARGET) ? " BIND_RENDER_TARGET" : "",
365	(f & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) ? " BIND_DEPTH_STENCIL" : "",
366	(f & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) ? " BIND_STREAM_OUTPUT" : "",
367	(f & SVGA3D_SURFACE_STAGING_UPLOAD) ? " STAGING_UPLOAD" : "",
368	(f & SVGA3D_SURFACE_STAGING_DOWNLOAD) ? " STAGING_DOWNLOAD" : "",
369	(f & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE) ? " HINT_INDIRECT_UPDATE" : "",
370	(f & SVGA3D_SURFACE_TRANSFER_FROM_BUFFER) ? " TRANSFER_FROM_BUFFER" : "",
371	(f & SVGA3D_SURFACE_RESERVED1) ? " RESERVED1" : "",
372	(f & SVGA3D_SURFACE_MULTISAMPLE) ? " MULTISAMPLE" : "",
373	(f & SVGA3D_SURFACE_BIND_UAVIEW) ? " BIND_UAVIEW" : "",
374	(f & SVGA3D_SURFACE_TRANSFER_TO_BUFFER) ? " TRANSFER_TO_BUFFER" : "",
375	(f & SVGA3D_SURFACE_BIND_LOGICOPS) ? " BIND_LOGICOPS" : "",
376	(f & SVGA3D_SURFACE_BIND_RAW_VIEWS) ? " BIND_RAW_VIEWS" : "",
377	(f & SVGA3D_SURFACE_BUFFER_STRUCTURED) ? " BUFFER_STRUCTURED" : "",
378	(f & SVGA3D_SURFACE_DRAWINDIRECT_ARGS) ? " DRAWINDIRECT_ARGS" : "",
379	(f & SVGA3D_SURFACE_RESOURCE_CLAMP) ? " RESOURCE_CLAMP" : "",
380	(f & SVGA3D_SURFACE_FLAG_MAX) ? " FLAG_MAX" : "",
381	f & ~(SVGA3D_SURFACE_FLAG_MAX - 1ULL)
382	));
383	#endif
384
385	Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
386
387	if (fAllocMipLevels)
388	{
389	rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
390	AssertRCReturn(rc, rc);
391	}
392
393	pSurface->id = sid;
394	return VINF_SUCCESS;
395	}
396
397
398	/**
399	* Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
400	*
401	* @returns VBox status code (currently ignored).
402	* @param pThisCC The VGA/VMSVGA state for ring-3.
403	* @param sid The ID of the surface to destroy.
404	*/
405	int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
406	{
407	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
408	AssertReturn(pState, VERR_NO_MEMORY);
409
410	PVMSVGA3DSURFACE pSurface;
411	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
412	AssertRCReturn(rc, rc);
413
414	LogFunc(("sid=%u\n", sid));
415
416	/* Check all contexts if this surface is used as a render target or active texture. */
417	for (uint32_t cid = 0; cid < pState->cContexts; cid++)
418	{
419	PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
420	if (pContext->id == cid)
421	{
422	for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
423	if (pContext->aSidActiveTextures[i] == sid)
424	pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
425	for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
426	if (pContext->state.aRenderTargets[i] == sid)
427	pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
428	}
429	}
430
431	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
432	if (pSvgaR3State->pFuncs3D)
433	pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, pSurface);
434
435	if (pSurface->paMipmapLevels)
436	{
437	vmsvga3dSurfaceFreeMipLevels(pSurface);
438	RTMemFree(pSurface->paMipmapLevels);
439	}
440
441	memset(pSurface, 0, sizeof(*pSurface));
442	pSurface->id = SVGA3D_INVALID_ID;
443
444	return VINF_SUCCESS;
445	}
446
447
448	/**
449	* Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
450	*
451	* @returns VBox status code (currently ignored).
452	* @param pThis The shared VGA/VMSVGA state.
453	* @param pThisCC The VGA/VMSVGA state for ring-3.
454	* @param pDstSfcImg
455	* @param pDstBox
456	* @param pSrcSfcImg
457	* @param pSrcBox
458	* @param enmMode
459	*/
460	int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pDstSfcImg, SVGA3dBox const pDstBox,
461	SVGA3dSurfaceImageId const pSrcSfcImg, SVGA3dBox const pSrcBox, SVGA3dStretchBltMode enmMode)
462	{
463	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
464	AssertReturn(pState, VERR_NO_MEMORY);
465
466	int rc;
467
468	uint32_t const sidSrc = pSrcSfcImg->sid;
469	PVMSVGA3DSURFACE pSrcSurface;
470	rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
471	AssertRCReturn(rc, rc);
472
473	uint32_t const sidDst = pDstSfcImg->sid;
474	PVMSVGA3DSURFACE pDstSurface;
475	rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
476	AssertRCReturn(rc, rc);
477
478	AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
479	AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->cLevels, VERR_INVALID_PARAMETER);
480	AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
481	AssertReturn(pDstSfcImg->mipmap < pDstSurface->cLevels, VERR_INVALID_PARAMETER);
482
483	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
484	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
485
486	PVMSVGA3DCONTEXT pContext;
487	#ifdef VMSVGA3D_OPENGL
488	LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
489	sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
490	sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
491	pContext = &pState->SharedCtx;
492	VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
493	#else
494	LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
495	sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
496	sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
497
498	uint32_t cid = pDstSurface->idAssociatedContext;
499	if (cid == SVGA3D_INVALID_ID)
500	cid = pSrcSurface->idAssociatedContext;
501
502	/* At least one of surfaces must be in hardware. */
503	AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
504
505	rc = vmsvga3dContextFromCid(pState, cid, &pContext);
506	AssertRCReturn(rc, rc);
507	#endif
508
509	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
510	{
511	/* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
512	LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->surfaceFlags, pSrcSurface->format));
513	rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pSrcSurface);
514	AssertRCReturn(rc, rc);
515	}
516
517	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
518	{
519	/* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
520	LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->surfaceFlags, pDstSurface->format));
521	rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pDstSurface);
522	AssertRCReturn(rc, rc);
523	}
524
525	PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
526	rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
527	AssertRCReturn(rc, rc);
528
529	PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
530	rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
531	AssertRCReturn(rc, rc);
532
533	SVGA3dBox clipSrcBox = *pSrcBox;
534	SVGA3dBox clipDstBox = *pDstBox;
535	vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
536	vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
537
538	return pSvgaR3State->pFuncs3D->pfnSurfaceStretchBlt(pThis, pState,
539	pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
540	pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
541	enmMode, pContext);
542	}
543
544	/**
545	* Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
546	*
547	* @returns VBox status code (currently ignored).
548	* @param pThis The shared VGA/VMSVGA instance data.
549	* @param pThisCC The VGA/VMSVGA state for ring-3.
550	* @param guest .
551	* @param host .
552	* @param transfer .
553	* @param cCopyBoxes .
554	* @param paBoxes .
555	*/
556	int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestImage guest, SVGA3dSurfaceImageId host,
557	SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
558	{
559	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
560	AssertReturn(pState, VERR_NO_MEMORY);
561
562	PVMSVGA3DSURFACE pSurface;
563	int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
564	AssertRCReturn(rc, rc);
565
566	LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
567	(pSurface->surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
568	guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
569	host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
570
571	PVMSVGA3DMIPMAPLEVEL pMipLevel;
572	rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
573	AssertRCReturn(rc, rc);
574
575	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
576	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
577
578	PVMSVGA3DCONTEXT pContext = NULL;
579	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
580	{
581	/*
582	* Not realized in host hardware/library yet, we have to work with
583	* the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
584	*/
585	if (!pMipLevel->pSurfaceData)
586	{
587	rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
588	AssertRCReturn(rc, rc);
589	}
590	}
591	else if (vmsvga3dIsLegacyBackend(pThisCC))
592	{
593	#ifdef VMSVGA3D_DIRECT3D
594	/* Flush the drawing pipeline for this surface as it could be used in a shared context. */
595	vmsvga3dSurfaceFlush(pSurface);
596	#else /* VMSVGA3D_OPENGL */
597	pContext = &pState->SharedCtx;
598	VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
599	#endif
600	}
601
602	/* SVGA_3D_CMD_SURFACE_DMA:
603	* "define the 'source' in each copyBox as the guest image and the
604	* 'destination' as the host image, regardless of transfer direction."
605	*/
606	for (uint32_t i = 0; i < cCopyBoxes; ++i)
607	{
608	Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
609	VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
610	i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
611
612	/* Apparently we're supposed to clip it (gmr test sample) */
613
614	/* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
615	SVGA3dBox hostBox;
616	hostBox.x = paBoxes[i].x;
617	hostBox.y = paBoxes[i].y;
618	hostBox.z = paBoxes[i].z;
619	hostBox.w = paBoxes[i].w;
620	hostBox.h = paBoxes[i].h;
621	hostBox.d = paBoxes[i].d;
622	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
623
624	if ( !hostBox.w
625	\|\| !hostBox.h
626	\|\| !hostBox.d)
627	{
628	Log(("Skip empty box\n"));
629	continue;
630	}
631	RT_UNTRUSTED_VALIDATED_FENCE();
632
633	/* Adjust the guest, i.e. "src", point.
634	* Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
635	*/
636	uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
637	uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
638	uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
639
640	/* Calculate offsets of the image blocks for the transfer. */
641	uint32_t u32HostBlockX;
642	uint32_t u32HostBlockY;
643	uint32_t u32GuestBlockX;
644	uint32_t u32GuestBlockY;
645	uint32_t cBlocksX;
646	uint32_t cBlocksY;
647	if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
648	{
649	u32HostBlockX = hostBox.x;
650	u32HostBlockY = hostBox.y;
651
652	u32GuestBlockX = srcx;
653	u32GuestBlockY = srcy;
654
655	cBlocksX = hostBox.w;
656	cBlocksY = hostBox.h;
657	}
658	else
659	{
660	/* Pixels to blocks. */
661	u32HostBlockX = hostBox.x / pSurface->cxBlock;
662	u32HostBlockY = hostBox.y / pSurface->cyBlock;
663	Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
664	Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
665
666	u32GuestBlockX = srcx / pSurface->cxBlock;
667	u32GuestBlockY = srcy / pSurface->cyBlock;
668	Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
669	Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
670
671	cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
672	cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
673	}
674
675	uint32_t cbGuestPitch = guest.pitch;
676	if (cbGuestPitch == 0)
677	{
678	/* Host must "assume image is tightly packed". Our surfaces are. */
679	cbGuestPitch = pMipLevel->cbSurfacePitch;
680	}
681	else
682	{
683	/* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
684	AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
685	RT_UNTRUSTED_VALIDATED_FENCE();
686	}
687
688	/* srcx, srcy and srcz values are used to calculate the guest offset.
689	* The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
690	*/
691	AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
692	AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
693	AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
694	RT_UNTRUSTED_VALIDATED_FENCE();
695
696	if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
697	\|\| VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
698	{
699	uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
700	u32GuestBlockY * cbGuestPitch +
701	srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
702	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
703
704	/* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
705	uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
706	u32HostBlockY * pMipLevel->cbSurfacePitch +
707	hostBox.z * pMipLevel->cbSurfacePlane;
708	AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
709
710	for (uint32_t z = 0; z < hostBox.d; ++z)
711	{
712	rc = vmsvgaR3GmrTransfer(pThis,
713	pThisCC,
714	transfer,
715	(uint8_t *)pMipLevel->pSurfaceData,
716	pMipLevel->cbSurface,
717	uHostOffset,
718	(int32_t)pMipLevel->cbSurfacePitch,
719	guest.ptr,
720	(uint32_t)uGuestOffset,
721	cbGuestPitch,
722	cBlocksX * pSurface->cbBlock,
723	cBlocksY);
724	AssertRC(rc);
725
726	Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
727	z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
728
729	uHostOffset += pMipLevel->cbSurfacePlane;
730	uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
731	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
732	}
733	}
734
735	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
736	{
737	SVGA3dCopyBox clipBox;
738	clipBox.x = hostBox.x;
739	clipBox.y = hostBox.y;
740	clipBox.z = hostBox.z;
741	clipBox.w = hostBox.w;
742	clipBox.h = hostBox.h;
743	clipBox.d = hostBox.d;
744	clipBox.srcx = srcx;
745	clipBox.srcy = srcy;
746	clipBox.srcz = srcz;
747	rc = pSvgaR3State->pFuncs3D->pfnSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
748	guest.ptr, cbGuestPitch, transfer,
749	&clipBox, pContext, rc, i);
750	AssertRC(rc);
751	}
752	}
753
754	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
755	{
756	pMipLevel->fDirty = true;
757	pSurface->fDirty = true;
758	}
759
760	return rc;
761	}
762
763	static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr const *pGuestResult,
764	SVGA3dQueryState enmState, uint32_t u32Result)
765	{
766	SVGA3dQueryResult queryResult;
767	queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
768	queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
769	queryResult.result32 = u32Result;
770
771	int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
772	(uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
773	*pGuestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
774	AssertRC(rc);
775	return rc;
776	}
777
778	/* Used with saved state. */
779	int vmsvga3dQueryCreate(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
780	{
781	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
782	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
783
784	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
785	AssertReturn(pState, VERR_NO_MEMORY);
786
787	LogFunc(("cid=%u type=%d\n", cid, type));
788
789	PVMSVGA3DCONTEXT pContext;
790	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
791	AssertRCReturn(rc, rc);
792
793	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
794	{
795	VMSVGA3DQUERY *p = &pContext->occlusion;
796	if (!VMSVGA3DQUERY_EXISTS(p))
797	{
798	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
799	AssertRCReturn(rc, rc);
800	}
801
802	return VINF_SUCCESS;
803	}
804
805	/* Nothing else for VGPU9. */
806	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
807	}
808
809	int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
810	{
811	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
812	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
813
814	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
815	AssertReturn(pState, VERR_NO_MEMORY);
816
817	LogFunc(("cid=%u type=%d\n", cid, type));
818
819	PVMSVGA3DCONTEXT pContext;
820	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
821	AssertRCReturn(rc, rc);
822
823	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
824	{
825	VMSVGA3DQUERY *p = &pContext->occlusion;
826	if (!VMSVGA3DQUERY_EXISTS(p))
827	{
828	/* Lazy creation of the query object. */
829	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
830	AssertRCReturn(rc, rc);
831	}
832
833	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryBegin(pThisCC, pContext);
834	AssertRCReturn(rc, rc);
835
836	p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
837	p->u32QueryResult = 0;
838
839	return VINF_SUCCESS;
840	}
841
842	/* Nothing else for VGPU9. */
843	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
844	}
845
846	int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
847	{
848	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
849	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
850
851	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
852	AssertReturn(pState, VERR_NO_MEMORY);
853
854	LogFunc(("cid=%u type=%d\n", cid, type));
855
856	PVMSVGA3DCONTEXT pContext;
857	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
858	AssertRCReturn(rc, rc);
859
860	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
861	{
862	VMSVGA3DQUERY *p = &pContext->occlusion;
863	Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
864	AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
865
866	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryEnd(pThisCC, pContext);
867	AssertRCReturn(rc, rc);
868
869	p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
870	return VINF_SUCCESS;
871	}
872
873	/* Nothing else for VGPU9. */
874	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
875	}
876
877	int vmsvga3dQueryWait(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, PVGASTATE pThis, SVGAGuestPtr const *pGuestResult)
878	{
879	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
880	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
881
882	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
883	AssertReturn(pState, VERR_NO_MEMORY);
884
885	LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, pGuestResult->gmrId, pGuestResult->offset));
886
887	PVMSVGA3DCONTEXT pContext;
888	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
889	AssertRCReturn(rc, rc);
890
891	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
892	{
893	VMSVGA3DQUERY *p = &pContext->occlusion;
894	if (VMSVGA3DQUERY_EXISTS(p))
895	{
896	if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
897	{
898	/* Only if not already in SIGNALED state,
899	* i.e. not a second read from the guest or after restoring saved state.
900	*/
901	uint32_t u32Pixels = 0;
902	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryGetData(pThisCC, pContext, &u32Pixels);
903	if (RT_SUCCESS(rc))
904	{
905	p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
906	p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
907	}
908	}
909
910	if (RT_SUCCESS(rc))
911	{
912	/* pGuestResult can be NULL when saving the state. */
913	if (pGuestResult)
914	{
915	/* Return data to the guest. */
916	vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
917	}
918	return VINF_SUCCESS;
919	}
920	}
921	else
922	{
923	AssertMsgFailed(("GetData Query is NULL\n"));
924	}
925
926	rc = VERR_INTERNAL_ERROR;
927	}
928	else
929	{
930	rc = VERR_NOT_IMPLEMENTED;
931	}
932
933	if (pGuestResult)
934	vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_FAILED, 0);
935	AssertFailedReturn(rc);
936	}
937
938	int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
939	SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
940	{
941	/* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
942	LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
943	idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
944	srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
945	for (uint32_t i = 0; i < cRects; i++)
946	{
947	LogFunc(("clipping rect %d (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
948	}
949
950	VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
951	AssertReturn(pScreen, VERR_INTERNAL_ERROR);
952
953	/* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
954	SVGA3dSurfaceImageId src;
955	src.sid = srcImage.sid;
956	src.mipmap = 0;
957	src.face = 0;
958
959	if (pScreen->pHwScreen)
960	{
961	/* Use the backend accelerated method, if available. */
962	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
963	if (pSvgaR3State->pFuncs3D)
964	{
965	int rc = pSvgaR3State->pFuncs3D->pfnSurfaceBlitToScreen(pThisCC, pScreen, destRect, src, srcRect, cRects, pRect);
966	if (rc == VINF_SUCCESS)
967	{
968	return VINF_SUCCESS;
969	}
970	}
971	}
972
973	/** @todo scaling */
974	AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
975
976	SVGA3dCopyBox box;
977	SVGAGuestImage dest;
978
979	box.srcz = 0;
980	box.z = 0;
981	box.d = 1;
982
983	dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
984	dest.ptr.offset = pScreen->offVRAM;
985	dest.pitch = pScreen->cbPitch;
986
987	if (cRects == 0)
988	{
989	/* easy case; no clipping */
990
991	/* SVGA_3D_CMD_SURFACE_DMA:
992	* 'define the "source" in each copyBox as the guest image and the
993	* "destination" as the host image, regardless of transfer direction.'
994	*
995	* Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
996	* it must set the copyBox "source" to the guest destination coords and
997	* the copyBox "destination" to the host surface source coords.
998	*/
999	/* Host image. */
1000	box.x = srcRect.left;
1001	box.y = srcRect.top;
1002	box.w = srcRect.right - srcRect.left;
1003	box.h = srcRect.bottom - srcRect.top;
1004	/* Guest image. */
1005	box.srcx = destRect.left;
1006	box.srcy = destRect.top;
1007
1008	int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1009	AssertRCReturn(rc, rc);
1010
1011	/* Update the guest image, which is at box.src. */
1012	vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1013	}
1014	else
1015	{
1016	/** @todo merge into one SurfaceDMA call */
1017	for (uint32_t i = 0; i < cRects; i++)
1018	{
1019	/* "The clip rectangle coordinates are measured
1020	* relative to the top-left corner of destRect."
1021	* Therefore they are relative to the top-left corner of srcRect as well.
1022	*/
1023
1024	/* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
1025	box.x = srcRect.left + pRect[i].left;
1026	box.y = srcRect.top + pRect[i].top;
1027	box.w = pRect[i].right - pRect[i].left;
1028	box.h = pRect[i].bottom - pRect[i].top;
1029	/* Guest image. The target screen memory is currently in the guest VRAM. */
1030	box.srcx = destRect.left + pRect[i].left;
1031	box.srcy = destRect.top + pRect[i].top;
1032
1033	int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1034	AssertRCReturn(rc, rc);
1035
1036	/* Update the guest image, which is at box.src. */
1037	vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1038	}
1039	}
1040
1041	return VINF_SUCCESS;
1042	}
1043
1044	int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
1045	{
1046	/* Deprecated according to svga3d_reg.h. */
1047	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1048	AssertReturn(pState, VERR_NO_MEMORY);
1049
1050	PVMSVGA3DSURFACE pSurface;
1051	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1052	AssertRCReturn(rc, rc);
1053
1054	/** @todo Detect screen from coords? Or split rect to screens? */
1055	VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
1056	AssertReturn(pScreen, VERR_INTERNAL_ERROR);
1057
1058	/* If there are no recangles specified, just grab a screenful. */
1059	SVGA3dCopyRect DummyRect;
1060	if (cRects != 0)
1061	{ /* likely */ }
1062	else
1063	{
1064	/** @todo Find the usecase for this or check what the original device does.
1065	* The original code was doing some scaling based on the surface
1066	* size... */
1067	AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
1068	DummyRect.x = DummyRect.srcx = 0;
1069	DummyRect.y = DummyRect.srcy = 0;
1070	DummyRect.w = pScreen->cWidth;
1071	DummyRect.h = pScreen->cHeight;
1072	cRects = 1;
1073	pRect = &DummyRect;
1074	}
1075
1076	uint32_t i;
1077	for (i = 0; i < cRects; ++i)
1078	{
1079	uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
1080	SVGASignedRect destRect;
1081	destRect.left = pRect[i].x;
1082	destRect.top = pRect[i].y;
1083	destRect.right = pRect[i].x + pRect[i].w;
1084	destRect.bottom = pRect[i].y + pRect[i].h;
1085
1086	SVGA3dSurfaceImageId src;
1087	src.sid = sid;
1088	src.face = 0;
1089	src.mipmap = 0;
1090
1091	SVGASignedRect srcRect;
1092	srcRect.left = pRect[i].srcx;
1093	srcRect.top = pRect[i].srcy;
1094	srcRect.right = pRect[i].srcx + pRect[i].w;
1095	srcRect.bottom = pRect[i].srcy + pRect[i].h;
1096
1097	/* Entire rect. */
1098	rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
1099	AssertRCReturn(rc, rc);
1100	}
1101
1102	return VINF_SUCCESS;
1103	}
1104
1105	int vmsvga3dDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1106	{
1107	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1108	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1109
1110	if (pScreen->pHwScreen)
1111	{
1112	pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1113	}
1114
1115	int rc = pSvgaR3State->pFuncs3D->pfnDefineScreen(pThis, pThisCC, pScreen);
1116	if (RT_SUCCESS(rc))
1117	{
1118	LogRelMax(1, ("VMSVGA: using accelerated graphics output\n"));
1119	}
1120	return rc;
1121	}
1122
1123	int vmsvga3dDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1124	{
1125	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1126	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1127
1128	return pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1129	}
1130
1131	int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap)
1132	{
1133	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1134	AssertReturn(pState, VERR_INVALID_STATE);
1135
1136	PVMSVGA3DSURFACE pSurface;
1137	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1138	AssertRCReturn(rc, rc);
1139
1140	if (face == SVGA_ID_INVALID && mipmap == SVGA_ID_INVALID)
1141	{
1142	/* This is a notification that "All images can be lost", i.e. the backend surface is not needed anymore. */
1143	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1144	if (pSvgaR3State->pFuncs3D)
1145	pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, pSurface);
1146
1147	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
1148	{
1149	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1150	pMipmapLevel->fDirty = true;
1151	}
1152	}
1153	else
1154	{
1155	PVMSVGA3DMIPMAPLEVEL pMipmapLevel;
1156	rc = vmsvga3dMipmapLevel(pSurface, face, mipmap, &pMipmapLevel);
1157	AssertRCReturn(rc, rc);
1158
1159	/* Invalidate views, etc. */
1160	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1161	if (pSvgaR3State->pFuncs3D)
1162	pSvgaR3State->pFuncs3D->pfnSurfaceInvalidateImage(pThisCC, pSurface, face, mipmap);
1163
1164	pMipmapLevel->fDirty = true;
1165	}
1166	pSurface->fDirty = true;
1167
1168	return rc;
1169	}
1170
1171
1172	/*
1173	*
1174	* 3D
1175	*
1176	*/
1177
1178	int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
1179	{
1180	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1181	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1182	return pSvgaR3State->pFuncs3D->pfnQueryCaps(pThisCC, idx3dCaps, pu32Val);
1183	}
1184
1185	int vmsvga3dChangeMode(PVGASTATECC pThisCC)
1186	{
1187	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1188	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1189	return pSvgaR3State->pFuncs3D->pfnChangeMode(pThisCC);
1190	}
1191
1192	int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src, uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
1193	{
1194	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1195	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1196	return pSvgaR3State->pFuncs3D->pfnSurfaceCopy(pThisCC, dest, src, cCopyBoxes, pBox);
1197	}
1198
1199	void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
1200	{
1201	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1202	AssertReturnVoid(pSvgaR3State->pFuncs3D);
1203	pSvgaR3State->pFuncs3D->pfnUpdateHostScreenViewport(pThisCC, idScreen, pOldViewport);
1204	}
1205
1206	/**
1207	* Updates the heap buffers for all surfaces or one specific one.
1208	*
1209	* @param pThisCC The VGA/VMSVGA state for ring-3.
1210	* @param sid The surface ID, UINT32_MAX if all.
1211	* @thread VMSVGAFIFO
1212	*/
1213	void vmsvga3dUpdateHeapBuffersForSurfaces(PVGASTATECC pThisCC, uint32_t sid)
1214	{
1215	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1216	AssertReturnVoid(pSvgaR3State->pFuncs3D);
1217
1218	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1219	AssertReturnVoid(pState);
1220
1221	if (sid == UINT32_MAX)
1222	{
1223	uint32_t cSurfaces = pState->cSurfaces;
1224	for (sid = 0; sid < cSurfaces; sid++)
1225	{
1226	PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1227	if (pSurface && pSurface->id == sid)
1228	pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1229	}
1230	}
1231	else if (sid < pState->cSurfaces)
1232	{
1233	PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1234	if (pSurface && pSurface->id == sid)
1235	pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1236	}
1237	}
1238
1239
1240	/*
1241	*
1242	* VGPU9
1243	*
1244	*/
1245
1246	int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
1247	{
1248	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1249	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1250	return pSvgaR3State->pFuncsVGPU9->pfnContextDefine(pThisCC, cid);
1251	}
1252
1253	int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
1254	{
1255	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1256	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1257	return pSvgaR3State->pFuncsVGPU9->pfnContextDestroy(pThisCC, cid);
1258	}
1259
1260	int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
1261	{
1262	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1263	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1264	return pSvgaR3State->pFuncsVGPU9->pfnSetTransform(pThisCC, cid, type, matrix);
1265	}
1266
1267	int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
1268	{
1269	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1270	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1271	return pSvgaR3State->pFuncsVGPU9->pfnSetZRange(pThisCC, cid, zRange);
1272	}
1273
1274	int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
1275	{
1276	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1277	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1278	return pSvgaR3State->pFuncsVGPU9->pfnSetRenderState(pThisCC, cid, cRenderStates, pRenderState);
1279	}
1280
1281	int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
1282	{
1283	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1284	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1285	return pSvgaR3State->pFuncsVGPU9->pfnSetRenderTarget(pThisCC, cid, type, target);
1286	}
1287
1288	int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
1289	{
1290	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1291	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1292	return pSvgaR3State->pFuncsVGPU9->pfnSetTextureState(pThisCC, cid, cTextureStates, pTextureState);
1293	}
1294
1295	int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
1296	{
1297	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1298	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1299	return pSvgaR3State->pFuncsVGPU9->pfnSetMaterial(pThisCC, cid, face, pMaterial);
1300	}
1301
1302	int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
1303	{
1304	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1305	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1306	return pSvgaR3State->pFuncsVGPU9->pfnSetLightData(pThisCC, cid, index, pData);
1307	}
1308
1309	int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
1310	{
1311	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1312	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1313	return pSvgaR3State->pFuncsVGPU9->pfnSetLightEnabled(pThisCC, cid, index, enabled);
1314	}
1315
1316	int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1317	{
1318	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1319	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1320	return pSvgaR3State->pFuncsVGPU9->pfnSetViewPort(pThisCC, cid, pRect);
1321	}
1322
1323	int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
1324	{
1325	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1326	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1327	return pSvgaR3State->pFuncsVGPU9->pfnSetClipPlane(pThisCC, cid, index, plane);
1328	}
1329
1330	int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth, uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
1331	{
1332	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1333	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1334	return pSvgaR3State->pFuncsVGPU9->pfnCommandClear(pThisCC, cid, clearFlag, color, depth, stencil, cRects, pRect);
1335	}
1336
1337	int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl pVertexDecl, uint32_t numRanges, SVGA3dPrimitiveRange pNumRange, uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
1338	{
1339	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1340	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1341	return pSvgaR3State->pFuncsVGPU9->pfnDrawPrimitives(pThisCC, cid, numVertexDecls, pVertexDecl, numRanges, pNumRange, cVertexDivisor, pVertexDivisor);
1342	}
1343
1344	int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1345	{
1346	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1347	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1348	return pSvgaR3State->pFuncsVGPU9->pfnSetScissorRect(pThisCC, cid, pRect);
1349	}
1350
1351	int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
1352	{
1353	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1354	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1355	return pSvgaR3State->pFuncsVGPU9->pfnGenerateMipmaps(pThisCC, sid, filter);
1356	}
1357
1358	int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type, uint32_t cbData, uint32_t *pShaderData)
1359	{
1360	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1361	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1362	return pSvgaR3State->pFuncsVGPU9->pfnShaderDefine(pThisCC, cid, shid, type, cbData, pShaderData);
1363	}
1364
1365	int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
1366	{
1367	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1368	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1369	return pSvgaR3State->pFuncsVGPU9->pfnShaderDestroy(pThisCC, cid, shid, type);
1370	}
1371
1372	int vmsvga3dShaderSet(PVGASTATECC pThisCC, struct VMSVGA3DCONTEXT *pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
1373	{
1374	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1375	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1376	return pSvgaR3State->pFuncsVGPU9->pfnShaderSet(pThisCC, pContext, cid, type, shid);
1377	}
1378
1379	int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type, SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
1380	{
1381	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1382	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1383	return pSvgaR3State->pFuncsVGPU9->pfnShaderSetConst(pThisCC, cid, reg, type, ctype, cRegisters, pValues);
1384	}
1385
1386
1387	/*
1388	*
1389	* Map
1390	*
1391	*/
1392
1393	int vmsvga3dSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
1394	VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
1395	{
1396	PVMSVGA3DSURFACE pSurface;
1397	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1398	AssertRCReturn(rc, rc);
1399
1400	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1401	{
1402	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1403	AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1404	return pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, pImage, pBox, enmMapType, pMap);
1405	}
1406
1407	PVMSVGA3DMIPMAPLEVEL pMipLevel;
1408	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1409	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1410
1411	if (!pMipLevel->pSurfaceData)
1412	{
1413	rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
1414	AssertRCReturn(rc, rc);
1415	}
1416
1417	SVGA3dBox clipBox;
1418	if (pBox)
1419	{
1420	clipBox = *pBox;
1421	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1422	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1423	}
1424	else
1425	{
1426	clipBox.x = 0;
1427	clipBox.y = 0;
1428	clipBox.z = 0;
1429	clipBox.w = pMipLevel->mipmapSize.width;
1430	clipBox.h = pMipLevel->mipmapSize.height;
1431	clipBox.d = pMipLevel->mipmapSize.depth;
1432	}
1433
1434	/// @todo Zero the box?
1435	//if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD)
1436	// RT_BZERO(.);
1437
1438	pMap->enmMapType = enmMapType;
1439	pMap->format = pSurface->format;
1440	pMap->box = clipBox;
1441	pMap->cbPixel = pSurface->cbBlock;
1442	pMap->cbRowPitch = pMipLevel->cbSurfacePitch;
1443	pMap->cbDepthPitch = pMipLevel->cbSurfacePlane;
1444	pMap->pvData = (uint8_t *)pMipLevel->pSurfaceData
1445	+ (pMap->box.x / pSurface->cxBlock) * pMap->cbPixel
1446	+ (pMap->box.y / pSurface->cyBlock) * pMap->cbRowPitch
1447	+ pMap->box.z * pMap->cbDepthPitch;
1448
1449	LogFunc(("SysMem: pvData %p\n", pMap->pvData));
1450	return VINF_SUCCESS;
1451	}
1452
1453	int vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, VMSVGA3D_MAPPED_SURFACE pMap, bool fWritten)
1454	{
1455	PVMSVGA3DSURFACE pSurface;
1456	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1457	AssertRCReturn(rc, rc);
1458
1459	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1460	{
1461	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1462	AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1463	return pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, pImage, pMap, fWritten);
1464	}
1465
1466	PVMSVGA3DMIPMAPLEVEL pMipLevel;
1467	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1468	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1469
1470	if ( fWritten
1471	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
1472	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
1473	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
1474	{
1475	pMipLevel->fDirty = true;
1476	pSurface->fDirty = true;
1477	}
1478
1479	return VINF_SUCCESS;
1480	}
1481
1482
1483	int vmsvga3dCalcSurfaceMipmapAndFace(PVGASTATECC pThisCC, uint32_t sid, uint32_t iSubresource, uint32_t piMipmap, uint32_t piFace)
1484	{
1485	PVMSVGA3DSURFACE pSurface;
1486	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1487	AssertRCReturn(rc, rc);
1488
1489	vmsvga3dCalcMipmapAndFace(pSurface->cLevels, iSubresource, piMipmap, piFace);
1490	return VINF_SUCCESS;
1491	}
1492
1493
1494	uint32_t vmsvga3dCalcSubresourceOffset(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage)
1495	{
1496	PVMSVGA3DSURFACE pSurface;
1497	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1498	AssertRCReturn(rc, 0);
1499
1500	/** @todo Store cbArraySlice in the surface structure. */
1501	uint32_t cbArraySlice = 0;
1502	for (uint32_t i = 0; i < pSurface->cLevels; ++i)
1503	{
1504	PVMSVGA3DMIPMAPLEVEL pMipLevel = &pSurface->paMipmapLevels[i];
1505	cbArraySlice += pMipLevel->cbSurface;
1506	}
1507
1508	uint32_t offMipLevel = 0;
1509	for (uint32_t i = 0; i < pImage->mipmap; ++i)
1510	{
1511	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1512	offMipLevel += pMipmapLevel->cbSurface;
1513	}
1514
1515	uint32_t offSubresource = cbArraySlice * pImage->face + offMipLevel;
1516	/** @todo Multisample? */
1517	return offSubresource;
1518	}
1519
1520
1521	uint32_t vmsvga3dGetArrayElements(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1522	{
1523	PVMSVGA3DSURFACE pSurface;
1524	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1525	AssertRCReturn(rc, 0);
1526
1527	return pSurface->surfaceDesc.numArrayElements;
1528	}
1529
1530
1531	uint32_t vmsvga3dGetSubresourceCount(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1532	{
1533	PVMSVGA3DSURFACE pSurface;
1534	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1535	AssertRCReturn(rc, 0);
1536
1537	return pSurface->surfaceDesc.numArrayElements * pSurface->cLevels;
1538	}
1539
1540
1541	/*
1542	* Calculates memory layout of a surface box for memcpy:
1543	*/
1544	int vmsvga3dGetBoxDimensions(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
1545	VMSGA3D_BOX_DIMENSIONS *pResult)
1546	{
1547	PVMSVGA3DSURFACE pSurface;
1548	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1549	AssertRCReturn(rc, rc);
1550
1551	PVMSVGA3DMIPMAPLEVEL pMipLevel;
1552	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1553	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1554
1555	/* Clip the box. */
1556	SVGA3dBox clipBox;
1557	if (pBox)
1558	{
1559	clipBox = *pBox;
1560	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1561	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1562	}
1563	else
1564	{
1565	clipBox.x = 0;
1566	clipBox.y = 0;
1567	clipBox.z = 0;
1568	clipBox.w = pMipLevel->mipmapSize.width;
1569	clipBox.h = pMipLevel->mipmapSize.height;
1570	clipBox.d = pMipLevel->mipmapSize.depth;
1571	}
1572
1573	uint32_t const cBlocksX = (clipBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1574	uint32_t const cBlocksY = (clipBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1575
1576	/** @todo Calculate offSubresource here, when pSurface will have cbArraySlice field. */
1577	pResult->offSubresource = vmsvga3dCalcSubresourceOffset(pThisCC, pImage);
1578	pResult->offBox = (clipBox.x / pSurface->cxBlock) * pSurface->cbBlock
1579	+ (clipBox.y / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
1580	+ clipBox.z * pMipLevel->cbSurfacePlane;
1581	pResult->cbRow = cBlocksX * pSurface->cbBlock;
1582	pResult->cbPitch = pMipLevel->cbSurfacePitch;
1583	pResult->cyBlocks = cBlocksY;
1584	pResult->cDepth = clipBox.d;
1585
1586	return VINF_SUCCESS;
1587	}
1588
1589
1590	/*
1591	* Whether a legacy 3D backend is used.
1592	* The new DX context can be built together with the legacy D3D9 or OpenGL backend.
1593	* The actual backend is selected at the VM startup.
1594	*/
1595	bool vmsvga3dIsLegacyBackend(PVGASTATECC pThisCC)
1596	{
1597	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1598	return pSvgaR3State->pFuncsDX == NULL;
1599	}
1600

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 94267

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