DevVGA-SVGA3d.cpp@ 88904

Last change on this file since 88904 was 88831, checked in by vboxsync, 4 years ago
Devices/Graphics: resource creation; logging; emulate TRIANGLEFAN topology. bugref:9830
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1	/* $Id: DevVGA-SVGA3d.cpp 88831 2021-05-03 12:37:23Z vboxsync $ */
2	/** @file
3	* DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4	*/
5
6	/*
7	* Copyright (C) 2013-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23	#include <VBox/AssertGuest.h>
24	#include <VBox/vmm/pdmdev.h>
25	#include <iprt/errcore.h>
26	#include <VBox/log.h>
27
28	#include <iprt/assert.h>
29	#include <iprt/mem.h>
30
31	#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
32	#include <VBoxVideo.h> /* required by DevVGA.h */
33
34	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
35	#include "DevVGA.h"
36
37	#include "DevVGA-SVGA.h"
38	#include "DevVGA-SVGA3d.h"
39	#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
40	#include "DevVGA-SVGA3d-internal.h"
41
42
43
44	/**
45	* Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
46	* commands (fifo).
47	*
48	* @returns VBox status code (currently ignored).
49	* @param pThisCC The VGA/VMSVGA state for ring-3.
50	* @param sid The ID of the surface to (re-)define.
51	* @param surfaceFlags .
52	* @param format .
53	* @param multisampleCount .
54	* @param autogenFilter .
55	* @param numMipLevels .
56	* @param pMipLevel0Size .
57	*/
58	int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, SVGA3dSurface1Flags surfaceFlags, SVGA3dSurfaceFormat format,
59	uint32_t multisampleCount, SVGA3dTextureFilter autogenFilter,
60	uint32_t numMipLevels, SVGA3dSize const *pMipLevel0Size)
61	{
62	PVMSVGA3DSURFACE pSurface;
63	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
64	AssertReturn(pState, VERR_INVALID_STATE);
65
66	LogFunc(("sid=%u surfaceFlags=%#x format=%s (%#x) multiSampleCount=%d autogenFilter=%d, numMipLevels=%d size=(%dx%dx%d)\n",
67	sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
68	numMipLevels, pMipLevel0Size->width, pMipLevel0Size->height, pMipLevel0Size->depth));
69
70	ASSERT_GUEST_RETURN(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
71	ASSERT_GUEST_RETURN(numMipLevels >= 1 && numMipLevels < SVGA3D_MAX_MIP_LEVELS, VERR_INVALID_PARAMETER);
72
73	if (sid >= pState->cSurfaces)
74	{
75	/* Grow the array. */
76	uint32_t cNew = RT_ALIGN(sid + 15, 16);
77	void pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) cNew);
78	AssertReturn(pvNew, VERR_NO_MEMORY);
79	pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
80	while (pState->cSurfaces < cNew)
81	{
82	pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
83	AssertReturn(pSurface, VERR_NO_MEMORY);
84	pSurface->id = SVGA3D_INVALID_ID;
85	pState->papSurfaces[pState->cSurfaces++] = pSurface;
86	}
87	}
88	pSurface = pState->papSurfaces[sid];
89
90	/* If one already exists with this id, then destroy it now. */
91	if (pSurface->id != SVGA3D_INVALID_ID)
92	vmsvga3dSurfaceDestroy(pThisCC, sid);
93
94	RT_ZERO(*pSurface);
95	pSurface->id = SVGA3D_INVALID_ID; /* Keep this value until the surface init completes */
96	#ifdef VMSVGA3D_OPENGL
97	pSurface->idWeakContextAssociation = SVGA3D_INVALID_ID;
98	pSurface->oglId.buffer = OPENGL_INVALID_ID;
99	#elif defined(VMSVGA3D_D3D11)
100	pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
101	// pSurface->pBackendSurface = NULL;
102	#else /* VMSVGA3D_DIRECT3D */
103	pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
104	pSurface->hSharedObject = NULL;
105	pSurface->pSharedObjectTree = NULL;
106	#endif
107
108	/** @todo This 'switch' and the surfaceFlags tweaks should not be necessary.
109	* The actual surface type will be figured out when the surface is actually used later.
110	* The backends code must be reviewed for unnecessary dependencies on the surfaceFlags value.
111	*/
112	/* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
113	* In some case we'll have to wait until the surface is used to create the D3D object.
114	*/
115	switch (format)
116	{
117	case SVGA3D_Z_D32:
118	case SVGA3D_Z_D16:
119	case SVGA3D_Z_D24S8:
120	case SVGA3D_Z_D15S1:
121	case SVGA3D_Z_D24X8:
122	case SVGA3D_Z_DF16:
123	case SVGA3D_Z_DF24:
124	case SVGA3D_Z_D24S8_INT:
125	Assert(surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL);
126	surfaceFlags \|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
127	break;
128
129	/* Texture compression formats */
130	case SVGA3D_DXT1:
131	case SVGA3D_DXT2:
132	case SVGA3D_DXT3:
133	case SVGA3D_DXT4:
134	case SVGA3D_DXT5:
135	/* Bump-map formats */
136	case SVGA3D_BUMPU8V8:
137	case SVGA3D_BUMPL6V5U5:
138	case SVGA3D_BUMPX8L8V8U8:
139	case SVGA3D_V8U8:
140	case SVGA3D_Q8W8V8U8:
141	case SVGA3D_CxV8U8:
142	case SVGA3D_X8L8V8U8:
143	case SVGA3D_A2W10V10U10:
144	case SVGA3D_V16U16:
145	/* Typical render target formats; we should allow render target buffers to be used as textures. */
146	case SVGA3D_X8R8G8B8:
147	case SVGA3D_A8R8G8B8:
148	case SVGA3D_R5G6B5:
149	case SVGA3D_X1R5G5B5:
150	case SVGA3D_A1R5G5B5:
151	case SVGA3D_A4R4G4B4:
152	Assert(surfaceFlags & (SVGA3D_SURFACE_HINT_TEXTURE \| SVGA3D_SURFACE_SCREENTARGET));
153	surfaceFlags \|= SVGA3D_SURFACE_HINT_TEXTURE;
154	break;
155
156	case SVGA3D_LUMINANCE8:
157	case SVGA3D_LUMINANCE4_ALPHA4:
158	case SVGA3D_LUMINANCE16:
159	case SVGA3D_LUMINANCE8_ALPHA8:
160	case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
161	case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
162	case SVGA3D_A2R10G10B10:
163	case SVGA3D_ALPHA8:
164	case SVGA3D_R_S10E5:
165	case SVGA3D_R_S23E8:
166	case SVGA3D_RG_S10E5:
167	case SVGA3D_RG_S23E8:
168	case SVGA3D_G16R16:
169	case SVGA3D_A16B16G16R16:
170	case SVGA3D_UYVY:
171	case SVGA3D_YUY2:
172	case SVGA3D_NV12:
173	case SVGA3D_FORMAT_DEAD2: /* Old SVGA3D_AYUV */
174	case SVGA3D_ATI1:
175	case SVGA3D_ATI2:
176	break;
177
178	/*
179	* Any surface can be used as a buffer object, but SVGA3D_BUFFER is
180	* the most efficient format to use when creating new surfaces
181	* expressly for index or vertex data.
182	*/
183	case SVGA3D_BUFFER:
184	break;
185
186	default:
187	break;
188	}
189
190	pSurface->surfaceFlags = surfaceFlags;
191	pSurface->format = format;
192	/* cFaces is 6 for a cubemaps and 1 otherwise. */
193	pSurface->cFaces = (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1);
194	pSurface->cLevels = numMipLevels;
195	pSurface->multiSampleCount = multisampleCount;
196	pSurface->autogenFilter = autogenFilter;
197	Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
198	Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
199	pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(numMipLevels * pSurface->cFaces * sizeof(VMSVGA3DMIPMAPLEVEL));
200	AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
201
202	pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock);
203	AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
204
205	/** @todo cbMemRemaining = value of SVGA_REG_MOB_MAX_SIZE */
206	uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
207	SVGA3dSize mipmapSize = *pMipLevel0Size;
208	int rc = VINF_SUCCESS;
209
210	for (uint32_t i = 0; i < numMipLevels; ++i)
211	{
212	for (uint32_t iFace = 0; iFace < pSurface->cFaces; ++iFace)
213	{
214	uint32_t const iMipmap = iFace * numMipLevels + i;
215	LogFunc(("[%d] face %d mip level %d (%d,%d,%d) cbBlock=%#x block %dx%d\n",
216	iMipmap, iFace, i, mipmapSize.width, mipmapSize.height, mipmapSize.depth,
217	pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
218
219	uint32_t cBlocksX;
220	uint32_t cBlocksY;
221	if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
222	{
223	cBlocksX = mipmapSize.width;
224	cBlocksY = mipmapSize.height;
225	}
226	else
227	{
228	cBlocksX = mipmapSize.width / pSurface->cxBlock;
229	if (mipmapSize.width % pSurface->cxBlock)
230	++cBlocksX;
231	cBlocksY = mipmapSize.height / pSurface->cyBlock;
232	if (mipmapSize.height % pSurface->cyBlock)
233	++cBlocksY;
234	}
235
236	AssertBreakStmt(cBlocksX > 0 && cBlocksY > 0 && mipmapSize.depth > 0, rc = VERR_INVALID_PARAMETER);
237
238	const uint32_t cMaxBlocksX = cbMemRemaining / pSurface->cbBlock;
239	AssertBreakStmt(cBlocksX < cMaxBlocksX, rc = VERR_INVALID_PARAMETER);
240
241	const uint32_t cbSurfacePitch = pSurface->cbBlock * cBlocksX;
242	LogFunc(("cbSurfacePitch=0x%x\n", cbSurfacePitch));
243
244	const uint32_t cMaxBlocksY = cbMemRemaining / cbSurfacePitch;
245	AssertBreakStmt(cBlocksY < cMaxBlocksY, rc = VERR_INVALID_PARAMETER);
246
247	const uint32_t cbSurfacePlane = cbSurfacePitch * cBlocksY;
248
249	const uint32_t cMaxDepth = cbMemRemaining / cbSurfacePlane;
250	AssertBreakStmt(mipmapSize.depth < cMaxDepth, rc = VERR_INVALID_PARAMETER);
251
252	const uint32_t cbSurface = cbSurfacePlane * mipmapSize.depth;
253
254	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iMipmap];
255	pMipmapLevel->mipmapSize = mipmapSize;
256	pMipmapLevel->cBlocksX = cBlocksX;
257	pMipmapLevel->cBlocksY = cBlocksY;
258	pMipmapLevel->cBlocks = cBlocksX * cBlocksY * mipmapSize.depth;
259	pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
260	pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
261	pMipmapLevel->cbSurface = cbSurface;
262	pMipmapLevel->pSurfaceData = NULL;
263
264	cbMemRemaining -= cbSurface;
265	}
266
267	AssertRCBreak(rc);
268
269	mipmapSize.width >>= 1;
270	if (mipmapSize.width == 0) mipmapSize.width = 1;
271	mipmapSize.height >>= 1;
272	if (mipmapSize.height == 0) mipmapSize.height = 1;
273	mipmapSize.depth >>= 1;
274	if (mipmapSize.depth == 0) mipmapSize.depth = 1;
275	}
276
277	AssertLogRelRCReturnStmt(rc, RTMemFree(pSurface->paMipmapLevels), rc);
278
279	#ifdef VMSVGA3D_DIRECT3D
280	/* Translate the format and usage flags to D3D. */
281	pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
282	pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
283	pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
284	pSurface->fUsageD3D = 0;
285	if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
286	pSurface->fUsageD3D \|= D3DUSAGE_DYNAMIC;
287	if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
288	pSurface->fUsageD3D \|= D3DUSAGE_RENDERTARGET;
289	if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
290	pSurface->fUsageD3D \|= D3DUSAGE_DEPTHSTENCIL;
291	if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
292	pSurface->fUsageD3D \|= D3DUSAGE_WRITEONLY;
293	if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
294	pSurface->fUsageD3D \|= D3DUSAGE_AUTOGENMIPMAP;
295	pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
296	/* pSurface->u.pSurface = NULL; */
297	/* pSurface->bounce.pTexture = NULL; */
298	/* pSurface->emulated.pTexture = NULL; */
299	#elif defined(VMSVGA3D_D3D11)
300	/* Nothing, because all backend specific data reside in pSurface->pBackendSurface. */
301	#else
302	/* pSurface->fEmulated = false; */
303	/* pSurface->idEmulated = OPENGL_INVALID_ID; */
304	vmsvga3dSurfaceFormat2OGL(pSurface, format);
305	#endif
306
307	#ifdef LOG_ENABLED
308	SVGA3dSurfaceAllFlags const f = surfaceFlags;
309	LogFunc(("surface flags:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x%RX64\n",
310	(f & SVGA3D_SURFACE_CUBEMAP) ? " CUBEMAP" : "",
311	(f & SVGA3D_SURFACE_HINT_STATIC) ? " HINT_STATIC" : "",
312	(f & SVGA3D_SURFACE_HINT_DYNAMIC) ? " HINT_DYNAMIC" : "",
313	(f & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " HINT_INDEXBUFFER" : "",
314	(f & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " HINT_VERTEXBUFFER" : "",
315	(f & SVGA3D_SURFACE_HINT_TEXTURE) ? " HINT_TEXTURE" : "",
316	(f & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " HINT_RENDERTARGET" : "",
317	(f & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " HINT_DEPTHSTENCIL" : "",
318	(f & SVGA3D_SURFACE_HINT_WRITEONLY) ? " HINT_WRITEONLY" : "",
319	(f & SVGA3D_SURFACE_DEAD2) ? " DEAD2" : "",
320	(f & SVGA3D_SURFACE_AUTOGENMIPMAPS) ? " AUTOGENMIPMAPS" : "",
321	(f & SVGA3D_SURFACE_DEAD1) ? " DEAD1" : "",
322	(f & SVGA3D_SURFACE_MOB_PITCH) ? " MOB_PITCH" : "",
323	(f & SVGA3D_SURFACE_INACTIVE) ? " INACTIVE" : "",
324	(f & SVGA3D_SURFACE_HINT_RT_LOCKABLE) ? " HINT_RT_LOCKABLE" : "",
325	(f & SVGA3D_SURFACE_VOLUME) ? " VOLUME" : "",
326	(f & SVGA3D_SURFACE_SCREENTARGET) ? " SCREENTARGET" : "",
327	(f & SVGA3D_SURFACE_ALIGN16) ? " ALIGN16" : "",
328	(f & SVGA3D_SURFACE_1D) ? " 1D" : "",
329	(f & SVGA3D_SURFACE_ARRAY) ? " ARRAY" : "",
330	(f & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) ? " BIND_VERTEX_BUFFER" : "",
331	(f & SVGA3D_SURFACE_BIND_INDEX_BUFFER) ? " BIND_INDEX_BUFFER" : "",
332	(f & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) ? " BIND_CONSTANT_BUFFER" : "",
333	(f & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) ? " BIND_SHADER_RESOURCE" : "",
334	(f & SVGA3D_SURFACE_BIND_RENDER_TARGET) ? " BIND_RENDER_TARGET" : "",
335	(f & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) ? " BIND_DEPTH_STENCIL" : "",
336	(f & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) ? " BIND_STREAM_OUTPUT" : "",
337	(f & SVGA3D_SURFACE_STAGING_UPLOAD) ? " STAGING_UPLOAD" : "",
338	(f & SVGA3D_SURFACE_STAGING_DOWNLOAD) ? " STAGING_DOWNLOAD" : "",
339	(f & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE) ? " HINT_INDIRECT_UPDATE" : "",
340	(f & SVGA3D_SURFACE_TRANSFER_FROM_BUFFER) ? " TRANSFER_FROM_BUFFER" : "",
341	(f & SVGA3D_SURFACE_RESERVED1) ? " RESERVED1" : "",
342	(f & SVGA3D_SURFACE_MULTISAMPLE) ? " MULTISAMPLE" : "",
343	(f & SVGA3D_SURFACE_BIND_UAVIEW) ? " BIND_UAVIEW" : "",
344	(f & SVGA3D_SURFACE_TRANSFER_TO_BUFFER) ? " TRANSFER_TO_BUFFER" : "",
345	(f & SVGA3D_SURFACE_BIND_LOGICOPS) ? " BIND_LOGICOPS" : "",
346	(f & SVGA3D_SURFACE_BIND_RAW_VIEWS) ? " BIND_RAW_VIEWS" : "",
347	(f & SVGA3D_SURFACE_BUFFER_STRUCTURED) ? " BUFFER_STRUCTURED" : "",
348	(f & SVGA3D_SURFACE_DRAWINDIRECT_ARGS) ? " DRAWINDIRECT_ARGS" : "",
349	(f & SVGA3D_SURFACE_RESOURCE_CLAMP) ? " RESOURCE_CLAMP" : "",
350	(f & SVGA3D_SURFACE_FLAG_MAX) ? " FLAG_MAX" : "",
351	f & ~(SVGA3D_SURFACE_FLAG_MAX - 1ULL)
352	));
353	#endif
354
355	Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
356
357	/* Allocate buffer to hold the surface data until we can move it into a D3D object */
358	for (uint32_t i = 0; i < numMipLevels * pSurface->cFaces; ++i)
359	{
360	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
361	pMipmapLevel->pSurfaceData = RTMemAllocZ(pMipmapLevel->cbSurface);
362	AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
363	}
364
365	pSurface->id = sid;
366	return VINF_SUCCESS;
367	}
368
369
370	/**
371	* Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
372	*
373	* @returns VBox status code (currently ignored).
374	* @param pThisCC The VGA/VMSVGA state for ring-3.
375	* @param sid The ID of the surface to destroy.
376	*/
377	int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
378	{
379	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
380	AssertReturn(pState, VERR_NO_MEMORY);
381
382	PVMSVGA3DSURFACE pSurface;
383	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
384	AssertRCReturn(rc, rc);
385
386	LogFunc(("sid=%u\n", sid));
387
388	/* Check all contexts if this surface is used as a render target or active texture. */
389	for (uint32_t cid = 0; cid < pState->cContexts; cid++)
390	{
391	PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
392	if (pContext->id == cid)
393	{
394	for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
395	if (pContext->aSidActiveTextures[i] == sid)
396	pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
397	for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
398	if (pContext->state.aRenderTargets[i] == sid)
399	pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
400	}
401	}
402
403	vmsvga3dBackSurfaceDestroy(pState, pSurface);
404
405	if (pSurface->paMipmapLevels)
406	{
407	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->cFaces; ++i)
408	RTMemFreeZ(pSurface->paMipmapLevels[i].pSurfaceData, pSurface->paMipmapLevels[i].cbSurface);
409	RTMemFree(pSurface->paMipmapLevels);
410	}
411
412	memset(pSurface, 0, sizeof(*pSurface));
413	pSurface->id = SVGA3D_INVALID_ID;
414
415	return VINF_SUCCESS;
416	}
417
418
419	/**
420	* Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
421	*
422	* @returns VBox status code (currently ignored).
423	* @param pThis The shared VGA/VMSVGA state.
424	* @param pThisCC The VGA/VMSVGA state for ring-3.
425	* @param pDstSfcImg
426	* @param pDstBox
427	* @param pSrcSfcImg
428	* @param pSrcBox
429	* @param enmMode
430	*/
431	int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pDstSfcImg, SVGA3dBox const pDstBox,
432	SVGA3dSurfaceImageId const pSrcSfcImg, SVGA3dBox const pSrcBox, SVGA3dStretchBltMode enmMode)
433	{
434	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
435	AssertReturn(pState, VERR_NO_MEMORY);
436
437	int rc;
438
439	uint32_t const sidSrc = pSrcSfcImg->sid;
440	PVMSVGA3DSURFACE pSrcSurface;
441	rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
442	AssertRCReturn(rc, rc);
443
444	uint32_t const sidDst = pDstSfcImg->sid;
445	PVMSVGA3DSURFACE pDstSurface;
446	rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
447	AssertRCReturn(rc, rc);
448
449	AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
450	AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->cLevels, VERR_INVALID_PARAMETER);
451	AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
452	AssertReturn(pDstSfcImg->mipmap < pDstSurface->cLevels, VERR_INVALID_PARAMETER);
453
454	PVMSVGA3DCONTEXT pContext;
455	#ifdef VMSVGA3D_OPENGL
456	LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
457	sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
458	sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
459	pContext = &pState->SharedCtx;
460	VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
461	#else
462	LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
463	sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
464	sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
465
466	uint32_t cid = pDstSurface->idAssociatedContext;
467	if (cid == SVGA3D_INVALID_ID)
468	cid = pSrcSurface->idAssociatedContext;
469
470	/* At least one of surfaces must be in hardware. */
471	AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
472
473	rc = vmsvga3dContextFromCid(pState, cid, &pContext);
474	AssertRCReturn(rc, rc);
475	#endif
476
477	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
478	{
479	/* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
480	LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->surfaceFlags, pSrcSurface->format));
481	rc = vmsvga3dBackCreateTexture(pState, pContext, pContext->id, pSrcSurface);
482	AssertRCReturn(rc, rc);
483	}
484
485	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
486	{
487	/* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
488	LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->surfaceFlags, pDstSurface->format));
489	rc = vmsvga3dBackCreateTexture(pState, pContext, pContext->id, pDstSurface);
490	AssertRCReturn(rc, rc);
491	}
492
493	PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
494	rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
495	AssertRCReturn(rc, rc);
496
497	PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
498	rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
499	AssertRCReturn(rc, rc);
500
501	SVGA3dBox clipSrcBox = *pSrcBox;
502	SVGA3dBox clipDstBox = *pDstBox;
503	vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
504	vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
505
506	return vmsvga3dBackSurfaceStretchBlt(pThis, pState,
507	pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
508	pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
509	enmMode, pContext);
510	}
511
512	/**
513	* Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
514	*
515	* @returns VBox status code (currently ignored).
516	* @param pThis The shared VGA/VMSVGA instance data.
517	* @param pThisCC The VGA/VMSVGA state for ring-3.
518	* @param guest .
519	* @param host .
520	* @param transfer .
521	* @param cCopyBoxes .
522	* @param paBoxes .
523	*/
524	int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestImage guest, SVGA3dSurfaceImageId host,
525	SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
526	{
527	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
528	AssertReturn(pState, VERR_NO_MEMORY);
529
530	PVMSVGA3DSURFACE pSurface;
531	int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
532	AssertRCReturn(rc, rc);
533
534	LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
535	(pSurface->surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
536	guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
537	host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
538
539	PVMSVGA3DMIPMAPLEVEL pMipLevel;
540	rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
541	AssertRCReturn(rc, rc);
542
543	PVMSVGA3DCONTEXT pContext = NULL;
544	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
545	{
546	/*
547	* Not realized in host hardware/library yet, we have to work with
548	* the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
549	*/
550	AssertReturn(pMipLevel->pSurfaceData, VERR_INTERNAL_ERROR);
551	}
552	else
553	{
554	#ifdef VMSVGA3D_DIRECT3D
555	/* Flush the drawing pipeline for this surface as it could be used in a shared context. */
556	vmsvga3dSurfaceFlush(pSurface);
557	#elif defined(VMSVGA3D_D3D11)
558	/** @todo */
559	#else /* VMSVGA3D_OPENGL */
560	pContext = &pState->SharedCtx;
561	VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
562	#endif
563	}
564
565	/* SVGA_3D_CMD_SURFACE_DMA:
566	* "define the 'source' in each copyBox as the guest image and the
567	* 'destination' as the host image, regardless of transfer direction."
568	*/
569	for (uint32_t i = 0; i < cCopyBoxes; ++i)
570	{
571	Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
572	VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
573	i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
574
575	/* Apparently we're supposed to clip it (gmr test sample) */
576
577	/* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
578	SVGA3dBox hostBox;
579	hostBox.x = paBoxes[i].x;
580	hostBox.y = paBoxes[i].y;
581	hostBox.z = paBoxes[i].z;
582	hostBox.w = paBoxes[i].w;
583	hostBox.h = paBoxes[i].h;
584	hostBox.d = paBoxes[i].d;
585	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
586
587	if ( !hostBox.w
588	\|\| !hostBox.h
589	\|\| !hostBox.d)
590	{
591	Log(("Skip empty box\n"));
592	continue;
593	}
594	RT_UNTRUSTED_VALIDATED_FENCE();
595
596	/* Adjust the guest, i.e. "src", point.
597	* Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
598	*/
599	uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
600	uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
601	uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
602
603	/* Calculate offsets of the image blocks for the transfer. */
604	uint32_t u32HostBlockX;
605	uint32_t u32HostBlockY;
606	uint32_t u32GuestBlockX;
607	uint32_t u32GuestBlockY;
608	uint32_t cBlocksX;
609	uint32_t cBlocksY;
610	if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
611	{
612	u32HostBlockX = hostBox.x;
613	u32HostBlockY = hostBox.y;
614
615	u32GuestBlockX = srcx;
616	u32GuestBlockY = srcy;
617
618	cBlocksX = hostBox.w;
619	cBlocksY = hostBox.h;
620	}
621	else
622	{
623	/* Pixels to blocks. */
624	u32HostBlockX = hostBox.x / pSurface->cxBlock;
625	u32HostBlockY = hostBox.y / pSurface->cyBlock;
626	Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
627	Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
628
629	u32GuestBlockX = srcx / pSurface->cxBlock;
630	u32GuestBlockY = srcy / pSurface->cyBlock;
631	Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
632	Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
633
634	cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
635	cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
636	}
637
638	uint32_t cbGuestPitch = guest.pitch;
639	if (cbGuestPitch == 0)
640	{
641	/* Host must "assume image is tightly packed". Our surfaces are. */
642	cbGuestPitch = pMipLevel->cbSurfacePitch;
643	}
644	else
645	{
646	/* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
647	AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
648	RT_UNTRUSTED_VALIDATED_FENCE();
649	}
650
651	/* srcx, srcy and srcz values are used to calculate the guest offset.
652	* The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
653	*/
654	AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
655	AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
656	AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
657	RT_UNTRUSTED_VALIDATED_FENCE();
658
659	if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
660	\|\| VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
661	{
662	uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
663	u32GuestBlockY * cbGuestPitch +
664	srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
665	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
666
667	/* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
668	uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
669	u32HostBlockY * pMipLevel->cbSurfacePitch +
670	hostBox.z * pMipLevel->cbSurfacePlane;
671	AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
672
673	for (uint32_t z = 0; z < hostBox.d; ++z)
674	{
675	rc = vmsvgaR3GmrTransfer(pThis,
676	pThisCC,
677	transfer,
678	(uint8_t *)pMipLevel->pSurfaceData,
679	pMipLevel->cbSurface,
680	uHostOffset,
681	(int32_t)pMipLevel->cbSurfacePitch,
682	guest.ptr,
683	(uint32_t)uGuestOffset,
684	cbGuestPitch,
685	cBlocksX * pSurface->cbBlock,
686	cBlocksY);
687	AssertRC(rc);
688
689	Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
690	z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
691
692	uHostOffset += pMipLevel->cbSurfacePlane;
693	uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
694	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
695	}
696	}
697
698	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
699	{
700	SVGA3dCopyBox clipBox;
701	clipBox.x = hostBox.x;
702	clipBox.y = hostBox.y;
703	clipBox.z = hostBox.z;
704	clipBox.w = hostBox.w;
705	clipBox.h = hostBox.h;
706	clipBox.d = hostBox.d;
707	clipBox.srcx = srcx;
708	clipBox.srcy = srcy;
709	clipBox.srcz = srcz;
710	rc = vmsvga3dBackSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
711	guest.ptr, cbGuestPitch, transfer,
712	&clipBox, pContext, rc, i);
713	AssertRC(rc);
714	}
715	}
716
717	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
718	{
719	pMipLevel->fDirty = true;
720	pSurface->fDirty = true;
721	}
722
723	return rc;
724	}
725
726	static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr guestResult,
727	SVGA3dQueryState enmState, uint32_t u32Result)
728	{
729	SVGA3dQueryResult queryResult;
730	queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
731	queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
732	queryResult.result32 = u32Result;
733
734	int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
735	(uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
736	guestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
737	AssertRC(rc);
738	return rc;
739	}
740
741	int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
742	{
743	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
744	AssertReturn(pState, VERR_NO_MEMORY);
745
746	LogFunc(("cid=%u type=%d\n", cid, type));
747
748	PVMSVGA3DCONTEXT pContext;
749	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
750	AssertRCReturn(rc, rc);
751
752	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
753	{
754	VMSVGA3DQUERY *p = &pContext->occlusion;
755	if (!VMSVGA3DQUERY_EXISTS(p))
756	{
757	/* Lazy creation of the query object. */
758	rc = vmsvga3dOcclusionQueryCreate(pState, pContext);
759	AssertRCReturn(rc, rc);
760	}
761
762	rc = vmsvga3dOcclusionQueryBegin(pState, pContext);
763	AssertRCReturn(rc, rc);
764
765	p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
766	p->u32QueryResult = 0;
767
768	return VINF_SUCCESS;
769	}
770
771	/* Nothing else for VGPU9. */
772	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
773	}
774
775	int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, SVGAGuestPtr guestResult)
776	{
777	RT_NOREF(guestResult);
778	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
779	AssertReturn(pState, VERR_NO_MEMORY);
780
781	LogFunc(("cid=%u type=%d guestResult %d:0x%x\n", cid, type, guestResult.gmrId, guestResult.offset));
782
783	PVMSVGA3DCONTEXT pContext;
784	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
785	AssertRCReturn(rc, rc);
786
787	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
788	{
789	VMSVGA3DQUERY *p = &pContext->occlusion;
790	Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
791	AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
792
793	rc = vmsvga3dOcclusionQueryEnd(pState, pContext);
794	AssertRCReturn(rc, rc);
795
796	p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
797
798	/* Do not touch guestResult, because the guest will call WaitForQuery. */
799	return VINF_SUCCESS;
800	}
801
802	/* Nothing else for VGPU9. */
803	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
804	}
805
806	int vmsvga3dQueryWait(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, SVGAGuestPtr guestResult)
807	{
808	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
809	AssertReturn(pState, VERR_NO_MEMORY);
810
811	LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, guestResult.gmrId, guestResult.offset));
812
813	PVMSVGA3DCONTEXT pContext;
814	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
815	AssertRCReturn(rc, rc);
816
817	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
818	{
819	VMSVGA3DQUERY *p = &pContext->occlusion;
820	if (VMSVGA3DQUERY_EXISTS(p))
821	{
822	if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
823	{
824	/* Only if not already in SIGNALED state,
825	* i.e. not a second read from the guest or after restoring saved state.
826	*/
827	uint32_t u32Pixels = 0;
828	rc = vmsvga3dOcclusionQueryGetData(pState, pContext, &u32Pixels);
829	if (RT_SUCCESS(rc))
830	{
831	p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
832	p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
833	}
834	}
835
836	if (RT_SUCCESS(rc))
837	{
838	/* Return data to the guest. */
839	vmsvga3dQueryWriteResult(pThis, pThisCC, guestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
840	return VINF_SUCCESS;
841	}
842	}
843	else
844	{
845	AssertMsgFailed(("GetData Query is NULL\n"));
846	}
847
848	rc = VERR_INTERNAL_ERROR;
849	}
850	else
851	{
852	rc = VERR_NOT_IMPLEMENTED;
853	}
854
855	vmsvga3dQueryWriteResult(pThis, pThisCC, guestResult, SVGA3D_QUERYSTATE_FAILED, 0);
856	AssertFailedReturn(rc);
857	}
858
859	int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
860	SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
861	{
862	/* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
863	LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
864	idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
865	srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
866	for (uint32_t i = 0; i < cRects; i++)
867	{
868	LogFunc(("clipping rect %d (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
869	}
870
871	VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
872	AssertReturn(pScreen, VERR_INTERNAL_ERROR);
873
874	/* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
875	SVGA3dSurfaceImageId src;
876	src.sid = srcImage.sid;
877	src.mipmap = 0;
878	src.face = 0;
879
880	if (pScreen->pHwScreen)
881	{
882	/* Use the backend accelerated method, if available. */
883	int rc = vmsvga3dBackSurfaceBlitToScreen(pThisCC, pScreen,
884	destRect, src, srcRect, cRects, pRect);
885	if (rc == VINF_SUCCESS)
886	{
887	return VINF_SUCCESS;
888	}
889	}
890
891	/** @todo scaling */
892	AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
893
894	SVGA3dCopyBox box;
895	SVGAGuestImage dest;
896
897	box.srcz = 0;
898	box.z = 0;
899	box.d = 1;
900
901	dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
902	dest.ptr.offset = pScreen->offVRAM;
903	dest.pitch = pScreen->cbPitch;
904
905	if (cRects == 0)
906	{
907	/* easy case; no clipping */
908
909	/* SVGA_3D_CMD_SURFACE_DMA:
910	* 'define the "source" in each copyBox as the guest image and the
911	* "destination" as the host image, regardless of transfer direction.'
912	*
913	* Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
914	* it must set the copyBox "source" to the guest destination coords and
915	* the copyBox "destination" to the host surface source coords.
916	*/
917	/* Host image. */
918	box.x = srcRect.left;
919	box.y = srcRect.top;
920	box.w = srcRect.right - srcRect.left;
921	box.h = srcRect.bottom - srcRect.top;
922	/* Guest image. */
923	box.srcx = destRect.left;
924	box.srcy = destRect.top;
925
926	int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
927	AssertRCReturn(rc, rc);
928
929	/* Update the guest image, which is at box.src. */
930	vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
931	}
932	else
933	{
934	/** @todo merge into one SurfaceDMA call */
935	for (uint32_t i = 0; i < cRects; i++)
936	{
937	/* "The clip rectangle coordinates are measured
938	* relative to the top-left corner of destRect."
939	* Therefore they are relative to the top-left corner of srcRect as well.
940	*/
941
942	/* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
943	box.x = srcRect.left + pRect[i].left;
944	box.y = srcRect.top + pRect[i].top;
945	box.w = pRect[i].right - pRect[i].left;
946	box.h = pRect[i].bottom - pRect[i].top;
947	/* Guest image. The target screen memory is currently in the guest VRAM. */
948	box.srcx = destRect.left + pRect[i].left;
949	box.srcy = destRect.top + pRect[i].top;
950
951	int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
952	AssertRCReturn(rc, rc);
953
954	/* Update the guest image, which is at box.src. */
955	vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
956	}
957	}
958
959	return VINF_SUCCESS;
960	}
961
962	int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
963	{
964	/* Deprecated according to svga3d_reg.h. */
965	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
966	AssertReturn(pState, VERR_NO_MEMORY);
967
968	PVMSVGA3DSURFACE pSurface;
969	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
970	AssertRCReturn(rc, rc);
971
972	/** @todo Detect screen from coords? Or split rect to screens? */
973	VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
974	AssertReturn(pScreen, VERR_INTERNAL_ERROR);
975
976	/* If there are no recangles specified, just grab a screenful. */
977	SVGA3dCopyRect DummyRect;
978	if (cRects != 0)
979	{ /* likely */ }
980	else
981	{
982	/** @todo Find the usecase for this or check what the original device does.
983	* The original code was doing some scaling based on the surface
984	* size... */
985	AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
986	DummyRect.x = DummyRect.srcx = 0;
987	DummyRect.y = DummyRect.srcy = 0;
988	DummyRect.w = pScreen->cWidth;
989	DummyRect.h = pScreen->cHeight;
990	cRects = 1;
991	pRect = &DummyRect;
992	}
993
994	uint32_t i;
995	for (i = 0; i < cRects; ++i)
996	{
997	uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
998	SVGASignedRect destRect;
999	destRect.left = pRect[i].x;
1000	destRect.top = pRect[i].y;
1001	destRect.right = pRect[i].x + pRect[i].w;
1002	destRect.bottom = pRect[i].y + pRect[i].h;
1003
1004	SVGA3dSurfaceImageId src;
1005	src.sid = sid;
1006	src.face = 0;
1007	src.mipmap = 0;
1008
1009	SVGASignedRect srcRect;
1010	srcRect.left = pRect[i].srcx;
1011	srcRect.top = pRect[i].srcy;
1012	srcRect.right = pRect[i].srcx + pRect[i].w;
1013	srcRect.bottom = pRect[i].srcy + pRect[i].h;
1014
1015	/* Entire rect. */
1016	rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
1017	AssertRCReturn(rc, rc);
1018	}
1019
1020	return VINF_SUCCESS;
1021	}
1022
1023	int vmsvga3dDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1024	{
1025	if (pScreen->pHwScreen)
1026	{
1027	vmsvga3dBackDestroyScreen(pThisCC, pScreen);
1028	}
1029
1030	int rc = vmsvga3dBackDefineScreen(pThis, pThisCC, pScreen);
1031	if (RT_SUCCESS(rc))
1032	{
1033	LogRelMax(1, ("VMSVGA: using accelerated graphics output\n"));
1034	}
1035	return rc;
1036	}
1037
1038	int vmsvga3dDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1039	{
1040	return vmsvga3dBackDestroyScreen(pThisCC, pScreen);
1041	}
1042
1043	int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap)
1044	{
1045	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1046	AssertReturn(pState, VERR_INVALID_STATE);
1047
1048	PVMSVGA3DSURFACE pSurface;
1049	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1050	AssertRCReturn(rc, rc);
1051
1052	if (face == SVGA_ID_INVALID && mipmap == SVGA_ID_INVALID)
1053	{
1054	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->cFaces; ++i)
1055	{
1056	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1057	pMipmapLevel->fDirty = true;
1058	}
1059	}
1060	else
1061	{
1062	PVMSVGA3DMIPMAPLEVEL pMipmapLevel;
1063	rc = vmsvga3dMipmapLevel(pSurface, face, mipmap, &pMipmapLevel);
1064	AssertRCReturn(rc, rc);
1065
1066	pMipmapLevel->fDirty = true;
1067	}
1068	pSurface->fDirty = true;
1069
1070	return rc;
1071	}

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 88904

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