DevVGA-SVGA3d.cpp@ 102520

Last change on this file since 102520 was 102520, checked in by vboxsync, 11 months ago
Devices/Graphics: planar textures; video commands. bugref:10529
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1	/* $Id: DevVGA-SVGA3d.cpp 102520 2023-12-07 12:06:26Z vboxsync $ */
2	/** @file
3	* DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4	*/
5
6	/*
7	* Copyright (C) 2013-2023 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33	#include <VBox/vmm/pdmdev.h>
34	#include <iprt/errcore.h>
35	#include <VBox/log.h>
36
37	#include <iprt/assert.h>
38	#include <iprt/mem.h>
39
40	#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
41	#include <VBoxVideo.h> /* required by DevVGA.h */
42
43	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
44	#include "DevVGA.h"
45
46	#include "DevVGA-SVGA.h"
47	#include "DevVGA-SVGA3d.h"
48	#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
49	#include "DevVGA-SVGA3d-internal.h"
50	#include "DevVGA-SVGA-internal.h"
51
52
53	static int vmsvga3dSurfaceAllocMipLevels(PVMSVGA3DSURFACE pSurface)
54	{
55	/* Allocate buffer to hold the surface data until we can move it into a D3D object */
56	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
57	{
58	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
59	AssertReturn(pMipmapLevel->pSurfaceData == NULL, VERR_INVALID_STATE);
60	pMipmapLevel->pSurfaceData = RTMemAllocZ(pMipmapLevel->cbSurface);
61	AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
62	}
63	return VINF_SUCCESS;
64	}
65
66
67	static void vmsvga3dSurfaceFreeMipLevels(PVMSVGA3DSURFACE pSurface)
68	{
69	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
70	{
71	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
72	RTMemFreeZ(pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);
73	pMipmapLevel->pSurfaceData = NULL;
74	}
75	}
76
77
78	/**
79	* Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
80	* commands (fifo).
81	*
82	* @returns VBox status code (currently ignored).
83	* @param pThisCC The VGA/VMSVGA state for ring-3.
84	* @param sid The ID of the surface to (re-)define.
85	* @param surfaceFlags .
86	* @param format .
87	* @param multisampleCount .
88	* @param autogenFilter .
89	* @param numMipLevels .
90	* @param pMipLevel0Size .
91	* @param arraySize Number of elements in a texture array.
92	* @param fAllocMipLevels .
93	*/
94	int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, SVGA3dSurfaceAllFlags surfaceFlags, SVGA3dSurfaceFormat format,
95	uint32_t multisampleCount, SVGA3dTextureFilter autogenFilter,
96	uint32_t numMipLevels, SVGA3dSize const *pMipLevel0Size, uint32_t arraySize, bool fAllocMipLevels)
97	{
98	PVMSVGA3DSURFACE pSurface;
99	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
100	AssertReturn(pState, VERR_INVALID_STATE);
101
102	LogFunc(("sid=%u surfaceFlags=0x%RX64 format=%s (%#x) multiSampleCount=%d autogenFilter=%d, numMipLevels=%d size=(%dx%dx%d)\n",
103	sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
104	numMipLevels, pMipLevel0Size->width, pMipLevel0Size->height, pMipLevel0Size->depth));
105
106	ASSERT_GUEST_RETURN(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
107	ASSERT_GUEST_RETURN(numMipLevels >= 1 && numMipLevels <= SVGA3D_MAX_MIP_LEVELS, VERR_INVALID_PARAMETER);
108	ASSERT_GUEST_RETURN(arraySize <= SVGA3D_MAX_SURFACE_ARRAYSIZE, VERR_INVALID_PARAMETER);
109
110	if (sid >= pState->cSurfaces)
111	{
112	/* Grow the array. */
113	uint32_t cNew = RT_ALIGN(sid + 15, 16);
114	void pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) cNew);
115	AssertReturn(pvNew, VERR_NO_MEMORY);
116	pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
117	while (pState->cSurfaces < cNew)
118	{
119	pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
120	AssertReturn(pSurface, VERR_NO_MEMORY);
121	pSurface->id = SVGA3D_INVALID_ID;
122	pState->papSurfaces[pState->cSurfaces++] = pSurface;
123	}
124	}
125	pSurface = pState->papSurfaces[sid];
126
127	/* If one already exists with this id, then destroy it now. */
128	if (pSurface->id != SVGA3D_INVALID_ID)
129	vmsvga3dSurfaceDestroy(pThisCC, sid);
130
131	RT_ZERO(*pSurface);
132	// pSurface->pBackendSurface = NULL;
133	pSurface->id = SVGA3D_INVALID_ID; /* Keep this value until the surface init completes */
134	pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
135
136	if (arraySize)
137	pSurface->surfaceDesc.numArrayElements = arraySize; /* Also for an array of cubemaps where arraySize = 6 * numCubes. */
138	else if (surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
139	pSurface->surfaceDesc.numArrayElements = SVGA3D_MAX_SURFACE_FACES;
140	else
141	pSurface->surfaceDesc.numArrayElements = 1;
142
143	/** @todo This 'switch' and the surfaceFlags tweaks should not be necessary.
144	* The actual surface type will be figured out when the surface is actually used later.
145	* The backends code must be reviewed for unnecessary dependencies on the surfaceFlags value.
146	*/
147	/* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
148	* In some case we'll have to wait until the surface is used to create the D3D object.
149	*/
150	switch (format)
151	{
152	case SVGA3D_Z_D32:
153	case SVGA3D_Z_D16:
154	case SVGA3D_Z_D24S8:
155	case SVGA3D_Z_D15S1:
156	case SVGA3D_Z_D24X8:
157	case SVGA3D_Z_DF16:
158	case SVGA3D_Z_DF24:
159	case SVGA3D_Z_D24S8_INT:
160	Assert(surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL);
161	surfaceFlags \|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
162	break;
163
164	/* Texture compression formats */
165	case SVGA3D_DXT1:
166	case SVGA3D_DXT2:
167	case SVGA3D_DXT3:
168	case SVGA3D_DXT4:
169	case SVGA3D_DXT5:
170	/* Bump-map formats */
171	case SVGA3D_BUMPU8V8:
172	case SVGA3D_BUMPL6V5U5:
173	case SVGA3D_BUMPX8L8V8U8:
174	case SVGA3D_V8U8:
175	case SVGA3D_Q8W8V8U8:
176	case SVGA3D_CxV8U8:
177	case SVGA3D_X8L8V8U8:
178	case SVGA3D_A2W10V10U10:
179	case SVGA3D_V16U16:
180	/* Typical render target formats; we should allow render target buffers to be used as textures. */
181	case SVGA3D_X8R8G8B8:
182	case SVGA3D_A8R8G8B8:
183	case SVGA3D_R5G6B5:
184	case SVGA3D_X1R5G5B5:
185	case SVGA3D_A1R5G5B5:
186	case SVGA3D_A4R4G4B4:
187	Assert(surfaceFlags & (SVGA3D_SURFACE_HINT_TEXTURE \| SVGA3D_SURFACE_SCREENTARGET));
188	surfaceFlags \|= SVGA3D_SURFACE_HINT_TEXTURE;
189	break;
190
191	case SVGA3D_LUMINANCE8:
192	case SVGA3D_LUMINANCE4_ALPHA4:
193	case SVGA3D_LUMINANCE16:
194	case SVGA3D_LUMINANCE8_ALPHA8:
195	case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
196	case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
197	case SVGA3D_A2R10G10B10:
198	case SVGA3D_ALPHA8:
199	case SVGA3D_R_S10E5:
200	case SVGA3D_R_S23E8:
201	case SVGA3D_RG_S10E5:
202	case SVGA3D_RG_S23E8:
203	case SVGA3D_G16R16:
204	case SVGA3D_A16B16G16R16:
205	case SVGA3D_UYVY:
206	case SVGA3D_YUY2:
207	case SVGA3D_NV12:
208	case SVGA3D_FORMAT_DEAD2: /* Old SVGA3D_AYUV */
209	case SVGA3D_ATI1:
210	case SVGA3D_ATI2:
211	break;
212
213	/*
214	* Any surface can be used as a buffer object, but SVGA3D_BUFFER is
215	* the most efficient format to use when creating new surfaces
216	* expressly for index or vertex data.
217	*/
218	case SVGA3D_BUFFER:
219	break;
220
221	default:
222	break;
223	}
224
225	pSurface->f.surfaceFlags = surfaceFlags;
226	pSurface->format = format;
227	/* cFaces is 6 for a cubemaps and 1 otherwise. */
228	pSurface->cFaces = (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1);
229	pSurface->cLevels = numMipLevels;
230	pSurface->multiSampleCount = multisampleCount;
231	pSurface->autogenFilter = autogenFilter;
232	Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
233	Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
234	pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(numMipLevels * pSurface->surfaceDesc.numArrayElements * sizeof(VMSVGA3DMIPMAPLEVEL));
235	AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
236
237	pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock, &pSurface->cbPitchBlock);
238	AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
239
240	/** @todo cbMemRemaining = value of SVGA_REG_MOB_MAX_SIZE */
241	uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
242	SVGA3dSize mipmapSize = *pMipLevel0Size;
243	int rc = VINF_SUCCESS;
244
245	for (uint32_t i = 0; i < numMipLevels; ++i)
246	{
247	for (uint32_t iArray = 0; iArray < pSurface->surfaceDesc.numArrayElements; ++iArray)
248	{
249	uint32_t const iMipmap = vmsvga3dCalcSubresource(i, iArray, numMipLevels);
250	LogFunc(("[%d] array %d mip level %d (%d,%d,%d) cbBlock=%#x block %dx%d\n",
251	iMipmap, iArray, i, mipmapSize.width, mipmapSize.height, mipmapSize.depth,
252	pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
253
254	uint32_t cBlocksX;
255	uint32_t cBlocksY;
256	uint32_t cbSurfacePitch;
257	uint32_t cbSurfacePlane;
258	uint32_t cbSurface;
259	vmsvga3dSurfaceMipBufferSize(format, mipmapSize,
260	&cBlocksX, &cBlocksY, &cbSurfacePitch, &cbSurfacePlane, &cbSurface);
261	AssertBreakStmt(cbMemRemaining >= cbSurface, rc = VERR_INVALID_PARAMETER);
262
263	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iMipmap];
264	pMipmapLevel->mipmapSize = mipmapSize;
265	pMipmapLevel->cBlocksX = cBlocksX;
266	pMipmapLevel->cBlocksY = cBlocksY;
267	pMipmapLevel->cBlocks = cBlocksX * cBlocksY * mipmapSize.depth;
268	pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
269	pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
270	pMipmapLevel->cbSurface = cbSurface;
271	pMipmapLevel->pSurfaceData = NULL;
272
273	cbMemRemaining -= cbSurface;
274	}
275
276	AssertRCBreak(rc);
277
278	mipmapSize.width >>= 1;
279	if (mipmapSize.width == 0) mipmapSize.width = 1;
280	mipmapSize.height >>= 1;
281	if (mipmapSize.height == 0) mipmapSize.height = 1;
282	mipmapSize.depth >>= 1;
283	if (mipmapSize.depth == 0) mipmapSize.depth = 1;
284	}
285
286	AssertLogRelRCReturnStmt(rc, RTMemFree(pSurface->paMipmapLevels), rc);
287
288	/* Compute the size of one array element. */
289	pSurface->surfaceDesc.cbArrayElement = 0;
290	for (uint32_t i = 0; i < pSurface->cLevels; ++i)
291	{
292	PVMSVGA3DMIPMAPLEVEL pMipLevel = &pSurface->paMipmapLevels[i];
293	pSurface->surfaceDesc.cbArrayElement += pMipLevel->cbSurface;
294	}
295
296	if (vmsvga3dIsLegacyBackend(pThisCC))
297	{
298	#ifdef VMSVGA3D_DIRECT3D
299	/* pSurface->hSharedObject = NULL; */
300	/* pSurface->pSharedObjectTree = NULL; */
301	/* Translate the format and usage flags to D3D. */
302	pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
303	pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
304	pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
305	pSurface->fUsageD3D = 0;
306	if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
307	pSurface->fUsageD3D \|= D3DUSAGE_DYNAMIC;
308	if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
309	pSurface->fUsageD3D \|= D3DUSAGE_RENDERTARGET;
310	if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
311	pSurface->fUsageD3D \|= D3DUSAGE_DEPTHSTENCIL;
312	if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
313	pSurface->fUsageD3D \|= D3DUSAGE_WRITEONLY;
314	if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
315	pSurface->fUsageD3D \|= D3DUSAGE_AUTOGENMIPMAP;
316	pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
317	/* pSurface->u.pSurface = NULL; */
318	/* pSurface->bounce.pTexture = NULL; */
319	/* pSurface->emulated.pTexture = NULL; */
320	#else
321	/* pSurface->oglId.buffer = OPENGL_INVALID_ID; */
322	/* pSurface->fEmulated = false; */
323	/* pSurface->idEmulated = OPENGL_INVALID_ID; */
324	vmsvga3dSurfaceFormat2OGL(pSurface, format);
325	#endif
326	}
327
328	#ifdef LOG_ENABLED
329	SVGA3dSurfaceAllFlags const f = surfaceFlags;
330	LogFunc(("surface flags:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x%RX64\n",
331	(f & SVGA3D_SURFACE_CUBEMAP) ? " CUBEMAP" : "",
332	(f & SVGA3D_SURFACE_HINT_STATIC) ? " HINT_STATIC" : "",
333	(f & SVGA3D_SURFACE_HINT_DYNAMIC) ? " HINT_DYNAMIC" : "",
334	(f & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " HINT_INDEXBUFFER" : "",
335	(f & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " HINT_VERTEXBUFFER" : "",
336	(f & SVGA3D_SURFACE_HINT_TEXTURE) ? " HINT_TEXTURE" : "",
337	(f & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " HINT_RENDERTARGET" : "",
338	(f & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " HINT_DEPTHSTENCIL" : "",
339	(f & SVGA3D_SURFACE_HINT_WRITEONLY) ? " HINT_WRITEONLY" : "",
340	(f & SVGA3D_SURFACE_DEAD2) ? " DEAD2" : "",
341	(f & SVGA3D_SURFACE_AUTOGENMIPMAPS) ? " AUTOGENMIPMAPS" : "",
342	(f & SVGA3D_SURFACE_DEAD1) ? " DEAD1" : "",
343	(f & SVGA3D_SURFACE_MOB_PITCH) ? " MOB_PITCH" : "",
344	(f & SVGA3D_SURFACE_INACTIVE) ? " INACTIVE" : "",
345	(f & SVGA3D_SURFACE_HINT_RT_LOCKABLE) ? " HINT_RT_LOCKABLE" : "",
346	(f & SVGA3D_SURFACE_VOLUME) ? " VOLUME" : "",
347	(f & SVGA3D_SURFACE_SCREENTARGET) ? " SCREENTARGET" : "",
348	(f & SVGA3D_SURFACE_ALIGN16) ? " ALIGN16" : "",
349	(f & SVGA3D_SURFACE_1D) ? " 1D" : "",
350	(f & SVGA3D_SURFACE_ARRAY) ? " ARRAY" : "",
351	(f & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) ? " BIND_VERTEX_BUFFER" : "",
352	(f & SVGA3D_SURFACE_BIND_INDEX_BUFFER) ? " BIND_INDEX_BUFFER" : "",
353	(f & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) ? " BIND_CONSTANT_BUFFER" : "",
354	(f & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) ? " BIND_SHADER_RESOURCE" : "",
355	(f & SVGA3D_SURFACE_BIND_RENDER_TARGET) ? " BIND_RENDER_TARGET" : "",
356	(f & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) ? " BIND_DEPTH_STENCIL" : "",
357	(f & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) ? " BIND_STREAM_OUTPUT" : "",
358	(f & SVGA3D_SURFACE_STAGING_UPLOAD) ? " STAGING_UPLOAD" : "",
359	(f & SVGA3D_SURFACE_STAGING_DOWNLOAD) ? " STAGING_DOWNLOAD" : "",
360	(f & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE) ? " HINT_INDIRECT_UPDATE" : "",
361	(f & SVGA3D_SURFACE_TRANSFER_FROM_BUFFER) ? " TRANSFER_FROM_BUFFER" : "",
362	(f & SVGA3D_SURFACE_RESERVED1) ? " RESERVED1" : "",
363	(f & SVGA3D_SURFACE_MULTISAMPLE) ? " MULTISAMPLE" : "",
364	(f & SVGA3D_SURFACE_BIND_UAVIEW) ? " BIND_UAVIEW" : "",
365	(f & SVGA3D_SURFACE_TRANSFER_TO_BUFFER) ? " TRANSFER_TO_BUFFER" : "",
366	(f & SVGA3D_SURFACE_BIND_LOGICOPS) ? " BIND_LOGICOPS" : "",
367	(f & SVGA3D_SURFACE_BIND_RAW_VIEWS) ? " BIND_RAW_VIEWS" : "",
368	(f & SVGA3D_SURFACE_BUFFER_STRUCTURED) ? " BUFFER_STRUCTURED" : "",
369	(f & SVGA3D_SURFACE_DRAWINDIRECT_ARGS) ? " DRAWINDIRECT_ARGS" : "",
370	(f & SVGA3D_SURFACE_RESOURCE_CLAMP) ? " RESOURCE_CLAMP" : "",
371	(f & SVGA3D_SURFACE_FLAG_MAX) ? " FLAG_MAX" : "",
372	f & ~(SVGA3D_SURFACE_FLAG_MAX - 1ULL)
373	));
374	#endif
375
376	Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
377
378	if (fAllocMipLevels)
379	{
380	rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
381	AssertRCReturn(rc, rc);
382	}
383
384	pSurface->id = sid;
385	return VINF_SUCCESS;
386	}
387
388
389	/**
390	* Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
391	*
392	* @returns VBox status code (currently ignored).
393	* @param pThisCC The VGA/VMSVGA state for ring-3.
394	* @param sid The ID of the surface to destroy.
395	*/
396	int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
397	{
398	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
399	AssertReturn(pState, VERR_NO_MEMORY);
400
401	PVMSVGA3DSURFACE pSurface;
402	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
403	AssertRCReturn(rc, rc);
404
405	LogFunc(("sid=%u\n", sid));
406
407	/* Check all contexts if this surface is used as a render target or active texture. */
408	for (uint32_t cid = 0; cid < pState->cContexts; cid++)
409	{
410	PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
411	if (pContext->id == cid)
412	{
413	for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
414	if (pContext->aSidActiveTextures[i] == sid)
415	pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
416	for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
417	if (pContext->state.aRenderTargets[i] == sid)
418	pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
419	}
420	}
421
422	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
423	if (pSvgaR3State->pFuncs3D)
424	pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, true, pSurface);
425
426	if (pSurface->paMipmapLevels)
427	{
428	vmsvga3dSurfaceFreeMipLevels(pSurface);
429	RTMemFree(pSurface->paMipmapLevels);
430	}
431
432	memset(pSurface, 0, sizeof(*pSurface));
433	pSurface->id = SVGA3D_INVALID_ID;
434
435	return VINF_SUCCESS;
436	}
437
438
439	/**
440	* Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
441	*
442	* @returns VBox status code (currently ignored).
443	* @param pThis The shared VGA/VMSVGA state.
444	* @param pThisCC The VGA/VMSVGA state for ring-3.
445	* @param pDstSfcImg
446	* @param pDstBox
447	* @param pSrcSfcImg
448	* @param pSrcBox
449	* @param enmMode
450	*/
451	int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pDstSfcImg, SVGA3dBox const pDstBox,
452	SVGA3dSurfaceImageId const pSrcSfcImg, SVGA3dBox const pSrcBox, SVGA3dStretchBltMode enmMode)
453	{
454	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
455	AssertReturn(pState, VERR_NO_MEMORY);
456
457	int rc;
458
459	uint32_t const sidSrc = pSrcSfcImg->sid;
460	PVMSVGA3DSURFACE pSrcSurface;
461	rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
462	AssertRCReturn(rc, rc);
463
464	uint32_t const sidDst = pDstSfcImg->sid;
465	PVMSVGA3DSURFACE pDstSurface;
466	rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
467	AssertRCReturn(rc, rc);
468
469	AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
470	AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->cLevels, VERR_INVALID_PARAMETER);
471	AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
472	AssertReturn(pDstSfcImg->mipmap < pDstSurface->cLevels, VERR_INVALID_PARAMETER);
473
474	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
475	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
476
477	PVMSVGA3DCONTEXT pContext;
478	#ifdef VMSVGA3D_OPENGL
479	LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
480	sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
481	sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
482	pContext = &pState->SharedCtx;
483	VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
484	#else
485	LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
486	sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
487	sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
488
489	uint32_t cid = pDstSurface->idAssociatedContext;
490	if (cid == SVGA3D_INVALID_ID)
491	cid = pSrcSurface->idAssociatedContext;
492
493	/* At least one of surfaces must be in hardware. */
494	AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
495
496	rc = vmsvga3dContextFromCid(pState, cid, &pContext);
497	AssertRCReturn(rc, rc);
498	#endif
499
500	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
501	{
502	/* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
503	LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->f.s.surface1Flags, pSrcSurface->format));
504	rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pSrcSurface);
505	AssertRCReturn(rc, rc);
506	}
507
508	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
509	{
510	/* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
511	LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->f.s.surface1Flags, pDstSurface->format));
512	rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pDstSurface);
513	AssertRCReturn(rc, rc);
514	}
515
516	PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
517	rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
518	AssertRCReturn(rc, rc);
519
520	PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
521	rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
522	AssertRCReturn(rc, rc);
523
524	SVGA3dBox clipSrcBox = *pSrcBox;
525	SVGA3dBox clipDstBox = *pDstBox;
526	vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
527	vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
528
529	return pSvgaR3State->pFuncs3D->pfnSurfaceStretchBlt(pThis, pState,
530	pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
531	pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
532	enmMode, pContext);
533	}
534
535	/**
536	* Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
537	*
538	* @returns VBox status code (currently ignored).
539	* @param pThis The shared VGA/VMSVGA instance data.
540	* @param pThisCC The VGA/VMSVGA state for ring-3.
541	* @param guest .
542	* @param host .
543	* @param transfer .
544	* @param cCopyBoxes .
545	* @param paBoxes .
546	*/
547	int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestImage guest, SVGA3dSurfaceImageId host,
548	SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
549	{
550	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
551	AssertReturn(pState, VERR_NO_MEMORY);
552
553	PVMSVGA3DSURFACE pSurface;
554	int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
555	AssertRCReturn(rc, rc);
556
557	LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
558	(pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
559	guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
560	host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
561
562	PVMSVGA3DMIPMAPLEVEL pMipLevel;
563	rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
564	AssertRCReturn(rc, rc);
565
566	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
567	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
568
569	PVMSVGA3DCONTEXT pContext = NULL;
570	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
571	{
572	/*
573	* Not realized in host hardware/library yet, we have to work with
574	* the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
575	*/
576	if (!pMipLevel->pSurfaceData)
577	{
578	rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
579	AssertRCReturn(rc, rc);
580	}
581	}
582	else if (vmsvga3dIsLegacyBackend(pThisCC))
583	{
584	#ifdef VMSVGA3D_DIRECT3D
585	/* Flush the drawing pipeline for this surface as it could be used in a shared context. */
586	vmsvga3dSurfaceFlush(pSurface);
587	#else /* VMSVGA3D_OPENGL */
588	pContext = &pState->SharedCtx;
589	VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
590	#endif
591	}
592
593	/* SVGA_3D_CMD_SURFACE_DMA:
594	* "define the 'source' in each copyBox as the guest image and the
595	* 'destination' as the host image, regardless of transfer direction."
596	*/
597	for (uint32_t i = 0; i < cCopyBoxes; ++i)
598	{
599	Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
600	VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
601	i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
602
603	/* Apparently we're supposed to clip it (gmr test sample) */
604
605	/* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
606	SVGA3dBox hostBox;
607	hostBox.x = paBoxes[i].x;
608	hostBox.y = paBoxes[i].y;
609	hostBox.z = paBoxes[i].z;
610	hostBox.w = paBoxes[i].w;
611	hostBox.h = paBoxes[i].h;
612	hostBox.d = paBoxes[i].d;
613	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
614
615	if ( !hostBox.w
616	\|\| !hostBox.h
617	\|\| !hostBox.d)
618	{
619	Log(("Skip empty box\n"));
620	continue;
621	}
622	RT_UNTRUSTED_VALIDATED_FENCE();
623
624	/* Adjust the guest, i.e. "src", point.
625	* Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
626	*/
627	uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
628	uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
629	uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
630
631	/* Calculate offsets of the image blocks for the transfer. */
632	uint32_t u32HostBlockX;
633	uint32_t u32HostBlockY;
634	uint32_t u32GuestBlockX;
635	uint32_t u32GuestBlockY;
636	uint32_t cBlocksX;
637	uint32_t cBlocksY;
638	if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
639	{
640	u32HostBlockX = hostBox.x;
641	u32HostBlockY = hostBox.y;
642
643	u32GuestBlockX = srcx;
644	u32GuestBlockY = srcy;
645
646	cBlocksX = hostBox.w;
647	cBlocksY = hostBox.h;
648	}
649	else
650	{
651	/* Pixels to blocks. */
652	u32HostBlockX = hostBox.x / pSurface->cxBlock;
653	u32HostBlockY = hostBox.y / pSurface->cyBlock;
654	Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
655	Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
656
657	u32GuestBlockX = srcx / pSurface->cxBlock;
658	u32GuestBlockY = srcy / pSurface->cyBlock;
659	Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
660	Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
661
662	cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
663	cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
664	}
665
666	uint32_t cbGuestPitch = guest.pitch;
667	if (cbGuestPitch == 0)
668	{
669	/* Host must "assume image is tightly packed". Our surfaces are. */
670	cbGuestPitch = pMipLevel->cbSurfacePitch;
671	}
672	else
673	{
674	/* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
675	AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
676	RT_UNTRUSTED_VALIDATED_FENCE();
677	}
678
679	/* srcx, srcy and srcz values are used to calculate the guest offset.
680	* The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
681	*/
682	AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
683	AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
684	AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
685	RT_UNTRUSTED_VALIDATED_FENCE();
686
687	if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
688	\|\| VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
689	{
690	uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
691	u32GuestBlockY * cbGuestPitch +
692	srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
693	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
694
695	/* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
696	uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
697	u32HostBlockY * pMipLevel->cbSurfacePitch +
698	hostBox.z * pMipLevel->cbSurfacePlane;
699	AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
700
701	for (uint32_t z = 0; z < hostBox.d; ++z)
702	{
703	rc = vmsvgaR3GmrTransfer(pThis,
704	pThisCC,
705	transfer,
706	(uint8_t *)pMipLevel->pSurfaceData,
707	pMipLevel->cbSurface,
708	uHostOffset,
709	(int32_t)pMipLevel->cbSurfacePitch,
710	guest.ptr,
711	(uint32_t)uGuestOffset,
712	cbGuestPitch,
713	cBlocksX * pSurface->cbBlock,
714	cBlocksY);
715	AssertRC(rc);
716
717	Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
718	z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
719
720	uHostOffset += pMipLevel->cbSurfacePlane;
721	uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
722	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
723	}
724	}
725
726	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
727	{
728	SVGA3dCopyBox clipBox;
729	clipBox.x = hostBox.x;
730	clipBox.y = hostBox.y;
731	clipBox.z = hostBox.z;
732	clipBox.w = hostBox.w;
733	clipBox.h = hostBox.h;
734	clipBox.d = hostBox.d;
735	clipBox.srcx = srcx;
736	clipBox.srcy = srcy;
737	clipBox.srcz = srcz;
738	rc = pSvgaR3State->pFuncs3D->pfnSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
739	guest.ptr, cbGuestPitch, transfer,
740	&clipBox, pContext, rc, i);
741	AssertRC(rc);
742	}
743	}
744
745	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
746	{
747	pMipLevel->fDirty = true;
748	pSurface->fDirty = true;
749	}
750
751	return rc;
752	}
753
754	static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr const *pGuestResult,
755	SVGA3dQueryState enmState, uint32_t u32Result)
756	{
757	SVGA3dQueryResult queryResult;
758	queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
759	queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
760	queryResult.result32 = u32Result;
761
762	int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
763	(uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
764	*pGuestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
765	AssertRC(rc);
766	return rc;
767	}
768
769	/* Used with saved state. */
770	int vmsvga3dQueryCreate(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
771	{
772	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
773	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
774
775	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
776	AssertReturn(pState, VERR_NO_MEMORY);
777
778	LogFunc(("cid=%u type=%d\n", cid, type));
779
780	PVMSVGA3DCONTEXT pContext;
781	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
782	AssertRCReturn(rc, rc);
783
784	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
785	{
786	VMSVGA3DQUERY *p = &pContext->occlusion;
787	if (!VMSVGA3DQUERY_EXISTS(p))
788	{
789	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
790	AssertRCReturn(rc, rc);
791	}
792
793	return VINF_SUCCESS;
794	}
795
796	/* Nothing else for VGPU9. */
797	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
798	}
799
800	int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
801	{
802	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
803	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
804
805	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
806	AssertReturn(pState, VERR_NO_MEMORY);
807
808	LogFunc(("cid=%u type=%d\n", cid, type));
809
810	PVMSVGA3DCONTEXT pContext;
811	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
812	AssertRCReturn(rc, rc);
813
814	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
815	{
816	VMSVGA3DQUERY *p = &pContext->occlusion;
817	if (!VMSVGA3DQUERY_EXISTS(p))
818	{
819	/* Lazy creation of the query object. */
820	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
821	AssertRCReturn(rc, rc);
822	}
823
824	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryBegin(pThisCC, pContext);
825	AssertRCReturn(rc, rc);
826
827	p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
828	p->u32QueryResult = 0;
829
830	return VINF_SUCCESS;
831	}
832
833	/* Nothing else for VGPU9. */
834	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
835	}
836
837	int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
838	{
839	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
840	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
841
842	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
843	AssertReturn(pState, VERR_NO_MEMORY);
844
845	LogFunc(("cid=%u type=%d\n", cid, type));
846
847	PVMSVGA3DCONTEXT pContext;
848	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
849	AssertRCReturn(rc, rc);
850
851	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
852	{
853	VMSVGA3DQUERY *p = &pContext->occlusion;
854	Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
855	AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
856
857	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryEnd(pThisCC, pContext);
858	AssertRCReturn(rc, rc);
859
860	p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
861	return VINF_SUCCESS;
862	}
863
864	/* Nothing else for VGPU9. */
865	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
866	}
867
868	int vmsvga3dQueryWait(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, PVGASTATE pThis, SVGAGuestPtr const *pGuestResult)
869	{
870	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
871	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
872
873	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
874	AssertReturn(pState, VERR_NO_MEMORY);
875
876	LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, pGuestResult->gmrId, pGuestResult->offset));
877
878	PVMSVGA3DCONTEXT pContext;
879	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
880	AssertRCReturn(rc, rc);
881
882	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
883	{
884	VMSVGA3DQUERY *p = &pContext->occlusion;
885	if (VMSVGA3DQUERY_EXISTS(p))
886	{
887	if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
888	{
889	/* Only if not already in SIGNALED state,
890	* i.e. not a second read from the guest or after restoring saved state.
891	*/
892	uint32_t u32Pixels = 0;
893	rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryGetData(pThisCC, pContext, &u32Pixels);
894	if (RT_SUCCESS(rc))
895	{
896	p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
897	p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
898	}
899	}
900
901	if (RT_SUCCESS(rc))
902	{
903	/* pGuestResult can be NULL when saving the state. */
904	if (pGuestResult)
905	{
906	/* Return data to the guest. */
907	vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
908	}
909	return VINF_SUCCESS;
910	}
911	}
912	else
913	{
914	AssertMsgFailed(("GetData Query is NULL\n"));
915	}
916
917	rc = VERR_INTERNAL_ERROR;
918	}
919	else
920	{
921	rc = VERR_NOT_IMPLEMENTED;
922	}
923
924	if (pGuestResult)
925	vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_FAILED, 0);
926	AssertFailedReturn(rc);
927	}
928
929	int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
930	SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
931	{
932	/* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
933	LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
934	idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
935	srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
936	for (uint32_t i = 0; i < cRects; i++)
937	{
938	LogFunc(("clipping rect[%d] (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
939	}
940
941	VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
942	AssertReturn(pScreen, VERR_INTERNAL_ERROR);
943
944	/* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
945	SVGA3dSurfaceImageId src;
946	src.sid = srcImage.sid;
947	src.mipmap = 0;
948	src.face = 0;
949
950	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
951	if (pScreen->pHwScreen)
952	{
953	/* Use the backend accelerated method, if available. */
954	if (pSvgaR3State->pFuncs3D)
955	{
956	int rc = pSvgaR3State->pFuncs3D->pfnSurfaceBlitToScreen(pThisCC, pScreen, destRect, src, srcRect, cRects, pRect);
957	if (rc == VINF_SUCCESS)
958	{
959	return VINF_SUCCESS;
960	}
961	}
962	}
963
964	if (pSvgaR3State->pFuncsMap)
965	return vmsvga3dScreenUpdate(pThisCC, idDstScreen, destRect, src, srcRect, cRects, pRect);
966
967	/** @todo scaling */
968	AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
969
970	SVGA3dCopyBox box;
971	SVGAGuestImage dest;
972
973	box.srcz = 0;
974	box.z = 0;
975	box.d = 1;
976
977	dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
978	dest.ptr.offset = pScreen->offVRAM;
979	dest.pitch = pScreen->cbPitch;
980
981	if (cRects == 0)
982	{
983	/* easy case; no clipping */
984
985	/* SVGA_3D_CMD_SURFACE_DMA:
986	* 'define the "source" in each copyBox as the guest image and the
987	* "destination" as the host image, regardless of transfer direction.'
988	*
989	* Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
990	* it must set the copyBox "source" to the guest destination coords and
991	* the copyBox "destination" to the host surface source coords.
992	*/
993	/* Host image. */
994	box.x = srcRect.left;
995	box.y = srcRect.top;
996	box.w = srcRect.right - srcRect.left;
997	box.h = srcRect.bottom - srcRect.top;
998	/* Guest image. */
999	box.srcx = destRect.left;
1000	box.srcy = destRect.top;
1001
1002	int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1003	AssertRCReturn(rc, rc);
1004
1005	/* Update the guest image, which is at box.src. */
1006	vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1007	}
1008	else
1009	{
1010	/** @todo merge into one SurfaceDMA call */
1011	for (uint32_t i = 0; i < cRects; i++)
1012	{
1013	/* "The clip rectangle coordinates are measured
1014	* relative to the top-left corner of destRect."
1015	* Therefore they are relative to the top-left corner of srcRect as well.
1016	*/
1017
1018	/* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
1019	box.x = srcRect.left + pRect[i].left;
1020	box.y = srcRect.top + pRect[i].top;
1021	box.w = pRect[i].right - pRect[i].left;
1022	box.h = pRect[i].bottom - pRect[i].top;
1023	/* Guest image. The target screen memory is currently in the guest VRAM. */
1024	box.srcx = destRect.left + pRect[i].left;
1025	box.srcy = destRect.top + pRect[i].top;
1026
1027	int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1028	AssertRCReturn(rc, rc);
1029
1030	/* Update the guest image, which is at box.src. */
1031	vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1032	}
1033	}
1034
1035	return VINF_SUCCESS;
1036	}
1037
1038	int vmsvga3dScreenUpdate(PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect const &dstRect,
1039	SVGA3dSurfaceImageId const &srcImage, SVGASignedRect const &srcRect,
1040	uint32_t cDstClipRects, SVGASignedRect *paDstClipRect)
1041	{
1042	//DEBUG_BREAKPOINT_TEST();
1043	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1044
1045	#ifdef LOG_ENABLED
1046	LogFunc(("[%u] %d,%d %d,%d (%dx%d) -> %d,%d %d,%d (%dx%d), %u clip rects\n",
1047	idDstScreen, srcRect.left, srcRect.top, srcRect.right, srcRect.bottom,
1048	srcRect.right - srcRect.left, srcRect.bottom - srcRect.top,
1049	dstRect.left, dstRect.top, dstRect.right, dstRect.bottom,
1050	dstRect.right - dstRect.left, dstRect.bottom - dstRect.top, cDstClipRects));
1051	for (uint32_t i = 0; i < cDstClipRects; i++)
1052	{
1053	LogFunc((" [%u] %d,%d %d,%d (%dx%d)\n",
1054	i, paDstClipRect[i].left, paDstClipRect[i].top, paDstClipRect[i].right, paDstClipRect[i].bottom,
1055	paDstClipRect[i].right - paDstClipRect[i].left, paDstClipRect[i].bottom - paDstClipRect[i].top));
1056	}
1057	#endif
1058
1059	PVMSVGA3DSURFACE pSurface;
1060	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcImage.sid, &pSurface);
1061	AssertRCReturn(rc, rc);
1062
1063	/* Update the screen from a surface. */
1064	ASSERT_GUEST_RETURN(idDstScreen < RT_ELEMENTS(pSvgaR3State->aScreens), VERR_INVALID_PARAMETER);
1065	RT_UNTRUSTED_VALIDATED_FENCE();
1066
1067	VMSVGASCREENOBJECT *pScreen = &pSvgaR3State->aScreens[idDstScreen];
1068
1069	uint32_t const cbScreenPixel = (pScreen->cBpp + 7) / 8;
1070	ASSERT_GUEST_RETURN(cbScreenPixel == pSurface->cbBlock,
1071	VERR_INVALID_PARAMETER); /* Format conversion is not supported. */
1072
1073	if ( srcRect.right <= srcRect.left
1074	\|\| srcRect.bottom <= srcRect.top)
1075	return VINF_SUCCESS; /* Empty src rect. */
1076
1077	if ( dstRect.right <= dstRect.left
1078	\|\| dstRect.bottom <= dstRect.top)
1079	return VINF_SUCCESS; /* Empty dst rect. */
1080	RT_UNTRUSTED_VALIDATED_FENCE();
1081
1082	ASSERT_GUEST_RETURN( srcRect.right - srcRect.left == dstRect.right - dstRect.left
1083	&& srcRect.bottom - srcRect.top == dstRect.bottom - dstRect.top,
1084	VERR_INVALID_PARAMETER); /* Stretch is not supported. */
1085
1086	/* Destination box should be within the screen rectangle. */
1087	SVGA3dBox dstBox;
1088	dstBox.x = dstRect.left;
1089	dstBox.y = dstRect.top;
1090	dstBox.z = 0;
1091	dstBox.w = dstRect.right - dstRect.left;
1092	dstBox.h = dstRect.bottom - dstRect.top;
1093	dstBox.d = 1;
1094
1095	SVGA3dSize dstClippingSize;
1096	dstClippingSize.width = pScreen->cWidth;
1097	dstClippingSize.height = pScreen->cHeight;
1098	dstClippingSize.depth = 1;
1099
1100	vmsvgaR3ClipBox(&dstClippingSize, &dstBox);
1101	ASSERT_GUEST_RETURN(dstBox.w > 0 && dstBox.h > 0, VERR_INVALID_PARAMETER);
1102	RT_UNTRUSTED_VALIDATED_FENCE();
1103
1104	/* All dst clip rects will be clipped by the dst box because
1105	* "The clip rectangle coordinates are measured relative to the top-left corner of destRect."
1106	*/
1107	dstClippingSize.width = dstBox.w;
1108	dstClippingSize.height = dstBox.h;
1109	dstClippingSize.depth = 1;
1110
1111	SVGA3dBox srcBox; /* SurfaceMap will clip the box as necessary (srcMap.box). */
1112	srcBox.x = srcRect.left;
1113	srcBox.y = srcRect.top;
1114	srcBox.z = 0;
1115	srcBox.w = srcRect.right - srcRect.left;
1116	srcBox.h = srcRect.bottom - srcRect.top;
1117	srcBox.d = 1;
1118
1119	VMSVGA3D_MAPPED_SURFACE srcMap;
1120	rc = vmsvga3dSurfaceMap(pThisCC, &srcImage, &srcBox, VMSVGA3D_SURFACE_MAP_READ, &srcMap);
1121	if (RT_SUCCESS(rc))
1122	{
1123	/* Clipping rectangle. */
1124	SVGASignedRect srcBoundRect;
1125	srcBoundRect.left = srcMap.box.x;
1126	srcBoundRect.top = srcMap.box.y;
1127	srcBoundRect.right = srcMap.box.x + srcMap.box.w;
1128	srcBoundRect.bottom = srcMap.box.y + srcMap.box.h;
1129
1130	/* Clipping rectangle relative to the original srcRect. */
1131	srcBoundRect.left -= srcRect.left;
1132	srcBoundRect.top -= srcRect.top;
1133	srcBoundRect.right -= srcRect.left;
1134	srcBoundRect.bottom -= srcRect.top;
1135
1136	uint8_t const pu8Src = (uint8_t )srcMap.pvData;
1137
1138	uint32_t const cbDst = pScreen->cHeight * pScreen->cbPitch;
1139	uint8_t *pu8Dst;
1140	if (pScreen->pvScreenBitmap)
1141	pu8Dst = (uint8_t *)pScreen->pvScreenBitmap;
1142	else
1143	pu8Dst = (uint8_t *)pThisCC->pbVRam + pScreen->offVRAM;
1144
1145	SVGASignedRect dstClipRect;
1146	if (cDstClipRects == 0)
1147	{
1148	/* Entire source rect "relative to the top-left corner of destRect." */
1149	dstClipRect.left = 0;
1150	dstClipRect.top = 0;
1151	dstClipRect.right = dstBox.w;
1152	dstClipRect.bottom = dstBox.h;
1153
1154	cDstClipRects = 1;
1155	paDstClipRect = &dstClipRect;
1156	}
1157
1158	for (uint32_t i = 0; i < cDstClipRects; i++)
1159	{
1160	/* Clip rects are relative to corners of src and dst rectangles. */
1161	SVGASignedRect clipRect = paDstClipRect[i];
1162
1163	/* Clip the rectangle by mapped source box. */
1164	vmsvgaR3ClipRect(&srcBoundRect, &clipRect);
1165
1166	SVGA3dBox clipBox;
1167	clipBox.x = clipRect.left;
1168	clipBox.y = clipRect.top;
1169	clipBox.z = 0;
1170	clipBox.w = clipRect.right - clipRect.left;
1171	clipBox.h = clipRect.bottom - clipRect.top;
1172	clipBox.d = 1;
1173
1174	vmsvgaR3ClipBox(&dstClippingSize, &clipBox);
1175	ASSERT_GUEST_CONTINUE(clipBox.w > 0 && clipBox.h > 0);
1176
1177	/* 'pu8Src' points to the mapped 'srcRect'. Take the clipping box into account. */
1178	uint8_t const *pu8SrcBox = pu8Src
1179	+ ((clipBox.x + pSurface->cxBlock - 1) / pSurface->cxBlock) * pSurface->cxBlock * pSurface->cbBlock
1180	+ ((clipBox.y + pSurface->cyBlock - 1) / pSurface->cyBlock) * pSurface->cyBlock * srcMap.cbRowPitch;
1181
1182	/* Calculate the offset of destination box in the screen buffer. */
1183	uint32_t const offDstBox = (dstBox.x + clipBox.x) * cbScreenPixel + (dstBox.y + clipBox.y) * pScreen->cbPitch;
1184
1185	ASSERT_GUEST_BREAK( offDstBox <= cbDst
1186	&& pScreen->cbPitch * (clipBox.h - 1) + cbScreenPixel * clipBox.w <= cbDst - offDstBox);
1187	RT_UNTRUSTED_VALIDATED_FENCE();
1188
1189	uint8_t *pu8DstBox = pu8Dst + offDstBox;
1190
1191	if ( pSurface->format == SVGA3D_R8G8B8A8_UNORM
1192	\|\| pSurface->format == SVGA3D_R8G8B8A8_UNORM_SRGB)
1193	{
1194	for (uint32_t iRow = 0; iRow < clipBox.h; ++iRow)
1195	{
1196	for (uint32_t x = 0; x < clipBox.w * 4; x += 4) /* 'x' is a byte index. */
1197	{
1198	pu8DstBox[x ] = pu8SrcBox[x + 2];
1199	pu8DstBox[x + 1] = pu8SrcBox[x + 1];
1200	pu8DstBox[x + 2] = pu8SrcBox[x ];
1201	pu8DstBox[x + 3] = pu8SrcBox[x + 3];
1202	}
1203
1204	pu8SrcBox += srcMap.cbRowPitch;
1205	pu8DstBox += pScreen->cbPitch;
1206	}
1207	}
1208	else
1209	{
1210	for (uint32_t iRow = 0; iRow < clipBox.h; ++iRow)
1211	{
1212	memcpy(pu8DstBox, pu8SrcBox, cbScreenPixel * clipBox.w);
1213
1214	pu8SrcBox += srcMap.cbRowPitch;
1215	pu8DstBox += pScreen->cbPitch;
1216	}
1217	}
1218	}
1219
1220	vmsvga3dSurfaceUnmap(pThisCC, &srcImage, &srcMap, /* fWritten = */ false);
1221
1222	vmsvgaR3UpdateScreen(pThisCC, pScreen, dstBox.x, dstBox.y, dstBox.w, dstBox.h);
1223	}
1224
1225	return rc;
1226	}
1227
1228	int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
1229	{
1230	/* Deprecated according to svga3d_reg.h. */
1231	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1232	AssertReturn(pState, VERR_NO_MEMORY);
1233
1234	PVMSVGA3DSURFACE pSurface;
1235	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1236	AssertRCReturn(rc, rc);
1237
1238	/** @todo Detect screen from coords? Or split rect to screens? */
1239	VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
1240	AssertReturn(pScreen, VERR_INTERNAL_ERROR);
1241
1242	/* If there are no recangles specified, just grab a screenful. */
1243	SVGA3dCopyRect DummyRect;
1244	if (cRects != 0)
1245	{ /* likely */ }
1246	else
1247	{
1248	/** @todo Find the usecase for this or check what the original device does.
1249	* The original code was doing some scaling based on the surface
1250	* size... */
1251	AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
1252	DummyRect.x = DummyRect.srcx = 0;
1253	DummyRect.y = DummyRect.srcy = 0;
1254	DummyRect.w = pScreen->cWidth;
1255	DummyRect.h = pScreen->cHeight;
1256	cRects = 1;
1257	pRect = &DummyRect;
1258	}
1259
1260	uint32_t i;
1261	for (i = 0; i < cRects; ++i)
1262	{
1263	uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
1264	SVGASignedRect destRect;
1265	destRect.left = pRect[i].x;
1266	destRect.top = pRect[i].y;
1267	destRect.right = pRect[i].x + pRect[i].w;
1268	destRect.bottom = pRect[i].y + pRect[i].h;
1269
1270	SVGA3dSurfaceImageId src;
1271	src.sid = sid;
1272	src.face = 0;
1273	src.mipmap = 0;
1274
1275	SVGASignedRect srcRect;
1276	srcRect.left = pRect[i].srcx;
1277	srcRect.top = pRect[i].srcy;
1278	srcRect.right = pRect[i].srcx + pRect[i].w;
1279	srcRect.bottom = pRect[i].srcy + pRect[i].h;
1280
1281	/* Entire rect. */
1282	rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
1283	AssertRCReturn(rc, rc);
1284	}
1285
1286	return VINF_SUCCESS;
1287	}
1288
1289	int vmsvga3dDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1290	{
1291	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1292	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1293
1294	if (pScreen->pHwScreen)
1295	{
1296	pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1297	}
1298
1299	int rc = pSvgaR3State->pFuncs3D->pfnDefineScreen(pThis, pThisCC, pScreen);
1300	if (RT_SUCCESS(rc))
1301	{
1302	LogRelMax(1, ("VMSVGA: using accelerated graphics output\n"));
1303	}
1304	return rc;
1305	}
1306
1307	int vmsvga3dDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1308	{
1309	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1310	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1311
1312	return pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1313	}
1314
1315	int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap)
1316	{
1317	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1318	AssertReturn(pState, VERR_INVALID_STATE);
1319
1320	PVMSVGA3DSURFACE pSurface;
1321	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1322	AssertRCReturn(rc, rc);
1323
1324	if (face == SVGA_ID_INVALID && mipmap == SVGA_ID_INVALID)
1325	{
1326	/* This is a notification that "All images can be lost", i.e. the backend surface is not needed anymore. */
1327	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1328	if (pSvgaR3State->pFuncs3D)
1329	pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, false, pSurface);
1330
1331	for (uint32_t i = 0; i < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; ++i)
1332	{
1333	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1334	pMipmapLevel->fDirty = true;
1335	}
1336	}
1337	else
1338	{
1339	PVMSVGA3DMIPMAPLEVEL pMipmapLevel;
1340	rc = vmsvga3dMipmapLevel(pSurface, face, mipmap, &pMipmapLevel);
1341	AssertRCReturn(rc, rc);
1342
1343	/* Invalidate views, etc. */
1344	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1345	if (pSvgaR3State->pFuncs3D)
1346	pSvgaR3State->pFuncs3D->pfnSurfaceInvalidateImage(pThisCC, pSurface, face, mipmap);
1347
1348	pMipmapLevel->fDirty = true;
1349	}
1350	pSurface->fDirty = true;
1351
1352	return rc;
1353	}
1354
1355
1356	/*
1357	*
1358	* 3D
1359	*
1360	*/
1361
1362	int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
1363	{
1364	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1365	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1366	return pSvgaR3State->pFuncs3D->pfnQueryCaps(pThisCC, idx3dCaps, pu32Val);
1367	}
1368
1369	int vmsvga3dChangeMode(PVGASTATECC pThisCC)
1370	{
1371	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1372	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1373	return pSvgaR3State->pFuncs3D->pfnChangeMode(pThisCC);
1374	}
1375
1376	int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src, uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
1377	{
1378	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1379	AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1380	return pSvgaR3State->pFuncs3D->pfnSurfaceCopy(pThisCC, dest, src, cCopyBoxes, pBox);
1381	}
1382
1383	void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
1384	{
1385	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1386	AssertReturnVoid(pSvgaR3State->pFuncs3D);
1387	pSvgaR3State->pFuncs3D->pfnUpdateHostScreenViewport(pThisCC, idScreen, pOldViewport);
1388	}
1389
1390	/**
1391	* Updates the heap buffers for all surfaces or one specific one.
1392	*
1393	* @param pThisCC The VGA/VMSVGA state for ring-3.
1394	* @param sid The surface ID, UINT32_MAX if all.
1395	* @thread VMSVGAFIFO
1396	*/
1397	void vmsvga3dUpdateHeapBuffersForSurfaces(PVGASTATECC pThisCC, uint32_t sid)
1398	{
1399	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1400	AssertReturnVoid(pSvgaR3State->pFuncs3D);
1401
1402	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1403	AssertReturnVoid(pState);
1404
1405	if (sid == UINT32_MAX)
1406	{
1407	uint32_t cSurfaces = pState->cSurfaces;
1408	for (sid = 0; sid < cSurfaces; sid++)
1409	{
1410	PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1411	if (pSurface && pSurface->id == sid)
1412	pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1413	}
1414	}
1415	else if (sid < pState->cSurfaces)
1416	{
1417	PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1418	if (pSurface && pSurface->id == sid)
1419	pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1420	}
1421	}
1422
1423
1424	/*
1425	*
1426	* VGPU9
1427	*
1428	*/
1429
1430	int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
1431	{
1432	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1433	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1434	return pSvgaR3State->pFuncsVGPU9->pfnContextDefine(pThisCC, cid);
1435	}
1436
1437	int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
1438	{
1439	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1440	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1441	return pSvgaR3State->pFuncsVGPU9->pfnContextDestroy(pThisCC, cid);
1442	}
1443
1444	int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
1445	{
1446	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1447	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1448	return pSvgaR3State->pFuncsVGPU9->pfnSetTransform(pThisCC, cid, type, matrix);
1449	}
1450
1451	int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
1452	{
1453	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1454	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1455	return pSvgaR3State->pFuncsVGPU9->pfnSetZRange(pThisCC, cid, zRange);
1456	}
1457
1458	int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
1459	{
1460	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1461	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1462	return pSvgaR3State->pFuncsVGPU9->pfnSetRenderState(pThisCC, cid, cRenderStates, pRenderState);
1463	}
1464
1465	int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
1466	{
1467	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1468	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1469	return pSvgaR3State->pFuncsVGPU9->pfnSetRenderTarget(pThisCC, cid, type, target);
1470	}
1471
1472	int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
1473	{
1474	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1475	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1476	return pSvgaR3State->pFuncsVGPU9->pfnSetTextureState(pThisCC, cid, cTextureStates, pTextureState);
1477	}
1478
1479	int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
1480	{
1481	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1482	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1483	return pSvgaR3State->pFuncsVGPU9->pfnSetMaterial(pThisCC, cid, face, pMaterial);
1484	}
1485
1486	int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
1487	{
1488	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1489	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1490	return pSvgaR3State->pFuncsVGPU9->pfnSetLightData(pThisCC, cid, index, pData);
1491	}
1492
1493	int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
1494	{
1495	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1496	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1497	return pSvgaR3State->pFuncsVGPU9->pfnSetLightEnabled(pThisCC, cid, index, enabled);
1498	}
1499
1500	int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1501	{
1502	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1503	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1504	return pSvgaR3State->pFuncsVGPU9->pfnSetViewPort(pThisCC, cid, pRect);
1505	}
1506
1507	int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
1508	{
1509	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1510	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1511	return pSvgaR3State->pFuncsVGPU9->pfnSetClipPlane(pThisCC, cid, index, plane);
1512	}
1513
1514	int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth, uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
1515	{
1516	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1517	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1518	return pSvgaR3State->pFuncsVGPU9->pfnCommandClear(pThisCC, cid, clearFlag, color, depth, stencil, cRects, pRect);
1519	}
1520
1521	int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl pVertexDecl, uint32_t numRanges, SVGA3dPrimitiveRange pNumRange, uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
1522	{
1523	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1524	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1525	return pSvgaR3State->pFuncsVGPU9->pfnDrawPrimitives(pThisCC, cid, numVertexDecls, pVertexDecl, numRanges, pNumRange, cVertexDivisor, pVertexDivisor);
1526	}
1527
1528	int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1529	{
1530	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1531	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1532	return pSvgaR3State->pFuncsVGPU9->pfnSetScissorRect(pThisCC, cid, pRect);
1533	}
1534
1535	int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
1536	{
1537	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1538	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1539	return pSvgaR3State->pFuncsVGPU9->pfnGenerateMipmaps(pThisCC, sid, filter);
1540	}
1541
1542	int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type, uint32_t cbData, uint32_t *pShaderData)
1543	{
1544	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1545	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1546	return pSvgaR3State->pFuncsVGPU9->pfnShaderDefine(pThisCC, cid, shid, type, cbData, pShaderData);
1547	}
1548
1549	int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
1550	{
1551	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1552	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1553	return pSvgaR3State->pFuncsVGPU9->pfnShaderDestroy(pThisCC, cid, shid, type);
1554	}
1555
1556	int vmsvga3dShaderSet(PVGASTATECC pThisCC, struct VMSVGA3DCONTEXT *pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
1557	{
1558	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1559	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1560	return pSvgaR3State->pFuncsVGPU9->pfnShaderSet(pThisCC, pContext, cid, type, shid);
1561	}
1562
1563	int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type, SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
1564	{
1565	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1566	AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1567	return pSvgaR3State->pFuncsVGPU9->pfnShaderSetConst(pThisCC, cid, reg, type, ctype, cRegisters, pValues);
1568	}
1569
1570
1571	/*
1572	*
1573	* Map
1574	*
1575	*/
1576
1577	void vmsvga3dSurfaceMapInit(VMSVGA3D_MAPPED_SURFACE pMap, VMSVGA3D_SURFACE_MAP enmMapType, SVGA3dBox const pBox,
1578	PVMSVGA3DSURFACE pSurface, void *pvData, uint32_t cbRowPitch, uint32_t cbDepthPitch)
1579	{
1580	uint32_t const cxBlocks = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1581	uint32_t const cyBlocks = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1582
1583	pMap->enmMapType = enmMapType;
1584	pMap->format = pSurface->format;
1585	pMap->box = *pBox;
1586	pMap->cbBlock = pSurface->cbBlock;
1587	pMap->cxBlocks = cxBlocks;
1588	pMap->cyBlocks = cyBlocks;
1589	pMap->cbRow = cxBlocks * pSurface->cbPitchBlock;
1590	pMap->cbRowPitch = cbRowPitch;
1591	pMap->cRows = (cyBlocks * pSurface->cbBlock) / pSurface->cbPitchBlock;
1592	pMap->cbDepthPitch = cbDepthPitch;
1593	pMap->pvData = (uint8_t *)pvData
1594	+ (pBox->x / pSurface->cxBlock) * pSurface->cbPitchBlock
1595	+ (pBox->y / pSurface->cyBlock) * cbRowPitch
1596	+ pBox->z * cbDepthPitch;
1597	}
1598
1599
1600	int vmsvga3dSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
1601	VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
1602	{
1603	PVMSVGA3DSURFACE pSurface;
1604	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1605	AssertRCReturn(rc, rc);
1606
1607	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1608	{
1609	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1610	AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1611	return pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, pImage, pBox, enmMapType, pMap);
1612	}
1613
1614	PVMSVGA3DMIPMAPLEVEL pMipLevel;
1615	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1616	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1617
1618	if (!pMipLevel->pSurfaceData)
1619	{
1620	rc = vmsvga3dSurfaceAllocMipLevels(pSurface);
1621	AssertRCReturn(rc, rc);
1622	}
1623
1624	SVGA3dBox clipBox;
1625	if (pBox)
1626	{
1627	clipBox = *pBox;
1628	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1629	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1630	}
1631	else
1632	{
1633	clipBox.x = 0;
1634	clipBox.y = 0;
1635	clipBox.z = 0;
1636	clipBox.w = pMipLevel->mipmapSize.width;
1637	clipBox.h = pMipLevel->mipmapSize.height;
1638	clipBox.d = pMipLevel->mipmapSize.depth;
1639	}
1640
1641	/// @todo Zero the box?
1642	//if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD)
1643	// RT_BZERO(.);
1644
1645	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
1646	pMipLevel->pSurfaceData, pMipLevel->cbSurfacePitch, pMipLevel->cbSurfacePlane);
1647
1648	LogFunc(("SysMem: sid = %u, pvData %p\n", pImage->sid, pMap->pvData));
1649	return VINF_SUCCESS;
1650	}
1651
1652	int vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, VMSVGA3D_MAPPED_SURFACE pMap, bool fWritten)
1653	{
1654	PVMSVGA3DSURFACE pSurface;
1655	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1656	AssertRCReturn(rc, rc);
1657
1658	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1659	{
1660	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1661	AssertReturn(pSvgaR3State->pFuncsMap, VERR_NOT_IMPLEMENTED);
1662	return pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, pImage, pMap, fWritten);
1663	}
1664
1665	PVMSVGA3DMIPMAPLEVEL pMipLevel;
1666	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1667	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1668
1669	if ( fWritten
1670	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
1671	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
1672	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
1673	{
1674	pMipLevel->fDirty = true;
1675	pSurface->fDirty = true;
1676	}
1677
1678	return VINF_SUCCESS;
1679	}
1680
1681
1682	int vmsvga3dCalcSurfaceMipmapAndFace(PVGASTATECC pThisCC, uint32_t sid, uint32_t iSubresource, uint32_t piMipmap, uint32_t piFace)
1683	{
1684	PVMSVGA3DSURFACE pSurface;
1685	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1686	AssertRCReturn(rc, rc);
1687
1688	vmsvga3dCalcMipmapAndFace(pSurface->cLevels, iSubresource, piMipmap, piFace);
1689	return VINF_SUCCESS;
1690	}
1691
1692
1693	uint32_t vmsvga3dCalcSubresourceOffset(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage)
1694	{
1695	PVMSVGA3DSURFACE pSurface;
1696	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1697	AssertRCReturn(rc, 0);
1698
1699	ASSERT_GUEST_RETURN(pImage->face < pSurface->surfaceDesc.numArrayElements, 0);
1700
1701	uint32_t offMipLevel = 0;
1702	for (uint32_t i = 0; i < pImage->mipmap; ++i)
1703	{
1704	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1705	offMipLevel += pMipmapLevel->cbSurface;
1706	}
1707
1708	uint32_t offSubresource = pSurface->surfaceDesc.cbArrayElement * pImage->face + offMipLevel;
1709	/** @todo Multisample? */
1710	return offSubresource;
1711	}
1712
1713
1714	uint32_t vmsvga3dGetArrayElements(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1715	{
1716	PVMSVGA3DSURFACE pSurface;
1717	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1718	AssertRCReturn(rc, 0);
1719
1720	return pSurface->surfaceDesc.numArrayElements;
1721	}
1722
1723
1724	uint32_t vmsvga3dGetSubresourceCount(PVGASTATECC pThisCC, SVGA3dSurfaceId sid)
1725	{
1726	PVMSVGA3DSURFACE pSurface;
1727	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
1728	AssertRCReturn(rc, 0);
1729
1730	return pSurface->surfaceDesc.numArrayElements * pSurface->cLevels;
1731	}
1732
1733
1734	/*
1735	* Calculates memory layout of a surface box for memcpy:
1736	*/
1737	int vmsvga3dGetBoxDimensions(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
1738	VMSGA3D_BOX_DIMENSIONS *pResult)
1739	{
1740	PVMSVGA3DSURFACE pSurface;
1741	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pImage->sid, &pSurface);
1742	AssertRCReturn(rc, rc);
1743
1744	PVMSVGA3DMIPMAPLEVEL pMipLevel;
1745	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
1746	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1747
1748	/* Clip the box. */
1749	SVGA3dBox clipBox;
1750	if (pBox)
1751	{
1752	clipBox = *pBox;
1753	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
1754	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1755	}
1756	else
1757	{
1758	clipBox.x = 0;
1759	clipBox.y = 0;
1760	clipBox.z = 0;
1761	clipBox.w = pMipLevel->mipmapSize.width;
1762	clipBox.h = pMipLevel->mipmapSize.height;
1763	clipBox.d = pMipLevel->mipmapSize.depth;
1764	}
1765
1766	uint32_t const cBlocksX = (clipBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
1767	uint32_t const cBlocksY = (clipBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
1768
1769	pResult->offSubresource = vmsvga3dCalcSubresourceOffset(pThisCC, pImage);
1770	pResult->offBox = (clipBox.x / pSurface->cxBlock) * pSurface->cbPitchBlock
1771	+ (clipBox.y / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
1772	+ clipBox.z * pMipLevel->cbSurfacePlane;
1773	pResult->cbRow = cBlocksX * pSurface->cbPitchBlock;
1774	pResult->cbPitch = pMipLevel->cbSurfacePitch;
1775	pResult->cyBlocks = cBlocksY;
1776	pResult->cRows = (cBlocksY * pSurface->cbBlock) / pSurface->cbPitchBlock;
1777	pResult->cbDepthPitch = pMipLevel->cbSurfacePlane;
1778
1779	return VINF_SUCCESS;
1780	}
1781
1782
1783	/*
1784	* Whether a legacy 3D backend is used.
1785	* The new DX context can be built together with the legacy D3D9 or OpenGL backend.
1786	* The actual backend is selected at the VM startup.
1787	*/
1788	bool vmsvga3dIsLegacyBackend(PVGASTATECC pThisCC)
1789	{
1790	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1791	return pSvgaR3State->pFuncsDX == NULL;
1792	}
1793
1794
1795	void vmsvga3dReset(PVGASTATECC pThisCC)
1796	{
1797	/* Deal with data from PVMSVGA3DSTATE */
1798	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1799	Assert(pThisCC->svga.p3dState);
1800
1801	if ((pThisCC->svga.p3dState))
1802	{
1803	/* Destroy all leftover surfaces. */
1804	for (uint32_t i = 0; i < p3dState->cSurfaces; i++)
1805	{
1806	if (p3dState->papSurfaces[i]->id != SVGA3D_INVALID_ID)
1807	vmsvga3dSurfaceDestroy(pThisCC, p3dState->papSurfaces[i]->id);
1808	RTMemFree(p3dState->papSurfaces[i]);
1809	p3dState->papSurfaces[i] = NULL;
1810	}
1811	RTMemFree(p3dState->papSurfaces);
1812	p3dState->papSurfaces = NULL;
1813	p3dState->cSurfaces = 0;
1814
1815	/* Destroy all leftover contexts. */
1816	for (uint32_t i = 0; i < p3dState->cContexts; i++)
1817	{
1818	if (p3dState->papContexts[i]->id != SVGA3D_INVALID_ID)
1819	vmsvga3dContextDestroy(pThisCC, p3dState->papContexts[i]->id);
1820	RTMemFree(p3dState->papContexts[i]);
1821	p3dState->papContexts[i] = NULL;
1822	}
1823	RTMemFree(p3dState->papContexts);
1824	p3dState->papContexts = NULL;
1825	p3dState->cContexts = 0;
1826
1827	if (!vmsvga3dIsLegacyBackend(pThisCC))
1828	{
1829	/* Destroy all leftover DX contexts. */
1830	for (uint32_t i = 0; i < p3dState->cDXContexts; i++)
1831	{
1832	if (p3dState->papDXContexts[i]->cid != SVGA3D_INVALID_ID)
1833	vmsvga3dDXDestroyContext(pThisCC, p3dState->papDXContexts[i]->cid);
1834	RTMemFree(p3dState->papDXContexts[i]);
1835	p3dState->papDXContexts[i] = NULL;
1836	}
1837	RTMemFree(p3dState->papDXContexts);
1838	p3dState->papDXContexts = NULL;
1839	p3dState->cDXContexts = 0;
1840	}
1841	}
1842
1843	/* Reset the backend. */
1844	PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State;
1845	if (pSvgaR3State->pFuncs3D && pSvgaR3State->pFuncs3D->pfnReset)
1846	pSvgaR3State->pFuncs3D->pfnReset(pThisCC);
1847	}
1848
1849
1850	void vmsvga3dTerminate(PVGASTATECC pThisCC)
1851	{
1852	/* Clean up backend. */
1853	vmsvga3dReset(pThisCC);
1854
1855	/* Deal with data from PVMSVGA3DSTATE */
1856	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1857	AssertReturnVoid(p3dState);
1858
1859	/* Terminate the backend. */
1860	PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State;
1861	if (pSvgaR3State->pFuncs3D && pSvgaR3State->pFuncs3D->pfnTerminate)
1862	pSvgaR3State->pFuncs3D->pfnTerminate(pThisCC);
1863
1864	RTMemFree(p3dState->pBackend);
1865	p3dState->pBackend = NULL;
1866
1867	RTMemFree(p3dState);
1868	pThisCC->svga.p3dState = NULL;
1869	}
1870
1871
1872	int vmsvga3dInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1873	{
1874	PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State;
1875
1876	/* 3D interface is required. */
1877	AssertReturn(pSvgaR3State->pFuncs3D && pSvgaR3State->pFuncs3D->pfnInit, VERR_NOT_SUPPORTED);
1878
1879	PVMSVGA3DSTATE p3dState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
1880	AssertReturn(p3dState, VERR_NO_MEMORY);
1881	pThisCC->svga.p3dState = p3dState;
1882
1883	int rc = pSvgaR3State->pFuncs3D->pfnInit(pDevIns, pThis, pThisCC);
1884	if (RT_SUCCESS(rc))
1885	return VINF_SUCCESS;
1886
1887	pThisCC->svga.p3dState = NULL;
1888	RTMemFree(p3dState);
1889	return rc;
1890	}

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 102520

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