VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 89153

Last change on this file since 89153 was 89121, checked in by vboxsync, 4 years ago

Devices/Graphics: Function tables for 3D backends. bugref:9830
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 52.8 KB
Line 
1/* $Id: DevVGA-SVGA3d.cpp 89121 2021-05-17 19:30:44Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4 */
5
6/*
7 * Copyright (C) 2013-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/vmm/pdmdev.h>
25#include <iprt/errcore.h>
26#include <VBox/log.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
32#include <VBoxVideo.h> /* required by DevVGA.h */
33
34/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
35#include "DevVGA.h"
36
37#include "DevVGA-SVGA.h"
38#include "DevVGA-SVGA3d.h"
39#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
40#include "DevVGA-SVGA3d-internal.h"
41#include "DevVGA-SVGA-internal.h"
42
43
44
45/**
46 * Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
47 * commands (fifo).
48 *
49 * @returns VBox status code (currently ignored).
50 * @param pThisCC The VGA/VMSVGA state for ring-3.
51 * @param sid The ID of the surface to (re-)define.
52 * @param surfaceFlags .
53 * @param format .
54 * @param multisampleCount .
55 * @param autogenFilter .
56 * @param numMipLevels .
57 * @param pMipLevel0Size .
58 */
59int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, SVGA3dSurface1Flags surfaceFlags, SVGA3dSurfaceFormat format,
60 uint32_t multisampleCount, SVGA3dTextureFilter autogenFilter,
61 uint32_t numMipLevels, SVGA3dSize const *pMipLevel0Size)
62{
63 PVMSVGA3DSURFACE pSurface;
64 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
65 AssertReturn(pState, VERR_INVALID_STATE);
66
67 LogFunc(("sid=%u surfaceFlags=%#x format=%s (%#x) multiSampleCount=%d autogenFilter=%d, numMipLevels=%d size=(%dx%dx%d)\n",
68 sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
69 numMipLevels, pMipLevel0Size->width, pMipLevel0Size->height, pMipLevel0Size->depth));
70
71 ASSERT_GUEST_RETURN(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
72 ASSERT_GUEST_RETURN(numMipLevels >= 1 && numMipLevels < SVGA3D_MAX_MIP_LEVELS, VERR_INVALID_PARAMETER);
73
74 if (sid >= pState->cSurfaces)
75 {
76 /* Grow the array. */
77 uint32_t cNew = RT_ALIGN(sid + 15, 16);
78 void *pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) * cNew);
79 AssertReturn(pvNew, VERR_NO_MEMORY);
80 pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
81 while (pState->cSurfaces < cNew)
82 {
83 pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
84 AssertReturn(pSurface, VERR_NO_MEMORY);
85 pSurface->id = SVGA3D_INVALID_ID;
86 pState->papSurfaces[pState->cSurfaces++] = pSurface;
87 }
88 }
89 pSurface = pState->papSurfaces[sid];
90
91 /* If one already exists with this id, then destroy it now. */
92 if (pSurface->id != SVGA3D_INVALID_ID)
93 vmsvga3dSurfaceDestroy(pThisCC, sid);
94
95 RT_ZERO(*pSurface);
96 pSurface->id = SVGA3D_INVALID_ID; /* Keep this value until the surface init completes */
97#ifdef VMSVGA3D_OPENGL
98 pSurface->idWeakContextAssociation = SVGA3D_INVALID_ID;
99 pSurface->oglId.buffer = OPENGL_INVALID_ID;
100#elif defined(VMSVGA3D_D3D11)
101 pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
102 // pSurface->pBackendSurface = NULL;
103#else /* VMSVGA3D_DIRECT3D */
104 pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
105 pSurface->hSharedObject = NULL;
106 pSurface->pSharedObjectTree = NULL;
107#endif
108
109 /** @todo This 'switch' and the surfaceFlags tweaks should not be necessary.
110 * The actual surface type will be figured out when the surface is actually used later.
111 * The backends code must be reviewed for unnecessary dependencies on the surfaceFlags value.
112 */
113 /* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
114 * In some case we'll have to wait until the surface is used to create the D3D object.
115 */
116 switch (format)
117 {
118 case SVGA3D_Z_D32:
119 case SVGA3D_Z_D16:
120 case SVGA3D_Z_D24S8:
121 case SVGA3D_Z_D15S1:
122 case SVGA3D_Z_D24X8:
123 case SVGA3D_Z_DF16:
124 case SVGA3D_Z_DF24:
125 case SVGA3D_Z_D24S8_INT:
126 Assert(surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL);
127 surfaceFlags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
128 break;
129
130 /* Texture compression formats */
131 case SVGA3D_DXT1:
132 case SVGA3D_DXT2:
133 case SVGA3D_DXT3:
134 case SVGA3D_DXT4:
135 case SVGA3D_DXT5:
136 /* Bump-map formats */
137 case SVGA3D_BUMPU8V8:
138 case SVGA3D_BUMPL6V5U5:
139 case SVGA3D_BUMPX8L8V8U8:
140 case SVGA3D_V8U8:
141 case SVGA3D_Q8W8V8U8:
142 case SVGA3D_CxV8U8:
143 case SVGA3D_X8L8V8U8:
144 case SVGA3D_A2W10V10U10:
145 case SVGA3D_V16U16:
146 /* Typical render target formats; we should allow render target buffers to be used as textures. */
147 case SVGA3D_X8R8G8B8:
148 case SVGA3D_A8R8G8B8:
149 case SVGA3D_R5G6B5:
150 case SVGA3D_X1R5G5B5:
151 case SVGA3D_A1R5G5B5:
152 case SVGA3D_A4R4G4B4:
153 Assert(surfaceFlags & (SVGA3D_SURFACE_HINT_TEXTURE | SVGA3D_SURFACE_SCREENTARGET));
154 surfaceFlags |= SVGA3D_SURFACE_HINT_TEXTURE;
155 break;
156
157 case SVGA3D_LUMINANCE8:
158 case SVGA3D_LUMINANCE4_ALPHA4:
159 case SVGA3D_LUMINANCE16:
160 case SVGA3D_LUMINANCE8_ALPHA8:
161 case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
162 case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
163 case SVGA3D_A2R10G10B10:
164 case SVGA3D_ALPHA8:
165 case SVGA3D_R_S10E5:
166 case SVGA3D_R_S23E8:
167 case SVGA3D_RG_S10E5:
168 case SVGA3D_RG_S23E8:
169 case SVGA3D_G16R16:
170 case SVGA3D_A16B16G16R16:
171 case SVGA3D_UYVY:
172 case SVGA3D_YUY2:
173 case SVGA3D_NV12:
174 case SVGA3D_FORMAT_DEAD2: /* Old SVGA3D_AYUV */
175 case SVGA3D_ATI1:
176 case SVGA3D_ATI2:
177 break;
178
179 /*
180 * Any surface can be used as a buffer object, but SVGA3D_BUFFER is
181 * the most efficient format to use when creating new surfaces
182 * expressly for index or vertex data.
183 */
184 case SVGA3D_BUFFER:
185 break;
186
187 default:
188 break;
189 }
190
191 pSurface->surfaceFlags = surfaceFlags;
192 pSurface->format = format;
193 /* cFaces is 6 for a cubemaps and 1 otherwise. */
194 pSurface->cFaces = (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1);
195 pSurface->cLevels = numMipLevels;
196 pSurface->multiSampleCount = multisampleCount;
197 pSurface->autogenFilter = autogenFilter;
198 Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
199 Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
200 pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(numMipLevels * pSurface->cFaces * sizeof(VMSVGA3DMIPMAPLEVEL));
201 AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
202
203 pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock);
204 AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
205
206 /** @todo cbMemRemaining = value of SVGA_REG_MOB_MAX_SIZE */
207 uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
208 SVGA3dSize mipmapSize = *pMipLevel0Size;
209 int rc = VINF_SUCCESS;
210
211 for (uint32_t i = 0; i < numMipLevels; ++i)
212 {
213 for (uint32_t iFace = 0; iFace < pSurface->cFaces; ++iFace)
214 {
215 uint32_t const iMipmap = iFace * numMipLevels + i;
216 LogFunc(("[%d] face %d mip level %d (%d,%d,%d) cbBlock=%#x block %dx%d\n",
217 iMipmap, iFace, i, mipmapSize.width, mipmapSize.height, mipmapSize.depth,
218 pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
219
220 uint32_t cBlocksX;
221 uint32_t cBlocksY;
222 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
223 {
224 cBlocksX = mipmapSize.width;
225 cBlocksY = mipmapSize.height;
226 }
227 else
228 {
229 cBlocksX = mipmapSize.width / pSurface->cxBlock;
230 if (mipmapSize.width % pSurface->cxBlock)
231 ++cBlocksX;
232 cBlocksY = mipmapSize.height / pSurface->cyBlock;
233 if (mipmapSize.height % pSurface->cyBlock)
234 ++cBlocksY;
235 }
236
237 AssertBreakStmt(cBlocksX > 0 && cBlocksY > 0 && mipmapSize.depth > 0, rc = VERR_INVALID_PARAMETER);
238
239 const uint32_t cMaxBlocksX = cbMemRemaining / pSurface->cbBlock;
240 AssertBreakStmt(cBlocksX < cMaxBlocksX, rc = VERR_INVALID_PARAMETER);
241
242 const uint32_t cbSurfacePitch = pSurface->cbBlock * cBlocksX;
243 LogFunc(("cbSurfacePitch=0x%x\n", cbSurfacePitch));
244
245 const uint32_t cMaxBlocksY = cbMemRemaining / cbSurfacePitch;
246 AssertBreakStmt(cBlocksY < cMaxBlocksY, rc = VERR_INVALID_PARAMETER);
247
248 const uint32_t cbSurfacePlane = cbSurfacePitch * cBlocksY;
249
250 const uint32_t cMaxDepth = cbMemRemaining / cbSurfacePlane;
251 AssertBreakStmt(mipmapSize.depth < cMaxDepth, rc = VERR_INVALID_PARAMETER);
252
253 const uint32_t cbSurface = cbSurfacePlane * mipmapSize.depth;
254
255 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iMipmap];
256 pMipmapLevel->mipmapSize = mipmapSize;
257 pMipmapLevel->cBlocksX = cBlocksX;
258 pMipmapLevel->cBlocksY = cBlocksY;
259 pMipmapLevel->cBlocks = cBlocksX * cBlocksY * mipmapSize.depth;
260 pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
261 pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
262 pMipmapLevel->cbSurface = cbSurface;
263 pMipmapLevel->pSurfaceData = NULL;
264
265 cbMemRemaining -= cbSurface;
266 }
267
268 AssertRCBreak(rc);
269
270 mipmapSize.width >>= 1;
271 if (mipmapSize.width == 0) mipmapSize.width = 1;
272 mipmapSize.height >>= 1;
273 if (mipmapSize.height == 0) mipmapSize.height = 1;
274 mipmapSize.depth >>= 1;
275 if (mipmapSize.depth == 0) mipmapSize.depth = 1;
276 }
277
278 AssertLogRelRCReturnStmt(rc, RTMemFree(pSurface->paMipmapLevels), rc);
279
280#ifdef VMSVGA3D_DIRECT3D
281 /* Translate the format and usage flags to D3D. */
282 pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
283 pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
284 pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
285 pSurface->fUsageD3D = 0;
286 if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
287 pSurface->fUsageD3D |= D3DUSAGE_DYNAMIC;
288 if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
289 pSurface->fUsageD3D |= D3DUSAGE_RENDERTARGET;
290 if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
291 pSurface->fUsageD3D |= D3DUSAGE_DEPTHSTENCIL;
292 if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
293 pSurface->fUsageD3D |= D3DUSAGE_WRITEONLY;
294 if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
295 pSurface->fUsageD3D |= D3DUSAGE_AUTOGENMIPMAP;
296 pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
297 /* pSurface->u.pSurface = NULL; */
298 /* pSurface->bounce.pTexture = NULL; */
299 /* pSurface->emulated.pTexture = NULL; */
300#elif defined(VMSVGA3D_D3D11)
301 /* Nothing, because all backend specific data reside in pSurface->pBackendSurface. */
302#else
303 /* pSurface->fEmulated = false; */
304 /* pSurface->idEmulated = OPENGL_INVALID_ID; */
305 vmsvga3dSurfaceFormat2OGL(pSurface, format);
306#endif
307
308#ifdef LOG_ENABLED
309 SVGA3dSurfaceAllFlags const f = surfaceFlags;
310 LogFunc(("surface flags:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x%RX64\n",
311 (f & SVGA3D_SURFACE_CUBEMAP) ? " CUBEMAP" : "",
312 (f & SVGA3D_SURFACE_HINT_STATIC) ? " HINT_STATIC" : "",
313 (f & SVGA3D_SURFACE_HINT_DYNAMIC) ? " HINT_DYNAMIC" : "",
314 (f & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " HINT_INDEXBUFFER" : "",
315 (f & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " HINT_VERTEXBUFFER" : "",
316 (f & SVGA3D_SURFACE_HINT_TEXTURE) ? " HINT_TEXTURE" : "",
317 (f & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " HINT_RENDERTARGET" : "",
318 (f & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " HINT_DEPTHSTENCIL" : "",
319 (f & SVGA3D_SURFACE_HINT_WRITEONLY) ? " HINT_WRITEONLY" : "",
320 (f & SVGA3D_SURFACE_DEAD2) ? " DEAD2" : "",
321 (f & SVGA3D_SURFACE_AUTOGENMIPMAPS) ? " AUTOGENMIPMAPS" : "",
322 (f & SVGA3D_SURFACE_DEAD1) ? " DEAD1" : "",
323 (f & SVGA3D_SURFACE_MOB_PITCH) ? " MOB_PITCH" : "",
324 (f & SVGA3D_SURFACE_INACTIVE) ? " INACTIVE" : "",
325 (f & SVGA3D_SURFACE_HINT_RT_LOCKABLE) ? " HINT_RT_LOCKABLE" : "",
326 (f & SVGA3D_SURFACE_VOLUME) ? " VOLUME" : "",
327 (f & SVGA3D_SURFACE_SCREENTARGET) ? " SCREENTARGET" : "",
328 (f & SVGA3D_SURFACE_ALIGN16) ? " ALIGN16" : "",
329 (f & SVGA3D_SURFACE_1D) ? " 1D" : "",
330 (f & SVGA3D_SURFACE_ARRAY) ? " ARRAY" : "",
331 (f & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) ? " BIND_VERTEX_BUFFER" : "",
332 (f & SVGA3D_SURFACE_BIND_INDEX_BUFFER) ? " BIND_INDEX_BUFFER" : "",
333 (f & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) ? " BIND_CONSTANT_BUFFER" : "",
334 (f & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) ? " BIND_SHADER_RESOURCE" : "",
335 (f & SVGA3D_SURFACE_BIND_RENDER_TARGET) ? " BIND_RENDER_TARGET" : "",
336 (f & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) ? " BIND_DEPTH_STENCIL" : "",
337 (f & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) ? " BIND_STREAM_OUTPUT" : "",
338 (f & SVGA3D_SURFACE_STAGING_UPLOAD) ? " STAGING_UPLOAD" : "",
339 (f & SVGA3D_SURFACE_STAGING_DOWNLOAD) ? " STAGING_DOWNLOAD" : "",
340 (f & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE) ? " HINT_INDIRECT_UPDATE" : "",
341 (f & SVGA3D_SURFACE_TRANSFER_FROM_BUFFER) ? " TRANSFER_FROM_BUFFER" : "",
342 (f & SVGA3D_SURFACE_RESERVED1) ? " RESERVED1" : "",
343 (f & SVGA3D_SURFACE_MULTISAMPLE) ? " MULTISAMPLE" : "",
344 (f & SVGA3D_SURFACE_BIND_UAVIEW) ? " BIND_UAVIEW" : "",
345 (f & SVGA3D_SURFACE_TRANSFER_TO_BUFFER) ? " TRANSFER_TO_BUFFER" : "",
346 (f & SVGA3D_SURFACE_BIND_LOGICOPS) ? " BIND_LOGICOPS" : "",
347 (f & SVGA3D_SURFACE_BIND_RAW_VIEWS) ? " BIND_RAW_VIEWS" : "",
348 (f & SVGA3D_SURFACE_BUFFER_STRUCTURED) ? " BUFFER_STRUCTURED" : "",
349 (f & SVGA3D_SURFACE_DRAWINDIRECT_ARGS) ? " DRAWINDIRECT_ARGS" : "",
350 (f & SVGA3D_SURFACE_RESOURCE_CLAMP) ? " RESOURCE_CLAMP" : "",
351 (f & SVGA3D_SURFACE_FLAG_MAX) ? " FLAG_MAX" : "",
352 f & ~(SVGA3D_SURFACE_FLAG_MAX - 1ULL)
353 ));
354#endif
355
356 Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
357
358 /* Allocate buffer to hold the surface data until we can move it into a D3D object */
359 for (uint32_t i = 0; i < numMipLevels * pSurface->cFaces; ++i)
360 {
361 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
362 pMipmapLevel->pSurfaceData = RTMemAllocZ(pMipmapLevel->cbSurface);
363 AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
364 }
365
366 pSurface->id = sid;
367 return VINF_SUCCESS;
368}
369
370
371/**
372 * Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
373 *
374 * @returns VBox status code (currently ignored).
375 * @param pThisCC The VGA/VMSVGA state for ring-3.
376 * @param sid The ID of the surface to destroy.
377 */
378int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
379{
380 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
381 AssertReturn(pState, VERR_NO_MEMORY);
382
383 PVMSVGA3DSURFACE pSurface;
384 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
385 AssertRCReturn(rc, rc);
386
387 LogFunc(("sid=%u\n", sid));
388
389 /* Check all contexts if this surface is used as a render target or active texture. */
390 for (uint32_t cid = 0; cid < pState->cContexts; cid++)
391 {
392 PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
393 if (pContext->id == cid)
394 {
395 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
396 if (pContext->aSidActiveTextures[i] == sid)
397 pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
398 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
399 if (pContext->state.aRenderTargets[i] == sid)
400 pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
401 }
402 }
403
404 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
405 if (pSvgaR3State->pFuncs3D)
406 pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, pSurface);
407
408 if (pSurface->paMipmapLevels)
409 {
410 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->cFaces; ++i)
411 RTMemFreeZ(pSurface->paMipmapLevels[i].pSurfaceData, pSurface->paMipmapLevels[i].cbSurface);
412 RTMemFree(pSurface->paMipmapLevels);
413 }
414
415 memset(pSurface, 0, sizeof(*pSurface));
416 pSurface->id = SVGA3D_INVALID_ID;
417
418 return VINF_SUCCESS;
419}
420
421
422/**
423 * Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
424 *
425 * @returns VBox status code (currently ignored).
426 * @param pThis The shared VGA/VMSVGA state.
427 * @param pThisCC The VGA/VMSVGA state for ring-3.
428 * @param pDstSfcImg
429 * @param pDstBox
430 * @param pSrcSfcImg
431 * @param pSrcBox
432 * @param enmMode
433 */
434int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pDstSfcImg, SVGA3dBox const *pDstBox,
435 SVGA3dSurfaceImageId const *pSrcSfcImg, SVGA3dBox const *pSrcBox, SVGA3dStretchBltMode enmMode)
436{
437 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
438 AssertReturn(pState, VERR_NO_MEMORY);
439
440 int rc;
441
442 uint32_t const sidSrc = pSrcSfcImg->sid;
443 PVMSVGA3DSURFACE pSrcSurface;
444 rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
445 AssertRCReturn(rc, rc);
446
447 uint32_t const sidDst = pDstSfcImg->sid;
448 PVMSVGA3DSURFACE pDstSurface;
449 rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
450 AssertRCReturn(rc, rc);
451
452 AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
453 AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->cLevels, VERR_INVALID_PARAMETER);
454 AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
455 AssertReturn(pDstSfcImg->mipmap < pDstSurface->cLevels, VERR_INVALID_PARAMETER);
456
457 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
458 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
459
460 PVMSVGA3DCONTEXT pContext;
461#ifdef VMSVGA3D_OPENGL
462 LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
463 sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
464 sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
465 pContext = &pState->SharedCtx;
466 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
467#else
468 LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
469 sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
470 sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
471
472 uint32_t cid = pDstSurface->idAssociatedContext;
473 if (cid == SVGA3D_INVALID_ID)
474 cid = pSrcSurface->idAssociatedContext;
475
476 /* At least one of surfaces must be in hardware. */
477 AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
478
479 rc = vmsvga3dContextFromCid(pState, cid, &pContext);
480 AssertRCReturn(rc, rc);
481#endif
482
483 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
484 {
485 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
486 LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->surfaceFlags, pSrcSurface->format));
487 rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pSrcSurface);
488 AssertRCReturn(rc, rc);
489 }
490
491 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
492 {
493 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
494 LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->surfaceFlags, pDstSurface->format));
495 rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pDstSurface);
496 AssertRCReturn(rc, rc);
497 }
498
499 PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
500 rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
501 AssertRCReturn(rc, rc);
502
503 PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
504 rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
505 AssertRCReturn(rc, rc);
506
507 SVGA3dBox clipSrcBox = *pSrcBox;
508 SVGA3dBox clipDstBox = *pDstBox;
509 vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
510 vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
511
512 return pSvgaR3State->pFuncs3D->pfnSurfaceStretchBlt(pThis, pState,
513 pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
514 pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
515 enmMode, pContext);
516}
517
518/**
519 * Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
520 *
521 * @returns VBox status code (currently ignored).
522 * @param pThis The shared VGA/VMSVGA instance data.
523 * @param pThisCC The VGA/VMSVGA state for ring-3.
524 * @param guest .
525 * @param host .
526 * @param transfer .
527 * @param cCopyBoxes .
528 * @param paBoxes .
529 */
530int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestImage guest, SVGA3dSurfaceImageId host,
531 SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
532{
533 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
534 AssertReturn(pState, VERR_NO_MEMORY);
535
536 PVMSVGA3DSURFACE pSurface;
537 int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
538 AssertRCReturn(rc, rc);
539
540 LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
541 (pSurface->surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
542 guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
543 host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
544
545 PVMSVGA3DMIPMAPLEVEL pMipLevel;
546 rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
547 AssertRCReturn(rc, rc);
548
549 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
550 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
551
552 PVMSVGA3DCONTEXT pContext = NULL;
553 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
554 {
555 /*
556 * Not realized in host hardware/library yet, we have to work with
557 * the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
558 */
559 AssertReturn(pMipLevel->pSurfaceData, VERR_INTERNAL_ERROR);
560 }
561 else
562 {
563#ifdef VMSVGA3D_DIRECT3D
564 /* Flush the drawing pipeline for this surface as it could be used in a shared context. */
565 vmsvga3dSurfaceFlush(pSurface);
566#elif defined(VMSVGA3D_D3D11)
567 /** @todo */
568#else /* VMSVGA3D_OPENGL */
569 pContext = &pState->SharedCtx;
570 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
571#endif
572 }
573
574 /* SVGA_3D_CMD_SURFACE_DMA:
575 * "define the 'source' in each copyBox as the guest image and the
576 * 'destination' as the host image, regardless of transfer direction."
577 */
578 for (uint32_t i = 0; i < cCopyBoxes; ++i)
579 {
580 Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
581 VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
582 i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
583
584 /* Apparently we're supposed to clip it (gmr test sample) */
585
586 /* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
587 SVGA3dBox hostBox;
588 hostBox.x = paBoxes[i].x;
589 hostBox.y = paBoxes[i].y;
590 hostBox.z = paBoxes[i].z;
591 hostBox.w = paBoxes[i].w;
592 hostBox.h = paBoxes[i].h;
593 hostBox.d = paBoxes[i].d;
594 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
595
596 if ( !hostBox.w
597 || !hostBox.h
598 || !hostBox.d)
599 {
600 Log(("Skip empty box\n"));
601 continue;
602 }
603 RT_UNTRUSTED_VALIDATED_FENCE();
604
605 /* Adjust the guest, i.e. "src", point.
606 * Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
607 */
608 uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
609 uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
610 uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
611
612 /* Calculate offsets of the image blocks for the transfer. */
613 uint32_t u32HostBlockX;
614 uint32_t u32HostBlockY;
615 uint32_t u32GuestBlockX;
616 uint32_t u32GuestBlockY;
617 uint32_t cBlocksX;
618 uint32_t cBlocksY;
619 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
620 {
621 u32HostBlockX = hostBox.x;
622 u32HostBlockY = hostBox.y;
623
624 u32GuestBlockX = srcx;
625 u32GuestBlockY = srcy;
626
627 cBlocksX = hostBox.w;
628 cBlocksY = hostBox.h;
629 }
630 else
631 {
632 /* Pixels to blocks. */
633 u32HostBlockX = hostBox.x / pSurface->cxBlock;
634 u32HostBlockY = hostBox.y / pSurface->cyBlock;
635 Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
636 Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
637
638 u32GuestBlockX = srcx / pSurface->cxBlock;
639 u32GuestBlockY = srcy / pSurface->cyBlock;
640 Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
641 Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
642
643 cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
644 cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
645 }
646
647 uint32_t cbGuestPitch = guest.pitch;
648 if (cbGuestPitch == 0)
649 {
650 /* Host must "assume image is tightly packed". Our surfaces are. */
651 cbGuestPitch = pMipLevel->cbSurfacePitch;
652 }
653 else
654 {
655 /* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
656 AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
657 RT_UNTRUSTED_VALIDATED_FENCE();
658 }
659
660 /* srcx, srcy and srcz values are used to calculate the guest offset.
661 * The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
662 */
663 AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
664 AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
665 AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
666 RT_UNTRUSTED_VALIDATED_FENCE();
667
668 if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
669 || VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
670 {
671 uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
672 u32GuestBlockY * cbGuestPitch +
673 srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
674 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
675
676 /* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
677 uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
678 u32HostBlockY * pMipLevel->cbSurfacePitch +
679 hostBox.z * pMipLevel->cbSurfacePlane;
680 AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
681
682 for (uint32_t z = 0; z < hostBox.d; ++z)
683 {
684 rc = vmsvgaR3GmrTransfer(pThis,
685 pThisCC,
686 transfer,
687 (uint8_t *)pMipLevel->pSurfaceData,
688 pMipLevel->cbSurface,
689 uHostOffset,
690 (int32_t)pMipLevel->cbSurfacePitch,
691 guest.ptr,
692 (uint32_t)uGuestOffset,
693 cbGuestPitch,
694 cBlocksX * pSurface->cbBlock,
695 cBlocksY);
696 AssertRC(rc);
697
698 Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
699 z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
700
701 uHostOffset += pMipLevel->cbSurfacePlane;
702 uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
703 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
704 }
705 }
706
707 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
708 {
709 SVGA3dCopyBox clipBox;
710 clipBox.x = hostBox.x;
711 clipBox.y = hostBox.y;
712 clipBox.z = hostBox.z;
713 clipBox.w = hostBox.w;
714 clipBox.h = hostBox.h;
715 clipBox.d = hostBox.d;
716 clipBox.srcx = srcx;
717 clipBox.srcy = srcy;
718 clipBox.srcz = srcz;
719 rc = pSvgaR3State->pFuncs3D->pfnSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
720 guest.ptr, cbGuestPitch, transfer,
721 &clipBox, pContext, rc, i);
722 AssertRC(rc);
723 }
724 }
725
726 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
727 {
728 pMipLevel->fDirty = true;
729 pSurface->fDirty = true;
730 }
731
732 return rc;
733}
734
735static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr const *pGuestResult,
736 SVGA3dQueryState enmState, uint32_t u32Result)
737{
738 SVGA3dQueryResult queryResult;
739 queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
740 queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
741 queryResult.result32 = u32Result;
742
743 int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
744 (uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
745 *pGuestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
746 AssertRC(rc);
747 return rc;
748}
749
750/* Used with saved state. */
751int vmsvga3dQueryCreate(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
752{
753 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
754 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
755
756 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
757 AssertReturn(pState, VERR_NO_MEMORY);
758
759 LogFunc(("cid=%u type=%d\n", cid, type));
760
761 PVMSVGA3DCONTEXT pContext;
762 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
763 AssertRCReturn(rc, rc);
764
765 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
766 {
767 VMSVGA3DQUERY *p = &pContext->occlusion;
768 if (!VMSVGA3DQUERY_EXISTS(p))
769 {
770 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
771 AssertRCReturn(rc, rc);
772 }
773
774 return VINF_SUCCESS;
775 }
776
777 /* Nothing else for VGPU9. */
778 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
779}
780
781int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
782{
783 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
784 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
785
786 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
787 AssertReturn(pState, VERR_NO_MEMORY);
788
789 LogFunc(("cid=%u type=%d\n", cid, type));
790
791 PVMSVGA3DCONTEXT pContext;
792 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
793 AssertRCReturn(rc, rc);
794
795 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
796 {
797 VMSVGA3DQUERY *p = &pContext->occlusion;
798 if (!VMSVGA3DQUERY_EXISTS(p))
799 {
800 /* Lazy creation of the query object. */
801 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
802 AssertRCReturn(rc, rc);
803 }
804
805 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryBegin(pThisCC, pContext);
806 AssertRCReturn(rc, rc);
807
808 p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
809 p->u32QueryResult = 0;
810
811 return VINF_SUCCESS;
812 }
813
814 /* Nothing else for VGPU9. */
815 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
816}
817
818int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
819{
820 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
821 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
822
823 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
824 AssertReturn(pState, VERR_NO_MEMORY);
825
826 LogFunc(("cid=%u type=%d\n", cid, type));
827
828 PVMSVGA3DCONTEXT pContext;
829 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
830 AssertRCReturn(rc, rc);
831
832 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
833 {
834 VMSVGA3DQUERY *p = &pContext->occlusion;
835 Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
836 AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
837
838 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryEnd(pThisCC, pContext);
839 AssertRCReturn(rc, rc);
840
841 p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
842 return VINF_SUCCESS;
843 }
844
845 /* Nothing else for VGPU9. */
846 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
847}
848
849int vmsvga3dQueryWait(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, PVGASTATE pThis, SVGAGuestPtr const *pGuestResult)
850{
851 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
852 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
853
854 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
855 AssertReturn(pState, VERR_NO_MEMORY);
856
857 LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, pGuestResult->gmrId, pGuestResult->offset));
858
859 PVMSVGA3DCONTEXT pContext;
860 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
861 AssertRCReturn(rc, rc);
862
863 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
864 {
865 VMSVGA3DQUERY *p = &pContext->occlusion;
866 if (VMSVGA3DQUERY_EXISTS(p))
867 {
868 if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
869 {
870 /* Only if not already in SIGNALED state,
871 * i.e. not a second read from the guest or after restoring saved state.
872 */
873 uint32_t u32Pixels = 0;
874 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryGetData(pThisCC, pContext, &u32Pixels);
875 if (RT_SUCCESS(rc))
876 {
877 p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
878 p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
879 }
880 }
881
882 if (RT_SUCCESS(rc))
883 {
884 /* pGuestResult can be NULL when saving the state. */
885 if (pGuestResult)
886 {
887 /* Return data to the guest. */
888 vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
889 }
890 return VINF_SUCCESS;
891 }
892 }
893 else
894 {
895 AssertMsgFailed(("GetData Query is NULL\n"));
896 }
897
898 rc = VERR_INTERNAL_ERROR;
899 }
900 else
901 {
902 rc = VERR_NOT_IMPLEMENTED;
903 }
904
905 if (pGuestResult)
906 vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_FAILED, 0);
907 AssertFailedReturn(rc);
908}
909
910int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
911 SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
912{
913 /* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
914 LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
915 idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
916 srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
917 for (uint32_t i = 0; i < cRects; i++)
918 {
919 LogFunc(("clipping rect %d (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
920 }
921
922 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
923 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
924
925 /* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
926 SVGA3dSurfaceImageId src;
927 src.sid = srcImage.sid;
928 src.mipmap = 0;
929 src.face = 0;
930
931 if (pScreen->pHwScreen)
932 {
933 /* Use the backend accelerated method, if available. */
934 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
935 if (pSvgaR3State->pFuncs3D)
936 {
937 int rc = pSvgaR3State->pFuncs3D->pfnSurfaceBlitToScreen(pThisCC, pScreen, destRect, src, srcRect, cRects, pRect);
938 if (rc == VINF_SUCCESS)
939 {
940 return VINF_SUCCESS;
941 }
942 }
943 }
944
945 /** @todo scaling */
946 AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
947
948 SVGA3dCopyBox box;
949 SVGAGuestImage dest;
950
951 box.srcz = 0;
952 box.z = 0;
953 box.d = 1;
954
955 dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
956 dest.ptr.offset = pScreen->offVRAM;
957 dest.pitch = pScreen->cbPitch;
958
959 if (cRects == 0)
960 {
961 /* easy case; no clipping */
962
963 /* SVGA_3D_CMD_SURFACE_DMA:
964 * 'define the "source" in each copyBox as the guest image and the
965 * "destination" as the host image, regardless of transfer direction.'
966 *
967 * Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
968 * it must set the copyBox "source" to the guest destination coords and
969 * the copyBox "destination" to the host surface source coords.
970 */
971 /* Host image. */
972 box.x = srcRect.left;
973 box.y = srcRect.top;
974 box.w = srcRect.right - srcRect.left;
975 box.h = srcRect.bottom - srcRect.top;
976 /* Guest image. */
977 box.srcx = destRect.left;
978 box.srcy = destRect.top;
979
980 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
981 AssertRCReturn(rc, rc);
982
983 /* Update the guest image, which is at box.src. */
984 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
985 }
986 else
987 {
988 /** @todo merge into one SurfaceDMA call */
989 for (uint32_t i = 0; i < cRects; i++)
990 {
991 /* "The clip rectangle coordinates are measured
992 * relative to the top-left corner of destRect."
993 * Therefore they are relative to the top-left corner of srcRect as well.
994 */
995
996 /* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
997 box.x = srcRect.left + pRect[i].left;
998 box.y = srcRect.top + pRect[i].top;
999 box.w = pRect[i].right - pRect[i].left;
1000 box.h = pRect[i].bottom - pRect[i].top;
1001 /* Guest image. The target screen memory is currently in the guest VRAM. */
1002 box.srcx = destRect.left + pRect[i].left;
1003 box.srcy = destRect.top + pRect[i].top;
1004
1005 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
1006 AssertRCReturn(rc, rc);
1007
1008 /* Update the guest image, which is at box.src. */
1009 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1010 }
1011 }
1012
1013 return VINF_SUCCESS;
1014}
1015
1016int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
1017{
1018 /* Deprecated according to svga3d_reg.h. */
1019 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1020 AssertReturn(pState, VERR_NO_MEMORY);
1021
1022 PVMSVGA3DSURFACE pSurface;
1023 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1024 AssertRCReturn(rc, rc);
1025
1026 /** @todo Detect screen from coords? Or split rect to screens? */
1027 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
1028 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
1029
1030 /* If there are no recangles specified, just grab a screenful. */
1031 SVGA3dCopyRect DummyRect;
1032 if (cRects != 0)
1033 { /* likely */ }
1034 else
1035 {
1036 /** @todo Find the usecase for this or check what the original device does.
1037 * The original code was doing some scaling based on the surface
1038 * size... */
1039 AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
1040 DummyRect.x = DummyRect.srcx = 0;
1041 DummyRect.y = DummyRect.srcy = 0;
1042 DummyRect.w = pScreen->cWidth;
1043 DummyRect.h = pScreen->cHeight;
1044 cRects = 1;
1045 pRect = &DummyRect;
1046 }
1047
1048 uint32_t i;
1049 for (i = 0; i < cRects; ++i)
1050 {
1051 uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
1052 SVGASignedRect destRect;
1053 destRect.left = pRect[i].x;
1054 destRect.top = pRect[i].y;
1055 destRect.right = pRect[i].x + pRect[i].w;
1056 destRect.bottom = pRect[i].y + pRect[i].h;
1057
1058 SVGA3dSurfaceImageId src;
1059 src.sid = sid;
1060 src.face = 0;
1061 src.mipmap = 0;
1062
1063 SVGASignedRect srcRect;
1064 srcRect.left = pRect[i].srcx;
1065 srcRect.top = pRect[i].srcy;
1066 srcRect.right = pRect[i].srcx + pRect[i].w;
1067 srcRect.bottom = pRect[i].srcy + pRect[i].h;
1068
1069 /* Entire rect. */
1070 rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
1071 AssertRCReturn(rc, rc);
1072 }
1073
1074 return VINF_SUCCESS;
1075}
1076
1077int vmsvga3dDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1078{
1079 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1080 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1081
1082 if (pScreen->pHwScreen)
1083 {
1084 pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1085 }
1086
1087 int rc = pSvgaR3State->pFuncs3D->pfnDefineScreen(pThis, pThisCC, pScreen);
1088 if (RT_SUCCESS(rc))
1089 {
1090 LogRelMax(1, ("VMSVGA: using accelerated graphics output\n"));
1091 }
1092 return rc;
1093}
1094
1095int vmsvga3dDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1096{
1097 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1098 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1099
1100 return pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1101}
1102
1103int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap)
1104{
1105 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1106 AssertReturn(pState, VERR_INVALID_STATE);
1107
1108 PVMSVGA3DSURFACE pSurface;
1109 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1110 AssertRCReturn(rc, rc);
1111
1112 if (face == SVGA_ID_INVALID && mipmap == SVGA_ID_INVALID)
1113 {
1114 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->cFaces; ++i)
1115 {
1116 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1117 pMipmapLevel->fDirty = true;
1118 }
1119 }
1120 else
1121 {
1122 PVMSVGA3DMIPMAPLEVEL pMipmapLevel;
1123 rc = vmsvga3dMipmapLevel(pSurface, face, mipmap, &pMipmapLevel);
1124 AssertRCReturn(rc, rc);
1125
1126 pMipmapLevel->fDirty = true;
1127 }
1128 pSurface->fDirty = true;
1129
1130 return rc;
1131}
1132
1133
1134/*
1135 *
1136 * 3D
1137 *
1138 */
1139
1140int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
1141{
1142 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1143 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1144 return pSvgaR3State->pFuncs3D->pfnQueryCaps(pThisCC, idx3dCaps, pu32Val);
1145}
1146
1147int vmsvga3dChangeMode(PVGASTATECC pThisCC)
1148{
1149 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1150 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1151 return pSvgaR3State->pFuncs3D->pfnChangeMode(pThisCC);
1152}
1153
1154int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src, uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
1155{
1156 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1157 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1158 return pSvgaR3State->pFuncs3D->pfnSurfaceCopy(pThisCC, dest, src, cCopyBoxes, pBox);
1159}
1160
1161void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
1162{
1163 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1164 AssertReturnVoid(pSvgaR3State->pFuncs3D);
1165 pSvgaR3State->pFuncs3D->pfnUpdateHostScreenViewport(pThisCC, idScreen, pOldViewport);
1166}
1167
1168
1169/*
1170 *
1171 * VGPU9
1172 *
1173 */
1174
1175int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
1176{
1177 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1178 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1179 return pSvgaR3State->pFuncsVGPU9->pfnContextDefine(pThisCC, cid);
1180}
1181
1182int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
1183{
1184 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1185 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1186 return pSvgaR3State->pFuncsVGPU9->pfnContextDestroy(pThisCC, cid);
1187}
1188
1189int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
1190{
1191 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1192 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1193 return pSvgaR3State->pFuncsVGPU9->pfnSetTransform(pThisCC, cid, type, matrix);
1194}
1195
1196int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
1197{
1198 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1199 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1200 return pSvgaR3State->pFuncsVGPU9->pfnSetZRange(pThisCC, cid, zRange);
1201}
1202
1203int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
1204{
1205 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1206 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1207 return pSvgaR3State->pFuncsVGPU9->pfnSetRenderState(pThisCC, cid, cRenderStates, pRenderState);
1208}
1209
1210int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
1211{
1212 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1213 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1214 return pSvgaR3State->pFuncsVGPU9->pfnSetRenderTarget(pThisCC, cid, type, target);
1215}
1216
1217int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
1218{
1219 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1220 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1221 return pSvgaR3State->pFuncsVGPU9->pfnSetTextureState(pThisCC, cid, cTextureStates, pTextureState);
1222}
1223
1224int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
1225{
1226 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1227 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1228 return pSvgaR3State->pFuncsVGPU9->pfnSetMaterial(pThisCC, cid, face, pMaterial);
1229}
1230
1231int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
1232{
1233 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1234 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1235 return pSvgaR3State->pFuncsVGPU9->pfnSetLightData(pThisCC, cid, index, pData);
1236}
1237
1238int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
1239{
1240 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1241 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1242 return pSvgaR3State->pFuncsVGPU9->pfnSetLightEnabled(pThisCC, cid, index, enabled);
1243}
1244
1245int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1246{
1247 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1248 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1249 return pSvgaR3State->pFuncsVGPU9->pfnSetViewPort(pThisCC, cid, pRect);
1250}
1251
1252int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
1253{
1254 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1255 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1256 return pSvgaR3State->pFuncsVGPU9->pfnSetClipPlane(pThisCC, cid, index, plane);
1257}
1258
1259int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth, uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
1260{
1261 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1262 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1263 return pSvgaR3State->pFuncsVGPU9->pfnCommandClear(pThisCC, cid, clearFlag, color, depth, stencil, cRects, pRect);
1264}
1265
1266int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl, uint32_t numRanges, SVGA3dPrimitiveRange *pNumRange, uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
1267{
1268 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1269 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1270 return pSvgaR3State->pFuncsVGPU9->pfnDrawPrimitives(pThisCC, cid, numVertexDecls, pVertexDecl, numRanges, pNumRange, cVertexDivisor, pVertexDivisor);
1271}
1272
1273int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1274{
1275 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1276 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1277 return pSvgaR3State->pFuncsVGPU9->pfnSetScissorRect(pThisCC, cid, pRect);
1278}
1279
1280int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
1281{
1282 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1283 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1284 return pSvgaR3State->pFuncsVGPU9->pfnGenerateMipmaps(pThisCC, sid, filter);
1285}
1286
1287int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type, uint32_t cbData, uint32_t *pShaderData)
1288{
1289 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1290 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1291 return pSvgaR3State->pFuncsVGPU9->pfnShaderDefine(pThisCC, cid, shid, type, cbData, pShaderData);
1292}
1293
1294int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
1295{
1296 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1297 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1298 return pSvgaR3State->pFuncsVGPU9->pfnShaderDestroy(pThisCC, cid, shid, type);
1299}
1300
1301int vmsvga3dShaderSet(PVGASTATECC pThisCC, struct VMSVGA3DCONTEXT *pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
1302{
1303 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1304 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1305 return pSvgaR3State->pFuncsVGPU9->pfnShaderSet(pThisCC, pContext, cid, type, shid);
1306}
1307
1308int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type, SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
1309{
1310 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1311 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1312 return pSvgaR3State->pFuncsVGPU9->pfnShaderSetConst(pThisCC, cid, reg, type, ctype, cRegisters, pValues);
1313}
1314
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette