VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 97405

Last change on this file since 97405 was 96450, checked in by vboxsync, 2 years ago

Devices/Graphics: set component types for pixel shader output signature. bugref:10013
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1/* $Id: DevVGA-SVGA3d-win-dx.cpp 96450 2022-08-24 08:37:38Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020-2022 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33#include <VBox/AssertGuest.h>
34#include <VBox/log.h>
35#include <VBox/vmm/pdmdev.h>
36#include <VBox/vmm/pgm.h>
37
38#include <iprt/assert.h>
39#include <iprt/avl.h>
40#include <iprt/errcore.h>
41#include <iprt/mem.h>
42
43#include <VBoxVideo.h> /* required by DevVGA.h */
44#include <VBoxVideo3D.h>
45
46/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
47#include "DevVGA.h"
48
49#include "DevVGA-SVGA.h"
50#include "DevVGA-SVGA3d.h"
51#include "DevVGA-SVGA3d-internal.h"
52#include "DevVGA-SVGA3d-dx-shader.h"
53
54/* d3d11_1.h has a structure field named 'Status' but Status is defined as int on Linux host */
55#if defined(Status)
56#undef Status
57#endif
58#include <d3d11_1.h>
59
60
61#ifdef RT_OS_WINDOWS
62# define VBOX_D3D11_LIBRARY_NAME "d3d11"
63#else
64# define VBOX_D3D11_LIBRARY_NAME "VBoxDxVk"
65#endif
66
67#define DX_FORCE_SINGLE_DEVICE
68
69/* This is not available on non Windows hosts. */
70#ifndef D3D_RELEASE
71# define D3D_RELEASE(a_Ptr) do { if ((a_Ptr)) (a_Ptr)->Release(); (a_Ptr) = NULL; } while (0)
72#endif
73
74/** Fake ID for the backend DX context. The context creates all shared textures. */
75#define DX_CID_BACKEND UINT32_C(0xfffffffe)
76
77#define D3D_RELEASE_ARRAY(a_Count, a_papArray) do { \
78 for (uint32_t i = 0; i < (a_Count); ++i) \
79 D3D_RELEASE((a_papArray)[i]); \
80} while (0)
81
82typedef struct D3D11BLITTER
83{
84 ID3D11Device *pDevice;
85 ID3D11DeviceContext *pImmediateContext;
86
87 ID3D11VertexShader *pVertexShader;
88 ID3D11PixelShader *pPixelShader;
89 ID3D11SamplerState *pSamplerState;
90 ID3D11RasterizerState *pRasterizerState;
91 ID3D11BlendState *pBlendState;
92} D3D11BLITTER;
93
94typedef struct DXDEVICE
95{
96 ID3D11Device1 *pDevice; /* Device. */
97 ID3D11DeviceContext1 *pImmediateContext; /* Corresponding context. */
98 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
99 D3D_FEATURE_LEVEL FeatureLevel;
100
101 /* Staging buffer for transfer to surface buffers. */
102 ID3D11Buffer *pStagingBuffer; /* The staging buffer resource. */
103 uint32_t cbStagingBuffer; /* Current size of the staging buffer resource. */
104
105 D3D11BLITTER Blitter; /* Blits one texture to another. */
106} DXDEVICE;
107
108/* Kind of a texture view. */
109typedef enum VMSVGA3DBACKVIEWTYPE
110{
111 VMSVGA3D_VIEWTYPE_NONE = 0,
112 VMSVGA3D_VIEWTYPE_RENDERTARGET = 1,
113 VMSVGA3D_VIEWTYPE_DEPTHSTENCIL = 2,
114 VMSVGA3D_VIEWTYPE_SHADERRESOURCE = 3,
115 VMSVGA3D_VIEWTYPE_UNORDEREDACCESS = 4
116} VMSVGA3DBACKVIEWTYPE;
117
118/* Information about a texture view to track all created views:.
119 * when a surface is invalidated, then all views must deleted;
120 * when a view is deleted, then the view must be unlinked from the surface.
121 */
122typedef struct DXVIEWINFO
123{
124 uint32_t sid; /* Surface which the view was created for. */
125 uint32_t cid; /* DX context which created the view. */
126 uint32_t viewId; /* View id assigned by the guest. */
127 VMSVGA3DBACKVIEWTYPE enmViewType;
128} DXVIEWINFO;
129
130/* Context Object Table element for a texture view. */
131typedef struct DXVIEW
132{
133 uint32_t cid; /* DX context which created the view. */
134 uint32_t sid; /* Surface which the view was created for. */
135 uint32_t viewId; /* View id assigned by the guest. */
136 VMSVGA3DBACKVIEWTYPE enmViewType;
137
138 union
139 {
140 ID3D11View *pView; /* The view object. */
141 ID3D11RenderTargetView *pRenderTargetView;
142 ID3D11DepthStencilView *pDepthStencilView;
143 ID3D11ShaderResourceView *pShaderResourceView;
144 ID3D11UnorderedAccessView *pUnorderedAccessView;
145 } u;
146
147 RTLISTNODE nodeSurfaceView; /* Views are linked to the surface. */
148} DXVIEW;
149
150/* What kind of resource has been created for the VMSVGA3D surface. */
151typedef enum VMSVGA3DBACKRESTYPE
152{
153 VMSVGA3D_RESTYPE_NONE = 0,
154 VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
155 VMSVGA3D_RESTYPE_TEXTURE_1D = 2,
156 VMSVGA3D_RESTYPE_TEXTURE_2D = 3,
157 VMSVGA3D_RESTYPE_TEXTURE_CUBE = 4,
158 VMSVGA3D_RESTYPE_TEXTURE_3D = 5,
159 VMSVGA3D_RESTYPE_BUFFER = 6,
160} VMSVGA3DBACKRESTYPE;
161
162typedef struct VMSVGA3DBACKENDSURFACE
163{
164 VMSVGA3DBACKRESTYPE enmResType;
165 DXGI_FORMAT enmDxgiFormat;
166 union
167 {
168 ID3D11Resource *pResource;
169 ID3D11Texture1D *pTexture1D;
170 ID3D11Texture2D *pTexture2D;
171 ID3D11Texture3D *pTexture3D;
172 ID3D11Buffer *pBuffer;
173 } u;
174
175 /* For updates from memory. */
176 union /** @todo One per format. */
177 {
178 ID3D11Resource *pResource;
179 ID3D11Texture1D *pTexture1D;
180 ID3D11Texture2D *pTexture2D;
181 ID3D11Texture3D *pTexture3D;
182 } dynamic;
183
184 /* For reading the texture content. */
185 union /** @todo One per format. */
186 {
187 ID3D11Resource *pResource;
188 ID3D11Texture1D *pTexture1D;
189 ID3D11Texture2D *pTexture2D;
190 ID3D11Texture3D *pTexture3D;
191 } staging;
192
193 /* Screen targets are created as shared surfaces. */
194 HANDLE SharedHandle; /* The shared handle of this structure. */
195
196 /* DX context which last rendered to the texture.
197 * This is only for render targets and screen targets, which can be shared between contexts.
198 * The backend context (cid == DX_CID_BACKEND) can also be a drawing context.
199 */
200 uint32_t cidDrawing;
201
202 /** AVL tree containing DXSHAREDTEXTURE structures. */
203 AVLU32TREE SharedTextureTree;
204
205 /* Render target views, depth stencil views and shader resource views created for this texture or buffer. */
206 RTLISTANCHOR listView; /* DXVIEW */
207
208} VMSVGA3DBACKENDSURFACE;
209
210/* "The only resources that can be shared are 2D non-mipmapped textures." */
211typedef struct DXSHAREDTEXTURE
212{
213 AVLU32NODECORE Core; /* Key is context id which opened this texture. */
214 ID3D11Texture2D *pTexture; /* The opened shared texture. */
215 uint32_t sid; /* Surface id. */
216} DXSHAREDTEXTURE;
217
218
219typedef struct VMSVGAHWSCREEN
220{
221 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
222 IDXGIResource *pDxgiResource; /* Interface of the texture. */
223 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
224 HANDLE SharedHandle; /* The shared handle of this structure. */
225 uint32_t sidScreenTarget; /* The source surface for this screen. */
226} VMSVGAHWSCREEN;
227
228
229typedef struct DXELEMENTLAYOUT
230{
231 ID3D11InputLayout *pElementLayout;
232 uint32_t cElementDesc;
233 D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
234} DXELEMENTLAYOUT;
235
236typedef struct DXSHADER
237{
238 SVGA3dShaderType enmShaderType;
239 union
240 {
241 ID3D11DeviceChild *pShader; /* All. */
242 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */
243 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */
244 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */
245 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */
246 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */
247 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */
248 };
249 void *pvDXBC;
250 uint32_t cbDXBC;
251
252 uint32_t soid; /* Stream output declarations for geometry shaders. */
253
254 DXShaderInfo shaderInfo;
255} DXSHADER;
256
257typedef struct DXQUERY
258{
259 union
260 {
261 ID3D11Query *pQuery;
262 ID3D11Predicate *pPredicate;
263 };
264} DXQUERY;
265
266typedef struct DXSTREAMOUTPUT
267{
268 UINT cDeclarationEntry;
269 D3D11_SO_DECLARATION_ENTRY aDeclarationEntry[SVGA3D_MAX_STREAMOUT_DECLS];
270} DXSTREAMOUTPUT;
271
272typedef struct DXBOUNDVERTEXBUFFER
273{
274 ID3D11Buffer *pBuffer;
275 uint32_t stride;
276 uint32_t offset;
277} DXBOUNDVERTEXBUFFER;
278
279typedef struct DXBOUNDINDEXBUFFER
280{
281 ID3D11Buffer *pBuffer;
282 DXGI_FORMAT indexBufferFormat;
283 uint32_t indexBufferOffset;
284} DXBOUNDINDEXBUFFER;
285
286typedef struct DXBOUNDRESOURCES /* Currently bound resources. Mirror SVGADXContextMobFormat structure. */
287{
288 struct
289 {
290 DXBOUNDVERTEXBUFFER vertexBuffers[SVGA3D_DX_MAX_VERTEXBUFFERS];
291 DXBOUNDINDEXBUFFER indexBuffer;
292 } inputAssembly;
293 struct
294 {
295 ID3D11Buffer *constantBuffers[SVGA3D_DX_MAX_CONSTBUFFERS];
296 } shaderState[SVGA3D_NUM_SHADERTYPE];
297} DXBOUNDRESOURCES;
298
299
300typedef struct VMSVGA3DBACKENDDXCONTEXT
301{
302 DXDEVICE dxDevice; /* DX device interfaces for this context operations. */
303
304 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
305 uint32_t cBlendState; /* Number of entries in the papBlendState array. */
306 uint32_t cDepthStencilState; /* papDepthStencilState */
307 uint32_t cSamplerState; /* papSamplerState */
308 uint32_t cRasterizerState; /* papRasterizerState */
309 uint32_t cElementLayout; /* paElementLayout */
310 uint32_t cRenderTargetView; /* paRenderTargetView */
311 uint32_t cDepthStencilView; /* paDepthStencilView */
312 uint32_t cShaderResourceView; /* paShaderResourceView */
313 uint32_t cQuery; /* paQuery */
314 uint32_t cShader; /* paShader */
315 uint32_t cStreamOutput; /* paStreamOutput */
316 uint32_t cUnorderedAccessView; /* paUnorderedAccessView */
317 ID3D11BlendState **papBlendState;
318 ID3D11DepthStencilState **papDepthStencilState;
319 ID3D11SamplerState **papSamplerState;
320 ID3D11RasterizerState **papRasterizerState;
321 DXELEMENTLAYOUT *paElementLayout;
322 DXVIEW *paRenderTargetView;
323 DXVIEW *paDepthStencilView;
324 DXVIEW *paShaderResourceView;
325 DXQUERY *paQuery;
326 DXSHADER *paShader;
327 DXSTREAMOUTPUT *paStreamOutput;
328 DXVIEW *paUnorderedAccessView;
329
330 uint32_t cSOTarget; /* How many SO targets are currently set (SetSOTargets) */
331
332 DXBOUNDRESOURCES resources;
333} VMSVGA3DBACKENDDXCONTEXT;
334
335/* Shader disassembler function. Optional. */
336typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
337typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
338
339typedef struct VMSVGA3DBACKEND
340{
341 RTLDRMOD hD3D11;
342 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
343
344 RTLDRMOD hD3DCompiler;
345 PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
346
347 DXDEVICE dxDevice; /* Device for the VMSVGA3D context independent operation. */
348
349 DXBOUNDRESOURCES resources; /* What is currently applied to the pipeline. */
350
351 bool fSingleDevice; /* Whether to use one DX device for all guest contexts. */
352
353 /** @todo Here a set of functions which do different job in single and multiple device modes. */
354} VMSVGA3DBACKEND;
355
356
357/* Static function prototypes. */
358static int dxDeviceFlush(DXDEVICE *pDevice);
359static int dxDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry);
360static int dxDefineUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry);
361static int dxDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry);
362static int dxDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry);
363static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
364static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
365static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface);
366static int dxDestroyShader(DXSHADER *pDXShader);
367static int dxDestroyQuery(DXQUERY *pDXQuery);
368
369static HRESULT BlitInit(D3D11BLITTER *pBlitter, ID3D11Device *pDevice, ID3D11DeviceContext *pImmediateContext);
370static void BlitRelease(D3D11BLITTER *pBlitter);
371
372
373/* This is not available with the DXVK headers for some reason. */
374#ifndef RT_OS_WINDOWS
375typedef enum D3D11_TEXTURECUBE_FACE {
376 D3D11_TEXTURECUBE_FACE_POSITIVE_X,
377 D3D11_TEXTURECUBE_FACE_NEGATIVE_X,
378 D3D11_TEXTURECUBE_FACE_POSITIVE_Y,
379 D3D11_TEXTURECUBE_FACE_NEGATIVE_Y,
380 D3D11_TEXTURECUBE_FACE_POSITIVE_Z,
381 D3D11_TEXTURECUBE_FACE_NEGATIVE_Z
382} D3D11_TEXTURECUBE_FACE;
383#endif
384
385
386DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace)
387{
388 D3D11_TEXTURECUBE_FACE Face;
389 switch (iFace)
390 {
391 case 0: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_X; break;
392 case 1: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_X; break;
393 case 2: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Y; break;
394 case 3: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Y; break;
395 case 4: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Z; break;
396 default:
397 case 5: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Z; break;
398 }
399 return Face;
400}
401
402/* This is to workaround issues with X8 formats, because they can't be used in some operations. */
403#define DX_REPLACE_X8_WITH_A8
404static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
405{
406 /* Ensure that correct headers are used.
407 * SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
408 */
409 AssertCompile(SVGA3D_AYUV == 152);
410
411#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
412 /** @todo More formats. */
413 switch (format)
414 {
415#ifdef DX_REPLACE_X8_WITH_A8
416 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
417#else
418 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
419#endif
420 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
421 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
422 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
423 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
424 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
425 case SVGA3D_Z_D32: break;
426 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
427 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
428 case SVGA3D_Z_D15S1: break;
429 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
430 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
431 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
432 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
433 case SVGA3D_DXT1: return DXGI_FORMAT_;
434 case SVGA3D_DXT2: return DXGI_FORMAT_;
435 case SVGA3D_DXT3: return DXGI_FORMAT_;
436 case SVGA3D_DXT4: return DXGI_FORMAT_;
437 case SVGA3D_DXT5: return DXGI_FORMAT_;
438 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
439 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
440 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
441 case SVGA3D_FORMAT_DEAD1: break;
442 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
443 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
444 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
445 case SVGA3D_V8U8: return DXGI_FORMAT_;
446 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
447 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
448 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
449 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
450 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
451 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
452 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
453 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
454 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
455 case SVGA3D_BUFFER: return DXGI_FORMAT_;
456 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
457 case SVGA3D_V16U16: return DXGI_FORMAT_;
458 case SVGA3D_G16R16: return DXGI_FORMAT_;
459 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
460 case SVGA3D_UYVY: return DXGI_FORMAT_;
461 case SVGA3D_YUY2: return DXGI_FORMAT_;
462 case SVGA3D_NV12: return DXGI_FORMAT_;
463 case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
464 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
465 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
466 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
467 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
468 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
469 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
470 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
471 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
472 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
473 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
474 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
475 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
476 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
477 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
478 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
479 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
480 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
481 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
482 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
483 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
484 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
485 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
486 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
487 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
488 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
489 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
490 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
491 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
492 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
493 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
494 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
495 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
496 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
497 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
498 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
499 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
500 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
501 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
502 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
503 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
504 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
505 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
506 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
507 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
508 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
509 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
510 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
511 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
512 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
513 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
514 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
515 case SVGA3D_P8: break;
516 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
517 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
518 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
519 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
520 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
521 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
522 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
523 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
524 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
525 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
526 case SVGA3D_ATI1: break;
527 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
528 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
529 case SVGA3D_ATI2: break;
530 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
531 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
532 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
533 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
534#ifdef DX_REPLACE_X8_WITH_A8
535 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
536 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
537#else
538 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
539 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
540#endif
541 case SVGA3D_Z_DF16: break;
542 case SVGA3D_Z_DF24: break;
543 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
544 case SVGA3D_YV12: break;
545 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
546 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
547 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
548 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
549 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
550 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
551 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
552 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
553 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
554 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
555 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
556 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
557 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
558 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
559 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
560 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
561 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
562 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
563 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
564 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
565#ifdef DX_REPLACE_X8_WITH_A8
566 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
567#else
568 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
569#endif
570 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
571 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
572
573 case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
574 case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_BC6H_TYPELESS;
575 case SVGA3D_BC6H_UF16: return DXGI_FORMAT_BC6H_UF16;
576 case SVGA3D_BC6H_SF16: return DXGI_FORMAT_BC6H_SF16;
577 case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_BC7_TYPELESS;
578 case SVGA3D_BC7_UNORM: return DXGI_FORMAT_BC7_UNORM;
579 case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_BC7_UNORM_SRGB;
580 case SVGA3D_AYUV: return DXGI_FORMAT_;
581
582 case SVGA3D_FORMAT_INVALID:
583 case SVGA3D_FORMAT_MAX: break;
584 }
585 // AssertFailed();
586 return DXGI_FORMAT_UNKNOWN;
587#undef DXGI_FORMAT_
588}
589
590
591static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
592{
593 switch (enmDevCap)
594 {
595 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
596 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
597 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
598 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
599 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
600 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
601 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
602 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
603 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
604 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
605 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
606 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
607 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
608 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
609 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
610 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
611 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
612 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
613 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
614 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
615 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
616 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
617 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
618 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
619 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
620 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
621 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
622 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
623 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
624 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
625 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
626 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
627 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
628 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
629 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
630 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
631 case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
632 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
633 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
634 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
635 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
636 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
637 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
638 default:
639 AssertFailed();
640 break;
641 }
642 return SVGA3D_FORMAT_INVALID;
643}
644
645
646static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
647{
648 switch (enmDevCap)
649 {
650 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
651 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
652 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
653 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
654 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
655 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
656 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
657 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
658 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
659 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
660 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
661 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
662 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
663 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
664 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
665 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
666 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
667 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
668 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
669 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
670 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
671 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
672 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
673 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
674 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
675 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
676 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
677 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
678 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
679 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
680 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
681 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
682 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
683 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
684 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
685 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
686 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
687 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
688 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
689 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
690 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
691 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
692 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
693 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
694 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
695 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
696 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
697 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
698 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
699 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
700 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
701 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
702 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
703 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
704 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
705 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
706 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
707 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
708 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
709 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
710 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
711 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
712 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
713 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
714 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
715 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
716 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
717 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
718 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
719 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
720 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
721 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
722 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
723 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
724 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
725 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
726 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
727 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
728 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
729 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
730 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
731 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
732 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
733 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
734 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
735 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
736 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
737 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
738 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
739 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
740 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
741 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
742 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
743 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
744 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
745 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
746 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
747 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
748 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
749 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
750 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
751 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
752 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
753 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
754 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
755 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
756 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
757 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
758 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
759 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
760 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
761 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
762 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
763 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
764 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
765 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
766 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
767 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
768 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
769 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
770 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
771 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
772 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
773 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
774 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
775 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
776 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
777 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
778 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
779 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
780 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
781 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
782 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
783 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
784 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
785 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
786 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
787 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
788 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
789 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
790 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
791 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
792 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
793 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
794 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
795 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
796 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
797 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
798 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
799 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
800 default:
801 AssertFailed();
802 break;
803 }
804 return SVGA3D_FORMAT_INVALID;
805}
806
807
808static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
809{
810 int rc = VINF_SUCCESS;
811
812 *pu32DevCap = 0;
813
814 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
815 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
816 {
817 RT_NOREF(pState);
818 /** @todo Implement */
819 }
820 else
821 rc = VERR_NOT_SUPPORTED;
822 return rc;
823}
824
825static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
826{
827 int rc = VINF_SUCCESS;
828
829 *pu32DevCap = 0;
830
831 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
832 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
833 {
834 ID3D11Device *pDevice = pState->pBackend->dxDevice.pDevice;
835 UINT FormatSupport = 0;
836 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
837 if (SUCCEEDED(hr))
838 {
839 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
840
841 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
842 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
843
844 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
845 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
846
847 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
848 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
849
850 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
851 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
852
853 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
854 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
855
856 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
857 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
858
859 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
860 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
861
862 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
863 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
864
865 UINT NumQualityLevels;
866 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
867 if (SUCCEEDED(hr) && NumQualityLevels != 0)
868 *pu32DevCap |= SVGA3D_DXFMT_MULTISAMPLE;
869 }
870 else
871 {
872 LogFunc(("CheckFormatSupport failed for 0x%08x, hr = 0x%08x\n", dxgiFormat, hr));
873 rc = VERR_NOT_SUPPORTED;
874 }
875 }
876 else
877 rc = VERR_NOT_SUPPORTED;
878 return rc;
879}
880
881
882static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDXDevice)
883{
884 int rc = VINF_SUCCESS;
885
886 if (pBackend->fSingleDevice && pBackend->dxDevice.pDevice)
887 {
888 pDXDevice->pDevice = pBackend->dxDevice.pDevice;
889 pDXDevice->pDevice->AddRef();
890
891 pDXDevice->pImmediateContext = pBackend->dxDevice.pImmediateContext;
892 pDXDevice->pImmediateContext->AddRef();
893
894 pDXDevice->pDxgiFactory = pBackend->dxDevice.pDxgiFactory;
895 pDXDevice->pDxgiFactory->AddRef();
896
897 pDXDevice->FeatureLevel = pBackend->dxDevice.FeatureLevel;
898
899 pDXDevice->pStagingBuffer = 0;
900 pDXDevice->cbStagingBuffer = 0;
901
902 BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
903 return rc;
904 }
905
906 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
907 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
908 {
909 D3D_FEATURE_LEVEL_11_1,
910 D3D_FEATURE_LEVEL_11_0
911 };
912 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
913#ifdef DEBUG
914 Flags |= D3D11_CREATE_DEVICE_DEBUG;
915#endif
916
917 ID3D11Device *pDevice = 0;
918 ID3D11DeviceContext *pImmediateContext = 0;
919 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
920 D3D_DRIVER_TYPE_HARDWARE,
921 NULL,
922 Flags,
923 s_aFeatureLevels,
924 RT_ELEMENTS(s_aFeatureLevels),
925 D3D11_SDK_VERSION,
926 &pDevice,
927 &pDXDevice->FeatureLevel,
928 &pImmediateContext);
929#ifdef DEBUG
930 if (FAILED(hr))
931 {
932 /* Device creation may fail because _DEBUG flag requires "D3D11 SDK Layers for Windows 10" ("Graphics Tools"):
933 * Settings/System/Apps/Optional features/Add a feature/Graphics Tools
934 * Retry without the flag.
935 */
936 Flags &= ~D3D11_CREATE_DEVICE_DEBUG;
937 hr = pBackend->pfnD3D11CreateDevice(pAdapter,
938 D3D_DRIVER_TYPE_HARDWARE,
939 NULL,
940 Flags,
941 s_aFeatureLevels,
942 RT_ELEMENTS(s_aFeatureLevels),
943 D3D11_SDK_VERSION,
944 &pDevice,
945 &pDXDevice->FeatureLevel,
946 &pImmediateContext);
947 }
948#endif
949
950 if (SUCCEEDED(hr))
951 {
952 LogRel(("VMSVGA: Feature level %#x\n", pDXDevice->FeatureLevel));
953
954 hr = pDevice->QueryInterface(__uuidof(ID3D11Device1), (void**)&pDXDevice->pDevice);
955 AssertReturnStmt(SUCCEEDED(hr),
956 D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDevice),
957 VERR_NOT_SUPPORTED);
958
959 hr = pImmediateContext->QueryInterface(__uuidof(ID3D11DeviceContext1), (void**)&pDXDevice->pImmediateContext);
960 AssertReturnStmt(SUCCEEDED(hr),
961 D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDXDevice->pDevice); D3D_RELEASE(pDevice),
962 VERR_NOT_SUPPORTED);
963
964#ifdef DEBUG
965 /* Break into debugger when DX runtime detects anything unusual. */
966 HRESULT hr2;
967 ID3D11Debug *pDebug = 0;
968 hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
969 if (SUCCEEDED(hr2))
970 {
971 ID3D11InfoQueue *pInfoQueue = 0;
972 hr2 = pDebug->QueryInterface(__uuidof(ID3D11InfoQueue), (void**)&pInfoQueue);
973 if (SUCCEEDED(hr2))
974 {
975 pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_CORRUPTION, true);
976// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_ERROR, true);
977// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_WARNING, true);
978
979 /* No breakpoints for the following messages. */
980 D3D11_MESSAGE_ID saIgnoredMessageIds[] =
981 {
982 /* Message ID: Caused by: */
983 D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_TYPE_MISMATCH, /* Autogenerated input signatures. */
984 D3D11_MESSAGE_ID_LIVE_DEVICE, /* Live object report. Does not seem to prevent a breakpoint. */
985 (D3D11_MESSAGE_ID)3146081 /*DEVICE_DRAW_RENDERTARGETVIEW_NOT_SET*/, /* U. */
986 D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_NOT_SET, /* U. */
987 D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_MISMATCH, /* U. */
988 D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_EMPTY_LAYOUT, /* P. */
989 D3D11_MESSAGE_ID_DEVICE_SHADER_LINKAGE_REGISTERMASK, /* S. */
990 };
991
992 D3D11_INFO_QUEUE_FILTER filter;
993 RT_ZERO(filter);
994 filter.DenyList.NumIDs = RT_ELEMENTS(saIgnoredMessageIds);
995 filter.DenyList.pIDList = saIgnoredMessageIds;
996 pInfoQueue->AddStorageFilterEntries(&filter);
997
998 D3D_RELEASE(pInfoQueue);
999 }
1000 D3D_RELEASE(pDebug);
1001 }
1002#endif
1003
1004 IDXGIDevice *pDxgiDevice = 0;
1005 hr = pDXDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
1006 if (SUCCEEDED(hr))
1007 {
1008 IDXGIAdapter *pDxgiAdapter = 0;
1009 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
1010 if (SUCCEEDED(hr))
1011 {
1012 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDXDevice->pDxgiFactory);
1013 D3D_RELEASE(pDxgiAdapter);
1014 }
1015
1016 D3D_RELEASE(pDxgiDevice);
1017 }
1018 }
1019
1020 if (SUCCEEDED(hr))
1021 BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
1022 else
1023 rc = VERR_NOT_SUPPORTED;
1024
1025 return rc;
1026}
1027
1028
1029static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
1030{
1031 RT_NOREF(pBackend);
1032
1033 BlitRelease(&pDevice->Blitter);
1034
1035 D3D_RELEASE(pDevice->pStagingBuffer);
1036
1037 D3D_RELEASE(pDevice->pDxgiFactory);
1038 D3D_RELEASE(pDevice->pImmediateContext);
1039
1040#ifdef DEBUG
1041 HRESULT hr2;
1042 ID3D11Debug *pDebug = 0;
1043 hr2 = pDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1044 if (SUCCEEDED(hr2))
1045 {
1046 /// @todo Use this to see whether all resources have been properly released.
1047 //DEBUG_BREAKPOINT_TEST();
1048 //pDebug->ReportLiveDeviceObjects(D3D11_RLDO_DETAIL | (D3D11_RLDO_FLAGS)0x4 /*D3D11_RLDO_IGNORE_INTERNAL*/);
1049 D3D_RELEASE(pDebug);
1050 }
1051#endif
1052
1053 D3D_RELEASE(pDevice->pDevice);
1054 RT_ZERO(*pDevice);
1055}
1056
1057
1058static void dxViewAddToList(PVGASTATECC pThisCC, DXVIEW *pDXView)
1059{
1060 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1061 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1062
1063 Assert(pDXView->u.pView); /* Only already created views should be added. Guard against mis-use by callers. */
1064
1065 PVMSVGA3DSURFACE pSurface;
1066 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDXView->sid, &pSurface);
1067 AssertRCReturnVoid(rc);
1068
1069 RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1070}
1071
1072
1073static void dxViewRemoveFromList(DXVIEW *pDXView)
1074{
1075 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1076 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1077 /* pView can be NULL, if COT entry is already empty. */
1078 if (pDXView->u.pView)
1079 {
1080 Assert(pDXView->nodeSurfaceView.pNext && pDXView->nodeSurfaceView.pPrev);
1081 RTListNodeRemove(&pDXView->nodeSurfaceView);
1082 }
1083}
1084
1085
1086static int dxViewDestroy(DXVIEW *pDXView)
1087{
1088 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1089 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1090 if (pDXView->u.pView)
1091 {
1092 D3D_RELEASE(pDXView->u.pView);
1093 RTListNodeRemove(&pDXView->nodeSurfaceView);
1094 RT_ZERO(*pDXView);
1095 }
1096
1097 return VINF_SUCCESS;
1098}
1099
1100
1101static int dxViewInit(DXVIEW *pDXView, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT *pDXContext, uint32_t viewId, VMSVGA3DBACKVIEWTYPE enmViewType, ID3D11View *pView)
1102{
1103 pDXView->cid = pDXContext->cid;
1104 pDXView->sid = pSurface->id;
1105 pDXView->viewId = viewId;
1106 pDXView->enmViewType = enmViewType;
1107 pDXView->u.pView = pView;
1108 RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1109
1110 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1111 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1112
1113DXVIEW *pIter, *pNext;
1114RTListForEachSafe(&pSurface->pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
1115{
1116 AssertPtr(pNext);
1117 LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
1118}
1119
1120 return VINF_SUCCESS;
1121}
1122
1123
1124DECLINLINE(bool) dxIsSurfaceShareable(PVMSVGA3DSURFACE pSurface)
1125{
1126 /* It is not expected that volume textures will be shared between contexts. */
1127 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_VOLUME)
1128 return false;
1129
1130 return (pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
1131 || (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET);
1132}
1133
1134
1135static DXDEVICE *dxDeviceFromCid(uint32_t cid, PVMSVGA3DSTATE pState)
1136{
1137 if (cid != DX_CID_BACKEND)
1138 {
1139 if (pState->pBackend->fSingleDevice)
1140 return &pState->pBackend->dxDevice;
1141
1142 VMSVGA3DDXCONTEXT *pDXContext;
1143 int rc = vmsvga3dDXContextFromCid(pState, cid, &pDXContext);
1144 if (RT_SUCCESS(rc))
1145 return &pDXContext->pBackendDXContext->dxDevice;
1146 }
1147 else
1148 return &pState->pBackend->dxDevice;
1149
1150 AssertFailed();
1151 return NULL;
1152}
1153
1154
1155static DXDEVICE *dxDeviceFromContext(PVMSVGA3DSTATE p3dState, VMSVGA3DDXCONTEXT *pDXContext)
1156{
1157 if (pDXContext && !p3dState->pBackend->fSingleDevice)
1158 return &pDXContext->pBackendDXContext->dxDevice;
1159
1160 return &p3dState->pBackend->dxDevice;
1161}
1162
1163
1164static int dxDeviceFlush(DXDEVICE *pDevice)
1165{
1166 /** @todo Should the flush follow the query submission? */
1167 pDevice->pImmediateContext->Flush();
1168
1169 ID3D11Query *pQuery = 0;
1170 D3D11_QUERY_DESC qd;
1171 RT_ZERO(qd);
1172 qd.Query = D3D11_QUERY_EVENT;
1173
1174 HRESULT hr = pDevice->pDevice->CreateQuery(&qd, &pQuery);
1175 Assert(hr == S_OK); RT_NOREF(hr);
1176 pDevice->pImmediateContext->End(pQuery);
1177
1178 BOOL queryData;
1179 while (pDevice->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
1180 RTThreadYield();
1181
1182 D3D_RELEASE(pQuery);
1183
1184 return VINF_SUCCESS;
1185}
1186
1187
1188static int dxContextWait(uint32_t cidDrawing, PVMSVGA3DSTATE pState)
1189{
1190 if (pState->pBackend->fSingleDevice)
1191 return VINF_SUCCESS;
1192
1193 /* Flush cidDrawing context and issue a query. */
1194 DXDEVICE *pDXDevice = dxDeviceFromCid(cidDrawing, pState);
1195 if (pDXDevice)
1196 return dxDeviceFlush(pDXDevice);
1197 /* cidDrawing does not exist anymore. */
1198 return VINF_SUCCESS;
1199}
1200
1201
1202static int dxSurfaceWait(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface, uint32_t cidRequesting)
1203{
1204 if (pState->pBackend->fSingleDevice)
1205 return VINF_SUCCESS;
1206
1207 VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
1208 if (!pBackendSurface)
1209 AssertFailedReturn(VERR_INVALID_STATE);
1210
1211 int rc = VINF_SUCCESS;
1212 if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
1213 {
1214 if (pBackendSurface->cidDrawing != cidRequesting)
1215 {
1216 LogFunc(("sid = %u, assoc cid = %u, drawing cid = %u, req cid = %u\n",
1217 pSurface->id, pSurface->idAssociatedContext, pBackendSurface->cidDrawing, cidRequesting));
1218 Assert(dxIsSurfaceShareable(pSurface));
1219 rc = dxContextWait(pBackendSurface->cidDrawing, pState);
1220 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
1221 }
1222 }
1223 return rc;
1224}
1225
1226
1227static ID3D11Resource *dxResource(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT *pDXContext)
1228{
1229 VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
1230 if (!pBackendSurface)
1231 AssertFailedReturn(NULL);
1232
1233 ID3D11Resource *pResource;
1234
1235 uint32_t const cidRequesting = pDXContext ? pDXContext->cid : DX_CID_BACKEND;
1236 if (cidRequesting == pSurface->idAssociatedContext || pState->pBackend->fSingleDevice)
1237 pResource = pBackendSurface->u.pResource;
1238 else
1239 {
1240 /*
1241 * Context, which as not created the surface, is requesting.
1242 */
1243 AssertReturn(pDXContext, NULL);
1244
1245 Assert(dxIsSurfaceShareable(pSurface));
1246 Assert(pSurface->idAssociatedContext == DX_CID_BACKEND);
1247
1248 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pBackendSurface->SharedTextureTree, pDXContext->cid);
1249 if (!pSharedTexture)
1250 {
1251 DXDEVICE *pDevice = dxDeviceFromContext(pState, pDXContext);
1252 AssertReturn(pDevice->pDevice, NULL);
1253
1254 AssertReturn(pBackendSurface->SharedHandle, NULL);
1255
1256 /* This context has not yet opened the texture. */
1257 pSharedTexture = (DXSHAREDTEXTURE *)RTMemAllocZ(sizeof(DXSHAREDTEXTURE));
1258 AssertReturn(pSharedTexture, NULL);
1259
1260 pSharedTexture->Core.Key = pDXContext->cid;
1261 bool const fSuccess = RTAvlU32Insert(&pBackendSurface->SharedTextureTree, &pSharedTexture->Core);
1262 AssertReturn(fSuccess, NULL);
1263
1264 HRESULT hr = pDevice->pDevice->OpenSharedResource(pBackendSurface->SharedHandle, __uuidof(ID3D11Texture2D), (void**)&pSharedTexture->pTexture);
1265 Assert(SUCCEEDED(hr));
1266 if (SUCCEEDED(hr))
1267 pSharedTexture->sid = pSurface->id;
1268 else
1269 {
1270 RTAvlU32Remove(&pBackendSurface->SharedTextureTree, pDXContext->cid);
1271 RTMemFree(pSharedTexture);
1272 return NULL;
1273 }
1274 }
1275
1276 pResource = pSharedTexture->pTexture;
1277 }
1278
1279 /* Wait for drawing to finish. */
1280 dxSurfaceWait(pState, pSurface, cidRequesting);
1281
1282 return pResource;
1283}
1284
1285
1286static uint32_t dxGetRenderTargetViewSid(PVMSVGA3DDXCONTEXT pDXContext, uint32_t renderTargetViewId)
1287{
1288 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, SVGA_ID_INVALID);
1289
1290 SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1291 return pRTViewEntry->sid;
1292}
1293
1294
1295static SVGACOTableDXSRViewEntry const *dxGetShaderResourceViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t shaderResourceViewId)
1296{
1297 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, NULL);
1298
1299 SVGACOTableDXSRViewEntry const *pSRViewEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1300 return pSRViewEntry;
1301}
1302
1303
1304static SVGACOTableDXUAViewEntry const *dxGetUnorderedAccessViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t uaViewId)
1305{
1306 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, NULL);
1307
1308 SVGACOTableDXUAViewEntry const *pUAViewEntry = &pDXContext->cot.paUAView[uaViewId];
1309 return pUAViewEntry;
1310}
1311
1312
1313static SVGACOTableDXDSViewEntry const *dxGetDepthStencilViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t depthStencilViewId)
1314{
1315 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, NULL);
1316
1317 SVGACOTableDXDSViewEntry const *pDSViewEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1318 return pDSViewEntry;
1319}
1320
1321
1322static SVGACOTableDXRTViewEntry const *dxGetRenderTargetViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t renderTargetViewId)
1323{
1324 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, NULL);
1325
1326 SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1327 return pRTViewEntry;
1328}
1329
1330
1331static int dxTrackRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
1332{
1333 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1334 AssertReturn(pState, VERR_INVALID_STATE);
1335
1336 for (unsigned long i = 0; i < RT_ELEMENTS(pDXContext->svgaDXContext.renderState.renderTargetViewIds); ++i)
1337 {
1338 uint32_t const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
1339 if (renderTargetViewId == SVGA_ID_INVALID)
1340 continue;
1341
1342 uint32_t const sid = dxGetRenderTargetViewSid(pDXContext, renderTargetViewId);
1343 LogFunc(("[%u] sid = %u, drawing cid = %u\n", i, sid, pDXContext->cid));
1344
1345 PVMSVGA3DSURFACE pSurface;
1346 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1347 if (RT_SUCCESS(rc))
1348 {
1349 AssertContinue(pSurface->pBackendSurface);
1350 pSurface->pBackendSurface->cidDrawing = pDXContext->cid;
1351 }
1352 }
1353 return VINF_SUCCESS;
1354}
1355
1356
1357static int dxDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry, DXSHADER *pDXShader)
1358{
1359 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1360 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1361
1362 /* Make D3D11_SO_DECLARATION_ENTRY array from SVGA3dStreamOutputDeclarationEntry. */
1363 SVGA3dStreamOutputDeclarationEntry const *paDecls;
1364 PVMSVGAMOB pMob = NULL;
1365 if (pEntry->usesMob)
1366 {
1367 pMob = vmsvgaR3MobGet(pSvgaR3State, pEntry->mobid);
1368 ASSERT_GUEST_RETURN(pMob, VERR_INVALID_PARAMETER);
1369
1370 /* Create a memory pointer for the MOB, which is accessible by host. */
1371 int rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1372 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1373
1374 /* Get pointer to the shader bytecode. This will also verify the offset. */
1375 paDecls = (SVGA3dStreamOutputDeclarationEntry const *)vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1376 AssertReturnStmt(paDecls, vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob), VERR_INTERNAL_ERROR);
1377 }
1378 else
1379 paDecls = &pEntry->decl[0];
1380
1381 pDXStreamOutput->cDeclarationEntry = pEntry->numOutputStreamEntries;
1382 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1383 {
1384 D3D11_SO_DECLARATION_ENTRY *pDst = &pDXStreamOutput->aDeclarationEntry[i];
1385 SVGA3dStreamOutputDeclarationEntry const *pSrc = &paDecls[i];
1386
1387 uint32_t const registerMask = pSrc->registerMask & 0xF;
1388 unsigned const iFirstBit = ASMBitFirstSetU32(registerMask);
1389 unsigned const iLastBit = ASMBitLastSetU32(registerMask);
1390
1391 pDst->Stream = pSrc->stream;
1392 pDst->SemanticName = NULL; /* Semantic name and index will be taken from the shader output declaration. */
1393 pDst->SemanticIndex = 0;
1394 pDst->StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;
1395 pDst->ComponentCount = iFirstBit > 0 ? iLastBit - (iFirstBit - 1) : 0;
1396 pDst->OutputSlot = pSrc->outputSlot;
1397 }
1398
1399 uint32_t MaxSemanticIndex = 0;
1400 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1401 {
1402 D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1403 SVGA3dStreamOutputDeclarationEntry const *decl = &paDecls[i];
1404
1405 /* Find the corresponding register and mask in the GS shader output. */
1406 int idxFound = -1;
1407 for (uint32_t iOutputEntry = 0; iOutputEntry < pDXShader->shaderInfo.cOutputSignature; ++iOutputEntry)
1408 {
1409 SVGA3dDXSignatureEntry const *pOutputEntry = &pDXShader->shaderInfo.aOutputSignature[iOutputEntry];
1410 if ( pOutputEntry->registerIndex == decl->registerIndex
1411 && (decl->registerMask & ~pOutputEntry->mask) == 0) /* SO decl mask is a subset of shader output mask. */
1412 {
1413 idxFound = iOutputEntry;
1414 break;
1415 }
1416 }
1417
1418 if (idxFound >= 0)
1419 {
1420 DXShaderAttributeSemantic const *pOutputSemantic = &pDXShader->shaderInfo.aOutputSemantic[idxFound];
1421 pDeclarationEntry->SemanticName = pOutputSemantic->pcszSemanticName;
1422 pDeclarationEntry->SemanticIndex = pOutputSemantic->SemanticIndex;
1423 MaxSemanticIndex = RT_MAX(MaxSemanticIndex, pOutputSemantic->SemanticIndex);
1424 }
1425 else
1426 AssertFailed();
1427 }
1428
1429 /* A geometry shader may return components of the same register as different attributes:
1430 *
1431 * Output signature
1432 * Name Index Mask Register
1433 * ATTRIB 2 xy 2
1434 * ATTRIB 3 z 2
1435 *
1436 * For ATTRIB 3 the stream output declaration expects StartComponent = 0 and ComponentCount = 1
1437 * (not StartComponent = 2 and ComponentCount = 1):
1438 *
1439 * Stream output declaration
1440 * SemanticName SemanticIndex StartComponent ComponentCount
1441 * ATTRIB 2 0 2
1442 * ATTRIB 3 0 1
1443 *
1444 * Stream output declaration can have multiple entries for the same attribute.
1445 * In this case StartComponent is the offset within the attribute.
1446 *
1447 * Output signature
1448 * Name Index Mask Register
1449 * ATTRIB 0 xyzw 0
1450 *
1451 * Stream output declaration
1452 * SemanticName SemanticIndex StartComponent ComponentCount
1453 * ATTRIB 0 0 1
1454 * ATTRIB 0 1 1
1455 *
1456 * StartComponent has been computed as the component offset in a register:
1457 * 'StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;'.
1458 *
1459 * StartComponent must be the offset in an attribute.
1460 */
1461 for (uint32_t SemanticIndex = 0; SemanticIndex <= MaxSemanticIndex; ++SemanticIndex)
1462 {
1463 /* Find minimum StartComponent value for this attribute. */
1464 uint32_t MinStartComponent = UINT32_MAX;
1465 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1466 {
1467 D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1468 if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1469 MinStartComponent = RT_MIN(MinStartComponent, pDeclarationEntry->StartComponent);
1470 }
1471
1472 AssertContinue(MinStartComponent != UINT32_MAX);
1473
1474 /* Adjust the StartComponent to start from 0 for this attribute. */
1475 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1476 {
1477 D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1478 if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1479 pDeclarationEntry->StartComponent -= MinStartComponent;
1480 }
1481 }
1482
1483 if (pMob)
1484 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1485
1486 return VINF_SUCCESS;
1487}
1488
1489static void dxDestroyStreamOutput(DXSTREAMOUTPUT *pDXStreamOutput)
1490{
1491 RT_ZERO(*pDXStreamOutput);
1492}
1493
1494static D3D11_BLEND dxBlendFactorAlpha(uint8_t svgaBlend)
1495{
1496 /* "Blend options that end in _COLOR are not allowed." but the guest sometimes sends them. */
1497 switch (svgaBlend)
1498 {
1499 case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1500 case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1501 case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_ALPHA;
1502 case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_ALPHA;
1503 case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1504 case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1505 case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1506 case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1507 case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_ALPHA;
1508 case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_ALPHA;
1509 case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1510 case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1511 case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1512 case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_ALPHA;
1513 case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_ALPHA;
1514 case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1515 case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1516 case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1517 case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1518 default:
1519 break;
1520 }
1521 return D3D11_BLEND_ZERO;
1522}
1523
1524
1525static D3D11_BLEND dxBlendFactorColor(uint8_t svgaBlend)
1526{
1527 switch (svgaBlend)
1528 {
1529 case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1530 case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1531 case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_COLOR;
1532 case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_COLOR;
1533 case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1534 case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1535 case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1536 case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1537 case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_COLOR;
1538 case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_COLOR;
1539 case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1540 case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1541 case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1542 case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_COLOR;
1543 case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_COLOR;
1544 case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1545 case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1546 case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1547 case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1548 default:
1549 break;
1550 }
1551 return D3D11_BLEND_ZERO;
1552}
1553
1554
1555static D3D11_BLEND_OP dxBlendOp(uint8_t svgaBlendEq)
1556{
1557 return (D3D11_BLEND_OP)svgaBlendEq;
1558}
1559
1560
1561/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
1562static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState **pp)
1563{
1564 D3D11_BLEND_DESC BlendDesc;
1565 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
1566 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
1567 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
1568 {
1569 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
1570 BlendDesc.RenderTarget[i].SrcBlend = dxBlendFactorColor(pEntry->perRT[i].srcBlend);
1571 BlendDesc.RenderTarget[i].DestBlend = dxBlendFactorColor(pEntry->perRT[i].destBlend);
1572 BlendDesc.RenderTarget[i].BlendOp = dxBlendOp (pEntry->perRT[i].blendOp);
1573 BlendDesc.RenderTarget[i].SrcBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].srcBlendAlpha);
1574 BlendDesc.RenderTarget[i].DestBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].destBlendAlpha);
1575 BlendDesc.RenderTarget[i].BlendOpAlpha = dxBlendOp (pEntry->perRT[i].blendOpAlpha);
1576 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
1577 /** @todo logicOpEnable and logicOp */
1578 }
1579
1580 HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
1581 Assert(SUCCEEDED(hr));
1582 return hr;
1583}
1584
1585
1586static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp)
1587{
1588 D3D11_DEPTH_STENCIL_DESC desc;
1589 desc.DepthEnable = pEntry->depthEnable;
1590 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
1591 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
1592 desc.StencilEnable = pEntry->stencilEnable;
1593 desc.StencilReadMask = pEntry->stencilReadMask;
1594 desc.StencilWriteMask = pEntry->stencilWriteMask;
1595 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
1596 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
1597 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
1598 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
1599 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
1600 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
1601 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
1602 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
1603 /** @todo frontEnable, backEnable */
1604
1605 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
1606 Assert(SUCCEEDED(hr));
1607 return hr;
1608}
1609
1610
1611static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp)
1612{
1613 D3D11_SAMPLER_DESC desc;
1614 /* Guest sometimes sends inconsistent (from D3D11 point of view) set of filter flags. */
1615 if (pEntry->filter & SVGA3D_FILTER_ANISOTROPIC)
1616 desc.Filter = (pEntry->filter & SVGA3D_FILTER_COMPARE)
1617 ? D3D11_FILTER_COMPARISON_ANISOTROPIC
1618 : D3D11_FILTER_ANISOTROPIC;
1619 else
1620 desc.Filter = (D3D11_FILTER)pEntry->filter;
1621 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
1622 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
1623 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
1624 desc.MipLODBias = pEntry->mipLODBias;
1625 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
1626 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
1627 desc.BorderColor[0] = pEntry->borderColor.value[0];
1628 desc.BorderColor[1] = pEntry->borderColor.value[1];
1629 desc.BorderColor[2] = pEntry->borderColor.value[2];
1630 desc.BorderColor[3] = pEntry->borderColor.value[3];
1631 desc.MinLOD = pEntry->minLOD;
1632 desc.MaxLOD = pEntry->maxLOD;
1633
1634 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
1635 Assert(SUCCEEDED(hr));
1636 return hr;
1637}
1638
1639
1640static D3D11_FILL_MODE dxFillMode(uint8_t svgaFillMode)
1641{
1642 if (svgaFillMode == SVGA3D_FILLMODE_POINT)
1643 return D3D11_FILL_WIREFRAME;
1644 return (D3D11_FILL_MODE)svgaFillMode;
1645}
1646
1647
1648static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState **pp)
1649{
1650 D3D11_RASTERIZER_DESC desc;
1651 desc.FillMode = dxFillMode(pEntry->fillMode);
1652 desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
1653 desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
1654 /** @todo provokingVertexLast */
1655 desc.DepthBias = pEntry->depthBias;
1656 desc.DepthBiasClamp = pEntry->depthBiasClamp;
1657 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
1658 desc.DepthClipEnable = pEntry->depthClipEnable;
1659 desc.ScissorEnable = pEntry->scissorEnable;
1660 desc.MultisampleEnable = pEntry->multisampleEnable;
1661 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
1662 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
1663
1664 HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
1665 Assert(SUCCEEDED(hr));
1666 return hr;
1667}
1668
1669
1670static HRESULT dxRenderTargetViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11RenderTargetView **pp)
1671{
1672 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1673
1674 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1675
1676 D3D11_RENDER_TARGET_VIEW_DESC desc;
1677 RT_ZERO(desc);
1678 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1679 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
1680 switch (pEntry->resourceDimension)
1681 {
1682 case SVGA3D_RESOURCE_BUFFER:
1683 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1684 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1685 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1686 break;
1687 case SVGA3D_RESOURCE_TEXTURE1D:
1688 if (pSurface->surfaceDesc.numArrayElements <= 1)
1689 {
1690 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
1691 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1692 }
1693 else
1694 {
1695 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
1696 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1697 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1698 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1699 }
1700 break;
1701 case SVGA3D_RESOURCE_TEXTURE2D:
1702 if (pSurface->surfaceDesc.numArrayElements <= 1)
1703 {
1704 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
1705 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1706 }
1707 else
1708 {
1709 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1710 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1711 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1712 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1713 }
1714 break;
1715 case SVGA3D_RESOURCE_TEXTURE3D:
1716 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
1717 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1718 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1719 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1720 break;
1721 case SVGA3D_RESOURCE_TEXTURECUBE:
1722 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1723 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1724 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1725 desc.Texture2DArray.FirstArraySlice = 0;
1726 desc.Texture2DArray.ArraySize = 6;
1727 break;
1728 case SVGA3D_RESOURCE_BUFFEREX:
1729 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1730 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1731 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1732 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1733 break;
1734 default:
1735 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1736 }
1737
1738 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
1739 Assert(SUCCEEDED(hr));
1740 return hr;
1741}
1742
1743
1744static HRESULT dxShaderResourceViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11ShaderResourceView **pp)
1745{
1746 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1747
1748 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1749
1750 D3D11_SHADER_RESOURCE_VIEW_DESC desc;
1751 RT_ZERO(desc);
1752 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1753 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
1754
1755 switch (pEntry->resourceDimension)
1756 {
1757 case SVGA3D_RESOURCE_BUFFER:
1758 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
1759 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1760 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1761 break;
1762 case SVGA3D_RESOURCE_TEXTURE1D:
1763 if (pSurface->surfaceDesc.numArrayElements <= 1)
1764 {
1765 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
1766 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1767 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
1768 }
1769 else
1770 {
1771 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
1772 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1773 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
1774 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1775 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1776 }
1777 break;
1778 case SVGA3D_RESOURCE_TEXTURE2D:
1779 if (pSurface->surfaceDesc.numArrayElements <= 1)
1780 {
1781 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
1782 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1783 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
1784 }
1785 else
1786 {
1787 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
1788 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1789 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
1790 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1791 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1792 }
1793 break;
1794 case SVGA3D_RESOURCE_TEXTURE3D:
1795 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
1796 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1797 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
1798 break;
1799 case SVGA3D_RESOURCE_TEXTURECUBE:
1800 if (pSurface->surfaceDesc.numArrayElements <= 6)
1801 {
1802 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
1803 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1804 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
1805 }
1806 else
1807 {
1808 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBEARRAY;
1809 desc.TextureCubeArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1810 desc.TextureCubeArray.MipLevels = pEntry->desc.tex.mipLevels;
1811 desc.TextureCubeArray.First2DArrayFace = pEntry->desc.tex.firstArraySlice;
1812 desc.TextureCubeArray.NumCubes = pEntry->desc.tex.arraySize / 6;
1813 }
1814 break;
1815 case SVGA3D_RESOURCE_BUFFEREX:
1816 AssertFailed(); /** @todo test. */
1817 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
1818 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
1819 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
1820 desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
1821 break;
1822 default:
1823 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1824 }
1825
1826 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
1827 Assert(SUCCEEDED(hr));
1828 return hr;
1829}
1830
1831
1832static HRESULT dxUnorderedAccessViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXUAViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11UnorderedAccessView **pp)
1833{
1834 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1835
1836 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1837
1838 D3D11_UNORDERED_ACCESS_VIEW_DESC desc;
1839 RT_ZERO(desc);
1840 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1841 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
1842
1843 switch (pEntry->resourceDimension)
1844 {
1845 case SVGA3D_RESOURCE_BUFFER:
1846 desc.ViewDimension = D3D11_UAV_DIMENSION_BUFFER;
1847 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1848 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1849 desc.Buffer.Flags = pEntry->desc.buffer.flags;
1850 break;
1851 case SVGA3D_RESOURCE_TEXTURE1D:
1852 if (pSurface->surfaceDesc.numArrayElements <= 1)
1853 {
1854 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1D;
1855 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1856 }
1857 else
1858 {
1859 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1DARRAY;
1860 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1861 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1862 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1863 }
1864 break;
1865 case SVGA3D_RESOURCE_TEXTURE2D:
1866 if (pSurface->surfaceDesc.numArrayElements <= 1)
1867 {
1868 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2D;
1869 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1870 }
1871 else
1872 {
1873 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2DARRAY;
1874 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1875 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1876 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1877 }
1878 break;
1879 case SVGA3D_RESOURCE_TEXTURE3D:
1880 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1881 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1882 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1883 break;
1884 default:
1885 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1886 }
1887
1888 HRESULT hr = pDevice->pDevice->CreateUnorderedAccessView(pResource, &desc, pp);
1889 Assert(SUCCEEDED(hr));
1890 return hr;
1891}
1892
1893
1894static HRESULT dxDepthStencilViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXDSViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11DepthStencilView **pp)
1895{
1896 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1897
1898 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1899
1900 D3D11_DEPTH_STENCIL_VIEW_DESC desc;
1901 RT_ZERO(desc);
1902 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1903 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
1904 desc.Flags = pEntry->flags;
1905 switch (pEntry->resourceDimension)
1906 {
1907 case SVGA3D_RESOURCE_TEXTURE1D:
1908 if (pSurface->surfaceDesc.numArrayElements <= 1)
1909 {
1910 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
1911 desc.Texture1D.MipSlice = pEntry->mipSlice;
1912 }
1913 else
1914 {
1915 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
1916 desc.Texture1DArray.MipSlice = pEntry->mipSlice;
1917 desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
1918 desc.Texture1DArray.ArraySize = pEntry->arraySize;
1919 }
1920 break;
1921 case SVGA3D_RESOURCE_TEXTURE2D:
1922 if (pSurface->surfaceDesc.numArrayElements <= 1)
1923 {
1924 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2D;
1925 desc.Texture2D.MipSlice = pEntry->mipSlice;
1926 }
1927 else
1928 {
1929 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
1930 desc.Texture2DArray.MipSlice = pEntry->mipSlice;
1931 desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
1932 desc.Texture2DArray.ArraySize = pEntry->arraySize;
1933 }
1934 break;
1935 default:
1936 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1937 }
1938
1939 HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
1940 Assert(SUCCEEDED(hr));
1941 return hr;
1942}
1943
1944
1945static HRESULT dxShaderCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
1946{
1947 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1948
1949 HRESULT hr = S_OK;
1950
1951 switch (pDXShader->enmShaderType)
1952 {
1953 case SVGA3D_SHADERTYPE_VS:
1954 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
1955 Assert(SUCCEEDED(hr));
1956 break;
1957 case SVGA3D_SHADERTYPE_PS:
1958 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
1959 Assert(SUCCEEDED(hr));
1960 break;
1961 case SVGA3D_SHADERTYPE_GS:
1962 {
1963 SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
1964 if (soid == SVGA_ID_INVALID)
1965 {
1966 hr = pDevice->pDevice->CreateGeometryShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pGeometryShader);
1967 Assert(SUCCEEDED(hr));
1968 }
1969 else
1970 {
1971 ASSERT_GUEST_RETURN(soid < pDXContext->pBackendDXContext->cStreamOutput, E_INVALIDARG);
1972
1973 SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[soid];
1974 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1975
1976 hr = pDevice->pDevice->CreateGeometryShaderWithStreamOutput(pDXShader->pvDXBC, pDXShader->cbDXBC,
1977 pDXStreamOutput->aDeclarationEntry, pDXStreamOutput->cDeclarationEntry,
1978 pEntry->numOutputStreamStrides ? pEntry->streamOutputStrideInBytes : NULL, pEntry->numOutputStreamStrides,
1979 pEntry->rasterizedStream,
1980 /*pClassLinkage=*/ NULL, &pDXShader->pGeometryShader);
1981 AssertBreak(SUCCEEDED(hr));
1982
1983 pDXShader->soid = soid;
1984 }
1985 break;
1986 }
1987 case SVGA3D_SHADERTYPE_HS:
1988 hr = pDevice->pDevice->CreateHullShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pHullShader);
1989 Assert(SUCCEEDED(hr));
1990 break;
1991 case SVGA3D_SHADERTYPE_DS:
1992 hr = pDevice->pDevice->CreateDomainShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pDomainShader);
1993 Assert(SUCCEEDED(hr));
1994 break;
1995 case SVGA3D_SHADERTYPE_CS:
1996 hr = pDevice->pDevice->CreateComputeShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pComputeShader);
1997 Assert(SUCCEEDED(hr));
1998 break;
1999 default:
2000 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2001 }
2002
2003 return hr;
2004}
2005
2006
2007static void dxShaderSet(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, DXSHADER *pDXShader)
2008{
2009 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2010
2011 switch (type)
2012 {
2013 case SVGA3D_SHADERTYPE_VS:
2014 pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
2015 break;
2016 case SVGA3D_SHADERTYPE_PS:
2017 pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
2018 break;
2019 case SVGA3D_SHADERTYPE_GS:
2020 {
2021 Assert(!pDXShader || (pDXShader->soid == pDXContext->svgaDXContext.streamOut.soid));
2022 pDevice->pImmediateContext->GSSetShader(pDXShader ? pDXShader->pGeometryShader : NULL, NULL, 0);
2023 } break;
2024 case SVGA3D_SHADERTYPE_HS:
2025 pDevice->pImmediateContext->HSSetShader(pDXShader ? pDXShader->pHullShader : NULL, NULL, 0);
2026 break;
2027 case SVGA3D_SHADERTYPE_DS:
2028 pDevice->pImmediateContext->DSSetShader(pDXShader ? pDXShader->pDomainShader : NULL, NULL, 0);
2029 break;
2030 case SVGA3D_SHADERTYPE_CS:
2031 pDevice->pImmediateContext->CSSetShader(pDXShader ? pDXShader->pComputeShader : NULL, NULL, 0);
2032 break;
2033 default:
2034 ASSERT_GUEST_FAILED_RETURN_VOID();
2035 }
2036}
2037
2038
2039static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer)
2040{
2041 switch (type)
2042 {
2043 case SVGA3D_SHADERTYPE_VS:
2044 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
2045 break;
2046 case SVGA3D_SHADERTYPE_PS:
2047 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
2048 break;
2049 case SVGA3D_SHADERTYPE_GS:
2050 pDevice->pImmediateContext->GSSetConstantBuffers(slot, 1, &pConstantBuffer);
2051 break;
2052 case SVGA3D_SHADERTYPE_HS:
2053 pDevice->pImmediateContext->HSSetConstantBuffers(slot, 1, &pConstantBuffer);
2054 break;
2055 case SVGA3D_SHADERTYPE_DS:
2056 pDevice->pImmediateContext->DSSetConstantBuffers(slot, 1, &pConstantBuffer);
2057 break;
2058 case SVGA3D_SHADERTYPE_CS:
2059 pDevice->pImmediateContext->CSSetConstantBuffers(slot, 1, &pConstantBuffer);
2060 break;
2061 default:
2062 ASSERT_GUEST_FAILED_RETURN_VOID();
2063 }
2064}
2065
2066
2067static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler)
2068{
2069 switch (type)
2070 {
2071 case SVGA3D_SHADERTYPE_VS:
2072 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
2073 break;
2074 case SVGA3D_SHADERTYPE_PS:
2075 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
2076 break;
2077 case SVGA3D_SHADERTYPE_GS:
2078 pDevice->pImmediateContext->GSSetSamplers(startSampler, cSampler, papSampler);
2079 break;
2080 case SVGA3D_SHADERTYPE_HS:
2081 pDevice->pImmediateContext->HSSetSamplers(startSampler, cSampler, papSampler);
2082 break;
2083 case SVGA3D_SHADERTYPE_DS:
2084 pDevice->pImmediateContext->DSSetSamplers(startSampler, cSampler, papSampler);
2085 break;
2086 case SVGA3D_SHADERTYPE_CS:
2087 pDevice->pImmediateContext->CSSetSamplers(startSampler, cSampler, papSampler);
2088 break;
2089 default:
2090 ASSERT_GUEST_FAILED_RETURN_VOID();
2091 }
2092}
2093
2094
2095static void dxShaderResourceViewSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView * const *papShaderResourceView)
2096{
2097 switch (type)
2098 {
2099 case SVGA3D_SHADERTYPE_VS:
2100 pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2101 break;
2102 case SVGA3D_SHADERTYPE_PS:
2103 pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2104 break;
2105 case SVGA3D_SHADERTYPE_GS:
2106 pDevice->pImmediateContext->GSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2107 break;
2108 case SVGA3D_SHADERTYPE_HS:
2109 pDevice->pImmediateContext->HSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2110 break;
2111 case SVGA3D_SHADERTYPE_DS:
2112 pDevice->pImmediateContext->DSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2113 break;
2114 case SVGA3D_SHADERTYPE_CS:
2115 pDevice->pImmediateContext->CSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2116 break;
2117 default:
2118 ASSERT_GUEST_FAILED_RETURN_VOID();
2119 }
2120}
2121
2122
2123static void dxCSUnorderedAccessViewSet(DXDEVICE *pDevice, uint32_t startView, uint32_t cView, ID3D11UnorderedAccessView * const *papUnorderedAccessView, UINT *pUAVInitialCounts)
2124{
2125 pDevice->pImmediateContext->CSSetUnorderedAccessViews(startView, cView, papUnorderedAccessView, pUAVInitialCounts);
2126}
2127
2128
2129static int dxBackendSurfaceAlloc(PVMSVGA3DBACKENDSURFACE *ppBackendSurface)
2130{
2131 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
2132 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
2133 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
2134 RTListInit(&pBackendSurface->listView);
2135 *ppBackendSurface = pBackendSurface;
2136 return VINF_SUCCESS;
2137}
2138
2139
2140static HRESULT dxInitSharedHandle(PVMSVGA3DBACKEND pBackend, PVMSVGA3DBACKENDSURFACE pBackendSurface)
2141{
2142 if (pBackend->fSingleDevice)
2143 return S_OK;
2144
2145 /* Get the shared handle. */
2146 IDXGIResource *pDxgiResource = NULL;
2147 HRESULT hr = pBackendSurface->u.pResource->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
2148 Assert(SUCCEEDED(hr));
2149 if (SUCCEEDED(hr))
2150 {
2151 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
2152 Assert(SUCCEEDED(hr));
2153 D3D_RELEASE(pDxgiResource);
2154 }
2155
2156 return hr;
2157}
2158
2159
2160static int vmsvga3dBackSurfaceCreateScreenTarget(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
2161{
2162 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2163 AssertReturn(p3dState, VERR_INVALID_STATE);
2164
2165 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2166 AssertReturn(pBackend, VERR_INVALID_STATE);
2167
2168 DXDEVICE *pDXDevice = &pBackend->dxDevice;
2169 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2170
2171 /* Surface must have SCREEN_TARGET flag. */
2172 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
2173
2174 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
2175 {
2176 AssertFailed(); /* Should the function not be used like that? */
2177 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2178 }
2179
2180 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2181 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2182 AssertRCReturn(rc, rc);
2183
2184 D3D11_TEXTURE2D_DESC td;
2185 RT_ZERO(td);
2186 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
2187 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
2188 Assert(pSurface->cLevels == 1);
2189 td.MipLevels = 1;
2190 td.ArraySize = 1;
2191 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2192 td.SampleDesc.Count = 1;
2193 td.SampleDesc.Quality = 0;
2194 td.Usage = D3D11_USAGE_DEFAULT;
2195 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
2196 td.CPUAccessFlags = 0;
2197 td.MiscFlags = pBackend->fSingleDevice ? 0 : D3D11_RESOURCE_MISC_SHARED;
2198
2199 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.pTexture2D);
2200 Assert(SUCCEEDED(hr));
2201 if (SUCCEEDED(hr))
2202 {
2203 /* Map-able texture. */
2204 td.Usage = D3D11_USAGE_DYNAMIC;
2205 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2206 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2207 td.MiscFlags = 0;
2208 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->dynamic.pTexture2D);
2209 Assert(SUCCEEDED(hr));
2210 }
2211
2212 if (SUCCEEDED(hr))
2213 {
2214 /* Staging texture. */
2215 td.Usage = D3D11_USAGE_STAGING;
2216 td.BindFlags = 0; /* No flags allowed. */
2217 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2218 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->staging.pTexture2D);
2219 Assert(SUCCEEDED(hr));
2220 }
2221
2222 if (SUCCEEDED(hr))
2223 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2224
2225 if (SUCCEEDED(hr))
2226 {
2227 /*
2228 * Success.
2229 */
2230 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
2231 pBackendSurface->enmDxgiFormat = td.Format;
2232 pSurface->pBackendSurface = pBackendSurface;
2233 pSurface->idAssociatedContext = DX_CID_BACKEND;
2234 return VINF_SUCCESS;
2235 }
2236
2237 /* Failure. */
2238 D3D_RELEASE(pBackendSurface->staging.pTexture2D);
2239 D3D_RELEASE(pBackendSurface->dynamic.pTexture2D);
2240 D3D_RELEASE(pBackendSurface->u.pTexture2D);
2241 RTMemFree(pBackendSurface);
2242 return VERR_NO_MEMORY;
2243}
2244
2245
2246static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
2247{
2248 /* Catch unimplemented flags. */
2249 Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS | SVGA3D_SURFACE_BIND_RAW_VIEWS)));
2250
2251 UINT BindFlags = 0;
2252
2253 if (surfaceFlags & (SVGA3D_SURFACE_BIND_VERTEX_BUFFER | SVGA3D_SURFACE_HINT_VERTEXBUFFER))
2254 BindFlags |= D3D11_BIND_VERTEX_BUFFER;
2255 if (surfaceFlags & (SVGA3D_SURFACE_BIND_INDEX_BUFFER | SVGA3D_SURFACE_HINT_INDEXBUFFER))
2256 BindFlags |= D3D11_BIND_INDEX_BUFFER;
2257 if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags |= D3D11_BIND_CONSTANT_BUFFER;
2258 if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags |= D3D11_BIND_SHADER_RESOURCE;
2259 if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags |= D3D11_BIND_RENDER_TARGET;
2260 if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags |= D3D11_BIND_DEPTH_STENCIL;
2261 if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags |= D3D11_BIND_STREAM_OUTPUT;
2262 if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags |= D3D11_BIND_UNORDERED_ACCESS;
2263
2264 return BindFlags;
2265}
2266
2267
2268static DXDEVICE *dxSurfaceDevice(PVMSVGA3DSTATE p3dState, PVMSVGA3DSURFACE pSurface, PVMSVGA3DDXCONTEXT pDXContext, UINT *pMiscFlags)
2269{
2270 if (p3dState->pBackend->fSingleDevice)
2271 {
2272 *pMiscFlags = 0;
2273 return &p3dState->pBackend->dxDevice;
2274 }
2275
2276 if (dxIsSurfaceShareable(pSurface))
2277 {
2278 *pMiscFlags = D3D11_RESOURCE_MISC_SHARED;
2279 return &p3dState->pBackend->dxDevice;
2280 }
2281
2282 *pMiscFlags = 0;
2283 return &pDXContext->pBackendDXContext->dxDevice;
2284}
2285
2286
2287static DXGI_FORMAT dxGetDxgiTypelessFormat(DXGI_FORMAT dxgiFormat)
2288{
2289 switch (dxgiFormat)
2290 {
2291 case DXGI_FORMAT_R32G32B32A32_FLOAT:
2292 case DXGI_FORMAT_R32G32B32A32_UINT:
2293 case DXGI_FORMAT_R32G32B32A32_SINT:
2294 return DXGI_FORMAT_R32G32B32A32_TYPELESS; /* 1 */
2295 case DXGI_FORMAT_R32G32B32_FLOAT:
2296 case DXGI_FORMAT_R32G32B32_UINT:
2297 case DXGI_FORMAT_R32G32B32_SINT:
2298 return DXGI_FORMAT_R32G32B32_TYPELESS; /* 5 */
2299 case DXGI_FORMAT_R16G16B16A16_FLOAT:
2300 case DXGI_FORMAT_R16G16B16A16_UNORM:
2301 case DXGI_FORMAT_R16G16B16A16_UINT:
2302 case DXGI_FORMAT_R16G16B16A16_SNORM:
2303 case DXGI_FORMAT_R16G16B16A16_SINT:
2304 return DXGI_FORMAT_R16G16B16A16_TYPELESS; /* 9 */
2305 case DXGI_FORMAT_R32G32_FLOAT:
2306 case DXGI_FORMAT_R32G32_UINT:
2307 case DXGI_FORMAT_R32G32_SINT:
2308 return DXGI_FORMAT_R32G32_TYPELESS; /* 15 */
2309 case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2310 case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS:
2311 case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT:
2312 return DXGI_FORMAT_R32G8X24_TYPELESS; /* 19 */
2313 case DXGI_FORMAT_R10G10B10A2_UNORM:
2314 case DXGI_FORMAT_R10G10B10A2_UINT:
2315 return DXGI_FORMAT_R10G10B10A2_TYPELESS; /* 23 */
2316 case DXGI_FORMAT_R8G8B8A8_UNORM:
2317 case DXGI_FORMAT_R8G8B8A8_UNORM_SRGB:
2318 case DXGI_FORMAT_R8G8B8A8_UINT:
2319 case DXGI_FORMAT_R8G8B8A8_SNORM:
2320 case DXGI_FORMAT_R8G8B8A8_SINT:
2321 return DXGI_FORMAT_R8G8B8A8_TYPELESS; /* 27 */
2322 case DXGI_FORMAT_R16G16_FLOAT:
2323 case DXGI_FORMAT_R16G16_UNORM:
2324 case DXGI_FORMAT_R16G16_UINT:
2325 case DXGI_FORMAT_R16G16_SNORM:
2326 case DXGI_FORMAT_R16G16_SINT:
2327 return DXGI_FORMAT_R16G16_TYPELESS; /* 33 */
2328 case DXGI_FORMAT_D32_FLOAT:
2329 case DXGI_FORMAT_R32_FLOAT:
2330 case DXGI_FORMAT_R32_UINT:
2331 case DXGI_FORMAT_R32_SINT:
2332 return DXGI_FORMAT_R32_TYPELESS; /* 39 */
2333 case DXGI_FORMAT_D24_UNORM_S8_UINT:
2334 case DXGI_FORMAT_R24_UNORM_X8_TYPELESS:
2335 case DXGI_FORMAT_X24_TYPELESS_G8_UINT:
2336 return DXGI_FORMAT_R24G8_TYPELESS; /* 44 */
2337 case DXGI_FORMAT_R8G8_UNORM:
2338 case DXGI_FORMAT_R8G8_UINT:
2339 case DXGI_FORMAT_R8G8_SNORM:
2340 case DXGI_FORMAT_R8G8_SINT:
2341 return DXGI_FORMAT_R8G8_TYPELESS; /* 48*/
2342 case DXGI_FORMAT_R16_FLOAT:
2343 case DXGI_FORMAT_D16_UNORM:
2344 case DXGI_FORMAT_R16_UNORM:
2345 case DXGI_FORMAT_R16_UINT:
2346 case DXGI_FORMAT_R16_SNORM:
2347 case DXGI_FORMAT_R16_SINT:
2348 return DXGI_FORMAT_R16_TYPELESS; /* 53 */
2349 case DXGI_FORMAT_R8_UNORM:
2350 case DXGI_FORMAT_R8_UINT:
2351 case DXGI_FORMAT_R8_SNORM:
2352 case DXGI_FORMAT_R8_SINT:
2353 return DXGI_FORMAT_R8_TYPELESS; /* 60*/
2354 case DXGI_FORMAT_BC1_UNORM:
2355 case DXGI_FORMAT_BC1_UNORM_SRGB:
2356 return DXGI_FORMAT_BC1_TYPELESS; /* 70 */
2357 case DXGI_FORMAT_BC2_UNORM:
2358 case DXGI_FORMAT_BC2_UNORM_SRGB:
2359 return DXGI_FORMAT_BC2_TYPELESS; /* 73 */
2360 case DXGI_FORMAT_BC3_UNORM:
2361 case DXGI_FORMAT_BC3_UNORM_SRGB:
2362 return DXGI_FORMAT_BC3_TYPELESS; /* 76 */
2363 case DXGI_FORMAT_BC4_UNORM:
2364 case DXGI_FORMAT_BC4_SNORM:
2365 return DXGI_FORMAT_BC4_TYPELESS; /* 79 */
2366 case DXGI_FORMAT_BC5_UNORM:
2367 case DXGI_FORMAT_BC5_SNORM:
2368 return DXGI_FORMAT_BC5_TYPELESS; /* 82 */
2369 case DXGI_FORMAT_B8G8R8A8_UNORM:
2370 case DXGI_FORMAT_B8G8R8A8_UNORM_SRGB:
2371 return DXGI_FORMAT_B8G8R8A8_TYPELESS; /* 90 */
2372 case DXGI_FORMAT_B8G8R8X8_UNORM:
2373 case DXGI_FORMAT_B8G8R8X8_UNORM_SRGB:
2374 return DXGI_FORMAT_B8G8R8X8_TYPELESS; /* 92 */
2375 case DXGI_FORMAT_BC6H_UF16:
2376 case DXGI_FORMAT_BC6H_SF16:
2377 return DXGI_FORMAT_BC6H_TYPELESS; /* 94 */
2378 case DXGI_FORMAT_BC7_UNORM:
2379 case DXGI_FORMAT_BC7_UNORM_SRGB:
2380 return DXGI_FORMAT_BC7_TYPELESS; /* 97 */
2381 default:
2382 break;
2383 }
2384
2385 return dxgiFormat;
2386}
2387
2388
2389static bool dxIsDepthStencilFormat(DXGI_FORMAT dxgiFormat)
2390{
2391 switch (dxgiFormat)
2392 {
2393 case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2394 case DXGI_FORMAT_D32_FLOAT:
2395 case DXGI_FORMAT_D24_UNORM_S8_UINT:
2396 case DXGI_FORMAT_R16_FLOAT:
2397 return true;
2398 default:
2399 break;
2400 }
2401
2402 return false;
2403}
2404
2405
2406static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2407{
2408 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2409 AssertReturn(p3dState, VERR_INVALID_STATE);
2410
2411 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2412 AssertReturn(pBackend, VERR_INVALID_STATE);
2413
2414 UINT MiscFlags;
2415 DXDEVICE *pDXDevice = dxSurfaceDevice(p3dState, pSurface, pDXContext, &MiscFlags);
2416 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2417
2418 if (pSurface->pBackendSurface != NULL)
2419 {
2420 AssertFailed(); /** @todo Should the function not be used like that? */
2421 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2422 }
2423
2424 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2425 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2426 AssertRCReturn(rc, rc);
2427
2428 uint32_t const cWidth = pSurface->paMipmapLevels[0].cBlocksX * pSurface->cxBlock;
2429 uint32_t const cHeight = pSurface->paMipmapLevels[0].cBlocksY * pSurface->cyBlock;
2430 uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
2431 uint32_t const numMipLevels = pSurface->cLevels;
2432
2433 DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2434 AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
2435
2436 /* Create typeless textures, unless it is a depth/stencil resource,
2437 * because D3D11_BIND_DEPTH_STENCIL requires a depth/stencil format.
2438 * Always use typeless format for staging/dynamic resources.
2439 */
2440 DXGI_FORMAT const dxgiFormatTypeless = dxGetDxgiTypelessFormat(dxgiFormat);
2441 if (!dxIsDepthStencilFormat(dxgiFormat))
2442 dxgiFormat = dxgiFormatTypeless;
2443
2444 /*
2445 * Create D3D11 texture object.
2446 */
2447 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
2448 if (pSurface->paMipmapLevels[0].pSurfaceData)
2449 {
2450 /* Can happen for a non GBO surface or if GBO texture was updated prior to creation of the hardware resource. */
2451 uint32_t const cSubresource = numMipLevels * pSurface->surfaceDesc.numArrayElements;
2452 paInitialData = (D3D11_SUBRESOURCE_DATA *)RTMemAlloc(cSubresource * sizeof(D3D11_SUBRESOURCE_DATA));
2453 AssertPtrReturn(paInitialData, VERR_NO_MEMORY);
2454
2455 for (uint32_t i = 0; i < cSubresource; ++i)
2456 {
2457 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
2458 D3D11_SUBRESOURCE_DATA *p = &paInitialData[i];
2459 p->pSysMem = pMipmapLevel->pSurfaceData;
2460 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
2461 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
2462 }
2463 }
2464
2465 HRESULT hr = S_OK;
2466 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
2467 {
2468 /*
2469 * Create the texture in backend device and open for the specified context.
2470 */
2471 D3D11_TEXTURE2D_DESC td;
2472 RT_ZERO(td);
2473 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
2474 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
2475 Assert(pSurface->cLevels == 1);
2476 td.MipLevels = 1;
2477 td.ArraySize = 1;
2478 td.Format = dxgiFormat;
2479 td.SampleDesc.Count = 1;
2480 td.SampleDesc.Quality = 0;
2481 td.Usage = D3D11_USAGE_DEFAULT;
2482 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
2483 td.CPUAccessFlags = 0;
2484 td.MiscFlags = MiscFlags;
2485
2486 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2487 Assert(SUCCEEDED(hr));
2488 if (SUCCEEDED(hr))
2489 {
2490 /* Map-able texture. */
2491 td.Format = dxgiFormatTypeless;
2492 td.Usage = D3D11_USAGE_DYNAMIC;
2493 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2494 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2495 td.MiscFlags = 0;
2496 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2497 Assert(SUCCEEDED(hr));
2498 }
2499
2500 if (SUCCEEDED(hr))
2501 {
2502 /* Staging texture. */
2503 td.Usage = D3D11_USAGE_STAGING;
2504 td.BindFlags = 0; /* No flags allowed. */
2505 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2506 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2507 Assert(SUCCEEDED(hr));
2508 }
2509
2510 if (SUCCEEDED(hr))
2511 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2512
2513 if (SUCCEEDED(hr))
2514 {
2515 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
2516 }
2517 }
2518 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
2519 {
2520 Assert(pSurface->cFaces == 6);
2521 Assert(cWidth == cHeight);
2522 Assert(cDepth == 1);
2523//DEBUG_BREAKPOINT_TEST();
2524
2525 D3D11_TEXTURE2D_DESC td;
2526 RT_ZERO(td);
2527 td.Width = cWidth;
2528 td.Height = cHeight;
2529 td.MipLevels = numMipLevels;
2530 td.ArraySize = pSurface->surfaceDesc.numArrayElements; /* This is 6 * numCubes */
2531 td.Format = dxgiFormat;
2532 td.SampleDesc.Count = 1;
2533 td.SampleDesc.Quality = 0;
2534 td.Usage = D3D11_USAGE_DEFAULT;
2535 td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2536 td.CPUAccessFlags = 0; /** @todo */
2537 td.MiscFlags = MiscFlags | D3D11_RESOURCE_MISC_TEXTURECUBE; /** @todo */
2538 if ( numMipLevels > 1
2539 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2540 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2541
2542 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2543 Assert(SUCCEEDED(hr));
2544 if (SUCCEEDED(hr))
2545 {
2546 /* Map-able texture. */
2547 td.Format = dxgiFormatTypeless;
2548 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2549 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2550 td.Usage = D3D11_USAGE_DYNAMIC;
2551 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2552 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2553 td.MiscFlags = 0;
2554 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2555 Assert(SUCCEEDED(hr));
2556 }
2557
2558 if (SUCCEEDED(hr))
2559 {
2560 /* Staging texture. */
2561 td.Usage = D3D11_USAGE_STAGING;
2562 td.BindFlags = 0; /* No flags allowed. */
2563 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2564 td.MiscFlags = 0;
2565 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2566 Assert(SUCCEEDED(hr));
2567 }
2568
2569 if (SUCCEEDED(hr))
2570 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2571
2572 if (SUCCEEDED(hr))
2573 {
2574 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_CUBE;
2575 }
2576 }
2577 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_1D)
2578 {
2579 /*
2580 * 1D texture.
2581 */
2582 Assert(pSurface->cFaces == 1);
2583
2584 D3D11_TEXTURE1D_DESC td;
2585 RT_ZERO(td);
2586 td.Width = cWidth;
2587 td.MipLevels = numMipLevels;
2588 td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2589 td.Format = dxgiFormat;
2590 td.Usage = D3D11_USAGE_DEFAULT;
2591 td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2592 td.CPUAccessFlags = 0;
2593 td.MiscFlags = MiscFlags; /** @todo */
2594 if ( numMipLevels > 1
2595 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2596 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2597
2598 hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->u.pTexture1D);
2599 Assert(SUCCEEDED(hr));
2600 if (SUCCEEDED(hr))
2601 {
2602 /* Map-able texture. */
2603 td.Format = dxgiFormatTypeless;
2604 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2605 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2606 td.Usage = D3D11_USAGE_DYNAMIC;
2607 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2608 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2609 td.MiscFlags = 0;
2610 hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->dynamic.pTexture1D);
2611 Assert(SUCCEEDED(hr));
2612 }
2613
2614 if (SUCCEEDED(hr))
2615 {
2616 /* Staging texture. */
2617 td.Usage = D3D11_USAGE_STAGING;
2618 td.BindFlags = 0; /* No flags allowed. */
2619 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2620 td.MiscFlags = 0;
2621 hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->staging.pTexture1D);
2622 Assert(SUCCEEDED(hr));
2623 }
2624
2625 if (SUCCEEDED(hr))
2626 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2627
2628 if (SUCCEEDED(hr))
2629 {
2630 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_1D;
2631 }
2632 }
2633 else
2634 {
2635 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_VOLUME)
2636 {
2637 /*
2638 * Volume texture.
2639 */
2640 Assert(pSurface->cFaces == 1);
2641 Assert(pSurface->surfaceDesc.numArrayElements == 1);
2642
2643 D3D11_TEXTURE3D_DESC td;
2644 RT_ZERO(td);
2645 td.Width = cWidth;
2646 td.Height = cHeight;
2647 td.Depth = cDepth;
2648 td.MipLevels = numMipLevels;
2649 td.Format = dxgiFormat;
2650 td.Usage = D3D11_USAGE_DEFAULT;
2651 td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2652 td.CPUAccessFlags = 0; /** @todo */
2653 td.MiscFlags = MiscFlags; /** @todo */
2654 if ( numMipLevels > 1
2655 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2656 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2657
2658 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->u.pTexture3D);
2659 Assert(SUCCEEDED(hr));
2660 if (SUCCEEDED(hr))
2661 {
2662 /* Map-able texture. */
2663 td.Format = dxgiFormatTypeless;
2664 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2665 td.Usage = D3D11_USAGE_DYNAMIC;
2666 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2667 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2668 td.MiscFlags = 0;
2669 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->dynamic.pTexture3D);
2670 Assert(SUCCEEDED(hr));
2671 }
2672
2673 if (SUCCEEDED(hr))
2674 {
2675 /* Staging texture. */
2676 td.Usage = D3D11_USAGE_STAGING;
2677 td.BindFlags = 0; /* No flags allowed. */
2678 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2679 td.MiscFlags = 0;
2680 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->staging.pTexture3D);
2681 Assert(SUCCEEDED(hr));
2682 }
2683
2684 if (SUCCEEDED(hr))
2685 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2686
2687 if (SUCCEEDED(hr))
2688 {
2689 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
2690 }
2691 }
2692 else
2693 {
2694 /*
2695 * 2D texture.
2696 */
2697 Assert(cDepth == 1);
2698 Assert(pSurface->cFaces == 1);
2699
2700 D3D11_TEXTURE2D_DESC td;
2701 RT_ZERO(td);
2702 td.Width = cWidth;
2703 td.Height = cHeight;
2704 td.MipLevels = numMipLevels;
2705 td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2706 td.Format = dxgiFormat;
2707 td.SampleDesc.Count = 1;
2708 td.SampleDesc.Quality = 0;
2709 td.Usage = D3D11_USAGE_DEFAULT;
2710 td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2711 td.CPUAccessFlags = 0; /** @todo */
2712 td.MiscFlags = MiscFlags; /** @todo */
2713 if ( numMipLevels > 1
2714 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2715 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2716
2717 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2718 Assert(SUCCEEDED(hr));
2719 if (SUCCEEDED(hr))
2720 {
2721 /* Map-able texture. */
2722 td.Format = dxgiFormatTypeless;
2723 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2724 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2725 td.Usage = D3D11_USAGE_DYNAMIC;
2726 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2727 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2728 td.MiscFlags = 0;
2729 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2730 Assert(SUCCEEDED(hr));
2731 }
2732
2733 if (SUCCEEDED(hr))
2734 {
2735 /* Staging texture. */
2736 td.Usage = D3D11_USAGE_STAGING;
2737 td.BindFlags = 0; /* No flags allowed. */
2738 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2739 td.MiscFlags = 0;
2740 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2741 Assert(SUCCEEDED(hr));
2742 }
2743
2744 if (SUCCEEDED(hr))
2745 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2746
2747 if (SUCCEEDED(hr))
2748 {
2749 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_2D;
2750 }
2751 }
2752 }
2753
2754 Assert(hr == S_OK);
2755
2756 RTMemFree(paInitialData);
2757
2758 if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
2759 {
2760 }
2761
2762 if (SUCCEEDED(hr))
2763 {
2764 /*
2765 * Success.
2766 */
2767 LogFunc(("sid = %u\n", pSurface->id));
2768 pBackendSurface->enmDxgiFormat = dxgiFormat;
2769 pSurface->pBackendSurface = pBackendSurface;
2770 if (p3dState->pBackend->fSingleDevice || RT_BOOL(MiscFlags & D3D11_RESOURCE_MISC_SHARED))
2771 pSurface->idAssociatedContext = DX_CID_BACKEND;
2772 else
2773 pSurface->idAssociatedContext = pDXContext->cid;
2774 return VINF_SUCCESS;
2775 }
2776
2777 D3D_RELEASE(pBackendSurface->staging.pResource);
2778 D3D_RELEASE(pBackendSurface->dynamic.pResource);
2779 D3D_RELEASE(pBackendSurface->u.pResource);
2780 RTMemFree(pBackendSurface);
2781 return VERR_NO_MEMORY;
2782}
2783
2784
2785static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2786{
2787 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2788 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2789
2790 /* Buffers should be created as such. */
2791 AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
2792 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
2793 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2794 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
2795 )), VERR_INVALID_PARAMETER);
2796
2797 if (pSurface->pBackendSurface != NULL)
2798 {
2799 AssertFailed(); /** @todo Should the function not be used like that? */
2800 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2801 }
2802
2803 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2804 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2805 AssertRCReturn(rc, rc);
2806
2807 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2808 rc = dxBackendSurfaceAlloc(&pBackendSurface);
2809 AssertRCReturn(rc, rc);
2810
2811 LogFunc(("sid = %u, size = %u\n", pSurface->id, pMipLevel->cbSurface));
2812
2813 /* Upload the current data, if any. */
2814 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2815 D3D11_SUBRESOURCE_DATA initialData;
2816 if (pMipLevel->pSurfaceData)
2817 {
2818 initialData.pSysMem = pMipLevel->pSurfaceData;
2819 initialData.SysMemPitch = pMipLevel->cbSurface;
2820 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2821
2822 pInitialData = &initialData;
2823 }
2824
2825 D3D11_BUFFER_DESC bd;
2826 RT_ZERO(bd);
2827 bd.ByteWidth = pMipLevel->cbSurface;
2828 bd.Usage = D3D11_USAGE_DEFAULT;
2829 bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2830
2831 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2832 if (SUCCEEDED(hr))
2833 {
2834 /*
2835 * Success.
2836 */
2837 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2838 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2839 pSurface->pBackendSurface = pBackendSurface;
2840 pSurface->idAssociatedContext = pDXContext->cid;
2841 return VINF_SUCCESS;
2842 }
2843
2844 /* Failure. */
2845 D3D_RELEASE(pBackendSurface->u.pBuffer);
2846 RTMemFree(pBackendSurface);
2847 return VERR_NO_MEMORY;
2848}
2849
2850
2851static int vmsvga3dBackSurfaceCreateSoBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2852{
2853 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2854 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2855
2856 /* Buffers should be created as such. */
2857 AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT), VERR_INVALID_PARAMETER);
2858
2859 if (pSurface->pBackendSurface != NULL)
2860 {
2861 AssertFailed(); /** @todo Should the function not be used like that? */
2862 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2863 }
2864
2865 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2866 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2867 AssertRCReturn(rc, rc);
2868
2869 D3D11_BUFFER_DESC bd;
2870 RT_ZERO(bd);
2871 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2872 bd.Usage = D3D11_USAGE_DEFAULT;
2873 bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2874 bd.CPUAccessFlags = 0; /// @todo ? D3D11_CPU_ACCESS_READ;
2875 bd.MiscFlags = 0;
2876 bd.StructureByteStride = 0;
2877
2878 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.pBuffer);
2879 if (SUCCEEDED(hr))
2880 {
2881 /*
2882 * Success.
2883 */
2884 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2885 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2886 pSurface->pBackendSurface = pBackendSurface;
2887 pSurface->idAssociatedContext = pDXContext->cid;
2888 return VINF_SUCCESS;
2889 }
2890
2891 /* Failure. */
2892 D3D_RELEASE(pBackendSurface->u.pBuffer);
2893 RTMemFree(pBackendSurface);
2894 return VERR_NO_MEMORY;
2895}
2896
2897#if 0
2898static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface, uint32_t offsetInBytes, uint32_t sizeInBytes)
2899{
2900 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2901 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2902
2903 /* Buffers should be created as such. */
2904 AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
2905
2906 if (pSurface->pBackendSurface != NULL)
2907 {
2908 AssertFailed(); /** @todo Should the function not be used like that? */
2909 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2910 }
2911
2912 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2913 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2914 AssertRCReturn(rc, rc);
2915
2916 ASSERT_GUEST_RETURN( offsetInBytes < pMipLevel->cbSurface
2917 && sizeInBytes <= pMipLevel->cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
2918
2919 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2920 rc = dxBackendSurfaceAlloc(&pBackendSurface);
2921 AssertRCReturn(rc, rc);
2922
2923 /* Upload the current data, if any. */
2924 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2925 D3D11_SUBRESOURCE_DATA initialData;
2926 if (pMipLevel->pSurfaceData)
2927 {
2928 initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
2929 initialData.SysMemPitch = pMipLevel->cbSurface;
2930 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2931
2932 pInitialData = &initialData;
2933
2934 // Log(("%.*Rhxd\n", sizeInBytes, initialData.pSysMem));
2935 }
2936
2937 D3D11_BUFFER_DESC bd;
2938 RT_ZERO(bd);
2939 bd.ByteWidth = sizeInBytes;
2940 bd.Usage = D3D11_USAGE_DYNAMIC;
2941 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
2942 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2943 bd.MiscFlags = 0;
2944 bd.StructureByteStride = 0;
2945
2946 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2947 if (SUCCEEDED(hr))
2948 {
2949 /*
2950 * Success.
2951 */
2952 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2953 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2954 pSurface->pBackendSurface = pBackendSurface;
2955 pSurface->idAssociatedContext = pDXContext->cid;
2956 return VINF_SUCCESS;
2957 }
2958
2959 /* Failure. */
2960 D3D_RELEASE(pBackendSurface->u.pBuffer);
2961 RTMemFree(pBackendSurface);
2962 return VERR_NO_MEMORY;
2963}
2964#endif
2965
2966static int vmsvga3dBackSurfaceCreateResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2967{
2968 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2969 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2970
2971 if (pSurface->pBackendSurface != NULL)
2972 {
2973 AssertFailed(); /** @todo Should the function not be used like that? */
2974 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2975 }
2976
2977 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2978 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2979 AssertRCReturn(rc, rc);
2980
2981 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2982 rc = dxBackendSurfaceAlloc(&pBackendSurface);
2983 AssertRCReturn(rc, rc);
2984
2985 HRESULT hr;
2986
2987 /*
2988 * Figure out the type of the surface.
2989 */
2990 if (pSurface->format == SVGA3D_BUFFER)
2991 {
2992 /* Upload the current data, if any. */
2993 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2994 D3D11_SUBRESOURCE_DATA initialData;
2995 if (pMipLevel->pSurfaceData)
2996 {
2997 initialData.pSysMem = pMipLevel->pSurfaceData;
2998 initialData.SysMemPitch = pMipLevel->cbSurface;
2999 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
3000
3001 pInitialData = &initialData;
3002 }
3003
3004 D3D11_BUFFER_DESC bd;
3005 RT_ZERO(bd);
3006 bd.ByteWidth = pMipLevel->cbSurface;
3007
3008 if (pSurface->f.surfaceFlags & (SVGA3D_SURFACE_STAGING_UPLOAD | SVGA3D_SURFACE_STAGING_DOWNLOAD))
3009 bd.Usage = D3D11_USAGE_STAGING;
3010 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
3011 bd.Usage = D3D11_USAGE_DYNAMIC;
3012 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_STATIC)
3013 bd.Usage = pInitialData ? D3D11_USAGE_IMMUTABLE : D3D11_USAGE_DEFAULT; /* Guest will update later. */
3014 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE)
3015 bd.Usage = D3D11_USAGE_DEFAULT;
3016
3017 bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
3018
3019 if (bd.Usage == D3D11_USAGE_STAGING)
3020 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE | D3D11_CPU_ACCESS_READ;
3021 else if (bd.Usage == D3D11_USAGE_DYNAMIC)
3022 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3023
3024 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_DRAWINDIRECT_ARGS)
3025 bd.MiscFlags |= D3D11_RESOURCE_MISC_DRAWINDIRECT_ARGS;
3026 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_RAW_VIEWS)
3027 bd.MiscFlags |= D3D11_RESOURCE_MISC_BUFFER_ALLOW_RAW_VIEWS;
3028 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BUFFER_STRUCTURED)
3029 bd.MiscFlags |= D3D11_RESOURCE_MISC_BUFFER_STRUCTURED;
3030 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_RESOURCE_CLAMP)
3031 bd.MiscFlags |= D3D11_RESOURCE_MISC_RESOURCE_CLAMP;
3032
3033 if (bd.MiscFlags & D3D11_RESOURCE_MISC_BUFFER_STRUCTURED)
3034 {
3035 SVGAOTableSurfaceEntry entrySurface;
3036 rc = vmsvgaR3OTableReadSurface(pThisCC->svga.pSvgaR3State, pSurface->id, &entrySurface);
3037 AssertRCReturn(rc, rc);
3038
3039 bd.StructureByteStride = entrySurface.bufferByteStride;
3040 }
3041
3042 hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3043 Assert(SUCCEEDED(hr));
3044 if (SUCCEEDED(hr))
3045 {
3046 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3047 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3048 }
3049 }
3050 else
3051 {
3052 /** @todo Texture. Currently vmsvga3dBackSurfaceCreateTexture is called for textures. */
3053 AssertFailed();
3054 hr = E_FAIL;
3055 }
3056
3057 if (SUCCEEDED(hr))
3058 {
3059 /*
3060 * Success.
3061 */
3062 pSurface->pBackendSurface = pBackendSurface;
3063 pSurface->idAssociatedContext = pDXContext->cid;
3064 return VINF_SUCCESS;
3065 }
3066
3067 /* Failure. */
3068 RTMemFree(pBackendSurface);
3069 return VERR_NO_MEMORY;
3070}
3071
3072
3073static int dxStagingBufferRealloc(DXDEVICE *pDXDevice, uint32_t cbRequiredSize)
3074{
3075 AssertReturn(cbRequiredSize < SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
3076
3077 if (RT_LIKELY(cbRequiredSize <= pDXDevice->cbStagingBuffer))
3078 return VINF_SUCCESS;
3079
3080 D3D_RELEASE(pDXDevice->pStagingBuffer);
3081
3082 uint32_t const cbAlloc = RT_ALIGN_32(cbRequiredSize, _64K);
3083
3084 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3085 D3D11_BUFFER_DESC bd;
3086 RT_ZERO(bd);
3087 bd.ByteWidth = cbAlloc;
3088 bd.Usage = D3D11_USAGE_STAGING;
3089 //bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
3090 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE | D3D11_CPU_ACCESS_READ;
3091
3092 int rc = VINF_SUCCESS;
3093 ID3D11Buffer *pBuffer;
3094 HRESULT hr = pDXDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
3095 if (SUCCEEDED(hr))
3096 {
3097 pDXDevice->pStagingBuffer = pBuffer;
3098 pDXDevice->cbStagingBuffer = cbAlloc;
3099 }
3100 else
3101 {
3102 pDXDevice->cbStagingBuffer = 0;
3103 rc = VERR_NO_MEMORY;
3104 }
3105
3106 return rc;
3107}
3108
3109
3110static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3111{
3112 RT_NOREF(pDevIns, pThis);
3113
3114 int rc;
3115#ifdef RT_OS_LINUX /** @todo Remove, this is currently needed for loading the X11 library in order to call XInitThreads(). */
3116 rc = glLdrInit(pDevIns);
3117 if (RT_FAILURE(rc))
3118 {
3119 LogRel(("VMSVGA3d: Error loading OpenGL library and resolving necessary functions: %Rrc\n", rc));
3120 return rc;
3121 }
3122#endif
3123
3124 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
3125 AssertReturn(pState, VERR_NO_MEMORY);
3126 pThisCC->svga.p3dState = pState;
3127
3128 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
3129 AssertReturn(pBackend, VERR_NO_MEMORY);
3130 pState->pBackend = pBackend;
3131
3132 rc = RTLdrLoadSystem(VBOX_D3D11_LIBRARY_NAME, /* fNoUnload = */ true, &pBackend->hD3D11);
3133 AssertRC(rc);
3134 if (RT_SUCCESS(rc))
3135 {
3136 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
3137 AssertRC(rc);
3138 }
3139
3140 if (RT_SUCCESS(rc))
3141 {
3142 /* Failure to load the shader disassembler is ignored. */
3143 int rc2 = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
3144 if (RT_SUCCESS(rc2))
3145 rc2 = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
3146 Log6Func(("Load D3DDisassemble: %Rrc\n", rc2));
3147 }
3148
3149#if !defined(RT_OS_WINDOWS) || defined(DX_FORCE_SINGLE_DEVICE)
3150 pBackend->fSingleDevice = true;
3151#endif
3152
3153 LogRelMax(1, ("VMSVGA: Single DX device mode: %s\n", pBackend->fSingleDevice ? "enabled" : "disabled"));
3154
3155//DEBUG_BREAKPOINT_TEST();
3156 return rc;
3157}
3158
3159
3160static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3161{
3162 RT_NOREF(pDevIns, pThis);
3163
3164 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3165 AssertReturn(pState, VERR_INVALID_STATE);
3166
3167 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3168 AssertReturn(pBackend, VERR_INVALID_STATE);
3169
3170 int rc = dxDeviceCreate(pBackend, &pBackend->dxDevice);
3171 if (RT_SUCCESS(rc))
3172 {
3173 IDXGIAdapter *pAdapter = NULL;
3174 HRESULT hr = pBackend->dxDevice.pDxgiFactory->EnumAdapters(0, &pAdapter);
3175 if (SUCCEEDED(hr))
3176 {
3177 DXGI_ADAPTER_DESC desc;
3178 hr = pAdapter->GetDesc(&desc);
3179 if (SUCCEEDED(hr))
3180 {
3181 char sz[RT_ELEMENTS(desc.Description)];
3182 for (unsigned i = 0; i < RT_ELEMENTS(desc.Description); ++i)
3183 sz[i] = (char)desc.Description[i];
3184 LogRelMax(1, ("VMSVGA: Adapter [%s]\n", sz));
3185 }
3186
3187 pAdapter->Release();
3188 }
3189 }
3190 return rc;
3191}
3192
3193
3194static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
3195{
3196 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3197 AssertReturn(pState, VERR_INVALID_STATE);
3198
3199 /** @todo This is generic code. Must be moved to in DevVGA-SVGA3d.cpp */
3200 /* Destroy all leftover surfaces. */
3201 for (uint32_t i = 0; i < pState->cSurfaces; i++)
3202 {
3203 if (pState->papSurfaces[i]->id != SVGA3D_INVALID_ID)
3204 vmsvga3dSurfaceDestroy(pThisCC, pState->papSurfaces[i]->id);
3205 }
3206
3207 /* Destroy all leftover DX contexts. */
3208 for (uint32_t i = 0; i < pState->cDXContexts; i++)
3209 {
3210 if (pState->papDXContexts[i]->cid != SVGA3D_INVALID_ID)
3211 vmsvga3dDXDestroyContext(pThisCC, pState->papDXContexts[i]->cid);
3212 }
3213
3214 return VINF_SUCCESS;
3215}
3216
3217
3218static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
3219{
3220 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3221 AssertReturn(pState, VERR_INVALID_STATE);
3222
3223 if (pState->pBackend)
3224 {
3225 /* Clean up backends. For example release resources from surfaces. */
3226 vmsvga3dBackReset(pThisCC);
3227
3228 dxDeviceDestroy(pState->pBackend, &pState->pBackend->dxDevice);
3229
3230 RTMemFree(pState->pBackend);
3231 pState->pBackend = NULL;
3232 }
3233
3234 return VINF_SUCCESS;
3235}
3236
3237
3238/** @todo Such structures must be in VBoxVideo3D.h */
3239typedef struct VBOX3DNOTIFYDEFINESCREEN
3240{
3241 VBOX3DNOTIFY Core;
3242 uint32_t cWidth;
3243 uint32_t cHeight;
3244 int32_t xRoot;
3245 int32_t yRoot;
3246 uint32_t fPrimary;
3247 uint32_t cDpi;
3248} VBOX3DNOTIFYDEFINESCREEN;
3249
3250
3251static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3252{
3253 VBOX3DNOTIFYDEFINESCREEN n;
3254 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
3255 n.Core.iDisplay = pScreen->idScreen;
3256 n.Core.u32Reserved = 0;
3257 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3258 RT_ZERO(n.Core.au8Data);
3259 n.cWidth = pScreen->cWidth;
3260 n.cHeight = pScreen->cHeight;
3261 n.xRoot = pScreen->xOrigin;
3262 n.yRoot = pScreen->yOrigin;
3263 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
3264 n.cDpi = pScreen->cDpi;
3265
3266 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3267}
3268
3269
3270static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3271{
3272 VBOX3DNOTIFY n;
3273 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
3274 n.iDisplay = pScreen->idScreen;
3275 n.u32Reserved = 0;
3276 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3277 RT_ZERO(n.au8Data);
3278
3279 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3280}
3281
3282
3283static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
3284{
3285 VBOX3DNOTIFY n;
3286 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
3287 n.iDisplay = pScreen->idScreen;
3288 n.u32Reserved = 0;
3289 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3290 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
3291
3292 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3293}
3294
3295
3296typedef struct VBOX3DNOTIFYUPDATE
3297{
3298 VBOX3DNOTIFY Core;
3299 uint32_t x;
3300 uint32_t y;
3301 uint32_t w;
3302 uint32_t h;
3303} VBOX3DNOTIFYUPDATE;
3304
3305
3306static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3307 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
3308{
3309 VBOX3DNOTIFYUPDATE n;
3310 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
3311 n.Core.iDisplay = pScreen->idScreen;
3312 n.Core.u32Reserved = 0;
3313 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3314 RT_ZERO(n.Core.au8Data);
3315 n.x = x;
3316 n.y = y;
3317 n.w = w;
3318 n.h = h;
3319
3320 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3321}
3322
3323static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
3324{
3325 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3326
3327 DXDEVICE *pDXDevice = &pBackend->dxDevice;
3328 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
3329
3330 D3D11_TEXTURE2D_DESC td;
3331 RT_ZERO(td);
3332 td.Width = cWidth;
3333 td.Height = cHeight;
3334 td.MipLevels = 1;
3335 td.ArraySize = 1;
3336 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
3337 td.SampleDesc.Count = 1;
3338 td.SampleDesc.Quality = 0;
3339 td.Usage = D3D11_USAGE_DEFAULT;
3340 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
3341 td.CPUAccessFlags = 0;
3342 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
3343
3344 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
3345 if (SUCCEEDED(hr))
3346 {
3347 /* Get the shared handle. */
3348 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
3349 if (SUCCEEDED(hr))
3350 {
3351 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
3352 if (SUCCEEDED(hr))
3353 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
3354 }
3355 }
3356
3357 if (SUCCEEDED(hr))
3358 return VINF_SUCCESS;
3359
3360 AssertFailed();
3361 return VERR_NOT_SUPPORTED;
3362}
3363
3364
3365static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
3366{
3367 RT_NOREF(pState);
3368 D3D_RELEASE(p->pDXGIKeyedMutex);
3369 D3D_RELEASE(p->pDxgiResource);
3370 D3D_RELEASE(p->pTexture);
3371 p->SharedHandle = 0;
3372 p->sidScreenTarget = SVGA_ID_INVALID;
3373}
3374
3375
3376static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3377{
3378 RT_NOREF(pThis, pThisCC, pScreen);
3379
3380 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
3381
3382 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3383 AssertReturn(pState, VERR_INVALID_STATE);
3384
3385 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3386 AssertReturn(pBackend, VERR_INVALID_STATE);
3387
3388 Assert(pScreen->pHwScreen == NULL);
3389
3390 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
3391 AssertPtrReturn(p, VERR_NO_MEMORY);
3392
3393 p->sidScreenTarget = SVGA_ID_INVALID;
3394
3395 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
3396 if (RT_SUCCESS(rc))
3397 {
3398 /* The frontend supports the screen. Create the actual resource. */
3399 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
3400 if (RT_SUCCESS(rc))
3401 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
3402 }
3403
3404 if (RT_SUCCESS(rc))
3405 {
3406 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
3407 pScreen->pHwScreen = p;
3408 }
3409 else
3410 {
3411 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
3412 vmsvga3dHwScreenDestroy(pState, p);
3413 RTMemFree(p);
3414 }
3415
3416 return rc;
3417}
3418
3419
3420static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3421{
3422 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3423 AssertReturn(pState, VERR_INVALID_STATE);
3424
3425 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
3426
3427 if (pScreen->pHwScreen)
3428 {
3429 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
3430 RTMemFree(pScreen->pHwScreen);
3431 pScreen->pHwScreen = NULL;
3432 }
3433
3434 return VINF_SUCCESS;
3435}
3436
3437
3438static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3439 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
3440 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
3441{
3442 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
3443
3444 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3445 AssertReturn(pState, VERR_INVALID_STATE);
3446
3447 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3448 AssertReturn(pBackend, VERR_INVALID_STATE);
3449
3450 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
3451 AssertReturn(p, VERR_NOT_SUPPORTED);
3452
3453 PVMSVGA3DSURFACE pSurface;
3454 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
3455 AssertRCReturn(rc, rc);
3456
3457 /** @todo Implement. */
3458 AssertFailed();
3459 return VERR_NOT_IMPLEMENTED;
3460}
3461
3462
3463static DECLCALLBACK(int) vmsvga3dBackSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
3464 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
3465{
3466 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3467 AssertReturn(pState, VERR_INVALID_STATE);
3468
3469 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3470 AssertReturn(pBackend, VERR_INVALID_STATE);
3471
3472 PVMSVGA3DSURFACE pSurface;
3473 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3474 AssertRCReturn(rc, rc);
3475
3476 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3477 AssertPtrReturn(pBackendSurface, VERR_INVALID_STATE);
3478
3479 PVMSVGA3DMIPMAPLEVEL pMipLevel;
3480 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3481 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3482
3483 /* A surface is always mapped by the DX context which has created the surface. */
3484 DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
3485 AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
3486
3487 SVGA3dBox clipBox;
3488 if (pBox)
3489 {
3490 clipBox = *pBox;
3491 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
3492 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
3493 }
3494 else
3495 {
3496 clipBox.x = 0;
3497 clipBox.y = 0;
3498 clipBox.z = 0;
3499 clipBox.w = pMipLevel->mipmapSize.width;
3500 clipBox.h = pMipLevel->mipmapSize.height;
3501 clipBox.d = pMipLevel->mipmapSize.depth;
3502 }
3503
3504 D3D11_MAP d3d11MapType;
3505 switch (enmMapType)
3506 {
3507 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
3508 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
3509 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
3510 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
3511 default:
3512 AssertFailed();
3513 return VERR_INVALID_PARAMETER;
3514 }
3515
3516 D3D11_MAPPED_SUBRESOURCE mappedResource;
3517 RT_ZERO(mappedResource);
3518
3519 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3520 {
3521 Assert(pImage->face == 0 && pImage->mipmap == 0);
3522
3523 /* Wait for the surface to finish drawing. */
3524 dxSurfaceWait(pState, pSurface, pSurface->idAssociatedContext);
3525
3526 ID3D11Texture2D *pMappedTexture;
3527 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3528 {
3529 pMappedTexture = pBackendSurface->staging.pTexture2D;
3530
3531 /* Copy the texture content to the staging texture. */
3532 pDevice->pImmediateContext->CopyResource(pBackendSurface->staging.pTexture2D, pBackendSurface->u.pTexture2D);
3533 }
3534 else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3535 pMappedTexture = pBackendSurface->staging.pTexture2D;
3536 else
3537 pMappedTexture = pBackendSurface->dynamic.pTexture2D;
3538
3539 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
3540 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
3541 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3542 if (SUCCEEDED(hr))
3543 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3544 mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3545 else
3546 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3547 }
3548 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3549 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3550 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3551 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3552 {
3553 dxSurfaceWait(pState, pSurface, pSurface->idAssociatedContext);
3554
3555 ID3D11Resource *pMappedResource;
3556 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3557 {
3558 pMappedResource = pBackendSurface->staging.pResource;
3559
3560 /* Copy the texture content to the staging texture.
3561 * The requested miplevel of the texture is copied to the miplevel 0 of the staging texture,
3562 * because the staging (and dynamic) structures do not have miplevels.
3563 * Always copy entire miplevel so all Dst are zero and pSrcBox is NULL, as D3D11 requires.
3564 */
3565 ID3D11Resource *pDstResource = pMappedResource;
3566 UINT DstSubresource = 0;
3567 UINT DstX = 0;
3568 UINT DstY = 0;
3569 UINT DstZ = 0;
3570 ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3571 UINT SrcSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3572 D3D11_BOX *pSrcBox = NULL;
3573 //D3D11_BOX SrcBox;
3574 //SrcBox.left = 0;
3575 //SrcBox.top = 0;
3576 //SrcBox.front = 0;
3577 //SrcBox.right = pMipLevel->mipmapSize.width;
3578 //SrcBox.bottom = pMipLevel->mipmapSize.height;
3579 //SrcBox.back = pMipLevel->mipmapSize.depth;
3580 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3581 pSrcResource, SrcSubresource, pSrcBox);
3582 }
3583 else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3584 pMappedResource = pBackendSurface->staging.pResource;
3585 else
3586 pMappedResource = pBackendSurface->dynamic.pResource;
3587
3588 UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3589 HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3590 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3591 if (SUCCEEDED(hr))
3592 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3593 mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3594 else
3595 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3596 }
3597 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3598 {
3599 /* Map the staging buffer. */
3600 rc = dxStagingBufferRealloc(pDevice, pMipLevel->cbSurface);
3601 if (RT_SUCCESS(rc))
3602 {
3603 /* The staging buffer does not allow D3D11_MAP_WRITE_DISCARD, so replace it. */
3604 if (d3d11MapType == D3D11_MAP_WRITE_DISCARD)
3605 d3d11MapType = D3D11_MAP_WRITE;
3606
3607 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3608 {
3609 /* Copy from the buffer to the staging buffer. */
3610 ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
3611 UINT DstSubresource = 0;
3612 UINT DstX = clipBox.x;
3613 UINT DstY = clipBox.y;
3614 UINT DstZ = clipBox.z;
3615 ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3616 UINT SrcSubresource = 0;
3617 D3D11_BOX SrcBox;
3618 SrcBox.left = clipBox.x;
3619 SrcBox.top = clipBox.y;
3620 SrcBox.front = clipBox.z;
3621 SrcBox.right = clipBox.w;
3622 SrcBox.bottom = clipBox.h;
3623 SrcBox.back = clipBox.d;
3624 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3625 pSrcResource, SrcSubresource, &SrcBox);
3626 }
3627
3628 UINT const Subresource = 0; /* Buffers have only one subresource. */
3629 HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
3630 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3631 if (SUCCEEDED(hr))
3632 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3633 mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3634 else
3635 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3636 }
3637 }
3638 else
3639 {
3640 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
3641 /** @todo Implement. */
3642 AssertFailed();
3643 rc = VERR_NOT_IMPLEMENTED;
3644 }
3645
3646 return rc;
3647}
3648
3649
3650static DECLCALLBACK(int) vmsvga3dBackSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
3651{
3652 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3653 AssertReturn(pState, VERR_INVALID_STATE);
3654
3655 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3656 AssertReturn(pBackend, VERR_INVALID_STATE);
3657
3658 PVMSVGA3DSURFACE pSurface;
3659 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3660 AssertRCReturn(rc, rc);
3661
3662 /* The called should not use the function for system memory surfaces. */
3663 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3664 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3665
3666 PVMSVGA3DMIPMAPLEVEL pMipLevel;
3667 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3668 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3669
3670 /* A surface is always mapped by the DX context which has created the surface. */
3671 DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
3672 AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
3673
3674 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3675 {
3676 ID3D11Texture2D *pMappedTexture;
3677 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3678 pMappedTexture = pBackendSurface->staging.pTexture2D;
3679 else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3680 pMappedTexture = pBackendSurface->staging.pTexture2D;
3681 else
3682 pMappedTexture = pBackendSurface->dynamic.pTexture2D;
3683
3684 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
3685 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
3686
3687 if ( fWritten
3688 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3689 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3690 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3691 {
3692 ID3D11Resource *pDstResource = pBackendSurface->u.pTexture2D;
3693 UINT DstSubresource = Subresource;
3694 UINT DstX = pMap->box.x;
3695 UINT DstY = pMap->box.y;
3696 UINT DstZ = pMap->box.z;
3697 ID3D11Resource *pSrcResource = pMappedTexture;
3698 UINT SrcSubresource = Subresource;
3699 D3D11_BOX SrcBox;
3700 SrcBox.left = pMap->box.x;
3701 SrcBox.top = pMap->box.y;
3702 SrcBox.front = pMap->box.z;
3703 SrcBox.right = pMap->box.x + pMap->box.w;
3704 SrcBox.bottom = pMap->box.y + pMap->box.h;
3705 SrcBox.back = pMap->box.z + pMap->box.d;
3706
3707 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3708 pSrcResource, SrcSubresource, &SrcBox);
3709
3710 pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
3711 }
3712 }
3713 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3714 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3715 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3716 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3717 {
3718 ID3D11Resource *pMappedResource;
3719 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3720 pMappedResource = pBackendSurface->staging.pResource;
3721 else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3722 pMappedResource = pBackendSurface->staging.pResource;
3723 else
3724 pMappedResource = pBackendSurface->dynamic.pResource;
3725
3726 UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3727 pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3728
3729 if ( fWritten
3730 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3731 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3732 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3733 {
3734 /* If entire resource must be copied then use pSrcBox = NULL and dst point (0,0,0)
3735 * Because DX11 insists on this for some resource types, for example DEPTH_STENCIL resources.
3736 */
3737 uint32_t const cWidth0 = pSurface->paMipmapLevels[0].mipmapSize.width;
3738 uint32_t const cHeight0 = pSurface->paMipmapLevels[0].mipmapSize.height;
3739 uint32_t const cDepth0 = pSurface->paMipmapLevels[0].mipmapSize.depth;
3740 /** @todo Entire subresource is always mapped. So find a way to copy it back, important for DEPTH_STENCIL mipmaps. */
3741 bool const fEntireResource = pMap->box.x == 0 && pMap->box.y == 0 && pMap->box.z == 0
3742 && pMap->box.w == cWidth0 && pMap->box.h == cHeight0 && pMap->box.d == cDepth0;
3743
3744 ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3745 UINT DstSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3746 UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3747 UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3748 UINT DstZ = pMap->box.z;
3749 ID3D11Resource *pSrcResource = pMappedResource;
3750 UINT SrcSubresource = Subresource;
3751 D3D11_BOX *pSrcBox;
3752 D3D11_BOX SrcBox;
3753 if (fEntireResource)
3754 pSrcBox = NULL;
3755 else
3756 {
3757 uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3758 uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3759
3760 SrcBox.left = DstX;
3761 SrcBox.top = DstY;
3762 SrcBox.front = DstZ;
3763 SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3764 SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3765 SrcBox.back = DstZ + pMap->box.d;
3766 pSrcBox = &SrcBox;
3767 }
3768
3769 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3770 pSrcResource, SrcSubresource, pSrcBox);
3771
3772 pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
3773 }
3774 }
3775 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3776 {
3777 /* Unmap the staging buffer. */
3778 UINT const Subresource = 0; /* Buffers have only one subresource. */
3779 pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
3780
3781 /* Copy from the staging buffer to the actual buffer */
3782 if ( fWritten
3783 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3784 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3785 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3786 {
3787 ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3788 UINT DstSubresource = 0;
3789 UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3790 UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3791 UINT DstZ = pMap->box.z;
3792 ID3D11Resource *pSrcResource = pDevice->pStagingBuffer;
3793 UINT SrcSubresource = 0;
3794 D3D11_BOX SrcBox;
3795
3796 uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3797 uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3798
3799 SrcBox.left = DstX;
3800 SrcBox.top = DstY;
3801 SrcBox.front = DstZ;
3802 SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3803 SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3804 SrcBox.back = DstZ + pMap->box.d;
3805
3806 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3807 pSrcResource, SrcSubresource, &SrcBox);
3808 }
3809 }
3810 else
3811 {
3812 AssertFailed();
3813 rc = VERR_NOT_IMPLEMENTED;
3814 }
3815
3816 return rc;
3817}
3818
3819
3820static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
3821{
3822 int rc = VINF_SUCCESS;
3823
3824 PVMSVGA3DSURFACE pSurface;
3825 if (sid != SVGA_ID_INVALID)
3826 {
3827 /* Create the surface if does not yet exist. */
3828 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3829 AssertReturn(pState, VERR_INVALID_STATE);
3830
3831 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
3832 AssertRCReturn(rc, rc);
3833
3834 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
3835 {
3836 /* Create the actual texture. */
3837 rc = vmsvga3dBackSurfaceCreateScreenTarget(pThisCC, pSurface);
3838 AssertRCReturn(rc, rc);
3839 }
3840 }
3841 else
3842 pSurface = NULL;
3843
3844 /* Notify the HW accelerated screen if it is used. */
3845 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3846 if (!pHwScreen)
3847 return VINF_SUCCESS;
3848
3849 /* Same surface -> do nothing. */
3850 if (pHwScreen->sidScreenTarget == sid)
3851 return VINF_SUCCESS;
3852
3853 if (sid != SVGA_ID_INVALID)
3854 {
3855 AssertReturn( pSurface->pBackendSurface
3856 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
3857
3858 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
3859 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
3860 }
3861
3862 if (RT_SUCCESS(rc))
3863 {
3864 pHwScreen->sidScreenTarget = sid;
3865 }
3866
3867 return rc;
3868}
3869
3870
3871static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
3872{
3873 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3874 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
3875
3876 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
3877 return VINF_SUCCESS; /* No surface bound. */
3878
3879 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3880 AssertReturn(pState, VERR_INVALID_STATE);
3881
3882 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3883 AssertReturn(pBackend, VERR_INVALID_STATE);
3884
3885 PVMSVGA3DSURFACE pSurface;
3886 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
3887 AssertRCReturn(rc, rc);
3888
3889 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3890 AssertReturn(pBackendSurface && pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
3891
3892 SVGA3dRect boundRect;
3893 boundRect.x = 0;
3894 boundRect.y = 0;
3895 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
3896 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
3897 SVGA3dRect clipRect = *pRect;
3898 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
3899 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
3900
3901 /* Wait for the surface to finish drawing. */
3902 dxSurfaceWait(pState, pSurface, DX_CID_BACKEND);
3903
3904 /* Copy the screen texture to the shared surface. */
3905 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
3906 if (result == S_OK)
3907 {
3908 pBackend->dxDevice.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.pTexture2D);
3909
3910 dxDeviceFlush(&pBackend->dxDevice);
3911
3912 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
3913 }
3914 else
3915 AssertFailed();
3916
3917 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
3918 return rc;
3919}
3920
3921
3922/*
3923 *
3924 * 3D interface.
3925 *
3926 */
3927
3928static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
3929{
3930 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3931 AssertReturn(pState, VERR_INVALID_STATE);
3932
3933 int rc = VINF_SUCCESS;
3934
3935 *pu32Val = 0;
3936
3937 if (idx3dCaps > SVGA3D_DEVCAP_MAX)
3938 {
3939 LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
3940 return VERR_NOT_SUPPORTED;
3941 }
3942
3943 D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->dxDevice.FeatureLevel;
3944
3945 /* Most values are taken from:
3946 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
3947 *
3948 * Shader values are from
3949 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
3950 */
3951
3952 switch (idx3dCaps)
3953 {
3954 case SVGA3D_DEVCAP_3D:
3955 *pu32Val = 1;
3956 break;
3957
3958 case SVGA3D_DEVCAP_MAX_LIGHTS:
3959 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
3960 break;
3961
3962 case SVGA3D_DEVCAP_MAX_TEXTURES:
3963 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
3964 break;
3965
3966 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
3967 *pu32Val = SVGA3D_NUM_CLIPPLANES;
3968 break;
3969
3970 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
3971 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3972 *pu32Val = SVGA3DVSVERSION_40;
3973 else
3974 *pu32Val = SVGA3DVSVERSION_30;
3975 break;
3976
3977 case SVGA3D_DEVCAP_VERTEX_SHADER:
3978 *pu32Val = 1;
3979 break;
3980
3981 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
3982 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3983 *pu32Val = SVGA3DPSVERSION_40;
3984 else
3985 *pu32Val = SVGA3DPSVERSION_30;
3986 break;
3987
3988 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
3989 *pu32Val = 1;
3990 break;
3991
3992 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
3993 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3994 *pu32Val = 8;
3995 else
3996 *pu32Val = 4;
3997 break;
3998
3999 case SVGA3D_DEVCAP_S23E8_TEXTURES:
4000 case SVGA3D_DEVCAP_S10E5_TEXTURES:
4001 /* Must be obsolete by now; surface format caps specify the same thing. */
4002 break;
4003
4004 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
4005 /* Obsolete */
4006 break;
4007
4008 /*
4009 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
4010 * return TRUE. Even on physical hardware that does not support
4011 * these formats natively, the SVGA3D device will provide an emulation
4012 * which should be invisible to the guest OS.
4013 */
4014 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
4015 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
4016 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
4017 *pu32Val = 1;
4018 break;
4019
4020 case SVGA3D_DEVCAP_QUERY_TYPES:
4021 /* Obsolete */
4022 break;
4023
4024 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
4025 /* Obsolete */
4026 break;
4027
4028 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
4029 AssertCompile(sizeof(uint32_t) == sizeof(float));
4030 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
4031 break;
4032
4033 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
4034 /* Obsolete */
4035 break;
4036
4037 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
4038 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
4039 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4040 *pu32Val = 16384;
4041 else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4042 *pu32Val = 8192;
4043 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4044 *pu32Val = 4096;
4045 else
4046 *pu32Val = 2048;
4047 break;
4048
4049 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
4050 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4051 *pu32Val = 2048;
4052 else
4053 *pu32Val = 256;
4054 break;
4055
4056 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
4057 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4058 *pu32Val = 16384;
4059 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4060 *pu32Val = 8192;
4061 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4062 *pu32Val = 2048;
4063 else
4064 *pu32Val = 128;
4065 break;
4066
4067 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
4068 /* Obsolete */
4069 break;
4070
4071 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
4072 if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4073 *pu32Val = D3D11_REQ_MAXANISOTROPY;
4074 else
4075 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
4076 break;
4077
4078 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
4079 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4080 *pu32Val = UINT32_MAX;
4081 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4082 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
4083 else
4084 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
4085 break;
4086
4087 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
4088 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4089 *pu32Val = UINT32_MAX;
4090 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4091 *pu32Val = 1048575;
4092 else
4093 *pu32Val = 65534;
4094 break;
4095
4096 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
4097 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4098 *pu32Val = UINT32_MAX;
4099 else
4100 *pu32Val = 512;
4101 break;
4102
4103 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
4104 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4105 *pu32Val = UINT32_MAX;
4106 else
4107 *pu32Val = 512;
4108 break;
4109
4110 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
4111 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4112 *pu32Val = 4096;
4113 else
4114 *pu32Val = 32;
4115 break;
4116
4117 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
4118 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4119 *pu32Val = 4096;
4120 else
4121 *pu32Val = 32;
4122 break;
4123
4124 case SVGA3D_DEVCAP_TEXTURE_OPS:
4125 /* Obsolete */
4126 break;
4127
4128 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
4129 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
4130 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
4131 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
4132 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
4133 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
4134 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
4135 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
4136 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
4137 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
4138 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
4139 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
4140 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
4141 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
4142 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
4143 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
4144 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
4145 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
4146 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
4147 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
4148 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
4149 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
4150 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
4151 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
4152 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
4153 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
4154 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
4155 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
4156 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
4157 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
4158 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
4159 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
4160 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
4161 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
4162 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
4163 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
4164 case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
4165 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
4166 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
4167 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
4168 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
4169 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
4170 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
4171 {
4172 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
4173 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
4174 break;
4175 }
4176
4177 case SVGA3D_DEVCAP_MISSING62:
4178 /* Unused */
4179 break;
4180
4181 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
4182 /* Obsolete */
4183 break;
4184
4185 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
4186 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4187 *pu32Val = 8;
4188 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4189 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
4190 else
4191 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
4192 break;
4193
4194 case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
4195 case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
4196 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
4197 break;
4198
4199 case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
4200 /* Obsolete */
4201 break;
4202
4203 case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
4204 /* Obsolete */
4205 break;
4206
4207 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
4208 *pu32Val = 1;
4209 break;
4210
4211 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
4212 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
4213 break;
4214
4215 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
4216 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
4217 break;
4218
4219 case SVGA3D_DEVCAP_DEAD1:
4220 /* Obsolete */
4221 break;
4222
4223 case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
4224 /* Obsolete */
4225 break;
4226
4227 case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
4228 /* Obsolete */
4229 break;
4230
4231 case SVGA3D_DEVCAP_LINE_AA:
4232 *pu32Val = 1;
4233 break;
4234
4235 case SVGA3D_DEVCAP_LINE_STIPPLE:
4236 *pu32Val = 0; /* DX11 does not seem to support this directly. */
4237 break;
4238
4239 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
4240 AssertCompile(sizeof(uint32_t) == sizeof(float));
4241 *(float *)pu32Val = 1.0f;
4242 break;
4243
4244 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
4245 AssertCompile(sizeof(uint32_t) == sizeof(float));
4246 *(float *)pu32Val = 1.0f;
4247 break;
4248
4249 case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
4250 /* Deprecated. */
4251 AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
4252 break;
4253
4254 case SVGA3D_DEVCAP_TS_COLOR_KEY:
4255 *pu32Val = 0; /* DX11 does not seem to support this directly. */
4256 break;
4257
4258 case SVGA3D_DEVCAP_DEAD2:
4259 break;
4260
4261 case SVGA3D_DEVCAP_DXCONTEXT:
4262 *pu32Val = 1;
4263 break;
4264
4265 case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
4266 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
4267 break;
4268
4269 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
4270 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
4271 break;
4272
4273 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
4274 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
4275 break;
4276
4277 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
4278 *pu32Val = 0; /* boolean */
4279 break;
4280
4281 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
4282 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
4283 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
4284 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
4285 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
4286 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
4287 case SVGA3D_DEVCAP_DXFMT_Z_D32:
4288 case SVGA3D_DEVCAP_DXFMT_Z_D16:
4289 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
4290 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
4291 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
4292 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
4293 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
4294 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
4295 case SVGA3D_DEVCAP_DXFMT_DXT1:
4296 case SVGA3D_DEVCAP_DXFMT_DXT2:
4297 case SVGA3D_DEVCAP_DXFMT_DXT3:
4298 case SVGA3D_DEVCAP_DXFMT_DXT4:
4299 case SVGA3D_DEVCAP_DXFMT_DXT5:
4300 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
4301 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
4302 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
4303 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
4304 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
4305 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
4306 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
4307 case SVGA3D_DEVCAP_DXFMT_V8U8:
4308 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
4309 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
4310 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
4311 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
4312 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
4313 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
4314 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
4315 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
4316 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
4317 case SVGA3D_DEVCAP_DXFMT_BUFFER:
4318 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
4319 case SVGA3D_DEVCAP_DXFMT_V16U16:
4320 case SVGA3D_DEVCAP_DXFMT_G16R16:
4321 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
4322 case SVGA3D_DEVCAP_DXFMT_UYVY:
4323 case SVGA3D_DEVCAP_DXFMT_YUY2:
4324 case SVGA3D_DEVCAP_DXFMT_NV12:
4325 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
4326 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
4327 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
4328 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
4329 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
4330 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
4331 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
4332 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
4333 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
4334 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
4335 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
4336 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
4337 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
4338 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
4339 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
4340 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
4341 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
4342 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
4343 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
4344 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
4345 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
4346 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
4347 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
4348 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
4349 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
4350 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
4351 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
4352 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
4353 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
4354 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
4355 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
4356 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
4357 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
4358 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
4359 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
4360 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
4361 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
4362 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
4363 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
4364 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
4365 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
4366 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
4367 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
4368 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
4369 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
4370 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
4371 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
4372 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
4373 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
4374 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
4375 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
4376 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
4377 case SVGA3D_DEVCAP_DXFMT_P8:
4378 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
4379 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
4380 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
4381 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
4382 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
4383 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
4384 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
4385 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
4386 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
4387 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
4388 case SVGA3D_DEVCAP_DXFMT_ATI1:
4389 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
4390 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
4391 case SVGA3D_DEVCAP_DXFMT_ATI2:
4392 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
4393 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
4394 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
4395 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
4396 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
4397 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
4398 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
4399 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
4400 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
4401 case SVGA3D_DEVCAP_DXFMT_YV12:
4402 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
4403 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
4404 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
4405 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
4406 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
4407 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
4408 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
4409 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
4410 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
4411 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
4412 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
4413 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
4414 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
4415 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
4416 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
4417 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
4418 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
4419 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
4420 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
4421 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
4422 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
4423 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
4424 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
4425 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
4426 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
4427 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
4428 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
4429 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
4430 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
4431 {
4432 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
4433 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
4434 break;
4435 }
4436
4437 case SVGA3D_DEVCAP_SM41:
4438 *pu32Val = 0; /* boolean */
4439 break;
4440
4441 case SVGA3D_DEVCAP_MULTISAMPLE_2X:
4442 *pu32Val = 0; /* boolean */
4443 break;
4444
4445 case SVGA3D_DEVCAP_MULTISAMPLE_4X:
4446 *pu32Val = 0; /* boolean */
4447 break;
4448
4449 case SVGA3D_DEVCAP_MS_FULL_QUALITY:
4450 *pu32Val = 0; /* boolean */
4451 break;
4452
4453 case SVGA3D_DEVCAP_LOGICOPS:
4454 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
4455 *pu32Val = 0; /* boolean */
4456 break;
4457
4458 case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
4459 *pu32Val = 0; /* boolean */
4460 break;
4461
4462 case SVGA3D_DEVCAP_RESERVED_1:
4463 break;
4464
4465 case SVGA3D_DEVCAP_RESERVED_2:
4466 break;
4467
4468 case SVGA3D_DEVCAP_SM5:
4469 *pu32Val = 0; /* boolean */
4470 break;
4471
4472 case SVGA3D_DEVCAP_MULTISAMPLE_8X:
4473 *pu32Val = 0; /* boolean */
4474 break;
4475
4476 case SVGA3D_DEVCAP_MAX:
4477 case SVGA3D_DEVCAP_INVALID:
4478 rc = VERR_NOT_SUPPORTED;
4479 break;
4480 }
4481
4482 return rc;
4483}
4484
4485
4486static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
4487{
4488 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4489 AssertReturn(pState, VERR_INVALID_STATE);
4490
4491 return VINF_SUCCESS;
4492}
4493
4494
4495static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
4496 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
4497{
4498 RT_NOREF(cCopyBoxes, pBox);
4499
4500 LogFunc(("src sid %d -> dst sid %d\n", src.sid, dest.sid));
4501
4502 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4503 AssertReturn(pState, VERR_INVALID_STATE);
4504
4505 PVMSVGA3DBACKEND pBackend = pState->pBackend;
4506
4507 PVMSVGA3DSURFACE pSrcSurface;
4508 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, src.sid, &pSrcSurface);
4509 AssertRCReturn(rc, rc);
4510
4511 PVMSVGA3DSURFACE pDstSurface;
4512 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dest.sid, &pDstSurface);
4513 AssertRCReturn(rc, rc);
4514
4515 LogFunc(("src%s cid %d -> dst%s cid %d\n",
4516 pSrcSurface->pBackendSurface ? "" : " sysmem",
4517 pSrcSurface ? pSrcSurface->idAssociatedContext : SVGA_ID_INVALID,
4518 pDstSurface->pBackendSurface ? "" : " sysmem",
4519 pDstSurface ? pDstSurface->idAssociatedContext : SVGA_ID_INVALID));
4520
4521 //DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
4522 //AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4523
4524 if (pSrcSurface->pBackendSurface)
4525 {
4526 if (pDstSurface->pBackendSurface == NULL)
4527 {
4528 /* Create the target if it can be used as a device context shared resource (render or screen target). */
4529 if (pBackend->fSingleDevice || dxIsSurfaceShareable(pDstSurface))
4530 {
4531 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, NULL, pDstSurface);
4532 AssertRCReturn(rc, rc);
4533 }
4534 }
4535
4536 if (pDstSurface->pBackendSurface)
4537 {
4538 /* Surface -> Surface. */
4539 /* Expect both of them to be shared surfaces created by the backend context. */
4540 Assert(pSrcSurface->idAssociatedContext == DX_CID_BACKEND && pDstSurface->idAssociatedContext == DX_CID_BACKEND);
4541
4542 /* Wait for the source surface to finish drawing. */
4543 dxSurfaceWait(pState, pSrcSurface, DX_CID_BACKEND);
4544
4545 DXDEVICE *pDXDevice = &pBackend->dxDevice;
4546
4547 /* Clip the box. */
4548 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
4549 rc = vmsvga3dMipmapLevel(pSrcSurface, src.face, src.mipmap, &pSrcMipLevel);
4550 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4551
4552 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
4553 rc = vmsvga3dMipmapLevel(pDstSurface, dest.face, dest.mipmap, &pDstMipLevel);
4554 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4555
4556 SVGA3dCopyBox clipBox = *pBox;
4557 vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
4558
4559 UINT DstSubresource = vmsvga3dCalcSubresource(dest.mipmap, dest.face, pDstSurface->cLevels);
4560 UINT DstX = clipBox.x;
4561 UINT DstY = clipBox.y;
4562 UINT DstZ = clipBox.z;
4563
4564 UINT SrcSubresource = vmsvga3dCalcSubresource(src.mipmap, src.face, pSrcSurface->cLevels);
4565 D3D11_BOX SrcBox;
4566 SrcBox.left = clipBox.srcx;
4567 SrcBox.top = clipBox.srcy;
4568 SrcBox.front = clipBox.srcz;
4569 SrcBox.right = clipBox.srcx + clipBox.w;
4570 SrcBox.bottom = clipBox.srcy + clipBox.h;
4571 SrcBox.back = clipBox.srcz + clipBox.d;
4572
4573 Assert(cCopyBoxes == 1); /** @todo */
4574
4575 ID3D11Resource *pDstResource;
4576 ID3D11Resource *pSrcResource;
4577 pDstResource = dxResource(pState, pDstSurface, NULL);
4578 pSrcResource = dxResource(pState, pSrcSurface, NULL);
4579
4580 pDXDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4581 pSrcResource, SrcSubresource, &SrcBox);
4582
4583 pDstSurface->pBackendSurface->cidDrawing = DX_CID_BACKEND;
4584 }
4585 else
4586 {
4587 /* Surface -> Memory. */
4588 AssertFailed(); /** @todo implement */
4589 }
4590 }
4591 else
4592 {
4593 /* Memory -> Surface. */
4594 AssertFailed(); /** @todo implement */
4595 }
4596
4597 return rc;
4598}
4599
4600
4601static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
4602{
4603 RT_NOREF(pThisCC, idScreen, pOldViewport);
4604 /** @todo Scroll the screen content without requiring the guest to redraw. */
4605}
4606
4607
4608static DECLCALLBACK(int) vmsvga3dBackSurfaceUpdateHeapBuffers(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
4609{
4610 /** @todo */
4611 RT_NOREF(pThisCC, pSurface);
4612 return VERR_NOT_IMPLEMENTED;
4613}
4614
4615
4616/*
4617 *
4618 * VGPU9 callbacks. Not implemented.
4619 *
4620 */
4621/** @todo later */
4622
4623/**
4624 * Create a new 3d context
4625 *
4626 * @returns VBox status code.
4627 * @param pThisCC The VGA/VMSVGA state for ring-3.
4628 * @param cid Context id
4629 */
4630static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
4631{
4632 RT_NOREF(cid);
4633
4634 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4635 AssertReturn(pState, VERR_INVALID_STATE);
4636
4637 DEBUG_BREAKPOINT_TEST();
4638 return VERR_NOT_IMPLEMENTED;
4639}
4640
4641
4642/**
4643 * Destroy an existing 3d context
4644 *
4645 * @returns VBox status code.
4646 * @param pThisCC The VGA/VMSVGA state for ring-3.
4647 * @param cid Context id
4648 */
4649static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
4650{
4651 RT_NOREF(cid);
4652
4653 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4654 AssertReturn(pState, VERR_INVALID_STATE);
4655
4656 DEBUG_BREAKPOINT_TEST();
4657 return VINF_SUCCESS;
4658}
4659
4660
4661static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
4662{
4663 RT_NOREF(cid, type, matrix);
4664
4665 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4666 AssertReturn(pState, VERR_INVALID_STATE);
4667
4668 DEBUG_BREAKPOINT_TEST();
4669 return VINF_SUCCESS;
4670}
4671
4672
4673static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
4674{
4675 RT_NOREF(cid, zRange);
4676
4677 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4678 AssertReturn(pState, VERR_INVALID_STATE);
4679
4680 DEBUG_BREAKPOINT_TEST();
4681 return VINF_SUCCESS;
4682}
4683
4684
4685static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
4686{
4687 RT_NOREF(cid, cRenderStates, pRenderState);
4688
4689 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4690 AssertReturn(pState, VERR_INVALID_STATE);
4691
4692 DEBUG_BREAKPOINT_TEST();
4693 return VINF_SUCCESS;
4694}
4695
4696
4697static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
4698{
4699 RT_NOREF(cid, type, target);
4700
4701 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4702 AssertReturn(pState, VERR_INVALID_STATE);
4703
4704 DEBUG_BREAKPOINT_TEST();
4705 return VINF_SUCCESS;
4706}
4707
4708
4709static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
4710{
4711 RT_NOREF(cid, cTextureStates, pTextureState);
4712
4713 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4714 AssertReturn(pState, VERR_INVALID_STATE);
4715
4716 DEBUG_BREAKPOINT_TEST();
4717 return VINF_SUCCESS;
4718}
4719
4720
4721static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
4722{
4723 RT_NOREF(cid, face, pMaterial);
4724
4725 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4726 AssertReturn(pState, VERR_INVALID_STATE);
4727
4728 DEBUG_BREAKPOINT_TEST();
4729 return VINF_SUCCESS;
4730}
4731
4732
4733static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
4734{
4735 RT_NOREF(cid, index, pData);
4736
4737 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4738 AssertReturn(pState, VERR_INVALID_STATE);
4739
4740 DEBUG_BREAKPOINT_TEST();
4741 return VINF_SUCCESS;
4742}
4743
4744
4745static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
4746{
4747 RT_NOREF(cid, index, enabled);
4748
4749 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4750 AssertReturn(pState, VERR_INVALID_STATE);
4751
4752 DEBUG_BREAKPOINT_TEST();
4753 return VINF_SUCCESS;
4754}
4755
4756
4757static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4758{
4759 RT_NOREF(cid, pRect);
4760
4761 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4762 AssertReturn(pState, VERR_INVALID_STATE);
4763
4764 DEBUG_BREAKPOINT_TEST();
4765 return VINF_SUCCESS;
4766}
4767
4768
4769static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
4770{
4771 RT_NOREF(cid, index, plane);
4772
4773 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4774 AssertReturn(pState, VERR_INVALID_STATE);
4775
4776 DEBUG_BREAKPOINT_TEST();
4777 return VINF_SUCCESS;
4778}
4779
4780
4781static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
4782 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
4783{
4784 /* From SVGA3D_BeginClear comments:
4785 *
4786 * Clear is not affected by clipping, depth test, or other
4787 * render state which affects the fragment pipeline.
4788 *
4789 * Therefore this code must ignore the current scissor rect.
4790 */
4791
4792 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
4793
4794 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4795 AssertReturn(pState, VERR_INVALID_STATE);
4796
4797 DEBUG_BREAKPOINT_TEST();
4798 return VINF_SUCCESS;
4799}
4800
4801
4802static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
4803 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
4804 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
4805{
4806 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
4807
4808 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4809 AssertReturn(pState, VERR_INVALID_STATE);
4810
4811 DEBUG_BREAKPOINT_TEST();
4812 return VINF_SUCCESS;
4813}
4814
4815
4816static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4817{
4818 RT_NOREF(cid, pRect);
4819
4820 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4821 AssertReturn(pState, VERR_INVALID_STATE);
4822
4823 DEBUG_BREAKPOINT_TEST();
4824 return VINF_SUCCESS;
4825}
4826
4827
4828static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
4829{
4830 RT_NOREF(sid, filter);
4831
4832 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4833 AssertReturn(pState, VERR_INVALID_STATE);
4834
4835 DEBUG_BREAKPOINT_TEST();
4836 return VINF_SUCCESS;
4837}
4838
4839
4840static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
4841 uint32_t cbData, uint32_t *pShaderData)
4842{
4843 RT_NOREF(cid, shid, type, cbData, pShaderData);
4844
4845 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4846 AssertReturn(pState, VERR_INVALID_STATE);
4847
4848 DEBUG_BREAKPOINT_TEST();
4849 return VINF_SUCCESS;
4850}
4851
4852
4853static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
4854{
4855 RT_NOREF(cid, shid, type);
4856
4857 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4858 AssertReturn(pState, VERR_INVALID_STATE);
4859
4860 DEBUG_BREAKPOINT_TEST();
4861 return VINF_SUCCESS;
4862}
4863
4864
4865static DECLCALLBACK(int) vmsvga3dBackShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
4866{
4867 RT_NOREF(pContext, cid, type, shid);
4868
4869 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4870 AssertReturn(pState, VERR_INVALID_STATE);
4871
4872 DEBUG_BREAKPOINT_TEST();
4873 return VINF_SUCCESS;
4874}
4875
4876
4877static DECLCALLBACK(int) vmsvga3dBackShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
4878 SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
4879{
4880 RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
4881
4882 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4883 AssertReturn(pState, VERR_INVALID_STATE);
4884
4885 DEBUG_BREAKPOINT_TEST();
4886 return VINF_SUCCESS;
4887}
4888
4889static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryCreate(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4890{
4891 RT_NOREF(pThisCC, pContext);
4892 DEBUG_BREAKPOINT_TEST();
4893 return VINF_SUCCESS;
4894}
4895
4896static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryDelete(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4897{
4898 RT_NOREF(pThisCC, pContext);
4899 DEBUG_BREAKPOINT_TEST();
4900 return VINF_SUCCESS;
4901}
4902
4903static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryBegin(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4904{
4905 RT_NOREF(pThisCC, pContext);
4906 DEBUG_BREAKPOINT_TEST();
4907 return VINF_SUCCESS;
4908}
4909
4910static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryEnd(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4911{
4912 RT_NOREF(pThisCC, pContext);
4913 DEBUG_BREAKPOINT_TEST();
4914 return VINF_SUCCESS;
4915}
4916
4917static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryGetData(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
4918{
4919 RT_NOREF(pThisCC, pContext, pu32Pixels);
4920 DEBUG_BREAKPOINT_TEST();
4921 return VINF_SUCCESS;
4922}
4923
4924
4925/**
4926 * Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
4927 *
4928 * @param pThisCC The device context.
4929 * @param fClearCOTableEntry Whether to clear the corresponding COTable entry.
4930 * @param pSurface The surface being destroyed.
4931 */
4932static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface)
4933{
4934 RT_NOREF(pThisCC);
4935
4936 /* The caller should not use the function for system memory surfaces. */
4937 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
4938 if (!pBackendSurface)
4939 return;
4940 pSurface->pBackendSurface = NULL;
4941
4942 LogFunc(("sid=%u\n", pSurface->id));
4943
4944 /* If any views have been created for this resource, then also release them. */
4945 DXVIEW *pIter, *pNext;
4946 RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
4947 {
4948 LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
4949
4950 /** @todo The common DX code should track the views and clean COTable on a surface destruction. */
4951 if (fClearCOTableEntry)
4952 {
4953 PVMSVGA3DDXCONTEXT pDXContext;
4954 int rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pIter->cid, &pDXContext);
4955 AssertRC(rc);
4956 if (RT_SUCCESS(rc))
4957 {
4958 switch (pIter->enmViewType)
4959 {
4960 case VMSVGA3D_VIEWTYPE_RENDERTARGET:
4961 {
4962 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[pIter->viewId];
4963 RT_ZERO(*pEntry);
4964 break;
4965 }
4966 case VMSVGA3D_VIEWTYPE_DEPTHSTENCIL:
4967 {
4968 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[pIter->viewId];
4969 RT_ZERO(*pEntry);
4970 break;
4971 }
4972 case VMSVGA3D_VIEWTYPE_SHADERRESOURCE:
4973 {
4974 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[pIter->viewId];
4975 RT_ZERO(*pEntry);
4976 break;
4977 }
4978 case VMSVGA3D_VIEWTYPE_UNORDEREDACCESS:
4979 {
4980 SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[pIter->viewId];
4981 RT_ZERO(*pEntry);
4982 break;
4983 }
4984 default:
4985 AssertFailed();
4986 }
4987 }
4988 }
4989
4990 dxViewDestroy(pIter);
4991 }
4992
4993 if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET
4994 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
4995 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
4996 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
4997 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
4998 {
4999 D3D_RELEASE(pBackendSurface->staging.pResource);
5000 D3D_RELEASE(pBackendSurface->dynamic.pResource);
5001 D3D_RELEASE(pBackendSurface->u.pResource);
5002 }
5003 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
5004 {
5005 D3D_RELEASE(pBackendSurface->u.pBuffer);
5006 }
5007 else
5008 {
5009 AssertFailed();
5010 }
5011
5012 RTMemFree(pBackendSurface);
5013
5014 /* No context has created the surface, because the surface does not exist anymore. */
5015 pSurface->idAssociatedContext = SVGA_ID_INVALID;
5016}
5017
5018
5019static DECLCALLBACK(void) vmsvga3dBackSurfaceInvalidateImage(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface, uint32_t uFace, uint32_t uMipmap)
5020{
5021 RT_NOREF(pThisCC, uFace, uMipmap);
5022
5023 /* The caller should not use the function for system memory surfaces. */
5024 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5025 if (!pBackendSurface)
5026 return;
5027
5028 LogFunc(("sid=%u\n", pSurface->id));
5029
5030 /* The guest uses this to invalidate a buffer. */
5031 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
5032 {
5033 Assert(uFace == 0 && uMipmap == 0); /* The caller ensures this. */
5034 /** @todo This causes flickering when a buffer is invalidated and re-created right before a draw call. */
5035 //vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
5036 }
5037 else
5038 {
5039 /** @todo Delete views that have been created for this mipmap.
5040 * For now just delete all views, they will be recte=reated if necessary.
5041 */
5042 ASSERT_GUEST_FAILED();
5043 DXVIEW *pIter, *pNext;
5044 RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
5045 {
5046 dxViewDestroy(pIter);
5047 }
5048 }
5049}
5050
5051
5052/**
5053 * Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
5054 *
5055 * @returns VBox status code.
5056 * @param pThis The VGA device instance.
5057 * @param pState The VMSVGA3d state.
5058 * @param pDstSurface The destination host surface.
5059 * @param uDstFace The destination face (valid).
5060 * @param uDstMipmap The destination mipmap level (valid).
5061 * @param pDstBox The destination box.
5062 * @param pSrcSurface The source host surface.
5063 * @param uSrcFace The destination face (valid).
5064 * @param uSrcMipmap The source mimap level (valid).
5065 * @param pSrcBox The source box.
5066 * @param enmMode The strecht blt mode .
5067 * @param pContext The VMSVGA3d context (already current for OGL).
5068 */
5069static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
5070 PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
5071 PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
5072 SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
5073{
5074 RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
5075 pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
5076
5077 AssertFailed();
5078 return VINF_SUCCESS;
5079}
5080
5081
5082/**
5083 * Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
5084 *
5085 * @returns Failure status code or @a rc.
5086 * @param pThis The shared VGA/VMSVGA instance data.
5087 * @param pThisCC The VGA/VMSVGA state for ring-3.
5088 * @param pState The VMSVGA3d state.
5089 * @param pSurface The host surface.
5090 * @param pMipLevel Mipmap level. The caller knows it already.
5091 * @param uHostFace The host face (valid).
5092 * @param uHostMipmap The host mipmap level (valid).
5093 * @param GuestPtr The guest pointer.
5094 * @param cbGuestPitch The guest pitch.
5095 * @param transfer The transfer direction.
5096 * @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
5097 * @param pContext The context (for OpenGL).
5098 * @param rc The current rc for all boxes.
5099 * @param iBox The current box number (for Direct 3D).
5100 */
5101static DECLCALLBACK(int) vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
5102 PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
5103 SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
5104 SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
5105{
5106 RT_NOREF(pState, pMipLevel, pContext, iBox);
5107
5108 /* The called should not use the function for system memory surfaces. */
5109 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5110 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
5111
5112 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
5113 {
5114 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
5115 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
5116
5117 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
5118 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
5119 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
5120 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
5121 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
5122 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
5123 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
5124
5125 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
5126 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
5127 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
5128 */
5129 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
5130 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
5131
5132 SVGA3dSurfaceImageId image;
5133 image.sid = pSurface->id;
5134 image.face = uHostFace;
5135 image.mipmap = uHostMipmap;
5136
5137 SVGA3dBox box;
5138 box.x = pBox->x;
5139 box.y = pBox->y;
5140 box.z = 0;
5141 box.w = pBox->w;
5142 box.h = pBox->h;
5143 box.d = 1;
5144
5145 VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
5146 ? VMSVGA3D_SURFACE_MAP_WRITE
5147 : VMSVGA3D_SURFACE_MAP_READ;
5148
5149 VMSVGA3D_MAPPED_SURFACE map;
5150 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
5151 if (RT_SUCCESS(rc))
5152 {
5153 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
5154 * and offset of the first scanline.
5155 */
5156 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
5157 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
5158 uint32_t const offLockedBuf = 0;
5159
5160 rc = vmsvgaR3GmrTransfer(pThis,
5161 pThisCC,
5162 transfer,
5163 pu8LockedBuf,
5164 cbLockedBuf,
5165 offLockedBuf,
5166 map.cbRowPitch,
5167 GuestPtr,
5168 (uint32_t)uGuestOffset,
5169 cbGuestPitch,
5170 cBlocksX * pSurface->cbBlock,
5171 cBlocksY);
5172 AssertRC(rc);
5173
5174 // Log4(("first line:\n%.*Rhxd\n", cBlocksX * pSurface->cbBlock, LockedRect.pBits));
5175
5176 //vmsvga3dMapWriteBmpFile(&map, "Dynamic");
5177
5178 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
5179 }
5180#if 0
5181 //DEBUG_BREAKPOINT_TEST();
5182 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
5183 if (RT_SUCCESS(rc))
5184 {
5185 vmsvga3dMapWriteBmpFile(&map, "Staging");
5186
5187 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
5188 }
5189#endif
5190 }
5191 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
5192 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
5193 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
5194 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5195 {
5196 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
5197 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
5198 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
5199 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
5200 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
5201 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
5202 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
5203 AssertMsgReturn(cBlocksX && cBlocksY && pBox->d, ("Empty box %dx%dx%d\n", pBox->w, pBox->h, pBox->d), VERR_INTERNAL_ERROR);
5204
5205 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
5206 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
5207 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
5208 */
5209 uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
5210 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
5211
5212 /* 3D texture needs additional processing. */
5213 ASSERT_GUEST_RETURN( pBox->z < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5214 && pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5215 && pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->z,
5216 VERR_INVALID_PARAMETER);
5217 ASSERT_GUEST_RETURN( pBox->srcz < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5218 && pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5219 && pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->srcz,
5220 VERR_INVALID_PARAMETER);
5221
5222 uGuestOffset += pBox->srcz * pMipLevel->cbSurfacePlane;
5223
5224 SVGA3dSurfaceImageId image;
5225 image.sid = pSurface->id;
5226 image.face = uHostFace;
5227 image.mipmap = uHostMipmap;
5228
5229 SVGA3dBox box;
5230 box.x = pBox->x;
5231 box.y = pBox->y;
5232 box.z = pBox->z;
5233 box.w = pBox->w;
5234 box.h = pBox->h;
5235 box.d = pBox->d;
5236
5237 VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
5238 ? VMSVGA3D_SURFACE_MAP_WRITE
5239 : VMSVGA3D_SURFACE_MAP_READ;
5240
5241 VMSVGA3D_MAPPED_SURFACE map;
5242 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
5243 if (RT_SUCCESS(rc))
5244 {
5245#if 0
5246 if (box.w == 250 && box.h == 250 && box.d == 1 && enmMap == VMSVGA3D_SURFACE_MAP_READ)
5247 {
5248 DEBUG_BREAKPOINT_TEST();
5249 vmsvga3dMapWriteBmpFile(&map, "P");
5250 }
5251#endif
5252 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
5253 * and offset of the first scanline.
5254 */
5255 uint32_t cbLockedBuf = map.cbRowPitch * cBlocksY;
5256 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5257 cbLockedBuf += map.cbDepthPitch * (pBox->d - 1); /// @todo why map does not compute this for 2D textures
5258 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
5259 uint32_t offLockedBuf = 0;
5260
5261 for (uint32_t iPlane = 0; iPlane < pBox->d; ++iPlane)
5262 {
5263 AssertBreak(uGuestOffset < UINT32_MAX);
5264
5265 rc = vmsvgaR3GmrTransfer(pThis,
5266 pThisCC,
5267 transfer,
5268 pu8LockedBuf,
5269 cbLockedBuf,
5270 offLockedBuf,
5271 map.cbRowPitch,
5272 GuestPtr,
5273 (uint32_t)uGuestOffset,
5274 cbGuestPitch,
5275 cBlocksX * pSurface->cbBlock,
5276 cBlocksY);
5277 AssertRC(rc);
5278
5279 uGuestOffset += pMipLevel->cbSurfacePlane;
5280 offLockedBuf += map.cbDepthPitch;
5281 }
5282
5283 bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
5284 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, fWritten);
5285 }
5286 }
5287 else
5288 {
5289 AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
5290 rc = VERR_NOT_IMPLEMENTED;
5291 }
5292
5293 return rc;
5294}
5295
5296
5297/**
5298 * Create D3D/OpenGL texture object for the specified surface.
5299 *
5300 * Surfaces are created when needed.
5301 *
5302 * @param pThisCC The device context.
5303 * @param pContext The context.
5304 * @param idAssociatedContext Probably the same as pContext->id.
5305 * @param pSurface The surface to create the texture for.
5306 */
5307static DECLCALLBACK(int) vmsvga3dBackCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
5308 PVMSVGA3DSURFACE pSurface)
5309
5310{
5311 RT_NOREF(pThisCC, pContext, idAssociatedContext, pSurface);
5312
5313 AssertFailed();
5314 return VINF_SUCCESS;
5315}
5316
5317
5318/*
5319 * DX callbacks.
5320 */
5321
5322static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5323{
5324 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5325
5326 /* Allocate a backend specific context structure. */
5327 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
5328 AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
5329 pDXContext->pBackendDXContext = pBackendDXContext;
5330
5331 LogFunc(("cid %d\n", pDXContext->cid));
5332
5333 int rc = dxDeviceCreate(pBackend, &pBackendDXContext->dxDevice);
5334 return rc;
5335}
5336
5337
5338static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5339{
5340 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5341
5342 LogFunc(("cid %d\n", pDXContext->cid));
5343
5344 if (pDXContext->pBackendDXContext)
5345 {
5346 /* Clean up context resources. */
5347 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5348
5349 for (uint32_t idxShaderState = 0; idxShaderState < RT_ELEMENTS(pBackendDXContext->resources.shaderState); ++idxShaderState)
5350 {
5351 ID3D11Buffer **papConstantBuffer = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[0];
5352 D3D_RELEASE_ARRAY(RT_ELEMENTS(pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers), papConstantBuffer);
5353 }
5354
5355 for (uint32_t i = 0; i < RT_ELEMENTS(pBackendDXContext->resources.inputAssembly.vertexBuffers); ++i)
5356 {
5357 D3D_RELEASE(pBackendDXContext->resources.inputAssembly.vertexBuffers[i].pBuffer);
5358 }
5359
5360 D3D_RELEASE(pBackendDXContext->resources.inputAssembly.indexBuffer.pBuffer);
5361
5362 if (pBackendDXContext->dxDevice.pImmediateContext)
5363 dxDeviceFlush(&pBackendDXContext->dxDevice); /* Make sure that any pending draw calls are finished. */
5364
5365 if (pBackendDXContext->paRenderTargetView)
5366 {
5367 for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
5368 D3D_RELEASE(pBackendDXContext->paRenderTargetView[i].u.pRenderTargetView);
5369 }
5370 if (pBackendDXContext->paDepthStencilView)
5371 {
5372 for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
5373 D3D_RELEASE(pBackendDXContext->paDepthStencilView[i].u.pDepthStencilView);
5374 }
5375 if (pBackendDXContext->paShaderResourceView)
5376 {
5377 for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
5378 D3D_RELEASE(pBackendDXContext->paShaderResourceView[i].u.pShaderResourceView);
5379 }
5380 if (pBackendDXContext->paElementLayout)
5381 {
5382 for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
5383 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
5384 }
5385 if (pBackendDXContext->papBlendState)
5386 D3D_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
5387 if (pBackendDXContext->papDepthStencilState)
5388 D3D_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
5389 if (pBackendDXContext->papRasterizerState)
5390 D3D_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
5391 if (pBackendDXContext->papSamplerState)
5392 D3D_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
5393 if (pBackendDXContext->paQuery)
5394 {
5395 for (uint32_t i = 0; i < pBackendDXContext->cQuery; ++i)
5396 dxDestroyQuery(&pBackendDXContext->paQuery[i]);
5397 }
5398 if (pBackendDXContext->paShader)
5399 {
5400 for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
5401 dxDestroyShader(&pBackendDXContext->paShader[i]);
5402 }
5403 if (pBackendDXContext->paStreamOutput)
5404 {
5405 for (uint32_t i = 0; i < pBackendDXContext->cStreamOutput; ++i)
5406 dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
5407 }
5408
5409 RTMemFreeZ(pBackendDXContext->papBlendState, sizeof(pBackendDXContext->papBlendState[0]) * pBackendDXContext->cBlendState);
5410 RTMemFreeZ(pBackendDXContext->papDepthStencilState, sizeof(pBackendDXContext->papDepthStencilState[0]) * pBackendDXContext->cDepthStencilState);
5411 RTMemFreeZ(pBackendDXContext->papSamplerState, sizeof(pBackendDXContext->papSamplerState[0]) * pBackendDXContext->cSamplerState);
5412 RTMemFreeZ(pBackendDXContext->papRasterizerState, sizeof(pBackendDXContext->papRasterizerState[0]) * pBackendDXContext->cRasterizerState);
5413 RTMemFreeZ(pBackendDXContext->paElementLayout, sizeof(pBackendDXContext->paElementLayout[0]) * pBackendDXContext->cElementLayout);
5414 RTMemFreeZ(pBackendDXContext->paRenderTargetView, sizeof(pBackendDXContext->paRenderTargetView[0]) * pBackendDXContext->cRenderTargetView);
5415 RTMemFreeZ(pBackendDXContext->paDepthStencilView, sizeof(pBackendDXContext->paDepthStencilView[0]) * pBackendDXContext->cDepthStencilView);
5416 RTMemFreeZ(pBackendDXContext->paShaderResourceView, sizeof(pBackendDXContext->paShaderResourceView[0]) * pBackendDXContext->cShaderResourceView);
5417 RTMemFreeZ(pBackendDXContext->paQuery, sizeof(pBackendDXContext->paQuery[0]) * pBackendDXContext->cQuery);
5418 RTMemFreeZ(pBackendDXContext->paShader, sizeof(pBackendDXContext->paShader[0]) * pBackendDXContext->cShader);
5419 RTMemFreeZ(pBackendDXContext->paStreamOutput, sizeof(pBackendDXContext->paStreamOutput[0]) * pBackendDXContext->cStreamOutput);
5420
5421 /* Destroy backend surfaces which belong to this context. */
5422 /** @todo The context should have a list of surfaces (and also shared resources). */
5423 /** @todo This should not be needed in fSingleDevice mode. */
5424 for (uint32_t sid = 0; sid < pThisCC->svga.p3dState->cSurfaces; ++sid)
5425 {
5426 PVMSVGA3DSURFACE const pSurface = pThisCC->svga.p3dState->papSurfaces[sid];
5427 if ( pSurface
5428 && pSurface->id == sid)
5429 {
5430 if (pSurface->idAssociatedContext == pDXContext->cid)
5431 {
5432 if (pSurface->pBackendSurface)
5433 vmsvga3dBackSurfaceDestroy(pThisCC, true, pSurface);
5434 }
5435 else if (pSurface->idAssociatedContext == DX_CID_BACKEND)
5436 {
5437 /* May have shared resources in this context. */
5438 if (pSurface->pBackendSurface)
5439 {
5440 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid);
5441 if (pSharedTexture)
5442 {
5443 Assert(pSharedTexture->sid == sid);
5444 RTAvlU32Remove(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid);
5445 D3D_RELEASE(pSharedTexture->pTexture);
5446 RTMemFreeZ(pSharedTexture, sizeof(*pSharedTexture));
5447 }
5448 }
5449 }
5450 }
5451 }
5452
5453 dxDeviceDestroy(pBackend, &pBackendDXContext->dxDevice);
5454
5455 RTMemFreeZ(pBackendDXContext, sizeof(*pBackendDXContext));
5456 pDXContext->pBackendDXContext = NULL;
5457 }
5458 return VINF_SUCCESS;
5459}
5460
5461
5462static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5463{
5464 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5465 RT_NOREF(pBackend, pDXContext);
5466 return VINF_SUCCESS;
5467}
5468
5469
5470static DECLCALLBACK(int) vmsvga3dBackDXSwitchContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5471{
5472 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5473 if (!pBackend->fSingleDevice)
5474 return VINF_NOT_IMPLEMENTED; /* Not required. */
5475
5476 /* The new context state will be applied by the generic DX code. */
5477 RT_NOREF(pDXContext);
5478 return VINF_SUCCESS;
5479}
5480
5481
5482static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5483{
5484 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5485 RT_NOREF(pBackend, pDXContext);
5486 return VINF_SUCCESS;
5487}
5488
5489
5490static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5491{
5492 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5493
5494 RT_NOREF(pBackend, pDXContext);
5495 AssertFailed(); /** @todo Implement */
5496 return VERR_NOT_IMPLEMENTED;
5497}
5498
5499
5500static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
5501{
5502 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5503 RT_NOREF(pBackend);
5504
5505 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5506 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5507
5508 if (sid == SVGA_ID_INVALID)
5509 {
5510 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5511 D3D_RELEASE(pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot]);
5512 return VINF_SUCCESS;
5513 }
5514
5515 PVMSVGA3DSURFACE pSurface;
5516 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
5517 AssertRCReturn(rc, rc);
5518
5519 PVMSVGA3DMIPMAPLEVEL pMipLevel;
5520 rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
5521 AssertRCReturn(rc, rc);
5522
5523 uint32_t const cbSurface = pMipLevel->cbSurface;
5524 ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
5525 && sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
5526
5527 /* Constant buffers are created on demand. */
5528 Assert(pSurface->pBackendSurface == NULL);
5529
5530 /* Upload the current data, if any. */
5531 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
5532 D3D11_SUBRESOURCE_DATA initialData;
5533 if (pMipLevel->pSurfaceData)
5534 {
5535 initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
5536 initialData.SysMemPitch = sizeInBytes;
5537 initialData.SysMemSlicePitch = sizeInBytes;
5538
5539 pInitialData = &initialData;
5540
5541 // Log(("%.*Rhxd\n", sizeInBytes, initialData.pSysMem));
5542 }
5543
5544 D3D11_BUFFER_DESC bd;
5545 RT_ZERO(bd);
5546 bd.ByteWidth = sizeInBytes;
5547 bd.Usage = D3D11_USAGE_DEFAULT;
5548 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
5549 bd.CPUAccessFlags = 0;
5550 bd.MiscFlags = 0;
5551 bd.StructureByteStride = 0;
5552
5553 ID3D11Buffer *pBuffer = 0;
5554 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
5555 if (SUCCEEDED(hr))
5556 {
5557 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5558 ID3D11Buffer **ppOldBuffer = &pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot];
5559 LogFunc(("constant buffer: [%u][%u]: sid = %u, %u, %u (%p -> %p)\n",
5560 idxShaderState, slot, sid, offsetInBytes, sizeInBytes, *ppOldBuffer, pBuffer));
5561 D3D_RELEASE(*ppOldBuffer);
5562 *ppOldBuffer = pBuffer;
5563 }
5564
5565 return VINF_SUCCESS;
5566}
5567
5568static int dxSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type)
5569{
5570 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5571 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5572
5573//DEBUG_BREAKPOINT_TEST();
5574 AssertReturn(type >= SVGA3D_SHADERTYPE_MIN && type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
5575 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5576 uint32_t const *pSRIds = &pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[0];
5577 ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
5578 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SRVIEWS; ++i)
5579 {
5580 SVGA3dShaderResourceViewId shaderResourceViewId = pSRIds[i];
5581 if (shaderResourceViewId != SVGA3D_INVALID_ID)
5582 {
5583 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
5584
5585 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
5586 Assert(pDXView->u.pShaderResourceView);
5587 papShaderResourceView[i] = pDXView->u.pShaderResourceView;
5588 }
5589 else
5590 papShaderResourceView[i] = NULL;
5591 }
5592
5593 dxShaderResourceViewSet(pDevice, type, 0, SVGA3D_DX_MAX_SRVIEWS, papShaderResourceView);
5594 return VINF_SUCCESS;
5595}
5596
5597
5598static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
5599{
5600 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5601 RT_NOREF(pBackend);
5602
5603 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5604 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5605
5606 RT_NOREF(startView, type, cShaderResourceViewId, paShaderResourceViewId);
5607
5608 return VINF_SUCCESS;
5609}
5610
5611
5612static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGA3dShaderType type)
5613{
5614 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5615 RT_NOREF(pBackend);
5616
5617 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5618 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5619
5620 RT_NOREF(shaderId, type);
5621
5622 return VINF_SUCCESS;
5623}
5624
5625
5626static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
5627{
5628 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5629 RT_NOREF(pBackend);
5630
5631 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5632 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5633
5634 ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
5635 for (uint32_t i = 0; i < cSamplerId; ++i)
5636 {
5637 SVGA3dSamplerId samplerId = paSamplerId[i];
5638 if (samplerId != SVGA3D_INVALID_ID)
5639 {
5640 ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
5641 papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
5642 }
5643 else
5644 papSamplerState[i] = NULL;
5645 }
5646
5647 dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
5648 return VINF_SUCCESS;
5649}
5650
5651
5652static void vboxDXMatchShaderInput(DXSHADER *pDXShader, DXSHADER *pDXShaderPrior)
5653{
5654 /* For each input generic attribute of the shader find corresponding entry in the prior shader. */
5655 for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5656 {
5657 SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5658 DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5659
5660 if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5661 continue;
5662
5663 int iMatch = -1;
5664 for (uint32_t iPrior = 0; iPrior < pDXShaderPrior->shaderInfo.cOutputSignature; ++iPrior)
5665 {
5666 SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iPrior];
5667
5668 if (pPriorSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5669 continue;
5670
5671 if (pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex)
5672 {
5673 iMatch = iPrior;
5674 if (pPriorSignatureEntry->mask == pSignatureEntry->mask)
5675 break; /* Exact match, no need to continue search. */
5676 }
5677 }
5678
5679 if (iMatch >= 0)
5680 {
5681 SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iMatch];
5682 DXShaderAttributeSemantic const *pPriorSemantic = &pDXShaderPrior->shaderInfo.aOutputSemantic[iMatch];
5683
5684 Assert(pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex);
5685 Assert(pPriorSignatureEntry->mask == pSignatureEntry->mask);
5686 RT_NOREF(pPriorSignatureEntry);
5687
5688 pSemantic->SemanticIndex = pPriorSemantic->SemanticIndex;
5689 }
5690 }
5691}
5692
5693
5694static void vboxDXMatchShaderSignatures(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
5695{
5696 SVGA3dShaderId const shaderIdVS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN].shaderId;
5697 SVGA3dShaderId const shaderIdHS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_HS - SVGA3D_SHADERTYPE_MIN].shaderId;
5698 SVGA3dShaderId const shaderIdDS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_DS - SVGA3D_SHADERTYPE_MIN].shaderId;
5699 SVGA3dShaderId const shaderIdGS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_GS - SVGA3D_SHADERTYPE_MIN].shaderId;
5700 SVGA3dShaderId const shaderIdPS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_PS - SVGA3D_SHADERTYPE_MIN].shaderId;
5701
5702 /* Try to fix the input semantic indices. Output is usually not changed. */
5703 switch (pDXShader->enmShaderType)
5704 {
5705 case SVGA3D_SHADERTYPE_VS:
5706 {
5707 /* Match input to input layout, which sets generic semantic indices to the source registerIndex (dxCreateInputLayout). */
5708 for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5709 {
5710 SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5711 DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5712
5713 if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5714 continue;
5715
5716 pSemantic->SemanticIndex = pSignatureEntry->registerIndex;
5717 }
5718 break;
5719 }
5720 case SVGA3D_SHADERTYPE_HS:
5721 {
5722 /* Input of a HS shader is the output of VS. */
5723 DXSHADER *pDXShaderPrior;
5724 if (shaderIdVS != SVGA3D_INVALID_ID)
5725 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5726 else
5727 pDXShaderPrior = NULL;
5728
5729 if (pDXShaderPrior)
5730 vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5731
5732 break;
5733 }
5734 case SVGA3D_SHADERTYPE_DS:
5735 {
5736 /* Input of a DS shader is the output of HS. */
5737 DXSHADER *pDXShaderPrior;
5738 if (shaderIdHS != SVGA3D_INVALID_ID)
5739 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdHS];
5740 else
5741 pDXShaderPrior = NULL;
5742
5743 if (pDXShaderPrior)
5744 vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5745
5746 break;
5747 }
5748 case SVGA3D_SHADERTYPE_GS:
5749 {
5750 /* Input signature of a GS shader is the output of DS or VS. */
5751 DXSHADER *pDXShaderPrior;
5752 if (shaderIdDS != SVGA3D_INVALID_ID)
5753 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5754 else if (shaderIdVS != SVGA3D_INVALID_ID)
5755 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5756 else
5757 pDXShaderPrior = NULL;
5758
5759 if (pDXShaderPrior)
5760 {
5761 /* If GS shader does not have input signature (Windows guest can do that),
5762 * then assign the prior shader signature as GS input.
5763 */
5764 if (pDXShader->shaderInfo.cInputSignature == 0)
5765 {
5766 pDXShader->shaderInfo.cInputSignature = pDXShaderPrior->shaderInfo.cOutputSignature;
5767 memcpy(pDXShader->shaderInfo.aInputSignature,
5768 pDXShaderPrior->shaderInfo.aOutputSignature,
5769 pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
5770 memcpy(pDXShader->shaderInfo.aInputSemantic,
5771 pDXShaderPrior->shaderInfo.aOutputSemantic,
5772 pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(DXShaderAttributeSemantic));
5773 }
5774 else
5775 vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5776 }
5777
5778 /* Output signature of a GS shader is the input of the pixel shader. */
5779 if (shaderIdPS != SVGA3D_INVALID_ID)
5780 {
5781 /* If GS shader does not have output signature (Windows guest can do that),
5782 * then assign the PS shader signature as GS output.
5783 */
5784 if (pDXShader->shaderInfo.cOutputSignature == 0)
5785 {
5786 DXSHADER const *pDXShaderPosterior = &pDXContext->pBackendDXContext->paShader[shaderIdPS];
5787 pDXShader->shaderInfo.cOutputSignature = pDXShaderPosterior->shaderInfo.cInputSignature;
5788 memcpy(pDXShader->shaderInfo.aOutputSignature,
5789 pDXShaderPosterior->shaderInfo.aInputSignature,
5790 pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
5791 memcpy(pDXShader->shaderInfo.aOutputSemantic,
5792 pDXShaderPosterior->shaderInfo.aInputSemantic,
5793 pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(DXShaderAttributeSemantic));
5794 }
5795 }
5796
5797 SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
5798 if (soid != SVGA3D_INVALID_ID)
5799 {
5800 ASSERT_GUEST_RETURN_VOID(soid < pDXContext->pBackendDXContext->cStreamOutput);
5801
5802 /* Set semantic names and indices for SO declaration entries according to the shader output. */
5803 SVGACOTableDXStreamOutputEntry const *pStreamOutputEntry = &pDXContext->cot.paStreamOutput[soid];
5804 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
5805
5806 if (pDXStreamOutput->cDeclarationEntry == 0)
5807 {
5808 int rc = dxDefineStreamOutput(pThisCC, pDXContext, soid, pStreamOutputEntry, pDXShader);
5809 AssertRCReturnVoid(rc);
5810#ifdef LOG_ENABLED
5811 Log6(("Stream output declaration:\n\n"));
5812 Log6(("Stream SemanticName SemanticIndex StartComponent ComponentCount OutputSlot\n"));
5813 Log6(("------ -------------- ------------- -------------- -------------- ----------\n"));
5814 for (unsigned i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
5815 {
5816 D3D11_SO_DECLARATION_ENTRY *p = &pDXStreamOutput->aDeclarationEntry[i];
5817 Log6(("%d %-14s %d %d %d %d\n",
5818 p->Stream, p->SemanticName, p->SemanticIndex, p->StartComponent, p->ComponentCount, p->OutputSlot));
5819 }
5820 Log6(("\n"));
5821#endif
5822
5823 }
5824 }
5825 break;
5826 }
5827 case SVGA3D_SHADERTYPE_PS:
5828 {
5829 /* Input of a PS shader is the output of GS, DS or VS. */
5830 DXSHADER *pDXShaderPrior;
5831 if (shaderIdGS != SVGA3D_INVALID_ID)
5832 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdGS];
5833 else if (shaderIdDS != SVGA3D_INVALID_ID)
5834 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5835 else if (shaderIdVS != SVGA3D_INVALID_ID)
5836 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5837 else
5838 pDXShaderPrior = NULL;
5839
5840 if (pDXShaderPrior)
5841 vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5842 break;
5843 }
5844 default:
5845 break;
5846 }
5847
5848 /* Intermediate shaders normally have both input and output signatures. However it is ok if they do not.
5849 * Just catch this unusual case in order to see if everything is fine.
5850 */
5851 Assert( ( pDXShader->enmShaderType == SVGA3D_SHADERTYPE_VS
5852 || pDXShader->enmShaderType == SVGA3D_SHADERTYPE_PS
5853 || pDXShader->enmShaderType == SVGA3D_SHADERTYPE_CS)
5854 || (pDXShader->shaderInfo.cInputSignature && pDXShader->shaderInfo.cOutputSignature));
5855}
5856
5857
5858static void vboxDXUpdateVSInputSignature(PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
5859{
5860 SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
5861 if (elementLayoutId != SVGA3D_INVALID_ID)
5862 {
5863 SVGACOTableDXElementLayoutEntry const *pElementLayout = &pDXContext->cot.paElementLayout[elementLayoutId];
5864 for (uint32_t i = 0; i < RT_MIN(pElementLayout->numDescs, pDXShader->shaderInfo.cInputSignature); ++i)
5865 {
5866 SVGA3dInputElementDesc const *pElementDesc = &pElementLayout->descs[i];
5867 SVGA3dDXSignatureEntry *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5868 pSignatureEntry->componentType = DXShaderComponentTypeFromFormat(pElementDesc->format);
5869 }
5870 }
5871}
5872
5873
5874static void dxCreateInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, DXSHADER *pDXShader)
5875{
5876 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5877 AssertReturnVoid(pDevice->pDevice);
5878
5879 SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
5880 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
5881
5882 if (pDXElementLayout->cElementDesc == 0)
5883 {
5884 /* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
5885 * if they are consistent between the element layout and shader input signature.
5886 * "In general, data passed between pipeline stages is completely generic and is not uniquely
5887 * interpreted by the system; arbitrary semantics are allowed ..."
5888 *
5889 * However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
5890 *
5891 * System-Value semantics ("SV_*") between shaders require proper names of course.
5892 * But they are irrelevant for input attributes.
5893 */
5894 pDXElementLayout->cElementDesc = pEntry->numDescs;
5895 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
5896 {
5897 D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
5898 SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
5899 pDst->SemanticName = "ATTRIB";
5900 pDst->SemanticIndex = pSrc->inputRegister;
5901 pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
5902 Assert(pDst->Format != DXGI_FORMAT_UNKNOWN);
5903 pDst->InputSlot = pSrc->inputSlot;
5904 pDst->AlignedByteOffset = pSrc->alignedByteOffset;
5905 pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
5906 pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
5907 }
5908 }
5909
5910 HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
5911 pDXElementLayout->cElementDesc,
5912 pDXShader->pvDXBC,
5913 pDXShader->cbDXBC,
5914 &pDXElementLayout->pElementLayout);
5915 Assert(SUCCEEDED(hr)); RT_NOREF(hr);
5916}
5917
5918
5919static void dxSetConstantBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5920{
5921//DEBUG_BREAKPOINT_TEST();
5922 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5923 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5924 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5925
5926 AssertCompile(RT_ELEMENTS(pBackendDXContext->resources.shaderState[0].constantBuffers) == SVGA3D_DX_MAX_CONSTBUFFERS);
5927
5928 for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
5929 {
5930 SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
5931 for (uint32_t idxSlot = 0; idxSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++idxSlot)
5932 {
5933 ID3D11Buffer **pBufferContext = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
5934 ID3D11Buffer **pBufferPipeline = &pBackend->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
5935 if (*pBufferContext != *pBufferPipeline)
5936 {
5937 LogFunc(("constant buffer: [%u][%u]: %p -> %p\n",
5938 idxShaderState, idxSlot, *pBufferPipeline, *pBufferContext));
5939 dxConstantBufferSet(pDXDevice, idxSlot, shaderType, *pBufferContext);
5940
5941 if (*pBufferContext)
5942 (*pBufferContext)->AddRef();
5943 D3D_RELEASE(*pBufferPipeline);
5944 *pBufferPipeline = *pBufferContext;
5945 }
5946 }
5947 }
5948}
5949
5950static void dxSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5951{
5952//DEBUG_BREAKPOINT_TEST();
5953 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5954 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5955 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5956
5957 AssertCompile(RT_ELEMENTS(pBackendDXContext->resources.inputAssembly.vertexBuffers) == SVGA3D_DX_MAX_VERTEXBUFFERS);
5958
5959 ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
5960 UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
5961 UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
5962
5963 int32_t idxMaxSlot = -1;
5964 for (uint32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
5965 {
5966 DXBOUNDVERTEXBUFFER *pBufferContext = &pBackendDXContext->resources.inputAssembly.vertexBuffers[i];
5967 DXBOUNDVERTEXBUFFER *pBufferPipeline = &pBackend->resources.inputAssembly.vertexBuffers[i];
5968 if ( pBufferContext->pBuffer != pBufferPipeline->pBuffer
5969 || pBufferContext->stride != pBufferPipeline->stride
5970 || pBufferContext->offset != pBufferPipeline->offset)
5971 {
5972 LogFunc(("vertex buffer: [%u]: sid = %u, %p -> %p\n",
5973 i, pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].bufferId, pBufferPipeline->pBuffer, pBufferContext->pBuffer));
5974
5975 if (pBufferContext->pBuffer != pBufferPipeline->pBuffer)
5976 {
5977 if (pBufferContext->pBuffer)
5978 pBufferContext->pBuffer->AddRef();
5979 D3D_RELEASE(pBufferPipeline->pBuffer);
5980 }
5981 *pBufferPipeline = *pBufferContext;
5982
5983 idxMaxSlot = i;
5984 }
5985
5986 paResources[i] = pBufferContext->pBuffer;
5987 if (pBufferContext->pBuffer)
5988 {
5989 paStride[i] = pBufferContext->stride;
5990 paOffset[i] = pBufferContext->offset;
5991 }
5992 else
5993 {
5994 paStride[i] = 0;
5995 paOffset[i] = 0;
5996 }
5997 }
5998
5999 if (idxMaxSlot >= 0)
6000 pDXDevice->pImmediateContext->IASetVertexBuffers(0, idxMaxSlot + 1, paResources, paStride, paOffset);
6001}
6002
6003static void dxSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6004{
6005//DEBUG_BREAKPOINT_TEST();
6006 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6007 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6008 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
6009
6010 DXBOUNDINDEXBUFFER *pBufferContext = &pBackendDXContext->resources.inputAssembly.indexBuffer;
6011 DXBOUNDINDEXBUFFER *pBufferPipeline = &pBackend->resources.inputAssembly.indexBuffer;
6012 if ( pBufferContext->pBuffer != pBufferPipeline->pBuffer
6013 || pBufferContext->indexBufferOffset != pBufferPipeline->indexBufferOffset
6014 || pBufferContext->indexBufferFormat != pBufferPipeline->indexBufferFormat)
6015 {
6016 LogFunc(("index_buffer: sid = %u, %p -> %p\n",
6017 pDXContext->svgaDXContext.inputAssembly.indexBufferSid, pBufferPipeline->pBuffer, pBufferContext->pBuffer));
6018
6019 if (pBufferContext->pBuffer != pBufferPipeline->pBuffer)
6020 {
6021 if (pBufferContext->pBuffer)
6022 pBufferContext->pBuffer->AddRef();
6023 D3D_RELEASE(pBufferPipeline->pBuffer);
6024 }
6025 *pBufferPipeline = *pBufferContext;
6026
6027 pDXDevice->pImmediateContext->IASetIndexBuffer(pBufferContext->pBuffer, pBufferContext->indexBufferFormat, pBufferContext->indexBufferOffset);
6028 }
6029}
6030
6031static void dxSetupPipeline(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6032{
6033 /* Make sure that any draw operations on shader resource views have finished. */
6034 AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState) == SVGA3D_NUM_SHADERTYPE);
6035 AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState[0].shaderResources) == SVGA3D_DX_MAX_SRVIEWS);
6036
6037 int rc;
6038
6039 /* Unbind render target views because they mught be (re-)used as shader resource views. */
6040 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6041 pDXDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(0, NULL, NULL, 0, 0, NULL, NULL);
6042 for (unsigned i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
6043 {
6044 ID3D11UnorderedAccessView *pNullUA = 0;
6045 pDXDevice->pImmediateContext->CSSetUnorderedAccessViews(i, 1, &pNullUA, NULL);
6046 }
6047
6048 dxSetConstantBuffers(pThisCC, pDXContext);
6049 dxSetVertexBuffers(pThisCC, pDXContext);
6050 dxSetIndexBuffer(pThisCC, pDXContext);
6051
6052 /*
6053 * Shader resources
6054 */
6055
6056 /* Make sure that the shader resource views exist. */
6057 for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6058 {
6059 for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6060 {
6061 SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6062 if (shaderResourceViewId != SVGA3D_INVALID_ID)
6063 {
6064 ASSERT_GUEST_RETURN_VOID(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView);
6065
6066 SVGACOTableDXSRViewEntry const *pSRViewEntry = dxGetShaderResourceViewEntry(pDXContext, shaderResourceViewId);
6067 AssertContinue(pSRViewEntry != NULL);
6068
6069 uint32_t const sid = pSRViewEntry->sid;
6070
6071 PVMSVGA3DSURFACE pSurface;
6072 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6073 if (RT_FAILURE(rc))
6074 {
6075 AssertMsgFailed(("sid = %u, rc = %Rrc\n", sid, rc));
6076 continue;
6077 }
6078
6079 /* The guest might have invalidated the surface in which case pSurface->pBackendSurface is NULL. */
6080 /** @todo This is not needed for "single DX device" mode. */
6081 if (pSurface->pBackendSurface)
6082 {
6083 /* Wait for the surface to finish drawing. */
6084 dxSurfaceWait(pThisCC->svga.p3dState, pSurface, pDXContext->cid);
6085 }
6086
6087 /* If a view has not been created yet, do it now. */
6088 if (!pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId].u.pView)
6089 {
6090//DEBUG_BREAKPOINT_TEST();
6091 LogFunc(("Re-creating SRV: sid=%u srvid = %u\n", sid, shaderResourceViewId));
6092 rc = dxDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pSRViewEntry);
6093 AssertContinue(RT_SUCCESS(rc));
6094 }
6095
6096 LogFunc(("srv[%d][%d] sid = %u, srvid = %u\n", idxShaderState, idxSR, sid, shaderResourceViewId));
6097
6098#ifdef DUMP_BITMAPS
6099 SVGA3dSurfaceImageId image;
6100 image.sid = sid;
6101 image.face = 0;
6102 image.mipmap = 0;
6103 VMSVGA3D_MAPPED_SURFACE map;
6104 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
6105 if (RT_SUCCESS(rc2))
6106 {
6107 vmsvga3dMapWriteBmpFile(&map, "sr-");
6108 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
6109 }
6110 else
6111 Log(("Map failed %Rrc\n", rc));
6112#endif
6113 }
6114 }
6115
6116 /* Set shader resources. */
6117 rc = dxSetShaderResources(pThisCC, pDXContext, (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN));
6118 AssertRC(rc);
6119 }
6120
6121 /*
6122 * Compute shader unordered access views
6123 */
6124
6125 for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6126 {
6127 SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.csuaViewIds[idxUA];
6128 if (uaViewId != SVGA3D_INVALID_ID)
6129 {
6130//DEBUG_BREAKPOINT_TEST();
6131 ASSERT_GUEST_RETURN_VOID(uaViewId < pDXContext->pBackendDXContext->cUnorderedAccessView);
6132
6133 SVGACOTableDXUAViewEntry const *pUAViewEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
6134 AssertContinue(pUAViewEntry != NULL);
6135
6136 uint32_t const sid = pUAViewEntry->sid;
6137
6138 PVMSVGA3DSURFACE pSurface;
6139 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6140 AssertRCReturnVoid(rc);
6141
6142 /* The guest might have invalidated the surface in which case pSurface->pBackendSurface is NULL. */
6143 /** @todo This is not needed for "single DX device" mode. */
6144 if (pSurface->pBackendSurface)
6145 {
6146 /* Wait for the surface to finish drawing. */
6147 dxSurfaceWait(pThisCC->svga.p3dState, pSurface, pDXContext->cid);
6148 }
6149
6150 /* If a view has not been created yet, do it now. */
6151 if (!pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pView)
6152 {
6153 LogFunc(("Re-creating UAV: sid=%u uaid = %u\n", sid, uaViewId));
6154 rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pUAViewEntry);
6155 AssertContinue(RT_SUCCESS(rc));
6156 }
6157
6158 LogFunc(("csuav[%d] sid = %u, uaid = %u\n", idxUA, sid, uaViewId));
6159 }
6160 }
6161
6162 /* Set views. */
6163 rc = dxSetCSUnorderedAccessViews(pThisCC, pDXContext);
6164 AssertRC(rc);
6165
6166 /*
6167 * Render targets and unordered access views.
6168 */
6169
6170 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6171 AssertReturnVoid(pDevice->pDevice);
6172
6173 /* Make sure that the render target views exist. Similar to SRVs. */
6174 if (pDXContext->svgaDXContext.renderState.depthStencilViewId != SVGA3D_INVALID_ID)
6175 {
6176 uint32_t const viewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
6177
6178 ASSERT_GUEST_RETURN_VOID(viewId < pDXContext->pBackendDXContext->cDepthStencilView);
6179
6180 SVGACOTableDXDSViewEntry const *pDSViewEntry = dxGetDepthStencilViewEntry(pDXContext, viewId);
6181 AssertReturnVoid(pDSViewEntry != NULL);
6182
6183 PVMSVGA3DSURFACE pSurface;
6184 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDSViewEntry->sid, &pSurface);
6185 AssertRCReturnVoid(rc);
6186
6187 /* If a view has not been created yet, do it now. */
6188 if (!pDXContext->pBackendDXContext->paDepthStencilView[viewId].u.pView)
6189 {
6190//DEBUG_BREAKPOINT_TEST();
6191 LogFunc(("Re-creating DSV: sid=%u dsvid = %u\n", pDSViewEntry->sid, viewId));
6192 rc = dxDefineDepthStencilView(pThisCC, pDXContext, viewId, pDSViewEntry);
6193 AssertReturnVoid(RT_SUCCESS(rc));
6194 }
6195
6196 LogFunc(("dsv sid = %u, dsvid = %u\n", pDSViewEntry->sid, viewId));
6197 }
6198
6199 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
6200 {
6201 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] != SVGA3D_INVALID_ID)
6202 {
6203 uint32_t const viewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
6204
6205 ASSERT_GUEST_RETURN_VOID(viewId < pDXContext->pBackendDXContext->cRenderTargetView);
6206
6207 SVGACOTableDXRTViewEntry const *pRTViewEntry = dxGetRenderTargetViewEntry(pDXContext, viewId);
6208 AssertReturnVoid(pRTViewEntry != NULL);
6209
6210 PVMSVGA3DSURFACE pSurface;
6211 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pRTViewEntry->sid, &pSurface);
6212 AssertRCReturnVoid(rc);
6213
6214 /* If a view has not been created yet, do it now. */
6215 if (!pDXContext->pBackendDXContext->paRenderTargetView[viewId].u.pView)
6216 {
6217//DEBUG_BREAKPOINT_TEST();
6218 LogFunc(("Re-creating RTV: sid=%u rtvid = %u\n", pRTViewEntry->sid, viewId));
6219 rc = dxDefineRenderTargetView(pThisCC, pDXContext, viewId, pRTViewEntry);
6220 AssertReturnVoid(RT_SUCCESS(rc));
6221 }
6222
6223 LogFunc(("rtv sid = %u, rtvid = %u\n", pRTViewEntry->sid, viewId));
6224 }
6225 }
6226
6227 for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6228 {
6229 SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
6230 if (uaViewId != SVGA3D_INVALID_ID)
6231 {
6232//DEBUG_BREAKPOINT_TEST();
6233 ASSERT_GUEST_RETURN_VOID(uaViewId < pDXContext->pBackendDXContext->cUnorderedAccessView);
6234
6235 SVGACOTableDXUAViewEntry const *pUAViewEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
6236 AssertContinue(pUAViewEntry != NULL);
6237
6238 uint32_t const sid = pUAViewEntry->sid;
6239
6240 PVMSVGA3DSURFACE pSurface;
6241 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6242 AssertRCReturnVoid(rc);
6243
6244 /* The guest might have invalidated the surface in which case pSurface->pBackendSurface is NULL. */
6245 /** @todo This is not needed for "single DX device" mode. */
6246 if (pSurface->pBackendSurface)
6247 {
6248 /* Wait for the surface to finish drawing. */
6249 dxSurfaceWait(pThisCC->svga.p3dState, pSurface, pDXContext->cid);
6250 }
6251
6252 /* If a view has not been created yet, do it now. */
6253 if (!pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pView)
6254 {
6255 LogFunc(("Re-creating UAV: sid=%u uaid = %u\n", sid, uaViewId));
6256 rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pUAViewEntry);
6257 AssertContinue(RT_SUCCESS(rc));
6258 }
6259
6260 LogFunc(("uav[%d] sid = %u, uaid = %u\n", idxUA, sid, uaViewId));
6261 }
6262 }
6263
6264 /* Set render targets. */
6265 rc = dxSetRenderTargets(pThisCC, pDXContext);
6266 AssertRC(rc);
6267
6268 /*
6269 * Shaders
6270 */
6271
6272 for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6273 {
6274 DXSHADER *pDXShader;
6275 SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
6276 SVGA3dShaderId const shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6277
6278 if (shaderId != SVGA3D_INVALID_ID)
6279 {
6280 pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
6281 if (pDXShader->pShader == NULL)
6282 {
6283 /* Create a new shader. */
6284
6285 /* Apply resource types to a pixel shader. */
6286 if (shaderType == SVGA3D_SHADERTYPE_PS) /* Others too? */
6287 {
6288 VGPU10_RESOURCE_DIMENSION aResourceDimension[SVGA3D_DX_MAX_SRVIEWS];
6289 RT_ZERO(aResourceDimension);
6290 VGPU10_RESOURCE_RETURN_TYPE aResourceReturnType[SVGA3D_DX_MAX_SRVIEWS];
6291 RT_ZERO(aResourceReturnType);
6292 uint32_t cResources = 0;
6293
6294 for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6295 {
6296 SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6297 if (shaderResourceViewId != SVGA3D_INVALID_ID)
6298 {
6299 SVGACOTableDXSRViewEntry const *pSRViewEntry = dxGetShaderResourceViewEntry(pDXContext, shaderResourceViewId);
6300 AssertContinue(pSRViewEntry != NULL);
6301
6302 PVMSVGA3DSURFACE pSurface;
6303 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pSRViewEntry->sid, &pSurface);
6304 AssertRCReturnVoid(rc);
6305
6306 aResourceReturnType[idxSR] = DXShaderResourceReturnTypeFromFormat(pSRViewEntry->format);
6307
6308 switch (pSRViewEntry->resourceDimension)
6309 {
6310 case SVGA3D_RESOURCE_BUFFEREX:
6311 case SVGA3D_RESOURCE_BUFFER:
6312 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_BUFFER;
6313 break;
6314 case SVGA3D_RESOURCE_TEXTURE1D:
6315 if (pSurface->surfaceDesc.numArrayElements <= 1)
6316 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1D;
6317 else
6318 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1DARRAY;
6319 break;
6320 case SVGA3D_RESOURCE_TEXTURE2D:
6321 if (pSurface->surfaceDesc.numArrayElements <= 1)
6322 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6323 else
6324 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2DARRAY;
6325 break;
6326 case SVGA3D_RESOURCE_TEXTURE3D:
6327 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE3D;
6328 break;
6329 case SVGA3D_RESOURCE_TEXTURECUBE:
6330 if (pSurface->surfaceDesc.numArrayElements <= 6)
6331 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBE;
6332 else
6333 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBEARRAY;
6334 break;
6335 default:
6336 ASSERT_GUEST_FAILED();
6337 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6338 }
6339
6340 cResources = idxSR + 1;
6341
6342 /* Update componentType of the pixel shader output signature to correspond to the bound resources. */
6343 if (idxSR < pDXShader->shaderInfo.cOutputSignature)
6344 {
6345 SVGA3dDXSignatureEntry *pSignatureEntry = &pDXShader->shaderInfo.aOutputSignature[idxSR];
6346 pSignatureEntry->componentType = DXShaderComponentTypeFromFormat(pSRViewEntry->format);
6347 }
6348 }
6349 }
6350
6351 rc = DXShaderUpdateResources(&pDXShader->shaderInfo, aResourceDimension, aResourceReturnType, cResources);
6352 AssertRC(rc); /* Ignore rc because the shader will most likely work anyway. */
6353 }
6354
6355 if (shaderType == SVGA3D_SHADERTYPE_VS)
6356 {
6357 /* Update componentType of the vertex shader input signature to correspond to the input declaration. */
6358 vboxDXUpdateVSInputSignature(pDXContext, pDXShader);
6359 }
6360
6361 vboxDXMatchShaderSignatures(pThisCC, pDXContext, pDXShader);
6362
6363 rc = DXShaderCreateDXBC(&pDXShader->shaderInfo, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
6364 if (RT_SUCCESS(rc))
6365 {
6366#ifdef LOG_ENABLED
6367 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6368 if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
6369 {
6370 ID3D10Blob *pBlob = 0;
6371 HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
6372 if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
6373 Log6(("%s\n", pBlob->GetBufferPointer()));
6374 else
6375 AssertFailed();
6376 D3D_RELEASE(pBlob);
6377 }
6378#endif
6379
6380 HRESULT hr = dxShaderCreate(pThisCC, pDXContext, pDXShader);
6381 if (FAILED(hr))
6382 rc = VERR_INVALID_STATE;
6383 }
6384 }
6385
6386 LogFunc(("Shader: cid=%u shid=%u type=%d, GuestSignatures %d, %Rrc\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures, rc));
6387 }
6388 else
6389 pDXShader = NULL;
6390
6391 if (RT_SUCCESS(rc))
6392 dxShaderSet(pThisCC, pDXContext, shaderType, pDXShader);
6393
6394 AssertRC(rc);
6395 }
6396
6397 /*
6398 * InputLayout
6399 */
6400 SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6401 ID3D11InputLayout *pInputLayout = NULL;
6402 if (elementLayoutId != SVGA3D_INVALID_ID)
6403 {
6404 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6405 if (!pDXElementLayout->pElementLayout)
6406 {
6407 uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
6408 uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6409 if (shid < pDXContext->pBackendDXContext->cShader)
6410 {
6411 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
6412 if (pDXShader->pvDXBC)
6413 dxCreateInputLayout(pThisCC, pDXContext, elementLayoutId, pDXShader);
6414 else
6415 LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid));
6416 }
6417 else
6418 LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid));
6419 }
6420
6421 pInputLayout = pDXElementLayout->pElementLayout;
6422
6423 LogFunc(("Input layout id %u\n", elementLayoutId));
6424 }
6425
6426 pDevice->pImmediateContext->IASetInputLayout(pInputLayout);
6427}
6428
6429
6430static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6431{
6432 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6433 RT_NOREF(pBackend);
6434
6435 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6436 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6437
6438 dxSetupPipeline(pThisCC, pDXContext);
6439
6440 if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
6441 pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
6442 else
6443 {
6444 /*
6445 * Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
6446 */
6447
6448 /* Make sure that 16 bit indices are enough. */
6449 if (vertexCount > 65535)
6450 {
6451 LogRelMax(1, ("VMSVGA: ignore Draw(TRIANGLEFAN, %u)\n", vertexCount));
6452 return VERR_NOT_SUPPORTED;
6453 }
6454
6455 /* Generate indices. */
6456 UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
6457 UINT const cbAlloc = IndexCount * sizeof(USHORT);
6458 USHORT *paIndices = (USHORT *)RTMemAlloc(cbAlloc);
6459 AssertReturn(paIndices, VERR_NO_MEMORY);
6460 USHORT iVertex = 1;
6461 for (UINT i = 0; i < IndexCount; i+= 3)
6462 {
6463 paIndices[i] = 0;
6464 paIndices[i + 1] = iVertex;
6465 ++iVertex;
6466 paIndices[i + 2] = iVertex;
6467 }
6468
6469 D3D11_SUBRESOURCE_DATA InitData;
6470 InitData.pSysMem = paIndices;
6471 InitData.SysMemPitch = cbAlloc;
6472 InitData.SysMemSlicePitch = cbAlloc;
6473
6474 D3D11_BUFFER_DESC bd;
6475 RT_ZERO(bd);
6476 bd.ByteWidth = cbAlloc;
6477 bd.Usage = D3D11_USAGE_IMMUTABLE;
6478 bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
6479 //bd.CPUAccessFlags = 0;
6480 //bd.MiscFlags = 0;
6481 //bd.StructureByteStride = 0;
6482
6483 ID3D11Buffer *pIndexBuffer = 0;
6484 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
6485 Assert(SUCCEEDED(hr));RT_NOREF(hr);
6486
6487 /* Save the current index buffer. */
6488 ID3D11Buffer *pSavedIndexBuffer = 0;
6489 DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
6490 UINT SavedOffset = 0;
6491 pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
6492
6493 /* Set up the device state. */
6494 pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
6495 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
6496
6497 UINT const StartIndexLocation = 0;
6498 INT const BaseVertexLocation = startVertexLocation;
6499 pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
6500
6501 /* Restore the device state. */
6502 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
6503 pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
6504 D3D_RELEASE(pSavedIndexBuffer);
6505
6506 /* Cleanup. */
6507 D3D_RELEASE(pIndexBuffer);
6508 RTMemFree(paIndices);
6509 }
6510
6511 /* Note which surfaces are being drawn. */
6512 dxTrackRenderTargets(pThisCC, pDXContext);
6513
6514 return VINF_SUCCESS;
6515}
6516
6517static int dxReadBuffer(DXDEVICE *pDevice, ID3D11Buffer *pBuffer, UINT Offset, UINT Bytes, void **ppvData, uint32_t *pcbData)
6518{
6519 D3D11_BUFFER_DESC desc;
6520 RT_ZERO(desc);
6521 pBuffer->GetDesc(&desc);
6522
6523 AssertReturn( Offset < desc.ByteWidth
6524 && Bytes <= desc.ByteWidth - Offset, VERR_INVALID_STATE);
6525
6526 void *pvData = RTMemAlloc(Bytes);
6527 if (!pvData)
6528 return VERR_NO_MEMORY;
6529
6530 *ppvData = pvData;
6531 *pcbData = Bytes;
6532
6533 int rc = dxStagingBufferRealloc(pDevice, Bytes);
6534 if (RT_SUCCESS(rc))
6535 {
6536 /* Copy from the buffer to the staging buffer. */
6537 ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
6538 UINT DstSubresource = 0;
6539 UINT DstX = Offset;
6540 UINT DstY = 0;
6541 UINT DstZ = 0;
6542 ID3D11Resource *pSrcResource = pBuffer;
6543 UINT SrcSubresource = 0;
6544 D3D11_BOX SrcBox;
6545 SrcBox.left = 0;
6546 SrcBox.top = 0;
6547 SrcBox.front = 0;
6548 SrcBox.right = Bytes;
6549 SrcBox.bottom = 1;
6550 SrcBox.back = 1;
6551 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
6552 pSrcResource, SrcSubresource, &SrcBox);
6553
6554 D3D11_MAPPED_SUBRESOURCE mappedResource;
6555 UINT const Subresource = 0; /* Buffers have only one subresource. */
6556 HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
6557 D3D11_MAP_READ, /* MapFlags = */ 0, &mappedResource);
6558 if (SUCCEEDED(hr))
6559 {
6560 memcpy(pvData, mappedResource.pData, Bytes);
6561
6562 /* Unmap the staging buffer. */
6563 pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
6564 }
6565 else
6566 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
6567
6568 }
6569
6570 if (RT_FAILURE(rc))
6571 {
6572 RTMemFree(*ppvData);
6573 *ppvData = NULL;
6574 *pcbData = 0;
6575 }
6576
6577 return rc;
6578}
6579
6580
6581static int dxDrawIndexedTriangleFan(DXDEVICE *pDevice, uint32_t IndexCountTF, uint32_t StartIndexLocationTF, int32_t BaseVertexLocationTF)
6582{
6583 /*
6584 * Emulate an indexed SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of triangle list.
6585 */
6586
6587 /* Make sure that 16 bit indices are enough. */
6588 if (IndexCountTF > 65535)
6589 {
6590 LogRelMax(1, ("VMSVGA: ignore DrawIndexed(TRIANGLEFAN, %u)\n", IndexCountTF));
6591 return VERR_NOT_SUPPORTED;
6592 }
6593
6594 /* Save the current index buffer. */
6595 ID3D11Buffer *pSavedIndexBuffer = 0;
6596 DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
6597 UINT SavedOffset = 0;
6598 pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
6599
6600 AssertReturn( SavedFormat == DXGI_FORMAT_R16_UINT
6601 || SavedFormat == DXGI_FORMAT_R32_UINT, VERR_NOT_SUPPORTED);
6602
6603 /* How many bytes are used by triangle fan indices. */
6604 UINT const BytesPerIndexTF = SavedFormat == DXGI_FORMAT_R16_UINT ? 2 : 4;
6605 UINT const BytesTF = BytesPerIndexTF * IndexCountTF;
6606
6607 /* Read the current index buffer content to obtain indices. */
6608 void *pvDataTF;
6609 uint32_t cbDataTF;
6610 int rc = dxReadBuffer(pDevice, pSavedIndexBuffer, StartIndexLocationTF, BytesTF, &pvDataTF, &cbDataTF);
6611 AssertRCReturn(rc, rc);
6612 AssertReturnStmt(cbDataTF >= BytesPerIndexTF, RTMemFree(pvDataTF), VERR_INVALID_STATE);
6613
6614 /* Generate indices for triangle list. */
6615 UINT const IndexCount = 3 * (IndexCountTF - 2); /* 3_per_triangle * num_triangles */
6616 UINT const cbAlloc = IndexCount * sizeof(USHORT);
6617 USHORT *paIndices = (USHORT *)RTMemAlloc(cbAlloc);
6618 AssertReturnStmt(paIndices, RTMemFree(pvDataTF), VERR_NO_MEMORY);
6619
6620 USHORT iVertex = 1;
6621 if (BytesPerIndexTF == 2)
6622 {
6623 USHORT *paIndicesTF = (USHORT *)pvDataTF;
6624 for (UINT i = 0; i < IndexCount; i+= 3)
6625 {
6626 paIndices[i] = paIndicesTF[0];
6627 AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
6628 paIndices[i + 1] = paIndicesTF[iVertex];
6629 ++iVertex;
6630 AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
6631 paIndices[i + 2] = paIndicesTF[iVertex];
6632 }
6633 }
6634 else
6635 {
6636 UINT *paIndicesTF = (UINT *)pvDataTF;
6637 for (UINT i = 0; i < IndexCount; i+= 3)
6638 {
6639 paIndices[i] = paIndicesTF[0];
6640 AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
6641 paIndices[i + 1] = paIndicesTF[iVertex];
6642 ++iVertex;
6643 AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
6644 paIndices[i + 2] = paIndicesTF[iVertex];
6645 }
6646 }
6647
6648 D3D11_SUBRESOURCE_DATA InitData;
6649 InitData.pSysMem = paIndices;
6650 InitData.SysMemPitch = cbAlloc;
6651 InitData.SysMemSlicePitch = cbAlloc;
6652
6653 D3D11_BUFFER_DESC bd;
6654 RT_ZERO(bd);
6655 bd.ByteWidth = cbAlloc;
6656 bd.Usage = D3D11_USAGE_IMMUTABLE;
6657 bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
6658 //bd.CPUAccessFlags = 0;
6659 //bd.MiscFlags = 0;
6660 //bd.StructureByteStride = 0;
6661
6662 ID3D11Buffer *pIndexBuffer = 0;
6663 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
6664 Assert(SUCCEEDED(hr));RT_NOREF(hr);
6665
6666 /* Set up the device state. */
6667 pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
6668 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
6669
6670 UINT const StartIndexLocation = 0;
6671 INT const BaseVertexLocation = BaseVertexLocationTF;
6672 pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
6673
6674 /* Restore the device state. */
6675 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
6676 pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
6677 D3D_RELEASE(pSavedIndexBuffer);
6678
6679 /* Cleanup. */
6680 D3D_RELEASE(pIndexBuffer);
6681 RTMemFree(paIndices);
6682 RTMemFree(pvDataTF);
6683
6684 return VINF_SUCCESS;
6685}
6686
6687
6688static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
6689{
6690 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6691 RT_NOREF(pBackend);
6692
6693 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6694 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6695
6696 dxSetupPipeline(pThisCC, pDXContext);
6697
6698 if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
6699 pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
6700 else
6701 {
6702 dxDrawIndexedTriangleFan(pDevice, indexCount, startIndexLocation, baseVertexLocation);
6703 }
6704
6705 /* Note which surfaces are being drawn. */
6706 dxTrackRenderTargets(pThisCC, pDXContext);
6707
6708 return VINF_SUCCESS;
6709}
6710
6711
6712static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
6713 uint32_t vertexCountPerInstance, uint32_t instanceCount, uint32_t startVertexLocation, uint32_t startInstanceLocation)
6714{
6715 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6716 RT_NOREF(pBackend);
6717
6718 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6719 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6720
6721 dxSetupPipeline(pThisCC, pDXContext);
6722
6723 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
6724
6725 pDevice->pImmediateContext->DrawInstanced(vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
6726
6727 /* Note which surfaces are being drawn. */
6728 dxTrackRenderTargets(pThisCC, pDXContext);
6729
6730 return VINF_SUCCESS;
6731}
6732
6733
6734static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
6735 uint32_t indexCountPerInstance, uint32_t instanceCount, uint32_t startIndexLocation, int32_t baseVertexLocation, uint32_t startInstanceLocation)
6736{
6737 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6738 RT_NOREF(pBackend);
6739
6740 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6741 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6742
6743 dxSetupPipeline(pThisCC, pDXContext);
6744
6745 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
6746
6747 pDevice->pImmediateContext->DrawIndexedInstanced(indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
6748
6749 /* Note which surfaces are being drawn. */
6750 dxTrackRenderTargets(pThisCC, pDXContext);
6751
6752 return VINF_SUCCESS;
6753}
6754
6755
6756static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6757{
6758 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6759 RT_NOREF(pBackend);
6760
6761 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6762 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6763
6764 dxSetupPipeline(pThisCC, pDXContext);
6765
6766 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
6767
6768 pDevice->pImmediateContext->DrawAuto();
6769
6770 /* Note which surfaces are being drawn. */
6771 dxTrackRenderTargets(pThisCC, pDXContext);
6772
6773 return VINF_SUCCESS;
6774}
6775
6776
6777static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
6778{
6779 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6780 RT_NOREF(pBackend);
6781
6782 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6783 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6784
6785 RT_NOREF(elementLayoutId);
6786
6787 return VINF_SUCCESS;
6788}
6789
6790
6791static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
6792{
6793 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6794 RT_NOREF(pBackend);
6795
6796 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6797 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6798
6799 for (uint32_t i = 0; i < cVertexBuffer; ++i)
6800 {
6801 uint32_t const idxVertexBuffer = startBuffer + i;
6802
6803 /* Get corresponding resource. Create the buffer if does not yet exist. */
6804 if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
6805 {
6806 PVMSVGA3DSURFACE pSurface;
6807 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
6808 AssertRCReturn(rc, rc);
6809
6810 if (pSurface->pBackendSurface == NULL)
6811 {
6812 /* Create the resource and initialize it with the current surface data. */
6813 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
6814 AssertRCReturn(rc, rc);
6815 }
6816 Assert(pSurface->pBackendSurface->u.pBuffer);
6817
6818 DXBOUNDVERTEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.vertexBuffers[idxVertexBuffer];
6819 if ( pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer
6820 || pBoundBuffer->stride != paVertexBuffer[i].stride
6821 || pBoundBuffer->offset != paVertexBuffer[i].offset)
6822 {
6823 LogFunc(("vertex buffer: [%u]: sid = %u, offset %u, stride %u (%p -> %p)\n",
6824 idxVertexBuffer, paVertexBuffer[i].sid, paVertexBuffer[i].offset, paVertexBuffer[i].stride, pBoundBuffer->pBuffer, pSurface->pBackendSurface->u.pBuffer));
6825
6826 if (pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer)
6827 {
6828 D3D_RELEASE(pBoundBuffer->pBuffer);
6829 pBoundBuffer->pBuffer = pSurface->pBackendSurface->u.pBuffer;
6830 pBoundBuffer->pBuffer->AddRef();
6831 }
6832 pBoundBuffer->stride = paVertexBuffer[i].stride;
6833 pBoundBuffer->offset = paVertexBuffer[i].offset;
6834 }
6835 }
6836 else
6837 {
6838 DXBOUNDVERTEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.vertexBuffers[idxVertexBuffer];
6839 D3D_RELEASE(pBoundBuffer->pBuffer);
6840 pBoundBuffer->stride = 0;
6841 pBoundBuffer->offset = 0;
6842 }
6843 }
6844
6845 return VINF_SUCCESS;
6846}
6847
6848
6849static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
6850{
6851 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6852 RT_NOREF(pBackend);
6853
6854 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6855 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6856
6857 /* Get corresponding resource. Create the buffer if does not yet exist. */
6858 if (sid != SVGA_ID_INVALID)
6859 {
6860 PVMSVGA3DSURFACE pSurface;
6861 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6862 AssertRCReturn(rc, rc);
6863
6864 if (pSurface->pBackendSurface == NULL)
6865 {
6866 /* Create the resource and initialize it with the current surface data. */
6867 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
6868 AssertRCReturn(rc, rc);
6869 }
6870
6871 DXGI_FORMAT const enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
6872 AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT || enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
6873
6874 DXBOUNDINDEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.indexBuffer;
6875 if ( pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer
6876 || pBoundBuffer->indexBufferOffset != offset
6877 || pBoundBuffer->indexBufferFormat != enmDxgiFormat)
6878 {
6879 LogFunc(("index_buffer: sid = %u, offset %u, (%p -> %p)\n",
6880 sid, offset, pBoundBuffer->pBuffer, pSurface->pBackendSurface->u.pBuffer));
6881
6882 if (pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer)
6883 {
6884 D3D_RELEASE(pBoundBuffer->pBuffer);
6885 pBoundBuffer->pBuffer = pSurface->pBackendSurface->u.pBuffer;
6886 pBoundBuffer->pBuffer->AddRef();
6887 }
6888 pBoundBuffer->indexBufferOffset = offset;
6889 pBoundBuffer->indexBufferFormat = enmDxgiFormat;
6890 }
6891 }
6892 else
6893 {
6894 DXBOUNDINDEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.indexBuffer;
6895 D3D_RELEASE(pBoundBuffer->pBuffer);
6896 pBoundBuffer->indexBufferOffset = 0;
6897 pBoundBuffer->indexBufferFormat = DXGI_FORMAT_UNKNOWN;
6898 }
6899
6900 return VINF_SUCCESS;
6901}
6902
6903static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
6904{
6905 static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
6906 {
6907 D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
6908 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
6909 D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
6910 D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
6911 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
6912 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
6913 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
6914 D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
6915 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
6916 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
6917 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
6918 D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
6919 D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
6920 D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
6921 D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
6922 D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
6923 D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
6924 D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
6925 D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
6926 D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
6927 D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
6928 D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
6929 D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
6930 D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
6931 D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
6932 D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
6933 D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
6934 D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
6935 D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
6936 D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
6937 D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
6938 D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
6939 D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
6940 D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
6941 D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
6942 D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
6943 D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
6944 D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
6945 D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
6946 D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
6947 D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
6948 D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
6949 D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
6950 };
6951 return aD3D11PrimitiveTopology[primitiveType];
6952}
6953
6954static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
6955{
6956 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6957 RT_NOREF(pBackend);
6958
6959 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6960 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6961
6962 D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
6963 pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
6964 return VINF_SUCCESS;
6965}
6966
6967
6968static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6969{
6970 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6971 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6972
6973 UINT UAVStartSlot = 0;
6974 UINT NumUAVs = 0;
6975 ID3D11UnorderedAccessView *apUnorderedAccessViews[SVGA3D_DX11_1_MAX_UAVIEWS];
6976 UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
6977 for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6978 {
6979 SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
6980 if (uaViewId != SVGA3D_INVALID_ID)
6981 {
6982 if (NumUAVs == 0)
6983 UAVStartSlot = idxUA;
6984 NumUAVs = idxUA - UAVStartSlot + 1;
6985 apUnorderedAccessViews[idxUA] = pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pUnorderedAccessView;
6986
6987 SVGACOTableDXUAViewEntry const *pEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
6988 aUAVInitialCounts[idxUA] = pEntry->structureCount;
6989 }
6990 else
6991 {
6992 apUnorderedAccessViews[idxUA] = NULL;
6993 aUAVInitialCounts[idxUA] = (UINT)-1;
6994 }
6995 }
6996
6997 UINT NumRTVs = 0;
6998 ID3D11RenderTargetView *apRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
6999 RT_ZERO(apRenderTargetViews);
7000 for (uint32_t i = 0; i < pDXContext->cRenderTargets; ++i)
7001 {
7002 SVGA3dRenderTargetViewId const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
7003 if (renderTargetViewId != SVGA3D_INVALID_ID)
7004 {
7005 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
7006 apRenderTargetViews[i] = pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId].u.pRenderTargetView;
7007 ++NumRTVs;
7008 }
7009 }
7010
7011 /* RTVs are followed by UAVs. */
7012 Assert(NumRTVs <= pDXContext->svgaDXContext.uavSpliceIndex);
7013
7014 ID3D11DepthStencilView *pDepthStencilView = NULL;
7015 SVGA3dDepthStencilViewId const depthStencilViewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
7016 if (depthStencilViewId != SVGA_ID_INVALID)
7017 pDepthStencilView = pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId].u.pDepthStencilView;
7018
7019 pDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(NumRTVs,
7020 apRenderTargetViews,
7021 pDepthStencilView,
7022 pDXContext->svgaDXContext.uavSpliceIndex,
7023 NumUAVs,
7024 apUnorderedAccessViews,
7025 aUAVInitialCounts);
7026 return VINF_SUCCESS;
7027}
7028
7029
7030static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
7031{
7032 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7033 RT_NOREF(pBackend);
7034
7035 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7036 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7037
7038 RT_NOREF(depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
7039
7040 return VINF_SUCCESS;
7041}
7042
7043
7044static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
7045{
7046 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7047 RT_NOREF(pBackend);
7048
7049 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7050 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7051
7052 if (blendId != SVGA3D_INVALID_ID)
7053 {
7054 ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
7055 pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
7056 }
7057 else
7058 pDevice->pImmediateContext->OMSetBlendState(NULL, NULL, 0);
7059
7060 return VINF_SUCCESS;
7061}
7062
7063
7064static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
7065{
7066 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7067 RT_NOREF(pBackend);
7068
7069 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7070 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7071
7072 if (depthStencilId != SVGA3D_INVALID_ID)
7073 {
7074 ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
7075 pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
7076 }
7077 else
7078 pDevice->pImmediateContext->OMSetDepthStencilState(NULL, 0);
7079
7080 return VINF_SUCCESS;
7081}
7082
7083
7084static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
7085{
7086 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7087 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7088 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7089
7090 RT_NOREF(pBackend);
7091
7092 if (rasterizerId != SVGA3D_INVALID_ID)
7093 {
7094 ID3D11RasterizerState *pRasterizerState = pDXContext->pBackendDXContext->papRasterizerState[rasterizerId];
7095 pDevice->pImmediateContext->RSSetState(pRasterizerState);
7096 }
7097 else
7098 pDevice->pImmediateContext->RSSetState(NULL);
7099
7100 return VINF_SUCCESS;
7101}
7102
7103
7104typedef struct VGPU10QUERYINFO
7105{
7106 SVGA3dQueryType svgaQueryType;
7107 uint32_t cbDataVMSVGA;
7108 D3D11_QUERY dxQueryType;
7109 uint32_t cbDataD3D11;
7110} VGPU10QUERYINFO;
7111
7112static VGPU10QUERYINFO const *dxQueryInfo(SVGA3dQueryType type)
7113{
7114 static VGPU10QUERYINFO const aQueryInfo[SVGA3D_QUERYTYPE_MAX] =
7115 {
7116 { SVGA3D_QUERYTYPE_OCCLUSION, sizeof(SVGADXOcclusionQueryResult),
7117 D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7118 { SVGA3D_QUERYTYPE_TIMESTAMP, sizeof(SVGADXTimestampQueryResult),
7119 D3D11_QUERY_TIMESTAMP, sizeof(UINT64) },
7120 { SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT, sizeof(SVGADXTimestampDisjointQueryResult),
7121 D3D11_QUERY_TIMESTAMP_DISJOINT, sizeof(D3D11_QUERY_DATA_TIMESTAMP_DISJOINT) },
7122 { SVGA3D_QUERYTYPE_PIPELINESTATS, sizeof(SVGADXPipelineStatisticsQueryResult),
7123 D3D11_QUERY_PIPELINE_STATISTICS, sizeof(D3D11_QUERY_DATA_PIPELINE_STATISTICS) },
7124 { SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE, sizeof(SVGADXOcclusionPredicateQueryResult),
7125 D3D11_QUERY_OCCLUSION_PREDICATE, sizeof(BOOL) },
7126 { SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS, sizeof(SVGADXStreamOutStatisticsQueryResult),
7127 D3D11_QUERY_SO_STATISTICS, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7128 { SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE, sizeof(SVGADXStreamOutPredicateQueryResult),
7129 D3D11_QUERY_SO_OVERFLOW_PREDICATE, sizeof(BOOL) },
7130 { SVGA3D_QUERYTYPE_OCCLUSION64, sizeof(SVGADXOcclusion64QueryResult),
7131 D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7132 { SVGA3D_QUERYTYPE_SOSTATS_STREAM0, sizeof(SVGADXStreamOutStatisticsQueryResult),
7133 D3D11_QUERY_SO_STATISTICS_STREAM0, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7134 { SVGA3D_QUERYTYPE_SOSTATS_STREAM1, sizeof(SVGADXStreamOutStatisticsQueryResult),
7135 D3D11_QUERY_SO_STATISTICS_STREAM1, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7136 { SVGA3D_QUERYTYPE_SOSTATS_STREAM2, sizeof(SVGADXStreamOutStatisticsQueryResult),
7137 D3D11_QUERY_SO_STATISTICS_STREAM2, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7138 { SVGA3D_QUERYTYPE_SOSTATS_STREAM3, sizeof(SVGADXStreamOutStatisticsQueryResult),
7139 D3D11_QUERY_SO_STATISTICS_STREAM3, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7140 { SVGA3D_QUERYTYPE_SOP_STREAM0, sizeof(SVGADXStreamOutPredicateQueryResult),
7141 D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM0, sizeof(BOOL) },
7142 { SVGA3D_QUERYTYPE_SOP_STREAM1, sizeof(SVGADXStreamOutPredicateQueryResult),
7143 D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM1, sizeof(BOOL) },
7144 { SVGA3D_QUERYTYPE_SOP_STREAM2, sizeof(SVGADXStreamOutPredicateQueryResult),
7145 D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM2, sizeof(BOOL) },
7146 { SVGA3D_QUERYTYPE_SOP_STREAM3, sizeof(SVGADXStreamOutPredicateQueryResult),
7147 D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM3, sizeof(BOOL) },
7148 };
7149
7150 ASSERT_GUEST_RETURN(type < RT_ELEMENTS(aQueryInfo), NULL);
7151 return &aQueryInfo[type];
7152}
7153
7154static int dxDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7155{
7156 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7157 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7158
7159 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7160 VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7161 if (!pQueryInfo)
7162 return VERR_INVALID_PARAMETER;
7163
7164 D3D11_QUERY_DESC desc;
7165 desc.Query = pQueryInfo->dxQueryType;
7166 desc.MiscFlags = 0;
7167 if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7168 desc.MiscFlags |= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7169
7170 HRESULT hr = pDXDevice->pDevice->CreateQuery(&desc, &pDXQuery->pQuery);
7171 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7172
7173 return VINF_SUCCESS;
7174}
7175
7176
7177static int dxDestroyQuery(DXQUERY *pDXQuery)
7178{
7179 D3D_RELEASE(pDXQuery->pQuery);
7180 return VINF_SUCCESS;
7181}
7182
7183
7184static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7185{
7186 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7187 RT_NOREF(pBackend);
7188
7189 return dxDefineQuery(pThisCC, pDXContext, queryId, pEntry);
7190}
7191
7192
7193static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7194{
7195 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7196 RT_NOREF(pBackend);
7197
7198 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7199 dxDestroyQuery(pDXQuery);
7200
7201 return VINF_SUCCESS;
7202}
7203
7204
7205/** @todo queryId makes pDXQuery redundant */
7206static int dxBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, DXQUERY *pDXQuery)
7207{
7208 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7209 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7210
7211 /* Begin is disabled for some queries. */
7212 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7213 if (pEntry->type == SVGA3D_QUERYTYPE_TIMESTAMP)
7214 return VINF_SUCCESS;
7215
7216 pDXDevice->pImmediateContext->Begin(pDXQuery->pQuery);
7217 return VINF_SUCCESS;
7218}
7219
7220
7221static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7222{
7223 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7224 RT_NOREF(pBackend);
7225
7226 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7227 int rc = dxBeginQuery(pThisCC, pDXContext, queryId, pDXQuery);
7228 return rc;
7229}
7230
7231
7232static int dxGetQueryResult(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7233 SVGADXQueryResultUnion *pQueryResult, uint32_t *pcbOut)
7234{
7235 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7236 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7237
7238 typedef union _DXQUERYRESULT
7239 {
7240 UINT64 occlusion;
7241 UINT64 timestamp;
7242 D3D11_QUERY_DATA_TIMESTAMP_DISJOINT timestampDisjoint;
7243 D3D11_QUERY_DATA_PIPELINE_STATISTICS pipelineStatistics;
7244 BOOL occlusionPredicate;
7245 D3D11_QUERY_DATA_SO_STATISTICS soStatistics;
7246 BOOL soOverflowPredicate;
7247 } DXQUERYRESULT;
7248
7249 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7250 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7251 VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7252 if (!pQueryInfo)
7253 return VERR_INVALID_PARAMETER;
7254
7255 DXQUERYRESULT dxQueryResult;
7256 while (pDXDevice->pImmediateContext->GetData(pDXQuery->pQuery, &dxQueryResult, pQueryInfo->cbDataD3D11, 0) != S_OK)
7257 {
7258 RTThreadYield();
7259 }
7260
7261 /* Copy back the result. */
7262 switch (pEntry->type)
7263 {
7264 case SVGA3D_QUERYTYPE_OCCLUSION:
7265 pQueryResult->occ.samplesRendered = (uint32_t)dxQueryResult.occlusion;
7266 break;
7267 case SVGA3D_QUERYTYPE_TIMESTAMP:
7268 pQueryResult->ts.timestamp = dxQueryResult.timestamp;
7269 break;
7270 case SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT:
7271 pQueryResult->tsDisjoint.realFrequency = dxQueryResult.timestampDisjoint.Frequency;
7272 pQueryResult->tsDisjoint.disjoint = dxQueryResult.timestampDisjoint.Disjoint;
7273 break;
7274 case SVGA3D_QUERYTYPE_PIPELINESTATS:
7275 pQueryResult->pipelineStats.inputAssemblyVertices = dxQueryResult.pipelineStatistics.IAVertices;
7276 pQueryResult->pipelineStats.inputAssemblyPrimitives = dxQueryResult.pipelineStatistics.IAPrimitives;
7277 pQueryResult->pipelineStats.vertexShaderInvocations = dxQueryResult.pipelineStatistics.VSInvocations;
7278 pQueryResult->pipelineStats.geometryShaderInvocations = dxQueryResult.pipelineStatistics.GSInvocations;
7279 pQueryResult->pipelineStats.geometryShaderPrimitives = dxQueryResult.pipelineStatistics.GSPrimitives;
7280 pQueryResult->pipelineStats.clipperInvocations = dxQueryResult.pipelineStatistics.CInvocations;
7281 pQueryResult->pipelineStats.clipperPrimitives = dxQueryResult.pipelineStatistics.CPrimitives;
7282 pQueryResult->pipelineStats.pixelShaderInvocations = dxQueryResult.pipelineStatistics.PSInvocations;
7283 pQueryResult->pipelineStats.hullShaderInvocations = dxQueryResult.pipelineStatistics.HSInvocations;
7284 pQueryResult->pipelineStats.domainShaderInvocations = dxQueryResult.pipelineStatistics.DSInvocations;
7285 pQueryResult->pipelineStats.computeShaderInvocations = dxQueryResult.pipelineStatistics.CSInvocations;
7286 break;
7287 case SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE:
7288 pQueryResult->occPred.anySamplesRendered = dxQueryResult.occlusionPredicate;
7289 break;
7290 case SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS:
7291 case SVGA3D_QUERYTYPE_SOSTATS_STREAM0:
7292 case SVGA3D_QUERYTYPE_SOSTATS_STREAM1:
7293 case SVGA3D_QUERYTYPE_SOSTATS_STREAM2:
7294 case SVGA3D_QUERYTYPE_SOSTATS_STREAM3:
7295 pQueryResult->soStats.numPrimitivesWritten = dxQueryResult.soStatistics.NumPrimitivesWritten;
7296 pQueryResult->soStats.numPrimitivesRequired = dxQueryResult.soStatistics.PrimitivesStorageNeeded;
7297 break;
7298 case SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE:
7299 case SVGA3D_QUERYTYPE_SOP_STREAM0:
7300 case SVGA3D_QUERYTYPE_SOP_STREAM1:
7301 case SVGA3D_QUERYTYPE_SOP_STREAM2:
7302 case SVGA3D_QUERYTYPE_SOP_STREAM3:
7303 pQueryResult->soPred.overflowed = dxQueryResult.soOverflowPredicate;
7304 break;
7305 case SVGA3D_QUERYTYPE_OCCLUSION64:
7306 pQueryResult->occ64.samplesRendered = dxQueryResult.occlusion;
7307 break;
7308 }
7309
7310 *pcbOut = pQueryInfo->cbDataVMSVGA;
7311 return VINF_SUCCESS;
7312}
7313
7314static int dxEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7315 SVGADXQueryResultUnion *pQueryResult, uint32_t *pcbOut)
7316{
7317 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7318 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7319
7320 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7321 pDXDevice->pImmediateContext->End(pDXQuery->pQuery);
7322
7323 /** @todo Consider issuing QueryEnd and getting data later in FIFO thread loop. */
7324 return dxGetQueryResult(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7325}
7326
7327
7328static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7329 SVGA3dQueryId queryId, SVGADXQueryResultUnion *pQueryResult, uint32_t *pcbOut)
7330{
7331 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7332 RT_NOREF(pBackend);
7333
7334 int rc = dxEndQuery(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7335 return rc;
7336}
7337
7338
7339static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, uint32_t predicateValue)
7340{
7341 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7342 RT_NOREF(pBackend);
7343
7344 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7345 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7346
7347 if (queryId != SVGA3D_INVALID_ID)
7348 {
7349 DEBUG_BREAKPOINT_TEST();
7350 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7351 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7352
7353 VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7354 if (!pQueryInfo)
7355 return VERR_INVALID_PARAMETER;
7356
7357 D3D_RELEASE(pDXQuery->pQuery);
7358
7359 D3D11_QUERY_DESC desc;
7360 desc.Query = pQueryInfo->dxQueryType;
7361 desc.MiscFlags = 0;
7362 if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7363 desc.MiscFlags |= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7364
7365 HRESULT hr = pDXDevice->pDevice->CreatePredicate(&desc, &pDXQuery->pPredicate);
7366 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7367
7368 pDXDevice->pImmediateContext->SetPredication(pDXQuery->pPredicate, RT_BOOL(predicateValue));
7369 }
7370 else
7371 pDXDevice->pImmediateContext->SetPredication(NULL, FALSE);
7372
7373 return VINF_SUCCESS;
7374}
7375
7376
7377static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cSOTarget, SVGA3dSoTarget const *paSoTarget)
7378{
7379 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7380 RT_NOREF(pBackend);
7381
7382 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7383 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7384
7385 /* For each paSoTarget[i]:
7386 * If the stream outout buffer object does not exist then create it.
7387 * If the surface has been updated by the guest then update the buffer object.
7388 * Use SOSetTargets to set the buffers.
7389 */
7390
7391 ID3D11Buffer *paResource[SVGA3D_DX_MAX_SOTARGETS];
7392 UINT paOffset[SVGA3D_DX_MAX_SOTARGETS];
7393
7394 /* Always re-bind all 4 SO targets. They can be NULL. */
7395 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
7396 {
7397 /* Get corresponding resource. Create the buffer if does not yet exist. */
7398 if (i < cSOTarget && paSoTarget[i].sid != SVGA_ID_INVALID)
7399 {
7400 PVMSVGA3DSURFACE pSurface;
7401 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paSoTarget[i].sid, &pSurface);
7402 AssertRCReturn(rc, rc);
7403
7404 if (pSurface->pBackendSurface == NULL)
7405 {
7406 /* Create the resource. */
7407 rc = vmsvga3dBackSurfaceCreateSoBuffer(pThisCC, pDXContext, pSurface);
7408 AssertRCReturn(rc, rc);
7409 }
7410
7411 /** @todo How paSoTarget[i].sizeInBytes is used? Maybe when the buffer is created? */
7412 paResource[i] = pSurface->pBackendSurface->u.pBuffer;
7413 paOffset[i] = paSoTarget[i].offset;
7414 }
7415 else
7416 {
7417 paResource[i] = NULL;
7418 paOffset[i] = 0;
7419 }
7420 }
7421
7422 pDevice->pImmediateContext->SOSetTargets(SVGA3D_DX_MAX_SOTARGETS, paResource, paOffset);
7423
7424 pDXContext->pBackendDXContext->cSOTarget = cSOTarget;
7425
7426 return VINF_SUCCESS;
7427}
7428
7429
7430static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
7431{
7432 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7433 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7434 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7435
7436 RT_NOREF(pBackend);
7437
7438 /* D3D11_VIEWPORT is identical to SVGA3dViewport. */
7439 D3D11_VIEWPORT *pViewports = (D3D11_VIEWPORT *)paViewport;
7440
7441 pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
7442 return VINF_SUCCESS;
7443}
7444
7445
7446static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
7447{
7448 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7449 RT_NOREF(pBackend);
7450
7451 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7452 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7453
7454 /* D3D11_RECT is identical to SVGASignedRect. */
7455 D3D11_RECT *pRects = (D3D11_RECT *)paRect;
7456
7457 pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
7458 return VINF_SUCCESS;
7459}
7460
7461
7462static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
7463{
7464 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7465 RT_NOREF(pBackend);
7466
7467 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7468 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7469
7470 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
7471 if (!pDXView->u.pRenderTargetView)
7472 {
7473//DEBUG_BREAKPOINT_TEST();
7474 /* (Re-)create the render target view, because a creation of a view is deferred until a draw or a clear call. */
7475 SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
7476 int rc = dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
7477 AssertRCReturn(rc, rc);
7478 }
7479 pDevice->pImmediateContext->ClearRenderTargetView(pDXView->u.pRenderTargetView, pRGBA->value);
7480 return VINF_SUCCESS;
7481}
7482
7483
7484static DECLCALLBACK(int) vmsvga3dBackVBDXClearRenderTargetViewRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId,
7485 SVGA3dRGBAFloat const *pColor, uint32_t cRect, SVGASignedRect const *paRect)
7486{
7487 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7488 RT_NOREF(pBackend);
7489
7490 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7491 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7492
7493 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
7494 if (!pDXView->u.pRenderTargetView)
7495 {
7496 /* (Re-)create the render target view, because a creation of a view is deferred until a draw or a clear call. */
7497 SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
7498 int rc = dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
7499 AssertRCReturn(rc, rc);
7500 }
7501 pDevice->pImmediateContext->ClearView(pDXView->u.pRenderTargetView, pColor->value, (D3D11_RECT *)paRect, cRect);
7502 return VINF_SUCCESS;
7503}
7504
7505
7506static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
7507{
7508 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7509 RT_NOREF(pBackend);
7510
7511 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7512 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7513
7514 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
7515 if (!pDXView->u.pDepthStencilView)
7516 {
7517//DEBUG_BREAKPOINT_TEST();
7518 /* (Re-)create the depth stencil view, because a creation of a view is deferred until a draw or a clear call. */
7519 SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
7520 int rc = dxDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
7521 AssertRCReturn(rc, rc);
7522 }
7523 pDevice->pImmediateContext->ClearDepthStencilView(pDXView->u.pDepthStencilView, flags, depth, stencil);
7524 return VINF_SUCCESS;
7525}
7526
7527
7528static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
7529{
7530 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7531 RT_NOREF(pBackend);
7532
7533 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7534 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7535
7536 PVMSVGA3DSURFACE pSrcSurface;
7537 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
7538 AssertRCReturn(rc, rc);
7539
7540 PVMSVGA3DSURFACE pDstSurface;
7541 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
7542 AssertRCReturn(rc, rc);
7543
7544 if (pSrcSurface->pBackendSurface == NULL)
7545 {
7546 /* Create the resource. */
7547 if (pSrcSurface->format != SVGA3D_BUFFER)
7548 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
7549 else
7550 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
7551 AssertRCReturn(rc, rc);
7552 }
7553
7554 if (pDstSurface->pBackendSurface == NULL)
7555 {
7556 /* Create the resource. */
7557 if (pSrcSurface->format != SVGA3D_BUFFER)
7558 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
7559 else
7560 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
7561 AssertRCReturn(rc, rc);
7562 }
7563
7564 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
7565 pDXContext->cid, pSrcSurface->idAssociatedContext,
7566 (pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
7567 pDstSurface->idAssociatedContext,
7568 (pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
7569
7570 /* Clip the box. */
7571 /** @todo Use [src|dst]SubResource to index p[Src|Dst]Surface->paMipmapLevels array directly. */
7572 uint32_t iSrcFace;
7573 uint32_t iSrcMipmap;
7574 vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
7575
7576 uint32_t iDstFace;
7577 uint32_t iDstMipmap;
7578 vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
7579
7580 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
7581 rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
7582 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
7583
7584 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
7585 rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
7586 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
7587
7588 SVGA3dCopyBox clipBox = *pBox;
7589 vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
7590
7591 UINT DstSubresource = dstSubResource;
7592 UINT DstX = clipBox.x;
7593 UINT DstY = clipBox.y;
7594 UINT DstZ = clipBox.z;
7595
7596 UINT SrcSubresource = srcSubResource;
7597 D3D11_BOX SrcBox;
7598 SrcBox.left = clipBox.srcx;
7599 SrcBox.top = clipBox.srcy;
7600 SrcBox.front = clipBox.srcz;
7601 SrcBox.right = clipBox.srcx + clipBox.w;
7602 SrcBox.bottom = clipBox.srcy + clipBox.h;
7603 SrcBox.back = clipBox.srcz + clipBox.d;
7604
7605 ID3D11Resource *pDstResource;
7606 ID3D11Resource *pSrcResource;
7607
7608 pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
7609 pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
7610
7611 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
7612 pSrcResource, SrcSubresource, &SrcBox);
7613
7614 pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
7615 return VINF_SUCCESS;
7616}
7617
7618
7619static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, SVGA3dSurfaceId srcSid)
7620{
7621 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7622 RT_NOREF(pBackend);
7623
7624 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7625 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7626
7627 PVMSVGA3DSURFACE pSrcSurface;
7628 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
7629 AssertRCReturn(rc, rc);
7630
7631 PVMSVGA3DSURFACE pDstSurface;
7632 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
7633 AssertRCReturn(rc, rc);
7634
7635 if (pSrcSurface->pBackendSurface == NULL)
7636 {
7637 /* Create the resource. */
7638 if (pSrcSurface->format != SVGA3D_BUFFER)
7639 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
7640 else
7641 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
7642 AssertRCReturn(rc, rc);
7643 }
7644
7645 if (pDstSurface->pBackendSurface == NULL)
7646 {
7647 /* Create the resource. */
7648 if (pSrcSurface->format != SVGA3D_BUFFER)
7649 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
7650 else
7651 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
7652 AssertRCReturn(rc, rc);
7653 }
7654
7655 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
7656 pDXContext->cid, pSrcSurface->idAssociatedContext,
7657 (pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
7658 pDstSurface->idAssociatedContext,
7659 (pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
7660
7661 ID3D11Resource *pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
7662 ID3D11Resource *pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
7663
7664 pDevice->pImmediateContext->CopyResource(pDstResource, pSrcResource);
7665
7666 pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
7667 return VINF_SUCCESS;
7668}
7669
7670
7671#include "shaders/d3d11blitter.hlsl.vs.h"
7672#include "shaders/d3d11blitter.hlsl.ps.h"
7673
7674#define HTEST(stmt) \
7675 hr = stmt; \
7676 AssertReturn(SUCCEEDED(hr), hr)
7677
7678
7679static void BlitRelease(D3D11BLITTER *pBlitter)
7680{
7681 D3D_RELEASE(pBlitter->pVertexShader);
7682 D3D_RELEASE(pBlitter->pPixelShader);
7683 D3D_RELEASE(pBlitter->pSamplerState);
7684 D3D_RELEASE(pBlitter->pRasterizerState);
7685 D3D_RELEASE(pBlitter->pBlendState);
7686 RT_ZERO(*pBlitter);
7687}
7688
7689
7690static HRESULT BlitInit(D3D11BLITTER *pBlitter, ID3D11Device *pDevice, ID3D11DeviceContext *pImmediateContext)
7691{
7692 HRESULT hr;
7693
7694 RT_ZERO(*pBlitter);
7695
7696 pBlitter->pDevice = pDevice;
7697 pBlitter->pImmediateContext = pImmediateContext;
7698
7699 HTEST(pBlitter->pDevice->CreateVertexShader(g_vs_blitter, sizeof(g_vs_blitter), NULL, &pBlitter->pVertexShader));
7700 HTEST(pBlitter->pDevice->CreatePixelShader(g_ps_blitter, sizeof(g_ps_blitter), NULL, &pBlitter->pPixelShader));
7701
7702 D3D11_SAMPLER_DESC SamplerDesc;
7703 SamplerDesc.Filter = D3D11_FILTER_ANISOTROPIC;
7704 SamplerDesc.AddressU = D3D11_TEXTURE_ADDRESS_WRAP;
7705 SamplerDesc.AddressV = D3D11_TEXTURE_ADDRESS_WRAP;
7706 SamplerDesc.AddressW = D3D11_TEXTURE_ADDRESS_WRAP;
7707 SamplerDesc.MipLODBias = 0.0f;
7708 SamplerDesc.MaxAnisotropy = 4;
7709 SamplerDesc.ComparisonFunc = D3D11_COMPARISON_ALWAYS;
7710 SamplerDesc.BorderColor[0] = 0.0f;
7711 SamplerDesc.BorderColor[1] = 0.0f;
7712 SamplerDesc.BorderColor[2] = 0.0f;
7713 SamplerDesc.BorderColor[3] = 0.0f;
7714 SamplerDesc.MinLOD = 0.0f;
7715 SamplerDesc.MaxLOD = 0.0f;
7716 HTEST(pBlitter->pDevice->CreateSamplerState(&SamplerDesc, &pBlitter->pSamplerState));
7717
7718 D3D11_RASTERIZER_DESC RasterizerDesc;
7719 RasterizerDesc.FillMode = D3D11_FILL_SOLID;
7720 RasterizerDesc.CullMode = D3D11_CULL_NONE;
7721 RasterizerDesc.FrontCounterClockwise = FALSE;
7722 RasterizerDesc.DepthBias = 0;
7723 RasterizerDesc.DepthBiasClamp = 0.0f;
7724 RasterizerDesc.SlopeScaledDepthBias = 0.0f;
7725 RasterizerDesc.DepthClipEnable = FALSE;
7726 RasterizerDesc.ScissorEnable = FALSE;
7727 RasterizerDesc.MultisampleEnable = FALSE;
7728 RasterizerDesc.AntialiasedLineEnable = FALSE;
7729 HTEST(pBlitter->pDevice->CreateRasterizerState(&RasterizerDesc, &pBlitter->pRasterizerState));
7730
7731 D3D11_BLEND_DESC BlendDesc;
7732 BlendDesc.AlphaToCoverageEnable = FALSE;
7733 BlendDesc.IndependentBlendEnable = FALSE;
7734 for (unsigned i = 0; i < RT_ELEMENTS(BlendDesc.RenderTarget); ++i)
7735 {
7736 BlendDesc.RenderTarget[i].BlendEnable = FALSE;
7737 BlendDesc.RenderTarget[i].SrcBlend = D3D11_BLEND_SRC_COLOR;
7738 BlendDesc.RenderTarget[i].DestBlend = D3D11_BLEND_ZERO;
7739 BlendDesc.RenderTarget[i].BlendOp = D3D11_BLEND_OP_ADD;
7740 BlendDesc.RenderTarget[i].SrcBlendAlpha = D3D11_BLEND_SRC_ALPHA;
7741 BlendDesc.RenderTarget[i].DestBlendAlpha = D3D11_BLEND_ZERO;
7742 BlendDesc.RenderTarget[i].BlendOpAlpha = D3D11_BLEND_OP_ADD;
7743 BlendDesc.RenderTarget[i].RenderTargetWriteMask = 0xF;
7744 }
7745 HTEST(pBlitter->pDevice->CreateBlendState(&BlendDesc, &pBlitter->pBlendState));
7746
7747 return S_OK;
7748}
7749
7750
7751static HRESULT BlitFromTexture(D3D11BLITTER *pBlitter, ID3D11RenderTargetView *pDstRenderTargetView,
7752 float cDstWidth, float cDstHeight, D3D11_RECT const &rectDst,
7753 ID3D11ShaderResourceView *pSrcShaderResourceView)
7754{
7755 HRESULT hr;
7756
7757 /*
7758 * Save pipeline state.
7759 */
7760 struct
7761 {
7762 D3D11_PRIMITIVE_TOPOLOGY Topology;
7763 ID3D11InputLayout *pInputLayout;
7764 ID3D11Buffer *pConstantBuffer;
7765 ID3D11VertexShader *pVertexShader;
7766 ID3D11HullShader *pHullShader;
7767 ID3D11DomainShader *pDomainShader;
7768 ID3D11GeometryShader *pGeometryShader;
7769 ID3D11ShaderResourceView *pShaderResourceView;
7770 ID3D11PixelShader *pPixelShader;
7771 ID3D11SamplerState *pSamplerState;
7772 ID3D11RasterizerState *pRasterizerState;
7773 ID3D11BlendState *pBlendState;
7774 FLOAT BlendFactor[4];
7775 UINT SampleMask;
7776 ID3D11RenderTargetView *apRenderTargetView[D3D11_SIMULTANEOUS_RENDER_TARGET_COUNT];
7777 ID3D11DepthStencilView *pDepthStencilView;
7778 UINT NumViewports;
7779 D3D11_VIEWPORT aViewport[D3D11_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE];
7780 } SavedState;
7781
7782 pBlitter->pImmediateContext->IAGetPrimitiveTopology(&SavedState.Topology);
7783 pBlitter->pImmediateContext->IAGetInputLayout(&SavedState.pInputLayout);
7784 pBlitter->pImmediateContext->VSGetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
7785 pBlitter->pImmediateContext->VSGetShader(&SavedState.pVertexShader, NULL, NULL);
7786 pBlitter->pImmediateContext->HSGetShader(&SavedState.pHullShader, NULL, NULL);
7787 pBlitter->pImmediateContext->DSGetShader(&SavedState.pDomainShader, NULL, NULL);
7788 pBlitter->pImmediateContext->GSGetShader(&SavedState.pGeometryShader, NULL, NULL);
7789 pBlitter->pImmediateContext->PSGetShaderResources(0, 1, &SavedState.pShaderResourceView);
7790 pBlitter->pImmediateContext->PSGetShader(&SavedState.pPixelShader, NULL, NULL);
7791 pBlitter->pImmediateContext->PSGetSamplers(0, 1, &SavedState.pSamplerState);
7792 pBlitter->pImmediateContext->RSGetState(&SavedState.pRasterizerState);
7793 pBlitter->pImmediateContext->OMGetBlendState(&SavedState.pBlendState, SavedState.BlendFactor, &SavedState.SampleMask);
7794 pBlitter->pImmediateContext->OMGetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, &SavedState.pDepthStencilView);
7795 SavedState.NumViewports = RT_ELEMENTS(SavedState.aViewport);
7796 pBlitter->pImmediateContext->RSGetViewports(&SavedState.NumViewports, &SavedState.aViewport[0]);
7797
7798 /*
7799 * Setup pipeline for the blitter.
7800 */
7801
7802 /* Render target is first.
7803 * If the source texture is bound as a render target, then this call will unbind it
7804 * and allow to use it as the shader resource.
7805 */
7806 pBlitter->pImmediateContext->OMSetRenderTargets(1, &pDstRenderTargetView, NULL);
7807
7808 /* Input assembler. */
7809 pBlitter->pImmediateContext->IASetInputLayout(NULL);
7810 pBlitter->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
7811
7812 /* Constant buffer. */
7813 struct
7814 {
7815 float scaleX;
7816 float scaleY;
7817 float offsetX;
7818 float offsetY;
7819 } VSConstantBuffer;
7820 VSConstantBuffer.scaleX = (float)(rectDst.right - rectDst.left) / cDstWidth;
7821 VSConstantBuffer.scaleY = (float)(rectDst.bottom - rectDst.top) / cDstHeight;
7822 VSConstantBuffer.offsetX = (float)(rectDst.right + rectDst.left) / cDstWidth - 1.0f;
7823 VSConstantBuffer.offsetY = -((float)(rectDst.bottom + rectDst.top) / cDstHeight - 1.0f);
7824
7825 D3D11_SUBRESOURCE_DATA initialData;
7826 initialData.pSysMem = &VSConstantBuffer;
7827 initialData.SysMemPitch = sizeof(VSConstantBuffer);
7828 initialData.SysMemSlicePitch = sizeof(VSConstantBuffer);
7829
7830 D3D11_BUFFER_DESC bd;
7831 RT_ZERO(bd);
7832 bd.ByteWidth = sizeof(VSConstantBuffer);
7833 bd.Usage = D3D11_USAGE_IMMUTABLE;
7834 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
7835
7836 ID3D11Buffer *pConstantBuffer;
7837 HTEST(pBlitter->pDevice->CreateBuffer(&bd, &initialData, &pConstantBuffer));
7838 pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &pConstantBuffer);
7839 D3D_RELEASE(pConstantBuffer); /* xSSetConstantBuffers "will hold a reference to the interfaces passed in." */
7840
7841 /* Vertex shader. */
7842 pBlitter->pImmediateContext->VSSetShader(pBlitter->pVertexShader, NULL, 0);
7843
7844 /* Unused shaders. */
7845 pBlitter->pImmediateContext->HSSetShader(NULL, NULL, 0);
7846 pBlitter->pImmediateContext->DSSetShader(NULL, NULL, 0);
7847 pBlitter->pImmediateContext->GSSetShader(NULL, NULL, 0);
7848
7849 /* Shader resource view. */
7850 pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &pSrcShaderResourceView);
7851
7852 /* Pixel shader. */
7853 pBlitter->pImmediateContext->PSSetShader(pBlitter->pPixelShader, NULL, 0);
7854
7855 /* Sampler. */
7856 pBlitter->pImmediateContext->PSSetSamplers(0, 1, &pBlitter->pSamplerState);
7857
7858 /* Rasterizer. */
7859 pBlitter->pImmediateContext->RSSetState(pBlitter->pRasterizerState);
7860
7861 /* Blend state. */
7862 static FLOAT const BlendFactor[4] = { 0.0f, 0.0f, 0.0f, 0.0f };
7863 pBlitter->pImmediateContext->OMSetBlendState(pBlitter->pBlendState, BlendFactor, 0xffffffff);
7864
7865 /* Viewport. */
7866 D3D11_VIEWPORT Viewport;
7867 Viewport.TopLeftX = 0;
7868 Viewport.TopLeftY = 0;
7869 Viewport.Width = cDstWidth;
7870 Viewport.Height = cDstHeight;
7871 Viewport.MinDepth = 0.0f;
7872 Viewport.MaxDepth = 1.0f;
7873 pBlitter->pImmediateContext->RSSetViewports(1, &Viewport);
7874
7875 /* Draw. */
7876 pBlitter->pImmediateContext->Draw(4, 0);
7877
7878 /*
7879 * Restore pipeline state.
7880 */
7881 pBlitter->pImmediateContext->IASetPrimitiveTopology(SavedState.Topology);
7882 pBlitter->pImmediateContext->IASetInputLayout(SavedState.pInputLayout);
7883 D3D_RELEASE(SavedState.pInputLayout);
7884 pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
7885 D3D_RELEASE(SavedState.pConstantBuffer);
7886 pBlitter->pImmediateContext->VSSetShader(SavedState.pVertexShader, NULL, 0);
7887 D3D_RELEASE(SavedState.pVertexShader);
7888
7889 pBlitter->pImmediateContext->HSSetShader(SavedState.pHullShader, NULL, 0);
7890 D3D_RELEASE(SavedState.pHullShader);
7891 pBlitter->pImmediateContext->DSSetShader(SavedState.pDomainShader, NULL, 0);
7892 D3D_RELEASE(SavedState.pDomainShader);
7893 pBlitter->pImmediateContext->GSSetShader(SavedState.pGeometryShader, NULL, 0);
7894 D3D_RELEASE(SavedState.pGeometryShader);
7895
7896 pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &SavedState.pShaderResourceView);
7897 D3D_RELEASE(SavedState.pShaderResourceView);
7898 pBlitter->pImmediateContext->PSSetShader(SavedState.pPixelShader, NULL, 0);
7899 D3D_RELEASE(SavedState.pPixelShader);
7900 pBlitter->pImmediateContext->PSSetSamplers(0, 1, &SavedState.pSamplerState);
7901 D3D_RELEASE(SavedState.pSamplerState);
7902 pBlitter->pImmediateContext->RSSetState(SavedState.pRasterizerState);
7903 D3D_RELEASE(SavedState.pRasterizerState);
7904 pBlitter->pImmediateContext->OMSetBlendState(SavedState.pBlendState, SavedState.BlendFactor, SavedState.SampleMask);
7905 D3D_RELEASE(SavedState.pBlendState);
7906 pBlitter->pImmediateContext->OMSetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, SavedState.pDepthStencilView);
7907 D3D_RELEASE_ARRAY(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView);
7908 D3D_RELEASE(SavedState.pDepthStencilView);
7909 pBlitter->pImmediateContext->RSSetViewports(SavedState.NumViewports, &SavedState.aViewport[0]);
7910
7911 return S_OK;
7912}
7913
7914
7915static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7916 SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dBox const *pBoxDst,
7917 SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dBox const *pBoxSrc,
7918 SVGA3dDXPresentBltMode mode)
7919{
7920 RT_NOREF(mode);
7921
7922 ASSERT_GUEST_RETURN(pBoxDst->z == 0 && pBoxDst->d == 1, VERR_INVALID_PARAMETER);
7923 ASSERT_GUEST_RETURN(pBoxSrc->z == 0 && pBoxSrc->d == 1, VERR_INVALID_PARAMETER);
7924
7925 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7926 RT_NOREF(pBackend);
7927
7928 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7929 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7930
7931 PVMSVGA3DSURFACE pSrcSurface;
7932 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
7933 AssertRCReturn(rc, rc);
7934
7935 PVMSVGA3DSURFACE pDstSurface;
7936 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
7937 AssertRCReturn(rc, rc);
7938
7939 if (pSrcSurface->pBackendSurface == NULL)
7940 {
7941 /* Create the resource. */
7942 if (pSrcSurface->format != SVGA3D_BUFFER)
7943 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
7944 else
7945 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
7946 AssertRCReturn(rc, rc);
7947 }
7948
7949 if (pDstSurface->pBackendSurface == NULL)
7950 {
7951 /* Create the resource. */
7952 if (pSrcSurface->format != SVGA3D_BUFFER)
7953 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
7954 else
7955 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
7956 AssertRCReturn(rc, rc);
7957 }
7958
7959 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
7960 pDXContext->cid, pSrcSurface->idAssociatedContext,
7961 (pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
7962 pDstSurface->idAssociatedContext,
7963 (pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
7964
7965 /* Clip the box. */
7966 /** @todo Use [src|dst]SubResource to index p[Src|Dst]Surface->paMipmapLevels array directly. */
7967 uint32_t iSrcFace;
7968 uint32_t iSrcMipmap;
7969 vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
7970
7971 uint32_t iDstFace;
7972 uint32_t iDstMipmap;
7973 vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
7974
7975 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
7976 rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
7977 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
7978
7979 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
7980 rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
7981 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
7982
7983 SVGA3dBox clipBoxSrc = *pBoxSrc;
7984 vmsvgaR3ClipBox(&pSrcMipLevel->mipmapSize, &clipBoxSrc);
7985
7986 SVGA3dBox clipBoxDst = *pBoxDst;
7987 vmsvgaR3ClipBox(&pDstMipLevel->mipmapSize, &clipBoxDst);
7988
7989 ID3D11Resource *pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
7990 ID3D11Resource *pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
7991
7992 D3D11_RENDER_TARGET_VIEW_DESC RTVDesc;
7993 RT_ZERO(RTVDesc);
7994 RTVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pDstSurface->format);;
7995 RTVDesc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
7996 RTVDesc.Texture2D.MipSlice = dstSubResource;
7997
7998 ID3D11RenderTargetView *pDstRenderTargetView;
7999 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pDstResource, &RTVDesc, &pDstRenderTargetView);
8000 AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
8001
8002 D3D11_SHADER_RESOURCE_VIEW_DESC SRVDesc;
8003 RT_ZERO(SRVDesc);
8004 SRVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pSrcSurface->format);
8005 SRVDesc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
8006 SRVDesc.Texture2D.MostDetailedMip = srcSubResource;
8007 SRVDesc.Texture2D.MipLevels = 1;
8008
8009 ID3D11ShaderResourceView *pSrcShaderResourceView;
8010 hr = pDevice->pDevice->CreateShaderResourceView(pSrcResource, &SRVDesc, &pSrcShaderResourceView);
8011 AssertReturnStmt(SUCCEEDED(hr), D3D_RELEASE(pDstRenderTargetView), VERR_NOT_SUPPORTED);
8012
8013 D3D11_RECT rectDst;
8014 rectDst.left = pBoxDst->x;
8015 rectDst.top = pBoxDst->y;
8016 rectDst.right = pBoxDst->x + pBoxDst->w;
8017 rectDst.bottom = pBoxDst->y + pBoxDst->h;
8018
8019 BlitFromTexture(&pDevice->Blitter, pDstRenderTargetView, (float)pDstMipLevel->mipmapSize.width, (float)pDstMipLevel->mipmapSize.height,
8020 rectDst, pSrcShaderResourceView);
8021
8022 D3D_RELEASE(pSrcShaderResourceView);
8023 D3D_RELEASE(pDstRenderTargetView);
8024
8025 pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
8026 return VINF_SUCCESS;
8027}
8028
8029
8030static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8031{
8032 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8033 RT_NOREF(pBackend);
8034
8035 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8036 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8037
8038 ID3D11ShaderResourceView *pShaderResourceView = pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId].u.pShaderResourceView;
8039 AssertReturn(pShaderResourceView, VERR_INVALID_STATE);
8040
8041 SVGACOTableDXSRViewEntry const *pSRViewEntry = dxGetShaderResourceViewEntry(pDXContext, shaderResourceViewId);
8042 AssertReturn(pSRViewEntry, VERR_INVALID_STATE);
8043
8044 uint32_t const sid = pSRViewEntry->sid;
8045
8046 PVMSVGA3DSURFACE pSurface;
8047 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
8048 AssertRCReturn(rc, rc);
8049 AssertReturn(pSurface->pBackendSurface, VERR_INVALID_STATE);
8050
8051 pDevice->pImmediateContext->GenerateMips(pShaderResourceView);
8052
8053 pSurface->pBackendSurface->cidDrawing = pDXContext->cid;
8054 return VINF_SUCCESS;
8055}
8056
8057
8058static int dxDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
8059{
8060 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
8061 PVMSVGA3DSURFACE pSurface;
8062 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
8063 AssertRCReturn(rc, rc);
8064
8065 ID3D11ShaderResourceView *pShaderResourceView;
8066 DXVIEW *pView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
8067 Assert(pView->u.pView == NULL);
8068
8069 if (pSurface->pBackendSurface == NULL)
8070 {
8071 /* Create the actual texture or buffer. */
8072 /** @todo One function to create all resources from surfaces. */
8073 if (pSurface->format != SVGA3D_BUFFER)
8074 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
8075 else
8076 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
8077
8078 AssertRCReturn(rc, rc);
8079 }
8080
8081 HRESULT hr = dxShaderResourceViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pShaderResourceView);
8082 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
8083
8084 return dxViewInit(pView, pSurface, pDXContext, shaderResourceViewId, VMSVGA3D_VIEWTYPE_SHADERRESOURCE, pShaderResourceView);
8085}
8086
8087
8088static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
8089{
8090 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8091 RT_NOREF(pBackend);
8092
8093 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8094 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8095
8096 /** @todo Probably not necessary because SRVs are defined in setupPipeline. */
8097 return dxDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
8098}
8099
8100
8101static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8102{
8103 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8104 RT_NOREF(pBackend);
8105
8106 return dxViewDestroy(&pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId]);
8107}
8108
8109
8110static int dxDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
8111{
8112 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
8113 PVMSVGA3DSURFACE pSurface;
8114 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
8115 AssertRCReturn(rc, rc);
8116
8117 DXVIEW *pView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
8118 Assert(pView->u.pView == NULL);
8119
8120 if (pSurface->pBackendSurface == NULL)
8121 {
8122 /* Create the actual texture. */
8123 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
8124 AssertRCReturn(rc, rc);
8125 }
8126
8127 ID3D11RenderTargetView *pRenderTargetView;
8128 HRESULT hr = dxRenderTargetViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pRenderTargetView);
8129 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
8130
8131 return dxViewInit(pView, pSurface, pDXContext, renderTargetViewId, VMSVGA3D_VIEWTYPE_RENDERTARGET, pRenderTargetView);
8132}
8133
8134
8135static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
8136{
8137 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8138 RT_NOREF(pBackend);
8139
8140 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8141 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8142
8143 return dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
8144}
8145
8146
8147static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
8148{
8149 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8150 RT_NOREF(pBackend);
8151
8152 return dxViewDestroy(&pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId]);
8153}
8154
8155
8156static int dxDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
8157{
8158 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
8159 PVMSVGA3DSURFACE pSurface;
8160 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
8161 AssertRCReturn(rc, rc);
8162
8163 DXVIEW *pView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
8164 Assert(pView->u.pView == NULL);
8165
8166 if (pSurface->pBackendSurface == NULL)
8167 {
8168 /* Create the actual texture. */
8169 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
8170 AssertRCReturn(rc, rc);
8171 }
8172
8173 ID3D11DepthStencilView *pDepthStencilView;
8174 HRESULT hr = dxDepthStencilViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pDepthStencilView);
8175 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
8176
8177 return dxViewInit(pView, pSurface, pDXContext, depthStencilViewId, VMSVGA3D_VIEWTYPE_DEPTHSTENCIL, pDepthStencilView);
8178}
8179
8180static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
8181{
8182 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8183 RT_NOREF(pBackend);
8184
8185 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8186 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8187
8188 return dxDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
8189}
8190
8191
8192static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
8193{
8194 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8195 RT_NOREF(pBackend);
8196
8197 return dxViewDestroy(&pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId]);
8198}
8199
8200
8201static int dxDefineElementLayout(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8202{
8203 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8204 D3D_RELEASE(pDXElementLayout->pElementLayout);
8205 pDXElementLayout->cElementDesc = 0;
8206 RT_ZERO(pDXElementLayout->aElementDesc);
8207
8208 RT_NOREF(pEntry);
8209
8210 return VINF_SUCCESS;
8211}
8212
8213
8214static int dxDestroyElementLayout(DXELEMENTLAYOUT *pDXElementLayout)
8215{
8216 D3D_RELEASE(pDXElementLayout->pElementLayout);
8217 pDXElementLayout->cElementDesc = 0;
8218 RT_ZERO(pDXElementLayout->aElementDesc);
8219 return VINF_SUCCESS;
8220}
8221
8222
8223static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8224{
8225 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8226 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8227 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8228
8229 RT_NOREF(pBackend);
8230
8231 /* Not much can be done here because ID3D11Device::CreateInputLayout requires
8232 * a pShaderBytecodeWithInputSignature which is not known at this moment.
8233 * InputLayout object will be created in setupPipeline.
8234 */
8235
8236 Assert(elementLayoutId == pEntry->elid);
8237
8238 return dxDefineElementLayout(pDXContext, elementLayoutId, pEntry);
8239}
8240
8241
8242static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
8243{
8244 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8245 RT_NOREF(pBackend);
8246
8247 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8248 dxDestroyElementLayout(pDXElementLayout);
8249
8250 return VINF_SUCCESS;
8251}
8252
8253
8254static int dxDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8255 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8256{
8257 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8258 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8259
8260 HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
8261 if (SUCCEEDED(hr))
8262 return VINF_SUCCESS;
8263 return VERR_INVALID_STATE;
8264}
8265
8266
8267static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8268 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8269{
8270 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8271 RT_NOREF(pBackend);
8272
8273 return dxDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
8274}
8275
8276
8277static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId)
8278{
8279 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8280 RT_NOREF(pBackend);
8281
8282 D3D_RELEASE(pDXContext->pBackendDXContext->papBlendState[blendId]);
8283 return VINF_SUCCESS;
8284}
8285
8286
8287static int dxDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8288{
8289 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8290 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8291
8292 HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8293 if (SUCCEEDED(hr))
8294 return VINF_SUCCESS;
8295 return VERR_INVALID_STATE;
8296}
8297
8298
8299static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8300{
8301 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8302 RT_NOREF(pBackend);
8303
8304 return dxDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
8305}
8306
8307
8308static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId)
8309{
8310 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8311 RT_NOREF(pBackend);
8312
8313 D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8314 return VINF_SUCCESS;
8315}
8316
8317
8318static int dxDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8319{
8320 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8321 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8322
8323 HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8324 if (SUCCEEDED(hr))
8325 return VINF_SUCCESS;
8326 return VERR_INVALID_STATE;
8327}
8328
8329
8330static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8331{
8332 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8333 RT_NOREF(pBackend);
8334
8335 return dxDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
8336}
8337
8338
8339static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
8340{
8341 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8342 RT_NOREF(pBackend);
8343
8344 D3D_RELEASE(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8345 return VINF_SUCCESS;
8346}
8347
8348
8349static int dxDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8350{
8351 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8352 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8353
8354 HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8355 if (SUCCEEDED(hr))
8356 return VINF_SUCCESS;
8357 return VERR_INVALID_STATE;
8358}
8359
8360
8361static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8362{
8363 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8364 RT_NOREF(pBackend);
8365
8366 return dxDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
8367}
8368
8369
8370static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId)
8371{
8372 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8373 RT_NOREF(pBackend);
8374
8375 D3D_RELEASE(pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8376 return VINF_SUCCESS;
8377}
8378
8379
8380static int dxDefineShader(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8381{
8382 /** @todo A common approach for creation of COTable backend objects: runtime, empty DX COTable, live DX COTable. */
8383 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8384 Assert(pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID);
8385
8386 /* Init the backend shader structure, if the shader has not been created yet. */
8387 pDXShader->enmShaderType = pEntry->type;
8388 pDXShader->pShader = NULL;
8389 pDXShader->soid = SVGA_ID_INVALID;
8390
8391 return VINF_SUCCESS;
8392}
8393
8394
8395static int dxDestroyShader(DXSHADER *pDXShader)
8396{
8397 pDXShader->enmShaderType = SVGA3D_SHADERTYPE_INVALID;
8398 D3D_RELEASE(pDXShader->pShader);
8399 RTMemFree(pDXShader->pvDXBC);
8400 pDXShader->pvDXBC = NULL;
8401 pDXShader->cbDXBC = 0;
8402 pDXShader->soid = SVGA_ID_INVALID;
8403 return VINF_SUCCESS;
8404}
8405
8406
8407static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8408{
8409 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8410 RT_NOREF(pBackend);
8411
8412 return dxDefineShader(pDXContext, shaderId, pEntry);
8413}
8414
8415
8416static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId)
8417{
8418 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8419 RT_NOREF(pBackend);
8420
8421 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8422 dxDestroyShader(pDXShader);
8423
8424 return VINF_SUCCESS;
8425}
8426
8427
8428static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, DXShaderInfo const *pShaderInfo)
8429{
8430 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8431 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8432 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8433
8434 RT_NOREF(pBackend);
8435
8436 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8437 if (pDXShader->pvDXBC)
8438 {
8439 /* New DXBC code and new shader must be created. */
8440 D3D_RELEASE(pDXShader->pShader);
8441 RTMemFree(pDXShader->pvDXBC);
8442 pDXShader->pvDXBC = NULL;
8443 pDXShader->cbDXBC = 0;
8444 }
8445
8446 pDXShader->shaderInfo = *pShaderInfo;
8447
8448 return VINF_SUCCESS;
8449}
8450
8451
8452static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry)
8453{
8454 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8455 RT_NOREF(pBackend);
8456
8457 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8458 dxDestroyStreamOutput(pDXStreamOutput);
8459
8460 RT_NOREF(pEntry);
8461 return VINF_SUCCESS;
8462}
8463
8464
8465static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
8466{
8467 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8468 RT_NOREF(pBackend);
8469
8470 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8471 dxDestroyStreamOutput(pDXStreamOutput);
8472
8473 return VINF_SUCCESS;
8474}
8475
8476
8477static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
8478{
8479 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8480 RT_NOREF(pBackend, pDXContext, soid);
8481
8482 return VINF_SUCCESS;
8483}
8484
8485
8486static int dxCOTableRealloc(void **ppvCOTable, uint32_t *pcCOTable, uint32_t cbEntry, uint32_t cEntries, uint32_t cValidEntries)
8487{
8488 uint32_t const cCOTableCurrent = *pcCOTable;
8489
8490 if (*pcCOTable != cEntries)
8491 {
8492 /* Grow/shrink the array. */
8493 if (cEntries)
8494 {
8495 void *pvNew = RTMemRealloc(*ppvCOTable, cEntries * cbEntry);
8496 AssertReturn(pvNew, VERR_NO_MEMORY);
8497 *ppvCOTable = pvNew;
8498 }
8499 else
8500 {
8501 RTMemFree(*ppvCOTable);
8502 *ppvCOTable = NULL;
8503 }
8504
8505 *pcCOTable = cEntries;
8506 }
8507
8508 if (*ppvCOTable)
8509 {
8510 uint32_t const cEntriesToKeep = RT_MIN(cCOTableCurrent, cValidEntries);
8511 memset((uint8_t *)(*ppvCOTable) + cEntriesToKeep * cbEntry, 0, (cEntries - cEntriesToKeep) * cbEntry);
8512 }
8513
8514 return VINF_SUCCESS;
8515}
8516
8517static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cValidEntries)
8518{
8519 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8520 RT_NOREF(pBackend);
8521
8522 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
8523
8524 int rc = VINF_SUCCESS;
8525
8526 /*
8527 * 1) Release current backend table, if exists;
8528 * 2) Reallocate memory for the new backend table;
8529 * 3) If cValidEntries is not zero, then re-define corresponding backend table elements.
8530 */
8531 switch (type)
8532 {
8533 case SVGA_COTABLE_RTVIEW:
8534 /* Clear current entries. */
8535 if (pBackendDXContext->paRenderTargetView)
8536 {
8537 for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
8538 {
8539 DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
8540 if (i < cValidEntries)
8541 dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8542 else
8543 dxViewDestroy(pDXView);
8544 }
8545 }
8546
8547 rc = dxCOTableRealloc((void **)&pBackendDXContext->paRenderTargetView, &pBackendDXContext->cRenderTargetView,
8548 sizeof(pBackendDXContext->paRenderTargetView[0]), pDXContext->cot.cRTView, cValidEntries);
8549 AssertRCBreak(rc);
8550
8551 for (uint32_t i = 0; i < cValidEntries; ++i)
8552 {
8553 SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[i];
8554 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8555 continue; /* Skip uninitialized entry. */
8556
8557 /* Define views which were not defined yet in backend. */
8558 DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
8559 /** @todo Verify that the pEntry content still corresponds to the view. */
8560 if (pDXView->u.pView)
8561 dxViewAddToList(pThisCC, pDXView);
8562 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
8563 dxDefineRenderTargetView(pThisCC, pDXContext, i, pEntry);
8564 }
8565 break;
8566 case SVGA_COTABLE_DSVIEW:
8567 if (pBackendDXContext->paDepthStencilView)
8568 {
8569 for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
8570 {
8571 DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
8572 if (i < cValidEntries)
8573 dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8574 else
8575 dxViewDestroy(pDXView);
8576 }
8577 }
8578
8579 rc = dxCOTableRealloc((void **)&pBackendDXContext->paDepthStencilView, &pBackendDXContext->cDepthStencilView,
8580 sizeof(pBackendDXContext->paDepthStencilView[0]), pDXContext->cot.cDSView, cValidEntries);
8581 AssertRCBreak(rc);
8582
8583 for (uint32_t i = 0; i < cValidEntries; ++i)
8584 {
8585 SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[i];
8586 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8587 continue; /* Skip uninitialized entry. */
8588
8589 /* Define views which were not defined yet in backend. */
8590 DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
8591 /** @todo Verify that the pEntry content still corresponds to the view. */
8592 if (pDXView->u.pView)
8593 dxViewAddToList(pThisCC, pDXView);
8594 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
8595 dxDefineDepthStencilView(pThisCC, pDXContext, i, pEntry);
8596 }
8597 break;
8598 case SVGA_COTABLE_SRVIEW:
8599 if (pBackendDXContext->paShaderResourceView)
8600 {
8601 for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
8602 {
8603 DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
8604 if (i < cValidEntries)
8605 dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8606 else
8607 dxViewDestroy(pDXView);
8608 }
8609 }
8610
8611 rc = dxCOTableRealloc((void **)&pBackendDXContext->paShaderResourceView, &pBackendDXContext->cShaderResourceView,
8612 sizeof(pBackendDXContext->paShaderResourceView[0]), pDXContext->cot.cSRView, cValidEntries);
8613 AssertRCBreak(rc);
8614
8615 for (uint32_t i = 0; i < cValidEntries; ++i)
8616 {
8617 SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[i];
8618 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8619 continue; /* Skip uninitialized entry. */
8620
8621 /* Define views which were not defined yet in backend. */
8622 DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
8623 /** @todo Verify that the pEntry content still corresponds to the view. */
8624 if (pDXView->u.pView)
8625 dxViewAddToList(pThisCC, pDXView);
8626 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
8627 dxDefineShaderResourceView(pThisCC, pDXContext, i, pEntry);
8628 }
8629 break;
8630 case SVGA_COTABLE_ELEMENTLAYOUT:
8631 if (pBackendDXContext->paElementLayout)
8632 {
8633 for (uint32_t i = cValidEntries; i < pBackendDXContext->cElementLayout; ++i)
8634 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
8635 }
8636
8637 rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
8638 sizeof(pBackendDXContext->paElementLayout[0]), pDXContext->cot.cElementLayout, cValidEntries);
8639 AssertRCBreak(rc);
8640
8641 for (uint32_t i = 0; i < cValidEntries; ++i)
8642 {
8643 SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[i];
8644 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8645 continue; /* Skip uninitialized entry. */
8646
8647 dxDefineElementLayout(pDXContext, i, pEntry);
8648 }
8649 break;
8650 case SVGA_COTABLE_BLENDSTATE:
8651 if (pBackendDXContext->papBlendState)
8652 {
8653 for (uint32_t i = cValidEntries; i < pBackendDXContext->cBlendState; ++i)
8654 D3D_RELEASE(pBackendDXContext->papBlendState[i]);
8655 }
8656
8657 rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
8658 sizeof(pBackendDXContext->papBlendState[0]), pDXContext->cot.cBlendState, cValidEntries);
8659 AssertRCBreak(rc);
8660
8661 for (uint32_t i = 0; i < cValidEntries; ++i)
8662 {
8663 SVGACOTableDXBlendStateEntry const *pEntry = &pDXContext->cot.paBlendState[i];
8664 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8665 continue; /* Skip uninitialized entry. */
8666
8667 dxDefineBlendState(pThisCC, pDXContext, i, pEntry);
8668 }
8669 break;
8670 case SVGA_COTABLE_DEPTHSTENCIL:
8671 if (pBackendDXContext->papDepthStencilState)
8672 {
8673 for (uint32_t i = cValidEntries; i < pBackendDXContext->cDepthStencilState; ++i)
8674 D3D_RELEASE(pBackendDXContext->papDepthStencilState[i]);
8675 }
8676
8677 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
8678 sizeof(pBackendDXContext->papDepthStencilState[0]), pDXContext->cot.cDepthStencil, cValidEntries);
8679 AssertRCBreak(rc);
8680
8681 for (uint32_t i = 0; i < cValidEntries; ++i)
8682 {
8683 SVGACOTableDXDepthStencilEntry const *pEntry = &pDXContext->cot.paDepthStencil[i];
8684 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8685 continue; /* Skip uninitialized entry. */
8686
8687 dxDefineDepthStencilState(pThisCC, pDXContext, i, pEntry);
8688 }
8689 break;
8690 case SVGA_COTABLE_RASTERIZERSTATE:
8691 if (pBackendDXContext->papRasterizerState)
8692 {
8693 for (uint32_t i = cValidEntries; i < pBackendDXContext->cRasterizerState; ++i)
8694 D3D_RELEASE(pBackendDXContext->papRasterizerState[i]);
8695 }
8696
8697 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
8698 sizeof(pBackendDXContext->papRasterizerState[0]), pDXContext->cot.cRasterizerState, cValidEntries);
8699 AssertRCBreak(rc);
8700
8701 for (uint32_t i = 0; i < cValidEntries; ++i)
8702 {
8703 SVGACOTableDXRasterizerStateEntry const *pEntry = &pDXContext->cot.paRasterizerState[i];
8704 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8705 continue; /* Skip uninitialized entry. */
8706
8707 dxDefineRasterizerState(pThisCC, pDXContext, i, pEntry);
8708 }
8709 break;
8710 case SVGA_COTABLE_SAMPLER:
8711 if (pBackendDXContext->papSamplerState)
8712 {
8713 for (uint32_t i = cValidEntries; i < pBackendDXContext->cSamplerState; ++i)
8714 D3D_RELEASE(pBackendDXContext->papSamplerState[i]);
8715 }
8716
8717 rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
8718 sizeof(pBackendDXContext->papSamplerState[0]), pDXContext->cot.cSampler, cValidEntries);
8719 AssertRCBreak(rc);
8720
8721 for (uint32_t i = 0; i < cValidEntries; ++i)
8722 {
8723 SVGACOTableDXSamplerEntry const *pEntry = &pDXContext->cot.paSampler[i];
8724 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8725 continue; /* Skip uninitialized entry. */
8726
8727 dxDefineSamplerState(pThisCC, pDXContext, i, pEntry);
8728 }
8729 break;
8730 case SVGA_COTABLE_STREAMOUTPUT:
8731 if (pBackendDXContext->paStreamOutput)
8732 {
8733 for (uint32_t i = cValidEntries; i < pBackendDXContext->cStreamOutput; ++i)
8734 dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
8735 }
8736
8737 rc = dxCOTableRealloc((void **)&pBackendDXContext->paStreamOutput, &pBackendDXContext->cStreamOutput,
8738 sizeof(pBackendDXContext->paStreamOutput[0]), pDXContext->cot.cStreamOutput, cValidEntries);
8739 AssertRCBreak(rc);
8740
8741 for (uint32_t i = 0; i < cValidEntries; ++i)
8742 {
8743 SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[i];
8744 /** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
8745 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8746 continue; /* Skip uninitialized entry. */
8747
8748 /* Reset the stream output backend data. It will be re-created when a GS shader with this streamoutput
8749 * will be set in setupPipeline.
8750 */
8751 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[i];
8752 dxDestroyStreamOutput(pDXStreamOutput);
8753 }
8754 break;
8755 case SVGA_COTABLE_DXQUERY:
8756 if (pBackendDXContext->paQuery)
8757 {
8758 /* Destroy the no longer used entries. */
8759 for (uint32_t i = cValidEntries; i < pBackendDXContext->cQuery; ++i)
8760 dxDestroyQuery(&pBackendDXContext->paQuery[i]);
8761 }
8762
8763 rc = dxCOTableRealloc((void **)&pBackendDXContext->paQuery, &pBackendDXContext->cQuery,
8764 sizeof(pBackendDXContext->paQuery[0]), pDXContext->cot.cQuery, cValidEntries);
8765 AssertRCBreak(rc);
8766
8767 for (uint32_t i = 0; i < cValidEntries; ++i)
8768 {
8769 SVGACOTableDXQueryEntry const *pEntry = &pDXContext->cot.paQuery[i];
8770 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8771 continue; /* Skip uninitialized entry. */
8772
8773 /* Define queries which were not defined yet in backend. */
8774 DXQUERY *pDXQuery = &pBackendDXContext->paQuery[i];
8775 if ( pEntry->type != SVGA3D_QUERYTYPE_INVALID
8776 && pDXQuery->pQuery == NULL)
8777 dxDefineQuery(pThisCC, pDXContext, i, pEntry);
8778 else
8779 Assert(pEntry->type == SVGA3D_QUERYTYPE_INVALID || pDXQuery->pQuery);
8780 }
8781 break;
8782 case SVGA_COTABLE_DXSHADER:
8783 if (pBackendDXContext->paShader)
8784 {
8785 /* Destroy the no longer used entries. */
8786 for (uint32_t i = cValidEntries; i < pBackendDXContext->cShader; ++i)
8787 dxDestroyShader(&pBackendDXContext->paShader[i]);
8788 }
8789
8790 rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
8791 sizeof(pBackendDXContext->paShader[0]), pDXContext->cot.cShader, cValidEntries);
8792 AssertRCBreak(rc);
8793
8794 for (uint32_t i = 0; i < cValidEntries; ++i)
8795 {
8796 SVGACOTableDXShaderEntry const *pEntry = &pDXContext->cot.paShader[i];
8797 /** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
8798 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8799 continue; /* Skip uninitialized entry. */
8800
8801 /* Define shaders which were not defined yet in backend. */
8802 DXSHADER *pDXShader = &pBackendDXContext->paShader[i];
8803 if ( pEntry->type != SVGA3D_SHADERTYPE_INVALID
8804 && pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
8805 dxDefineShader(pDXContext, i, pEntry);
8806 else
8807 Assert(pEntry->type == pDXShader->enmShaderType);
8808
8809 }
8810 break;
8811 case SVGA_COTABLE_UAVIEW:
8812 if (pBackendDXContext->paUnorderedAccessView)
8813 {
8814 for (uint32_t i = 0; i < pBackendDXContext->cUnorderedAccessView; ++i)
8815 {
8816 DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
8817 if (i < cValidEntries)
8818 dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8819 else
8820 dxViewDestroy(pDXView);
8821 }
8822 }
8823
8824 rc = dxCOTableRealloc((void **)&pBackendDXContext->paUnorderedAccessView, &pBackendDXContext->cUnorderedAccessView,
8825 sizeof(pBackendDXContext->paUnorderedAccessView[0]), pDXContext->cot.cUAView, cValidEntries);
8826 AssertRCBreak(rc);
8827
8828 for (uint32_t i = 0; i < cValidEntries; ++i)
8829 {
8830 SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[i];
8831 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8832 continue; /* Skip uninitialized entry. */
8833
8834 /* Define views which were not defined yet in backend. */
8835 DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
8836 /** @todo Verify that the pEntry content still corresponds to the view. */
8837 if (pDXView->u.pView)
8838 dxViewAddToList(pThisCC, pDXView);
8839 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
8840 dxDefineUnorderedAccessView(pThisCC, pDXContext, i, pEntry);
8841 }
8842 break;
8843 case SVGA_COTABLE_MAX: break; /* Compiler warning */
8844 }
8845 return rc;
8846}
8847
8848
8849static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8850{
8851 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8852
8853 RT_NOREF(pBackend, pDXContext);
8854 AssertFailed(); /** @todo Implement */
8855 return VERR_NOT_IMPLEMENTED;
8856}
8857
8858
8859static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8860{
8861 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8862
8863 RT_NOREF(pBackend, pDXContext);
8864 AssertFailed(); /** @todo Implement */
8865 return VERR_NOT_IMPLEMENTED;
8866}
8867
8868
8869static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8870{
8871 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8872
8873 RT_NOREF(pBackend, pDXContext);
8874 AssertFailed(); /** @todo Implement */
8875 return VERR_NOT_IMPLEMENTED;
8876}
8877
8878
8879static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8880{
8881 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8882
8883 RT_NOREF(pBackend, pDXContext);
8884 AssertFailed(); /** @todo Implement */
8885 return VERR_NOT_IMPLEMENTED;
8886}
8887
8888
8889static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8890{
8891 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8892
8893 RT_NOREF(pBackend, pDXContext);
8894 AssertFailed(); /** @todo Implement */
8895 return VERR_NOT_IMPLEMENTED;
8896}
8897
8898
8899static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8900{
8901 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8902
8903 RT_NOREF(pBackend, pDXContext);
8904 AssertFailed(); /** @todo Implement */
8905 return VERR_NOT_IMPLEMENTED;
8906}
8907
8908
8909static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8910{
8911 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8912
8913 RT_NOREF(pBackend, pDXContext);
8914 AssertFailed(); /** @todo Implement */
8915 return VERR_NOT_IMPLEMENTED;
8916}
8917
8918
8919static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8920{
8921 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8922
8923 RT_NOREF(pBackend, pDXContext);
8924 AssertFailed(); /** @todo Implement */
8925 return VERR_NOT_IMPLEMENTED;
8926}
8927
8928
8929static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8930{
8931 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8932
8933 RT_NOREF(pBackend, pDXContext);
8934 AssertFailed(); /** @todo Implement */
8935 return VERR_NOT_IMPLEMENTED;
8936}
8937
8938
8939static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8940{
8941 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8942
8943 RT_NOREF(pBackend, pDXContext);
8944 AssertFailed(); /** @todo Implement */
8945 return VERR_NOT_IMPLEMENTED;
8946}
8947
8948
8949static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8950{
8951 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8952
8953 RT_NOREF(pBackend, pDXContext);
8954 AssertFailed(); /** @todo Implement */
8955 return VERR_NOT_IMPLEMENTED;
8956}
8957
8958
8959static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8960{
8961 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8962
8963 RT_NOREF(pBackend, pDXContext);
8964 AssertFailed(); /** @todo Implement */
8965 return VERR_NOT_IMPLEMENTED;
8966}
8967
8968
8969static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8970{
8971 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8972
8973 RT_NOREF(pBackend, pDXContext);
8974 AssertFailed(); /** @todo Implement */
8975 return VERR_NOT_IMPLEMENTED;
8976}
8977
8978
8979static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8980{
8981 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8982
8983 RT_NOREF(pBackend, pDXContext);
8984 AssertFailed(); /** @todo Implement */
8985 return VERR_NOT_IMPLEMENTED;
8986}
8987
8988
8989static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8990{
8991 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8992
8993 RT_NOREF(pBackend, pDXContext);
8994 AssertFailed(); /** @todo Implement */
8995 return VERR_NOT_IMPLEMENTED;
8996}
8997
8998
8999static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9000{
9001 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9002
9003 RT_NOREF(pBackend, pDXContext);
9004 AssertFailed(); /** @todo Implement */
9005 return VERR_NOT_IMPLEMENTED;
9006}
9007
9008
9009static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9010{
9011 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9012
9013 RT_NOREF(pBackend, pDXContext);
9014 AssertFailed(); /** @todo Implement */
9015 return VERR_NOT_IMPLEMENTED;
9016}
9017
9018
9019static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9020{
9021 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9022
9023 RT_NOREF(pBackend, pDXContext);
9024 AssertFailed(); /** @todo Implement */
9025 return VERR_NOT_IMPLEMENTED;
9026}
9027
9028
9029static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9030{
9031 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9032
9033 RT_NOREF(pBackend, pDXContext);
9034 AssertFailed(); /** @todo Implement */
9035 return VERR_NOT_IMPLEMENTED;
9036}
9037
9038
9039static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9040{
9041 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9042
9043 RT_NOREF(pBackend, pDXContext);
9044 AssertFailed(); /** @todo Implement */
9045 return VERR_NOT_IMPLEMENTED;
9046}
9047
9048
9049static int dxDefineUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
9050{
9051 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
9052 PVMSVGA3DSURFACE pSurface;
9053 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
9054 AssertRCReturn(rc, rc);
9055
9056 ID3D11UnorderedAccessView *pUnorderedAccessView;
9057 DXVIEW *pView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9058 Assert(pView->u.pView == NULL);
9059
9060 if (pSurface->pBackendSurface == NULL)
9061 {
9062 /* Create the actual texture or buffer. */
9063 /** @todo One function to create all resources from surfaces. */
9064 if (pSurface->format != SVGA3D_BUFFER)
9065 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
9066 else
9067 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9068
9069 AssertRCReturn(rc, rc);
9070 }
9071
9072 HRESULT hr = dxUnorderedAccessViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pUnorderedAccessView);
9073 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
9074
9075 return dxViewInit(pView, pSurface, pDXContext, uaViewId, VMSVGA3D_VIEWTYPE_UNORDEREDACCESS, pUnorderedAccessView);
9076}
9077
9078
9079static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
9080{
9081 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9082 RT_NOREF(pBackend);
9083
9084 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9085 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9086
9087 /** @todo Probably not necessary because UAVs are defined in setupPipeline. */
9088 return dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pEntry);
9089}
9090
9091
9092static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId)
9093{
9094 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9095 RT_NOREF(pBackend);
9096
9097 return dxViewDestroy(&pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId]);
9098}
9099
9100
9101static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, uint32_t const aValues[4])
9102{
9103 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9104 RT_NOREF(pBackend);
9105
9106 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9107 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9108
9109 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9110 if (!pDXView->u.pUnorderedAccessView)
9111 {
9112 /* (Re-)create the view, because a creation of a view is deferred until a draw or a clear call. */
9113 SVGACOTableDXUAViewEntry const *pEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
9114 int rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pEntry);
9115 AssertRCReturn(rc, rc);
9116 }
9117 pDevice->pImmediateContext->ClearUnorderedAccessViewUint(pDXView->u.pUnorderedAccessView, aValues);
9118 return VINF_SUCCESS;
9119}
9120
9121
9122static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, float const aValues[4])
9123{
9124 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9125 RT_NOREF(pBackend);
9126
9127 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9128 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9129
9130 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9131 if (!pDXView->u.pUnorderedAccessView)
9132 {
9133 /* (Re-)create the view, because a creation of a view is deferred until a draw or a clear call. */
9134 SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[uaViewId];
9135 int rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pEntry);
9136 AssertRCReturn(rc, rc);
9137 }
9138 pDevice->pImmediateContext->ClearUnorderedAccessViewFloat(pDXView->u.pUnorderedAccessView, aValues);
9139 return VINF_SUCCESS;
9140}
9141
9142
9143static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId srcUAViewId, SVGA3dSurfaceId destSid, uint32_t destByteOffset)
9144{
9145 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9146 RT_NOREF(pBackend);
9147
9148 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9149 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9150
9151 /* Get corresponding resource. Create the buffer if does not yet exist. */
9152 ID3D11Buffer *pDstBuffer;
9153 if (destSid != SVGA3D_INVALID_ID)
9154 {
9155 PVMSVGA3DSURFACE pSurface;
9156 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, destSid, &pSurface);
9157 AssertRCReturn(rc, rc);
9158
9159 if (pSurface->pBackendSurface == NULL)
9160 {
9161 /* Create the resource and initialize it with the current surface data. */
9162 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9163 AssertRCReturn(rc, rc);
9164 }
9165
9166 pDstBuffer = pSurface->pBackendSurface->u.pBuffer;
9167 }
9168 else
9169 pDstBuffer = NULL;
9170
9171 ID3D11UnorderedAccessView *pSrcView;
9172 if (srcUAViewId != SVGA3D_INVALID_ID)
9173 {
9174 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[srcUAViewId];
9175 AssertReturn(pDXView->u.pUnorderedAccessView, VERR_INVALID_STATE);
9176 pSrcView = pDXView->u.pUnorderedAccessView;
9177 }
9178 else
9179 pSrcView = NULL;
9180
9181 pDevice->pImmediateContext->CopyStructureCount(pDstBuffer, destByteOffset, pSrcView);
9182
9183 return VINF_SUCCESS;
9184}
9185
9186
9187static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t uavSpliceIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9188{
9189 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9190 RT_NOREF(pBackend);
9191
9192 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9193 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9194
9195 RT_NOREF(uavSpliceIndex, cUAViewId, paUAViewId);
9196
9197 return VINF_SUCCESS;
9198}
9199
9200
9201static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9202{
9203 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9204 RT_NOREF(pBackend);
9205
9206 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9207 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9208
9209 /* Get corresponding resource. Create the buffer if does not yet exist. */
9210 ID3D11Buffer *pBufferForArgs;
9211 if (argsBufferSid != SVGA_ID_INVALID)
9212 {
9213 PVMSVGA3DSURFACE pSurface;
9214 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, argsBufferSid, &pSurface);
9215 AssertRCReturn(rc, rc);
9216
9217 if (pSurface->pBackendSurface == NULL)
9218 {
9219 /* Create the resource and initialize it with the current surface data. */
9220 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9221 AssertRCReturn(rc, rc);
9222 }
9223
9224 pBufferForArgs = pSurface->pBackendSurface->u.pBuffer;
9225 }
9226 else
9227 pBufferForArgs = NULL;
9228
9229 dxSetupPipeline(pThisCC, pDXContext);
9230
9231 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9232
9233 pDevice->pImmediateContext->DrawIndexedInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9234
9235 /* Note which surfaces are being drawn. */
9236 dxTrackRenderTargets(pThisCC, pDXContext);
9237
9238 return VINF_SUCCESS;
9239}
9240
9241
9242static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9243{
9244 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9245 RT_NOREF(pBackend);
9246
9247 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9248 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9249
9250 /* Get corresponding resource. Create the buffer if does not yet exist. */
9251 ID3D11Buffer *pBufferForArgs;
9252 if (argsBufferSid != SVGA_ID_INVALID)
9253 {
9254 PVMSVGA3DSURFACE pSurface;
9255 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, argsBufferSid, &pSurface);
9256 AssertRCReturn(rc, rc);
9257
9258 if (pSurface->pBackendSurface == NULL)
9259 {
9260 /* Create the resource and initialize it with the current surface data. */
9261 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9262 AssertRCReturn(rc, rc);
9263 }
9264
9265 pBufferForArgs = pSurface->pBackendSurface->u.pBuffer;
9266 }
9267 else
9268 pBufferForArgs = NULL;
9269
9270 dxSetupPipeline(pThisCC, pDXContext);
9271
9272 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9273
9274 pDevice->pImmediateContext->DrawInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9275
9276 /* Note which surfaces are being drawn. */
9277 dxTrackRenderTargets(pThisCC, pDXContext);
9278
9279 return VINF_SUCCESS;
9280}
9281
9282
9283static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t threadGroupCountX, uint32_t threadGroupCountY, uint32_t threadGroupCountZ)
9284{
9285 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9286 RT_NOREF(pBackend);
9287
9288 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9289 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9290
9291 dxSetupPipeline(pThisCC, pDXContext);
9292
9293 pDevice->pImmediateContext->Dispatch(threadGroupCountX, threadGroupCountY, threadGroupCountZ);
9294
9295 return VINF_SUCCESS;
9296}
9297
9298
9299static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9300{
9301 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9302
9303 RT_NOREF(pBackend, pDXContext);
9304 AssertFailed(); /** @todo Implement */
9305 return VERR_NOT_IMPLEMENTED;
9306}
9307
9308
9309static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9310{
9311 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9312
9313 RT_NOREF(pBackend, pDXContext);
9314 AssertFailed(); /** @todo Implement */
9315 return VERR_NOT_IMPLEMENTED;
9316}
9317
9318
9319static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9320{
9321 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9322
9323 RT_NOREF(pBackend, pDXContext);
9324 AssertFailed(); /** @todo Implement */
9325 return VERR_NOT_IMPLEMENTED;
9326}
9327
9328
9329static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9330{
9331 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9332
9333 RT_NOREF(pBackend, pDXContext);
9334 AssertFailed(); /** @todo Implement */
9335 return VERR_NOT_IMPLEMENTED;
9336}
9337
9338
9339static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9340{
9341 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9342
9343 RT_NOREF(pBackend, pDXContext);
9344 AssertFailed(); /** @todo Implement */
9345 return VERR_NOT_IMPLEMENTED;
9346}
9347
9348
9349static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9350{
9351 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9352
9353 RT_NOREF(pBackend, pDXContext);
9354 AssertFailed(); /** @todo Implement */
9355 return VERR_NOT_IMPLEMENTED;
9356}
9357
9358
9359static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9360{
9361 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9362
9363 RT_NOREF(pBackend, pDXContext);
9364 AssertFailed(); /** @todo Implement */
9365 return VERR_NOT_IMPLEMENTED;
9366}
9367
9368
9369static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9370{
9371 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9372
9373 RT_NOREF(pBackend, pDXContext);
9374 AssertFailed(); /** @todo Implement */
9375 return VERR_NOT_IMPLEMENTED;
9376}
9377
9378
9379static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9380{
9381 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9382
9383 RT_NOREF(pBackend, pDXContext);
9384 AssertFailed(); /** @todo Implement */
9385 return VERR_NOT_IMPLEMENTED;
9386}
9387
9388
9389static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9390{
9391 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9392
9393 RT_NOREF(pBackend, pDXContext);
9394 AssertFailed(); /** @todo Implement */
9395 return VERR_NOT_IMPLEMENTED;
9396}
9397
9398
9399static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9400{
9401 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9402 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9403
9404//DEBUG_BREAKPOINT_TEST();
9405 uint32_t const *pUAIds = &pDXContext->svgaDXContext.csuaViewIds[0];
9406 ID3D11UnorderedAccessView *papUnorderedAccessView[SVGA3D_DX11_1_MAX_UAVIEWS];
9407 UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
9408 for (uint32_t i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
9409 {
9410 SVGA3dUAViewId const uaViewId = pUAIds[i];
9411 if (uaViewId != SVGA3D_INVALID_ID)
9412 {
9413 ASSERT_GUEST_RETURN(uaViewId < pDXContext->pBackendDXContext->cUnorderedAccessView, VERR_INVALID_PARAMETER);
9414
9415 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9416 Assert(pDXView->u.pUnorderedAccessView);
9417 papUnorderedAccessView[i] = pDXView->u.pUnorderedAccessView;
9418
9419 SVGACOTableDXUAViewEntry const *pEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
9420 aUAVInitialCounts[i] = pEntry->structureCount;
9421 }
9422 else
9423 {
9424 papUnorderedAccessView[i] = NULL;
9425 aUAVInitialCounts[i] = (UINT)-1;
9426 }
9427 }
9428
9429 dxCSUnorderedAccessViewSet(pDevice, 0, SVGA3D_DX11_1_MAX_UAVIEWS, papUnorderedAccessView, aUAVInitialCounts);
9430 return VINF_SUCCESS;
9431}
9432
9433
9434static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9435{
9436 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9437 RT_NOREF(pBackend);
9438
9439 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9440 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9441
9442 RT_NOREF(startIndex, cUAViewId, paUAViewId);
9443
9444 return VINF_SUCCESS;
9445}
9446
9447
9448static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9449{
9450 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9451
9452 RT_NOREF(pBackend, pDXContext);
9453 AssertFailed(); /** @todo Implement */
9454 return VERR_NOT_IMPLEMENTED;
9455}
9456
9457
9458static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9459{
9460 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9461
9462 RT_NOREF(pBackend, pDXContext);
9463 AssertFailed(); /** @todo Implement */
9464 return VERR_NOT_IMPLEMENTED;
9465}
9466
9467
9468static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9469{
9470 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9471
9472 RT_NOREF(pBackend, pDXContext);
9473 AssertFailed(); /** @todo Implement */
9474 return VERR_NOT_IMPLEMENTED;
9475}
9476
9477
9478static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9479{
9480 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9481
9482 RT_NOREF(pBackend, pDXContext);
9483 AssertFailed(); /** @todo Implement */
9484 return VERR_NOT_IMPLEMENTED;
9485}
9486
9487
9488static DECLCALLBACK(int) vmsvga3dBackDXLoadState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
9489{
9490 RT_NOREF(pThisCC);
9491 uint32_t u32;
9492 int rc;
9493
9494 rc = pHlp->pfnSSMGetU32(pSSM, &u32);
9495 AssertLogRelRCReturn(rc, rc);
9496 AssertLogRelRCReturn(u32 == pDXContext->pBackendDXContext->cShader, VERR_INVALID_STATE);
9497
9498 for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
9499 {
9500 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
9501
9502 rc = pHlp->pfnSSMGetU32(pSSM, &u32);
9503 AssertLogRelRCReturn(rc, rc);
9504 AssertLogRelReturn((SVGA3dShaderType)u32 == pDXShader->enmShaderType, VERR_INVALID_STATE);
9505
9506 if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
9507 continue;
9508
9509 pHlp->pfnSSMGetU32(pSSM, &pDXShader->soid);
9510
9511 pHlp->pfnSSMGetU32(pSSM, &u32);
9512 pDXShader->shaderInfo.enmProgramType = (VGPU10_PROGRAM_TYPE)u32;
9513
9514 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cbBytecode);
9515 AssertLogRelRCReturn(rc, rc);
9516 AssertLogRelReturn(pDXShader->shaderInfo.cbBytecode <= 2 * SVGA3D_MAX_SHADER_MEMORY_BYTES, VERR_INVALID_STATE);
9517
9518 if (pDXShader->shaderInfo.cbBytecode)
9519 {
9520 pDXShader->shaderInfo.pvBytecode = RTMemAlloc(pDXShader->shaderInfo.cbBytecode);
9521 AssertPtrReturn(pDXShader->shaderInfo.pvBytecode, VERR_NO_MEMORY);
9522 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
9523 }
9524
9525 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cInputSignature);
9526 AssertLogRelRCReturn(rc, rc);
9527 AssertLogRelReturn(pDXShader->shaderInfo.cInputSignature <= 32, VERR_INVALID_STATE);
9528 if (pDXShader->shaderInfo.cInputSignature)
9529 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
9530
9531 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cOutputSignature);
9532 AssertLogRelRCReturn(rc, rc);
9533 AssertLogRelReturn(pDXShader->shaderInfo.cOutputSignature <= 32, VERR_INVALID_STATE);
9534 if (pDXShader->shaderInfo.cOutputSignature)
9535 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
9536
9537 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cPatchConstantSignature);
9538 AssertLogRelRCReturn(rc, rc);
9539 AssertLogRelReturn(pDXShader->shaderInfo.cPatchConstantSignature <= 32, VERR_INVALID_STATE);
9540 if (pDXShader->shaderInfo.cPatchConstantSignature)
9541 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
9542
9543 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cDclResource);
9544 AssertLogRelRCReturn(rc, rc);
9545 AssertLogRelReturn(pDXShader->shaderInfo.cDclResource <= SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_STATE);
9546 if (pDXShader->shaderInfo.cDclResource)
9547 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
9548
9549 DXShaderGenerateSemantics(&pDXShader->shaderInfo);
9550 }
9551
9552 rc = pHlp->pfnSSMGetU32(pSSM, &pDXContext->pBackendDXContext->cSOTarget);
9553 AssertLogRelRCReturn(rc, rc);
9554
9555 return VINF_SUCCESS;
9556}
9557
9558
9559static DECLCALLBACK(int) vmsvga3dBackDXSaveState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
9560{
9561 RT_NOREF(pThisCC);
9562 int rc;
9563
9564 pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cShader);
9565 for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
9566 {
9567 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
9568
9569 pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->enmShaderType);
9570 if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
9571 continue;
9572
9573 pHlp->pfnSSMPutU32(pSSM, pDXShader->soid);
9574
9575 pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->shaderInfo.enmProgramType);
9576
9577 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cbBytecode);
9578 if (pDXShader->shaderInfo.cbBytecode)
9579 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
9580
9581 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cInputSignature);
9582 if (pDXShader->shaderInfo.cInputSignature)
9583 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
9584
9585 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cOutputSignature);
9586 if (pDXShader->shaderInfo.cOutputSignature)
9587 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
9588
9589 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cPatchConstantSignature);
9590 if (pDXShader->shaderInfo.cPatchConstantSignature)
9591 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
9592
9593 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cDclResource);
9594 if (pDXShader->shaderInfo.cDclResource)
9595 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
9596 }
9597 rc = pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cSOTarget);
9598 AssertLogRelRCReturn(rc, rc);
9599
9600 return VINF_SUCCESS;
9601}
9602
9603
9604static DECLCALLBACK(int) vmsvga3dBackQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
9605{
9606 RT_NOREF(pThisCC);
9607
9608 int rc = VINF_SUCCESS;
9609 if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
9610 {
9611 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
9612 {
9613 if (pvInterfaceFuncs)
9614 {
9615 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs;
9616 p->pfnDXSaveState = vmsvga3dBackDXSaveState;
9617 p->pfnDXLoadState = vmsvga3dBackDXLoadState;
9618 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
9619 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
9620 p->pfnDXBindContext = vmsvga3dBackDXBindContext;
9621 p->pfnDXSwitchContext = vmsvga3dBackDXSwitchContext;
9622 p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
9623 p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
9624 p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
9625 p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
9626 p->pfnDXSetShader = vmsvga3dBackDXSetShader;
9627 p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
9628 p->pfnDXDraw = vmsvga3dBackDXDraw;
9629 p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
9630 p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
9631 p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
9632 p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
9633 p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
9634 p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
9635 p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
9636 p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
9637 p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
9638 p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
9639 p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
9640 p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
9641 p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
9642 p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
9643 p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
9644 p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
9645 p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
9646 p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
9647 p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
9648 p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
9649 p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
9650 p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
9651 p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
9652 p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
9653 p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
9654 p->pfnDXGenMips = vmsvga3dBackDXGenMips;
9655 p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
9656 p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
9657 p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
9658 p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
9659 p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
9660 p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
9661 p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
9662 p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
9663 p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
9664 p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
9665 p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
9666 p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
9667 p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
9668 p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
9669 p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
9670 p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
9671 p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
9672 p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
9673 p->pfnDXBindShader = vmsvga3dBackDXBindShader;
9674 p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
9675 p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
9676 p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
9677 p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
9678 p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
9679 p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
9680 p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
9681 p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
9682 p->pfnDXHint = vmsvga3dBackDXHint;
9683 p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
9684 p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
9685 p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
9686 p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
9687 p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
9688 p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
9689 p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
9690 p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
9691 p->pfnScreenCopy = vmsvga3dBackScreenCopy;
9692 p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
9693 p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
9694 p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
9695 p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
9696 p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
9697 p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
9698 p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
9699 p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
9700 p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
9701 p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
9702 p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
9703 p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
9704 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
9705 p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
9706 p->pfnDXDispatch = vmsvga3dBackDXDispatch;
9707 p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
9708 p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
9709 p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
9710 p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
9711 p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
9712 p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
9713 p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
9714 p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
9715 p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
9716 p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
9717 p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
9718 p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
9719 p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
9720 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
9721 p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
9722 p->pfnVBDXClearRenderTargetViewRegion = vmsvga3dBackVBDXClearRenderTargetViewRegion;
9723 }
9724 }
9725 else
9726 {
9727 AssertFailed();
9728 rc = VERR_INVALID_PARAMETER;
9729 }
9730 }
9731 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
9732 {
9733 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
9734 {
9735 if (pvInterfaceFuncs)
9736 {
9737 VMSVGA3DBACKENDFUNCSMAP *p = (VMSVGA3DBACKENDFUNCSMAP *)pvInterfaceFuncs;
9738 p->pfnSurfaceMap = vmsvga3dBackSurfaceMap;
9739 p->pfnSurfaceUnmap = vmsvga3dBackSurfaceUnmap;
9740 }
9741 }
9742 else
9743 {
9744 AssertFailed();
9745 rc = VERR_INVALID_PARAMETER;
9746 }
9747 }
9748 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
9749 {
9750 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
9751 {
9752 if (pvInterfaceFuncs)
9753 {
9754 VMSVGA3DBACKENDFUNCSGBO *p = (VMSVGA3DBACKENDFUNCSGBO *)pvInterfaceFuncs;
9755 p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
9756 p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
9757 }
9758 }
9759 else
9760 {
9761 AssertFailed();
9762 rc = VERR_INVALID_PARAMETER;
9763 }
9764 }
9765 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_3D) == 0)
9766 {
9767 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCS3D))
9768 {
9769 if (pvInterfaceFuncs)
9770 {
9771 VMSVGA3DBACKENDFUNCS3D *p = (VMSVGA3DBACKENDFUNCS3D *)pvInterfaceFuncs;
9772 p->pfnInit = vmsvga3dBackInit;
9773 p->pfnPowerOn = vmsvga3dBackPowerOn;
9774 p->pfnTerminate = vmsvga3dBackTerminate;
9775 p->pfnReset = vmsvga3dBackReset;
9776 p->pfnQueryCaps = vmsvga3dBackQueryCaps;
9777 p->pfnChangeMode = vmsvga3dBackChangeMode;
9778 p->pfnCreateTexture = vmsvga3dBackCreateTexture;
9779 p->pfnSurfaceDestroy = vmsvga3dBackSurfaceDestroy;
9780 p->pfnSurfaceInvalidateImage = vmsvga3dBackSurfaceInvalidateImage;
9781 p->pfnSurfaceCopy = vmsvga3dBackSurfaceCopy;
9782 p->pfnSurfaceDMACopyBox = vmsvga3dBackSurfaceDMACopyBox;
9783 p->pfnSurfaceStretchBlt = vmsvga3dBackSurfaceStretchBlt;
9784 p->pfnUpdateHostScreenViewport = vmsvga3dBackUpdateHostScreenViewport;
9785 p->pfnDefineScreen = vmsvga3dBackDefineScreen;
9786 p->pfnDestroyScreen = vmsvga3dBackDestroyScreen;
9787 p->pfnSurfaceBlitToScreen = vmsvga3dBackSurfaceBlitToScreen;
9788 p->pfnSurfaceUpdateHeapBuffers = vmsvga3dBackSurfaceUpdateHeapBuffers;
9789 }
9790 }
9791 else
9792 {
9793 AssertFailed();
9794 rc = VERR_INVALID_PARAMETER;
9795 }
9796 }
9797 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_VGPU9) == 0)
9798 {
9799 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSVGPU9))
9800 {
9801 if (pvInterfaceFuncs)
9802 {
9803 VMSVGA3DBACKENDFUNCSVGPU9 *p = (VMSVGA3DBACKENDFUNCSVGPU9 *)pvInterfaceFuncs;
9804 p->pfnContextDefine = vmsvga3dBackContextDefine;
9805 p->pfnContextDestroy = vmsvga3dBackContextDestroy;
9806 p->pfnSetTransform = vmsvga3dBackSetTransform;
9807 p->pfnSetZRange = vmsvga3dBackSetZRange;
9808 p->pfnSetRenderState = vmsvga3dBackSetRenderState;
9809 p->pfnSetRenderTarget = vmsvga3dBackSetRenderTarget;
9810 p->pfnSetTextureState = vmsvga3dBackSetTextureState;
9811 p->pfnSetMaterial = vmsvga3dBackSetMaterial;
9812 p->pfnSetLightData = vmsvga3dBackSetLightData;
9813 p->pfnSetLightEnabled = vmsvga3dBackSetLightEnabled;
9814 p->pfnSetViewPort = vmsvga3dBackSetViewPort;
9815 p->pfnSetClipPlane = vmsvga3dBackSetClipPlane;
9816 p->pfnCommandClear = vmsvga3dBackCommandClear;
9817 p->pfnDrawPrimitives = vmsvga3dBackDrawPrimitives;
9818 p->pfnSetScissorRect = vmsvga3dBackSetScissorRect;
9819 p->pfnGenerateMipmaps = vmsvga3dBackGenerateMipmaps;
9820 p->pfnShaderDefine = vmsvga3dBackShaderDefine;
9821 p->pfnShaderDestroy = vmsvga3dBackShaderDestroy;
9822 p->pfnShaderSet = vmsvga3dBackShaderSet;
9823 p->pfnShaderSetConst = vmsvga3dBackShaderSetConst;
9824 p->pfnOcclusionQueryCreate = vmsvga3dBackOcclusionQueryCreate;
9825 p->pfnOcclusionQueryDelete = vmsvga3dBackOcclusionQueryDelete;
9826 p->pfnOcclusionQueryBegin = vmsvga3dBackOcclusionQueryBegin;
9827 p->pfnOcclusionQueryEnd = vmsvga3dBackOcclusionQueryEnd;
9828 p->pfnOcclusionQueryGetData = vmsvga3dBackOcclusionQueryGetData;
9829 }
9830 }
9831 else
9832 {
9833 AssertFailed();
9834 rc = VERR_INVALID_PARAMETER;
9835 }
9836 }
9837 else
9838 rc = VERR_NOT_IMPLEMENTED;
9839 return rc;
9840}
9841
9842
9843extern VMSVGA3DBACKENDDESC const g_BackendDX =
9844{
9845 "DX",
9846 vmsvga3dBackQueryInterface
9847};
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