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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 88787

Last change on this file since 88787 was 88787, checked in by vboxsync, 4 years ago

Devices/Graphics: a few DX commands. bugref:9830
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1/* $Id: DevVGA-SVGA3d-win-dx.cpp 88787 2021-04-29 15:51:13Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/log.h>
25#include <VBox/vmm/pdmdev.h>
26#include <VBox/vmm/pgm.h>
27
28#include <iprt/assert.h>
29#include <iprt/errcore.h>
30#include <iprt/mem.h>
31
32#include <VBoxVideo.h> /* required by DevVGA.h */
33#include <VBoxVideo3D.h>
34
35/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
36#include "DevVGA.h"
37
38#include "DevVGA-SVGA.h"
39#include "DevVGA-SVGA3d.h"
40#include "DevVGA-SVGA3d-internal.h"
41#include "DevVGA-SVGA3d-dx-shader.h"
42
43#include <d3d11.h>
44
45#define DX_RELEASE_ARRAY(a_Count, a_papArray) do { \
46 for (uint32_t i = 0; i < (a_Count); ++i) \
47 D3D_RELEASE((a_papArray)[i]); \
48} while (0)
49
50typedef struct DXDEVICE
51{
52 ID3D11Device *pDevice; /* Device. */
53 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */
54 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
55 D3D_FEATURE_LEVEL FeatureLevel;
56} DXDEVICE;
57
58/* What kind of resource has been created for the VMSVGA3D surface. */
59typedef enum VMSVGA3DBACKRESTYPE
60{
61 VMSVGA3D_RESTYPE_NONE = 0,
62 VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
63 VMSVGA3D_RESTYPE_SURFACE = 2,
64 VMSVGA3D_RESTYPE_TEXTURE = 3,
65 VMSVGA3D_RESTYPE_CUBE_TEXTURE = 4,
66 VMSVGA3D_RESTYPE_VOLUME_TEXTURE = 5,
67 VMSVGA3D_RESTYPE_BUFFER = 6,
68} VMSVGA3DBACKRESTYPE;
69
70typedef struct VMSVGA3DBACKENDSURFACE
71{
72 VMSVGA3DBACKRESTYPE enmResType;
73 DXGI_FORMAT enmDxgiFormat;
74 union
75 {
76 struct
77 {
78 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
79 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */
80 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */
81 } ScreenTarget;
82 struct
83 {
84 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
85 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */
86 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */
87 } Texture;
88 struct
89 {
90 ID3D11Buffer *pBuffer;
91 } Buffer;
92 } u;
93} VMSVGA3DBACKENDSURFACE;
94
95typedef struct VMSVGAHWSCREEN
96{
97 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
98 IDXGIResource *pDxgiResource; /* Interface of the texture. */
99 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
100 HANDLE SharedHandle; /* The shared handle of this structure. */
101 uint32_t sidScreenTarget; /* The source surface for this screen. */
102} VMSVGAHWSCREEN;
103
104
105typedef struct DXELEMENTLAYOUT
106{
107 ID3D11InputLayout *pElementLayout;
108 uint32_t cElementDesc;
109 D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
110} DXELEMENTLAYOUT;
111
112typedef struct DXSHADER
113{
114 SVGA3dShaderType enmShaderType;
115 union
116 {
117 ID3D11DeviceChild *pShader; /* All. */
118 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */
119 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */
120 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */
121 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */
122 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */
123 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */
124 };
125 void *pvDXBC;
126 uint32_t cbDXBC;
127} DXSHADER;
128
129typedef struct VMSVGA3DBACKENDDXCONTEXT
130{
131 DXDEVICE device; /* Device for the this context operation. */
132
133 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
134 uint32_t cBlendState; /* Number of entries in the papBlendState array. */
135 uint32_t cDepthStencilState; /* papDepthStencilState */
136 uint32_t cSamplerState; /* papSamplerState */
137 uint32_t cRasterizerState; /* papRasterizerState */
138 uint32_t cElementLayout; /* papElementLayout */
139 uint32_t cRenderTargetView; /* papRenderTargetView */
140 uint32_t cDepthStencilView; /* papDepthStencilView */
141 uint32_t cShaderResourceView; /* papShaderResourceView */
142 uint32_t cQuery; /* papQuery */
143 uint32_t cShader; /* papShader */
144 ID3D11BlendState **papBlendState;
145 ID3D11DepthStencilState **papDepthStencilState;
146 ID3D11SamplerState **papSamplerState;
147 ID3D11RasterizerState **papRasterizerState;
148 DXELEMENTLAYOUT *paElementLayout;
149 ID3D11RenderTargetView **papRenderTargetView;
150 ID3D11DepthStencilView **papDepthStencilView;
151 ID3D11ShaderResourceView **papShaderResourceView;
152 ID3D11Query **papQuery;
153 DXSHADER *paShader;
154} VMSVGA3DBACKENDDXCONTEXT;
155
156typedef struct VMSVGA3DBACKEND
157{
158 RTLDRMOD hD3D11;
159 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
160
161 ID3D11Device *pDevice; /* Device for the VMSVGA3D context independent operation. */
162 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */
163 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
164 D3D_FEATURE_LEVEL FeatureLevel;
165} VMSVGA3DBACKEND;
166
167
168static DXGI_FORMAT vmsvgaDXScreenTargetFormat2Dxgi(SVGA3dSurfaceFormat format)
169{
170 switch (format)
171 {
172 /** @todo More formats. */
173 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
174 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
175 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
176 default:
177 AssertFailed();
178 break;
179 }
180 return DXGI_FORMAT_UNKNOWN;
181}
182
183
184static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
185{
186 /* Ensure that correct headers are used.
187 * SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
188 */
189 AssertCompile(SVGA3D_AYUV == 152);
190
191#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
192 /** @todo More formats. */
193 switch (format)
194 {
195 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
196 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
197 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
198 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
199 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
200 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
201 case SVGA3D_Z_D32: break;
202 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
203 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
204 case SVGA3D_Z_D15S1: break;
205 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
206 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
207 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
208 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
209 case SVGA3D_DXT1: return DXGI_FORMAT_;
210 case SVGA3D_DXT2: return DXGI_FORMAT_;
211 case SVGA3D_DXT3: return DXGI_FORMAT_;
212 case SVGA3D_DXT4: return DXGI_FORMAT_;
213 case SVGA3D_DXT5: return DXGI_FORMAT_;
214 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
215 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
216 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
217 case SVGA3D_FORMAT_DEAD1: break;
218 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
219 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
220 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
221 case SVGA3D_V8U8: return DXGI_FORMAT_;
222 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
223 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
224 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
225 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
226 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
227 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
228 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
229 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
230 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
231 case SVGA3D_BUFFER: return DXGI_FORMAT_;
232 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
233 case SVGA3D_V16U16: return DXGI_FORMAT_;
234 case SVGA3D_G16R16: return DXGI_FORMAT_;
235 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
236 case SVGA3D_UYVY: return DXGI_FORMAT_;
237 case SVGA3D_YUY2: return DXGI_FORMAT_;
238 case SVGA3D_NV12: return DXGI_FORMAT_;
239 case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
240 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
241 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
242 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
243 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
244 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
245 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
246 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
247 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
248 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
249 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
250 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
251 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
252 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
253 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
254 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
255 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
256 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
257 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
258 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
259 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
260 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
261 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
262 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
263 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
264 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
265 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
266 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
267 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
268 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
269 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
270 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
271 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
272 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
273 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
274 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
275 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
276 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
277 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
278 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
279 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
280 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
281 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
282 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
283 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
284 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
285 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
286 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
287 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
288 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
289 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
290 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
291 case SVGA3D_P8: break;
292 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
293 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
294 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
295 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
296 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
297 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
298 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
299 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
300 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
301 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
302 case SVGA3D_ATI1: break;
303 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
304 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
305 case SVGA3D_ATI2: break;
306 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
307 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
308 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
309 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
310 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
311 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
312 case SVGA3D_Z_DF16: break;
313 case SVGA3D_Z_DF24: break;
314 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
315 case SVGA3D_YV12: break;
316 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
317 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
318 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
319 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
320 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
321 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
322 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
323 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
324 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
325 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
326 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
327 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
328 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
329 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
330 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
331 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
332 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
333 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
334 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
335 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
336 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
337 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
338 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
339
340 case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
341 case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_;
342 case SVGA3D_BC6H_UF16: return DXGI_FORMAT_;
343 case SVGA3D_BC6H_SF16: return DXGI_FORMAT_;
344 case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_;
345 case SVGA3D_BC7_UNORM: return DXGI_FORMAT_;
346 case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_;
347 case SVGA3D_AYUV: return DXGI_FORMAT_;
348
349 case SVGA3D_FORMAT_INVALID:
350 case SVGA3D_FORMAT_MAX: break;
351 }
352 // AssertFailed();
353 return DXGI_FORMAT_UNKNOWN;
354#undef DXGI_FORMAT_
355}
356
357
358static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
359{
360 switch (enmDevCap)
361 {
362 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
363 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
364 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
365 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
366 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
367 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
368 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
369 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
370 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
371 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
372 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
373 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
374 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
375 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
376 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
377 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
378 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
379 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
380 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
381 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
382 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
383 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
384 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
385 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
386 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
387 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
388 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
389 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
390 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
391 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
392 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
393 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
394 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
395 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
396 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
397 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
398 case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
399 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
400 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
401 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
402 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
403 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
404 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
405 default:
406 AssertFailed();
407 break;
408 }
409 return SVGA3D_FORMAT_INVALID;
410}
411
412
413static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
414{
415 switch (enmDevCap)
416 {
417 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
418 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
419 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
420 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
421 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
422 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
423 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
424 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
425 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
426 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
427 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
428 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
429 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
430 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
431 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
432 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
433 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
434 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
435 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
436 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
437 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
438 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
439 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
440 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
441 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
442 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
443 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
444 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
445 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
446 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
447 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
448 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
449 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
450 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
451 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
452 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
453 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
454 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
455 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
456 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
457 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
458 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
459 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
460 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
461 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
462 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
463 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
464 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
465 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
466 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
467 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
468 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
469 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
470 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
471 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
472 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
473 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
474 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
475 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
476 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
477 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
478 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
479 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
480 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
481 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
482 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
483 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
484 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
485 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
486 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
487 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
488 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
489 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
490 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
491 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
492 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
493 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
494 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
495 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
496 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
497 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
498 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
499 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
500 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
501 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
502 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
503 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
504 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
505 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
506 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
507 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
508 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
509 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
510 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
511 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
512 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
513 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
514 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
515 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
516 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
517 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
518 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
519 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
520 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
521 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
522 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
523 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
524 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
525 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
526 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
527 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
528 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
529 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
530 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
531 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
532 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
533 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
534 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
535 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
536 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
537 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
538 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
539 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
540 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
541 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
542 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
543 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
544 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
545 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
546 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
547 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
548 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
549 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
550 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
551 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
552 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
553 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
554 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
555 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
556 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
557 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
558 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
559 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
560 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
561 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
562 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
563 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
564 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
565 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
566 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
567 default:
568 AssertFailed();
569 break;
570 }
571 return SVGA3D_FORMAT_INVALID;
572}
573
574
575static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
576{
577 int rc = VINF_SUCCESS;
578
579 *pu32DevCap = 0;
580
581 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
582 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
583 {
584 RT_NOREF(pState);
585 /** @todo Implement */
586 }
587 else
588 rc = VERR_NOT_SUPPORTED;
589 return rc;
590}
591
592static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
593{
594 int rc = VINF_SUCCESS;
595
596 *pu32DevCap = 0;
597
598 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
599 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
600 {
601 ID3D11Device *pDevice = pState->pBackend->pDevice;
602 UINT FormatSupport = 0;
603 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
604 if (SUCCEEDED(hr))
605 {
606 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
607
608 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
609 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
610
611 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
612 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
613
614 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
615 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
616
617 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
618 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
619
620 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
621 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
622
623 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
624 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
625
626 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
627 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
628
629 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
630 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
631
632 UINT NumQualityLevels;
633 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
634 if (SUCCEEDED(hr) && NumQualityLevels != 0)
635 *pu32DevCap |= SVGA3D_DXFMT_MULTISAMPLE;
636 }
637 else
638 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
639 }
640 else
641 rc = VERR_NOT_SUPPORTED;
642 return rc;
643}
644
645
646static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
647{
648 int rc = VINF_SUCCESS;
649
650 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
651 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
652 {
653 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
654 D3D_FEATURE_LEVEL_11_0
655 };
656 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
657#ifdef DEBUG
658 Flags |= D3D11_CREATE_DEVICE_DEBUG;
659#endif
660
661 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
662 D3D_DRIVER_TYPE_HARDWARE,
663 NULL,
664 Flags,
665 s_aFeatureLevels,
666 RT_ELEMENTS(s_aFeatureLevels),
667 D3D11_SDK_VERSION,
668 &pDevice->pDevice,
669 &pDevice->FeatureLevel,
670 &pDevice->pImmediateContext);
671 if (SUCCEEDED(hr))
672 {
673 LogRel(("VMSVGA: Feature level %#x\n", pDevice->FeatureLevel));
674
675 IDXGIDevice *pDxgiDevice = 0;
676 hr = pBackend->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
677 if (SUCCEEDED(hr))
678 {
679 IDXGIAdapter *pDxgiAdapter = 0;
680 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
681 if (SUCCEEDED(hr))
682 {
683 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDevice->pDxgiFactory);
684 D3D_RELEASE(pDxgiAdapter);
685 }
686
687 D3D_RELEASE(pDxgiDevice);
688 }
689 }
690
691 if (FAILED(hr))
692 rc = VERR_NOT_SUPPORTED;
693
694 return rc;
695}
696
697
698static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
699{
700 RT_NOREF(pBackend);
701 D3D_RELEASE(pDevice->pDevice);
702 D3D_RELEASE(pDevice->pImmediateContext);
703 D3D_RELEASE(pDevice->pDxgiFactory);
704 RT_ZERO(*pDevice);
705}
706
707
708/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
709static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState **pp)
710{
711 D3D11_BLEND_DESC BlendDesc;
712 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
713 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
714 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
715 {
716 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
717 BlendDesc.RenderTarget[i].SrcBlend = (D3D11_BLEND)pEntry->perRT[i].srcBlend;
718 BlendDesc.RenderTarget[i].DestBlend = (D3D11_BLEND)pEntry->perRT[i].destBlend;
719 BlendDesc.RenderTarget[i].BlendOp = (D3D11_BLEND_OP)pEntry->perRT[i].blendOp;
720 BlendDesc.RenderTarget[i].SrcBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].srcBlendAlpha;
721 BlendDesc.RenderTarget[i].DestBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].destBlendAlpha;
722 BlendDesc.RenderTarget[i].BlendOpAlpha = (D3D11_BLEND_OP)pEntry->perRT[i].blendOpAlpha;
723 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
724 /** @todo logicOpEnable and logicOp */
725 }
726
727 HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
728 Assert(SUCCEEDED(hr));
729 return hr;
730}
731
732
733static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp)
734{
735 D3D11_DEPTH_STENCIL_DESC desc;
736 desc.DepthEnable = pEntry->depthEnable;
737 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
738 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
739 desc.StencilEnable = pEntry->stencilEnable;
740 desc.StencilReadMask = pEntry->stencilReadMask;
741 desc.StencilWriteMask = pEntry->stencilWriteMask;
742 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
743 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
744 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
745 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
746 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
747 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
748 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
749 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
750 /** @todo frontEnable, backEnable */
751
752 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
753 Assert(SUCCEEDED(hr));
754 return hr;
755}
756
757
758static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp)
759{
760 D3D11_SAMPLER_DESC desc;
761 desc.Filter = (D3D11_FILTER)pEntry->filter;
762 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
763 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
764 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
765 desc.MipLODBias = pEntry->mipLODBias;
766 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
767 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
768 desc.BorderColor[0] = pEntry->borderColor.value[0];
769 desc.BorderColor[1] = pEntry->borderColor.value[1];
770 desc.BorderColor[2] = pEntry->borderColor.value[2];
771 desc.BorderColor[3] = pEntry->borderColor.value[3];
772 desc.MinLOD = pEntry->minLOD;
773 desc.MaxLOD = pEntry->maxLOD;
774
775 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
776 Assert(SUCCEEDED(hr));
777 return hr;
778}
779
780
781static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState **pp)
782{
783 D3D11_RASTERIZER_DESC desc;
784 desc.FillMode = (D3D11_FILL_MODE)pEntry->fillMode;
785 desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
786 desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
787 /** provokingVertexLast */
788 desc.DepthBias = pEntry->depthBias;
789 desc.DepthBiasClamp = pEntry->depthBiasClamp;
790 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
791 desc.DepthClipEnable = pEntry->depthClipEnable;
792 desc.ScissorEnable = pEntry->scissorEnable;
793 desc.MultisampleEnable = pEntry->multisampleEnable;
794 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
795 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
796
797 HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
798 Assert(SUCCEEDED(hr));
799 return hr;
800}
801
802
803static HRESULT dxRenderTargetViewCreate(DXDEVICE *pDevice, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DBACKENDSURFACE *pBackendSurface, ID3D11RenderTargetView **pp)
804{
805 ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
806
807 D3D11_RENDER_TARGET_VIEW_DESC desc;
808 RT_ZERO(desc);
809 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
810 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
811 switch (pEntry->resourceDimension)
812 {
813 case SVGA3D_RESOURCE_BUFFER:
814 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
815 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
816 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
817 break;
818 case SVGA3D_RESOURCE_TEXTURE1D:
819 if (pEntry->desc.tex.arraySize <= 1)
820 {
821 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
822 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
823 }
824 else
825 {
826 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
827 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
828 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
829 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
830 }
831 break;
832 case SVGA3D_RESOURCE_TEXTURE2D:
833 if (pEntry->desc.tex.arraySize <= 1)
834 {
835 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
836 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
837 }
838 else
839 {
840 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
841 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
842 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
843 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
844 }
845 break;
846 case SVGA3D_RESOURCE_TEXTURE3D:
847 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
848 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
849 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
850 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
851 break;
852 case SVGA3D_RESOURCE_TEXTURECUBE:
853 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
854 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
855 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
856 desc.Texture2DArray.FirstArraySlice = 0;
857 desc.Texture2DArray.ArraySize = 6;
858 break;
859 case SVGA3D_RESOURCE_BUFFEREX:
860 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
861 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
862 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
863 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
864 break;
865 default:
866 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
867 }
868
869 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
870 Assert(SUCCEEDED(hr));
871 return hr;
872}
873
874
875static HRESULT dxShaderResourceViewCreate(DXDEVICE *pDevice, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DBACKENDSURFACE *pBackendSurface, ID3D11ShaderResourceView **pp)
876{
877 ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
878
879 D3D11_SHADER_RESOURCE_VIEW_DESC desc;
880 RT_ZERO(desc);
881 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
882 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
883
884 switch (pEntry->resourceDimension)
885 {
886 case SVGA3D_RESOURCE_BUFFER:
887 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
888 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
889 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
890 break;
891 case SVGA3D_RESOURCE_TEXTURE1D:
892 if (pEntry->desc.tex.arraySize <= 1)
893 {
894 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
895 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
896 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
897 }
898 else
899 {
900 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
901 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
902 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
903 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
904 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
905 }
906 break;
907 case SVGA3D_RESOURCE_TEXTURE2D:
908 if (pEntry->desc.tex.arraySize <= 1)
909 {
910 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
911 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
912 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
913 }
914 else
915 {
916 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
917 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
918 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
919 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
920 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
921 }
922 break;
923 case SVGA3D_RESOURCE_TEXTURE3D:
924 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
925 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
926 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
927 break;
928 case SVGA3D_RESOURCE_TEXTURECUBE:
929 AssertFailed(); /** @todo test. */
930 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
931 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
932 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
933 break;
934 case SVGA3D_RESOURCE_BUFFEREX:
935 AssertFailed(); /** @todo test. */
936 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
937 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
938 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
939 desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
940 break;
941 default:
942 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
943 }
944
945 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
946 Assert(SUCCEEDED(hr));
947 return hr;
948}
949
950
951static HRESULT dxShaderCreate(DXDEVICE *pDevice, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader)
952{
953 HRESULT hr = S_OK;
954
955 switch (pShader->type)
956 {
957 case SVGA3D_SHADERTYPE_VS:
958 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
959 Assert(SUCCEEDED(hr));
960 break;
961 case SVGA3D_SHADERTYPE_PS:
962 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
963 Assert(SUCCEEDED(hr));
964 break;
965 case SVGA3D_SHADERTYPE_GS:
966 case SVGA3D_SHADERTYPE_HS:
967 case SVGA3D_SHADERTYPE_DS:
968 case SVGA3D_SHADERTYPE_CS:
969 default:
970 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
971 }
972
973 return hr;
974}
975
976
977static void dxShaderSet(DXDEVICE *pDevice, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader)
978{
979 switch (pShader->type)
980 {
981 case SVGA3D_SHADERTYPE_VS:
982 pDevice->pImmediateContext->VSSetShader(pDXShader->pVertexShader, NULL, 0);
983 break;
984 case SVGA3D_SHADERTYPE_PS:
985 pDevice->pImmediateContext->PSSetShader(pDXShader->pPixelShader, NULL, 0);
986 break;
987 case SVGA3D_SHADERTYPE_GS:
988 case SVGA3D_SHADERTYPE_HS:
989 case SVGA3D_SHADERTYPE_DS:
990 case SVGA3D_SHADERTYPE_CS:
991 default:
992 ASSERT_GUEST_FAILED_RETURN_VOID();
993 }
994}
995
996
997static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer)
998{
999 switch (type)
1000 {
1001 case SVGA3D_SHADERTYPE_VS:
1002 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
1003 break;
1004 case SVGA3D_SHADERTYPE_PS:
1005 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
1006 break;
1007 case SVGA3D_SHADERTYPE_GS:
1008 case SVGA3D_SHADERTYPE_HS:
1009 case SVGA3D_SHADERTYPE_DS:
1010 case SVGA3D_SHADERTYPE_CS:
1011 default:
1012 ASSERT_GUEST_FAILED_RETURN_VOID();
1013 }
1014}
1015
1016
1017static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler)
1018{
1019 switch (type)
1020 {
1021 case SVGA3D_SHADERTYPE_VS:
1022 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
1023 break;
1024 case SVGA3D_SHADERTYPE_PS:
1025 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
1026 break;
1027 case SVGA3D_SHADERTYPE_GS:
1028 case SVGA3D_SHADERTYPE_HS:
1029 case SVGA3D_SHADERTYPE_DS:
1030 case SVGA3D_SHADERTYPE_CS:
1031 default:
1032 ASSERT_GUEST_FAILED_RETURN_VOID();
1033 }
1034}
1035
1036
1037static int vmsvga3dBackSurfaceCreateScreenTarget(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)
1038{
1039 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1040 AssertReturn(pBackend, VERR_INVALID_STATE);
1041 AssertReturn(pBackend->pDevice, VERR_INVALID_STATE);
1042
1043 /* Surface must have SCREEN_TARGET flag. */
1044 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
1045
1046 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1047 {
1048 AssertFailed(); /* Should the function not be used like that? */
1049 vmsvga3dBackSurfaceDestroy(pState, pSurface);
1050 }
1051
1052 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1053 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1054
1055 D3D11_TEXTURE2D_DESC td;
1056 RT_ZERO(td);
1057 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1058 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1059 Assert(pSurface->cLevels == 1);
1060 td.MipLevels = 1;
1061 td.ArraySize = 1;
1062 td.Format = vmsvgaDXScreenTargetFormat2Dxgi(pSurface->format); // DXGI_FORMAT_B8G8R8A8_UNORM;
1063 td.SampleDesc.Count = 1;
1064 td.SampleDesc.Quality = 0;
1065 td.Usage = D3D11_USAGE_DEFAULT;
1066 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1067 td.CPUAccessFlags = 0;
1068 td.MiscFlags = 0;
1069
1070 HRESULT hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);
1071 Assert(SUCCEEDED(hr));
1072 if (SUCCEEDED(hr))
1073 {
1074 /* Map-able texture. */
1075 td.Usage = D3D11_USAGE_DYNAMIC;
1076 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1077 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1078 td.MiscFlags = 0;
1079 hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);
1080 Assert(SUCCEEDED(hr));
1081 }
1082
1083 if (SUCCEEDED(hr))
1084 {
1085 /* Staging texture. */
1086 td.Usage = D3D11_USAGE_STAGING;
1087 td.BindFlags = 0; /* No flags allowed. */
1088 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1089 td.MiscFlags = 0;
1090 hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);
1091 Assert(SUCCEEDED(hr));
1092 }
1093
1094 if (SUCCEEDED(hr))
1095 {
1096 /*
1097 * Success.
1098 */
1099 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1100 pBackendSurface->enmDxgiFormat = td.Format;
1101 pSurface->pBackendSurface = pBackendSurface;
1102 pSurface->idAssociatedContext = SVGA_ID_INVALID;
1103 pSurface->fDirty = true;
1104 return VINF_SUCCESS;
1105 }
1106
1107 /* Failure. */
1108 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
1109 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
1110 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
1111 RTMemFree(pBackendSurface);
1112 return VERR_NO_MEMORY;
1113}
1114
1115
1116static int vmsvga3dBackSurfaceCreateRenderTarget(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1117{
1118 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1119 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1120
1121 if (pSurface->pBackendSurface != NULL)
1122 {
1123 AssertFailed(); /** @todo Should the function not be used like that? */
1124 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1125 }
1126
1127 /** @todo Various texture types. */
1128
1129 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1130 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1131
1132 D3D11_TEXTURE2D_DESC td;
1133 RT_ZERO(td);
1134 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1135 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1136 Assert(pSurface->cLevels == 1);
1137 td.MipLevels = 1;
1138 td.ArraySize = 1;
1139 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format); // DXGI_FORMAT_B8G8R8A8_UNORM;
1140 AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1141 td.SampleDesc.Count = 1;
1142 td.SampleDesc.Quality = 0;
1143 td.Usage = D3D11_USAGE_DEFAULT;
1144 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1145 td.CPUAccessFlags = 0;
1146 td.MiscFlags = 0;
1147
1148 HRESULT hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pTexture);
1149 Assert(SUCCEEDED(hr));
1150 if (SUCCEEDED(hr))
1151 {
1152 /* Map-able texture. */
1153 td.Usage = D3D11_USAGE_DYNAMIC;
1154 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1155 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1156 td.MiscFlags = 0;
1157 hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pDynamicTexture);
1158 Assert(SUCCEEDED(hr));
1159 }
1160
1161 if (SUCCEEDED(hr))
1162 {
1163 /* Staging texture. */
1164 td.Usage = D3D11_USAGE_STAGING;
1165 td.BindFlags = 0; /* No flags allowed. */
1166 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1167 td.MiscFlags = 0;
1168 hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pStagingTexture);
1169 Assert(SUCCEEDED(hr));
1170 }
1171
1172 if (SUCCEEDED(hr))
1173 {
1174 /*
1175 * Success.
1176 */
1177 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1178 pBackendSurface->enmDxgiFormat = td.Format;
1179 pSurface->pBackendSurface = pBackendSurface;
1180 pSurface->idAssociatedContext = pDXContext->cid;
1181 pSurface->fDirty = true;
1182 return VINF_SUCCESS;
1183 }
1184
1185 /* Failure. */
1186 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1187 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1188 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1189 RTMemFree(pBackendSurface);
1190 return VERR_NO_MEMORY;
1191}
1192
1193
1194static int vmsvga3dBackSurfaceCreateTexture(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1195{
1196 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1197 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1198
1199 if (pSurface->pBackendSurface != NULL)
1200 {
1201 AssertFailed(); /** @todo Should the function not be used like that? */
1202 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1203 }
1204
1205 /** @todo Various texture types. */
1206
1207 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1208 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1209
1210 RTMemFree(pBackendSurface);
1211 return VERR_NOT_IMPLEMENTED;
1212}
1213
1214
1215static int vmsvga3dBackSurfaceCreateBuffer(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1216{
1217 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1218 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1219
1220 /* Buffers should be created as such. */
1221 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
1222 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
1223 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER
1224 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
1225 /// @todo only for constant buffers| SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
1226 //| SVGA3D_SURFACE_BIND_STREAM_OUTPUT
1227 )), VERR_INVALID_PARAMETER);
1228
1229 if (pSurface->pBackendSurface != NULL)
1230 {
1231 AssertFailed(); /** @todo Should the function not be used like that? */
1232 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1233 }
1234
1235 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1236 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1237
1238 D3D11_BUFFER_DESC bd;
1239 RT_ZERO(bd);
1240 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1241 bd.Usage = D3D11_USAGE_DYNAMIC;
1242 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
1243 | D3D11_BIND_INDEX_BUFFER
1244 //| D3D11_BIND_CONSTANT_BUFFER
1245 //| D3D11_BIND_STREAM_OUTPUT
1246 ;
1247 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1248 bd.MiscFlags = 0;
1249 bd.StructureByteStride = 0;
1250
1251 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1252 if (SUCCEEDED(hr))
1253 {
1254 /*
1255 * Success.
1256 */
1257 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1258 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1259 pSurface->pBackendSurface = pBackendSurface;
1260 pSurface->idAssociatedContext = pDXContext->cid;
1261 pSurface->fDirty = true;
1262 return VINF_SUCCESS;
1263 }
1264
1265 /* Failure. */
1266 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1267 RTMemFree(pBackendSurface);
1268 return VERR_NO_MEMORY;
1269}
1270
1271
1272static int vmsvga3dBackSurfaceCreateConstantBuffer(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1273{
1274 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1275 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1276
1277 /* Buffers should be created as such. */
1278 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
1279
1280 if (pSurface->pBackendSurface != NULL)
1281 {
1282 AssertFailed(); /** @todo Should the function not be used like that? */
1283 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1284 }
1285
1286 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1287 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1288
1289 D3D11_BUFFER_DESC bd;
1290 RT_ZERO(bd);
1291 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1292 bd.Usage = D3D11_USAGE_DYNAMIC;
1293 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
1294 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1295 bd.MiscFlags = 0;
1296 bd.StructureByteStride = 0;
1297
1298 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1299 if (SUCCEEDED(hr))
1300 {
1301 /*
1302 * Success.
1303 */
1304 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1305 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1306 pSurface->pBackendSurface = pBackendSurface;
1307 pSurface->idAssociatedContext = pDXContext->cid;
1308 pSurface->fDirty = true;
1309 return VINF_SUCCESS;
1310 }
1311
1312 /* Failure. */
1313 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1314 RTMemFree(pBackendSurface);
1315 return VERR_NO_MEMORY;
1316}
1317
1318
1319int vmsvga3dInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1320{
1321 RT_NOREF(pDevIns, pThis);
1322
1323 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
1324 AssertReturn(pState, VERR_NO_MEMORY);
1325 pThisCC->svga.p3dState = pState;
1326
1327 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
1328 AssertReturn(pBackend, VERR_NO_MEMORY);
1329 pState->pBackend = pBackend;
1330
1331 int rc = RTLdrLoadSystem("d3d11", /* fNoUnload = */ true, &pBackend->hD3D11);
1332 AssertRC(rc);
1333 if (RT_SUCCESS(rc))
1334 {
1335 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
1336 AssertRC(rc);
1337 }
1338
1339 return rc;
1340}
1341
1342
1343int vmsvga3dPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1344{
1345 RT_NOREF(pDevIns, pThis);
1346
1347 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1348 AssertReturn(pState, VERR_INVALID_STATE);
1349
1350 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1351 AssertReturn(pBackend, VERR_INVALID_STATE);
1352
1353 int rc = VINF_SUCCESS;
1354
1355 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
1356 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
1357 {
1358 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
1359 D3D_FEATURE_LEVEL_11_0
1360 };
1361 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
1362#ifdef DEBUG
1363 Flags |= D3D11_CREATE_DEVICE_DEBUG;
1364#endif
1365
1366 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1367 D3D_DRIVER_TYPE_HARDWARE,
1368 NULL,
1369 Flags,
1370 s_aFeatureLevels,
1371 RT_ELEMENTS(s_aFeatureLevels),
1372 D3D11_SDK_VERSION,
1373 &pBackend->pDevice,
1374 &pBackend->FeatureLevel,
1375 &pBackend->pImmediateContext);
1376 if (SUCCEEDED(hr))
1377 {
1378 LogRel(("VMSVGA: Feature level %#x\n", pBackend->FeatureLevel));
1379
1380 IDXGIDevice *pDxgiDevice = 0;
1381 hr = pBackend->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
1382 if (SUCCEEDED(hr))
1383 {
1384 IDXGIAdapter *pDxgiAdapter = 0;
1385 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
1386 if (SUCCEEDED(hr))
1387 {
1388 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pBackend->pDxgiFactory);
1389 D3D_RELEASE(pDxgiAdapter);
1390 }
1391
1392 D3D_RELEASE(pDxgiDevice);
1393 }
1394 }
1395
1396 if (FAILED(hr))
1397 rc = VERR_NOT_SUPPORTED;
1398
1399 return rc;
1400}
1401
1402
1403int vmsvga3dTerminate(PVGASTATECC pThisCC)
1404{
1405 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1406 AssertReturn(pState, VERR_INVALID_STATE);
1407
1408 if (pState->pBackend)
1409 {
1410 D3D_RELEASE(pState->pBackend->pDevice);
1411 D3D_RELEASE(pState->pBackend->pImmediateContext);
1412 D3D_RELEASE(pState->pBackend->pDxgiFactory);
1413
1414 RTMemFree(pState->pBackend);
1415 pState->pBackend = NULL;
1416 }
1417
1418 return VINF_SUCCESS;
1419}
1420
1421
1422int vmsvga3dReset(PVGASTATECC pThisCC)
1423{
1424 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1425 AssertReturn(pState, VERR_INVALID_STATE);
1426
1427 /** @todo Cleanup all resources and recreate Device, ImmediateContext etc to be at the same state as after poweron. */
1428
1429 return VINF_SUCCESS;
1430}
1431
1432
1433static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1434{
1435 /** @todo Such structures must be in VBoxVideo3D.h */
1436 typedef struct VBOX3DNOTIFYDEFINESCREEN
1437 {
1438 VBOX3DNOTIFY Core;
1439 uint32_t cWidth;
1440 uint32_t cHeight;
1441 int32_t xRoot;
1442 int32_t yRoot;
1443 uint32_t fPrimary;
1444 uint32_t cDpi;
1445 } VBOX3DNOTIFYDEFINESCREEN;
1446
1447 VBOX3DNOTIFYDEFINESCREEN n;
1448 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
1449 n.Core.iDisplay = pScreen->idScreen;
1450 n.Core.u32Reserved = 0;
1451 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1452 RT_ZERO(n.Core.au8Data);
1453 n.cWidth = pScreen->cWidth;
1454 n.cHeight = pScreen->cHeight;
1455 n.xRoot = pScreen->xOrigin;
1456 n.yRoot = pScreen->yOrigin;
1457 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
1458 n.cDpi = pScreen->cDpi;
1459
1460 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1461}
1462
1463
1464static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1465{
1466 VBOX3DNOTIFY n;
1467 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
1468 n.iDisplay = pScreen->idScreen;
1469 n.u32Reserved = 0;
1470 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1471 RT_ZERO(n.au8Data);
1472
1473 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1474}
1475
1476
1477static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
1478{
1479 VBOX3DNOTIFY n;
1480 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
1481 n.iDisplay = pScreen->idScreen;
1482 n.u32Reserved = 0;
1483 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1484 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
1485
1486 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1487}
1488
1489
1490static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
1491 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
1492{
1493 typedef struct VBOX3DNOTIFYUPDATE
1494 {
1495 VBOX3DNOTIFY Core;
1496 uint32_t x;
1497 uint32_t y;
1498 uint32_t w;
1499 uint32_t h;
1500 } VBOX3DNOTIFYUPDATE;
1501
1502 VBOX3DNOTIFYUPDATE n;
1503 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
1504 n.Core.iDisplay = pScreen->idScreen;
1505 n.Core.u32Reserved = 0;
1506 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1507 RT_ZERO(n.Core.au8Data);
1508 n.x = x;
1509 n.y = y;
1510 n.w = w;
1511 n.h = h;
1512
1513 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1514}
1515
1516static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
1517{
1518 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1519
1520 D3D11_TEXTURE2D_DESC td;
1521 RT_ZERO(td);
1522 td.Width = cWidth;
1523 td.Height = cHeight;
1524 td.MipLevels = 1;
1525 td.ArraySize = 1;
1526 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
1527 td.SampleDesc.Count = 1;
1528 td.SampleDesc.Quality = 0;
1529 td.Usage = D3D11_USAGE_DEFAULT;
1530 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1531 td.CPUAccessFlags = 0;
1532 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
1533
1534 HRESULT hr = pBackend->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
1535 if (SUCCEEDED(hr))
1536 {
1537 /* Get the shared handle. */
1538 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
1539 if (SUCCEEDED(hr))
1540 {
1541 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
1542 if (SUCCEEDED(hr))
1543 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
1544 }
1545 }
1546
1547 if (SUCCEEDED(hr))
1548 return VINF_SUCCESS;
1549
1550 AssertFailed();
1551 return VERR_NOT_SUPPORTED;
1552}
1553
1554
1555static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
1556{
1557 RT_NOREF(pState);
1558 D3D_RELEASE(p->pDXGIKeyedMutex);
1559 D3D_RELEASE(p->pDxgiResource);
1560 D3D_RELEASE(p->pTexture);
1561 p->SharedHandle = 0;
1562 p->sidScreenTarget = SVGA_ID_INVALID;
1563}
1564
1565
1566int vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1567{
1568 RT_NOREF(pThis, pThisCC, pScreen);
1569
1570 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
1571
1572 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1573 AssertReturn(pState, VERR_INVALID_STATE);
1574
1575 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1576 AssertReturn(pBackend, VERR_INVALID_STATE);
1577
1578 Assert(pScreen->pHwScreen == NULL);
1579
1580 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
1581 AssertPtrReturn(p, VERR_NO_MEMORY);
1582
1583 p->sidScreenTarget = SVGA_ID_INVALID;
1584
1585 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
1586 if (RT_SUCCESS(rc))
1587 {
1588 /* The frontend supports the screen. Create the actual resource. */
1589 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
1590 if (RT_SUCCESS(rc))
1591 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
1592 }
1593
1594 if (RT_SUCCESS(rc))
1595 {
1596 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
1597 pScreen->pHwScreen = p;
1598 }
1599 else
1600 {
1601 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
1602 vmsvga3dHwScreenDestroy(pState, p);
1603 RTMemFree(p);
1604 }
1605
1606 return rc;
1607}
1608
1609
1610int vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1611{
1612 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1613 AssertReturn(pState, VERR_INVALID_STATE);
1614
1615 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
1616
1617 if (pScreen->pHwScreen)
1618 {
1619 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
1620 RTMemFree(pScreen->pHwScreen);
1621 pScreen->pHwScreen = NULL;
1622 }
1623
1624 return VINF_SUCCESS;
1625}
1626
1627
1628int vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
1629 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
1630 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
1631{
1632 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
1633
1634 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1635 AssertReturn(pState, VERR_INVALID_STATE);
1636
1637 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1638 AssertReturn(pBackend, VERR_INVALID_STATE);
1639
1640 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
1641 AssertReturn(p, VERR_NOT_SUPPORTED);
1642
1643 PVMSVGA3DSURFACE pSurface;
1644 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
1645 AssertRCReturn(rc, rc);
1646
1647 /** @todo Implement. */
1648 AssertFailed();
1649 return VERR_NOT_IMPLEMENTED;
1650}
1651
1652
1653static DECLCALLBACK(int) vmsvga3dSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
1654 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
1655{
1656 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1657 AssertReturn(pState, VERR_INVALID_STATE);
1658
1659 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1660 AssertReturn(pBackend, VERR_INVALID_STATE);
1661 AssertReturn(pBackend->pImmediateContext, VERR_INVALID_STATE);
1662
1663 PVMSVGA3DSURFACE pSurface;
1664 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
1665 AssertRCReturn(rc, rc);
1666
1667 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
1668 if (!pBackendSurface)
1669 return VERR_INVALID_PARAMETER;
1670
1671 PVMSVGA3DDXCONTEXT pDXContext;
1672 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
1673
1674 DXDEVICE *pDevice = NULL;
1675 if (pDXContext)
1676 {
1677 pDevice = &pDXContext->pBackendDXContext->device;
1678 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1679 }
1680
1681 SVGA3dBox clipBox;
1682 if (pBox)
1683 {
1684 clipBox = *pBox;
1685 vmsvgaR3ClipBox(&pSurface->paMipmapLevels[0].mipmapSize, &clipBox);
1686 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
1687 }
1688 else
1689 {
1690 clipBox.x = 0;
1691 clipBox.y = 0;
1692 clipBox.z = 0;
1693 clipBox.w = pSurface->paMipmapLevels[0].mipmapSize.width;
1694 clipBox.h = pSurface->paMipmapLevels[0].mipmapSize.height;
1695 clipBox.d = pSurface->paMipmapLevels[0].mipmapSize.depth;
1696 }
1697
1698 /** @todo D3D11_MAP_WRITE does not work with D3D11_USAGE_DYNAMIC resources. Probably VMSVGA3D_SURFACE_MAP_WRITE is not necessary. */
1699 D3D11_MAP d3d11MapType;
1700 switch (enmMapType)
1701 {
1702 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
1703 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
1704 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
1705 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
1706 default:
1707 AssertFailed();
1708 return VERR_INVALID_PARAMETER;
1709 }
1710
1711 D3D11_MAPPED_SUBRESOURCE mappedResource;
1712 RT_ZERO(mappedResource);
1713
1714 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
1715 {
1716 ID3D11Texture2D *pMappedTexture;
1717 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
1718 {
1719 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
1720
1721 /* Copy the texture content to the staging texture. */
1722 pBackend->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
1723 }
1724 else
1725 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1726
1727 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
1728 HRESULT hr = pBackend->pImmediateContext->Map(pMappedTexture, Subresource,
1729 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
1730 if (SUCCEEDED(hr))
1731 {
1732 pMap->enmMapType = enmMapType;
1733 pMap->box = clipBox;
1734 pMap->cbPixel = pSurface->cbBlock;
1735 pMap->cbRowPitch = mappedResource.RowPitch;
1736 pMap->cbDepthPitch = mappedResource.DepthPitch;
1737 pMap->pvData = (uint8_t *)mappedResource.pData
1738 + pMap->box.x * pMap->cbPixel
1739 + pMap->box.y * pMap->cbRowPitch
1740 + pMap->box.z * pMap->cbDepthPitch;
1741 }
1742 else
1743 rc = VERR_NOT_SUPPORTED;
1744 }
1745 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
1746 {
1747 AssertReturn(pDevice && pDevice->pDevice, VERR_INTERNAL_ERROR);
1748ASMBreakpoint();
1749 ID3D11Texture2D *pMappedTexture;
1750 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
1751 {
1752 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
1753
1754 /* Copy the texture content to the staging texture. */
1755 pDevice->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
1756 }
1757 else
1758 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1759
1760 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
1761 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
1762 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
1763 if (SUCCEEDED(hr))
1764 {
1765 pMap->enmMapType = enmMapType;
1766 pMap->box = clipBox;
1767 pMap->cbPixel = pSurface->cbBlock;
1768 pMap->cbRowPitch = mappedResource.RowPitch;
1769 pMap->cbDepthPitch = mappedResource.DepthPitch;
1770 pMap->pvData = (uint8_t *)mappedResource.pData
1771 + pMap->box.x * pMap->cbPixel
1772 + pMap->box.y * pMap->cbRowPitch
1773 + pMap->box.z * pMap->cbDepthPitch;
1774 }
1775 else
1776 rc = VERR_NOT_SUPPORTED;
1777 }
1778 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
1779 {
1780 UINT const Subresource = 0; /* Buffers have only one subresource. */
1781 HRESULT hr = pDevice->pImmediateContext->Map(pSurface->pBackendSurface->u.Buffer.pBuffer, Subresource,
1782 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
1783 if (SUCCEEDED(hr))
1784 {
1785 pMap->enmMapType = enmMapType;
1786 pMap->box = clipBox;
1787 pMap->cbPixel = pSurface->cbBlock;
1788 pMap->cbRowPitch = mappedResource.RowPitch;
1789 pMap->cbDepthPitch = mappedResource.DepthPitch;
1790 pMap->pvData = (uint8_t *)mappedResource.pData
1791 + pMap->box.x * pMap->cbPixel
1792 + pMap->box.y * pMap->cbRowPitch
1793 + pMap->box.z * pMap->cbDepthPitch;
1794 }
1795 else
1796 rc = VERR_NOT_SUPPORTED;
1797 }
1798 else
1799 {
1800 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
1801 /** @todo Implement. */
1802 AssertFailed();
1803 rc = VERR_NOT_IMPLEMENTED;
1804 }
1805
1806 return rc;
1807}
1808
1809
1810static DECLCALLBACK(int) vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
1811{
1812 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1813 AssertReturn(pState, VERR_INVALID_STATE);
1814
1815 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1816 AssertReturn(pBackend, VERR_INVALID_STATE);
1817 AssertReturn(pBackend->pImmediateContext, VERR_INVALID_STATE);
1818
1819 PVMSVGA3DSURFACE pSurface;
1820 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
1821 AssertRCReturn(rc, rc);
1822
1823 /* The called should not use the function for system memory surfaces. */
1824 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
1825 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
1826
1827 PVMSVGA3DDXCONTEXT pDXContext;
1828 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
1829
1830 DXDEVICE *pDevice = NULL;
1831 if (pDXContext)
1832 {
1833 pDevice = &pDXContext->pBackendDXContext->device;
1834 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1835 }
1836
1837 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
1838 {
1839 ID3D11Texture2D *pMappedTexture;
1840 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
1841 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
1842 else
1843 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1844
1845 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
1846 pBackend->pImmediateContext->Unmap(pMappedTexture, Subresource);
1847
1848 if ( fWritten
1849 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
1850 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
1851 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
1852 {
1853 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
1854 UINT DstSubresource = Subresource;
1855 UINT DstX = pMap->box.x;
1856 UINT DstY = pMap->box.y;
1857 UINT DstZ = pMap->box.z;
1858 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1859 UINT SrcSubresource = Subresource;
1860 D3D11_BOX SrcBox;
1861 SrcBox.left = pMap->box.x;
1862 SrcBox.top = pMap->box.y;
1863 SrcBox.front = pMap->box.z;
1864 SrcBox.right = pMap->box.x + pMap->box.w;
1865 SrcBox.bottom = pMap->box.y + pMap->box.h;
1866 SrcBox.back = pMap->box.z + pMap->box.d;
1867 pBackend->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
1868 pSrcResource, SrcSubresource, &SrcBox);
1869 }
1870 }
1871 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
1872 {
1873 AssertReturn(pDevice && pDevice->pDevice, VERR_INTERNAL_ERROR);
1874ASMBreakpoint();
1875 ID3D11Texture2D *pMappedTexture;
1876 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
1877 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
1878 else
1879 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1880
1881 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
1882 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
1883
1884 if ( fWritten
1885 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
1886 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
1887 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
1888 {
1889 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
1890 UINT DstSubresource = Subresource;
1891 UINT DstX = pMap->box.x;
1892 UINT DstY = pMap->box.y;
1893 UINT DstZ = pMap->box.z;
1894 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1895 UINT SrcSubresource = Subresource;
1896 D3D11_BOX SrcBox;
1897 SrcBox.left = pMap->box.x;
1898 SrcBox.top = pMap->box.y;
1899 SrcBox.front = pMap->box.z;
1900 SrcBox.right = pMap->box.x + pMap->box.w;
1901 SrcBox.bottom = pMap->box.y + pMap->box.h;
1902 SrcBox.back = pMap->box.z + pMap->box.d;
1903 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
1904 pSrcResource, SrcSubresource, &SrcBox);
1905 }
1906 }
1907 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
1908 {
1909 UINT const Subresource = 0; /* Buffers have only one subresource. */
1910 pDevice->pImmediateContext->Unmap(pBackendSurface->u.Buffer.pBuffer, Subresource);
1911 }
1912 else
1913 {
1914 AssertFailed();
1915 rc = VERR_NOT_IMPLEMENTED;
1916 }
1917
1918 return rc;
1919}
1920
1921
1922static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
1923{
1924 int rc = VINF_SUCCESS;
1925
1926 PVMSVGA3DSURFACE pSurface;
1927 if (sid != SVGA_ID_INVALID)
1928 {
1929 /* Create the surface if does not yet exist. */
1930 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1931 AssertReturn(pState, VERR_INVALID_STATE);
1932
1933 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1934 AssertRCReturn(rc, rc);
1935
1936 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1937 {
1938 /* Create the actual texture. */
1939 rc = vmsvga3dBackSurfaceCreateScreenTarget(pState, pSurface);
1940 AssertRCReturn(rc, rc);
1941 }
1942 }
1943 else
1944 pSurface = NULL;
1945
1946 /* Notify the HW accelerated screen if it is used. */
1947 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
1948 if (!pHwScreen)
1949 return VINF_SUCCESS;
1950
1951 /* Same surface -> do nothing. */
1952 if (pHwScreen->sidScreenTarget == sid)
1953 return VINF_SUCCESS;
1954
1955 if (sid != SVGA_ID_INVALID)
1956 {
1957 AssertReturn( pSurface->pBackendSurface
1958 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
1959
1960 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
1961 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
1962 }
1963
1964 if (RT_SUCCESS(rc))
1965 {
1966 pHwScreen->sidScreenTarget = sid;
1967 }
1968
1969 return rc;
1970}
1971
1972
1973static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
1974{
1975 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
1976 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
1977
1978 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
1979 return VINF_SUCCESS; /* No surface bound. */
1980
1981 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1982 AssertReturn(pState, VERR_INVALID_STATE);
1983
1984 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1985 AssertReturn(pBackend, VERR_INVALID_STATE);
1986
1987 PVMSVGA3DSURFACE pSurface;
1988 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
1989 AssertRCReturn(rc, rc);
1990
1991 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
1992 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
1993
1994 SVGA3dRect boundRect;
1995 boundRect.x = 0;
1996 boundRect.y = 0;
1997 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
1998 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
1999 SVGA3dRect clipRect = *pRect;
2000 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
2001 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
2002
2003 /* Copy the screen texture to the shared surface. */
2004 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
2005 if (result == WAIT_OBJECT_0)
2006 {
2007 ID3D11Query *pQuery = 0;
2008 D3D11_QUERY_DESC qd;
2009 RT_ZERO(qd);
2010 qd.Query = D3D11_QUERY_EVENT;
2011 HRESULT hr2 = pBackend->pDevice->CreateQuery(&qd, &pQuery);
2012 Assert(hr2 == S_OK); RT_NOREF(hr2);
2013
2014 pBackend->pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.ScreenTarget.pTexture);
2015
2016 pBackend->pImmediateContext->Flush();
2017
2018 pBackend->pImmediateContext->End(pQuery);
2019
2020 BOOL queryData;
2021 while (pBackend->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
2022 {
2023 RTThreadYield();
2024 }
2025 D3D_RELEASE(pQuery);
2026
2027 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
2028 }
2029 else
2030 AssertFailed();
2031
2032 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
2033 return rc;
2034}
2035
2036
2037void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
2038{
2039 RT_NOREF(pThisCC, idScreen, pOldViewport);
2040 /** @todo Scroll the screen content without requiring the guest to redraw. */
2041}
2042
2043
2044int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
2045{
2046 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2047 AssertReturn(pState, VERR_INVALID_STATE);
2048
2049 int rc = VINF_SUCCESS;
2050
2051 *pu32Val = 0;
2052
2053 if (idx3dCaps > SVGA3D_DEVCAP_MAX)
2054 {
2055 LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
2056 return VERR_NOT_SUPPORTED;
2057 }
2058
2059 /* Most values are taken from:
2060 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
2061 *
2062 * Shader values are from
2063 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
2064 */
2065
2066 switch (idx3dCaps)
2067 {
2068 case SVGA3D_DEVCAP_3D:
2069 *pu32Val = 1;
2070 break;
2071
2072 case SVGA3D_DEVCAP_MAX_LIGHTS:
2073 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
2074 break;
2075
2076 case SVGA3D_DEVCAP_MAX_TEXTURES:
2077 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
2078 break;
2079
2080 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
2081 *pu32Val = SVGA3D_NUM_CLIPPLANES;
2082 break;
2083
2084 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
2085 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2086 *pu32Val = SVGA3DVSVERSION_40;
2087 else
2088 *pu32Val = SVGA3DVSVERSION_30;
2089 break;
2090
2091 case SVGA3D_DEVCAP_VERTEX_SHADER:
2092 *pu32Val = 1;
2093 break;
2094
2095 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
2096 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2097 *pu32Val = SVGA3DPSVERSION_40;
2098 else
2099 *pu32Val = SVGA3DPSVERSION_30;
2100 break;
2101
2102 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
2103 *pu32Val = 1;
2104 break;
2105
2106 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
2107 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2108 *pu32Val = 8;
2109 else
2110 *pu32Val = 4;
2111 break;
2112
2113 case SVGA3D_DEVCAP_S23E8_TEXTURES:
2114 case SVGA3D_DEVCAP_S10E5_TEXTURES:
2115 /* Must be obsolete by now; surface format caps specify the same thing. */
2116 break;
2117
2118 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
2119 /* Obsolete */
2120 break;
2121
2122 /*
2123 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
2124 * return TRUE. Even on physical hardware that does not support
2125 * these formats natively, the SVGA3D device will provide an emulation
2126 * which should be invisible to the guest OS.
2127 */
2128 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
2129 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
2130 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
2131 *pu32Val = 1;
2132 break;
2133
2134 case SVGA3D_DEVCAP_QUERY_TYPES:
2135 /* Obsolete */
2136 break;
2137
2138 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
2139 /* Obsolete */
2140 break;
2141
2142 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
2143 AssertCompile(sizeof(uint32_t) == sizeof(float));
2144 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
2145 break;
2146
2147 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
2148 /* Obsolete */
2149 break;
2150
2151 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
2152 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
2153 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2154 *pu32Val = 16384;
2155 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2156 *pu32Val = 8192;
2157 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2158 *pu32Val = 4096;
2159 else
2160 *pu32Val = 2048;
2161 break;
2162
2163 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
2164 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2165 *pu32Val = 2048;
2166 else
2167 *pu32Val = 256;
2168 break;
2169
2170 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
2171 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2172 *pu32Val = 16384;
2173 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2174 *pu32Val = 8192;
2175 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2176 *pu32Val = 2048;
2177 else
2178 *pu32Val = 128;
2179 break;
2180
2181 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
2182 /* Obsolete */
2183 break;
2184
2185 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
2186 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2187 *pu32Val = D3D11_REQ_MAXANISOTROPY;
2188 else
2189 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
2190 break;
2191
2192 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
2193 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2194 *pu32Val = UINT32_MAX;
2195 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2196 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
2197 else
2198 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
2199 break;
2200
2201 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
2202 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2203 *pu32Val = UINT32_MAX;
2204 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2205 *pu32Val = 1048575;
2206 else
2207 *pu32Val = 65534;
2208 break;
2209
2210 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
2211 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2212 *pu32Val = UINT32_MAX;
2213 else
2214 *pu32Val = 512;
2215 break;
2216
2217 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
2218 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2219 *pu32Val = UINT32_MAX;
2220 else
2221 *pu32Val = 512;
2222 break;
2223
2224 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
2225 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2226 *pu32Val = 4096;
2227 else
2228 *pu32Val = 32;
2229 break;
2230
2231 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
2232 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2233 *pu32Val = 4096;
2234 else
2235 *pu32Val = 32;
2236 break;
2237
2238 case SVGA3D_DEVCAP_TEXTURE_OPS:
2239 /* Obsolete */
2240 break;
2241
2242 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
2243 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
2244 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
2245 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
2246 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
2247 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
2248 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
2249 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
2250 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
2251 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
2252 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
2253 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
2254 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
2255 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
2256 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
2257 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
2258 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
2259 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
2260 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
2261 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
2262 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
2263 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
2264 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
2265 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
2266 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
2267 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
2268 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
2269 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
2270 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
2271 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
2272 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
2273 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
2274 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
2275 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
2276 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
2277 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
2278 case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
2279 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
2280 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
2281 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
2282 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
2283 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
2284 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
2285 {
2286 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
2287 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
2288 break;
2289 }
2290
2291 case SVGA3D_DEVCAP_MISSING62:
2292 /* Unused */
2293 break;
2294
2295 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
2296 /* Obsolete */
2297 break;
2298
2299 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
2300 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2301 *pu32Val = 8;
2302 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2303 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
2304 else
2305 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
2306 break;
2307
2308 case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
2309 case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
2310 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
2311 break;
2312
2313 case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
2314 /* Obsolete */
2315 break;
2316
2317 case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
2318 /* Obsolete */
2319 break;
2320
2321 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
2322 *pu32Val = 1;
2323 break;
2324
2325 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
2326 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
2327 break;
2328
2329 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
2330 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
2331 break;
2332
2333 case SVGA3D_DEVCAP_DEAD1:
2334 /* Obsolete */
2335 break;
2336
2337 case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
2338 /* Obsolete */
2339 break;
2340
2341 case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
2342 /* Obsolete */
2343 break;
2344
2345 case SVGA3D_DEVCAP_LINE_AA:
2346 *pu32Val = 1;
2347 break;
2348
2349 case SVGA3D_DEVCAP_LINE_STIPPLE:
2350 *pu32Val = 0; /* DX11 does not seem to support this directly. */
2351 break;
2352
2353 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
2354 AssertCompile(sizeof(uint32_t) == sizeof(float));
2355 *(float *)pu32Val = 1.0f;
2356 break;
2357
2358 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
2359 AssertCompile(sizeof(uint32_t) == sizeof(float));
2360 *(float *)pu32Val = 1.0f;
2361 break;
2362
2363 case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
2364 /* Deprecated. */
2365 AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
2366 break;
2367
2368 case SVGA3D_DEVCAP_TS_COLOR_KEY:
2369 *pu32Val = 0; /* DX11 does not seem to support this directly. */
2370 break;
2371
2372 case SVGA3D_DEVCAP_DEAD2:
2373 break;
2374
2375 case SVGA3D_DEVCAP_DXCONTEXT:
2376 *pu32Val = 1;
2377 break;
2378
2379 case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
2380 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
2381 break;
2382
2383 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
2384 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
2385 break;
2386
2387 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
2388 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
2389 break;
2390
2391 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
2392 *pu32Val = 0; /* boolean */
2393 break;
2394
2395 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
2396 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
2397 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
2398 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
2399 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
2400 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
2401 case SVGA3D_DEVCAP_DXFMT_Z_D32:
2402 case SVGA3D_DEVCAP_DXFMT_Z_D16:
2403 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
2404 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
2405 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
2406 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
2407 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
2408 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
2409 case SVGA3D_DEVCAP_DXFMT_DXT1:
2410 case SVGA3D_DEVCAP_DXFMT_DXT2:
2411 case SVGA3D_DEVCAP_DXFMT_DXT3:
2412 case SVGA3D_DEVCAP_DXFMT_DXT4:
2413 case SVGA3D_DEVCAP_DXFMT_DXT5:
2414 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
2415 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
2416 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
2417 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
2418 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
2419 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
2420 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
2421 case SVGA3D_DEVCAP_DXFMT_V8U8:
2422 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
2423 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
2424 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
2425 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
2426 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
2427 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
2428 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
2429 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
2430 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
2431 case SVGA3D_DEVCAP_DXFMT_BUFFER:
2432 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
2433 case SVGA3D_DEVCAP_DXFMT_V16U16:
2434 case SVGA3D_DEVCAP_DXFMT_G16R16:
2435 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
2436 case SVGA3D_DEVCAP_DXFMT_UYVY:
2437 case SVGA3D_DEVCAP_DXFMT_YUY2:
2438 case SVGA3D_DEVCAP_DXFMT_NV12:
2439 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
2440 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
2441 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
2442 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
2443 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
2444 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
2445 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
2446 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
2447 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
2448 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
2449 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
2450 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
2451 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
2452 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
2453 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
2454 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
2455 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
2456 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
2457 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
2458 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
2459 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
2460 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
2461 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
2462 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
2463 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
2464 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
2465 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
2466 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
2467 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
2468 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
2469 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
2470 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
2471 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
2472 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
2473 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
2474 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
2475 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
2476 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
2477 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
2478 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
2479 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
2480 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
2481 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
2482 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
2483 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
2484 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
2485 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
2486 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
2487 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
2488 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
2489 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
2490 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
2491 case SVGA3D_DEVCAP_DXFMT_P8:
2492 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
2493 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
2494 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
2495 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
2496 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
2497 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
2498 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
2499 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
2500 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
2501 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
2502 case SVGA3D_DEVCAP_DXFMT_ATI1:
2503 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
2504 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
2505 case SVGA3D_DEVCAP_DXFMT_ATI2:
2506 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
2507 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
2508 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
2509 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
2510 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
2511 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
2512 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
2513 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
2514 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
2515 case SVGA3D_DEVCAP_DXFMT_YV12:
2516 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
2517 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
2518 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
2519 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
2520 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
2521 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
2522 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
2523 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
2524 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
2525 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
2526 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
2527 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
2528 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
2529 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
2530 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
2531 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
2532 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
2533 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
2534 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
2535 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
2536 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
2537 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
2538 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
2539 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
2540 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
2541 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
2542 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
2543 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
2544 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
2545 {
2546 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
2547 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
2548 break;
2549 }
2550
2551 case SVGA3D_DEVCAP_SM41:
2552 *pu32Val = 0; /* boolean */
2553 break;
2554
2555 case SVGA3D_DEVCAP_MULTISAMPLE_2X:
2556 *pu32Val = 0; /* boolean */
2557 break;
2558
2559 case SVGA3D_DEVCAP_MULTISAMPLE_4X:
2560 *pu32Val = 0; /* boolean */
2561 break;
2562
2563 case SVGA3D_DEVCAP_MS_FULL_QUALITY:
2564 *pu32Val = 0; /* boolean */
2565 break;
2566
2567 case SVGA3D_DEVCAP_LOGICOPS:
2568 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
2569 *pu32Val = 0; /* boolean */
2570 break;
2571
2572 case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
2573 *pu32Val = 0; /* boolean */
2574 break;
2575
2576 case SVGA3D_DEVCAP_RESERVED_1:
2577 break;
2578
2579 case SVGA3D_DEVCAP_RESERVED_2:
2580 break;
2581
2582 case SVGA3D_DEVCAP_SM5:
2583 *pu32Val = 0; /* boolean */
2584 break;
2585
2586 case SVGA3D_DEVCAP_MULTISAMPLE_8X:
2587 *pu32Val = 0; /* boolean */
2588 break;
2589
2590 case SVGA3D_DEVCAP_MAX:
2591 case SVGA3D_DEVCAP_INVALID:
2592 rc = VERR_NOT_SUPPORTED;
2593 break;
2594 }
2595
2596 return rc;
2597}
2598
2599
2600/* Handle resize */
2601int vmsvga3dChangeMode(PVGASTATECC pThisCC)
2602{
2603 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2604 AssertReturn(pState, VERR_INVALID_STATE);
2605
2606 return VINF_SUCCESS;
2607}
2608
2609
2610int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
2611 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
2612{
2613 RT_NOREF(dest, src, cCopyBoxes, pBox);
2614
2615 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2616 AssertReturn(pState, VERR_INVALID_STATE);
2617
2618 AssertFailed();
2619 return VERR_NOT_IMPLEMENTED;
2620}
2621
2622
2623/**
2624 * Create a new 3d context
2625 *
2626 * @returns VBox status code.
2627 * @param pThisCC The VGA/VMSVGA state for ring-3.
2628 * @param cid Context id
2629 */
2630int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
2631{
2632 RT_NOREF(cid);
2633
2634 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2635 AssertReturn(pState, VERR_INVALID_STATE);
2636
2637 AssertFailed();
2638 return VERR_NOT_IMPLEMENTED;
2639}
2640
2641
2642/**
2643 * Destroy an existing 3d context
2644 *
2645 * @returns VBox status code.
2646 * @param pThisCC The VGA/VMSVGA state for ring-3.
2647 * @param cid Context id
2648 */
2649int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
2650{
2651 RT_NOREF(cid);
2652
2653 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2654 AssertReturn(pState, VERR_INVALID_STATE);
2655
2656 AssertFailed();
2657 return VINF_SUCCESS;
2658}
2659
2660
2661int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
2662{
2663 RT_NOREF(cid, type, matrix);
2664
2665 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2666 AssertReturn(pState, VERR_INVALID_STATE);
2667
2668 AssertFailed();
2669 return VINF_SUCCESS;
2670}
2671
2672
2673int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
2674{
2675 RT_NOREF(cid, zRange);
2676
2677 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2678 AssertReturn(pState, VERR_INVALID_STATE);
2679
2680 AssertFailed();
2681 return VINF_SUCCESS;
2682}
2683
2684
2685int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
2686{
2687 RT_NOREF(cid, cRenderStates, pRenderState);
2688
2689 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2690 AssertReturn(pState, VERR_INVALID_STATE);
2691
2692 AssertFailed();
2693 return VINF_SUCCESS;
2694}
2695
2696
2697int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
2698{
2699 RT_NOREF(cid, type, target);
2700
2701 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2702 AssertReturn(pState, VERR_INVALID_STATE);
2703
2704 AssertFailed();
2705 return VINF_SUCCESS;
2706}
2707
2708
2709int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
2710{
2711 RT_NOREF(cid, cTextureStates, pTextureState);
2712
2713 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2714 AssertReturn(pState, VERR_INVALID_STATE);
2715
2716 AssertFailed();
2717 return VINF_SUCCESS;
2718}
2719
2720
2721int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
2722{
2723 RT_NOREF(cid, face, pMaterial);
2724
2725 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2726 AssertReturn(pState, VERR_INVALID_STATE);
2727
2728 AssertFailed();
2729 return VINF_SUCCESS;
2730}
2731
2732
2733int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
2734{
2735 RT_NOREF(cid, index, pData);
2736
2737 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2738 AssertReturn(pState, VERR_INVALID_STATE);
2739
2740 AssertFailed();
2741 return VINF_SUCCESS;
2742}
2743
2744
2745int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
2746{
2747 RT_NOREF(cid, index, enabled);
2748
2749 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2750 AssertReturn(pState, VERR_INVALID_STATE);
2751
2752 AssertFailed();
2753 return VINF_SUCCESS;
2754}
2755
2756
2757int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
2758{
2759 RT_NOREF(cid, pRect);
2760
2761 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2762 AssertReturn(pState, VERR_INVALID_STATE);
2763
2764 AssertFailed();
2765 return VINF_SUCCESS;
2766}
2767
2768
2769int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
2770{
2771 RT_NOREF(cid, index, plane);
2772
2773 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2774 AssertReturn(pState, VERR_INVALID_STATE);
2775
2776 AssertFailed();
2777 return VINF_SUCCESS;
2778}
2779
2780
2781int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
2782 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
2783{
2784 /* From SVGA3D_BeginClear comments:
2785 *
2786 * Clear is not affected by clipping, depth test, or other
2787 * render state which affects the fragment pipeline.
2788 *
2789 * Therefore this code must ignore the current scissor rect.
2790 */
2791
2792 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
2793
2794 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2795 AssertReturn(pState, VERR_INVALID_STATE);
2796
2797 AssertFailed();
2798 return VINF_SUCCESS;
2799}
2800
2801
2802int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
2803 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
2804 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
2805{
2806 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
2807
2808 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2809 AssertReturn(pState, VERR_INVALID_STATE);
2810
2811 AssertFailed();
2812 return VINF_SUCCESS;
2813}
2814
2815
2816int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
2817{
2818 RT_NOREF(cid, pRect);
2819
2820 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2821 AssertReturn(pState, VERR_INVALID_STATE);
2822
2823 AssertFailed();
2824 return VINF_SUCCESS;
2825}
2826
2827
2828int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
2829{
2830 RT_NOREF(sid, filter);
2831
2832 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2833 AssertReturn(pState, VERR_INVALID_STATE);
2834
2835 AssertFailed();
2836 return VINF_SUCCESS;
2837}
2838
2839
2840int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
2841 uint32_t cbData, uint32_t *pShaderData)
2842{
2843 RT_NOREF(cid, shid, type, cbData, pShaderData);
2844
2845 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2846 AssertReturn(pState, VERR_INVALID_STATE);
2847
2848 AssertFailed();
2849 return VINF_SUCCESS;
2850}
2851
2852
2853int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
2854{
2855 RT_NOREF(cid, shid, type);
2856
2857 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2858 AssertReturn(pState, VERR_INVALID_STATE);
2859
2860 AssertFailed();
2861 return VINF_SUCCESS;
2862}
2863
2864
2865int vmsvga3dShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
2866{
2867 RT_NOREF(pContext, cid, type, shid);
2868
2869 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2870 AssertReturn(pState, VERR_INVALID_STATE);
2871
2872 AssertFailed();
2873 return VINF_SUCCESS;
2874}
2875
2876
2877int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
2878 SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
2879{
2880 RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
2881
2882 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2883 AssertReturn(pState, VERR_INVALID_STATE);
2884
2885 AssertFailed();
2886 return VINF_SUCCESS;
2887}
2888
2889
2890/**
2891 * Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
2892 *
2893 * @param pState The VMSVGA3d state.
2894 * @param pSurface The surface being destroyed.
2895 */
2896void vmsvga3dBackSurfaceDestroy(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)
2897{
2898 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2899 AssertReturnVoid(pBackend);
2900 AssertReturnVoid(pBackend->pImmediateContext);
2901
2902 /* The caller should not use the function for system memory surfaces. */
2903 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2904 if (!pBackendSurface)
2905 return;
2906 pSurface->pBackendSurface = NULL;
2907
2908 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2909 {
2910 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
2911 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
2912 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
2913 }
2914 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
2915 {
2916 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
2917 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
2918 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
2919 }
2920 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2921 {
2922 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
2923 }
2924 else
2925 {
2926 AssertFailed();
2927 }
2928
2929 RTMemFree(pBackendSurface);
2930}
2931
2932
2933/**
2934 * Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
2935 *
2936 * @returns VBox status code.
2937 * @param pThis The VGA device instance.
2938 * @param pState The VMSVGA3d state.
2939 * @param pDstSurface The destination host surface.
2940 * @param uDstFace The destination face (valid).
2941 * @param uDstMipmap The destination mipmap level (valid).
2942 * @param pDstBox The destination box.
2943 * @param pSrcSurface The source host surface.
2944 * @param uSrcFace The destination face (valid).
2945 * @param uSrcMipmap The source mimap level (valid).
2946 * @param pSrcBox The source box.
2947 * @param enmMode The strecht blt mode .
2948 * @param pContext The VMSVGA3d context (already current for OGL).
2949 */
2950int vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
2951 PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
2952 PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
2953 SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
2954{
2955 RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
2956 pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
2957
2958 AssertFailed();
2959 return VINF_SUCCESS;
2960}
2961
2962
2963/**
2964 * Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
2965 *
2966 * @returns Failure status code or @a rc.
2967 * @param pThis The shared VGA/VMSVGA instance data.
2968 * @param pThisCC The VGA/VMSVGA state for ring-3.
2969 * @param pState The VMSVGA3d state.
2970 * @param pSurface The host surface.
2971 * @param pMipLevel Mipmap level. The caller knows it already.
2972 * @param uHostFace The host face (valid).
2973 * @param uHostMipmap The host mipmap level (valid).
2974 * @param GuestPtr The guest pointer.
2975 * @param cbGuestPitch The guest pitch.
2976 * @param transfer The transfer direction.
2977 * @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
2978 * @param pContext The context (for OpenGL).
2979 * @param rc The current rc for all boxes.
2980 * @param iBox The current box number (for Direct 3D).
2981 */
2982int vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
2983 PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
2984 SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
2985 SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
2986{
2987 RT_NOREF(pState, pMipLevel, pContext, iBox);
2988
2989 /* The called should not use the function for system memory surfaces. */
2990 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2991 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
2992
2993 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2994 {
2995 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
2996 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
2997 AssertReturn(transfer == SVGA3D_WRITE_HOST_VRAM, VERR_NOT_IMPLEMENTED); /** @todo Implement */
2998
2999 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3000 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3001 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3002 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3003 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3004 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3005 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3006
3007 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
3008 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
3009 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
3010 */
3011 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
3012 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
3013
3014 SVGA3dSurfaceImageId image;
3015 image.sid = pSurface->id;
3016 image.face = uHostFace;
3017 image.mipmap = uHostMipmap;
3018
3019 SVGA3dBox box;
3020 box.x = pBox->x;
3021 box.y = pBox->y;
3022 box.z = 0;
3023 box.w = pBox->w;
3024 box.h = pBox->h;
3025 box.d = 1;
3026
3027 VMSVGA3D_MAPPED_SURFACE map;
3028 rc = vmsvga3dSurfaceMap(pThisCC, &image, &box, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map);
3029 if (RT_SUCCESS(rc))
3030 {
3031 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
3032 * and offset of the first scanline.
3033 */
3034 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
3035 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
3036 uint32_t const offLockedBuf = 0;
3037
3038 rc = vmsvgaR3GmrTransfer(pThis,
3039 pThisCC,
3040 transfer,
3041 pu8LockedBuf,
3042 cbLockedBuf,
3043 offLockedBuf,
3044 map.cbRowPitch,
3045 GuestPtr,
3046 (uint32_t)uGuestOffset,
3047 cbGuestPitch,
3048 cBlocksX * pSurface->cbBlock,
3049 cBlocksY);
3050 AssertRC(rc);
3051
3052 // Log4(("first line:\n%.*Rhxd\n", cBlocksX * pSurface->cbBlock, LockedRect.pBits));
3053
3054 //vmsvga3dMapWriteBmpFile(&map, "Dynamic");
3055
3056 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
3057 }
3058#if 0
3059//ASMBreakpoint();
3060 rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
3061 if (RT_SUCCESS(rc))
3062 {
3063 vmsvga3dMapWriteBmpFile(&map, "Staging");
3064
3065 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
3066 }
3067#endif
3068 }
3069 else
3070 {
3071 AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
3072 rc = VERR_NOT_IMPLEMENTED;
3073 }
3074
3075 return rc;
3076}
3077
3078
3079/**
3080 * Create D3D/OpenGL texture object for the specified surface.
3081 *
3082 * Surfaces are created when needed.
3083 *
3084 * @param pState The VMSVGA3d state.
3085 * @param pContext The context.
3086 * @param idAssociatedContext Probably the same as pContext->id.
3087 * @param pSurface The surface to create the texture for.
3088 */
3089int vmsvga3dBackCreateTexture(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
3090 PVMSVGA3DSURFACE pSurface)
3091
3092{
3093 RT_NOREF(pState, pContext, idAssociatedContext, pSurface);
3094
3095 AssertFailed();
3096 return VINF_SUCCESS;
3097}
3098
3099
3100int vmsvga3dOcclusionQueryCreate(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3101{
3102 RT_NOREF(pState, pContext);
3103 AssertFailed();
3104 return VINF_SUCCESS;
3105}
3106
3107
3108int vmsvga3dOcclusionQueryBegin(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3109{
3110 RT_NOREF(pState, pContext);
3111 AssertFailed();
3112 return VINF_SUCCESS;
3113}
3114
3115
3116int vmsvga3dOcclusionQueryEnd(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3117{
3118 RT_NOREF(pState, pContext);
3119 AssertFailed();
3120 return VINF_SUCCESS;
3121}
3122
3123
3124int vmsvga3dOcclusionQueryGetData(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
3125{
3126 RT_NOREF(pState, pContext);
3127 *pu32Pixels = 0;
3128 AssertFailed();
3129 return VINF_SUCCESS;
3130}
3131
3132
3133int vmsvga3dOcclusionQueryDelete(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3134{
3135 RT_NOREF(pState, pContext);
3136 AssertFailed();
3137 return VINF_SUCCESS;
3138}
3139
3140
3141/*
3142 * DX callbacks.
3143 */
3144
3145static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3146{
3147 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3148
3149 /* Allocate a backend specific context structure. */
3150 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
3151 AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
3152 pDXContext->pBackendDXContext = pBackendDXContext;
3153
3154 int rc = dxDeviceCreate(pBackend, &pBackendDXContext->device);
3155 return rc;
3156}
3157
3158
3159static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3160{
3161 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3162
3163 if (pDXContext->pBackendDXContext)
3164 {
3165 dxDeviceDestroy(pBackend, &pDXContext->pBackendDXContext->device);
3166
3167 RTMemFree(pDXContext->pBackendDXContext);
3168 pDXContext->pBackendDXContext = NULL;
3169 }
3170 return VINF_SUCCESS;
3171}
3172
3173
3174static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3175{
3176 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3177 RT_NOREF(pBackend, pDXContext);
3178 return VINF_SUCCESS;
3179}
3180
3181
3182static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3183{
3184 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3185
3186 RT_NOREF(pBackend, pDXContext);
3187 AssertFailed(); /** @todo Implement */
3188 return VERR_NOT_IMPLEMENTED;
3189}
3190
3191
3192static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3193{
3194 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3195
3196 RT_NOREF(pBackend, pDXContext);
3197 AssertFailed(); /** @todo Implement */
3198 return VERR_NOT_IMPLEMENTED;
3199}
3200
3201
3202static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
3203{
3204 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3205 RT_NOREF(pBackend);
3206
3207 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3208 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3209
3210 PVMSVGA3DSURFACE pSurface;
3211 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3212 AssertRCReturn(rc, rc);
3213
3214 uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface;
3215 ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
3216 && sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
3217
3218 if (pSurface->pBackendSurface == NULL)
3219 {
3220 /* Create the resource. */
3221 rc = vmsvga3dBackSurfaceCreateConstantBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
3222 AssertRCReturn(rc, rc);
3223 }
3224
3225 if (pSurface->fDirty)
3226 {
3227 /* Get mobid for the surface and read from the MOB. */
3228 SVGA3dSurfaceImageId imageId;
3229 imageId.sid = sid;
3230 imageId.face = 0;
3231 imageId.mipmap = 0;
3232
3233 SVGA3dPoint ptSrc;
3234 ptSrc.x = offsetInBytes / pSurface->cbBlock;
3235 ptSrc.y = 0;
3236 ptSrc.z = 0;
3237
3238 SVGA3dBox boxDst;
3239 boxDst.x = 0;
3240 boxDst.y = 0;
3241 boxDst.z = 0;
3242 boxDst.w = sizeInBytes / pSurface->cbBlock;
3243 boxDst.h = 1;
3244 boxDst.d = 1;
3245
3246 rc = vmsvgaR3UpdateGBSurfaceEx(pThisCC, &imageId, &boxDst, &ptSrc);
3247 AssertRCReturn(rc, rc);
3248 }
3249
3250 dxConstantBufferSet(pDevice, slot, type, pSurface->pBackendSurface->u.Buffer.pBuffer);
3251
3252 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3253 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[slot];
3254 pCBB->sid = sid;
3255 pCBB->offsetInBytes = offsetInBytes;
3256 pCBB->sizeInBytes = sizeInBytes;
3257 return VINF_SUCCESS;
3258}
3259
3260
3261static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3262{
3263 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3264
3265 RT_NOREF(pBackend, pDXContext);
3266 AssertFailed(); /** @todo Implement */
3267 return VERR_NOT_IMPLEMENTED;
3268}
3269
3270
3271static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)
3272{
3273 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3274 RT_NOREF(pBackend);
3275
3276 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3277 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3278
3279 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
3280 uint32_t const idxShaderState = pDXShader->enmShaderType - SVGA3D_SHADERTYPE_MIN;
3281 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pShader->id;
3282
3283 dxShaderSet(pDevice, pShader, pDXShader);
3284 return VINF_SUCCESS;
3285}
3286
3287
3288static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
3289{
3290 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3291 RT_NOREF(pBackend);
3292
3293 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3294 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3295
3296 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3297 ID3D11SamplerState *aSamplerState[SVGA3D_DX_MAX_SAMPLERS];
3298 for (uint32_t i = 0; i < cSamplerId; ++i)
3299 {
3300 SVGA3dSamplerId samplerId = paSamplerId[i];
3301 if (samplerId != SVGA3D_INVALID_ID)
3302 {
3303 ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
3304 aSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
3305 }
3306 else
3307 aSamplerState[i] = NULL;
3308
3309 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[startSampler + i] = samplerId;
3310 }
3311
3312 dxSamplerSet(pDevice, type, startSampler, cSamplerId, aSamplerState);
3313 return VINF_SUCCESS;
3314}
3315
3316
3317static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
3318{
3319 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3320 RT_NOREF(pBackend);
3321
3322 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3323 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3324
3325 pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
3326 return VINF_SUCCESS;
3327}
3328
3329
3330static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
3331{
3332 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3333 RT_NOREF(pBackend);
3334
3335 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3336 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3337
3338 pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
3339 return VINF_SUCCESS;
3340}
3341
3342
3343static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3344{
3345 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3346
3347 RT_NOREF(pBackend, pDXContext);
3348 AssertFailed(); /** @todo Implement */
3349 return VERR_NOT_IMPLEMENTED;
3350}
3351
3352
3353static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3354{
3355 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3356
3357 RT_NOREF(pBackend, pDXContext);
3358 AssertFailed(); /** @todo Implement */
3359 return VERR_NOT_IMPLEMENTED;
3360}
3361
3362
3363static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3364{
3365 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3366
3367 RT_NOREF(pBackend, pDXContext);
3368 AssertFailed(); /** @todo Implement */
3369 return VERR_NOT_IMPLEMENTED;
3370}
3371
3372
3373static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
3374{
3375 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3376 RT_NOREF(pBackend);
3377
3378 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3379 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3380
3381 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
3382
3383 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
3384 if (!pDXElementLayout->pElementLayout)
3385 {
3386 uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
3387 uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
3388 AssertReturnStmt(shid < pDXContext->pBackendDXContext->cShader,
3389 LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid)),
3390 VERR_INVALID_STATE);
3391 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
3392 AssertReturnStmt(pDXShader->pvDXBC,
3393 LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid)),
3394 VERR_INVALID_STATE);
3395 HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
3396 pDXElementLayout->cElementDesc,
3397 pDXShader->pvDXBC,
3398 pDXShader->cbDXBC,
3399 &pDXElementLayout->pElementLayout);
3400 AssertReturn(SUCCEEDED(hr), VERR_NO_MEMORY);
3401 }
3402
3403 pDevice->pImmediateContext->IASetInputLayout(pDXElementLayout->pElementLayout);
3404 return VINF_SUCCESS;
3405}
3406
3407
3408static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
3409{
3410 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3411 RT_NOREF(pBackend);
3412
3413 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3414 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3415
3416 /* For each paVertexBuffer[i]:
3417 * If the vertex buffer object does not exist then create it.
3418 * If the surface has been updated by the guest then update the buffer object.
3419 * Use IASetVertexBuffers to set the buffers.
3420 */
3421
3422 ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
3423 UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
3424 UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
3425
3426 for (uint32_t i = 0; i < cVertexBuffer; ++i)
3427 {
3428 uint32_t const idxVertexBuffer = startBuffer + i;
3429
3430 /* Get corresponding resource. Create the buffer if does not yet exist. */
3431 if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
3432 {
3433 PVMSVGA3DSURFACE pSurface;
3434 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
3435 AssertRCReturn(rc, rc);
3436
3437 if (pSurface->pBackendSurface == NULL)
3438 {
3439 /* Create the resource. */
3440 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
3441 AssertRCReturn(rc, rc);
3442 }
3443
3444 if (pSurface->fDirty)
3445 {
3446 /* Get mobid for the surface and read from the MOB. */
3447 SVGA3dSurfaceImageId imageId;
3448 imageId.sid = paVertexBuffer[i].sid;
3449 imageId.face = 0;
3450 imageId.mipmap = 0;
3451
3452 SVGA3dBox box;
3453 box.x = 0;
3454 box.y = 0;
3455 box.z = 0;
3456 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
3457 box.h = 1;
3458 box.d = 1;
3459
3460 rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box);
3461 AssertRCReturn(rc, rc);
3462 }
3463
3464 paResources[idxVertexBuffer] = pSurface->pBackendSurface->u.Buffer.pBuffer;
3465 paStride[idxVertexBuffer] = paVertexBuffer[i].stride;
3466 paOffset[idxVertexBuffer] = paVertexBuffer[i].offset;
3467 }
3468 else
3469 {
3470 paResources[idxVertexBuffer] = NULL;
3471 paStride[idxVertexBuffer] = 0;
3472 paOffset[idxVertexBuffer] = 0;
3473 }
3474
3475 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
3476 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
3477 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
3478 }
3479
3480 pDevice->pImmediateContext->IASetVertexBuffers(startBuffer, cVertexBuffer, paResources, paStride, paOffset);
3481
3482 return VINF_SUCCESS;
3483}
3484
3485
3486static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
3487{
3488 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3489 RT_NOREF(pBackend);
3490
3491 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3492 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3493
3494 /* Get corresponding resource. Create the buffer if does not yet exist. */
3495 ID3D11Buffer *pResource;
3496 DXGI_FORMAT enmDxgiFormat;
3497
3498 if (sid != SVGA_ID_INVALID)
3499 {
3500 PVMSVGA3DSURFACE pSurface;
3501 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3502 AssertRCReturn(rc, rc);
3503
3504 if (pSurface->pBackendSurface == NULL)
3505 {
3506 /* Create the resource. */
3507 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
3508 AssertRCReturn(rc, rc);
3509 }
3510
3511 if (pSurface->fDirty)
3512 {
3513 /* Get mobid for the surface and read from the MOB. */
3514 SVGA3dSurfaceImageId imageId;
3515 imageId.sid = sid;
3516 imageId.face = 0;
3517 imageId.mipmap = 0;
3518
3519 SVGA3dBox box;
3520 box.x = 0;
3521 box.y = 0;
3522 box.z = 0;
3523 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
3524 box.h = 1;
3525 box.d = 1;
3526
3527 rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box);
3528 AssertRCReturn(rc, rc);
3529 }
3530
3531 pResource = pSurface->pBackendSurface->u.Buffer.pBuffer;
3532 enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
3533 AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT || enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
3534 }
3535 else
3536 {
3537 pResource = NULL;
3538 enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3539 }
3540
3541 pDevice->pImmediateContext->IASetIndexBuffer(pResource, enmDxgiFormat, offset);
3542
3543 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = sid;
3544 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = offset;
3545 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = format;
3546
3547 return VINF_SUCCESS;
3548}
3549
3550static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
3551{
3552 static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
3553 {
3554 D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
3555 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
3556 D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
3557 D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
3558 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
3559 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
3560 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11 */
3561 D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
3562 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
3563 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
3564 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
3565 D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
3566 D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
3567 D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
3568 D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
3569 D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
3570 D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
3571 D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
3572 D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
3573 D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
3574 D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
3575 D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
3576 D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
3577 D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
3578 D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
3579 D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
3580 D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
3581 D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
3582 D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
3583 D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
3584 D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
3585 D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
3586 D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
3587 D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
3588 D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
3589 D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
3590 D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
3591 D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
3592 D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
3593 D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
3594 D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
3595 D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
3596 D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
3597 };
3598 return aD3D11PrimitiveTopology[primitiveType];
3599}
3600
3601static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
3602{
3603 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3604 RT_NOREF(pBackend);
3605
3606 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3607 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3608
3609 D3D11_PRIMITIVE_TOPOLOGY enmTopology = dxTopology(topology);
3610 pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
3611 pDXContext->svgaDXContext.inputAssembly.topology = topology;
3612 return VINF_SUCCESS;
3613}
3614
3615
3616static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
3617{
3618 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3619 RT_NOREF(pBackend);
3620
3621 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3622 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3623
3624 ID3D11RenderTargetView *aRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
3625 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
3626 {
3627 SVGA3dRenderTargetViewId renderTargetViewId = paRenderTargetViewId[i];
3628 if (renderTargetViewId != SVGA3D_INVALID_ID)
3629 {
3630 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
3631 aRenderTargetViews[i] = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
3632 }
3633 else
3634 aRenderTargetViews[i] = NULL;
3635 }
3636
3637 ID3D11DepthStencilView *pDepthStencilView;
3638 if (depthStencilViewId != SVGA_ID_INVALID)
3639 pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
3640 else
3641 pDepthStencilView = NULL;
3642
3643 pDevice->pImmediateContext->OMSetRenderTargets(cRenderTargetViewId, aRenderTargetViews, pDepthStencilView);
3644 return VINF_SUCCESS;
3645}
3646
3647
3648static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
3649{
3650 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3651 RT_NOREF(pBackend);
3652
3653 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3654 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3655
3656 ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
3657 pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
3658
3659 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
3660 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, blendFactor, sizeof(blendFactor));
3661 pDXContext->svgaDXContext.renderState.sampleMask = sampleMask;
3662
3663 return VINF_SUCCESS;
3664}
3665
3666
3667static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
3668{
3669 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3670 RT_NOREF(pBackend);
3671
3672 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3673 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3674
3675 ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
3676 pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
3677
3678 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
3679 pDXContext->svgaDXContext.renderState.stencilRef = stencilRef;
3680
3681 return VINF_SUCCESS;
3682}
3683
3684
3685static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
3686{
3687 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3688 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3689 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3690
3691 RT_NOREF(pBackend);
3692
3693 pDevice->pImmediateContext->RSSetState(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
3694 return VINF_SUCCESS;
3695}
3696
3697
3698static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3699{
3700 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3701
3702 RT_NOREF(pBackend, pDXContext);
3703 AssertFailed(); /** @todo Implement */
3704 return VERR_NOT_IMPLEMENTED;
3705}
3706
3707
3708static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3709{
3710 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3711
3712 RT_NOREF(pBackend, pDXContext);
3713 AssertFailed(); /** @todo Implement */
3714 return VERR_NOT_IMPLEMENTED;
3715}
3716
3717
3718static DECLCALLBACK(int) vmsvga3dBackDXBindQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3719{
3720 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3721
3722 RT_NOREF(pBackend, pDXContext);
3723 AssertFailed(); /** @todo Implement */
3724 return VERR_NOT_IMPLEMENTED;
3725}
3726
3727
3728static DECLCALLBACK(int) vmsvga3dBackDXSetQueryOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3729{
3730 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3731
3732 RT_NOREF(pBackend, pDXContext);
3733 AssertFailed(); /** @todo Implement */
3734 return VERR_NOT_IMPLEMENTED;
3735}
3736
3737
3738static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3739{
3740 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3741
3742 RT_NOREF(pBackend, pDXContext);
3743 AssertFailed(); /** @todo Implement */
3744 return VERR_NOT_IMPLEMENTED;
3745}
3746
3747
3748static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3749{
3750 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3751
3752 RT_NOREF(pBackend, pDXContext);
3753 AssertFailed(); /** @todo Implement */
3754 return VERR_NOT_IMPLEMENTED;
3755}
3756
3757
3758static DECLCALLBACK(int) vmsvga3dBackDXReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3759{
3760 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3761
3762 RT_NOREF(pBackend, pDXContext);
3763 AssertFailed(); /** @todo Implement */
3764 return VERR_NOT_IMPLEMENTED;
3765}
3766
3767
3768static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3769{
3770 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3771
3772 RT_NOREF(pBackend, pDXContext);
3773 AssertFailed(); /** @todo Implement */
3774 return VERR_NOT_IMPLEMENTED;
3775}
3776
3777
3778static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3779{
3780 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3781
3782 RT_NOREF(pBackend, pDXContext);
3783 AssertFailed(); /** @todo Implement */
3784 return VERR_NOT_IMPLEMENTED;
3785}
3786
3787
3788static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
3789{
3790 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3791 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3792 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3793
3794 RT_NOREF(pBackend);
3795
3796 /* D3D11_VIEWPORT is identical to SVGA3dViewport. */
3797 D3D11_VIEWPORT *pViewports = (D3D11_VIEWPORT *)paViewport;
3798
3799 pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
3800 return VINF_SUCCESS;
3801}
3802
3803
3804static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
3805{
3806 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3807 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3808 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3809
3810 RT_NOREF(pBackend);
3811
3812 /* D3D11_RECT is identical to SVGASignedRect. */
3813 D3D11_RECT *pRects = (D3D11_RECT *)paRect;
3814
3815 pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
3816 return VINF_SUCCESS;
3817}
3818
3819
3820static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3821{
3822 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3823
3824 RT_NOREF(pBackend, pDXContext);
3825 AssertFailed(); /** @todo Implement */
3826 return VERR_NOT_IMPLEMENTED;
3827}
3828
3829
3830static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3831{
3832 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3833
3834 RT_NOREF(pBackend, pDXContext);
3835 AssertFailed(); /** @todo Implement */
3836 return VERR_NOT_IMPLEMENTED;
3837}
3838
3839
3840static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3841{
3842 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3843
3844 RT_NOREF(pBackend, pDXContext);
3845 AssertFailed(); /** @todo Implement */
3846 return VERR_NOT_IMPLEMENTED;
3847}
3848
3849
3850static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3851{
3852 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3853
3854 RT_NOREF(pBackend, pDXContext);
3855 AssertFailed(); /** @todo Implement */
3856 return VERR_NOT_IMPLEMENTED;
3857}
3858
3859
3860static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3861{
3862 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3863
3864 RT_NOREF(pBackend, pDXContext);
3865 AssertFailed(); /** @todo Implement */
3866 return VERR_NOT_IMPLEMENTED;
3867}
3868
3869
3870static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3871{
3872 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3873
3874 RT_NOREF(pBackend, pDXContext);
3875 AssertFailed(); /** @todo Implement */
3876 return VERR_NOT_IMPLEMENTED;
3877}
3878
3879
3880static DECLCALLBACK(int) vmsvga3dBackDXUpdateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3881{
3882 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3883
3884 RT_NOREF(pBackend, pDXContext);
3885 AssertFailed(); /** @todo Implement */
3886 return VERR_NOT_IMPLEMENTED;
3887}
3888
3889
3890static DECLCALLBACK(int) vmsvga3dBackDXReadbackSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3891{
3892 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3893
3894 RT_NOREF(pBackend, pDXContext);
3895 AssertFailed(); /** @todo Implement */
3896 return VERR_NOT_IMPLEMENTED;
3897}
3898
3899
3900static DECLCALLBACK(int) vmsvga3dBackDXInvalidateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3901{
3902 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3903
3904 RT_NOREF(pBackend, pDXContext);
3905 AssertFailed(); /** @todo Implement */
3906 return VERR_NOT_IMPLEMENTED;
3907}
3908
3909
3910static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
3911{
3912 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3913 RT_NOREF(pBackend);
3914
3915 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3916 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3917
3918 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
3919 PVMSVGA3DSURFACE pSurface;
3920 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
3921 AssertRCReturn(rc, rc);
3922
3923 if (pSurface->pBackendSurface == NULL)
3924 {
3925 /* Create the actual texture. */
3926 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pSurface);
3927 AssertRCReturn(rc, rc);
3928 }
3929
3930 HRESULT hr = dxShaderResourceViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
3931 if (SUCCEEDED(hr))
3932 return VINF_SUCCESS;
3933 return VERR_INVALID_STATE;
3934}
3935
3936
3937static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3938{
3939 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3940
3941 RT_NOREF(pBackend, pDXContext);
3942 AssertFailed(); /** @todo Implement */
3943 return VERR_NOT_IMPLEMENTED;
3944}
3945
3946
3947static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
3948{
3949 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3950 RT_NOREF(pBackend);
3951
3952 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3953 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3954
3955 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
3956 PVMSVGA3DSURFACE pSurface;
3957 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
3958 AssertRCReturn(rc, rc);
3959
3960 if (pSurface->pBackendSurface == NULL)
3961 {
3962 /* Create the actual texture. */
3963 rc = vmsvga3dBackSurfaceCreateRenderTarget(pThisCC->svga.p3dState, pDXContext, pSurface);
3964 AssertRCReturn(rc, rc);
3965 }
3966
3967 HRESULT hr = dxRenderTargetViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
3968 if (SUCCEEDED(hr))
3969 return VINF_SUCCESS;
3970 return VERR_INVALID_STATE;
3971}
3972
3973
3974static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3975{
3976 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3977
3978 RT_NOREF(pBackend, pDXContext);
3979 AssertFailed(); /** @todo Implement */
3980 return VERR_NOT_IMPLEMENTED;
3981}
3982
3983
3984static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3985{
3986 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3987
3988 RT_NOREF(pBackend, pDXContext);
3989 AssertFailed(); /** @todo Implement */
3990 return VERR_NOT_IMPLEMENTED;
3991}
3992
3993
3994static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3995{
3996 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3997
3998 RT_NOREF(pBackend, pDXContext);
3999 AssertFailed(); /** @todo Implement */
4000 return VERR_NOT_IMPLEMENTED;
4001}
4002
4003
4004static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
4005{
4006 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4007 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4008 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4009
4010 RT_NOREF(pBackend, elementLayoutId, pEntry);
4011
4012 /* Not much can be done here because ID3D11Device::CreateInputLayout requires
4013 * a pShaderBytecodeWithInputSignature which is not known at this moment.
4014 * InputLayout object will be created in SVGA_3D_CMD_DX_SET_INPUT_LAYOUT.
4015 */
4016
4017 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[pEntry->elid];
4018 D3D_RELEASE(pDXElementLayout->pElementLayout);
4019
4020 /* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
4021 * if they are consistent between the element layout and shader input signature.
4022 * "In general, data passed between pipeline stages is completely generic and is not uniquely
4023 * interpreted by the system; arbitrary semantics are allowed ..."
4024 *
4025 * However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
4026 *
4027 * System-Value semantics ("SV_*") between shaders require proper names of course.
4028 * But they are irrelevant for input attributes.
4029 */
4030 pDXElementLayout->cElementDesc = pEntry->numDescs;
4031 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
4032 {
4033 D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
4034 SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
4035 pDst->SemanticName = "ATTRIB";
4036 pDst->SemanticIndex = i; /// @todo 'pSrc->inputRegister' is unused, maybe it should somehow.
4037 pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
4038 AssertReturn(pDst->Format != DXGI_FORMAT_UNKNOWN, VERR_NOT_IMPLEMENTED);
4039 pDst->InputSlot = pSrc->inputSlot;
4040 pDst->AlignedByteOffset = pSrc->alignedByteOffset;
4041 pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
4042 pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
4043 }
4044
4045 return VINF_SUCCESS;
4046}
4047
4048
4049static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4050{
4051 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4052
4053 RT_NOREF(pBackend, pDXContext);
4054 AssertFailed(); /** @todo Implement */
4055 return VERR_NOT_IMPLEMENTED;
4056}
4057
4058
4059static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
4060 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
4061{
4062 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4063 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4064 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4065
4066 RT_NOREF(pBackend);
4067
4068 HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
4069 if (SUCCEEDED(hr))
4070 return VINF_SUCCESS;
4071 return VERR_INVALID_STATE;
4072}
4073
4074
4075static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4076{
4077 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4078
4079 RT_NOREF(pBackend, pDXContext);
4080 AssertFailed(); /** @todo Implement */
4081 return VERR_NOT_IMPLEMENTED;
4082}
4083
4084
4085static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry *pEntry)
4086{
4087 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4088 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4089 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4090
4091 RT_NOREF(pBackend);
4092
4093 HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
4094 if (SUCCEEDED(hr))
4095 return VINF_SUCCESS;
4096 return VERR_INVALID_STATE;
4097}
4098
4099
4100static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4101{
4102 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4103
4104 RT_NOREF(pBackend, pDXContext);
4105 AssertFailed(); /** @todo Implement */
4106 return VERR_NOT_IMPLEMENTED;
4107}
4108
4109
4110static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
4111{
4112 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4113 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4114 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4115
4116 RT_NOREF(pBackend);
4117
4118 HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4119 if (SUCCEEDED(hr))
4120 return VINF_SUCCESS;
4121 return VERR_INVALID_STATE;
4122}
4123
4124
4125static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4126{
4127 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4128
4129 RT_NOREF(pBackend, pDXContext);
4130 AssertFailed(); /** @todo Implement */
4131 return VERR_NOT_IMPLEMENTED;
4132}
4133
4134
4135static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
4136{
4137 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4138 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4139 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4140
4141 RT_NOREF(pBackend);
4142
4143 HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
4144 if (SUCCEEDED(hr))
4145 return VINF_SUCCESS;
4146 return VERR_INVALID_STATE;
4147}
4148
4149
4150static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4151{
4152 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4153
4154 RT_NOREF(pBackend, pDXContext);
4155 AssertFailed(); /** @todo Implement */
4156 return VERR_NOT_IMPLEMENTED;
4157}
4158
4159
4160static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)
4161{
4162 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4163
4164 RT_NOREF(pBackend);
4165
4166 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4167 D3D_RELEASE(pDXShader->pShader);
4168 pDXShader->enmShaderType = pShader->type;
4169 pShader->u.pvBackendShader = pDXShader;
4170 return VINF_SUCCESS;
4171}
4172
4173
4174static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4175{
4176 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4177
4178 RT_NOREF(pBackend, pDXContext);
4179 AssertFailed(); /** @todo Implement */
4180 return VERR_NOT_IMPLEMENTED;
4181}
4182
4183
4184static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, void const *pvShaderBytecode)
4185{
4186 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4187 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4188 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4189
4190 RT_NOREF(pBackend);
4191
4192 int rc = VINF_SUCCESS;
4193
4194 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4195 if (pDXShader->pvDXBC)
4196 {
4197 RTMemFree(pDXShader->pvDXBC);
4198 pDXShader->pvDXBC = NULL;
4199 pDXShader->cbDXBC = 0;
4200 }
4201
4202 if (pvShaderBytecode)
4203 {
4204#ifdef LOG_ENABLED
4205 Log(("Shader: cid=%u shid=%u type=%d:\n", pDXContext->cid, pShader->id, pDXShader->enmShaderType));
4206 uint8_t *pu8 = (uint8_t *)pvShaderBytecode;
4207 for (uint32_t i = 0; i < pShader->cbData; ++i)
4208 {
4209 if ((i % 16) == 0)
4210 {
4211 if (i > 0)
4212 Log((",\n"));
4213
4214 Log((" %#04x", pu8[i]));
4215 }
4216 else
4217 {
4218 Log((", %#04x", pu8[i]));
4219 }
4220 }
4221 Log(("\n"));
4222#endif
4223
4224 rc = DXShaderCreateDXBC(&pShader->shaderInfo, pvShaderBytecode, pShader->cbData, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
4225 if (RT_SUCCESS(rc))
4226 {
4227 HRESULT hr = dxShaderCreate(pDevice, pShader, pDXShader);
4228 if (FAILED(hr))
4229 rc = VERR_INVALID_STATE;
4230 }
4231 else
4232 rc = VERR_NO_MEMORY;
4233 }
4234
4235 return rc;
4236}
4237
4238
4239static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4240{
4241 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4242
4243 RT_NOREF(pBackend, pDXContext);
4244 AssertFailed(); /** @todo Implement */
4245 return VERR_NOT_IMPLEMENTED;
4246}
4247
4248
4249static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4250{
4251 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4252
4253 RT_NOREF(pBackend, pDXContext);
4254 AssertFailed(); /** @todo Implement */
4255 return VERR_NOT_IMPLEMENTED;
4256}
4257
4258
4259static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4260{
4261 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4262
4263 RT_NOREF(pBackend, pDXContext);
4264 AssertFailed(); /** @todo Implement */
4265 return VERR_NOT_IMPLEMENTED;
4266}
4267
4268static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cEntries)
4269{
4270 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4271 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
4272
4273 RT_NOREF(pBackend, pDXContext, type);
4274
4275 int rc = VINF_SUCCESS;
4276
4277 /* Allocate paBlendState for example. */
4278 switch (type)
4279 {
4280 case SVGA_COTABLE_RTVIEW:
4281 if (pBackendDXContext->papRenderTargetView)
4282 {
4283 DX_RELEASE_ARRAY(pBackendDXContext->cRenderTargetView, pBackendDXContext->papRenderTargetView);
4284 RTMemFree(pBackendDXContext->papRenderTargetView);
4285 pBackendDXContext->papRenderTargetView = NULL;
4286 pBackendDXContext->cRenderTargetView = 0;
4287 }
4288
4289 if (cEntries)
4290 {
4291 pBackendDXContext->papRenderTargetView = (ID3D11RenderTargetView **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papRenderTargetView[0]));
4292 AssertBreakStmt(pBackendDXContext->papRenderTargetView, rc = VERR_NO_MEMORY);
4293 pBackendDXContext->cRenderTargetView = cEntries;
4294 }
4295 break;
4296 case SVGA_COTABLE_DSVIEW:
4297 if (pBackendDXContext->papDepthStencilView)
4298 {
4299 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilView, pBackendDXContext->papDepthStencilView);
4300 RTMemFree(pBackendDXContext->papDepthStencilView);
4301 pBackendDXContext->papDepthStencilView = NULL;
4302 pBackendDXContext->cDepthStencilView = 0;
4303 }
4304
4305 if (cEntries)
4306 {
4307 pBackendDXContext->papDepthStencilView = (ID3D11DepthStencilView **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papDepthStencilView[0]));
4308 AssertBreakStmt(pBackendDXContext->papDepthStencilView, rc = VERR_NO_MEMORY);
4309 pBackendDXContext->cDepthStencilView = cEntries;
4310 }
4311 break;
4312 case SVGA_COTABLE_SRVIEW:
4313 if (pBackendDXContext->papShaderResourceView)
4314 {
4315 DX_RELEASE_ARRAY(pBackendDXContext->cShaderResourceView, pBackendDXContext->papShaderResourceView);
4316 RTMemFree(pBackendDXContext->papShaderResourceView);
4317 pBackendDXContext->papShaderResourceView = NULL;
4318 pBackendDXContext->cShaderResourceView = 0;
4319 }
4320
4321 if (cEntries)
4322 {
4323 pBackendDXContext->papShaderResourceView = (ID3D11ShaderResourceView **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papShaderResourceView[0]));
4324 AssertBreakStmt(pBackendDXContext->papShaderResourceView, rc = VERR_NO_MEMORY);
4325 pBackendDXContext->cShaderResourceView = cEntries;
4326 }
4327 break;
4328 case SVGA_COTABLE_ELEMENTLAYOUT:
4329 if (pBackendDXContext->paElementLayout)
4330 {
4331 for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
4332 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
4333 RTMemFree(pBackendDXContext->paElementLayout);
4334 pBackendDXContext->paElementLayout = NULL;
4335 pBackendDXContext->cElementLayout = 0;
4336 }
4337
4338 if (cEntries)
4339 {
4340 pBackendDXContext->paElementLayout = (DXELEMENTLAYOUT *)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->paElementLayout[0]));
4341 AssertBreakStmt(pBackendDXContext->paElementLayout, rc = VERR_NO_MEMORY);
4342 pBackendDXContext->cElementLayout = cEntries;
4343 }
4344 break;
4345 case SVGA_COTABLE_BLENDSTATE:
4346 if (pBackendDXContext->papBlendState)
4347 {
4348 DX_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
4349 RTMemFree(pBackendDXContext->papBlendState);
4350 pBackendDXContext->papBlendState = NULL;
4351 pBackendDXContext->cBlendState = 0;
4352 }
4353
4354 if (cEntries)
4355 {
4356 pBackendDXContext->papBlendState = (ID3D11BlendState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papBlendState[0]));
4357 AssertBreakStmt(pBackendDXContext->papBlendState, rc = VERR_NO_MEMORY);
4358 pBackendDXContext->cBlendState = cEntries;
4359 }
4360 break;
4361 case SVGA_COTABLE_DEPTHSTENCIL:
4362 if (pBackendDXContext->papDepthStencilState)
4363 {
4364 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
4365 RTMemFree(pBackendDXContext->papDepthStencilState);
4366 pBackendDXContext->papDepthStencilState = NULL;
4367 pBackendDXContext->cDepthStencilState = 0;
4368 }
4369
4370 if (cEntries)
4371 {
4372 pBackendDXContext->papDepthStencilState = (ID3D11DepthStencilState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papDepthStencilState[0]));
4373 AssertBreakStmt(pBackendDXContext->papDepthStencilState, rc = VERR_NO_MEMORY);
4374 pBackendDXContext->cDepthStencilState = cEntries;
4375 }
4376 break;
4377 case SVGA_COTABLE_RASTERIZERSTATE:
4378 if (pBackendDXContext->papRasterizerState)
4379 {
4380 DX_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
4381 RTMemFree(pBackendDXContext->papRasterizerState);
4382 pBackendDXContext->papRasterizerState = NULL;
4383 pBackendDXContext->cRasterizerState = 0;
4384 }
4385
4386 if (cEntries)
4387 {
4388 pBackendDXContext->papRasterizerState = (ID3D11RasterizerState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papRasterizerState[0]));
4389 AssertBreakStmt(pBackendDXContext->papRasterizerState, rc = VERR_NO_MEMORY);
4390 pBackendDXContext->cRasterizerState = cEntries;
4391 }
4392 break;
4393 case SVGA_COTABLE_SAMPLER:
4394 if (pBackendDXContext->papSamplerState)
4395 {
4396 DX_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
4397 RTMemFree(pBackendDXContext->papSamplerState);
4398 pBackendDXContext->papSamplerState = NULL;
4399 pBackendDXContext->cSamplerState = 0;
4400 }
4401
4402 if (cEntries)
4403 {
4404 pBackendDXContext->papSamplerState = (ID3D11SamplerState **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papSamplerState[0]));
4405 AssertBreakStmt(pBackendDXContext->papSamplerState, rc = VERR_NO_MEMORY);
4406 pBackendDXContext->cSamplerState = cEntries;
4407 }
4408 break;
4409 case SVGA_COTABLE_STREAMOUTPUT:
4410 //AssertFailed(); /** @todo Implement */
4411 break;
4412 case SVGA_COTABLE_DXQUERY:
4413 if (pBackendDXContext->papQuery)
4414 {
4415 DX_RELEASE_ARRAY(pBackendDXContext->cQuery, pBackendDXContext->papQuery);
4416 RTMemFree(pBackendDXContext->papQuery);
4417 pBackendDXContext->papQuery = NULL;
4418 pBackendDXContext->cQuery = 0;
4419 }
4420
4421 if (cEntries)
4422 {
4423 pBackendDXContext->papQuery = (ID3D11Query **)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->papQuery[0]));
4424 AssertBreakStmt(pBackendDXContext->papQuery, rc = VERR_NO_MEMORY);
4425 pBackendDXContext->cQuery = cEntries;
4426 }
4427 break;
4428 case SVGA_COTABLE_DXSHADER:
4429 if (pBackendDXContext->paShader)
4430 {
4431 for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
4432 D3D_RELEASE(pBackendDXContext->paShader[i].pShader);
4433 RTMemFree(pBackendDXContext->paShader);
4434 pBackendDXContext->paShader = NULL;
4435 pBackendDXContext->cShader = 0;
4436 }
4437
4438 if (cEntries)
4439 {
4440 pBackendDXContext->paShader = (DXSHADER *)RTMemAllocZ(cEntries * sizeof(pBackendDXContext->paShader[0]));
4441 AssertBreakStmt(pBackendDXContext->paShader, rc = VERR_NO_MEMORY);
4442 pBackendDXContext->cShader = cEntries;
4443 }
4444 break;
4445 case SVGA_COTABLE_UAVIEW:
4446 AssertFailed(); /** @todo Implement */
4447 break;
4448 case SVGA_COTABLE_MAX: break; /* Compiler warning */
4449 }
4450 return rc;
4451}
4452
4453
4454static DECLCALLBACK(int) vmsvga3dBackDXReadbackCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4455{
4456 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4457
4458 RT_NOREF(pBackend, pDXContext);
4459 AssertFailed(); /** @todo Implement */
4460 return VERR_NOT_IMPLEMENTED;
4461}
4462
4463
4464static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4465{
4466 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4467
4468 RT_NOREF(pBackend, pDXContext);
4469 AssertFailed(); /** @todo Implement */
4470 return VERR_NOT_IMPLEMENTED;
4471}
4472
4473
4474static DECLCALLBACK(int) vmsvga3dBackDXTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4475{
4476 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4477
4478 RT_NOREF(pBackend, pDXContext);
4479 AssertFailed(); /** @todo Implement */
4480 return VERR_NOT_IMPLEMENTED;
4481}
4482
4483
4484static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4485{
4486 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4487
4488 RT_NOREF(pBackend, pDXContext);
4489 AssertFailed(); /** @todo Implement */
4490 return VERR_NOT_IMPLEMENTED;
4491}
4492
4493
4494static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4495{
4496 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4497
4498 RT_NOREF(pBackend, pDXContext);
4499 AssertFailed(); /** @todo Implement */
4500 return VERR_NOT_IMPLEMENTED;
4501}
4502
4503
4504static DECLCALLBACK(int) vmsvga3dBackDXBindAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4505{
4506 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4507
4508 RT_NOREF(pBackend, pDXContext);
4509 AssertFailed(); /** @todo Implement */
4510 return VERR_NOT_IMPLEMENTED;
4511}
4512
4513
4514static DECLCALLBACK(int) vmsvga3dBackDXReadbackAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4515{
4516 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4517
4518 RT_NOREF(pBackend, pDXContext);
4519 AssertFailed(); /** @todo Implement */
4520 return VERR_NOT_IMPLEMENTED;
4521}
4522
4523
4524static DECLCALLBACK(int) vmsvga3dBackDXPredTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4525{
4526 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4527
4528 RT_NOREF(pBackend, pDXContext);
4529 AssertFailed(); /** @todo Implement */
4530 return VERR_NOT_IMPLEMENTED;
4531}
4532
4533
4534static DECLCALLBACK(int) vmsvga3dBackDXMobFence64(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4535{
4536 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4537
4538 RT_NOREF(pBackend, pDXContext);
4539 AssertFailed(); /** @todo Implement */
4540 return VERR_NOT_IMPLEMENTED;
4541}
4542
4543
4544static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4545{
4546 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4547
4548 RT_NOREF(pBackend, pDXContext);
4549 AssertFailed(); /** @todo Implement */
4550 return VERR_NOT_IMPLEMENTED;
4551}
4552
4553
4554static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4555{
4556 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4557
4558 RT_NOREF(pBackend, pDXContext);
4559 AssertFailed(); /** @todo Implement */
4560 return VERR_NOT_IMPLEMENTED;
4561}
4562
4563
4564static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4565{
4566 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4567
4568 RT_NOREF(pBackend, pDXContext);
4569 AssertFailed(); /** @todo Implement */
4570 return VERR_NOT_IMPLEMENTED;
4571}
4572
4573
4574static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4575{
4576 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4577
4578 RT_NOREF(pBackend, pDXContext);
4579 AssertFailed(); /** @todo Implement */
4580 return VERR_NOT_IMPLEMENTED;
4581}
4582
4583
4584static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4585{
4586 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4587
4588 RT_NOREF(pBackend, pDXContext);
4589 AssertFailed(); /** @todo Implement */
4590 return VERR_NOT_IMPLEMENTED;
4591}
4592
4593
4594static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4595{
4596 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4597
4598 RT_NOREF(pBackend, pDXContext);
4599 AssertFailed(); /** @todo Implement */
4600 return VERR_NOT_IMPLEMENTED;
4601}
4602
4603
4604static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4605{
4606 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4607
4608 RT_NOREF(pBackend, pDXContext);
4609 AssertFailed(); /** @todo Implement */
4610 return VERR_NOT_IMPLEMENTED;
4611}
4612
4613
4614static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4615{
4616 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4617
4618 RT_NOREF(pBackend, pDXContext);
4619 AssertFailed(); /** @todo Implement */
4620 return VERR_NOT_IMPLEMENTED;
4621}
4622
4623
4624static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4625{
4626 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4627
4628 RT_NOREF(pBackend, pDXContext);
4629 AssertFailed(); /** @todo Implement */
4630 return VERR_NOT_IMPLEMENTED;
4631}
4632
4633
4634static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4635{
4636 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4637
4638 RT_NOREF(pBackend, pDXContext);
4639 AssertFailed(); /** @todo Implement */
4640 return VERR_NOT_IMPLEMENTED;
4641}
4642
4643
4644static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4645{
4646 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4647
4648 RT_NOREF(pBackend, pDXContext);
4649 AssertFailed(); /** @todo Implement */
4650 return VERR_NOT_IMPLEMENTED;
4651}
4652
4653
4654static DECLCALLBACK(int) vmsvga3dBackGrowOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4655{
4656 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4657
4658 RT_NOREF(pBackend, pDXContext);
4659 AssertFailed(); /** @todo Implement */
4660 return VERR_NOT_IMPLEMENTED;
4661}
4662
4663
4664static DECLCALLBACK(int) vmsvga3dBackDXGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4665{
4666 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4667
4668 RT_NOREF(pBackend, pDXContext);
4669 AssertFailed(); /** @todo Implement */
4670 return VERR_NOT_IMPLEMENTED;
4671}
4672
4673
4674static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4675{
4676 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4677
4678 RT_NOREF(pBackend, pDXContext);
4679 AssertFailed(); /** @todo Implement */
4680 return VERR_NOT_IMPLEMENTED;
4681}
4682
4683
4684static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v3(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4685{
4686 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4687
4688 RT_NOREF(pBackend, pDXContext);
4689 AssertFailed(); /** @todo Implement */
4690 return VERR_NOT_IMPLEMENTED;
4691}
4692
4693
4694static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4695{
4696 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4697
4698 RT_NOREF(pBackend, pDXContext);
4699 AssertFailed(); /** @todo Implement */
4700 return VERR_NOT_IMPLEMENTED;
4701}
4702
4703
4704static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4705{
4706 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4707
4708 RT_NOREF(pBackend, pDXContext);
4709 AssertFailed(); /** @todo Implement */
4710 return VERR_NOT_IMPLEMENTED;
4711}
4712
4713
4714static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4715{
4716 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4717
4718 RT_NOREF(pBackend, pDXContext);
4719 AssertFailed(); /** @todo Implement */
4720 return VERR_NOT_IMPLEMENTED;
4721}
4722
4723
4724static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4725{
4726 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4727
4728 RT_NOREF(pBackend, pDXContext);
4729 AssertFailed(); /** @todo Implement */
4730 return VERR_NOT_IMPLEMENTED;
4731}
4732
4733
4734static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4735{
4736 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4737
4738 RT_NOREF(pBackend, pDXContext);
4739 AssertFailed(); /** @todo Implement */
4740 return VERR_NOT_IMPLEMENTED;
4741}
4742
4743
4744static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4745{
4746 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4747
4748 RT_NOREF(pBackend, pDXContext);
4749 AssertFailed(); /** @todo Implement */
4750 return VERR_NOT_IMPLEMENTED;
4751}
4752
4753
4754static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4755{
4756 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4757
4758 RT_NOREF(pBackend, pDXContext);
4759 AssertFailed(); /** @todo Implement */
4760 return VERR_NOT_IMPLEMENTED;
4761}
4762
4763
4764static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4765{
4766 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4767
4768 RT_NOREF(pBackend, pDXContext);
4769 AssertFailed(); /** @todo Implement */
4770 return VERR_NOT_IMPLEMENTED;
4771}
4772
4773
4774static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4775{
4776 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4777
4778 RT_NOREF(pBackend, pDXContext);
4779 AssertFailed(); /** @todo Implement */
4780 return VERR_NOT_IMPLEMENTED;
4781}
4782
4783
4784static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4785{
4786 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4787
4788 RT_NOREF(pBackend, pDXContext);
4789 AssertFailed(); /** @todo Implement */
4790 return VERR_NOT_IMPLEMENTED;
4791}
4792
4793
4794static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4795{
4796 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4797
4798 RT_NOREF(pBackend, pDXContext);
4799 AssertFailed(); /** @todo Implement */
4800 return VERR_NOT_IMPLEMENTED;
4801}
4802
4803
4804static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4805{
4806 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4807
4808 RT_NOREF(pBackend, pDXContext);
4809 AssertFailed(); /** @todo Implement */
4810 return VERR_NOT_IMPLEMENTED;
4811}
4812
4813
4814static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4815{
4816 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4817
4818 RT_NOREF(pBackend, pDXContext);
4819 AssertFailed(); /** @todo Implement */
4820 return VERR_NOT_IMPLEMENTED;
4821}
4822
4823
4824static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4825{
4826 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4827
4828 RT_NOREF(pBackend, pDXContext);
4829 AssertFailed(); /** @todo Implement */
4830 return VERR_NOT_IMPLEMENTED;
4831}
4832
4833
4834static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4835{
4836 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4837
4838 RT_NOREF(pBackend, pDXContext);
4839 AssertFailed(); /** @todo Implement */
4840 return VERR_NOT_IMPLEMENTED;
4841}
4842
4843
4844static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4845{
4846 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4847
4848 RT_NOREF(pBackend, pDXContext);
4849 AssertFailed(); /** @todo Implement */
4850 return VERR_NOT_IMPLEMENTED;
4851}
4852
4853
4854static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4855{
4856 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4857
4858 RT_NOREF(pBackend, pDXContext);
4859 AssertFailed(); /** @todo Implement */
4860 return VERR_NOT_IMPLEMENTED;
4861}
4862
4863
4864static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4865{
4866 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4867
4868 RT_NOREF(pBackend, pDXContext);
4869 AssertFailed(); /** @todo Implement */
4870 return VERR_NOT_IMPLEMENTED;
4871}
4872
4873
4874static DECLCALLBACK(int) vmsvga3dBackDXSetStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4875{
4876 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4877
4878 RT_NOREF(pBackend, pDXContext);
4879 AssertFailed(); /** @todo Implement */
4880 return VERR_NOT_IMPLEMENTED;
4881}
4882
4883
4884static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4885{
4886 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4887
4888 RT_NOREF(pBackend, pDXContext);
4889 AssertFailed(); /** @todo Implement */
4890 return VERR_NOT_IMPLEMENTED;
4891}
4892
4893
4894static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4895{
4896 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4897
4898 RT_NOREF(pBackend, pDXContext);
4899 AssertFailed(); /** @todo Implement */
4900 return VERR_NOT_IMPLEMENTED;
4901}
4902
4903
4904static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4905{
4906 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4907
4908 RT_NOREF(pBackend, pDXContext);
4909 AssertFailed(); /** @todo Implement */
4910 return VERR_NOT_IMPLEMENTED;
4911}
4912
4913
4914static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4915{
4916 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4917
4918 RT_NOREF(pBackend, pDXContext);
4919 AssertFailed(); /** @todo Implement */
4920 return VERR_NOT_IMPLEMENTED;
4921}
4922
4923
4924static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4925{
4926 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4927
4928 RT_NOREF(pBackend, pDXContext);
4929 AssertFailed(); /** @todo Implement */
4930 return VERR_NOT_IMPLEMENTED;
4931}
4932
4933
4934static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4935{
4936 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4937
4938 RT_NOREF(pBackend, pDXContext);
4939 AssertFailed(); /** @todo Implement */
4940 return VERR_NOT_IMPLEMENTED;
4941}
4942
4943
4944static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v4(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4945{
4946 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4947
4948 RT_NOREF(pBackend, pDXContext);
4949 AssertFailed(); /** @todo Implement */
4950 return VERR_NOT_IMPLEMENTED;
4951}
4952
4953
4954static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4955{
4956 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4957
4958 RT_NOREF(pBackend, pDXContext);
4959 AssertFailed(); /** @todo Implement */
4960 return VERR_NOT_IMPLEMENTED;
4961}
4962
4963
4964static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4965{
4966 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4967
4968 RT_NOREF(pBackend, pDXContext);
4969 AssertFailed(); /** @todo Implement */
4970 return VERR_NOT_IMPLEMENTED;
4971}
4972
4973
4974static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView_v2(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4975{
4976 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4977
4978 RT_NOREF(pBackend, pDXContext);
4979 AssertFailed(); /** @todo Implement */
4980 return VERR_NOT_IMPLEMENTED;
4981}
4982
4983
4984static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4985{
4986 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4987
4988 RT_NOREF(pBackend, pDXContext);
4989 AssertFailed(); /** @todo Implement */
4990 return VERR_NOT_IMPLEMENTED;
4991}
4992
4993
4994static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4995{
4996 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4997
4998 RT_NOREF(pBackend, pDXContext);
4999 AssertFailed(); /** @todo Implement */
5000 return VERR_NOT_IMPLEMENTED;
5001}
5002
5003
5004static DECLCALLBACK(int) vmsvga3dBackDXBindStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5005{
5006 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5007
5008 RT_NOREF(pBackend, pDXContext);
5009 AssertFailed(); /** @todo Implement */
5010 return VERR_NOT_IMPLEMENTED;
5011}
5012
5013
5014static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5015{
5016 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5017
5018 RT_NOREF(pBackend, pDXContext);
5019 AssertFailed(); /** @todo Implement */
5020 return VERR_NOT_IMPLEMENTED;
5021}
5022
5023
5024static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5025{
5026 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5027
5028 RT_NOREF(pBackend, pDXContext);
5029 AssertFailed(); /** @todo Implement */
5030 return VERR_NOT_IMPLEMENTED;
5031}
5032
5033
5034int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
5035{
5036 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
5037 AssertReturn(p3dState, VERR_NOT_SUPPORTED);
5038
5039 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5040 AssertReturn(pBackend, VERR_NOT_SUPPORTED);
5041
5042 if (pvInterfaceFuncs)
5043 RT_BZERO(pvInterfaceFuncs, cbInterfaceFuncs);
5044
5045 int rc = VINF_SUCCESS;
5046 if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
5047 {
5048 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
5049 {
5050 if (pvInterfaceFuncs)
5051 {
5052 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs;
5053 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
5054 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
5055 p->pfnDXBindContext = vmsvga3dBackDXBindContext;
5056 p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
5057 p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
5058 p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
5059 p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
5060 p->pfnDXSetShader = vmsvga3dBackDXSetShader;
5061 p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
5062 p->pfnDXDraw = vmsvga3dBackDXDraw;
5063 p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
5064 p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
5065 p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
5066 p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
5067 p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
5068 p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
5069 p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
5070 p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
5071 p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
5072 p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
5073 p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
5074 p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
5075 p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
5076 p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
5077 p->pfnDXBindQuery = vmsvga3dBackDXBindQuery;
5078 p->pfnDXSetQueryOffset = vmsvga3dBackDXSetQueryOffset;
5079 p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
5080 p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
5081 p->pfnDXReadbackQuery = vmsvga3dBackDXReadbackQuery;
5082 p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
5083 p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
5084 p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
5085 p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
5086 p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
5087 p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
5088 p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
5089 p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
5090 p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
5091 p->pfnDXGenMips = vmsvga3dBackDXGenMips;
5092 p->pfnDXUpdateSubResource = vmsvga3dBackDXUpdateSubResource;
5093 p->pfnDXReadbackSubResource = vmsvga3dBackDXReadbackSubResource;
5094 p->pfnDXInvalidateSubResource = vmsvga3dBackDXInvalidateSubResource;
5095 p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
5096 p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
5097 p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
5098 p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
5099 p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
5100 p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
5101 p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
5102 p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
5103 p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
5104 p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
5105 p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
5106 p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
5107 p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
5108 p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
5109 p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
5110 p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
5111 p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
5112 p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
5113 p->pfnDXBindShader = vmsvga3dBackDXBindShader;
5114 p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
5115 p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
5116 p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
5117 p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
5118 p->pfnDXReadbackCOTable = vmsvga3dBackDXReadbackCOTable;
5119 p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
5120 p->pfnDXTransferFromBuffer = vmsvga3dBackDXTransferFromBuffer;
5121 p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
5122 p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
5123 p->pfnDXBindAllQuery = vmsvga3dBackDXBindAllQuery;
5124 p->pfnDXReadbackAllQuery = vmsvga3dBackDXReadbackAllQuery;
5125 p->pfnDXPredTransferFromBuffer = vmsvga3dBackDXPredTransferFromBuffer;
5126 p->pfnDXMobFence64 = vmsvga3dBackDXMobFence64;
5127 p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
5128 p->pfnDXHint = vmsvga3dBackDXHint;
5129 p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
5130 p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
5131 p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
5132 p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
5133 p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
5134 p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
5135 p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
5136 p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
5137 p->pfnScreenCopy = vmsvga3dBackScreenCopy;
5138 p->pfnGrowOTable = vmsvga3dBackGrowOTable;
5139 p->pfnDXGrowCOTable = vmsvga3dBackDXGrowCOTable;
5140 p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
5141 p->pfnDefineGBSurface_v3 = vmsvga3dBackDefineGBSurface_v3;
5142 p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
5143 p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
5144 p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
5145 p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
5146 p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
5147 p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
5148 p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
5149 p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
5150 p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
5151 p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
5152 p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
5153 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
5154 p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
5155 p->pfnDXDispatch = vmsvga3dBackDXDispatch;
5156 p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
5157 p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
5158 p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
5159 p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
5160 p->pfnDXSetStructureCount = vmsvga3dBackDXSetStructureCount;
5161 p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
5162 p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
5163 p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
5164 p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
5165 p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
5166 p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
5167 p->pfnDefineGBSurface_v4 = vmsvga3dBackDefineGBSurface_v4;
5168 p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
5169 p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
5170 p->pfnDXDefineDepthStencilView_v2 = vmsvga3dBackDXDefineDepthStencilView_v2;
5171 p->pfnDXDefineStreamOutputWithMob = vmsvga3dBackDXDefineStreamOutputWithMob;
5172 p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
5173 p->pfnDXBindStreamOutput = vmsvga3dBackDXBindStreamOutput;
5174 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
5175 p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
5176 }
5177 }
5178 else
5179 {
5180 AssertFailed();
5181 rc = VERR_INVALID_PARAMETER;
5182 }
5183 }
5184 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
5185 {
5186 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
5187 {
5188 if (pvInterfaceFuncs)
5189 {
5190 VMSVGA3DBACKENDFUNCSMAP *p = (VMSVGA3DBACKENDFUNCSMAP *)pvInterfaceFuncs;
5191 p->pfnSurfaceMap = vmsvga3dSurfaceMap;
5192 p->pfnSurfaceUnmap = vmsvga3dSurfaceUnmap;
5193 }
5194 }
5195 else
5196 {
5197 AssertFailed();
5198 rc = VERR_INVALID_PARAMETER;
5199 }
5200 }
5201 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
5202 {
5203 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
5204 {
5205 if (pvInterfaceFuncs)
5206 {
5207 VMSVGA3DBACKENDFUNCSGBO *p = (VMSVGA3DBACKENDFUNCSGBO *)pvInterfaceFuncs;
5208 p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
5209 p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
5210 }
5211 }
5212 else
5213 {
5214 AssertFailed();
5215 rc = VERR_INVALID_PARAMETER;
5216 }
5217 }
5218 else
5219 rc = VERR_NOT_IMPLEMENTED;
5220 return rc;
5221}
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