VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 95288

Last change on this file since 95288 was 95232, checked in by vboxsync, 2 years ago

Devices/Graphics: track constant, vertex, index buffers; clear resource view entriee when surface is deleted (doxygen fix). bugref:9830
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1/* $Id: DevVGA-SVGA3d-win-dx.cpp 95232 2022-06-08 15:34:49Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/log.h>
25#include <VBox/vmm/pdmdev.h>
26#include <VBox/vmm/pgm.h>
27
28#include <iprt/assert.h>
29#include <iprt/avl.h>
30#include <iprt/errcore.h>
31#include <iprt/mem.h>
32
33#include <VBoxVideo.h> /* required by DevVGA.h */
34#include <VBoxVideo3D.h>
35
36/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
37#include "DevVGA.h"
38
39#include "DevVGA-SVGA.h"
40#include "DevVGA-SVGA3d.h"
41#include "DevVGA-SVGA3d-internal.h"
42#include "DevVGA-SVGA3d-dx-shader.h"
43
44/* d3d11_1.h has a structure field named 'Status' but Status is defined as int on Linux host */
45#if defined(Status)
46#undef Status
47#endif
48#include <d3d11_1.h>
49
50
51#ifdef RT_OS_WINDOWS
52# define VBOX_D3D11_LIBRARY_NAME "d3d11"
53#else
54# define VBOX_D3D11_LIBRARY_NAME "VBoxDxVk"
55#endif
56
57#define DX_FORCE_SINGLE_DEVICE
58
59/* This is not available on non Windows hosts. */
60#ifndef D3D_RELEASE
61# define D3D_RELEASE(a_Ptr) do { if ((a_Ptr)) (a_Ptr)->Release(); (a_Ptr) = NULL; } while (0)
62#endif
63
64/** Fake ID for the backend DX context. The context creates all shared textures. */
65#define DX_CID_BACKEND UINT32_C(0xfffffffe)
66
67#define D3D_RELEASE_ARRAY(a_Count, a_papArray) do { \
68 for (uint32_t i = 0; i < (a_Count); ++i) \
69 D3D_RELEASE((a_papArray)[i]); \
70} while (0)
71
72typedef struct D3D11BLITTER
73{
74 ID3D11Device *pDevice;
75 ID3D11DeviceContext *pImmediateContext;
76
77 ID3D11VertexShader *pVertexShader;
78 ID3D11PixelShader *pPixelShader;
79 ID3D11SamplerState *pSamplerState;
80 ID3D11RasterizerState *pRasterizerState;
81 ID3D11BlendState *pBlendState;
82} D3D11BLITTER;
83
84typedef struct DXDEVICE
85{
86 ID3D11Device1 *pDevice; /* Device. */
87 ID3D11DeviceContext1 *pImmediateContext; /* Corresponding context. */
88 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
89 D3D_FEATURE_LEVEL FeatureLevel;
90
91 /* Staging buffer for transfer to surface buffers. */
92 ID3D11Buffer *pStagingBuffer; /* The staging buffer resource. */
93 uint32_t cbStagingBuffer; /* Current size of the staging buffer resource. */
94
95 D3D11BLITTER Blitter; /* Blits one texture to another. */
96} DXDEVICE;
97
98/* Kind of a texture view. */
99typedef enum VMSVGA3DBACKVIEWTYPE
100{
101 VMSVGA3D_VIEWTYPE_NONE = 0,
102 VMSVGA3D_VIEWTYPE_RENDERTARGET = 1,
103 VMSVGA3D_VIEWTYPE_DEPTHSTENCIL = 2,
104 VMSVGA3D_VIEWTYPE_SHADERRESOURCE = 3,
105 VMSVGA3D_VIEWTYPE_UNORDEREDACCESS = 4
106} VMSVGA3DBACKVIEWTYPE;
107
108/* Information about a texture view to track all created views:.
109 * when a surface is invalidated, then all views must deleted;
110 * when a view is deleted, then the view must be unlinked from the surface.
111 */
112typedef struct DXVIEWINFO
113{
114 uint32_t sid; /* Surface which the view was created for. */
115 uint32_t cid; /* DX context which created the view. */
116 uint32_t viewId; /* View id assigned by the guest. */
117 VMSVGA3DBACKVIEWTYPE enmViewType;
118} DXVIEWINFO;
119
120/* Context Object Table element for a texture view. */
121typedef struct DXVIEW
122{
123 uint32_t cid; /* DX context which created the view. */
124 uint32_t sid; /* Surface which the view was created for. */
125 uint32_t viewId; /* View id assigned by the guest. */
126 VMSVGA3DBACKVIEWTYPE enmViewType;
127
128 union
129 {
130 ID3D11View *pView; /* The view object. */
131 ID3D11RenderTargetView *pRenderTargetView;
132 ID3D11DepthStencilView *pDepthStencilView;
133 ID3D11ShaderResourceView *pShaderResourceView;
134 ID3D11UnorderedAccessView *pUnorderedAccessView;
135 } u;
136
137 RTLISTNODE nodeSurfaceView; /* Views are linked to the surface. */
138} DXVIEW;
139
140/* What kind of resource has been created for the VMSVGA3D surface. */
141typedef enum VMSVGA3DBACKRESTYPE
142{
143 VMSVGA3D_RESTYPE_NONE = 0,
144 VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
145 VMSVGA3D_RESTYPE_TEXTURE_1D = 2,
146 VMSVGA3D_RESTYPE_TEXTURE_2D = 3,
147 VMSVGA3D_RESTYPE_TEXTURE_CUBE = 4,
148 VMSVGA3D_RESTYPE_TEXTURE_3D = 5,
149 VMSVGA3D_RESTYPE_BUFFER = 6,
150} VMSVGA3DBACKRESTYPE;
151
152typedef struct VMSVGA3DBACKENDSURFACE
153{
154 VMSVGA3DBACKRESTYPE enmResType;
155 DXGI_FORMAT enmDxgiFormat;
156 union
157 {
158 ID3D11Resource *pResource;
159 ID3D11Texture1D *pTexture1D;
160 ID3D11Texture2D *pTexture2D;
161 ID3D11Texture3D *pTexture3D;
162 ID3D11Buffer *pBuffer;
163 } u;
164
165 /* For updates from memory. */
166 union /** @todo One per format. */
167 {
168 ID3D11Resource *pResource;
169 ID3D11Texture1D *pTexture1D;
170 ID3D11Texture2D *pTexture2D;
171 ID3D11Texture3D *pTexture3D;
172 } dynamic;
173
174 /* For reading the texture content. */
175 union /** @todo One per format. */
176 {
177 ID3D11Resource *pResource;
178 ID3D11Texture1D *pTexture1D;
179 ID3D11Texture2D *pTexture2D;
180 ID3D11Texture3D *pTexture3D;
181 } staging;
182
183 /* Screen targets are created as shared surfaces. */
184 HANDLE SharedHandle; /* The shared handle of this structure. */
185
186 /* DX context which last rendered to the texture.
187 * This is only for render targets and screen targets, which can be shared between contexts.
188 * The backend context (cid == DX_CID_BACKEND) can also be a drawing context.
189 */
190 uint32_t cidDrawing;
191
192 /** AVL tree containing DXSHAREDTEXTURE structures. */
193 AVLU32TREE SharedTextureTree;
194
195 /* Render target views, depth stencil views and shader resource views created for this texture or buffer. */
196 RTLISTANCHOR listView; /* DXVIEW */
197
198} VMSVGA3DBACKENDSURFACE;
199
200/* "The only resources that can be shared are 2D non-mipmapped textures." */
201typedef struct DXSHAREDTEXTURE
202{
203 AVLU32NODECORE Core; /* Key is context id which opened this texture. */
204 ID3D11Texture2D *pTexture; /* The opened shared texture. */
205 uint32_t sid; /* Surface id. */
206} DXSHAREDTEXTURE;
207
208
209typedef struct VMSVGAHWSCREEN
210{
211 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
212 IDXGIResource *pDxgiResource; /* Interface of the texture. */
213 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
214 HANDLE SharedHandle; /* The shared handle of this structure. */
215 uint32_t sidScreenTarget; /* The source surface for this screen. */
216} VMSVGAHWSCREEN;
217
218
219typedef struct DXELEMENTLAYOUT
220{
221 ID3D11InputLayout *pElementLayout;
222 uint32_t cElementDesc;
223 D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
224} DXELEMENTLAYOUT;
225
226typedef struct DXSHADER
227{
228 SVGA3dShaderType enmShaderType;
229 union
230 {
231 ID3D11DeviceChild *pShader; /* All. */
232 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */
233 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */
234 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */
235 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */
236 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */
237 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */
238 };
239 void *pvDXBC;
240 uint32_t cbDXBC;
241
242 uint32_t soid; /* Stream output declarations for geometry shaders. */
243
244 DXShaderInfo shaderInfo;
245} DXSHADER;
246
247typedef struct DXQUERY
248{
249 union
250 {
251 ID3D11Query *pQuery;
252 ID3D11Predicate *pPredicate;
253 };
254} DXQUERY;
255
256typedef struct DXSTREAMOUTPUT
257{
258 UINT cDeclarationEntry;
259 D3D11_SO_DECLARATION_ENTRY aDeclarationEntry[SVGA3D_MAX_STREAMOUT_DECLS];
260} DXSTREAMOUTPUT;
261
262typedef struct DXBOUNDVERTEXBUFFER
263{
264 ID3D11Buffer *pBuffer;
265 uint32_t stride;
266 uint32_t offset;
267} DXBOUNDVERTEXBUFFER;
268
269typedef struct DXBOUNDINDEXBUFFER
270{
271 ID3D11Buffer *pBuffer;
272 DXGI_FORMAT indexBufferFormat;
273 uint32_t indexBufferOffset;
274} DXBOUNDINDEXBUFFER;
275
276typedef struct DXBOUNDRESOURCES /* Currently bound resources. Mirror SVGADXContextMobFormat structure. */
277{
278 struct
279 {
280 DXBOUNDVERTEXBUFFER vertexBuffers[SVGA3D_DX_MAX_VERTEXBUFFERS];
281 DXBOUNDINDEXBUFFER indexBuffer;
282 } inputAssembly;
283 struct
284 {
285 ID3D11Buffer *constantBuffers[SVGA3D_DX_MAX_CONSTBUFFERS];
286 } shaderState[SVGA3D_NUM_SHADERTYPE];
287} DXBOUNDRESOURCES;
288
289
290typedef struct VMSVGA3DBACKENDDXCONTEXT
291{
292 DXDEVICE dxDevice; /* DX device interfaces for this context operations. */
293
294 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
295 uint32_t cBlendState; /* Number of entries in the papBlendState array. */
296 uint32_t cDepthStencilState; /* papDepthStencilState */
297 uint32_t cSamplerState; /* papSamplerState */
298 uint32_t cRasterizerState; /* papRasterizerState */
299 uint32_t cElementLayout; /* paElementLayout */
300 uint32_t cRenderTargetView; /* paRenderTargetView */
301 uint32_t cDepthStencilView; /* paDepthStencilView */
302 uint32_t cShaderResourceView; /* paShaderResourceView */
303 uint32_t cQuery; /* paQuery */
304 uint32_t cShader; /* paShader */
305 uint32_t cStreamOutput; /* paStreamOutput */
306 uint32_t cUnorderedAccessView; /* paUnorderedAccessView */
307 ID3D11BlendState **papBlendState;
308 ID3D11DepthStencilState **papDepthStencilState;
309 ID3D11SamplerState **papSamplerState;
310 ID3D11RasterizerState **papRasterizerState;
311 DXELEMENTLAYOUT *paElementLayout;
312 DXVIEW *paRenderTargetView;
313 DXVIEW *paDepthStencilView;
314 DXVIEW *paShaderResourceView;
315 DXQUERY *paQuery;
316 DXSHADER *paShader;
317 DXSTREAMOUTPUT *paStreamOutput;
318 DXVIEW *paUnorderedAccessView;
319
320 uint32_t cSOTarget; /* How many SO targets are currently set (SetSOTargets) */
321
322 DXBOUNDRESOURCES resources;
323} VMSVGA3DBACKENDDXCONTEXT;
324
325/* Shader disassembler function. Optional. */
326typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
327typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
328
329typedef struct VMSVGA3DBACKEND
330{
331 RTLDRMOD hD3D11;
332 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
333
334 RTLDRMOD hD3DCompiler;
335 PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
336
337 DXDEVICE dxDevice; /* Device for the VMSVGA3D context independent operation. */
338
339 DXBOUNDRESOURCES resources; /* What is currently applied to the pipeline. */
340
341 bool fSingleDevice; /* Whether to use one DX device for all guest contexts. */
342
343 /** @todo Here a set of functions which do different job in single and multiple device modes. */
344} VMSVGA3DBACKEND;
345
346
347/* Static function prototypes. */
348static int dxDeviceFlush(DXDEVICE *pDevice);
349static int dxDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry);
350static int dxDefineUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry);
351static int dxDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry);
352static int dxDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry);
353static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
354static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
355static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface);
356static int dxDestroyShader(DXSHADER *pDXShader);
357static int dxDestroyQuery(DXQUERY *pDXQuery);
358
359static HRESULT BlitInit(D3D11BLITTER *pBlitter, ID3D11Device *pDevice, ID3D11DeviceContext *pImmediateContext);
360static void BlitRelease(D3D11BLITTER *pBlitter);
361
362
363/* This is not available with the DXVK headers for some reason. */
364#ifndef RT_OS_WINDOWS
365typedef enum D3D11_TEXTURECUBE_FACE {
366 D3D11_TEXTURECUBE_FACE_POSITIVE_X,
367 D3D11_TEXTURECUBE_FACE_NEGATIVE_X,
368 D3D11_TEXTURECUBE_FACE_POSITIVE_Y,
369 D3D11_TEXTURECUBE_FACE_NEGATIVE_Y,
370 D3D11_TEXTURECUBE_FACE_POSITIVE_Z,
371 D3D11_TEXTURECUBE_FACE_NEGATIVE_Z
372} D3D11_TEXTURECUBE_FACE;
373#endif
374
375
376DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace)
377{
378 D3D11_TEXTURECUBE_FACE Face;
379 switch (iFace)
380 {
381 case 0: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_X; break;
382 case 1: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_X; break;
383 case 2: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Y; break;
384 case 3: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Y; break;
385 case 4: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Z; break;
386 default:
387 case 5: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Z; break;
388 }
389 return Face;
390}
391
392/* This is to workaround issues with X8 formats, because they can't be used in some operations. */
393#define DX_REPLACE_X8_WITH_A8
394static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
395{
396 /* Ensure that correct headers are used.
397 * SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
398 */
399 AssertCompile(SVGA3D_AYUV == 152);
400
401#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
402 /** @todo More formats. */
403 switch (format)
404 {
405#ifdef DX_REPLACE_X8_WITH_A8
406 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
407#else
408 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
409#endif
410 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
411 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
412 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
413 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
414 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
415 case SVGA3D_Z_D32: break;
416 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
417 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
418 case SVGA3D_Z_D15S1: break;
419 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
420 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
421 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
422 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
423 case SVGA3D_DXT1: return DXGI_FORMAT_;
424 case SVGA3D_DXT2: return DXGI_FORMAT_;
425 case SVGA3D_DXT3: return DXGI_FORMAT_;
426 case SVGA3D_DXT4: return DXGI_FORMAT_;
427 case SVGA3D_DXT5: return DXGI_FORMAT_;
428 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
429 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
430 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
431 case SVGA3D_FORMAT_DEAD1: break;
432 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
433 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
434 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
435 case SVGA3D_V8U8: return DXGI_FORMAT_;
436 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
437 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
438 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
439 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
440 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
441 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
442 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
443 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
444 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
445 case SVGA3D_BUFFER: return DXGI_FORMAT_;
446 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
447 case SVGA3D_V16U16: return DXGI_FORMAT_;
448 case SVGA3D_G16R16: return DXGI_FORMAT_;
449 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
450 case SVGA3D_UYVY: return DXGI_FORMAT_;
451 case SVGA3D_YUY2: return DXGI_FORMAT_;
452 case SVGA3D_NV12: return DXGI_FORMAT_;
453 case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
454 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
455 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
456 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
457 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
458 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
459 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
460 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
461 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
462 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
463 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
464 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
465 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
466 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
467 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
468 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
469 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
470 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
471 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
472 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
473 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
474 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
475 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
476 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
477 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
478 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
479 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
480 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
481 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
482 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
483 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
484 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
485 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
486 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
487 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
488 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
489 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
490 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
491 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
492 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
493 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
494 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
495 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
496 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
497 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
498 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
499 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
500 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
501 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
502 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
503 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
504 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
505 case SVGA3D_P8: break;
506 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
507 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
508 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
509 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
510 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
511 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
512 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
513 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
514 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
515 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
516 case SVGA3D_ATI1: break;
517 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
518 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
519 case SVGA3D_ATI2: break;
520 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
521 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
522 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
523 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
524#ifdef DX_REPLACE_X8_WITH_A8
525 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
526 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
527#else
528 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
529 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
530#endif
531 case SVGA3D_Z_DF16: break;
532 case SVGA3D_Z_DF24: break;
533 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
534 case SVGA3D_YV12: break;
535 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
536 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
537 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
538 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
539 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
540 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
541 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
542 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
543 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
544 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
545 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
546 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
547 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
548 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
549 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
550 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
551 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
552 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
553 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
554 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
555#ifdef DX_REPLACE_X8_WITH_A8
556 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
557#else
558 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
559#endif
560 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
561 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
562
563 case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
564 case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_BC6H_TYPELESS;
565 case SVGA3D_BC6H_UF16: return DXGI_FORMAT_BC6H_UF16;
566 case SVGA3D_BC6H_SF16: return DXGI_FORMAT_BC6H_SF16;
567 case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_BC7_TYPELESS;
568 case SVGA3D_BC7_UNORM: return DXGI_FORMAT_BC7_UNORM;
569 case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_BC7_UNORM_SRGB;
570 case SVGA3D_AYUV: return DXGI_FORMAT_;
571
572 case SVGA3D_FORMAT_INVALID:
573 case SVGA3D_FORMAT_MAX: break;
574 }
575 // AssertFailed();
576 return DXGI_FORMAT_UNKNOWN;
577#undef DXGI_FORMAT_
578}
579
580
581static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
582{
583 switch (enmDevCap)
584 {
585 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
586 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
587 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
588 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
589 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
590 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
591 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
592 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
593 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
594 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
595 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
596 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
597 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
598 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
599 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
600 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
601 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
602 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
603 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
604 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
605 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
606 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
607 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
608 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
609 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
610 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
611 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
612 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
613 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
614 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
615 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
616 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
617 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
618 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
619 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
620 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
621 case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
622 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
623 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
624 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
625 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
626 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
627 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
628 default:
629 AssertFailed();
630 break;
631 }
632 return SVGA3D_FORMAT_INVALID;
633}
634
635
636static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
637{
638 switch (enmDevCap)
639 {
640 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
641 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
642 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
643 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
644 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
645 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
646 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
647 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
648 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
649 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
650 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
651 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
652 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
653 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
654 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
655 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
656 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
657 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
658 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
659 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
660 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
661 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
662 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
663 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
664 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
665 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
666 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
667 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
668 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
669 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
670 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
671 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
672 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
673 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
674 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
675 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
676 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
677 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
678 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
679 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
680 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
681 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
682 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
683 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
684 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
685 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
686 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
687 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
688 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
689 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
690 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
691 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
692 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
693 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
694 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
695 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
696 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
697 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
698 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
699 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
700 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
701 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
702 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
703 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
704 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
705 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
706 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
707 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
708 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
709 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
710 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
711 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
712 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
713 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
714 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
715 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
716 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
717 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
718 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
719 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
720 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
721 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
722 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
723 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
724 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
725 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
726 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
727 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
728 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
729 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
730 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
731 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
732 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
733 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
734 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
735 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
736 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
737 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
738 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
739 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
740 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
741 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
742 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
743 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
744 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
745 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
746 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
747 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
748 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
749 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
750 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
751 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
752 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
753 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
754 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
755 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
756 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
757 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
758 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
759 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
760 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
761 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
762 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
763 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
764 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
765 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
766 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
767 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
768 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
769 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
770 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
771 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
772 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
773 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
774 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
775 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
776 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
777 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
778 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
779 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
780 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
781 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
782 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
783 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
784 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
785 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
786 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
787 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
788 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
789 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
790 default:
791 AssertFailed();
792 break;
793 }
794 return SVGA3D_FORMAT_INVALID;
795}
796
797
798static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
799{
800 int rc = VINF_SUCCESS;
801
802 *pu32DevCap = 0;
803
804 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
805 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
806 {
807 RT_NOREF(pState);
808 /** @todo Implement */
809 }
810 else
811 rc = VERR_NOT_SUPPORTED;
812 return rc;
813}
814
815static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
816{
817 int rc = VINF_SUCCESS;
818
819 *pu32DevCap = 0;
820
821 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
822 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
823 {
824 ID3D11Device *pDevice = pState->pBackend->dxDevice.pDevice;
825 UINT FormatSupport = 0;
826 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
827 if (SUCCEEDED(hr))
828 {
829 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
830
831 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
832 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
833
834 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
835 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
836
837 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
838 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
839
840 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
841 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
842
843 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
844 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
845
846 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
847 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
848
849 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
850 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
851
852 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
853 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
854
855 UINT NumQualityLevels;
856 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
857 if (SUCCEEDED(hr) && NumQualityLevels != 0)
858 *pu32DevCap |= SVGA3D_DXFMT_MULTISAMPLE;
859 }
860 else
861 {
862 LogFunc(("CheckFormatSupport failed for 0x%08x, hr = 0x%08x\n", dxgiFormat, hr));
863 rc = VERR_NOT_SUPPORTED;
864 }
865 }
866 else
867 rc = VERR_NOT_SUPPORTED;
868 return rc;
869}
870
871
872static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDXDevice)
873{
874 int rc = VINF_SUCCESS;
875
876 if (pBackend->fSingleDevice && pBackend->dxDevice.pDevice)
877 {
878 pDXDevice->pDevice = pBackend->dxDevice.pDevice;
879 pDXDevice->pDevice->AddRef();
880
881 pDXDevice->pImmediateContext = pBackend->dxDevice.pImmediateContext;
882 pDXDevice->pImmediateContext->AddRef();
883
884 pDXDevice->pDxgiFactory = pBackend->dxDevice.pDxgiFactory;
885 pDXDevice->pDxgiFactory->AddRef();
886
887 pDXDevice->FeatureLevel = pBackend->dxDevice.FeatureLevel;
888
889 pDXDevice->pStagingBuffer = 0;
890 pDXDevice->cbStagingBuffer = 0;
891
892 BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
893 return rc;
894 }
895
896 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
897 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
898 {
899 D3D_FEATURE_LEVEL_11_1,
900 D3D_FEATURE_LEVEL_11_0
901 };
902 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
903#ifdef DEBUG
904 Flags |= D3D11_CREATE_DEVICE_DEBUG;
905#endif
906
907 ID3D11Device *pDevice = 0;
908 ID3D11DeviceContext *pImmediateContext = 0;
909 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
910 D3D_DRIVER_TYPE_HARDWARE,
911 NULL,
912 Flags,
913 s_aFeatureLevels,
914 RT_ELEMENTS(s_aFeatureLevels),
915 D3D11_SDK_VERSION,
916 &pDevice,
917 &pDXDevice->FeatureLevel,
918 &pImmediateContext);
919 if (SUCCEEDED(hr))
920 {
921 LogRel(("VMSVGA: Feature level %#x\n", pDXDevice->FeatureLevel));
922
923 hr = pDevice->QueryInterface(__uuidof(ID3D11Device1), (void**)&pDXDevice->pDevice);
924 AssertReturnStmt(SUCCEEDED(hr),
925 D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDevice),
926 VERR_NOT_SUPPORTED);
927
928 hr = pImmediateContext->QueryInterface(__uuidof(ID3D11DeviceContext1), (void**)&pDXDevice->pImmediateContext);
929 AssertReturnStmt(SUCCEEDED(hr),
930 D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDXDevice->pDevice); D3D_RELEASE(pDevice),
931 VERR_NOT_SUPPORTED);
932
933#ifdef DEBUG
934 /* Break into debugger when DX runtime detects anything unusual. */
935 HRESULT hr2;
936 ID3D11Debug *pDebug = 0;
937 hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
938 if (SUCCEEDED(hr2))
939 {
940 ID3D11InfoQueue *pInfoQueue = 0;
941 hr2 = pDebug->QueryInterface(__uuidof(ID3D11InfoQueue), (void**)&pInfoQueue);
942 if (SUCCEEDED(hr2))
943 {
944 pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_CORRUPTION, true);
945// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_ERROR, true);
946// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_WARNING, true);
947
948 /* No breakpoints for the following messages. */
949 D3D11_MESSAGE_ID saIgnoredMessageIds[] =
950 {
951 /* Message ID: Caused by: */
952 D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_TYPE_MISMATCH, /* Autogenerated input signatures. */
953 D3D11_MESSAGE_ID_LIVE_DEVICE, /* Live object report. Does not seem to prevent a breakpoint. */
954 (D3D11_MESSAGE_ID)3146081 /*DEVICE_DRAW_RENDERTARGETVIEW_NOT_SET*/, /* U. */
955 D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_NOT_SET, /* U. */
956 D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_MISMATCH, /* U. */
957 D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_EMPTY_LAYOUT, /* P. */
958 D3D11_MESSAGE_ID_DEVICE_SHADER_LINKAGE_REGISTERMASK, /* S. */
959 };
960
961 D3D11_INFO_QUEUE_FILTER filter;
962 RT_ZERO(filter);
963 filter.DenyList.NumIDs = RT_ELEMENTS(saIgnoredMessageIds);
964 filter.DenyList.pIDList = saIgnoredMessageIds;
965 pInfoQueue->AddStorageFilterEntries(&filter);
966
967 D3D_RELEASE(pInfoQueue);
968 }
969 D3D_RELEASE(pDebug);
970 }
971#endif
972
973 IDXGIDevice *pDxgiDevice = 0;
974 hr = pDXDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
975 if (SUCCEEDED(hr))
976 {
977 IDXGIAdapter *pDxgiAdapter = 0;
978 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
979 if (SUCCEEDED(hr))
980 {
981 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDXDevice->pDxgiFactory);
982 D3D_RELEASE(pDxgiAdapter);
983 }
984
985 D3D_RELEASE(pDxgiDevice);
986 }
987 }
988
989 if (SUCCEEDED(hr))
990 BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
991 else
992 rc = VERR_NOT_SUPPORTED;
993
994 return rc;
995}
996
997
998static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
999{
1000 RT_NOREF(pBackend);
1001
1002 BlitRelease(&pDevice->Blitter);
1003
1004 D3D_RELEASE(pDevice->pStagingBuffer);
1005
1006 D3D_RELEASE(pDevice->pDxgiFactory);
1007 D3D_RELEASE(pDevice->pImmediateContext);
1008
1009#ifdef DEBUG
1010 HRESULT hr2;
1011 ID3D11Debug *pDebug = 0;
1012 hr2 = pDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1013 if (SUCCEEDED(hr2))
1014 {
1015 /// @todo Use this to see whether all resources have been properly released.
1016 //DEBUG_BREAKPOINT_TEST();
1017 //pDebug->ReportLiveDeviceObjects(D3D11_RLDO_DETAIL | (D3D11_RLDO_FLAGS)0x4 /*D3D11_RLDO_IGNORE_INTERNAL*/);
1018 D3D_RELEASE(pDebug);
1019 }
1020#endif
1021
1022 D3D_RELEASE(pDevice->pDevice);
1023 RT_ZERO(*pDevice);
1024}
1025
1026
1027static void dxViewAddToList(PVGASTATECC pThisCC, DXVIEW *pDXView)
1028{
1029 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1030 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1031
1032 Assert(pDXView->u.pView); /* Only already created views should be added. Guard against mis-use by callers. */
1033
1034 PVMSVGA3DSURFACE pSurface;
1035 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDXView->sid, &pSurface);
1036 AssertRCReturnVoid(rc);
1037
1038 RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1039}
1040
1041
1042static void dxViewRemoveFromList(DXVIEW *pDXView)
1043{
1044 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1045 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1046 /* pView can be NULL, if COT entry is already empty. */
1047 if (pDXView->u.pView)
1048 {
1049 Assert(pDXView->nodeSurfaceView.pNext && pDXView->nodeSurfaceView.pPrev);
1050 RTListNodeRemove(&pDXView->nodeSurfaceView);
1051 }
1052}
1053
1054
1055static int dxViewDestroy(DXVIEW *pDXView)
1056{
1057 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1058 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1059 if (pDXView->u.pView)
1060 {
1061 D3D_RELEASE(pDXView->u.pView);
1062 RTListNodeRemove(&pDXView->nodeSurfaceView);
1063 RT_ZERO(*pDXView);
1064 }
1065
1066 return VINF_SUCCESS;
1067}
1068
1069
1070static int dxViewInit(DXVIEW *pDXView, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT *pDXContext, uint32_t viewId, VMSVGA3DBACKVIEWTYPE enmViewType, ID3D11View *pView)
1071{
1072 pDXView->cid = pDXContext->cid;
1073 pDXView->sid = pSurface->id;
1074 pDXView->viewId = viewId;
1075 pDXView->enmViewType = enmViewType;
1076 pDXView->u.pView = pView;
1077 RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1078
1079 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1080 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1081
1082DXVIEW *pIter, *pNext;
1083RTListForEachSafe(&pSurface->pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
1084{
1085 AssertPtr(pNext);
1086 LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
1087}
1088
1089 return VINF_SUCCESS;
1090}
1091
1092
1093DECLINLINE(bool) dxIsSurfaceShareable(PVMSVGA3DSURFACE pSurface)
1094{
1095 /* It is not expected that volume textures will be shared between contexts. */
1096 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_VOLUME)
1097 return false;
1098
1099 return (pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
1100 || (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET);
1101}
1102
1103
1104static DXDEVICE *dxDeviceFromCid(uint32_t cid, PVMSVGA3DSTATE pState)
1105{
1106 if (cid != DX_CID_BACKEND)
1107 {
1108 if (pState->pBackend->fSingleDevice)
1109 return &pState->pBackend->dxDevice;
1110
1111 VMSVGA3DDXCONTEXT *pDXContext;
1112 int rc = vmsvga3dDXContextFromCid(pState, cid, &pDXContext);
1113 if (RT_SUCCESS(rc))
1114 return &pDXContext->pBackendDXContext->dxDevice;
1115 }
1116 else
1117 return &pState->pBackend->dxDevice;
1118
1119 AssertFailed();
1120 return NULL;
1121}
1122
1123
1124static DXDEVICE *dxDeviceFromContext(PVMSVGA3DSTATE p3dState, VMSVGA3DDXCONTEXT *pDXContext)
1125{
1126 if (pDXContext && !p3dState->pBackend->fSingleDevice)
1127 return &pDXContext->pBackendDXContext->dxDevice;
1128
1129 return &p3dState->pBackend->dxDevice;
1130}
1131
1132
1133static int dxDeviceFlush(DXDEVICE *pDevice)
1134{
1135 /** @todo Should the flush follow the query submission? */
1136 pDevice->pImmediateContext->Flush();
1137
1138 ID3D11Query *pQuery = 0;
1139 D3D11_QUERY_DESC qd;
1140 RT_ZERO(qd);
1141 qd.Query = D3D11_QUERY_EVENT;
1142
1143 HRESULT hr = pDevice->pDevice->CreateQuery(&qd, &pQuery);
1144 Assert(hr == S_OK); RT_NOREF(hr);
1145 pDevice->pImmediateContext->End(pQuery);
1146
1147 BOOL queryData;
1148 while (pDevice->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
1149 RTThreadYield();
1150
1151 D3D_RELEASE(pQuery);
1152
1153 return VINF_SUCCESS;
1154}
1155
1156
1157static int dxContextWait(uint32_t cidDrawing, PVMSVGA3DSTATE pState)
1158{
1159 if (pState->pBackend->fSingleDevice)
1160 return VINF_SUCCESS;
1161
1162 /* Flush cidDrawing context and issue a query. */
1163 DXDEVICE *pDXDevice = dxDeviceFromCid(cidDrawing, pState);
1164 if (pDXDevice)
1165 return dxDeviceFlush(pDXDevice);
1166 /* cidDrawing does not exist anymore. */
1167 return VINF_SUCCESS;
1168}
1169
1170
1171static int dxSurfaceWait(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface, uint32_t cidRequesting)
1172{
1173 if (pState->pBackend->fSingleDevice)
1174 return VINF_SUCCESS;
1175
1176 VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
1177 if (!pBackendSurface)
1178 AssertFailedReturn(VERR_INVALID_STATE);
1179
1180 int rc = VINF_SUCCESS;
1181 if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
1182 {
1183 if (pBackendSurface->cidDrawing != cidRequesting)
1184 {
1185 LogFunc(("sid = %u, assoc cid = %u, drawing cid = %u, req cid = %u\n",
1186 pSurface->id, pSurface->idAssociatedContext, pBackendSurface->cidDrawing, cidRequesting));
1187 Assert(dxIsSurfaceShareable(pSurface));
1188 rc = dxContextWait(pBackendSurface->cidDrawing, pState);
1189 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
1190 }
1191 }
1192 return rc;
1193}
1194
1195
1196static ID3D11Resource *dxResource(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT *pDXContext)
1197{
1198 VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
1199 if (!pBackendSurface)
1200 AssertFailedReturn(NULL);
1201
1202 ID3D11Resource *pResource;
1203
1204 uint32_t const cidRequesting = pDXContext ? pDXContext->cid : DX_CID_BACKEND;
1205 if (cidRequesting == pSurface->idAssociatedContext || pState->pBackend->fSingleDevice)
1206 pResource = pBackendSurface->u.pResource;
1207 else
1208 {
1209 /*
1210 * Context, which as not created the surface, is requesting.
1211 */
1212 AssertReturn(pDXContext, NULL);
1213
1214 Assert(dxIsSurfaceShareable(pSurface));
1215 Assert(pSurface->idAssociatedContext == DX_CID_BACKEND);
1216
1217 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pBackendSurface->SharedTextureTree, pDXContext->cid);
1218 if (!pSharedTexture)
1219 {
1220 DXDEVICE *pDevice = dxDeviceFromContext(pState, pDXContext);
1221 AssertReturn(pDevice->pDevice, NULL);
1222
1223 AssertReturn(pBackendSurface->SharedHandle, NULL);
1224
1225 /* This context has not yet opened the texture. */
1226 pSharedTexture = (DXSHAREDTEXTURE *)RTMemAllocZ(sizeof(DXSHAREDTEXTURE));
1227 AssertReturn(pSharedTexture, NULL);
1228
1229 pSharedTexture->Core.Key = pDXContext->cid;
1230 bool const fSuccess = RTAvlU32Insert(&pBackendSurface->SharedTextureTree, &pSharedTexture->Core);
1231 AssertReturn(fSuccess, NULL);
1232
1233 HRESULT hr = pDevice->pDevice->OpenSharedResource(pBackendSurface->SharedHandle, __uuidof(ID3D11Texture2D), (void**)&pSharedTexture->pTexture);
1234 Assert(SUCCEEDED(hr));
1235 if (SUCCEEDED(hr))
1236 pSharedTexture->sid = pSurface->id;
1237 else
1238 {
1239 RTAvlU32Remove(&pBackendSurface->SharedTextureTree, pDXContext->cid);
1240 RTMemFree(pSharedTexture);
1241 return NULL;
1242 }
1243 }
1244
1245 pResource = pSharedTexture->pTexture;
1246 }
1247
1248 /* Wait for drawing to finish. */
1249 dxSurfaceWait(pState, pSurface, cidRequesting);
1250
1251 return pResource;
1252}
1253
1254
1255static uint32_t dxGetRenderTargetViewSid(PVMSVGA3DDXCONTEXT pDXContext, uint32_t renderTargetViewId)
1256{
1257 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, SVGA_ID_INVALID);
1258
1259 SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1260 return pRTViewEntry->sid;
1261}
1262
1263
1264static SVGACOTableDXSRViewEntry const *dxGetShaderResourceViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t shaderResourceViewId)
1265{
1266 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, NULL);
1267
1268 SVGACOTableDXSRViewEntry const *pSRViewEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1269 return pSRViewEntry;
1270}
1271
1272
1273static SVGACOTableDXUAViewEntry const *dxGetUnorderedAccessViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t uaViewId)
1274{
1275 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, NULL);
1276
1277 SVGACOTableDXUAViewEntry const *pUAViewEntry = &pDXContext->cot.paUAView[uaViewId];
1278 return pUAViewEntry;
1279}
1280
1281
1282static SVGACOTableDXDSViewEntry const *dxGetDepthStencilViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t depthStencilViewId)
1283{
1284 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, NULL);
1285
1286 SVGACOTableDXDSViewEntry const *pDSViewEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1287 return pDSViewEntry;
1288}
1289
1290
1291static SVGACOTableDXRTViewEntry const *dxGetRenderTargetViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t renderTargetViewId)
1292{
1293 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, NULL);
1294
1295 SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1296 return pRTViewEntry;
1297}
1298
1299
1300static int dxTrackRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
1301{
1302 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1303 AssertReturn(pState, VERR_INVALID_STATE);
1304
1305 for (unsigned long i = 0; i < RT_ELEMENTS(pDXContext->svgaDXContext.renderState.renderTargetViewIds); ++i)
1306 {
1307 uint32_t const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
1308 if (renderTargetViewId == SVGA_ID_INVALID)
1309 continue;
1310
1311 uint32_t const sid = dxGetRenderTargetViewSid(pDXContext, renderTargetViewId);
1312 LogFunc(("[%u] sid = %u, drawing cid = %u\n", i, sid, pDXContext->cid));
1313
1314 PVMSVGA3DSURFACE pSurface;
1315 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1316 if (RT_SUCCESS(rc))
1317 {
1318 AssertContinue(pSurface->pBackendSurface);
1319 pSurface->pBackendSurface->cidDrawing = pDXContext->cid;
1320 }
1321 }
1322 return VINF_SUCCESS;
1323}
1324
1325
1326static int dxDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry, DXSHADER *pDXShader)
1327{
1328 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1329 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1330
1331 /* Make D3D11_SO_DECLARATION_ENTRY array from SVGA3dStreamOutputDeclarationEntry. */
1332 SVGA3dStreamOutputDeclarationEntry const *paDecls;
1333 PVMSVGAMOB pMob = NULL;
1334 if (pEntry->usesMob)
1335 {
1336 pMob = vmsvgaR3MobGet(pSvgaR3State, pEntry->mobid);
1337 ASSERT_GUEST_RETURN(pMob, VERR_INVALID_PARAMETER);
1338
1339 /* Create a memory pointer for the MOB, which is accessible by host. */
1340 int rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1341 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1342
1343 /* Get pointer to the shader bytecode. This will also verify the offset. */
1344 paDecls = (SVGA3dStreamOutputDeclarationEntry const *)vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1345 AssertReturnStmt(paDecls, vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob), VERR_INTERNAL_ERROR);
1346 }
1347 else
1348 paDecls = &pEntry->decl[0];
1349
1350 pDXStreamOutput->cDeclarationEntry = pEntry->numOutputStreamEntries;
1351 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1352 {
1353 D3D11_SO_DECLARATION_ENTRY *pDst = &pDXStreamOutput->aDeclarationEntry[i];
1354 SVGA3dStreamOutputDeclarationEntry const *pSrc = &paDecls[i];
1355
1356 uint32_t const registerMask = pSrc->registerMask & 0xF;
1357 unsigned const iFirstBit = ASMBitFirstSetU32(registerMask);
1358 unsigned const iLastBit = ASMBitLastSetU32(registerMask);
1359
1360 pDst->Stream = pSrc->stream;
1361 pDst->SemanticName = NULL; /* Semantic name and index will be taken from the shader output declaration. */
1362 pDst->SemanticIndex = 0;
1363 pDst->StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;
1364 pDst->ComponentCount = iFirstBit > 0 ? iLastBit - (iFirstBit - 1) : 0;
1365 pDst->OutputSlot = pSrc->outputSlot;
1366 }
1367
1368 uint32_t MaxSemanticIndex = 0;
1369 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1370 {
1371 D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1372 SVGA3dStreamOutputDeclarationEntry const *decl = &paDecls[i];
1373
1374 /* Find the corresponding register and mask in the GS shader output. */
1375 int idxFound = -1;
1376 for (uint32_t iOutputEntry = 0; iOutputEntry < pDXShader->shaderInfo.cOutputSignature; ++iOutputEntry)
1377 {
1378 SVGA3dDXSignatureEntry const *pOutputEntry = &pDXShader->shaderInfo.aOutputSignature[iOutputEntry];
1379 if ( pOutputEntry->registerIndex == decl->registerIndex
1380 && (decl->registerMask & ~pOutputEntry->mask) == 0) /* SO decl mask is a subset of shader output mask. */
1381 {
1382 idxFound = iOutputEntry;
1383 break;
1384 }
1385 }
1386
1387 if (idxFound >= 0)
1388 {
1389 DXShaderAttributeSemantic const *pOutputSemantic = &pDXShader->shaderInfo.aOutputSemantic[idxFound];
1390 pDeclarationEntry->SemanticName = pOutputSemantic->pcszSemanticName;
1391 pDeclarationEntry->SemanticIndex = pOutputSemantic->SemanticIndex;
1392 MaxSemanticIndex = RT_MAX(MaxSemanticIndex, pOutputSemantic->SemanticIndex);
1393 }
1394 else
1395 AssertFailed();
1396 }
1397
1398 /* A geometry shader may return components of the same register as different attributes:
1399 *
1400 * Output signature
1401 * Name Index Mask Register
1402 * ATTRIB 2 xy 2
1403 * ATTRIB 3 z 2
1404 *
1405 * For ATTRIB 3 the stream output declaration expects StartComponent = 0 and ComponentCount = 1
1406 * (not StartComponent = 2 and ComponentCount = 1):
1407 *
1408 * Stream output declaration
1409 * SemanticName SemanticIndex StartComponent ComponentCount
1410 * ATTRIB 2 0 2
1411 * ATTRIB 3 0 1
1412 *
1413 * Stream output declaration can have multiple entries for the same attribute.
1414 * In this case StartComponent is the offset within the attribute.
1415 *
1416 * Output signature
1417 * Name Index Mask Register
1418 * ATTRIB 0 xyzw 0
1419 *
1420 * Stream output declaration
1421 * SemanticName SemanticIndex StartComponent ComponentCount
1422 * ATTRIB 0 0 1
1423 * ATTRIB 0 1 1
1424 *
1425 * StartComponent has been computed as the component offset in a register:
1426 * 'StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;'.
1427 *
1428 * StartComponent must be the offset in an attribute.
1429 */
1430 for (uint32_t SemanticIndex = 0; SemanticIndex <= MaxSemanticIndex; ++SemanticIndex)
1431 {
1432 /* Find minimum StartComponent value for this attribute. */
1433 uint32_t MinStartComponent = UINT32_MAX;
1434 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1435 {
1436 D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1437 if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1438 MinStartComponent = RT_MIN(MinStartComponent, pDeclarationEntry->StartComponent);
1439 }
1440
1441 AssertContinue(MinStartComponent != UINT32_MAX);
1442
1443 /* Adjust the StartComponent to start from 0 for this attribute. */
1444 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1445 {
1446 D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1447 if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1448 pDeclarationEntry->StartComponent -= MinStartComponent;
1449 }
1450 }
1451
1452 if (pMob)
1453 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1454
1455 return VINF_SUCCESS;
1456}
1457
1458static void dxDestroyStreamOutput(DXSTREAMOUTPUT *pDXStreamOutput)
1459{
1460 RT_ZERO(*pDXStreamOutput);
1461}
1462
1463static D3D11_BLEND dxBlendFactorAlpha(uint8_t svgaBlend)
1464{
1465 /* "Blend options that end in _COLOR are not allowed." but the guest sometimes sends them. */
1466 switch (svgaBlend)
1467 {
1468 case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1469 case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1470 case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_ALPHA;
1471 case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_ALPHA;
1472 case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1473 case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1474 case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1475 case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1476 case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_ALPHA;
1477 case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_ALPHA;
1478 case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1479 case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1480 case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1481 case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_ALPHA;
1482 case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_ALPHA;
1483 case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1484 case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1485 case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1486 case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1487 default:
1488 break;
1489 }
1490 return D3D11_BLEND_ZERO;
1491}
1492
1493
1494static D3D11_BLEND dxBlendFactorColor(uint8_t svgaBlend)
1495{
1496 switch (svgaBlend)
1497 {
1498 case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1499 case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1500 case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_COLOR;
1501 case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_COLOR;
1502 case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1503 case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1504 case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1505 case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1506 case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_COLOR;
1507 case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_COLOR;
1508 case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1509 case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1510 case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1511 case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_COLOR;
1512 case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_COLOR;
1513 case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1514 case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1515 case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1516 case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1517 default:
1518 break;
1519 }
1520 return D3D11_BLEND_ZERO;
1521}
1522
1523
1524static D3D11_BLEND_OP dxBlendOp(uint8_t svgaBlendEq)
1525{
1526 return (D3D11_BLEND_OP)svgaBlendEq;
1527}
1528
1529
1530/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
1531static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState **pp)
1532{
1533 D3D11_BLEND_DESC BlendDesc;
1534 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
1535 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
1536 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
1537 {
1538 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
1539 BlendDesc.RenderTarget[i].SrcBlend = dxBlendFactorColor(pEntry->perRT[i].srcBlend);
1540 BlendDesc.RenderTarget[i].DestBlend = dxBlendFactorColor(pEntry->perRT[i].destBlend);
1541 BlendDesc.RenderTarget[i].BlendOp = dxBlendOp (pEntry->perRT[i].blendOp);
1542 BlendDesc.RenderTarget[i].SrcBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].srcBlendAlpha);
1543 BlendDesc.RenderTarget[i].DestBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].destBlendAlpha);
1544 BlendDesc.RenderTarget[i].BlendOpAlpha = dxBlendOp (pEntry->perRT[i].blendOpAlpha);
1545 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
1546 /** @todo logicOpEnable and logicOp */
1547 }
1548
1549 HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
1550 Assert(SUCCEEDED(hr));
1551 return hr;
1552}
1553
1554
1555static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp)
1556{
1557 D3D11_DEPTH_STENCIL_DESC desc;
1558 desc.DepthEnable = pEntry->depthEnable;
1559 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
1560 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
1561 desc.StencilEnable = pEntry->stencilEnable;
1562 desc.StencilReadMask = pEntry->stencilReadMask;
1563 desc.StencilWriteMask = pEntry->stencilWriteMask;
1564 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
1565 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
1566 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
1567 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
1568 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
1569 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
1570 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
1571 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
1572 /** @todo frontEnable, backEnable */
1573
1574 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
1575 Assert(SUCCEEDED(hr));
1576 return hr;
1577}
1578
1579
1580static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp)
1581{
1582 D3D11_SAMPLER_DESC desc;
1583 /* Guest sometimes sends inconsistent (from D3D11 point of view) set of filter flags. */
1584 if (pEntry->filter & SVGA3D_FILTER_ANISOTROPIC)
1585 desc.Filter = (pEntry->filter & SVGA3D_FILTER_COMPARE)
1586 ? D3D11_FILTER_COMPARISON_ANISOTROPIC
1587 : D3D11_FILTER_ANISOTROPIC;
1588 else
1589 desc.Filter = (D3D11_FILTER)pEntry->filter;
1590 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
1591 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
1592 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
1593 desc.MipLODBias = pEntry->mipLODBias;
1594 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
1595 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
1596 desc.BorderColor[0] = pEntry->borderColor.value[0];
1597 desc.BorderColor[1] = pEntry->borderColor.value[1];
1598 desc.BorderColor[2] = pEntry->borderColor.value[2];
1599 desc.BorderColor[3] = pEntry->borderColor.value[3];
1600 desc.MinLOD = pEntry->minLOD;
1601 desc.MaxLOD = pEntry->maxLOD;
1602
1603 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
1604 Assert(SUCCEEDED(hr));
1605 return hr;
1606}
1607
1608
1609static D3D11_FILL_MODE dxFillMode(uint8_t svgaFillMode)
1610{
1611 if (svgaFillMode == SVGA3D_FILLMODE_POINT)
1612 return D3D11_FILL_WIREFRAME;
1613 return (D3D11_FILL_MODE)svgaFillMode;
1614}
1615
1616
1617static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState **pp)
1618{
1619 D3D11_RASTERIZER_DESC desc;
1620 desc.FillMode = dxFillMode(pEntry->fillMode);
1621 desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
1622 desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
1623 /** @todo provokingVertexLast */
1624 desc.DepthBias = pEntry->depthBias;
1625 desc.DepthBiasClamp = pEntry->depthBiasClamp;
1626 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
1627 desc.DepthClipEnable = pEntry->depthClipEnable;
1628 desc.ScissorEnable = pEntry->scissorEnable;
1629 desc.MultisampleEnable = pEntry->multisampleEnable;
1630 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
1631 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
1632
1633 HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
1634 Assert(SUCCEEDED(hr));
1635 return hr;
1636}
1637
1638
1639static HRESULT dxRenderTargetViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11RenderTargetView **pp)
1640{
1641 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1642
1643 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1644
1645 D3D11_RENDER_TARGET_VIEW_DESC desc;
1646 RT_ZERO(desc);
1647 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1648 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
1649 switch (pEntry->resourceDimension)
1650 {
1651 case SVGA3D_RESOURCE_BUFFER:
1652 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1653 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1654 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1655 break;
1656 case SVGA3D_RESOURCE_TEXTURE1D:
1657 if (pSurface->surfaceDesc.numArrayElements <= 1)
1658 {
1659 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
1660 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1661 }
1662 else
1663 {
1664 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
1665 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1666 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1667 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1668 }
1669 break;
1670 case SVGA3D_RESOURCE_TEXTURE2D:
1671 if (pSurface->surfaceDesc.numArrayElements <= 1)
1672 {
1673 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
1674 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1675 }
1676 else
1677 {
1678 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1679 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1680 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1681 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1682 }
1683 break;
1684 case SVGA3D_RESOURCE_TEXTURE3D:
1685 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
1686 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1687 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1688 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1689 break;
1690 case SVGA3D_RESOURCE_TEXTURECUBE:
1691 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1692 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1693 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1694 desc.Texture2DArray.FirstArraySlice = 0;
1695 desc.Texture2DArray.ArraySize = 6;
1696 break;
1697 case SVGA3D_RESOURCE_BUFFEREX:
1698 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1699 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1700 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1701 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1702 break;
1703 default:
1704 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1705 }
1706
1707 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
1708 Assert(SUCCEEDED(hr));
1709 return hr;
1710}
1711
1712
1713static HRESULT dxShaderResourceViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11ShaderResourceView **pp)
1714{
1715 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1716
1717 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1718
1719 D3D11_SHADER_RESOURCE_VIEW_DESC desc;
1720 RT_ZERO(desc);
1721 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1722 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
1723
1724 switch (pEntry->resourceDimension)
1725 {
1726 case SVGA3D_RESOURCE_BUFFER:
1727 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
1728 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1729 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1730 break;
1731 case SVGA3D_RESOURCE_TEXTURE1D:
1732 if (pSurface->surfaceDesc.numArrayElements <= 1)
1733 {
1734 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
1735 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1736 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
1737 }
1738 else
1739 {
1740 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
1741 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1742 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
1743 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1744 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1745 }
1746 break;
1747 case SVGA3D_RESOURCE_TEXTURE2D:
1748 if (pSurface->surfaceDesc.numArrayElements <= 1)
1749 {
1750 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
1751 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1752 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
1753 }
1754 else
1755 {
1756 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
1757 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1758 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
1759 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1760 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1761 }
1762 break;
1763 case SVGA3D_RESOURCE_TEXTURE3D:
1764 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
1765 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1766 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
1767 break;
1768 case SVGA3D_RESOURCE_TEXTURECUBE:
1769 if (pSurface->surfaceDesc.numArrayElements <= 6)
1770 {
1771 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
1772 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1773 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
1774 }
1775 else
1776 {
1777 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBEARRAY;
1778 desc.TextureCubeArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1779 desc.TextureCubeArray.MipLevels = pEntry->desc.tex.mipLevels;
1780 desc.TextureCubeArray.First2DArrayFace = pEntry->desc.tex.firstArraySlice;
1781 desc.TextureCubeArray.NumCubes = pEntry->desc.tex.arraySize / 6;
1782 }
1783 break;
1784 case SVGA3D_RESOURCE_BUFFEREX:
1785 AssertFailed(); /** @todo test. */
1786 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
1787 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
1788 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
1789 desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
1790 break;
1791 default:
1792 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1793 }
1794
1795 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
1796 Assert(SUCCEEDED(hr));
1797 return hr;
1798}
1799
1800
1801static HRESULT dxUnorderedAccessViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXUAViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11UnorderedAccessView **pp)
1802{
1803 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1804
1805 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1806
1807 D3D11_UNORDERED_ACCESS_VIEW_DESC desc;
1808 RT_ZERO(desc);
1809 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1810 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
1811
1812 switch (pEntry->resourceDimension)
1813 {
1814 case SVGA3D_RESOURCE_BUFFER:
1815 desc.ViewDimension = D3D11_UAV_DIMENSION_BUFFER;
1816 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1817 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1818 desc.Buffer.Flags = pEntry->desc.buffer.flags;
1819 break;
1820 case SVGA3D_RESOURCE_TEXTURE1D:
1821 if (pSurface->surfaceDesc.numArrayElements <= 1)
1822 {
1823 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1D;
1824 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1825 }
1826 else
1827 {
1828 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1DARRAY;
1829 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1830 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1831 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1832 }
1833 break;
1834 case SVGA3D_RESOURCE_TEXTURE2D:
1835 if (pSurface->surfaceDesc.numArrayElements <= 1)
1836 {
1837 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2D;
1838 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1839 }
1840 else
1841 {
1842 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2DARRAY;
1843 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1844 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1845 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1846 }
1847 break;
1848 case SVGA3D_RESOURCE_TEXTURE3D:
1849 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1850 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1851 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1852 break;
1853 default:
1854 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1855 }
1856
1857 HRESULT hr = pDevice->pDevice->CreateUnorderedAccessView(pResource, &desc, pp);
1858 Assert(SUCCEEDED(hr));
1859 return hr;
1860}
1861
1862
1863static HRESULT dxDepthStencilViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXDSViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11DepthStencilView **pp)
1864{
1865 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1866
1867 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1868
1869 D3D11_DEPTH_STENCIL_VIEW_DESC desc;
1870 RT_ZERO(desc);
1871 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1872 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
1873 desc.Flags = pEntry->flags;
1874 switch (pEntry->resourceDimension)
1875 {
1876 case SVGA3D_RESOURCE_TEXTURE1D:
1877 if (pSurface->surfaceDesc.numArrayElements <= 1)
1878 {
1879 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
1880 desc.Texture1D.MipSlice = pEntry->mipSlice;
1881 }
1882 else
1883 {
1884 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
1885 desc.Texture1DArray.MipSlice = pEntry->mipSlice;
1886 desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
1887 desc.Texture1DArray.ArraySize = pEntry->arraySize;
1888 }
1889 break;
1890 case SVGA3D_RESOURCE_TEXTURE2D:
1891 if (pSurface->surfaceDesc.numArrayElements <= 1)
1892 {
1893 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2D;
1894 desc.Texture2D.MipSlice = pEntry->mipSlice;
1895 }
1896 else
1897 {
1898 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
1899 desc.Texture2DArray.MipSlice = pEntry->mipSlice;
1900 desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
1901 desc.Texture2DArray.ArraySize = pEntry->arraySize;
1902 }
1903 break;
1904 default:
1905 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1906 }
1907
1908 HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
1909 Assert(SUCCEEDED(hr));
1910 return hr;
1911}
1912
1913
1914static HRESULT dxShaderCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
1915{
1916 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1917
1918 HRESULT hr = S_OK;
1919
1920 switch (pDXShader->enmShaderType)
1921 {
1922 case SVGA3D_SHADERTYPE_VS:
1923 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
1924 Assert(SUCCEEDED(hr));
1925 break;
1926 case SVGA3D_SHADERTYPE_PS:
1927 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
1928 Assert(SUCCEEDED(hr));
1929 break;
1930 case SVGA3D_SHADERTYPE_GS:
1931 {
1932 SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
1933 if (soid == SVGA_ID_INVALID)
1934 {
1935 hr = pDevice->pDevice->CreateGeometryShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pGeometryShader);
1936 Assert(SUCCEEDED(hr));
1937 }
1938 else
1939 {
1940 ASSERT_GUEST_RETURN(soid < pDXContext->pBackendDXContext->cStreamOutput, E_INVALIDARG);
1941
1942 SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[soid];
1943 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1944
1945 hr = pDevice->pDevice->CreateGeometryShaderWithStreamOutput(pDXShader->pvDXBC, pDXShader->cbDXBC,
1946 pDXStreamOutput->aDeclarationEntry, pDXStreamOutput->cDeclarationEntry,
1947 pEntry->numOutputStreamStrides ? pEntry->streamOutputStrideInBytes : NULL, pEntry->numOutputStreamStrides,
1948 pEntry->rasterizedStream,
1949 /*pClassLinkage=*/ NULL, &pDXShader->pGeometryShader);
1950 AssertBreak(SUCCEEDED(hr));
1951
1952 pDXShader->soid = soid;
1953 }
1954 break;
1955 }
1956 case SVGA3D_SHADERTYPE_HS:
1957 hr = pDevice->pDevice->CreateHullShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pHullShader);
1958 Assert(SUCCEEDED(hr));
1959 break;
1960 case SVGA3D_SHADERTYPE_DS:
1961 hr = pDevice->pDevice->CreateDomainShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pDomainShader);
1962 Assert(SUCCEEDED(hr));
1963 break;
1964 case SVGA3D_SHADERTYPE_CS:
1965 hr = pDevice->pDevice->CreateComputeShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pComputeShader);
1966 Assert(SUCCEEDED(hr));
1967 break;
1968 default:
1969 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1970 }
1971
1972 return hr;
1973}
1974
1975
1976static void dxShaderSet(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, DXSHADER *pDXShader)
1977{
1978 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1979
1980 switch (type)
1981 {
1982 case SVGA3D_SHADERTYPE_VS:
1983 pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
1984 break;
1985 case SVGA3D_SHADERTYPE_PS:
1986 pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
1987 break;
1988 case SVGA3D_SHADERTYPE_GS:
1989 {
1990 Assert(!pDXShader || (pDXShader->soid == pDXContext->svgaDXContext.streamOut.soid));
1991 pDevice->pImmediateContext->GSSetShader(pDXShader ? pDXShader->pGeometryShader : NULL, NULL, 0);
1992 } break;
1993 case SVGA3D_SHADERTYPE_HS:
1994 pDevice->pImmediateContext->HSSetShader(pDXShader ? pDXShader->pHullShader : NULL, NULL, 0);
1995 break;
1996 case SVGA3D_SHADERTYPE_DS:
1997 pDevice->pImmediateContext->DSSetShader(pDXShader ? pDXShader->pDomainShader : NULL, NULL, 0);
1998 break;
1999 case SVGA3D_SHADERTYPE_CS:
2000 pDevice->pImmediateContext->CSSetShader(pDXShader ? pDXShader->pComputeShader : NULL, NULL, 0);
2001 break;
2002 default:
2003 ASSERT_GUEST_FAILED_RETURN_VOID();
2004 }
2005}
2006
2007
2008static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer)
2009{
2010 switch (type)
2011 {
2012 case SVGA3D_SHADERTYPE_VS:
2013 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
2014 break;
2015 case SVGA3D_SHADERTYPE_PS:
2016 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
2017 break;
2018 case SVGA3D_SHADERTYPE_GS:
2019 pDevice->pImmediateContext->GSSetConstantBuffers(slot, 1, &pConstantBuffer);
2020 break;
2021 case SVGA3D_SHADERTYPE_HS:
2022 pDevice->pImmediateContext->HSSetConstantBuffers(slot, 1, &pConstantBuffer);
2023 break;
2024 case SVGA3D_SHADERTYPE_DS:
2025 pDevice->pImmediateContext->DSSetConstantBuffers(slot, 1, &pConstantBuffer);
2026 break;
2027 case SVGA3D_SHADERTYPE_CS:
2028 pDevice->pImmediateContext->CSSetConstantBuffers(slot, 1, &pConstantBuffer);
2029 break;
2030 default:
2031 ASSERT_GUEST_FAILED_RETURN_VOID();
2032 }
2033}
2034
2035
2036static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler)
2037{
2038 switch (type)
2039 {
2040 case SVGA3D_SHADERTYPE_VS:
2041 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
2042 break;
2043 case SVGA3D_SHADERTYPE_PS:
2044 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
2045 break;
2046 case SVGA3D_SHADERTYPE_GS:
2047 pDevice->pImmediateContext->GSSetSamplers(startSampler, cSampler, papSampler);
2048 break;
2049 case SVGA3D_SHADERTYPE_HS:
2050 pDevice->pImmediateContext->HSSetSamplers(startSampler, cSampler, papSampler);
2051 break;
2052 case SVGA3D_SHADERTYPE_DS:
2053 pDevice->pImmediateContext->DSSetSamplers(startSampler, cSampler, papSampler);
2054 break;
2055 case SVGA3D_SHADERTYPE_CS:
2056 pDevice->pImmediateContext->CSSetSamplers(startSampler, cSampler, papSampler);
2057 break;
2058 default:
2059 ASSERT_GUEST_FAILED_RETURN_VOID();
2060 }
2061}
2062
2063
2064static void dxShaderResourceViewSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView * const *papShaderResourceView)
2065{
2066 switch (type)
2067 {
2068 case SVGA3D_SHADERTYPE_VS:
2069 pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2070 break;
2071 case SVGA3D_SHADERTYPE_PS:
2072 pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2073 break;
2074 case SVGA3D_SHADERTYPE_GS:
2075 pDevice->pImmediateContext->GSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2076 break;
2077 case SVGA3D_SHADERTYPE_HS:
2078 pDevice->pImmediateContext->HSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2079 break;
2080 case SVGA3D_SHADERTYPE_DS:
2081 pDevice->pImmediateContext->DSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2082 break;
2083 case SVGA3D_SHADERTYPE_CS:
2084 pDevice->pImmediateContext->CSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2085 break;
2086 default:
2087 ASSERT_GUEST_FAILED_RETURN_VOID();
2088 }
2089}
2090
2091
2092static void dxCSUnorderedAccessViewSet(DXDEVICE *pDevice, uint32_t startView, uint32_t cView, ID3D11UnorderedAccessView * const *papUnorderedAccessView, UINT *pUAVInitialCounts)
2093{
2094 pDevice->pImmediateContext->CSSetUnorderedAccessViews(startView, cView, papUnorderedAccessView, pUAVInitialCounts);
2095}
2096
2097
2098static int dxBackendSurfaceAlloc(PVMSVGA3DBACKENDSURFACE *ppBackendSurface)
2099{
2100 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
2101 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
2102 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
2103 RTListInit(&pBackendSurface->listView);
2104 *ppBackendSurface = pBackendSurface;
2105 return VINF_SUCCESS;
2106}
2107
2108
2109static HRESULT dxInitSharedHandle(PVMSVGA3DBACKEND pBackend, PVMSVGA3DBACKENDSURFACE pBackendSurface)
2110{
2111 if (pBackend->fSingleDevice)
2112 return S_OK;
2113
2114 /* Get the shared handle. */
2115 IDXGIResource *pDxgiResource = NULL;
2116 HRESULT hr = pBackendSurface->u.pResource->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
2117 Assert(SUCCEEDED(hr));
2118 if (SUCCEEDED(hr))
2119 {
2120 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
2121 Assert(SUCCEEDED(hr));
2122 D3D_RELEASE(pDxgiResource);
2123 }
2124
2125 return hr;
2126}
2127
2128
2129static int vmsvga3dBackSurfaceCreateScreenTarget(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
2130{
2131 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2132 AssertReturn(p3dState, VERR_INVALID_STATE);
2133
2134 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2135 AssertReturn(pBackend, VERR_INVALID_STATE);
2136
2137 DXDEVICE *pDXDevice = &pBackend->dxDevice;
2138 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2139
2140 /* Surface must have SCREEN_TARGET flag. */
2141 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
2142
2143 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
2144 {
2145 AssertFailed(); /* Should the function not be used like that? */
2146 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2147 }
2148
2149 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2150 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2151 AssertRCReturn(rc, rc);
2152
2153 D3D11_TEXTURE2D_DESC td;
2154 RT_ZERO(td);
2155 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
2156 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
2157 Assert(pSurface->cLevels == 1);
2158 td.MipLevels = 1;
2159 td.ArraySize = 1;
2160 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2161 td.SampleDesc.Count = 1;
2162 td.SampleDesc.Quality = 0;
2163 td.Usage = D3D11_USAGE_DEFAULT;
2164 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
2165 td.CPUAccessFlags = 0;
2166 td.MiscFlags = pBackend->fSingleDevice ? 0 : D3D11_RESOURCE_MISC_SHARED;
2167
2168 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.pTexture2D);
2169 Assert(SUCCEEDED(hr));
2170 if (SUCCEEDED(hr))
2171 {
2172 /* Map-able texture. */
2173 td.Usage = D3D11_USAGE_DYNAMIC;
2174 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2175 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2176 td.MiscFlags = 0;
2177 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->dynamic.pTexture2D);
2178 Assert(SUCCEEDED(hr));
2179 }
2180
2181 if (SUCCEEDED(hr))
2182 {
2183 /* Staging texture. */
2184 td.Usage = D3D11_USAGE_STAGING;
2185 td.BindFlags = 0; /* No flags allowed. */
2186 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2187 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->staging.pTexture2D);
2188 Assert(SUCCEEDED(hr));
2189 }
2190
2191 if (SUCCEEDED(hr))
2192 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2193
2194 if (SUCCEEDED(hr))
2195 {
2196 /*
2197 * Success.
2198 */
2199 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
2200 pBackendSurface->enmDxgiFormat = td.Format;
2201 pSurface->pBackendSurface = pBackendSurface;
2202 pSurface->idAssociatedContext = DX_CID_BACKEND;
2203 return VINF_SUCCESS;
2204 }
2205
2206 /* Failure. */
2207 D3D_RELEASE(pBackendSurface->staging.pTexture2D);
2208 D3D_RELEASE(pBackendSurface->dynamic.pTexture2D);
2209 D3D_RELEASE(pBackendSurface->u.pTexture2D);
2210 RTMemFree(pBackendSurface);
2211 return VERR_NO_MEMORY;
2212}
2213
2214
2215static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
2216{
2217 /* Catch unimplemented flags. */
2218 Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS | SVGA3D_SURFACE_BIND_RAW_VIEWS)));
2219
2220 UINT BindFlags = 0;
2221
2222 if (surfaceFlags & (SVGA3D_SURFACE_BIND_VERTEX_BUFFER | SVGA3D_SURFACE_HINT_VERTEXBUFFER))
2223 BindFlags |= D3D11_BIND_VERTEX_BUFFER;
2224 if (surfaceFlags & (SVGA3D_SURFACE_BIND_INDEX_BUFFER | SVGA3D_SURFACE_HINT_INDEXBUFFER))
2225 BindFlags |= D3D11_BIND_INDEX_BUFFER;
2226 if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags |= D3D11_BIND_CONSTANT_BUFFER;
2227 if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags |= D3D11_BIND_SHADER_RESOURCE;
2228 if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags |= D3D11_BIND_RENDER_TARGET;
2229 if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags |= D3D11_BIND_DEPTH_STENCIL;
2230 if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags |= D3D11_BIND_STREAM_OUTPUT;
2231 if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags |= D3D11_BIND_UNORDERED_ACCESS;
2232
2233 return BindFlags;
2234}
2235
2236
2237static DXDEVICE *dxSurfaceDevice(PVMSVGA3DSTATE p3dState, PVMSVGA3DSURFACE pSurface, PVMSVGA3DDXCONTEXT pDXContext, UINT *pMiscFlags)
2238{
2239 if (p3dState->pBackend->fSingleDevice)
2240 {
2241 *pMiscFlags = 0;
2242 return &p3dState->pBackend->dxDevice;
2243 }
2244
2245 if (dxIsSurfaceShareable(pSurface))
2246 {
2247 *pMiscFlags = D3D11_RESOURCE_MISC_SHARED;
2248 return &p3dState->pBackend->dxDevice;
2249 }
2250
2251 *pMiscFlags = 0;
2252 return &pDXContext->pBackendDXContext->dxDevice;
2253}
2254
2255
2256static DXGI_FORMAT dxGetDxgiTypelessFormat(DXGI_FORMAT dxgiFormat)
2257{
2258 switch (dxgiFormat)
2259 {
2260 case DXGI_FORMAT_R32G32B32A32_FLOAT:
2261 case DXGI_FORMAT_R32G32B32A32_UINT:
2262 case DXGI_FORMAT_R32G32B32A32_SINT:
2263 return DXGI_FORMAT_R32G32B32A32_TYPELESS; /* 1 */
2264 case DXGI_FORMAT_R32G32B32_FLOAT:
2265 case DXGI_FORMAT_R32G32B32_UINT:
2266 case DXGI_FORMAT_R32G32B32_SINT:
2267 return DXGI_FORMAT_R32G32B32_TYPELESS; /* 5 */
2268 case DXGI_FORMAT_R16G16B16A16_FLOAT:
2269 case DXGI_FORMAT_R16G16B16A16_UNORM:
2270 case DXGI_FORMAT_R16G16B16A16_UINT:
2271 case DXGI_FORMAT_R16G16B16A16_SNORM:
2272 case DXGI_FORMAT_R16G16B16A16_SINT:
2273 return DXGI_FORMAT_R16G16B16A16_TYPELESS; /* 9 */
2274 case DXGI_FORMAT_R32G32_FLOAT:
2275 case DXGI_FORMAT_R32G32_UINT:
2276 case DXGI_FORMAT_R32G32_SINT:
2277 return DXGI_FORMAT_R32G32_TYPELESS; /* 15 */
2278 case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2279 case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS:
2280 case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT:
2281 return DXGI_FORMAT_R32G8X24_TYPELESS; /* 19 */
2282 case DXGI_FORMAT_R10G10B10A2_UNORM:
2283 case DXGI_FORMAT_R10G10B10A2_UINT:
2284 return DXGI_FORMAT_R10G10B10A2_TYPELESS; /* 23 */
2285 case DXGI_FORMAT_R8G8B8A8_UNORM:
2286 case DXGI_FORMAT_R8G8B8A8_UNORM_SRGB:
2287 case DXGI_FORMAT_R8G8B8A8_UINT:
2288 case DXGI_FORMAT_R8G8B8A8_SNORM:
2289 case DXGI_FORMAT_R8G8B8A8_SINT:
2290 return DXGI_FORMAT_R8G8B8A8_TYPELESS; /* 27 */
2291 case DXGI_FORMAT_R16G16_FLOAT:
2292 case DXGI_FORMAT_R16G16_UNORM:
2293 case DXGI_FORMAT_R16G16_UINT:
2294 case DXGI_FORMAT_R16G16_SNORM:
2295 case DXGI_FORMAT_R16G16_SINT:
2296 return DXGI_FORMAT_R16G16_TYPELESS; /* 33 */
2297 case DXGI_FORMAT_D32_FLOAT:
2298 case DXGI_FORMAT_R32_FLOAT:
2299 case DXGI_FORMAT_R32_UINT:
2300 case DXGI_FORMAT_R32_SINT:
2301 return DXGI_FORMAT_R32_TYPELESS; /* 39 */
2302 case DXGI_FORMAT_D24_UNORM_S8_UINT:
2303 case DXGI_FORMAT_R24_UNORM_X8_TYPELESS:
2304 case DXGI_FORMAT_X24_TYPELESS_G8_UINT:
2305 return DXGI_FORMAT_R24G8_TYPELESS; /* 44 */
2306 case DXGI_FORMAT_R8G8_UNORM:
2307 case DXGI_FORMAT_R8G8_UINT:
2308 case DXGI_FORMAT_R8G8_SNORM:
2309 case DXGI_FORMAT_R8G8_SINT:
2310 return DXGI_FORMAT_R8G8_TYPELESS; /* 48*/
2311 case DXGI_FORMAT_R16_FLOAT:
2312 case DXGI_FORMAT_D16_UNORM:
2313 case DXGI_FORMAT_R16_UNORM:
2314 case DXGI_FORMAT_R16_UINT:
2315 case DXGI_FORMAT_R16_SNORM:
2316 case DXGI_FORMAT_R16_SINT:
2317 return DXGI_FORMAT_R16_TYPELESS; /* 53 */
2318 case DXGI_FORMAT_R8_UNORM:
2319 case DXGI_FORMAT_R8_UINT:
2320 case DXGI_FORMAT_R8_SNORM:
2321 case DXGI_FORMAT_R8_SINT:
2322 return DXGI_FORMAT_R8_TYPELESS; /* 60*/
2323 case DXGI_FORMAT_BC1_UNORM:
2324 case DXGI_FORMAT_BC1_UNORM_SRGB:
2325 return DXGI_FORMAT_BC1_TYPELESS; /* 70 */
2326 case DXGI_FORMAT_BC2_UNORM:
2327 case DXGI_FORMAT_BC2_UNORM_SRGB:
2328 return DXGI_FORMAT_BC2_TYPELESS; /* 73 */
2329 case DXGI_FORMAT_BC3_UNORM:
2330 case DXGI_FORMAT_BC3_UNORM_SRGB:
2331 return DXGI_FORMAT_BC3_TYPELESS; /* 76 */
2332 case DXGI_FORMAT_BC4_UNORM:
2333 case DXGI_FORMAT_BC4_SNORM:
2334 return DXGI_FORMAT_BC4_TYPELESS; /* 79 */
2335 case DXGI_FORMAT_BC5_UNORM:
2336 case DXGI_FORMAT_BC5_SNORM:
2337 return DXGI_FORMAT_BC5_TYPELESS; /* 82 */
2338 case DXGI_FORMAT_B8G8R8A8_UNORM:
2339 case DXGI_FORMAT_B8G8R8A8_UNORM_SRGB:
2340 return DXGI_FORMAT_B8G8R8A8_TYPELESS; /* 90 */
2341 case DXGI_FORMAT_B8G8R8X8_UNORM:
2342 case DXGI_FORMAT_B8G8R8X8_UNORM_SRGB:
2343 return DXGI_FORMAT_B8G8R8X8_TYPELESS; /* 92 */
2344 case DXGI_FORMAT_BC6H_UF16:
2345 case DXGI_FORMAT_BC6H_SF16:
2346 return DXGI_FORMAT_BC6H_TYPELESS; /* 94 */
2347 case DXGI_FORMAT_BC7_UNORM:
2348 case DXGI_FORMAT_BC7_UNORM_SRGB:
2349 return DXGI_FORMAT_BC7_TYPELESS; /* 97 */
2350 default:
2351 break;
2352 }
2353
2354 return dxgiFormat;
2355}
2356
2357
2358static bool dxIsDepthStencilFormat(DXGI_FORMAT dxgiFormat)
2359{
2360 switch (dxgiFormat)
2361 {
2362 case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2363 case DXGI_FORMAT_D32_FLOAT:
2364 case DXGI_FORMAT_D24_UNORM_S8_UINT:
2365 case DXGI_FORMAT_R16_FLOAT:
2366 return true;
2367 default:
2368 break;
2369 }
2370
2371 return false;
2372}
2373
2374
2375static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2376{
2377 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2378 AssertReturn(p3dState, VERR_INVALID_STATE);
2379
2380 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2381 AssertReturn(pBackend, VERR_INVALID_STATE);
2382
2383 UINT MiscFlags;
2384 DXDEVICE *pDXDevice = dxSurfaceDevice(p3dState, pSurface, pDXContext, &MiscFlags);
2385 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2386
2387 if (pSurface->pBackendSurface != NULL)
2388 {
2389 AssertFailed(); /** @todo Should the function not be used like that? */
2390 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2391 }
2392
2393 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2394 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2395 AssertRCReturn(rc, rc);
2396
2397 uint32_t const cWidth = pSurface->paMipmapLevels[0].cBlocksX * pSurface->cxBlock;
2398 uint32_t const cHeight = pSurface->paMipmapLevels[0].cBlocksY * pSurface->cyBlock;
2399 uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
2400 uint32_t const numMipLevels = pSurface->cLevels;
2401
2402 DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2403 AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
2404
2405 /* Create typeless textures, unless it is a depth/stencil resource,
2406 * because D3D11_BIND_DEPTH_STENCIL requires a depth/stencil format.
2407 * Always use typeless format for staging/dynamic resources.
2408 */
2409 DXGI_FORMAT const dxgiFormatTypeless = dxGetDxgiTypelessFormat(dxgiFormat);
2410 if (!dxIsDepthStencilFormat(dxgiFormat))
2411 dxgiFormat = dxgiFormatTypeless;
2412
2413 /*
2414 * Create D3D11 texture object.
2415 */
2416 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
2417 if (pSurface->paMipmapLevels[0].pSurfaceData)
2418 {
2419 /* Can happen for a non GBO surface or if GBO texture was updated prior to creation of the hardware resource. */
2420 uint32_t const cSubresource = numMipLevels * pSurface->surfaceDesc.numArrayElements;
2421 paInitialData = (D3D11_SUBRESOURCE_DATA *)RTMemAlloc(cSubresource * sizeof(D3D11_SUBRESOURCE_DATA));
2422 AssertPtrReturn(paInitialData, VERR_NO_MEMORY);
2423
2424 for (uint32_t i = 0; i < cSubresource; ++i)
2425 {
2426 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
2427 D3D11_SUBRESOURCE_DATA *p = &paInitialData[i];
2428 p->pSysMem = pMipmapLevel->pSurfaceData;
2429 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
2430 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
2431 }
2432 }
2433
2434 HRESULT hr = S_OK;
2435 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
2436 {
2437 /*
2438 * Create the texture in backend device and open for the specified context.
2439 */
2440 D3D11_TEXTURE2D_DESC td;
2441 RT_ZERO(td);
2442 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
2443 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
2444 Assert(pSurface->cLevels == 1);
2445 td.MipLevels = 1;
2446 td.ArraySize = 1;
2447 td.Format = dxgiFormat;
2448 td.SampleDesc.Count = 1;
2449 td.SampleDesc.Quality = 0;
2450 td.Usage = D3D11_USAGE_DEFAULT;
2451 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
2452 td.CPUAccessFlags = 0;
2453 td.MiscFlags = MiscFlags;
2454
2455 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2456 Assert(SUCCEEDED(hr));
2457 if (SUCCEEDED(hr))
2458 {
2459 /* Map-able texture. */
2460 td.Format = dxgiFormatTypeless;
2461 td.Usage = D3D11_USAGE_DYNAMIC;
2462 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2463 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2464 td.MiscFlags = 0;
2465 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2466 Assert(SUCCEEDED(hr));
2467 }
2468
2469 if (SUCCEEDED(hr))
2470 {
2471 /* Staging texture. */
2472 td.Usage = D3D11_USAGE_STAGING;
2473 td.BindFlags = 0; /* No flags allowed. */
2474 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2475 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2476 Assert(SUCCEEDED(hr));
2477 }
2478
2479 if (SUCCEEDED(hr))
2480 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2481
2482 if (SUCCEEDED(hr))
2483 {
2484 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
2485 }
2486 }
2487 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
2488 {
2489 Assert(pSurface->cFaces == 6);
2490 Assert(cWidth == cHeight);
2491 Assert(cDepth == 1);
2492//DEBUG_BREAKPOINT_TEST();
2493
2494 D3D11_TEXTURE2D_DESC td;
2495 RT_ZERO(td);
2496 td.Width = cWidth;
2497 td.Height = cHeight;
2498 td.MipLevels = numMipLevels;
2499 td.ArraySize = pSurface->surfaceDesc.numArrayElements; /* This is 6 * numCubes */
2500 td.Format = dxgiFormat;
2501 td.SampleDesc.Count = 1;
2502 td.SampleDesc.Quality = 0;
2503 td.Usage = D3D11_USAGE_DEFAULT;
2504 td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2505 td.CPUAccessFlags = 0; /** @todo */
2506 td.MiscFlags = MiscFlags | D3D11_RESOURCE_MISC_TEXTURECUBE; /** @todo */
2507 if ( numMipLevels > 1
2508 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2509 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2510
2511 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2512 Assert(SUCCEEDED(hr));
2513 if (SUCCEEDED(hr))
2514 {
2515 /* Map-able texture. */
2516 td.Format = dxgiFormatTypeless;
2517 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2518 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2519 td.Usage = D3D11_USAGE_DYNAMIC;
2520 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2521 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2522 td.MiscFlags = 0;
2523 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2524 Assert(SUCCEEDED(hr));
2525 }
2526
2527 if (SUCCEEDED(hr))
2528 {
2529 /* Staging texture. */
2530 td.Usage = D3D11_USAGE_STAGING;
2531 td.BindFlags = 0; /* No flags allowed. */
2532 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2533 td.MiscFlags = 0;
2534 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2535 Assert(SUCCEEDED(hr));
2536 }
2537
2538 if (SUCCEEDED(hr))
2539 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2540
2541 if (SUCCEEDED(hr))
2542 {
2543 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_CUBE;
2544 }
2545 }
2546 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_1D)
2547 {
2548 /*
2549 * 1D texture.
2550 */
2551 Assert(pSurface->cFaces == 1);
2552
2553 D3D11_TEXTURE1D_DESC td;
2554 RT_ZERO(td);
2555 td.Width = cWidth;
2556 td.MipLevels = numMipLevels;
2557 td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2558 td.Format = dxgiFormat;
2559 td.Usage = D3D11_USAGE_DEFAULT;
2560 td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2561 td.CPUAccessFlags = 0;
2562 td.MiscFlags = MiscFlags; /** @todo */
2563 if ( numMipLevels > 1
2564 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2565 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2566
2567 hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->u.pTexture1D);
2568 Assert(SUCCEEDED(hr));
2569 if (SUCCEEDED(hr))
2570 {
2571 /* Map-able texture. */
2572 td.Format = dxgiFormatTypeless;
2573 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2574 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2575 td.Usage = D3D11_USAGE_DYNAMIC;
2576 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2577 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2578 td.MiscFlags = 0;
2579 hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->dynamic.pTexture1D);
2580 Assert(SUCCEEDED(hr));
2581 }
2582
2583 if (SUCCEEDED(hr))
2584 {
2585 /* Staging texture. */
2586 td.Usage = D3D11_USAGE_STAGING;
2587 td.BindFlags = 0; /* No flags allowed. */
2588 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2589 td.MiscFlags = 0;
2590 hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->staging.pTexture1D);
2591 Assert(SUCCEEDED(hr));
2592 }
2593
2594 if (SUCCEEDED(hr))
2595 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2596
2597 if (SUCCEEDED(hr))
2598 {
2599 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_1D;
2600 }
2601 }
2602 else
2603 {
2604 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_VOLUME)
2605 {
2606 /*
2607 * Volume texture.
2608 */
2609 Assert(pSurface->cFaces == 1);
2610 Assert(pSurface->surfaceDesc.numArrayElements == 1);
2611
2612 D3D11_TEXTURE3D_DESC td;
2613 RT_ZERO(td);
2614 td.Width = cWidth;
2615 td.Height = cHeight;
2616 td.Depth = cDepth;
2617 td.MipLevels = numMipLevels;
2618 td.Format = dxgiFormat;
2619 td.Usage = D3D11_USAGE_DEFAULT;
2620 td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2621 td.CPUAccessFlags = 0; /** @todo */
2622 td.MiscFlags = MiscFlags; /** @todo */
2623 if ( numMipLevels > 1
2624 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2625 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2626
2627 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->u.pTexture3D);
2628 Assert(SUCCEEDED(hr));
2629 if (SUCCEEDED(hr))
2630 {
2631 /* Map-able texture. */
2632 td.Format = dxgiFormatTypeless;
2633 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2634 td.Usage = D3D11_USAGE_DYNAMIC;
2635 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2636 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2637 td.MiscFlags = 0;
2638 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->dynamic.pTexture3D);
2639 Assert(SUCCEEDED(hr));
2640 }
2641
2642 if (SUCCEEDED(hr))
2643 {
2644 /* Staging texture. */
2645 td.Usage = D3D11_USAGE_STAGING;
2646 td.BindFlags = 0; /* No flags allowed. */
2647 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2648 td.MiscFlags = 0;
2649 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->staging.pTexture3D);
2650 Assert(SUCCEEDED(hr));
2651 }
2652
2653 if (SUCCEEDED(hr))
2654 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2655
2656 if (SUCCEEDED(hr))
2657 {
2658 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
2659 }
2660 }
2661 else
2662 {
2663 /*
2664 * 2D texture.
2665 */
2666 Assert(cDepth == 1);
2667 Assert(pSurface->cFaces == 1);
2668
2669 D3D11_TEXTURE2D_DESC td;
2670 RT_ZERO(td);
2671 td.Width = cWidth;
2672 td.Height = cHeight;
2673 td.MipLevels = numMipLevels;
2674 td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2675 td.Format = dxgiFormat;
2676 td.SampleDesc.Count = 1;
2677 td.SampleDesc.Quality = 0;
2678 td.Usage = D3D11_USAGE_DEFAULT;
2679 td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2680 td.CPUAccessFlags = 0; /** @todo */
2681 td.MiscFlags = MiscFlags; /** @todo */
2682 if ( numMipLevels > 1
2683 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2684 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2685
2686 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2687 Assert(SUCCEEDED(hr));
2688 if (SUCCEEDED(hr))
2689 {
2690 /* Map-able texture. */
2691 td.Format = dxgiFormatTypeless;
2692 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2693 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2694 td.Usage = D3D11_USAGE_DYNAMIC;
2695 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2696 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2697 td.MiscFlags = 0;
2698 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2699 Assert(SUCCEEDED(hr));
2700 }
2701
2702 if (SUCCEEDED(hr))
2703 {
2704 /* Staging texture. */
2705 td.Usage = D3D11_USAGE_STAGING;
2706 td.BindFlags = 0; /* No flags allowed. */
2707 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2708 td.MiscFlags = 0;
2709 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2710 Assert(SUCCEEDED(hr));
2711 }
2712
2713 if (SUCCEEDED(hr))
2714 hr = dxInitSharedHandle(pBackend, pBackendSurface);
2715
2716 if (SUCCEEDED(hr))
2717 {
2718 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_2D;
2719 }
2720 }
2721 }
2722
2723 Assert(hr == S_OK);
2724
2725 RTMemFree(paInitialData);
2726
2727 if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
2728 {
2729 }
2730
2731 if (SUCCEEDED(hr))
2732 {
2733 /*
2734 * Success.
2735 */
2736 LogFunc(("sid = %u\n", pSurface->id));
2737 pBackendSurface->enmDxgiFormat = dxgiFormat;
2738 pSurface->pBackendSurface = pBackendSurface;
2739 if (p3dState->pBackend->fSingleDevice || RT_BOOL(MiscFlags & D3D11_RESOURCE_MISC_SHARED))
2740 pSurface->idAssociatedContext = DX_CID_BACKEND;
2741 else
2742 pSurface->idAssociatedContext = pDXContext->cid;
2743 return VINF_SUCCESS;
2744 }
2745
2746 D3D_RELEASE(pBackendSurface->staging.pResource);
2747 D3D_RELEASE(pBackendSurface->dynamic.pResource);
2748 D3D_RELEASE(pBackendSurface->u.pResource);
2749 RTMemFree(pBackendSurface);
2750 return VERR_NO_MEMORY;
2751}
2752
2753
2754static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2755{
2756 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2757 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2758
2759 /* Buffers should be created as such. */
2760 AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
2761 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
2762 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2763 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
2764 )), VERR_INVALID_PARAMETER);
2765
2766 if (pSurface->pBackendSurface != NULL)
2767 {
2768 AssertFailed(); /** @todo Should the function not be used like that? */
2769 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2770 }
2771
2772 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2773 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2774 AssertRCReturn(rc, rc);
2775
2776 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2777 rc = dxBackendSurfaceAlloc(&pBackendSurface);
2778 AssertRCReturn(rc, rc);
2779
2780 LogFunc(("sid = %u, size = %u\n", pSurface->id, pMipLevel->cbSurface));
2781
2782 /* Upload the current data, if any. */
2783 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2784 D3D11_SUBRESOURCE_DATA initialData;
2785 if (pMipLevel->pSurfaceData)
2786 {
2787 initialData.pSysMem = pMipLevel->pSurfaceData;
2788 initialData.SysMemPitch = pMipLevel->cbSurface;
2789 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2790
2791 pInitialData = &initialData;
2792 }
2793
2794 D3D11_BUFFER_DESC bd;
2795 RT_ZERO(bd);
2796 bd.ByteWidth = pMipLevel->cbSurface;
2797 bd.Usage = D3D11_USAGE_DEFAULT;
2798 bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2799
2800 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2801 if (SUCCEEDED(hr))
2802 {
2803 /*
2804 * Success.
2805 */
2806 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2807 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2808 pSurface->pBackendSurface = pBackendSurface;
2809 pSurface->idAssociatedContext = pDXContext->cid;
2810 return VINF_SUCCESS;
2811 }
2812
2813 /* Failure. */
2814 D3D_RELEASE(pBackendSurface->u.pBuffer);
2815 RTMemFree(pBackendSurface);
2816 return VERR_NO_MEMORY;
2817}
2818
2819
2820static int vmsvga3dBackSurfaceCreateSoBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2821{
2822 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2823 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2824
2825 /* Buffers should be created as such. */
2826 AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT), VERR_INVALID_PARAMETER);
2827
2828 if (pSurface->pBackendSurface != NULL)
2829 {
2830 AssertFailed(); /** @todo Should the function not be used like that? */
2831 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2832 }
2833
2834 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2835 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2836 AssertRCReturn(rc, rc);
2837
2838 D3D11_BUFFER_DESC bd;
2839 RT_ZERO(bd);
2840 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2841 bd.Usage = D3D11_USAGE_DEFAULT;
2842 bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2843 bd.CPUAccessFlags = 0; /// @todo ? D3D11_CPU_ACCESS_READ;
2844 bd.MiscFlags = 0;
2845 bd.StructureByteStride = 0;
2846
2847 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.pBuffer);
2848 if (SUCCEEDED(hr))
2849 {
2850 /*
2851 * Success.
2852 */
2853 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2854 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2855 pSurface->pBackendSurface = pBackendSurface;
2856 pSurface->idAssociatedContext = pDXContext->cid;
2857 return VINF_SUCCESS;
2858 }
2859
2860 /* Failure. */
2861 D3D_RELEASE(pBackendSurface->u.pBuffer);
2862 RTMemFree(pBackendSurface);
2863 return VERR_NO_MEMORY;
2864}
2865
2866#if 0
2867static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface, uint32_t offsetInBytes, uint32_t sizeInBytes)
2868{
2869 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2870 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2871
2872 /* Buffers should be created as such. */
2873 AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
2874
2875 if (pSurface->pBackendSurface != NULL)
2876 {
2877 AssertFailed(); /** @todo Should the function not be used like that? */
2878 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2879 }
2880
2881 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2882 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2883 AssertRCReturn(rc, rc);
2884
2885 ASSERT_GUEST_RETURN( offsetInBytes < pMipLevel->cbSurface
2886 && sizeInBytes <= pMipLevel->cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
2887
2888 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2889 rc = dxBackendSurfaceAlloc(&pBackendSurface);
2890 AssertRCReturn(rc, rc);
2891
2892 /* Upload the current data, if any. */
2893 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2894 D3D11_SUBRESOURCE_DATA initialData;
2895 if (pMipLevel->pSurfaceData)
2896 {
2897 initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
2898 initialData.SysMemPitch = pMipLevel->cbSurface;
2899 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2900
2901 pInitialData = &initialData;
2902
2903 // Log(("%.*Rhxd\n", sizeInBytes, initialData.pSysMem));
2904 }
2905
2906 D3D11_BUFFER_DESC bd;
2907 RT_ZERO(bd);
2908 bd.ByteWidth = sizeInBytes;
2909 bd.Usage = D3D11_USAGE_DYNAMIC;
2910 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
2911 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2912 bd.MiscFlags = 0;
2913 bd.StructureByteStride = 0;
2914
2915 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2916 if (SUCCEEDED(hr))
2917 {
2918 /*
2919 * Success.
2920 */
2921 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2922 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2923 pSurface->pBackendSurface = pBackendSurface;
2924 pSurface->idAssociatedContext = pDXContext->cid;
2925 return VINF_SUCCESS;
2926 }
2927
2928 /* Failure. */
2929 D3D_RELEASE(pBackendSurface->u.pBuffer);
2930 RTMemFree(pBackendSurface);
2931 return VERR_NO_MEMORY;
2932}
2933#endif
2934
2935static int vmsvga3dBackSurfaceCreateResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2936{
2937 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2938 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2939
2940 if (pSurface->pBackendSurface != NULL)
2941 {
2942 AssertFailed(); /** @todo Should the function not be used like that? */
2943 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2944 }
2945
2946 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2947 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2948 AssertRCReturn(rc, rc);
2949
2950 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2951 rc = dxBackendSurfaceAlloc(&pBackendSurface);
2952 AssertRCReturn(rc, rc);
2953
2954 HRESULT hr;
2955
2956 /*
2957 * Figure out the type of the surface.
2958 */
2959 if (pSurface->format == SVGA3D_BUFFER)
2960 {
2961 /* Upload the current data, if any. */
2962 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2963 D3D11_SUBRESOURCE_DATA initialData;
2964 if (pMipLevel->pSurfaceData)
2965 {
2966 initialData.pSysMem = pMipLevel->pSurfaceData;
2967 initialData.SysMemPitch = pMipLevel->cbSurface;
2968 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2969
2970 pInitialData = &initialData;
2971 }
2972
2973 D3D11_BUFFER_DESC bd;
2974 RT_ZERO(bd);
2975 bd.ByteWidth = pMipLevel->cbSurface;
2976
2977 if (pSurface->f.surfaceFlags & (SVGA3D_SURFACE_STAGING_UPLOAD | SVGA3D_SURFACE_STAGING_DOWNLOAD))
2978 bd.Usage = D3D11_USAGE_STAGING;
2979 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
2980 bd.Usage = D3D11_USAGE_DYNAMIC;
2981 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_STATIC)
2982 bd.Usage = pInitialData ? D3D11_USAGE_IMMUTABLE : D3D11_USAGE_DEFAULT; /* Guest will update later. */
2983 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE)
2984 bd.Usage = D3D11_USAGE_DEFAULT;
2985
2986 bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2987
2988 if (bd.Usage == D3D11_USAGE_STAGING)
2989 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE | D3D11_CPU_ACCESS_READ;
2990 else if (bd.Usage == D3D11_USAGE_DYNAMIC)
2991 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2992
2993 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_DRAWINDIRECT_ARGS)
2994 bd.MiscFlags |= D3D11_RESOURCE_MISC_DRAWINDIRECT_ARGS;
2995 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_RAW_VIEWS)
2996 bd.MiscFlags |= D3D11_RESOURCE_MISC_BUFFER_ALLOW_RAW_VIEWS;
2997 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BUFFER_STRUCTURED)
2998 bd.MiscFlags |= D3D11_RESOURCE_MISC_BUFFER_STRUCTURED;
2999 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_RESOURCE_CLAMP)
3000 bd.MiscFlags |= D3D11_RESOURCE_MISC_RESOURCE_CLAMP;
3001
3002 if (bd.MiscFlags & D3D11_RESOURCE_MISC_BUFFER_STRUCTURED)
3003 {
3004 SVGAOTableSurfaceEntry entrySurface;
3005 rc = vmsvgaR3OTableReadSurface(pThisCC->svga.pSvgaR3State, pSurface->id, &entrySurface);
3006 AssertRCReturn(rc, rc);
3007
3008 bd.StructureByteStride = entrySurface.bufferByteStride;
3009 }
3010
3011 hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3012 Assert(SUCCEEDED(hr));
3013 if (SUCCEEDED(hr))
3014 {
3015 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3016 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3017 }
3018 }
3019 else
3020 {
3021 /** @todo Texture. Currently vmsvga3dBackSurfaceCreateTexture is called for textures. */
3022 AssertFailed();
3023 hr = E_FAIL;
3024 }
3025
3026 if (SUCCEEDED(hr))
3027 {
3028 /*
3029 * Success.
3030 */
3031 pSurface->pBackendSurface = pBackendSurface;
3032 pSurface->idAssociatedContext = pDXContext->cid;
3033 return VINF_SUCCESS;
3034 }
3035
3036 /* Failure. */
3037 RTMemFree(pBackendSurface);
3038 return VERR_NO_MEMORY;
3039}
3040
3041
3042static int dxStagingBufferRealloc(DXDEVICE *pDXDevice, uint32_t cbRequiredSize)
3043{
3044 AssertReturn(cbRequiredSize < SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
3045
3046 if (RT_LIKELY(cbRequiredSize <= pDXDevice->cbStagingBuffer))
3047 return VINF_SUCCESS;
3048
3049 D3D_RELEASE(pDXDevice->pStagingBuffer);
3050
3051 uint32_t const cbAlloc = RT_ALIGN_32(cbRequiredSize, _64K);
3052
3053 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3054 D3D11_BUFFER_DESC bd;
3055 RT_ZERO(bd);
3056 bd.ByteWidth = cbAlloc;
3057 bd.Usage = D3D11_USAGE_STAGING;
3058 //bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
3059 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE | D3D11_CPU_ACCESS_READ;
3060
3061 int rc = VINF_SUCCESS;
3062 ID3D11Buffer *pBuffer;
3063 HRESULT hr = pDXDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
3064 if (SUCCEEDED(hr))
3065 {
3066 pDXDevice->pStagingBuffer = pBuffer;
3067 pDXDevice->cbStagingBuffer = cbAlloc;
3068 }
3069 else
3070 {
3071 pDXDevice->cbStagingBuffer = 0;
3072 rc = VERR_NO_MEMORY;
3073 }
3074
3075 return rc;
3076}
3077
3078
3079static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3080{
3081 RT_NOREF(pDevIns, pThis);
3082
3083 int rc;
3084#ifdef RT_OS_LINUX /** @todo Remove, this is currently needed for loading the X11 library in order to call XInitThreads(). */
3085 rc = glLdrInit(pDevIns);
3086 if (RT_FAILURE(rc))
3087 {
3088 LogRel(("VMSVGA3d: Error loading OpenGL library and resolving necessary functions: %Rrc\n", rc));
3089 return rc;
3090 }
3091#endif
3092
3093 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
3094 AssertReturn(pState, VERR_NO_MEMORY);
3095 pThisCC->svga.p3dState = pState;
3096
3097 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
3098 AssertReturn(pBackend, VERR_NO_MEMORY);
3099 pState->pBackend = pBackend;
3100
3101 rc = RTLdrLoadSystem(VBOX_D3D11_LIBRARY_NAME, /* fNoUnload = */ true, &pBackend->hD3D11);
3102 AssertRC(rc);
3103 if (RT_SUCCESS(rc))
3104 {
3105 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
3106 AssertRC(rc);
3107 }
3108
3109 if (RT_SUCCESS(rc))
3110 {
3111 /* Failure to load the shader disassembler is ignored. */
3112 int rc2 = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
3113 if (RT_SUCCESS(rc2))
3114 rc2 = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
3115 Log6Func(("Load D3DDisassemble: %Rrc\n", rc2));
3116 }
3117
3118#if !defined(RT_OS_WINDOWS) || defined(DX_FORCE_SINGLE_DEVICE)
3119 pBackend->fSingleDevice = true;
3120#endif
3121
3122 LogRelMax(1, ("VMSVGA: Single DX device mode: %s\n", pBackend->fSingleDevice ? "enabled" : "disabled"));
3123
3124//DEBUG_BREAKPOINT_TEST();
3125 return rc;
3126}
3127
3128
3129static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3130{
3131 RT_NOREF(pDevIns, pThis);
3132
3133 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3134 AssertReturn(pState, VERR_INVALID_STATE);
3135
3136 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3137 AssertReturn(pBackend, VERR_INVALID_STATE);
3138
3139 int rc = dxDeviceCreate(pBackend, &pBackend->dxDevice);
3140 if (RT_SUCCESS(rc))
3141 {
3142 IDXGIAdapter *pAdapter = NULL;
3143 HRESULT hr = pBackend->dxDevice.pDxgiFactory->EnumAdapters(0, &pAdapter);
3144 if (SUCCEEDED(hr))
3145 {
3146 DXGI_ADAPTER_DESC desc;
3147 hr = pAdapter->GetDesc(&desc);
3148 if (SUCCEEDED(hr))
3149 {
3150 char sz[RT_ELEMENTS(desc.Description)];
3151 for (unsigned i = 0; i < RT_ELEMENTS(desc.Description); ++i)
3152 sz[i] = (char)desc.Description[i];
3153 LogRelMax(1, ("VMSVGA: Adapter [%s]\n", sz));
3154 }
3155
3156 pAdapter->Release();
3157 }
3158 }
3159 return rc;
3160}
3161
3162
3163static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
3164{
3165 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3166 AssertReturn(pState, VERR_INVALID_STATE);
3167
3168 /** @todo This is generic code. Must be moved to in DevVGA-SVGA3d.cpp */
3169 /* Destroy all leftover surfaces. */
3170 for (uint32_t i = 0; i < pState->cSurfaces; i++)
3171 {
3172 if (pState->papSurfaces[i]->id != SVGA3D_INVALID_ID)
3173 vmsvga3dSurfaceDestroy(pThisCC, pState->papSurfaces[i]->id);
3174 }
3175
3176 /* Destroy all leftover DX contexts. */
3177 for (uint32_t i = 0; i < pState->cDXContexts; i++)
3178 {
3179 if (pState->papDXContexts[i]->cid != SVGA3D_INVALID_ID)
3180 vmsvga3dDXDestroyContext(pThisCC, pState->papDXContexts[i]->cid);
3181 }
3182
3183 return VINF_SUCCESS;
3184}
3185
3186
3187static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
3188{
3189 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3190 AssertReturn(pState, VERR_INVALID_STATE);
3191
3192 if (pState->pBackend)
3193 {
3194 /* Clean up backends. For example release resources from surfaces. */
3195 vmsvga3dBackReset(pThisCC);
3196
3197 dxDeviceDestroy(pState->pBackend, &pState->pBackend->dxDevice);
3198
3199 RTMemFree(pState->pBackend);
3200 pState->pBackend = NULL;
3201 }
3202
3203 return VINF_SUCCESS;
3204}
3205
3206
3207/** @todo Such structures must be in VBoxVideo3D.h */
3208typedef struct VBOX3DNOTIFYDEFINESCREEN
3209{
3210 VBOX3DNOTIFY Core;
3211 uint32_t cWidth;
3212 uint32_t cHeight;
3213 int32_t xRoot;
3214 int32_t yRoot;
3215 uint32_t fPrimary;
3216 uint32_t cDpi;
3217} VBOX3DNOTIFYDEFINESCREEN;
3218
3219
3220static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3221{
3222 VBOX3DNOTIFYDEFINESCREEN n;
3223 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
3224 n.Core.iDisplay = pScreen->idScreen;
3225 n.Core.u32Reserved = 0;
3226 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3227 RT_ZERO(n.Core.au8Data);
3228 n.cWidth = pScreen->cWidth;
3229 n.cHeight = pScreen->cHeight;
3230 n.xRoot = pScreen->xOrigin;
3231 n.yRoot = pScreen->yOrigin;
3232 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
3233 n.cDpi = pScreen->cDpi;
3234
3235 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3236}
3237
3238
3239static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3240{
3241 VBOX3DNOTIFY n;
3242 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
3243 n.iDisplay = pScreen->idScreen;
3244 n.u32Reserved = 0;
3245 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3246 RT_ZERO(n.au8Data);
3247
3248 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3249}
3250
3251
3252static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
3253{
3254 VBOX3DNOTIFY n;
3255 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
3256 n.iDisplay = pScreen->idScreen;
3257 n.u32Reserved = 0;
3258 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3259 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
3260
3261 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3262}
3263
3264
3265typedef struct VBOX3DNOTIFYUPDATE
3266{
3267 VBOX3DNOTIFY Core;
3268 uint32_t x;
3269 uint32_t y;
3270 uint32_t w;
3271 uint32_t h;
3272} VBOX3DNOTIFYUPDATE;
3273
3274
3275static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3276 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
3277{
3278 VBOX3DNOTIFYUPDATE n;
3279 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
3280 n.Core.iDisplay = pScreen->idScreen;
3281 n.Core.u32Reserved = 0;
3282 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3283 RT_ZERO(n.Core.au8Data);
3284 n.x = x;
3285 n.y = y;
3286 n.w = w;
3287 n.h = h;
3288
3289 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3290}
3291
3292static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
3293{
3294 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3295
3296 DXDEVICE *pDXDevice = &pBackend->dxDevice;
3297 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
3298
3299 D3D11_TEXTURE2D_DESC td;
3300 RT_ZERO(td);
3301 td.Width = cWidth;
3302 td.Height = cHeight;
3303 td.MipLevels = 1;
3304 td.ArraySize = 1;
3305 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
3306 td.SampleDesc.Count = 1;
3307 td.SampleDesc.Quality = 0;
3308 td.Usage = D3D11_USAGE_DEFAULT;
3309 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
3310 td.CPUAccessFlags = 0;
3311 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
3312
3313 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
3314 if (SUCCEEDED(hr))
3315 {
3316 /* Get the shared handle. */
3317 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
3318 if (SUCCEEDED(hr))
3319 {
3320 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
3321 if (SUCCEEDED(hr))
3322 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
3323 }
3324 }
3325
3326 if (SUCCEEDED(hr))
3327 return VINF_SUCCESS;
3328
3329 AssertFailed();
3330 return VERR_NOT_SUPPORTED;
3331}
3332
3333
3334static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
3335{
3336 RT_NOREF(pState);
3337 D3D_RELEASE(p->pDXGIKeyedMutex);
3338 D3D_RELEASE(p->pDxgiResource);
3339 D3D_RELEASE(p->pTexture);
3340 p->SharedHandle = 0;
3341 p->sidScreenTarget = SVGA_ID_INVALID;
3342}
3343
3344
3345static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3346{
3347 RT_NOREF(pThis, pThisCC, pScreen);
3348
3349 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
3350
3351 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3352 AssertReturn(pState, VERR_INVALID_STATE);
3353
3354 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3355 AssertReturn(pBackend, VERR_INVALID_STATE);
3356
3357 Assert(pScreen->pHwScreen == NULL);
3358
3359 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
3360 AssertPtrReturn(p, VERR_NO_MEMORY);
3361
3362 p->sidScreenTarget = SVGA_ID_INVALID;
3363
3364 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
3365 if (RT_SUCCESS(rc))
3366 {
3367 /* The frontend supports the screen. Create the actual resource. */
3368 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
3369 if (RT_SUCCESS(rc))
3370 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
3371 }
3372
3373 if (RT_SUCCESS(rc))
3374 {
3375 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
3376 pScreen->pHwScreen = p;
3377 }
3378 else
3379 {
3380 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
3381 vmsvga3dHwScreenDestroy(pState, p);
3382 RTMemFree(p);
3383 }
3384
3385 return rc;
3386}
3387
3388
3389static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3390{
3391 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3392 AssertReturn(pState, VERR_INVALID_STATE);
3393
3394 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
3395
3396 if (pScreen->pHwScreen)
3397 {
3398 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
3399 RTMemFree(pScreen->pHwScreen);
3400 pScreen->pHwScreen = NULL;
3401 }
3402
3403 return VINF_SUCCESS;
3404}
3405
3406
3407static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3408 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
3409 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
3410{
3411 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
3412
3413 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3414 AssertReturn(pState, VERR_INVALID_STATE);
3415
3416 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3417 AssertReturn(pBackend, VERR_INVALID_STATE);
3418
3419 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
3420 AssertReturn(p, VERR_NOT_SUPPORTED);
3421
3422 PVMSVGA3DSURFACE pSurface;
3423 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
3424 AssertRCReturn(rc, rc);
3425
3426 /** @todo Implement. */
3427 AssertFailed();
3428 return VERR_NOT_IMPLEMENTED;
3429}
3430
3431
3432static DECLCALLBACK(int) vmsvga3dBackSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
3433 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
3434{
3435 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3436 AssertReturn(pState, VERR_INVALID_STATE);
3437
3438 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3439 AssertReturn(pBackend, VERR_INVALID_STATE);
3440
3441 PVMSVGA3DSURFACE pSurface;
3442 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3443 AssertRCReturn(rc, rc);
3444
3445 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3446 AssertPtrReturn(pBackendSurface, VERR_INVALID_STATE);
3447
3448 PVMSVGA3DMIPMAPLEVEL pMipLevel;
3449 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3450 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3451
3452 /* A surface is always mapped by the DX context which has created the surface. */
3453 DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
3454 AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
3455
3456 SVGA3dBox clipBox;
3457 if (pBox)
3458 {
3459 clipBox = *pBox;
3460 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
3461 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
3462 }
3463 else
3464 {
3465 clipBox.x = 0;
3466 clipBox.y = 0;
3467 clipBox.z = 0;
3468 clipBox.w = pMipLevel->mipmapSize.width;
3469 clipBox.h = pMipLevel->mipmapSize.height;
3470 clipBox.d = pMipLevel->mipmapSize.depth;
3471 }
3472
3473 D3D11_MAP d3d11MapType;
3474 switch (enmMapType)
3475 {
3476 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
3477 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
3478 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
3479 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
3480 default:
3481 AssertFailed();
3482 return VERR_INVALID_PARAMETER;
3483 }
3484
3485 D3D11_MAPPED_SUBRESOURCE mappedResource;
3486 RT_ZERO(mappedResource);
3487
3488 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3489 {
3490 Assert(pImage->face == 0 && pImage->mipmap == 0);
3491
3492 /* Wait for the surface to finish drawing. */
3493 dxSurfaceWait(pState, pSurface, pSurface->idAssociatedContext);
3494
3495 ID3D11Texture2D *pMappedTexture;
3496 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3497 {
3498 pMappedTexture = pBackendSurface->staging.pTexture2D;
3499
3500 /* Copy the texture content to the staging texture. */
3501 pDevice->pImmediateContext->CopyResource(pBackendSurface->staging.pTexture2D, pBackendSurface->u.pTexture2D);
3502 }
3503 else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3504 pMappedTexture = pBackendSurface->staging.pTexture2D;
3505 else
3506 pMappedTexture = pBackendSurface->dynamic.pTexture2D;
3507
3508 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
3509 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
3510 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3511 if (SUCCEEDED(hr))
3512 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3513 mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3514 else
3515 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3516 }
3517 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3518 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3519 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3520 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3521 {
3522 dxSurfaceWait(pState, pSurface, pSurface->idAssociatedContext);
3523
3524 ID3D11Resource *pMappedResource;
3525 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3526 {
3527 pMappedResource = pBackendSurface->staging.pResource;
3528
3529 /* Copy the texture content to the staging texture.
3530 * The requested miplevel of the texture is copied to the miplevel 0 of the staging texture,
3531 * because the staging (and dynamic) structures do not have miplevels.
3532 * Always copy entire miplevel so all Dst are zero and pSrcBox is NULL, as D3D11 requires.
3533 */
3534 ID3D11Resource *pDstResource = pMappedResource;
3535 UINT DstSubresource = 0;
3536 UINT DstX = 0;
3537 UINT DstY = 0;
3538 UINT DstZ = 0;
3539 ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3540 UINT SrcSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3541 D3D11_BOX *pSrcBox = NULL;
3542 //D3D11_BOX SrcBox;
3543 //SrcBox.left = 0;
3544 //SrcBox.top = 0;
3545 //SrcBox.front = 0;
3546 //SrcBox.right = pMipLevel->mipmapSize.width;
3547 //SrcBox.bottom = pMipLevel->mipmapSize.height;
3548 //SrcBox.back = pMipLevel->mipmapSize.depth;
3549 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3550 pSrcResource, SrcSubresource, pSrcBox);
3551 }
3552 else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3553 pMappedResource = pBackendSurface->staging.pResource;
3554 else
3555 pMappedResource = pBackendSurface->dynamic.pResource;
3556
3557 UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3558 HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3559 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3560 if (SUCCEEDED(hr))
3561 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3562 mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3563 else
3564 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3565 }
3566 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3567 {
3568 /* Map the staging buffer. */
3569 rc = dxStagingBufferRealloc(pDevice, pMipLevel->cbSurface);
3570 if (RT_SUCCESS(rc))
3571 {
3572 /* The staging buffer does not allow D3D11_MAP_WRITE_DISCARD, so replace it. */
3573 if (d3d11MapType == D3D11_MAP_WRITE_DISCARD)
3574 d3d11MapType = D3D11_MAP_WRITE;
3575
3576 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3577 {
3578 /* Copy from the buffer to the staging buffer. */
3579 ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
3580 UINT DstSubresource = 0;
3581 UINT DstX = clipBox.x;
3582 UINT DstY = clipBox.y;
3583 UINT DstZ = clipBox.z;
3584 ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3585 UINT SrcSubresource = 0;
3586 D3D11_BOX SrcBox;
3587 SrcBox.left = clipBox.x;
3588 SrcBox.top = clipBox.y;
3589 SrcBox.front = clipBox.z;
3590 SrcBox.right = clipBox.w;
3591 SrcBox.bottom = clipBox.h;
3592 SrcBox.back = clipBox.d;
3593 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3594 pSrcResource, SrcSubresource, &SrcBox);
3595 }
3596
3597 UINT const Subresource = 0; /* Buffers have only one subresource. */
3598 HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
3599 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3600 if (SUCCEEDED(hr))
3601 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3602 mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3603 else
3604 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3605 }
3606 }
3607 else
3608 {
3609 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
3610 /** @todo Implement. */
3611 AssertFailed();
3612 rc = VERR_NOT_IMPLEMENTED;
3613 }
3614
3615 return rc;
3616}
3617
3618
3619static DECLCALLBACK(int) vmsvga3dBackSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
3620{
3621 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3622 AssertReturn(pState, VERR_INVALID_STATE);
3623
3624 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3625 AssertReturn(pBackend, VERR_INVALID_STATE);
3626
3627 PVMSVGA3DSURFACE pSurface;
3628 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3629 AssertRCReturn(rc, rc);
3630
3631 /* The called should not use the function for system memory surfaces. */
3632 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3633 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3634
3635 PVMSVGA3DMIPMAPLEVEL pMipLevel;
3636 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3637 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3638
3639 /* A surface is always mapped by the DX context which has created the surface. */
3640 DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
3641 AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
3642
3643 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3644 {
3645 ID3D11Texture2D *pMappedTexture;
3646 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3647 pMappedTexture = pBackendSurface->staging.pTexture2D;
3648 else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3649 pMappedTexture = pBackendSurface->staging.pTexture2D;
3650 else
3651 pMappedTexture = pBackendSurface->dynamic.pTexture2D;
3652
3653 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
3654 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
3655
3656 if ( fWritten
3657 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3658 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3659 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3660 {
3661 ID3D11Resource *pDstResource = pBackendSurface->u.pTexture2D;
3662 UINT DstSubresource = Subresource;
3663 UINT DstX = pMap->box.x;
3664 UINT DstY = pMap->box.y;
3665 UINT DstZ = pMap->box.z;
3666 ID3D11Resource *pSrcResource = pMappedTexture;
3667 UINT SrcSubresource = Subresource;
3668 D3D11_BOX SrcBox;
3669 SrcBox.left = pMap->box.x;
3670 SrcBox.top = pMap->box.y;
3671 SrcBox.front = pMap->box.z;
3672 SrcBox.right = pMap->box.x + pMap->box.w;
3673 SrcBox.bottom = pMap->box.y + pMap->box.h;
3674 SrcBox.back = pMap->box.z + pMap->box.d;
3675
3676 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3677 pSrcResource, SrcSubresource, &SrcBox);
3678
3679 pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
3680 }
3681 }
3682 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3683 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3684 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3685 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3686 {
3687 ID3D11Resource *pMappedResource;
3688 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3689 pMappedResource = pBackendSurface->staging.pResource;
3690 else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3691 pMappedResource = pBackendSurface->staging.pResource;
3692 else
3693 pMappedResource = pBackendSurface->dynamic.pResource;
3694
3695 UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3696 pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3697
3698 if ( fWritten
3699 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3700 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3701 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3702 {
3703 /* If entire resource must be copied then use pSrcBox = NULL and dst point (0,0,0)
3704 * Because DX11 insists on this for some resource types, for example DEPTH_STENCIL resources.
3705 */
3706 uint32_t const cWidth0 = pSurface->paMipmapLevels[0].mipmapSize.width;
3707 uint32_t const cHeight0 = pSurface->paMipmapLevels[0].mipmapSize.height;
3708 uint32_t const cDepth0 = pSurface->paMipmapLevels[0].mipmapSize.depth;
3709 /** @todo Entire subresource is always mapped. So find a way to copy it back, important for DEPTH_STENCIL mipmaps. */
3710 bool const fEntireResource = pMap->box.x == 0 && pMap->box.y == 0 && pMap->box.z == 0
3711 && pMap->box.w == cWidth0 && pMap->box.h == cHeight0 && pMap->box.d == cDepth0;
3712
3713 ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3714 UINT DstSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3715 UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3716 UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3717 UINT DstZ = pMap->box.z;
3718 ID3D11Resource *pSrcResource = pMappedResource;
3719 UINT SrcSubresource = Subresource;
3720 D3D11_BOX *pSrcBox;
3721 D3D11_BOX SrcBox;
3722 if (fEntireResource)
3723 pSrcBox = NULL;
3724 else
3725 {
3726 uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3727 uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3728
3729 SrcBox.left = DstX;
3730 SrcBox.top = DstY;
3731 SrcBox.front = DstZ;
3732 SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3733 SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3734 SrcBox.back = DstZ + pMap->box.d;
3735 pSrcBox = &SrcBox;
3736 }
3737
3738 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3739 pSrcResource, SrcSubresource, pSrcBox);
3740
3741 pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
3742 }
3743 }
3744 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3745 {
3746 /* Unmap the staging buffer. */
3747 UINT const Subresource = 0; /* Buffers have only one subresource. */
3748 pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
3749
3750 /* Copy from the staging buffer to the actual buffer */
3751 if ( fWritten
3752 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3753 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3754 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3755 {
3756 ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3757 UINT DstSubresource = 0;
3758 UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3759 UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3760 UINT DstZ = pMap->box.z;
3761 ID3D11Resource *pSrcResource = pDevice->pStagingBuffer;
3762 UINT SrcSubresource = 0;
3763 D3D11_BOX SrcBox;
3764
3765 uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3766 uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3767
3768 SrcBox.left = DstX;
3769 SrcBox.top = DstY;
3770 SrcBox.front = DstZ;
3771 SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3772 SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3773 SrcBox.back = DstZ + pMap->box.d;
3774
3775 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3776 pSrcResource, SrcSubresource, &SrcBox);
3777 }
3778 }
3779 else
3780 {
3781 AssertFailed();
3782 rc = VERR_NOT_IMPLEMENTED;
3783 }
3784
3785 return rc;
3786}
3787
3788
3789static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
3790{
3791 int rc = VINF_SUCCESS;
3792
3793 PVMSVGA3DSURFACE pSurface;
3794 if (sid != SVGA_ID_INVALID)
3795 {
3796 /* Create the surface if does not yet exist. */
3797 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3798 AssertReturn(pState, VERR_INVALID_STATE);
3799
3800 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
3801 AssertRCReturn(rc, rc);
3802
3803 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
3804 {
3805 /* Create the actual texture. */
3806 rc = vmsvga3dBackSurfaceCreateScreenTarget(pThisCC, pSurface);
3807 AssertRCReturn(rc, rc);
3808 }
3809 }
3810 else
3811 pSurface = NULL;
3812
3813 /* Notify the HW accelerated screen if it is used. */
3814 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3815 if (!pHwScreen)
3816 return VINF_SUCCESS;
3817
3818 /* Same surface -> do nothing. */
3819 if (pHwScreen->sidScreenTarget == sid)
3820 return VINF_SUCCESS;
3821
3822 if (sid != SVGA_ID_INVALID)
3823 {
3824 AssertReturn( pSurface->pBackendSurface
3825 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
3826
3827 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
3828 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
3829 }
3830
3831 if (RT_SUCCESS(rc))
3832 {
3833 pHwScreen->sidScreenTarget = sid;
3834 }
3835
3836 return rc;
3837}
3838
3839
3840static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
3841{
3842 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3843 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
3844
3845 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
3846 return VINF_SUCCESS; /* No surface bound. */
3847
3848 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3849 AssertReturn(pState, VERR_INVALID_STATE);
3850
3851 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3852 AssertReturn(pBackend, VERR_INVALID_STATE);
3853
3854 PVMSVGA3DSURFACE pSurface;
3855 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
3856 AssertRCReturn(rc, rc);
3857
3858 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3859 AssertReturn(pBackendSurface && pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
3860
3861 SVGA3dRect boundRect;
3862 boundRect.x = 0;
3863 boundRect.y = 0;
3864 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
3865 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
3866 SVGA3dRect clipRect = *pRect;
3867 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
3868 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
3869
3870 /* Wait for the surface to finish drawing. */
3871 dxSurfaceWait(pState, pSurface, DX_CID_BACKEND);
3872
3873 /* Copy the screen texture to the shared surface. */
3874 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
3875 if (result == S_OK)
3876 {
3877 pBackend->dxDevice.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.pTexture2D);
3878
3879 dxDeviceFlush(&pBackend->dxDevice);
3880
3881 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
3882 }
3883 else
3884 AssertFailed();
3885
3886 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
3887 return rc;
3888}
3889
3890
3891/*
3892 *
3893 * 3D interface.
3894 *
3895 */
3896
3897static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
3898{
3899 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3900 AssertReturn(pState, VERR_INVALID_STATE);
3901
3902 int rc = VINF_SUCCESS;
3903
3904 *pu32Val = 0;
3905
3906 if (idx3dCaps > SVGA3D_DEVCAP_MAX)
3907 {
3908 LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
3909 return VERR_NOT_SUPPORTED;
3910 }
3911
3912 D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->dxDevice.FeatureLevel;
3913
3914 /* Most values are taken from:
3915 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
3916 *
3917 * Shader values are from
3918 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
3919 */
3920
3921 switch (idx3dCaps)
3922 {
3923 case SVGA3D_DEVCAP_3D:
3924 *pu32Val = 1;
3925 break;
3926
3927 case SVGA3D_DEVCAP_MAX_LIGHTS:
3928 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
3929 break;
3930
3931 case SVGA3D_DEVCAP_MAX_TEXTURES:
3932 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
3933 break;
3934
3935 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
3936 *pu32Val = SVGA3D_NUM_CLIPPLANES;
3937 break;
3938
3939 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
3940 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3941 *pu32Val = SVGA3DVSVERSION_40;
3942 else
3943 *pu32Val = SVGA3DVSVERSION_30;
3944 break;
3945
3946 case SVGA3D_DEVCAP_VERTEX_SHADER:
3947 *pu32Val = 1;
3948 break;
3949
3950 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
3951 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3952 *pu32Val = SVGA3DPSVERSION_40;
3953 else
3954 *pu32Val = SVGA3DPSVERSION_30;
3955 break;
3956
3957 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
3958 *pu32Val = 1;
3959 break;
3960
3961 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
3962 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3963 *pu32Val = 8;
3964 else
3965 *pu32Val = 4;
3966 break;
3967
3968 case SVGA3D_DEVCAP_S23E8_TEXTURES:
3969 case SVGA3D_DEVCAP_S10E5_TEXTURES:
3970 /* Must be obsolete by now; surface format caps specify the same thing. */
3971 break;
3972
3973 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
3974 /* Obsolete */
3975 break;
3976
3977 /*
3978 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
3979 * return TRUE. Even on physical hardware that does not support
3980 * these formats natively, the SVGA3D device will provide an emulation
3981 * which should be invisible to the guest OS.
3982 */
3983 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
3984 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
3985 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
3986 *pu32Val = 1;
3987 break;
3988
3989 case SVGA3D_DEVCAP_QUERY_TYPES:
3990 /* Obsolete */
3991 break;
3992
3993 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
3994 /* Obsolete */
3995 break;
3996
3997 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
3998 AssertCompile(sizeof(uint32_t) == sizeof(float));
3999 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
4000 break;
4001
4002 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
4003 /* Obsolete */
4004 break;
4005
4006 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
4007 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
4008 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4009 *pu32Val = 16384;
4010 else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4011 *pu32Val = 8192;
4012 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4013 *pu32Val = 4096;
4014 else
4015 *pu32Val = 2048;
4016 break;
4017
4018 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
4019 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4020 *pu32Val = 2048;
4021 else
4022 *pu32Val = 256;
4023 break;
4024
4025 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
4026 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4027 *pu32Val = 16384;
4028 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4029 *pu32Val = 8192;
4030 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4031 *pu32Val = 2048;
4032 else
4033 *pu32Val = 128;
4034 break;
4035
4036 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
4037 /* Obsolete */
4038 break;
4039
4040 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
4041 if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4042 *pu32Val = D3D11_REQ_MAXANISOTROPY;
4043 else
4044 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
4045 break;
4046
4047 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
4048 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4049 *pu32Val = UINT32_MAX;
4050 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4051 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
4052 else
4053 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
4054 break;
4055
4056 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
4057 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4058 *pu32Val = UINT32_MAX;
4059 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4060 *pu32Val = 1048575;
4061 else
4062 *pu32Val = 65534;
4063 break;
4064
4065 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
4066 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4067 *pu32Val = UINT32_MAX;
4068 else
4069 *pu32Val = 512;
4070 break;
4071
4072 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
4073 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4074 *pu32Val = UINT32_MAX;
4075 else
4076 *pu32Val = 512;
4077 break;
4078
4079 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
4080 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4081 *pu32Val = 4096;
4082 else
4083 *pu32Val = 32;
4084 break;
4085
4086 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
4087 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4088 *pu32Val = 4096;
4089 else
4090 *pu32Val = 32;
4091 break;
4092
4093 case SVGA3D_DEVCAP_TEXTURE_OPS:
4094 /* Obsolete */
4095 break;
4096
4097 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
4098 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
4099 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
4100 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
4101 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
4102 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
4103 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
4104 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
4105 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
4106 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
4107 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
4108 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
4109 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
4110 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
4111 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
4112 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
4113 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
4114 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
4115 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
4116 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
4117 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
4118 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
4119 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
4120 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
4121 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
4122 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
4123 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
4124 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
4125 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
4126 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
4127 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
4128 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
4129 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
4130 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
4131 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
4132 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
4133 case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
4134 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
4135 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
4136 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
4137 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
4138 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
4139 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
4140 {
4141 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
4142 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
4143 break;
4144 }
4145
4146 case SVGA3D_DEVCAP_MISSING62:
4147 /* Unused */
4148 break;
4149
4150 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
4151 /* Obsolete */
4152 break;
4153
4154 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
4155 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4156 *pu32Val = 8;
4157 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4158 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
4159 else
4160 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
4161 break;
4162
4163 case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
4164 case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
4165 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
4166 break;
4167
4168 case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
4169 /* Obsolete */
4170 break;
4171
4172 case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
4173 /* Obsolete */
4174 break;
4175
4176 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
4177 *pu32Val = 1;
4178 break;
4179
4180 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
4181 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
4182 break;
4183
4184 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
4185 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
4186 break;
4187
4188 case SVGA3D_DEVCAP_DEAD1:
4189 /* Obsolete */
4190 break;
4191
4192 case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
4193 /* Obsolete */
4194 break;
4195
4196 case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
4197 /* Obsolete */
4198 break;
4199
4200 case SVGA3D_DEVCAP_LINE_AA:
4201 *pu32Val = 1;
4202 break;
4203
4204 case SVGA3D_DEVCAP_LINE_STIPPLE:
4205 *pu32Val = 0; /* DX11 does not seem to support this directly. */
4206 break;
4207
4208 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
4209 AssertCompile(sizeof(uint32_t) == sizeof(float));
4210 *(float *)pu32Val = 1.0f;
4211 break;
4212
4213 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
4214 AssertCompile(sizeof(uint32_t) == sizeof(float));
4215 *(float *)pu32Val = 1.0f;
4216 break;
4217
4218 case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
4219 /* Deprecated. */
4220 AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
4221 break;
4222
4223 case SVGA3D_DEVCAP_TS_COLOR_KEY:
4224 *pu32Val = 0; /* DX11 does not seem to support this directly. */
4225 break;
4226
4227 case SVGA3D_DEVCAP_DEAD2:
4228 break;
4229
4230 case SVGA3D_DEVCAP_DXCONTEXT:
4231 *pu32Val = 1;
4232 break;
4233
4234 case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
4235 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
4236 break;
4237
4238 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
4239 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
4240 break;
4241
4242 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
4243 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
4244 break;
4245
4246 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
4247 *pu32Val = 0; /* boolean */
4248 break;
4249
4250 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
4251 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
4252 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
4253 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
4254 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
4255 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
4256 case SVGA3D_DEVCAP_DXFMT_Z_D32:
4257 case SVGA3D_DEVCAP_DXFMT_Z_D16:
4258 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
4259 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
4260 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
4261 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
4262 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
4263 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
4264 case SVGA3D_DEVCAP_DXFMT_DXT1:
4265 case SVGA3D_DEVCAP_DXFMT_DXT2:
4266 case SVGA3D_DEVCAP_DXFMT_DXT3:
4267 case SVGA3D_DEVCAP_DXFMT_DXT4:
4268 case SVGA3D_DEVCAP_DXFMT_DXT5:
4269 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
4270 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
4271 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
4272 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
4273 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
4274 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
4275 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
4276 case SVGA3D_DEVCAP_DXFMT_V8U8:
4277 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
4278 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
4279 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
4280 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
4281 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
4282 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
4283 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
4284 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
4285 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
4286 case SVGA3D_DEVCAP_DXFMT_BUFFER:
4287 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
4288 case SVGA3D_DEVCAP_DXFMT_V16U16:
4289 case SVGA3D_DEVCAP_DXFMT_G16R16:
4290 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
4291 case SVGA3D_DEVCAP_DXFMT_UYVY:
4292 case SVGA3D_DEVCAP_DXFMT_YUY2:
4293 case SVGA3D_DEVCAP_DXFMT_NV12:
4294 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
4295 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
4296 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
4297 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
4298 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
4299 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
4300 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
4301 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
4302 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
4303 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
4304 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
4305 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
4306 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
4307 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
4308 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
4309 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
4310 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
4311 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
4312 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
4313 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
4314 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
4315 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
4316 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
4317 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
4318 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
4319 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
4320 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
4321 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
4322 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
4323 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
4324 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
4325 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
4326 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
4327 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
4328 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
4329 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
4330 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
4331 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
4332 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
4333 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
4334 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
4335 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
4336 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
4337 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
4338 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
4339 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
4340 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
4341 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
4342 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
4343 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
4344 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
4345 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
4346 case SVGA3D_DEVCAP_DXFMT_P8:
4347 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
4348 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
4349 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
4350 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
4351 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
4352 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
4353 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
4354 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
4355 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
4356 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
4357 case SVGA3D_DEVCAP_DXFMT_ATI1:
4358 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
4359 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
4360 case SVGA3D_DEVCAP_DXFMT_ATI2:
4361 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
4362 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
4363 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
4364 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
4365 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
4366 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
4367 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
4368 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
4369 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
4370 case SVGA3D_DEVCAP_DXFMT_YV12:
4371 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
4372 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
4373 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
4374 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
4375 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
4376 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
4377 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
4378 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
4379 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
4380 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
4381 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
4382 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
4383 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
4384 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
4385 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
4386 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
4387 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
4388 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
4389 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
4390 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
4391 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
4392 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
4393 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
4394 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
4395 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
4396 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
4397 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
4398 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
4399 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
4400 {
4401 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
4402 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
4403 break;
4404 }
4405
4406 case SVGA3D_DEVCAP_SM41:
4407 *pu32Val = 0; /* boolean */
4408 break;
4409
4410 case SVGA3D_DEVCAP_MULTISAMPLE_2X:
4411 *pu32Val = 0; /* boolean */
4412 break;
4413
4414 case SVGA3D_DEVCAP_MULTISAMPLE_4X:
4415 *pu32Val = 0; /* boolean */
4416 break;
4417
4418 case SVGA3D_DEVCAP_MS_FULL_QUALITY:
4419 *pu32Val = 0; /* boolean */
4420 break;
4421
4422 case SVGA3D_DEVCAP_LOGICOPS:
4423 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
4424 *pu32Val = 0; /* boolean */
4425 break;
4426
4427 case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
4428 *pu32Val = 0; /* boolean */
4429 break;
4430
4431 case SVGA3D_DEVCAP_RESERVED_1:
4432 break;
4433
4434 case SVGA3D_DEVCAP_RESERVED_2:
4435 break;
4436
4437 case SVGA3D_DEVCAP_SM5:
4438 *pu32Val = 0; /* boolean */
4439 break;
4440
4441 case SVGA3D_DEVCAP_MULTISAMPLE_8X:
4442 *pu32Val = 0; /* boolean */
4443 break;
4444
4445 case SVGA3D_DEVCAP_MAX:
4446 case SVGA3D_DEVCAP_INVALID:
4447 rc = VERR_NOT_SUPPORTED;
4448 break;
4449 }
4450
4451 return rc;
4452}
4453
4454
4455static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
4456{
4457 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4458 AssertReturn(pState, VERR_INVALID_STATE);
4459
4460 return VINF_SUCCESS;
4461}
4462
4463
4464static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
4465 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
4466{
4467 RT_NOREF(cCopyBoxes, pBox);
4468
4469 LogFunc(("src sid %d -> dst sid %d\n", src.sid, dest.sid));
4470
4471 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4472 AssertReturn(pState, VERR_INVALID_STATE);
4473
4474 PVMSVGA3DBACKEND pBackend = pState->pBackend;
4475
4476 PVMSVGA3DSURFACE pSrcSurface;
4477 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, src.sid, &pSrcSurface);
4478 AssertRCReturn(rc, rc);
4479
4480 PVMSVGA3DSURFACE pDstSurface;
4481 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dest.sid, &pDstSurface);
4482 AssertRCReturn(rc, rc);
4483
4484 LogFunc(("src%s cid %d -> dst%s cid %d\n",
4485 pSrcSurface->pBackendSurface ? "" : " sysmem",
4486 pSrcSurface ? pSrcSurface->idAssociatedContext : SVGA_ID_INVALID,
4487 pDstSurface->pBackendSurface ? "" : " sysmem",
4488 pDstSurface ? pDstSurface->idAssociatedContext : SVGA_ID_INVALID));
4489
4490 //DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
4491 //AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4492
4493 if (pSrcSurface->pBackendSurface)
4494 {
4495 if (pDstSurface->pBackendSurface == NULL)
4496 {
4497 /* Create the target if it can be used as a device context shared resource (render or screen target). */
4498 if (pBackend->fSingleDevice || dxIsSurfaceShareable(pDstSurface))
4499 {
4500 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, NULL, pDstSurface);
4501 AssertRCReturn(rc, rc);
4502 }
4503 }
4504
4505 if (pDstSurface->pBackendSurface)
4506 {
4507 /* Surface -> Surface. */
4508 /* Expect both of them to be shared surfaces created by the backend context. */
4509 Assert(pSrcSurface->idAssociatedContext == DX_CID_BACKEND && pDstSurface->idAssociatedContext == DX_CID_BACKEND);
4510
4511 /* Wait for the source surface to finish drawing. */
4512 dxSurfaceWait(pState, pSrcSurface, DX_CID_BACKEND);
4513
4514 DXDEVICE *pDXDevice = &pBackend->dxDevice;
4515
4516 /* Clip the box. */
4517 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
4518 rc = vmsvga3dMipmapLevel(pSrcSurface, src.face, src.mipmap, &pSrcMipLevel);
4519 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4520
4521 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
4522 rc = vmsvga3dMipmapLevel(pDstSurface, dest.face, dest.mipmap, &pDstMipLevel);
4523 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4524
4525 SVGA3dCopyBox clipBox = *pBox;
4526 vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
4527
4528 UINT DstSubresource = vmsvga3dCalcSubresource(dest.mipmap, dest.face, pDstSurface->cLevels);
4529 UINT DstX = clipBox.x;
4530 UINT DstY = clipBox.y;
4531 UINT DstZ = clipBox.z;
4532
4533 UINT SrcSubresource = vmsvga3dCalcSubresource(src.mipmap, src.face, pSrcSurface->cLevels);
4534 D3D11_BOX SrcBox;
4535 SrcBox.left = clipBox.srcx;
4536 SrcBox.top = clipBox.srcy;
4537 SrcBox.front = clipBox.srcz;
4538 SrcBox.right = clipBox.srcx + clipBox.w;
4539 SrcBox.bottom = clipBox.srcy + clipBox.h;
4540 SrcBox.back = clipBox.srcz + clipBox.d;
4541
4542 Assert(cCopyBoxes == 1); /** @todo */
4543
4544 ID3D11Resource *pDstResource;
4545 ID3D11Resource *pSrcResource;
4546 pDstResource = dxResource(pState, pDstSurface, NULL);
4547 pSrcResource = dxResource(pState, pSrcSurface, NULL);
4548
4549 pDXDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4550 pSrcResource, SrcSubresource, &SrcBox);
4551
4552 pDstSurface->pBackendSurface->cidDrawing = DX_CID_BACKEND;
4553 }
4554 else
4555 {
4556 /* Surface -> Memory. */
4557 AssertFailed(); /** @todo implement */
4558 }
4559 }
4560 else
4561 {
4562 /* Memory -> Surface. */
4563 AssertFailed(); /** @todo implement */
4564 }
4565
4566 return rc;
4567}
4568
4569
4570static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
4571{
4572 RT_NOREF(pThisCC, idScreen, pOldViewport);
4573 /** @todo Scroll the screen content without requiring the guest to redraw. */
4574}
4575
4576
4577static DECLCALLBACK(int) vmsvga3dBackSurfaceUpdateHeapBuffers(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
4578{
4579 /** @todo */
4580 RT_NOREF(pThisCC, pSurface);
4581 return VERR_NOT_IMPLEMENTED;
4582}
4583
4584
4585#if 0 /*unused*/
4586/**
4587 * Create a new 3d context
4588 *
4589 * @returns VBox status code.
4590 * @param pThisCC The VGA/VMSVGA state for ring-3.
4591 * @param cid Context id
4592 */
4593static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
4594{
4595 RT_NOREF(cid);
4596
4597 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4598 AssertReturn(pState, VERR_INVALID_STATE);
4599
4600 AssertFailed();
4601 return VERR_NOT_IMPLEMENTED;
4602}
4603
4604
4605/**
4606 * Destroy an existing 3d context
4607 *
4608 * @returns VBox status code.
4609 * @param pThisCC The VGA/VMSVGA state for ring-3.
4610 * @param cid Context id
4611 */
4612static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
4613{
4614 RT_NOREF(cid);
4615
4616 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4617 AssertReturn(pState, VERR_INVALID_STATE);
4618
4619 AssertFailed();
4620 return VINF_SUCCESS;
4621}
4622
4623
4624static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
4625{
4626 RT_NOREF(cid, type, matrix);
4627
4628 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4629 AssertReturn(pState, VERR_INVALID_STATE);
4630
4631 AssertFailed();
4632 return VINF_SUCCESS;
4633}
4634
4635
4636static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
4637{
4638 RT_NOREF(cid, zRange);
4639
4640 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4641 AssertReturn(pState, VERR_INVALID_STATE);
4642
4643 AssertFailed();
4644 return VINF_SUCCESS;
4645}
4646
4647
4648static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
4649{
4650 RT_NOREF(cid, cRenderStates, pRenderState);
4651
4652 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4653 AssertReturn(pState, VERR_INVALID_STATE);
4654
4655 AssertFailed();
4656 return VINF_SUCCESS;
4657}
4658
4659
4660static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
4661{
4662 RT_NOREF(cid, type, target);
4663
4664 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4665 AssertReturn(pState, VERR_INVALID_STATE);
4666
4667 AssertFailed();
4668 return VINF_SUCCESS;
4669}
4670
4671
4672static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
4673{
4674 RT_NOREF(cid, cTextureStates, pTextureState);
4675
4676 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4677 AssertReturn(pState, VERR_INVALID_STATE);
4678
4679 AssertFailed();
4680 return VINF_SUCCESS;
4681}
4682
4683
4684static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
4685{
4686 RT_NOREF(cid, face, pMaterial);
4687
4688 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4689 AssertReturn(pState, VERR_INVALID_STATE);
4690
4691 AssertFailed();
4692 return VINF_SUCCESS;
4693}
4694
4695
4696static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
4697{
4698 RT_NOREF(cid, index, pData);
4699
4700 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4701 AssertReturn(pState, VERR_INVALID_STATE);
4702
4703 AssertFailed();
4704 return VINF_SUCCESS;
4705}
4706
4707
4708static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
4709{
4710 RT_NOREF(cid, index, enabled);
4711
4712 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4713 AssertReturn(pState, VERR_INVALID_STATE);
4714
4715 AssertFailed();
4716 return VINF_SUCCESS;
4717}
4718
4719
4720static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4721{
4722 RT_NOREF(cid, pRect);
4723
4724 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4725 AssertReturn(pState, VERR_INVALID_STATE);
4726
4727 AssertFailed();
4728 return VINF_SUCCESS;
4729}
4730
4731
4732static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
4733{
4734 RT_NOREF(cid, index, plane);
4735
4736 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4737 AssertReturn(pState, VERR_INVALID_STATE);
4738
4739 AssertFailed();
4740 return VINF_SUCCESS;
4741}
4742
4743
4744static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
4745 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
4746{
4747 /* From SVGA3D_BeginClear comments:
4748 *
4749 * Clear is not affected by clipping, depth test, or other
4750 * render state which affects the fragment pipeline.
4751 *
4752 * Therefore this code must ignore the current scissor rect.
4753 */
4754
4755 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
4756
4757 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4758 AssertReturn(pState, VERR_INVALID_STATE);
4759
4760 AssertFailed();
4761 return VINF_SUCCESS;
4762}
4763
4764
4765static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
4766 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
4767 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
4768{
4769 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
4770
4771 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4772 AssertReturn(pState, VERR_INVALID_STATE);
4773
4774 AssertFailed();
4775 return VINF_SUCCESS;
4776}
4777
4778
4779static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4780{
4781 RT_NOREF(cid, pRect);
4782
4783 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4784 AssertReturn(pState, VERR_INVALID_STATE);
4785
4786 AssertFailed();
4787 return VINF_SUCCESS;
4788}
4789
4790
4791static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
4792{
4793 RT_NOREF(sid, filter);
4794
4795 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4796 AssertReturn(pState, VERR_INVALID_STATE);
4797
4798 AssertFailed();
4799 return VINF_SUCCESS;
4800}
4801
4802
4803static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
4804 uint32_t cbData, uint32_t *pShaderData)
4805{
4806 RT_NOREF(cid, shid, type, cbData, pShaderData);
4807
4808 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4809 AssertReturn(pState, VERR_INVALID_STATE);
4810
4811 AssertFailed();
4812 return VINF_SUCCESS;
4813}
4814
4815
4816static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
4817{
4818 RT_NOREF(cid, shid, type);
4819
4820 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4821 AssertReturn(pState, VERR_INVALID_STATE);
4822
4823 AssertFailed();
4824 return VINF_SUCCESS;
4825}
4826
4827
4828static DECLCALLBACK(int) vmsvga3dBackShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
4829{
4830 RT_NOREF(pContext, cid, type, shid);
4831
4832 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4833 AssertReturn(pState, VERR_INVALID_STATE);
4834
4835 AssertFailed();
4836 return VINF_SUCCESS;
4837}
4838
4839
4840static DECLCALLBACK(int) vmsvga3dBackShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
4841 SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
4842{
4843 RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
4844
4845 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4846 AssertReturn(pState, VERR_INVALID_STATE);
4847
4848 AssertFailed();
4849 return VINF_SUCCESS;
4850}
4851#endif
4852
4853
4854/**
4855 * Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
4856 *
4857 * @param pThisCC The device context.
4858 * @param fClearCOTableEntry Whether to clear the corresponding COTable entry.
4859 * @param pSurface The surface being destroyed.
4860 */
4861static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface)
4862{
4863 RT_NOREF(pThisCC);
4864
4865 /* The caller should not use the function for system memory surfaces. */
4866 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
4867 if (!pBackendSurface)
4868 return;
4869 pSurface->pBackendSurface = NULL;
4870
4871 LogFunc(("sid=%u\n", pSurface->id));
4872
4873 /* If any views have been created for this resource, then also release them. */
4874 DXVIEW *pIter, *pNext;
4875 RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
4876 {
4877 LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
4878
4879 /** @todo The common DX code should track the views and clean COTable on a surface destruction. */
4880 if (fClearCOTableEntry)
4881 {
4882 PVMSVGA3DDXCONTEXT pDXContext;
4883 int rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pIter->cid, &pDXContext);
4884 AssertRC(rc);
4885 if (RT_SUCCESS(rc))
4886 {
4887 switch (pIter->enmViewType)
4888 {
4889 case VMSVGA3D_VIEWTYPE_RENDERTARGET:
4890 {
4891 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[pIter->viewId];
4892 RT_ZERO(*pEntry);
4893 break;
4894 }
4895 case VMSVGA3D_VIEWTYPE_DEPTHSTENCIL:
4896 {
4897 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[pIter->viewId];
4898 RT_ZERO(*pEntry);
4899 break;
4900 }
4901 case VMSVGA3D_VIEWTYPE_SHADERRESOURCE:
4902 {
4903 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[pIter->viewId];
4904 RT_ZERO(*pEntry);
4905 break;
4906 }
4907 case VMSVGA3D_VIEWTYPE_UNORDEREDACCESS:
4908 {
4909 SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[pIter->viewId];
4910 RT_ZERO(*pEntry);
4911 break;
4912 }
4913 default:
4914 AssertFailed();
4915 }
4916 }
4917 }
4918
4919 dxViewDestroy(pIter);
4920 }
4921
4922 if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET
4923 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
4924 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
4925 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
4926 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
4927 {
4928 D3D_RELEASE(pBackendSurface->staging.pResource);
4929 D3D_RELEASE(pBackendSurface->dynamic.pResource);
4930 D3D_RELEASE(pBackendSurface->u.pResource);
4931 }
4932 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
4933 {
4934 D3D_RELEASE(pBackendSurface->u.pBuffer);
4935 }
4936 else
4937 {
4938 AssertFailed();
4939 }
4940
4941 RTMemFree(pBackendSurface);
4942
4943 /* No context has created the surface, because the surface does not exist anymore. */
4944 pSurface->idAssociatedContext = SVGA_ID_INVALID;
4945}
4946
4947
4948static DECLCALLBACK(void) vmsvga3dBackSurfaceInvalidateImage(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface, uint32_t uFace, uint32_t uMipmap)
4949{
4950 RT_NOREF(pThisCC, uFace, uMipmap);
4951
4952 /* The caller should not use the function for system memory surfaces. */
4953 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
4954 if (!pBackendSurface)
4955 return;
4956
4957 LogFunc(("sid=%u\n", pSurface->id));
4958
4959 /* The guest uses this to invalidate a buffer. */
4960 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
4961 {
4962 Assert(uFace == 0 && uMipmap == 0); /* The caller ensures this. */
4963 /** @todo This causes flickering when a buffer is invalidated and re-created right before a draw call. */
4964 //vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
4965 }
4966 else
4967 {
4968 /** @todo Delete views that have been created for this mipmap.
4969 * For now just delete all views, they will be recte=reated if necessary.
4970 */
4971 ASSERT_GUEST_FAILED();
4972 DXVIEW *pIter, *pNext;
4973 RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
4974 {
4975 dxViewDestroy(pIter);
4976 }
4977 }
4978}
4979
4980
4981/**
4982 * Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
4983 *
4984 * @returns VBox status code.
4985 * @param pThis The VGA device instance.
4986 * @param pState The VMSVGA3d state.
4987 * @param pDstSurface The destination host surface.
4988 * @param uDstFace The destination face (valid).
4989 * @param uDstMipmap The destination mipmap level (valid).
4990 * @param pDstBox The destination box.
4991 * @param pSrcSurface The source host surface.
4992 * @param uSrcFace The destination face (valid).
4993 * @param uSrcMipmap The source mimap level (valid).
4994 * @param pSrcBox The source box.
4995 * @param enmMode The strecht blt mode .
4996 * @param pContext The VMSVGA3d context (already current for OGL).
4997 */
4998static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
4999 PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
5000 PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
5001 SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
5002{
5003 RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
5004 pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
5005
5006 AssertFailed();
5007 return VINF_SUCCESS;
5008}
5009
5010
5011/**
5012 * Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
5013 *
5014 * @returns Failure status code or @a rc.
5015 * @param pThis The shared VGA/VMSVGA instance data.
5016 * @param pThisCC The VGA/VMSVGA state for ring-3.
5017 * @param pState The VMSVGA3d state.
5018 * @param pSurface The host surface.
5019 * @param pMipLevel Mipmap level. The caller knows it already.
5020 * @param uHostFace The host face (valid).
5021 * @param uHostMipmap The host mipmap level (valid).
5022 * @param GuestPtr The guest pointer.
5023 * @param cbGuestPitch The guest pitch.
5024 * @param transfer The transfer direction.
5025 * @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
5026 * @param pContext The context (for OpenGL).
5027 * @param rc The current rc for all boxes.
5028 * @param iBox The current box number (for Direct 3D).
5029 */
5030static DECLCALLBACK(int) vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
5031 PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
5032 SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
5033 SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
5034{
5035 RT_NOREF(pState, pMipLevel, pContext, iBox);
5036
5037 /* The called should not use the function for system memory surfaces. */
5038 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5039 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
5040
5041 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
5042 {
5043 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
5044 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
5045
5046 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
5047 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
5048 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
5049 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
5050 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
5051 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
5052 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
5053
5054 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
5055 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
5056 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
5057 */
5058 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
5059 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
5060
5061 SVGA3dSurfaceImageId image;
5062 image.sid = pSurface->id;
5063 image.face = uHostFace;
5064 image.mipmap = uHostMipmap;
5065
5066 SVGA3dBox box;
5067 box.x = pBox->x;
5068 box.y = pBox->y;
5069 box.z = 0;
5070 box.w = pBox->w;
5071 box.h = pBox->h;
5072 box.d = 1;
5073
5074 VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
5075 ? VMSVGA3D_SURFACE_MAP_WRITE
5076 : VMSVGA3D_SURFACE_MAP_READ;
5077
5078 VMSVGA3D_MAPPED_SURFACE map;
5079 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
5080 if (RT_SUCCESS(rc))
5081 {
5082 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
5083 * and offset of the first scanline.
5084 */
5085 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
5086 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
5087 uint32_t const offLockedBuf = 0;
5088
5089 rc = vmsvgaR3GmrTransfer(pThis,
5090 pThisCC,
5091 transfer,
5092 pu8LockedBuf,
5093 cbLockedBuf,
5094 offLockedBuf,
5095 map.cbRowPitch,
5096 GuestPtr,
5097 (uint32_t)uGuestOffset,
5098 cbGuestPitch,
5099 cBlocksX * pSurface->cbBlock,
5100 cBlocksY);
5101 AssertRC(rc);
5102
5103 // Log4(("first line:\n%.*Rhxd\n", cBlocksX * pSurface->cbBlock, LockedRect.pBits));
5104
5105 //vmsvga3dMapWriteBmpFile(&map, "Dynamic");
5106
5107 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
5108 }
5109#if 0
5110 //DEBUG_BREAKPOINT_TEST();
5111 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
5112 if (RT_SUCCESS(rc))
5113 {
5114 vmsvga3dMapWriteBmpFile(&map, "Staging");
5115
5116 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
5117 }
5118#endif
5119 }
5120 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
5121 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
5122 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
5123 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5124 {
5125 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
5126 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
5127 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
5128 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
5129 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
5130 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
5131 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
5132 AssertMsgReturn(cBlocksX && cBlocksY && pBox->d, ("Empty box %dx%dx%d\n", pBox->w, pBox->h, pBox->d), VERR_INTERNAL_ERROR);
5133
5134 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
5135 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
5136 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
5137 */
5138 uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
5139 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
5140
5141 /* 3D texture needs additional processing. */
5142 ASSERT_GUEST_RETURN( pBox->z < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5143 && pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5144 && pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->z,
5145 VERR_INVALID_PARAMETER);
5146 ASSERT_GUEST_RETURN( pBox->srcz < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5147 && pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5148 && pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->srcz,
5149 VERR_INVALID_PARAMETER);
5150
5151 uGuestOffset += pBox->srcz * pMipLevel->cbSurfacePlane;
5152
5153 SVGA3dSurfaceImageId image;
5154 image.sid = pSurface->id;
5155 image.face = uHostFace;
5156 image.mipmap = uHostMipmap;
5157
5158 SVGA3dBox box;
5159 box.x = pBox->x;
5160 box.y = pBox->y;
5161 box.z = pBox->z;
5162 box.w = pBox->w;
5163 box.h = pBox->h;
5164 box.d = pBox->d;
5165
5166 VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
5167 ? VMSVGA3D_SURFACE_MAP_WRITE
5168 : VMSVGA3D_SURFACE_MAP_READ;
5169
5170 VMSVGA3D_MAPPED_SURFACE map;
5171 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
5172 if (RT_SUCCESS(rc))
5173 {
5174#if 0
5175 if (box.w == 250 && box.h == 250 && box.d == 1 && enmMap == VMSVGA3D_SURFACE_MAP_READ)
5176 {
5177 DEBUG_BREAKPOINT_TEST();
5178 vmsvga3dMapWriteBmpFile(&map, "P");
5179 }
5180#endif
5181 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
5182 * and offset of the first scanline.
5183 */
5184 uint32_t cbLockedBuf = map.cbRowPitch * cBlocksY;
5185 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5186 cbLockedBuf += map.cbDepthPitch * (pBox->d - 1); /// @todo why map does not compute this for 2D textures
5187 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
5188 uint32_t offLockedBuf = 0;
5189
5190 for (uint32_t iPlane = 0; iPlane < pBox->d; ++iPlane)
5191 {
5192 AssertBreak(uGuestOffset < UINT32_MAX);
5193
5194 rc = vmsvgaR3GmrTransfer(pThis,
5195 pThisCC,
5196 transfer,
5197 pu8LockedBuf,
5198 cbLockedBuf,
5199 offLockedBuf,
5200 map.cbRowPitch,
5201 GuestPtr,
5202 (uint32_t)uGuestOffset,
5203 cbGuestPitch,
5204 cBlocksX * pSurface->cbBlock,
5205 cBlocksY);
5206 AssertRC(rc);
5207
5208 uGuestOffset += pMipLevel->cbSurfacePlane;
5209 offLockedBuf += map.cbDepthPitch;
5210 }
5211
5212 bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
5213 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, fWritten);
5214 }
5215 }
5216 else
5217 {
5218 AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
5219 rc = VERR_NOT_IMPLEMENTED;
5220 }
5221
5222 return rc;
5223}
5224
5225
5226/**
5227 * Create D3D/OpenGL texture object for the specified surface.
5228 *
5229 * Surfaces are created when needed.
5230 *
5231 * @param pThisCC The device context.
5232 * @param pContext The context.
5233 * @param idAssociatedContext Probably the same as pContext->id.
5234 * @param pSurface The surface to create the texture for.
5235 */
5236static DECLCALLBACK(int) vmsvga3dBackCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
5237 PVMSVGA3DSURFACE pSurface)
5238
5239{
5240 RT_NOREF(pThisCC, pContext, idAssociatedContext, pSurface);
5241
5242 AssertFailed();
5243 return VINF_SUCCESS;
5244}
5245
5246
5247#if 0 /*unused*/
5248static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryCreate(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5249{
5250 RT_NOREF(pThisCC, pContext);
5251 AssertFailed();
5252 return VINF_SUCCESS;
5253}
5254
5255
5256static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryBegin(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5257{
5258 RT_NOREF(pThisCC, pContext);
5259 AssertFailed();
5260 return VINF_SUCCESS;
5261}
5262
5263
5264static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryEnd(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5265{
5266 RT_NOREF(pThisCC, pContext);
5267 AssertFailed();
5268 return VINF_SUCCESS;
5269}
5270
5271
5272static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryGetData(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
5273{
5274 RT_NOREF(pThisCC, pContext);
5275 *pu32Pixels = 0;
5276 AssertFailed();
5277 return VINF_SUCCESS;
5278}
5279
5280
5281static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryDelete(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5282{
5283 RT_NOREF(pThisCC, pContext);
5284 AssertFailed();
5285 return VINF_SUCCESS;
5286}
5287#endif
5288
5289
5290/*
5291 * DX callbacks.
5292 */
5293
5294static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5295{
5296 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5297
5298 /* Allocate a backend specific context structure. */
5299 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
5300 AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
5301 pDXContext->pBackendDXContext = pBackendDXContext;
5302
5303 LogFunc(("cid %d\n", pDXContext->cid));
5304
5305 int rc = dxDeviceCreate(pBackend, &pBackendDXContext->dxDevice);
5306 return rc;
5307}
5308
5309
5310static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5311{
5312 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5313
5314 LogFunc(("cid %d\n", pDXContext->cid));
5315
5316 if (pDXContext->pBackendDXContext)
5317 {
5318 /* Clean up context resources. */
5319 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5320
5321 for (uint32_t idxShaderState = 0; idxShaderState < RT_ELEMENTS(pBackendDXContext->resources.shaderState); ++idxShaderState)
5322 {
5323 ID3D11Buffer **papConstantBuffer = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[0];
5324 D3D_RELEASE_ARRAY(RT_ELEMENTS(pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers), papConstantBuffer);
5325 }
5326
5327 for (uint32_t i = 0; i < RT_ELEMENTS(pBackendDXContext->resources.inputAssembly.vertexBuffers); ++i)
5328 {
5329 D3D_RELEASE(pBackendDXContext->resources.inputAssembly.vertexBuffers[i].pBuffer);
5330 }
5331
5332 D3D_RELEASE(pBackendDXContext->resources.inputAssembly.indexBuffer.pBuffer);
5333
5334 if (pBackendDXContext->dxDevice.pImmediateContext)
5335 dxDeviceFlush(&pBackendDXContext->dxDevice); /* Make sure that any pending draw calls are finished. */
5336
5337 if (pBackendDXContext->paRenderTargetView)
5338 {
5339 for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
5340 D3D_RELEASE(pBackendDXContext->paRenderTargetView[i].u.pRenderTargetView);
5341 }
5342 if (pBackendDXContext->paDepthStencilView)
5343 {
5344 for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
5345 D3D_RELEASE(pBackendDXContext->paDepthStencilView[i].u.pDepthStencilView);
5346 }
5347 if (pBackendDXContext->paShaderResourceView)
5348 {
5349 for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
5350 D3D_RELEASE(pBackendDXContext->paShaderResourceView[i].u.pShaderResourceView);
5351 }
5352 if (pBackendDXContext->paElementLayout)
5353 {
5354 for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
5355 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
5356 }
5357 if (pBackendDXContext->papBlendState)
5358 D3D_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
5359 if (pBackendDXContext->papDepthStencilState)
5360 D3D_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
5361 if (pBackendDXContext->papRasterizerState)
5362 D3D_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
5363 if (pBackendDXContext->papSamplerState)
5364 D3D_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
5365 if (pBackendDXContext->paQuery)
5366 {
5367 for (uint32_t i = 0; i < pBackendDXContext->cQuery; ++i)
5368 dxDestroyQuery(&pBackendDXContext->paQuery[i]);
5369 }
5370 if (pBackendDXContext->paShader)
5371 {
5372 for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
5373 dxDestroyShader(&pBackendDXContext->paShader[i]);
5374 }
5375 if (pBackendDXContext->paStreamOutput)
5376 {
5377 for (uint32_t i = 0; i < pBackendDXContext->cStreamOutput; ++i)
5378 dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
5379 }
5380
5381 RTMemFreeZ(pBackendDXContext->papBlendState, sizeof(pBackendDXContext->papBlendState[0]) * pBackendDXContext->cBlendState);
5382 RTMemFreeZ(pBackendDXContext->papDepthStencilState, sizeof(pBackendDXContext->papDepthStencilState[0]) * pBackendDXContext->cDepthStencilState);
5383 RTMemFreeZ(pBackendDXContext->papSamplerState, sizeof(pBackendDXContext->papSamplerState[0]) * pBackendDXContext->cSamplerState);
5384 RTMemFreeZ(pBackendDXContext->papRasterizerState, sizeof(pBackendDXContext->papRasterizerState[0]) * pBackendDXContext->cRasterizerState);
5385 RTMemFreeZ(pBackendDXContext->paElementLayout, sizeof(pBackendDXContext->paElementLayout[0]) * pBackendDXContext->cElementLayout);
5386 RTMemFreeZ(pBackendDXContext->paRenderTargetView, sizeof(pBackendDXContext->paRenderTargetView[0]) * pBackendDXContext->cRenderTargetView);
5387 RTMemFreeZ(pBackendDXContext->paDepthStencilView, sizeof(pBackendDXContext->paDepthStencilView[0]) * pBackendDXContext->cDepthStencilView);
5388 RTMemFreeZ(pBackendDXContext->paShaderResourceView, sizeof(pBackendDXContext->paShaderResourceView[0]) * pBackendDXContext->cShaderResourceView);
5389 RTMemFreeZ(pBackendDXContext->paQuery, sizeof(pBackendDXContext->paQuery[0]) * pBackendDXContext->cQuery);
5390 RTMemFreeZ(pBackendDXContext->paShader, sizeof(pBackendDXContext->paShader[0]) * pBackendDXContext->cShader);
5391 RTMemFreeZ(pBackendDXContext->paStreamOutput, sizeof(pBackendDXContext->paStreamOutput[0]) * pBackendDXContext->cStreamOutput);
5392
5393 /* Destroy backend surfaces which belong to this context. */
5394 /** @todo The context should have a list of surfaces (and also shared resources). */
5395 /** @todo This should not be needed in fSingleDevice mode. */
5396 for (uint32_t sid = 0; sid < pThisCC->svga.p3dState->cSurfaces; ++sid)
5397 {
5398 PVMSVGA3DSURFACE const pSurface = pThisCC->svga.p3dState->papSurfaces[sid];
5399 if ( pSurface
5400 && pSurface->id == sid)
5401 {
5402 if (pSurface->idAssociatedContext == pDXContext->cid)
5403 {
5404 if (pSurface->pBackendSurface)
5405 vmsvga3dBackSurfaceDestroy(pThisCC, true, pSurface);
5406 }
5407 else if (pSurface->idAssociatedContext == DX_CID_BACKEND)
5408 {
5409 /* May have shared resources in this context. */
5410 if (pSurface->pBackendSurface)
5411 {
5412 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid);
5413 if (pSharedTexture)
5414 {
5415 Assert(pSharedTexture->sid == sid);
5416 RTAvlU32Remove(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid);
5417 D3D_RELEASE(pSharedTexture->pTexture);
5418 RTMemFreeZ(pSharedTexture, sizeof(*pSharedTexture));
5419 }
5420 }
5421 }
5422 }
5423 }
5424
5425 dxDeviceDestroy(pBackend, &pBackendDXContext->dxDevice);
5426
5427 RTMemFreeZ(pBackendDXContext, sizeof(*pBackendDXContext));
5428 pDXContext->pBackendDXContext = NULL;
5429 }
5430 return VINF_SUCCESS;
5431}
5432
5433
5434static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5435{
5436 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5437 RT_NOREF(pBackend, pDXContext);
5438 return VINF_SUCCESS;
5439}
5440
5441
5442static DECLCALLBACK(int) vmsvga3dBackDXSwitchContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5443{
5444 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5445 if (!pBackend->fSingleDevice)
5446 return VINF_NOT_IMPLEMENTED; /* Not required. */
5447
5448 /* The new context state will be applied by the generic DX code. */
5449 RT_NOREF(pDXContext);
5450 return VINF_SUCCESS;
5451}
5452
5453
5454static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5455{
5456 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5457 RT_NOREF(pBackend, pDXContext);
5458 return VINF_SUCCESS;
5459}
5460
5461
5462static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5463{
5464 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5465
5466 RT_NOREF(pBackend, pDXContext);
5467 AssertFailed(); /** @todo Implement */
5468 return VERR_NOT_IMPLEMENTED;
5469}
5470
5471
5472static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
5473{
5474 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5475 RT_NOREF(pBackend);
5476
5477 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5478 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5479
5480 if (sid == SVGA_ID_INVALID)
5481 {
5482 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5483 D3D_RELEASE(pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot]);
5484 return VINF_SUCCESS;
5485 }
5486
5487 PVMSVGA3DSURFACE pSurface;
5488 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
5489 AssertRCReturn(rc, rc);
5490
5491 PVMSVGA3DMIPMAPLEVEL pMipLevel;
5492 rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
5493 AssertRCReturn(rc, rc);
5494
5495 uint32_t const cbSurface = pMipLevel->cbSurface;
5496 ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
5497 && sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
5498
5499 /* Constant buffers are created on demand. */
5500 Assert(pSurface->pBackendSurface == NULL);
5501
5502 /* Upload the current data, if any. */
5503 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
5504 D3D11_SUBRESOURCE_DATA initialData;
5505 if (pMipLevel->pSurfaceData)
5506 {
5507 initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
5508 initialData.SysMemPitch = sizeInBytes;
5509 initialData.SysMemSlicePitch = sizeInBytes;
5510
5511 pInitialData = &initialData;
5512
5513 // Log(("%.*Rhxd\n", sizeInBytes, initialData.pSysMem));
5514 }
5515
5516 D3D11_BUFFER_DESC bd;
5517 RT_ZERO(bd);
5518 bd.ByteWidth = sizeInBytes;
5519 bd.Usage = D3D11_USAGE_DEFAULT;
5520 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
5521 bd.CPUAccessFlags = 0;
5522 bd.MiscFlags = 0;
5523 bd.StructureByteStride = 0;
5524
5525 ID3D11Buffer *pBuffer = 0;
5526 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
5527 if (SUCCEEDED(hr))
5528 {
5529 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5530 ID3D11Buffer **ppOldBuffer = &pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot];
5531 LogFunc(("constant buffer: [%u][%u]: sid = %u, %u, %u (%p -> %p)\n",
5532 idxShaderState, slot, sid, offsetInBytes, sizeInBytes, *ppOldBuffer, pBuffer));
5533 D3D_RELEASE(*ppOldBuffer);
5534 *ppOldBuffer = pBuffer;
5535 }
5536
5537 return VINF_SUCCESS;
5538}
5539
5540static int dxSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type)
5541{
5542 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5543 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5544
5545//DEBUG_BREAKPOINT_TEST();
5546 AssertReturn(type >= SVGA3D_SHADERTYPE_MIN && type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
5547 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5548 uint32_t const *pSRIds = &pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[0];
5549 ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
5550 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SRVIEWS; ++i)
5551 {
5552 SVGA3dShaderResourceViewId shaderResourceViewId = pSRIds[i];
5553 if (shaderResourceViewId != SVGA3D_INVALID_ID)
5554 {
5555 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
5556
5557 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
5558 Assert(pDXView->u.pShaderResourceView);
5559 papShaderResourceView[i] = pDXView->u.pShaderResourceView;
5560 }
5561 else
5562 papShaderResourceView[i] = NULL;
5563 }
5564
5565 dxShaderResourceViewSet(pDevice, type, 0, SVGA3D_DX_MAX_SRVIEWS, papShaderResourceView);
5566 return VINF_SUCCESS;
5567}
5568
5569
5570static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
5571{
5572 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5573 RT_NOREF(pBackend);
5574
5575 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5576 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5577
5578 RT_NOREF(startView, type, cShaderResourceViewId, paShaderResourceViewId);
5579
5580 return VINF_SUCCESS;
5581}
5582
5583
5584static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGA3dShaderType type)
5585{
5586 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5587 RT_NOREF(pBackend);
5588
5589 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5590 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5591
5592 RT_NOREF(shaderId, type);
5593
5594 return VINF_SUCCESS;
5595}
5596
5597
5598static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
5599{
5600 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5601 RT_NOREF(pBackend);
5602
5603 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5604 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5605
5606 ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
5607 for (uint32_t i = 0; i < cSamplerId; ++i)
5608 {
5609 SVGA3dSamplerId samplerId = paSamplerId[i];
5610 if (samplerId != SVGA3D_INVALID_ID)
5611 {
5612 ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
5613 papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
5614 }
5615 else
5616 papSamplerState[i] = NULL;
5617 }
5618
5619 dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
5620 return VINF_SUCCESS;
5621}
5622
5623
5624static void vboxDXMatchShaderInput(DXSHADER *pDXShader, DXSHADER *pDXShaderPrior)
5625{
5626 /* For each input generic attribute of the shader find corresponding entry in the prior shader. */
5627 for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5628 {
5629 SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5630 DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5631
5632 if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5633 continue;
5634
5635 int iMatch = -1;
5636 for (uint32_t iPrior = 0; iPrior < pDXShaderPrior->shaderInfo.cOutputSignature; ++iPrior)
5637 {
5638 SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iPrior];
5639
5640 if (pPriorSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5641 continue;
5642
5643 if (pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex)
5644 {
5645 iMatch = iPrior;
5646 if (pPriorSignatureEntry->mask == pSignatureEntry->mask)
5647 break; /* Exact match, no need to continue search. */
5648 }
5649 }
5650
5651 if (iMatch >= 0)
5652 {
5653 SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iMatch];
5654 DXShaderAttributeSemantic const *pPriorSemantic = &pDXShaderPrior->shaderInfo.aOutputSemantic[iMatch];
5655
5656 Assert(pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex);
5657 Assert(pPriorSignatureEntry->mask == pSignatureEntry->mask);
5658 RT_NOREF(pPriorSignatureEntry);
5659
5660 pSemantic->SemanticIndex = pPriorSemantic->SemanticIndex;
5661 }
5662 }
5663}
5664
5665
5666static void vboxDXMatchShaderSignatures(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
5667{
5668 SVGA3dShaderId const shaderIdVS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN].shaderId;
5669 SVGA3dShaderId const shaderIdHS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_HS - SVGA3D_SHADERTYPE_MIN].shaderId;
5670 SVGA3dShaderId const shaderIdDS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_DS - SVGA3D_SHADERTYPE_MIN].shaderId;
5671 SVGA3dShaderId const shaderIdGS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_GS - SVGA3D_SHADERTYPE_MIN].shaderId;
5672 SVGA3dShaderId const shaderIdPS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_PS - SVGA3D_SHADERTYPE_MIN].shaderId;
5673
5674 /* Try to fix the input semantic indices. Output is usually not changed. */
5675 switch (pDXShader->enmShaderType)
5676 {
5677 case SVGA3D_SHADERTYPE_VS:
5678 {
5679 /* Match input to input layout, which sets generic semantic indices to the source registerIndex (dxCreateInputLayout). */
5680 for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5681 {
5682 SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5683 DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5684
5685 if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5686 continue;
5687
5688 pSemantic->SemanticIndex = pSignatureEntry->registerIndex;
5689 }
5690 break;
5691 }
5692 case SVGA3D_SHADERTYPE_HS:
5693 {
5694 /* Input of a HS shader is the output of VS. */
5695 DXSHADER *pDXShaderPrior;
5696 if (shaderIdVS != SVGA3D_INVALID_ID)
5697 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5698 else
5699 pDXShaderPrior = NULL;
5700
5701 if (pDXShaderPrior)
5702 vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5703
5704 break;
5705 }
5706 case SVGA3D_SHADERTYPE_DS:
5707 {
5708 /* Input of a DS shader is the output of HS. */
5709 DXSHADER *pDXShaderPrior;
5710 if (shaderIdHS != SVGA3D_INVALID_ID)
5711 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdHS];
5712 else
5713 pDXShaderPrior = NULL;
5714
5715 if (pDXShaderPrior)
5716 vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5717
5718 break;
5719 }
5720 case SVGA3D_SHADERTYPE_GS:
5721 {
5722 /* Input signature of a GS shader is the output of DS or VS. */
5723 DXSHADER *pDXShaderPrior;
5724 if (shaderIdDS != SVGA3D_INVALID_ID)
5725 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5726 else if (shaderIdVS != SVGA3D_INVALID_ID)
5727 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5728 else
5729 pDXShaderPrior = NULL;
5730
5731 if (pDXShaderPrior)
5732 {
5733 /* If GS shader does not have input signature (Windows guest can do that),
5734 * then assign the prior shader signature as GS input.
5735 */
5736 if (pDXShader->shaderInfo.cInputSignature == 0)
5737 {
5738 pDXShader->shaderInfo.cInputSignature = pDXShaderPrior->shaderInfo.cOutputSignature;
5739 memcpy(pDXShader->shaderInfo.aInputSignature,
5740 pDXShaderPrior->shaderInfo.aOutputSignature,
5741 pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
5742 memcpy(pDXShader->shaderInfo.aInputSemantic,
5743 pDXShaderPrior->shaderInfo.aOutputSemantic,
5744 pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(DXShaderAttributeSemantic));
5745 }
5746 else
5747 vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5748 }
5749
5750 /* Output signature of a GS shader is the input of the pixel shader. */
5751 if (shaderIdPS != SVGA3D_INVALID_ID)
5752 {
5753 /* If GS shader does not have output signature (Windows guest can do that),
5754 * then assign the PS shader signature as GS output.
5755 */
5756 if (pDXShader->shaderInfo.cOutputSignature == 0)
5757 {
5758 DXSHADER const *pDXShaderPosterior = &pDXContext->pBackendDXContext->paShader[shaderIdPS];
5759 pDXShader->shaderInfo.cOutputSignature = pDXShaderPosterior->shaderInfo.cInputSignature;
5760 memcpy(pDXShader->shaderInfo.aOutputSignature,
5761 pDXShaderPosterior->shaderInfo.aInputSignature,
5762 pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
5763 memcpy(pDXShader->shaderInfo.aOutputSemantic,
5764 pDXShaderPosterior->shaderInfo.aInputSemantic,
5765 pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(DXShaderAttributeSemantic));
5766 }
5767 }
5768
5769 SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
5770 if (soid != SVGA3D_INVALID_ID)
5771 {
5772 ASSERT_GUEST_RETURN_VOID(soid < pDXContext->pBackendDXContext->cStreamOutput);
5773
5774 /* Set semantic names and indices for SO declaration entries according to the shader output. */
5775 SVGACOTableDXStreamOutputEntry const *pStreamOutputEntry = &pDXContext->cot.paStreamOutput[soid];
5776 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
5777
5778 if (pDXStreamOutput->cDeclarationEntry == 0)
5779 {
5780 int rc = dxDefineStreamOutput(pThisCC, pDXContext, soid, pStreamOutputEntry, pDXShader);
5781 AssertRCReturnVoid(rc);
5782#ifdef LOG_ENABLED
5783 Log6(("Stream output declaration:\n\n"));
5784 Log6(("Stream SemanticName SemanticIndex StartComponent ComponentCount OutputSlot\n"));
5785 Log6(("------ -------------- ------------- -------------- -------------- ----------\n"));
5786 for (unsigned i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
5787 {
5788 D3D11_SO_DECLARATION_ENTRY *p = &pDXStreamOutput->aDeclarationEntry[i];
5789 Log6(("%d %-14s %d %d %d %d\n",
5790 p->Stream, p->SemanticName, p->SemanticIndex, p->StartComponent, p->ComponentCount, p->OutputSlot));
5791 }
5792 Log6(("\n"));
5793#endif
5794
5795 }
5796 }
5797 break;
5798 }
5799 case SVGA3D_SHADERTYPE_PS:
5800 {
5801 /* Input of a PS shader is the output of GS, DS or VS. */
5802 DXSHADER *pDXShaderPrior;
5803 if (shaderIdGS != SVGA3D_INVALID_ID)
5804 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdGS];
5805 else if (shaderIdDS != SVGA3D_INVALID_ID)
5806 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5807 else if (shaderIdVS != SVGA3D_INVALID_ID)
5808 pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5809 else
5810 pDXShaderPrior = NULL;
5811
5812 if (pDXShaderPrior)
5813 vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5814 break;
5815 }
5816 default:
5817 break;
5818 }
5819
5820 /* Intermediate shaders normally have both input and output signatures. However it is ok if they do not.
5821 * Just catch this unusual case in order to see if everything is fine.
5822 */
5823 Assert( ( pDXShader->enmShaderType == SVGA3D_SHADERTYPE_VS
5824 || pDXShader->enmShaderType == SVGA3D_SHADERTYPE_PS
5825 || pDXShader->enmShaderType == SVGA3D_SHADERTYPE_CS)
5826 || (pDXShader->shaderInfo.cInputSignature && pDXShader->shaderInfo.cOutputSignature));
5827}
5828
5829
5830static void dxCreateInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, DXSHADER *pDXShader)
5831{
5832 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5833 AssertReturnVoid(pDevice->pDevice);
5834
5835 SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
5836 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
5837
5838 if (pDXElementLayout->cElementDesc == 0)
5839 {
5840 /* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
5841 * if they are consistent between the element layout and shader input signature.
5842 * "In general, data passed between pipeline stages is completely generic and is not uniquely
5843 * interpreted by the system; arbitrary semantics are allowed ..."
5844 *
5845 * However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
5846 *
5847 * System-Value semantics ("SV_*") between shaders require proper names of course.
5848 * But they are irrelevant for input attributes.
5849 */
5850 pDXElementLayout->cElementDesc = pEntry->numDescs;
5851 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
5852 {
5853 D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
5854 SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
5855 pDst->SemanticName = "ATTRIB";
5856 pDst->SemanticIndex = pSrc->inputRegister;
5857 pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
5858 Assert(pDst->Format != DXGI_FORMAT_UNKNOWN);
5859 pDst->InputSlot = pSrc->inputSlot;
5860 pDst->AlignedByteOffset = pSrc->alignedByteOffset;
5861 pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
5862 pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
5863 }
5864 }
5865
5866 HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
5867 pDXElementLayout->cElementDesc,
5868 pDXShader->pvDXBC,
5869 pDXShader->cbDXBC,
5870 &pDXElementLayout->pElementLayout);
5871 Assert(SUCCEEDED(hr)); RT_NOREF(hr);
5872}
5873
5874
5875static void dxSetConstantBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5876{
5877//DEBUG_BREAKPOINT_TEST();
5878 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5879 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5880 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5881
5882 AssertCompile(RT_ELEMENTS(pBackendDXContext->resources.shaderState[0].constantBuffers) == SVGA3D_DX_MAX_CONSTBUFFERS);
5883
5884 for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
5885 {
5886 SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
5887 for (uint32_t idxSlot = 0; idxSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++idxSlot)
5888 {
5889 ID3D11Buffer **pBufferContext = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
5890 ID3D11Buffer **pBufferPipeline = &pBackend->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
5891 if (*pBufferContext != *pBufferPipeline)
5892 {
5893 LogFunc(("constant buffer: [%u][%u]: %p -> %p\n",
5894 idxShaderState, idxSlot, *pBufferPipeline, *pBufferContext));
5895 dxConstantBufferSet(pDXDevice, idxSlot, shaderType, *pBufferContext);
5896
5897 if (*pBufferContext)
5898 (*pBufferContext)->AddRef();
5899 D3D_RELEASE(*pBufferPipeline);
5900 *pBufferPipeline = *pBufferContext;
5901 }
5902 }
5903 }
5904}
5905
5906static void dxSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5907{
5908//DEBUG_BREAKPOINT_TEST();
5909 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5910 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5911 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5912
5913 AssertCompile(RT_ELEMENTS(pBackendDXContext->resources.inputAssembly.vertexBuffers) == SVGA3D_DX_MAX_VERTEXBUFFERS);
5914
5915 ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
5916 UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
5917 UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
5918
5919 int32_t idxMaxSlot = -1;
5920 for (uint32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
5921 {
5922 DXBOUNDVERTEXBUFFER *pBufferContext = &pBackendDXContext->resources.inputAssembly.vertexBuffers[i];
5923 DXBOUNDVERTEXBUFFER *pBufferPipeline = &pBackend->resources.inputAssembly.vertexBuffers[i];
5924 if ( pBufferContext->pBuffer != pBufferPipeline->pBuffer
5925 || pBufferContext->stride != pBufferPipeline->stride
5926 || pBufferContext->offset != pBufferPipeline->offset)
5927 {
5928 LogFunc(("vertex buffer: [%u]: sid = %u, %p -> %p\n",
5929 i, pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].bufferId, pBufferPipeline->pBuffer, pBufferContext->pBuffer));
5930
5931 if (pBufferContext->pBuffer != pBufferPipeline->pBuffer)
5932 {
5933 if (pBufferContext->pBuffer)
5934 pBufferContext->pBuffer->AddRef();
5935 D3D_RELEASE(pBufferPipeline->pBuffer);
5936 }
5937 *pBufferPipeline = *pBufferContext;
5938
5939 idxMaxSlot = i;
5940 }
5941
5942 paResources[i] = pBufferContext->pBuffer;
5943 if (pBufferContext->pBuffer)
5944 {
5945 paStride[i] = pBufferContext->stride;
5946 paOffset[i] = pBufferContext->offset;
5947 }
5948 else
5949 {
5950 paStride[i] = 0;
5951 paOffset[i] = 0;
5952 }
5953 }
5954
5955 if (idxMaxSlot >= 0)
5956 pDXDevice->pImmediateContext->IASetVertexBuffers(0, idxMaxSlot + 1, paResources, paStride, paOffset);
5957}
5958
5959static void dxSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5960{
5961//DEBUG_BREAKPOINT_TEST();
5962 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5963 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5964 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5965
5966 DXBOUNDINDEXBUFFER *pBufferContext = &pBackendDXContext->resources.inputAssembly.indexBuffer;
5967 DXBOUNDINDEXBUFFER *pBufferPipeline = &pBackend->resources.inputAssembly.indexBuffer;
5968 if ( pBufferContext->pBuffer != pBufferPipeline->pBuffer
5969 || pBufferContext->indexBufferOffset != pBufferPipeline->indexBufferOffset
5970 || pBufferContext->indexBufferFormat != pBufferPipeline->indexBufferFormat)
5971 {
5972 LogFunc(("index_buffer: sid = %u, %p -> %p\n",
5973 pDXContext->svgaDXContext.inputAssembly.indexBufferSid, pBufferPipeline->pBuffer, pBufferContext->pBuffer));
5974
5975 if (pBufferContext->pBuffer != pBufferPipeline->pBuffer)
5976 {
5977 if (pBufferContext->pBuffer)
5978 pBufferContext->pBuffer->AddRef();
5979 D3D_RELEASE(pBufferPipeline->pBuffer);
5980 }
5981 *pBufferPipeline = *pBufferContext;
5982
5983 pDXDevice->pImmediateContext->IASetIndexBuffer(pBufferContext->pBuffer, pBufferContext->indexBufferFormat, pBufferContext->indexBufferOffset);
5984 }
5985}
5986
5987static void dxSetupPipeline(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5988{
5989 /* Make sure that any draw operations on shader resource views have finished. */
5990 AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState) == SVGA3D_NUM_SHADERTYPE);
5991 AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState[0].shaderResources) == SVGA3D_DX_MAX_SRVIEWS);
5992
5993 int rc;
5994
5995 /* Unbind render target views because they mught be (re-)used as shader resource views. */
5996 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5997 pDXDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(0, NULL, NULL, 0, 0, NULL, NULL);
5998 for (unsigned i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
5999 {
6000 ID3D11UnorderedAccessView *pNullUA = 0;
6001 pDXDevice->pImmediateContext->CSSetUnorderedAccessViews(i, 1, &pNullUA, NULL);
6002 }
6003
6004 dxSetConstantBuffers(pThisCC, pDXContext);
6005 dxSetVertexBuffers(pThisCC, pDXContext);
6006 dxSetIndexBuffer(pThisCC, pDXContext);
6007
6008 /*
6009 * Shader resources
6010 */
6011
6012 /* Make sure that the shader resource views exist. */
6013 for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6014 {
6015 for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6016 {
6017 SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6018 if (shaderResourceViewId != SVGA3D_INVALID_ID)
6019 {
6020 ASSERT_GUEST_RETURN_VOID(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView);
6021
6022 SVGACOTableDXSRViewEntry const *pSRViewEntry = dxGetShaderResourceViewEntry(pDXContext, shaderResourceViewId);
6023 AssertContinue(pSRViewEntry != NULL);
6024
6025 uint32_t const sid = pSRViewEntry->sid;
6026
6027 PVMSVGA3DSURFACE pSurface;
6028 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6029 AssertRCReturnVoid(rc);
6030
6031 /* The guest might have invalidated the surface in which case pSurface->pBackendSurface is NULL. */
6032 /** @todo This is not needed for "single DX device" mode. */
6033 if (pSurface->pBackendSurface)
6034 {
6035 /* Wait for the surface to finish drawing. */
6036 dxSurfaceWait(pThisCC->svga.p3dState, pSurface, pDXContext->cid);
6037 }
6038
6039 /* If a view has not been created yet, do it now. */
6040 if (!pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId].u.pView)
6041 {
6042//DEBUG_BREAKPOINT_TEST();
6043 LogFunc(("Re-creating SRV: sid=%u srvid = %u\n", sid, shaderResourceViewId));
6044 rc = dxDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pSRViewEntry);
6045 AssertContinue(RT_SUCCESS(rc));
6046 }
6047
6048 LogFunc(("srv[%d][%d] sid = %u, srvid = %u\n", idxShaderState, idxSR, sid, shaderResourceViewId));
6049
6050#ifdef DUMP_BITMAPS
6051 SVGA3dSurfaceImageId image;
6052 image.sid = sid;
6053 image.face = 0;
6054 image.mipmap = 0;
6055 VMSVGA3D_MAPPED_SURFACE map;
6056 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
6057 if (RT_SUCCESS(rc2))
6058 {
6059 vmsvga3dMapWriteBmpFile(&map, "sr-");
6060 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
6061 }
6062 else
6063 Log(("Map failed %Rrc\n", rc));
6064#endif
6065 }
6066 }
6067
6068 /* Set shader resources. */
6069 rc = dxSetShaderResources(pThisCC, pDXContext, (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN));
6070 AssertRC(rc);
6071 }
6072
6073 /*
6074 * Compute shader unordered access views
6075 */
6076
6077 for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6078 {
6079 SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.csuaViewIds[idxUA];
6080 if (uaViewId != SVGA3D_INVALID_ID)
6081 {
6082//DEBUG_BREAKPOINT_TEST();
6083 ASSERT_GUEST_RETURN_VOID(uaViewId < pDXContext->pBackendDXContext->cUnorderedAccessView);
6084
6085 SVGACOTableDXUAViewEntry const *pUAViewEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
6086 AssertContinue(pUAViewEntry != NULL);
6087
6088 uint32_t const sid = pUAViewEntry->sid;
6089
6090 PVMSVGA3DSURFACE pSurface;
6091 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6092 AssertRCReturnVoid(rc);
6093
6094 /* The guest might have invalidated the surface in which case pSurface->pBackendSurface is NULL. */
6095 /** @todo This is not needed for "single DX device" mode. */
6096 if (pSurface->pBackendSurface)
6097 {
6098 /* Wait for the surface to finish drawing. */
6099 dxSurfaceWait(pThisCC->svga.p3dState, pSurface, pDXContext->cid);
6100 }
6101
6102 /* If a view has not been created yet, do it now. */
6103 if (!pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pView)
6104 {
6105 LogFunc(("Re-creating UAV: sid=%u uaid = %u\n", sid, uaViewId));
6106 rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pUAViewEntry);
6107 AssertContinue(RT_SUCCESS(rc));
6108 }
6109
6110 LogFunc(("csuav[%d] sid = %u, uaid = %u\n", idxUA, sid, uaViewId));
6111 }
6112 }
6113
6114 /* Set views. */
6115 rc = dxSetCSUnorderedAccessViews(pThisCC, pDXContext);
6116 AssertRC(rc);
6117
6118 /*
6119 * Render targets and unordered access views.
6120 */
6121
6122 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6123 AssertReturnVoid(pDevice->pDevice);
6124
6125 /* Make sure that the render target views exist. Similar to SRVs. */
6126 if (pDXContext->svgaDXContext.renderState.depthStencilViewId != SVGA3D_INVALID_ID)
6127 {
6128 uint32_t const viewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
6129
6130 ASSERT_GUEST_RETURN_VOID(viewId < pDXContext->pBackendDXContext->cDepthStencilView);
6131
6132 SVGACOTableDXDSViewEntry const *pDSViewEntry = dxGetDepthStencilViewEntry(pDXContext, viewId);
6133 AssertReturnVoid(pDSViewEntry != NULL);
6134
6135 PVMSVGA3DSURFACE pSurface;
6136 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDSViewEntry->sid, &pSurface);
6137 AssertRCReturnVoid(rc);
6138
6139 /* If a view has not been created yet, do it now. */
6140 if (!pDXContext->pBackendDXContext->paDepthStencilView[viewId].u.pView)
6141 {
6142//DEBUG_BREAKPOINT_TEST();
6143 LogFunc(("Re-creating DSV: sid=%u dsvid = %u\n", pDSViewEntry->sid, viewId));
6144 rc = dxDefineDepthStencilView(pThisCC, pDXContext, viewId, pDSViewEntry);
6145 AssertReturnVoid(RT_SUCCESS(rc));
6146 }
6147
6148 LogFunc(("dsv sid = %u, dsvid = %u\n", pDSViewEntry->sid, viewId));
6149 }
6150
6151 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
6152 {
6153 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] != SVGA3D_INVALID_ID)
6154 {
6155 uint32_t const viewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
6156
6157 ASSERT_GUEST_RETURN_VOID(viewId < pDXContext->pBackendDXContext->cRenderTargetView);
6158
6159 SVGACOTableDXRTViewEntry const *pRTViewEntry = dxGetRenderTargetViewEntry(pDXContext, viewId);
6160 AssertReturnVoid(pRTViewEntry != NULL);
6161
6162 PVMSVGA3DSURFACE pSurface;
6163 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pRTViewEntry->sid, &pSurface);
6164 AssertRCReturnVoid(rc);
6165
6166 /* If a view has not been created yet, do it now. */
6167 if (!pDXContext->pBackendDXContext->paRenderTargetView[viewId].u.pView)
6168 {
6169//DEBUG_BREAKPOINT_TEST();
6170 LogFunc(("Re-creating RTV: sid=%u rtvid = %u\n", pRTViewEntry->sid, viewId));
6171 rc = dxDefineRenderTargetView(pThisCC, pDXContext, viewId, pRTViewEntry);
6172 AssertReturnVoid(RT_SUCCESS(rc));
6173 }
6174
6175 LogFunc(("rtv sid = %u, rtvid = %u\n", pRTViewEntry->sid, viewId));
6176 }
6177 }
6178
6179 for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6180 {
6181 SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
6182 if (uaViewId != SVGA3D_INVALID_ID)
6183 {
6184//DEBUG_BREAKPOINT_TEST();
6185 ASSERT_GUEST_RETURN_VOID(uaViewId < pDXContext->pBackendDXContext->cUnorderedAccessView);
6186
6187 SVGACOTableDXUAViewEntry const *pUAViewEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
6188 AssertContinue(pUAViewEntry != NULL);
6189
6190 uint32_t const sid = pUAViewEntry->sid;
6191
6192 PVMSVGA3DSURFACE pSurface;
6193 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6194 AssertRCReturnVoid(rc);
6195
6196 /* The guest might have invalidated the surface in which case pSurface->pBackendSurface is NULL. */
6197 /** @todo This is not needed for "single DX device" mode. */
6198 if (pSurface->pBackendSurface)
6199 {
6200 /* Wait for the surface to finish drawing. */
6201 dxSurfaceWait(pThisCC->svga.p3dState, pSurface, pDXContext->cid);
6202 }
6203
6204 /* If a view has not been created yet, do it now. */
6205 if (!pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pView)
6206 {
6207 LogFunc(("Re-creating UAV: sid=%u uaid = %u\n", sid, uaViewId));
6208 rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pUAViewEntry);
6209 AssertContinue(RT_SUCCESS(rc));
6210 }
6211
6212 LogFunc(("uav[%d] sid = %u, uaid = %u\n", idxUA, sid, uaViewId));
6213 }
6214 }
6215
6216 /* Set render targets. */
6217 rc = dxSetRenderTargets(pThisCC, pDXContext);
6218 AssertRC(rc);
6219
6220 /*
6221 * Shaders
6222 */
6223
6224 for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6225 {
6226 DXSHADER *pDXShader;
6227 SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
6228 SVGA3dShaderId const shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6229
6230 if (shaderId != SVGA3D_INVALID_ID)
6231 {
6232 pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
6233 if (pDXShader->pShader == NULL)
6234 {
6235 /* Create a new shader. */
6236
6237 /* Apply resource types to a pixel shader. */
6238 if (shaderType == SVGA3D_SHADERTYPE_PS) /* Others too? */
6239 {
6240 VGPU10_RESOURCE_DIMENSION aResourceDimension[SVGA3D_DX_MAX_SRVIEWS];
6241 RT_ZERO(aResourceDimension);
6242 VGPU10_RESOURCE_RETURN_TYPE aResourceReturnType[SVGA3D_DX_MAX_SRVIEWS];
6243 RT_ZERO(aResourceReturnType);
6244 uint32_t cResources = 0;
6245
6246 for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6247 {
6248 SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6249 if (shaderResourceViewId != SVGA3D_INVALID_ID)
6250 {
6251 SVGACOTableDXSRViewEntry const *pSRViewEntry = dxGetShaderResourceViewEntry(pDXContext, shaderResourceViewId);
6252 AssertContinue(pSRViewEntry != NULL);
6253
6254 PVMSVGA3DSURFACE pSurface;
6255 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pSRViewEntry->sid, &pSurface);
6256 AssertRCReturnVoid(rc);
6257
6258 aResourceReturnType[idxSR] = DXShaderResourceReturnTypeFromFormat(pSRViewEntry->format);
6259
6260 switch (pSRViewEntry->resourceDimension)
6261 {
6262 case SVGA3D_RESOURCE_BUFFEREX:
6263 case SVGA3D_RESOURCE_BUFFER:
6264 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_BUFFER;
6265 break;
6266 case SVGA3D_RESOURCE_TEXTURE1D:
6267 if (pSurface->surfaceDesc.numArrayElements <= 1)
6268 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1D;
6269 else
6270 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1DARRAY;
6271 break;
6272 case SVGA3D_RESOURCE_TEXTURE2D:
6273 if (pSurface->surfaceDesc.numArrayElements <= 1)
6274 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6275 else
6276 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2DARRAY;
6277 break;
6278 case SVGA3D_RESOURCE_TEXTURE3D:
6279 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE3D;
6280 break;
6281 case SVGA3D_RESOURCE_TEXTURECUBE:
6282 if (pSurface->surfaceDesc.numArrayElements <= 6)
6283 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBE;
6284 else
6285 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBEARRAY;
6286 break;
6287 default:
6288 ASSERT_GUEST_FAILED();
6289 aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6290 }
6291
6292 cResources = idxSR + 1;
6293 }
6294 }
6295
6296 rc = DXShaderUpdateResources(&pDXShader->shaderInfo, aResourceDimension, aResourceReturnType, cResources);
6297 AssertRC(rc); /* Ignore rc because the shader will most likely work anyway. */
6298 }
6299
6300 vboxDXMatchShaderSignatures(pThisCC, pDXContext, pDXShader);
6301
6302 rc = DXShaderCreateDXBC(&pDXShader->shaderInfo, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
6303 if (RT_SUCCESS(rc))
6304 {
6305#ifdef LOG_ENABLED
6306 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6307 if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
6308 {
6309 ID3D10Blob *pBlob = 0;
6310 HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
6311 if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
6312 Log6(("%s\n", pBlob->GetBufferPointer()));
6313 else
6314 AssertFailed();
6315 D3D_RELEASE(pBlob);
6316 }
6317#endif
6318
6319 HRESULT hr = dxShaderCreate(pThisCC, pDXContext, pDXShader);
6320 if (FAILED(hr))
6321 rc = VERR_INVALID_STATE;
6322 }
6323 }
6324
6325 LogFunc(("Shader: cid=%u shid=%u type=%d, GuestSignatures %d, %Rrc\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures, rc));
6326 }
6327 else
6328 pDXShader = NULL;
6329
6330 if (RT_SUCCESS(rc))
6331 dxShaderSet(pThisCC, pDXContext, shaderType, pDXShader);
6332
6333 AssertRC(rc);
6334 }
6335
6336 /*
6337 * InputLayout
6338 */
6339 SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6340 ID3D11InputLayout *pInputLayout = NULL;
6341 if (elementLayoutId != SVGA3D_INVALID_ID)
6342 {
6343 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6344 if (!pDXElementLayout->pElementLayout)
6345 {
6346 uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
6347 uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6348 if (shid < pDXContext->pBackendDXContext->cShader)
6349 {
6350 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
6351 if (pDXShader->pvDXBC)
6352 dxCreateInputLayout(pThisCC, pDXContext, elementLayoutId, pDXShader);
6353 else
6354 LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid));
6355 }
6356 else
6357 LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid));
6358 }
6359
6360 pInputLayout = pDXElementLayout->pElementLayout;
6361
6362 LogFunc(("Input layout id %u\n", elementLayoutId));
6363 }
6364
6365 pDevice->pImmediateContext->IASetInputLayout(pInputLayout);
6366}
6367
6368
6369static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6370{
6371 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6372 RT_NOREF(pBackend);
6373
6374 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6375 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6376
6377 dxSetupPipeline(pThisCC, pDXContext);
6378
6379 if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
6380 pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
6381 else
6382 {
6383 /*
6384 * Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
6385 */
6386
6387 /* Make sure that 16 bit indices are enough. */
6388 if (vertexCount > 65535)
6389 {
6390 LogRelMax(1, ("VMSVGA: ignore Draw(TRIANGLEFAN, %u)\n", vertexCount));
6391 return VERR_NOT_SUPPORTED;
6392 }
6393
6394 /* Generate indices. */
6395 UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
6396 UINT const cbAlloc = IndexCount * sizeof(USHORT);
6397 USHORT *paIndices = (USHORT *)RTMemAlloc(cbAlloc);
6398 AssertReturn(paIndices, VERR_NO_MEMORY);
6399 USHORT iVertex = 1;
6400 for (UINT i = 0; i < IndexCount; i+= 3)
6401 {
6402 paIndices[i] = 0;
6403 paIndices[i + 1] = iVertex;
6404 ++iVertex;
6405 paIndices[i + 2] = iVertex;
6406 }
6407
6408 D3D11_SUBRESOURCE_DATA InitData;
6409 InitData.pSysMem = paIndices;
6410 InitData.SysMemPitch = cbAlloc;
6411 InitData.SysMemSlicePitch = cbAlloc;
6412
6413 D3D11_BUFFER_DESC bd;
6414 RT_ZERO(bd);
6415 bd.ByteWidth = cbAlloc;
6416 bd.Usage = D3D11_USAGE_IMMUTABLE;
6417 bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
6418 //bd.CPUAccessFlags = 0;
6419 //bd.MiscFlags = 0;
6420 //bd.StructureByteStride = 0;
6421
6422 ID3D11Buffer *pIndexBuffer = 0;
6423 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
6424 Assert(SUCCEEDED(hr));RT_NOREF(hr);
6425
6426 /* Save the current index buffer. */
6427 ID3D11Buffer *pSavedIndexBuffer = 0;
6428 DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
6429 UINT SavedOffset = 0;
6430 pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
6431
6432 /* Set up the device state. */
6433 pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
6434 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
6435
6436 UINT const StartIndexLocation = 0;
6437 INT const BaseVertexLocation = startVertexLocation;
6438 pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
6439
6440 /* Restore the device state. */
6441 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
6442 pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
6443 D3D_RELEASE(pSavedIndexBuffer);
6444
6445 /* Cleanup. */
6446 D3D_RELEASE(pIndexBuffer);
6447 RTMemFree(paIndices);
6448 }
6449
6450 /* Note which surfaces are being drawn. */
6451 dxTrackRenderTargets(pThisCC, pDXContext);
6452
6453 return VINF_SUCCESS;
6454}
6455
6456static int dxReadBuffer(DXDEVICE *pDevice, ID3D11Buffer *pBuffer, UINT Offset, UINT Bytes, void **ppvData, uint32_t *pcbData)
6457{
6458 D3D11_BUFFER_DESC desc;
6459 RT_ZERO(desc);
6460 pBuffer->GetDesc(&desc);
6461
6462 AssertReturn( Offset < desc.ByteWidth
6463 && Bytes <= desc.ByteWidth - Offset, VERR_INVALID_STATE);
6464
6465 void *pvData = RTMemAlloc(Bytes);
6466 if (!pvData)
6467 return VERR_NO_MEMORY;
6468
6469 *ppvData = pvData;
6470 *pcbData = Bytes;
6471
6472 int rc = dxStagingBufferRealloc(pDevice, Bytes);
6473 if (RT_SUCCESS(rc))
6474 {
6475 /* Copy from the buffer to the staging buffer. */
6476 ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
6477 UINT DstSubresource = 0;
6478 UINT DstX = Offset;
6479 UINT DstY = 0;
6480 UINT DstZ = 0;
6481 ID3D11Resource *pSrcResource = pBuffer;
6482 UINT SrcSubresource = 0;
6483 D3D11_BOX SrcBox;
6484 SrcBox.left = 0;
6485 SrcBox.top = 0;
6486 SrcBox.front = 0;
6487 SrcBox.right = Bytes;
6488 SrcBox.bottom = 1;
6489 SrcBox.back = 1;
6490 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
6491 pSrcResource, SrcSubresource, &SrcBox);
6492
6493 D3D11_MAPPED_SUBRESOURCE mappedResource;
6494 UINT const Subresource = 0; /* Buffers have only one subresource. */
6495 HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
6496 D3D11_MAP_READ, /* MapFlags = */ 0, &mappedResource);
6497 if (SUCCEEDED(hr))
6498 {
6499 memcpy(pvData, mappedResource.pData, Bytes);
6500
6501 /* Unmap the staging buffer. */
6502 pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
6503 }
6504 else
6505 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
6506
6507 }
6508
6509 if (RT_FAILURE(rc))
6510 {
6511 RTMemFree(*ppvData);
6512 *ppvData = NULL;
6513 *pcbData = 0;
6514 }
6515
6516 return rc;
6517}
6518
6519
6520static int dxDrawIndexedTriangleFan(DXDEVICE *pDevice, uint32_t IndexCountTF, uint32_t StartIndexLocationTF, int32_t BaseVertexLocationTF)
6521{
6522 /*
6523 * Emulate an indexed SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of triangle list.
6524 */
6525
6526 /* Make sure that 16 bit indices are enough. */
6527 if (IndexCountTF > 65535)
6528 {
6529 LogRelMax(1, ("VMSVGA: ignore DrawIndexed(TRIANGLEFAN, %u)\n", IndexCountTF));
6530 return VERR_NOT_SUPPORTED;
6531 }
6532
6533 /* Save the current index buffer. */
6534 ID3D11Buffer *pSavedIndexBuffer = 0;
6535 DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
6536 UINT SavedOffset = 0;
6537 pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
6538
6539 AssertReturn( SavedFormat == DXGI_FORMAT_R16_UINT
6540 || SavedFormat == DXGI_FORMAT_R32_UINT, VERR_NOT_SUPPORTED);
6541
6542 /* How many bytes are used by triangle fan indices. */
6543 UINT const BytesPerIndexTF = SavedFormat == DXGI_FORMAT_R16_UINT ? 2 : 4;
6544 UINT const BytesTF = BytesPerIndexTF * IndexCountTF;
6545
6546 /* Read the current index buffer content to obtain indices. */
6547 void *pvDataTF;
6548 uint32_t cbDataTF;
6549 int rc = dxReadBuffer(pDevice, pSavedIndexBuffer, StartIndexLocationTF, BytesTF, &pvDataTF, &cbDataTF);
6550 AssertRCReturn(rc, rc);
6551 AssertReturnStmt(cbDataTF >= BytesPerIndexTF, RTMemFree(pvDataTF), VERR_INVALID_STATE);
6552
6553 /* Generate indices for triangle list. */
6554 UINT const IndexCount = 3 * (IndexCountTF - 2); /* 3_per_triangle * num_triangles */
6555 UINT const cbAlloc = IndexCount * sizeof(USHORT);
6556 USHORT *paIndices = (USHORT *)RTMemAlloc(cbAlloc);
6557 AssertReturnStmt(paIndices, RTMemFree(pvDataTF), VERR_NO_MEMORY);
6558
6559 USHORT iVertex = 1;
6560 if (BytesPerIndexTF == 2)
6561 {
6562 USHORT *paIndicesTF = (USHORT *)pvDataTF;
6563 for (UINT i = 0; i < IndexCount; i+= 3)
6564 {
6565 paIndices[i] = paIndicesTF[0];
6566 AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
6567 paIndices[i + 1] = paIndicesTF[iVertex];
6568 ++iVertex;
6569 AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
6570 paIndices[i + 2] = paIndicesTF[iVertex];
6571 }
6572 }
6573 else
6574 {
6575 UINT *paIndicesTF = (UINT *)pvDataTF;
6576 for (UINT i = 0; i < IndexCount; i+= 3)
6577 {
6578 paIndices[i] = paIndicesTF[0];
6579 AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
6580 paIndices[i + 1] = paIndicesTF[iVertex];
6581 ++iVertex;
6582 AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
6583 paIndices[i + 2] = paIndicesTF[iVertex];
6584 }
6585 }
6586
6587 D3D11_SUBRESOURCE_DATA InitData;
6588 InitData.pSysMem = paIndices;
6589 InitData.SysMemPitch = cbAlloc;
6590 InitData.SysMemSlicePitch = cbAlloc;
6591
6592 D3D11_BUFFER_DESC bd;
6593 RT_ZERO(bd);
6594 bd.ByteWidth = cbAlloc;
6595 bd.Usage = D3D11_USAGE_IMMUTABLE;
6596 bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
6597 //bd.CPUAccessFlags = 0;
6598 //bd.MiscFlags = 0;
6599 //bd.StructureByteStride = 0;
6600
6601 ID3D11Buffer *pIndexBuffer = 0;
6602 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
6603 Assert(SUCCEEDED(hr));RT_NOREF(hr);
6604
6605 /* Set up the device state. */
6606 pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
6607 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
6608
6609 UINT const StartIndexLocation = 0;
6610 INT const BaseVertexLocation = BaseVertexLocationTF;
6611 pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
6612
6613 /* Restore the device state. */
6614 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
6615 pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
6616 D3D_RELEASE(pSavedIndexBuffer);
6617
6618 /* Cleanup. */
6619 D3D_RELEASE(pIndexBuffer);
6620 RTMemFree(paIndices);
6621 RTMemFree(pvDataTF);
6622
6623 return VINF_SUCCESS;
6624}
6625
6626
6627static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
6628{
6629 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6630 RT_NOREF(pBackend);
6631
6632 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6633 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6634
6635 dxSetupPipeline(pThisCC, pDXContext);
6636
6637 if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
6638 pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
6639 else
6640 {
6641 dxDrawIndexedTriangleFan(pDevice, indexCount, startIndexLocation, baseVertexLocation);
6642 }
6643
6644 /* Note which surfaces are being drawn. */
6645 dxTrackRenderTargets(pThisCC, pDXContext);
6646
6647 return VINF_SUCCESS;
6648}
6649
6650
6651static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
6652 uint32_t vertexCountPerInstance, uint32_t instanceCount, uint32_t startVertexLocation, uint32_t startInstanceLocation)
6653{
6654 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6655 RT_NOREF(pBackend);
6656
6657 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6658 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6659
6660 dxSetupPipeline(pThisCC, pDXContext);
6661
6662 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
6663
6664 pDevice->pImmediateContext->DrawInstanced(vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
6665
6666 /* Note which surfaces are being drawn. */
6667 dxTrackRenderTargets(pThisCC, pDXContext);
6668
6669 return VINF_SUCCESS;
6670}
6671
6672
6673static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
6674 uint32_t indexCountPerInstance, uint32_t instanceCount, uint32_t startIndexLocation, int32_t baseVertexLocation, uint32_t startInstanceLocation)
6675{
6676 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6677 RT_NOREF(pBackend);
6678
6679 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6680 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6681
6682 dxSetupPipeline(pThisCC, pDXContext);
6683
6684 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
6685
6686 pDevice->pImmediateContext->DrawIndexedInstanced(indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
6687
6688 /* Note which surfaces are being drawn. */
6689 dxTrackRenderTargets(pThisCC, pDXContext);
6690
6691 return VINF_SUCCESS;
6692}
6693
6694
6695static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6696{
6697 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6698 RT_NOREF(pBackend);
6699
6700 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6701 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6702
6703 dxSetupPipeline(pThisCC, pDXContext);
6704
6705 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
6706
6707 pDevice->pImmediateContext->DrawAuto();
6708
6709 /* Note which surfaces are being drawn. */
6710 dxTrackRenderTargets(pThisCC, pDXContext);
6711
6712 return VINF_SUCCESS;
6713}
6714
6715
6716static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
6717{
6718 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6719 RT_NOREF(pBackend);
6720
6721 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6722 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6723
6724 RT_NOREF(elementLayoutId);
6725
6726 return VINF_SUCCESS;
6727}
6728
6729
6730static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
6731{
6732 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6733 RT_NOREF(pBackend);
6734
6735 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6736 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6737
6738 for (uint32_t i = 0; i < cVertexBuffer; ++i)
6739 {
6740 uint32_t const idxVertexBuffer = startBuffer + i;
6741
6742 /* Get corresponding resource. Create the buffer if does not yet exist. */
6743 if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
6744 {
6745 PVMSVGA3DSURFACE pSurface;
6746 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
6747 AssertRCReturn(rc, rc);
6748
6749 if (pSurface->pBackendSurface == NULL)
6750 {
6751 /* Create the resource and initialize it with the current surface data. */
6752 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
6753 AssertRCReturn(rc, rc);
6754 }
6755 Assert(pSurface->pBackendSurface->u.pBuffer);
6756
6757 DXBOUNDVERTEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.vertexBuffers[idxVertexBuffer];
6758 if ( pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer
6759 || pBoundBuffer->stride != paVertexBuffer[i].stride
6760 || pBoundBuffer->offset != paVertexBuffer[i].offset)
6761 {
6762 LogFunc(("vertex buffer: [%u]: sid = %u, offset %u, stride %u (%p -> %p)\n",
6763 idxVertexBuffer, paVertexBuffer[i].sid, paVertexBuffer[i].offset, paVertexBuffer[i].stride, pBoundBuffer->pBuffer, pSurface->pBackendSurface->u.pBuffer));
6764
6765 if (pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer)
6766 {
6767 D3D_RELEASE(pBoundBuffer->pBuffer);
6768 pBoundBuffer->pBuffer = pSurface->pBackendSurface->u.pBuffer;
6769 pBoundBuffer->pBuffer->AddRef();
6770 }
6771 pBoundBuffer->stride = paVertexBuffer[i].stride;
6772 pBoundBuffer->offset = paVertexBuffer[i].offset;
6773 }
6774 }
6775 else
6776 {
6777 DXBOUNDVERTEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.vertexBuffers[idxVertexBuffer];
6778 D3D_RELEASE(pBoundBuffer->pBuffer);
6779 pBoundBuffer->stride = 0;
6780 pBoundBuffer->offset = 0;
6781 }
6782 }
6783
6784 return VINF_SUCCESS;
6785}
6786
6787
6788static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
6789{
6790 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6791 RT_NOREF(pBackend);
6792
6793 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6794 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6795
6796 /* Get corresponding resource. Create the buffer if does not yet exist. */
6797 if (sid != SVGA_ID_INVALID)
6798 {
6799 PVMSVGA3DSURFACE pSurface;
6800 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6801 AssertRCReturn(rc, rc);
6802
6803 if (pSurface->pBackendSurface == NULL)
6804 {
6805 /* Create the resource and initialize it with the current surface data. */
6806 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
6807 AssertRCReturn(rc, rc);
6808 }
6809
6810 DXGI_FORMAT const enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
6811 AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT || enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
6812
6813 DXBOUNDINDEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.indexBuffer;
6814 if ( pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer
6815 || pBoundBuffer->indexBufferOffset != offset
6816 || pBoundBuffer->indexBufferFormat != enmDxgiFormat)
6817 {
6818 LogFunc(("index_buffer: sid = %u, offset %u, (%p -> %p)\n",
6819 sid, offset, pBoundBuffer->pBuffer, pSurface->pBackendSurface->u.pBuffer));
6820
6821 if (pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer)
6822 {
6823 D3D_RELEASE(pBoundBuffer->pBuffer);
6824 pBoundBuffer->pBuffer = pSurface->pBackendSurface->u.pBuffer;
6825 pBoundBuffer->pBuffer->AddRef();
6826 }
6827 pBoundBuffer->indexBufferOffset = offset;
6828 pBoundBuffer->indexBufferFormat = enmDxgiFormat;
6829 }
6830 }
6831 else
6832 {
6833 DXBOUNDINDEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.indexBuffer;
6834 D3D_RELEASE(pBoundBuffer->pBuffer);
6835 pBoundBuffer->indexBufferOffset = 0;
6836 pBoundBuffer->indexBufferFormat = DXGI_FORMAT_UNKNOWN;
6837 }
6838
6839 return VINF_SUCCESS;
6840}
6841
6842static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
6843{
6844 static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
6845 {
6846 D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
6847 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
6848 D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
6849 D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
6850 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
6851 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
6852 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
6853 D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
6854 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
6855 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
6856 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
6857 D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
6858 D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
6859 D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
6860 D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
6861 D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
6862 D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
6863 D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
6864 D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
6865 D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
6866 D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
6867 D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
6868 D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
6869 D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
6870 D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
6871 D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
6872 D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
6873 D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
6874 D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
6875 D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
6876 D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
6877 D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
6878 D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
6879 D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
6880 D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
6881 D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
6882 D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
6883 D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
6884 D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
6885 D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
6886 D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
6887 D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
6888 D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
6889 };
6890 return aD3D11PrimitiveTopology[primitiveType];
6891}
6892
6893static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
6894{
6895 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6896 RT_NOREF(pBackend);
6897
6898 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6899 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6900
6901 D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
6902 pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
6903 return VINF_SUCCESS;
6904}
6905
6906
6907static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6908{
6909 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6910 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6911
6912 UINT UAVStartSlot = 0;
6913 UINT NumUAVs = 0;
6914 ID3D11UnorderedAccessView *apUnorderedAccessViews[SVGA3D_DX11_1_MAX_UAVIEWS];
6915 UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
6916 for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6917 {
6918 SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
6919 if (uaViewId != SVGA3D_INVALID_ID)
6920 {
6921 if (NumUAVs == 0)
6922 UAVStartSlot = idxUA;
6923 NumUAVs = idxUA - UAVStartSlot + 1;
6924 apUnorderedAccessViews[idxUA] = pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pUnorderedAccessView;
6925
6926 SVGACOTableDXUAViewEntry const *pEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
6927 aUAVInitialCounts[idxUA] = pEntry->structureCount;
6928 }
6929 else
6930 {
6931 apUnorderedAccessViews[idxUA] = NULL;
6932 aUAVInitialCounts[idxUA] = (UINT)-1;
6933 }
6934 }
6935
6936 UINT NumRTVs = 0;
6937 ID3D11RenderTargetView *apRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
6938 RT_ZERO(apRenderTargetViews);
6939 for (uint32_t i = 0; i < pDXContext->cRenderTargets; ++i)
6940 {
6941 SVGA3dRenderTargetViewId const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
6942 if (renderTargetViewId != SVGA3D_INVALID_ID)
6943 {
6944 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
6945 apRenderTargetViews[i] = pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId].u.pRenderTargetView;
6946 ++NumRTVs;
6947 }
6948 }
6949
6950 /* RTVs are followed by UAVs. */
6951 Assert(NumRTVs <= pDXContext->svgaDXContext.uavSpliceIndex);
6952
6953 ID3D11DepthStencilView *pDepthStencilView = NULL;
6954 SVGA3dDepthStencilViewId const depthStencilViewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
6955 if (depthStencilViewId != SVGA_ID_INVALID)
6956 pDepthStencilView = pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId].u.pDepthStencilView;
6957
6958 pDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(NumRTVs,
6959 apRenderTargetViews,
6960 pDepthStencilView,
6961 pDXContext->svgaDXContext.uavSpliceIndex,
6962 NumUAVs,
6963 apUnorderedAccessViews,
6964 aUAVInitialCounts);
6965 return VINF_SUCCESS;
6966}
6967
6968
6969static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
6970{
6971 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6972 RT_NOREF(pBackend);
6973
6974 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6975 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6976
6977 RT_NOREF(depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
6978
6979 return VINF_SUCCESS;
6980}
6981
6982
6983static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
6984{
6985 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6986 RT_NOREF(pBackend);
6987
6988 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6989 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6990
6991 if (blendId != SVGA3D_INVALID_ID)
6992 {
6993 ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
6994 pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
6995 }
6996 else
6997 pDevice->pImmediateContext->OMSetBlendState(NULL, NULL, 0);
6998
6999 return VINF_SUCCESS;
7000}
7001
7002
7003static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
7004{
7005 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7006 RT_NOREF(pBackend);
7007
7008 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7009 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7010
7011 if (depthStencilId != SVGA3D_INVALID_ID)
7012 {
7013 ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
7014 pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
7015 }
7016 else
7017 pDevice->pImmediateContext->OMSetDepthStencilState(NULL, 0);
7018
7019 return VINF_SUCCESS;
7020}
7021
7022
7023static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
7024{
7025 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7026 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7027 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7028
7029 RT_NOREF(pBackend);
7030
7031 if (rasterizerId != SVGA3D_INVALID_ID)
7032 {
7033 ID3D11RasterizerState *pRasterizerState = pDXContext->pBackendDXContext->papRasterizerState[rasterizerId];
7034 pDevice->pImmediateContext->RSSetState(pRasterizerState);
7035 }
7036 else
7037 pDevice->pImmediateContext->RSSetState(NULL);
7038
7039 return VINF_SUCCESS;
7040}
7041
7042
7043typedef struct VGPU10QUERYINFO
7044{
7045 SVGA3dQueryType svgaQueryType;
7046 uint32_t cbDataVMSVGA;
7047 D3D11_QUERY dxQueryType;
7048 uint32_t cbDataD3D11;
7049} VGPU10QUERYINFO;
7050
7051static VGPU10QUERYINFO const *dxQueryInfo(SVGA3dQueryType type)
7052{
7053 static VGPU10QUERYINFO const aQueryInfo[SVGA3D_QUERYTYPE_MAX] =
7054 {
7055 { SVGA3D_QUERYTYPE_OCCLUSION, sizeof(SVGADXOcclusionQueryResult),
7056 D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7057 { SVGA3D_QUERYTYPE_TIMESTAMP, sizeof(SVGADXTimestampQueryResult),
7058 D3D11_QUERY_TIMESTAMP, sizeof(UINT64) },
7059 { SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT, sizeof(SVGADXTimestampDisjointQueryResult),
7060 D3D11_QUERY_TIMESTAMP_DISJOINT, sizeof(D3D11_QUERY_DATA_TIMESTAMP_DISJOINT) },
7061 { SVGA3D_QUERYTYPE_PIPELINESTATS, sizeof(SVGADXPipelineStatisticsQueryResult),
7062 D3D11_QUERY_PIPELINE_STATISTICS, sizeof(D3D11_QUERY_DATA_PIPELINE_STATISTICS) },
7063 { SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE, sizeof(SVGADXOcclusionPredicateQueryResult),
7064 D3D11_QUERY_OCCLUSION_PREDICATE, sizeof(BOOL) },
7065 { SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS, sizeof(SVGADXStreamOutStatisticsQueryResult),
7066 D3D11_QUERY_SO_STATISTICS, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7067 { SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE, sizeof(SVGADXStreamOutPredicateQueryResult),
7068 D3D11_QUERY_SO_OVERFLOW_PREDICATE, sizeof(BOOL) },
7069 { SVGA3D_QUERYTYPE_OCCLUSION64, sizeof(SVGADXOcclusion64QueryResult),
7070 D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7071 { SVGA3D_QUERYTYPE_SOSTATS_STREAM0, sizeof(SVGADXStreamOutStatisticsQueryResult),
7072 D3D11_QUERY_SO_STATISTICS_STREAM0, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7073 { SVGA3D_QUERYTYPE_SOSTATS_STREAM1, sizeof(SVGADXStreamOutStatisticsQueryResult),
7074 D3D11_QUERY_SO_STATISTICS_STREAM1, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7075 { SVGA3D_QUERYTYPE_SOSTATS_STREAM2, sizeof(SVGADXStreamOutStatisticsQueryResult),
7076 D3D11_QUERY_SO_STATISTICS_STREAM2, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7077 { SVGA3D_QUERYTYPE_SOSTATS_STREAM3, sizeof(SVGADXStreamOutStatisticsQueryResult),
7078 D3D11_QUERY_SO_STATISTICS_STREAM3, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7079 { SVGA3D_QUERYTYPE_SOP_STREAM0, sizeof(SVGADXStreamOutPredicateQueryResult),
7080 D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM0, sizeof(BOOL) },
7081 { SVGA3D_QUERYTYPE_SOP_STREAM1, sizeof(SVGADXStreamOutPredicateQueryResult),
7082 D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM1, sizeof(BOOL) },
7083 { SVGA3D_QUERYTYPE_SOP_STREAM2, sizeof(SVGADXStreamOutPredicateQueryResult),
7084 D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM2, sizeof(BOOL) },
7085 { SVGA3D_QUERYTYPE_SOP_STREAM3, sizeof(SVGADXStreamOutPredicateQueryResult),
7086 D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM3, sizeof(BOOL) },
7087 };
7088
7089 ASSERT_GUEST_RETURN(type < RT_ELEMENTS(aQueryInfo), NULL);
7090 return &aQueryInfo[type];
7091}
7092
7093static int dxDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7094{
7095 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7096 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7097
7098 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7099 VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7100 if (!pQueryInfo)
7101 return VERR_INVALID_PARAMETER;
7102
7103 D3D11_QUERY_DESC desc;
7104 desc.Query = pQueryInfo->dxQueryType;
7105 desc.MiscFlags = 0;
7106 if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7107 desc.MiscFlags |= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7108
7109 HRESULT hr = pDXDevice->pDevice->CreateQuery(&desc, &pDXQuery->pQuery);
7110 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7111
7112 return VINF_SUCCESS;
7113}
7114
7115
7116static int dxDestroyQuery(DXQUERY *pDXQuery)
7117{
7118 D3D_RELEASE(pDXQuery->pQuery);
7119 return VINF_SUCCESS;
7120}
7121
7122
7123static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7124{
7125 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7126 RT_NOREF(pBackend);
7127
7128 return dxDefineQuery(pThisCC, pDXContext, queryId, pEntry);
7129}
7130
7131
7132static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7133{
7134 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7135 RT_NOREF(pBackend);
7136
7137 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7138 dxDestroyQuery(pDXQuery);
7139
7140 return VINF_SUCCESS;
7141}
7142
7143
7144/** @todo queryId makes pDXQuery redundant */
7145static int dxBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, DXQUERY *pDXQuery)
7146{
7147 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7148 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7149
7150 /* Begin is disabled for some queries. */
7151 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7152 if (pEntry->type == SVGA3D_QUERYTYPE_TIMESTAMP)
7153 return VINF_SUCCESS;
7154
7155 pDXDevice->pImmediateContext->Begin(pDXQuery->pQuery);
7156 return VINF_SUCCESS;
7157}
7158
7159
7160static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7161{
7162 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7163 RT_NOREF(pBackend);
7164
7165 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7166 int rc = dxBeginQuery(pThisCC, pDXContext, queryId, pDXQuery);
7167 return rc;
7168}
7169
7170
7171static int dxGetQueryResult(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7172 SVGADXQueryResultUnion *pQueryResult, uint32_t *pcbOut)
7173{
7174 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7175 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7176
7177 typedef union _DXQUERYRESULT
7178 {
7179 UINT64 occlusion;
7180 UINT64 timestamp;
7181 D3D11_QUERY_DATA_TIMESTAMP_DISJOINT timestampDisjoint;
7182 D3D11_QUERY_DATA_PIPELINE_STATISTICS pipelineStatistics;
7183 BOOL occlusionPredicate;
7184 D3D11_QUERY_DATA_SO_STATISTICS soStatistics;
7185 BOOL soOverflowPredicate;
7186 } DXQUERYRESULT;
7187
7188 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7189 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7190 VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7191 if (!pQueryInfo)
7192 return VERR_INVALID_PARAMETER;
7193
7194 DXQUERYRESULT dxQueryResult;
7195 while (pDXDevice->pImmediateContext->GetData(pDXQuery->pQuery, &dxQueryResult, pQueryInfo->cbDataD3D11, 0) != S_OK)
7196 {
7197 RTThreadYield();
7198 }
7199
7200 /* Copy back the result. */
7201 switch (pEntry->type)
7202 {
7203 case SVGA3D_QUERYTYPE_OCCLUSION:
7204 pQueryResult->occ.samplesRendered = (uint32_t)dxQueryResult.occlusion;
7205 break;
7206 case SVGA3D_QUERYTYPE_TIMESTAMP:
7207 pQueryResult->ts.timestamp = dxQueryResult.timestamp;
7208 break;
7209 case SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT:
7210 pQueryResult->tsDisjoint.realFrequency = dxQueryResult.timestampDisjoint.Frequency;
7211 pQueryResult->tsDisjoint.disjoint = dxQueryResult.timestampDisjoint.Disjoint;
7212 break;
7213 case SVGA3D_QUERYTYPE_PIPELINESTATS:
7214 pQueryResult->pipelineStats.inputAssemblyVertices = dxQueryResult.pipelineStatistics.IAVertices;
7215 pQueryResult->pipelineStats.inputAssemblyPrimitives = dxQueryResult.pipelineStatistics.IAPrimitives;
7216 pQueryResult->pipelineStats.vertexShaderInvocations = dxQueryResult.pipelineStatistics.VSInvocations;
7217 pQueryResult->pipelineStats.geometryShaderInvocations = dxQueryResult.pipelineStatistics.GSInvocations;
7218 pQueryResult->pipelineStats.geometryShaderPrimitives = dxQueryResult.pipelineStatistics.GSPrimitives;
7219 pQueryResult->pipelineStats.clipperInvocations = dxQueryResult.pipelineStatistics.CInvocations;
7220 pQueryResult->pipelineStats.clipperPrimitives = dxQueryResult.pipelineStatistics.CPrimitives;
7221 pQueryResult->pipelineStats.pixelShaderInvocations = dxQueryResult.pipelineStatistics.PSInvocations;
7222 pQueryResult->pipelineStats.hullShaderInvocations = dxQueryResult.pipelineStatistics.HSInvocations;
7223 pQueryResult->pipelineStats.domainShaderInvocations = dxQueryResult.pipelineStatistics.DSInvocations;
7224 pQueryResult->pipelineStats.computeShaderInvocations = dxQueryResult.pipelineStatistics.CSInvocations;
7225 break;
7226 case SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE:
7227 pQueryResult->occPred.anySamplesRendered = dxQueryResult.occlusionPredicate;
7228 break;
7229 case SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS:
7230 case SVGA3D_QUERYTYPE_SOSTATS_STREAM0:
7231 case SVGA3D_QUERYTYPE_SOSTATS_STREAM1:
7232 case SVGA3D_QUERYTYPE_SOSTATS_STREAM2:
7233 case SVGA3D_QUERYTYPE_SOSTATS_STREAM3:
7234 pQueryResult->soStats.numPrimitivesWritten = dxQueryResult.soStatistics.NumPrimitivesWritten;
7235 pQueryResult->soStats.numPrimitivesRequired = dxQueryResult.soStatistics.PrimitivesStorageNeeded;
7236 break;
7237 case SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE:
7238 case SVGA3D_QUERYTYPE_SOP_STREAM0:
7239 case SVGA3D_QUERYTYPE_SOP_STREAM1:
7240 case SVGA3D_QUERYTYPE_SOP_STREAM2:
7241 case SVGA3D_QUERYTYPE_SOP_STREAM3:
7242 pQueryResult->soPred.overflowed = dxQueryResult.soOverflowPredicate;
7243 break;
7244 case SVGA3D_QUERYTYPE_OCCLUSION64:
7245 pQueryResult->occ64.samplesRendered = dxQueryResult.occlusion;
7246 break;
7247 }
7248
7249 *pcbOut = pQueryInfo->cbDataVMSVGA;
7250 return VINF_SUCCESS;
7251}
7252
7253static int dxEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7254 SVGADXQueryResultUnion *pQueryResult, uint32_t *pcbOut)
7255{
7256 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7257 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7258
7259 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7260 pDXDevice->pImmediateContext->End(pDXQuery->pQuery);
7261
7262 /** @todo Consider issuing QueryEnd and getting data later in FIFO thread loop. */
7263 return dxGetQueryResult(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7264}
7265
7266
7267static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7268 SVGA3dQueryId queryId, SVGADXQueryResultUnion *pQueryResult, uint32_t *pcbOut)
7269{
7270 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7271 RT_NOREF(pBackend);
7272
7273 int rc = dxEndQuery(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7274 return rc;
7275}
7276
7277
7278static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, uint32_t predicateValue)
7279{
7280 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7281 RT_NOREF(pBackend);
7282
7283 DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7284 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7285
7286 if (queryId != SVGA3D_INVALID_ID)
7287 {
7288 DEBUG_BREAKPOINT_TEST();
7289 DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7290 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7291
7292 VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7293 if (!pQueryInfo)
7294 return VERR_INVALID_PARAMETER;
7295
7296 D3D_RELEASE(pDXQuery->pQuery);
7297
7298 D3D11_QUERY_DESC desc;
7299 desc.Query = pQueryInfo->dxQueryType;
7300 desc.MiscFlags = 0;
7301 if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7302 desc.MiscFlags |= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7303
7304 HRESULT hr = pDXDevice->pDevice->CreatePredicate(&desc, &pDXQuery->pPredicate);
7305 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7306
7307 pDXDevice->pImmediateContext->SetPredication(pDXQuery->pPredicate, RT_BOOL(predicateValue));
7308 }
7309 else
7310 pDXDevice->pImmediateContext->SetPredication(NULL, FALSE);
7311
7312 return VINF_SUCCESS;
7313}
7314
7315
7316static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cSOTarget, SVGA3dSoTarget const *paSoTarget)
7317{
7318 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7319 RT_NOREF(pBackend);
7320
7321 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7322 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7323
7324 /* For each paSoTarget[i]:
7325 * If the stream outout buffer object does not exist then create it.
7326 * If the surface has been updated by the guest then update the buffer object.
7327 * Use SOSetTargets to set the buffers.
7328 */
7329
7330 ID3D11Buffer *paResource[SVGA3D_DX_MAX_SOTARGETS];
7331 UINT paOffset[SVGA3D_DX_MAX_SOTARGETS];
7332
7333 /* Always re-bind all 4 SO targets. They can be NULL. */
7334 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
7335 {
7336 /* Get corresponding resource. Create the buffer if does not yet exist. */
7337 if (i < cSOTarget && paSoTarget[i].sid != SVGA_ID_INVALID)
7338 {
7339 PVMSVGA3DSURFACE pSurface;
7340 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paSoTarget[i].sid, &pSurface);
7341 AssertRCReturn(rc, rc);
7342
7343 if (pSurface->pBackendSurface == NULL)
7344 {
7345 /* Create the resource. */
7346 rc = vmsvga3dBackSurfaceCreateSoBuffer(pThisCC, pDXContext, pSurface);
7347 AssertRCReturn(rc, rc);
7348 }
7349
7350 /** @todo How paSoTarget[i].sizeInBytes is used? Maybe when the buffer is created? */
7351 paResource[i] = pSurface->pBackendSurface->u.pBuffer;
7352 paOffset[i] = paSoTarget[i].offset;
7353 }
7354 else
7355 {
7356 paResource[i] = NULL;
7357 paOffset[i] = 0;
7358 }
7359 }
7360
7361 pDevice->pImmediateContext->SOSetTargets(SVGA3D_DX_MAX_SOTARGETS, paResource, paOffset);
7362
7363 pDXContext->pBackendDXContext->cSOTarget = cSOTarget;
7364
7365 return VINF_SUCCESS;
7366}
7367
7368
7369static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
7370{
7371 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7372 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7373 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7374
7375 RT_NOREF(pBackend);
7376
7377 /* D3D11_VIEWPORT is identical to SVGA3dViewport. */
7378 D3D11_VIEWPORT *pViewports = (D3D11_VIEWPORT *)paViewport;
7379
7380 pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
7381 return VINF_SUCCESS;
7382}
7383
7384
7385static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
7386{
7387 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7388 RT_NOREF(pBackend);
7389
7390 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7391 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7392
7393 /* D3D11_RECT is identical to SVGASignedRect. */
7394 D3D11_RECT *pRects = (D3D11_RECT *)paRect;
7395
7396 pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
7397 return VINF_SUCCESS;
7398}
7399
7400
7401static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
7402{
7403 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7404 RT_NOREF(pBackend);
7405
7406 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7407 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7408
7409 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
7410 if (!pDXView->u.pRenderTargetView)
7411 {
7412//DEBUG_BREAKPOINT_TEST();
7413 /* (Re-)create the render target view, because a creation of a view is deferred until a draw or a clear call. */
7414 SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
7415 int rc = dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
7416 AssertRCReturn(rc, rc);
7417 }
7418 pDevice->pImmediateContext->ClearRenderTargetView(pDXView->u.pRenderTargetView, pRGBA->value);
7419 return VINF_SUCCESS;
7420}
7421
7422
7423static DECLCALLBACK(int) vmsvga3dBackVBDXClearRenderTargetViewRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId,
7424 SVGA3dRGBAFloat const *pColor, uint32_t cRect, SVGASignedRect const *paRect)
7425{
7426 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7427 RT_NOREF(pBackend);
7428
7429 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7430 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7431
7432 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
7433 if (!pDXView->u.pRenderTargetView)
7434 {
7435 /* (Re-)create the render target view, because a creation of a view is deferred until a draw or a clear call. */
7436 SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
7437 int rc = dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
7438 AssertRCReturn(rc, rc);
7439 }
7440 pDevice->pImmediateContext->ClearView(pDXView->u.pRenderTargetView, pColor->value, (D3D11_RECT *)paRect, cRect);
7441 return VINF_SUCCESS;
7442}
7443
7444
7445static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
7446{
7447 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7448 RT_NOREF(pBackend);
7449
7450 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7451 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7452
7453 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
7454 if (!pDXView->u.pDepthStencilView)
7455 {
7456//DEBUG_BREAKPOINT_TEST();
7457 /* (Re-)create the depth stencil view, because a creation of a view is deferred until a draw or a clear call. */
7458 SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
7459 int rc = dxDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
7460 AssertRCReturn(rc, rc);
7461 }
7462 pDevice->pImmediateContext->ClearDepthStencilView(pDXView->u.pDepthStencilView, flags, depth, stencil);
7463 return VINF_SUCCESS;
7464}
7465
7466
7467static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
7468{
7469 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7470 RT_NOREF(pBackend);
7471
7472 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7473 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7474
7475 PVMSVGA3DSURFACE pSrcSurface;
7476 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
7477 AssertRCReturn(rc, rc);
7478
7479 PVMSVGA3DSURFACE pDstSurface;
7480 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
7481 AssertRCReturn(rc, rc);
7482
7483 if (pSrcSurface->pBackendSurface == NULL)
7484 {
7485 /* Create the resource. */
7486 if (pSrcSurface->format != SVGA3D_BUFFER)
7487 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
7488 else
7489 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
7490 AssertRCReturn(rc, rc);
7491 }
7492
7493 if (pDstSurface->pBackendSurface == NULL)
7494 {
7495 /* Create the resource. */
7496 if (pSrcSurface->format != SVGA3D_BUFFER)
7497 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
7498 else
7499 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
7500 AssertRCReturn(rc, rc);
7501 }
7502
7503 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
7504 pDXContext->cid, pSrcSurface->idAssociatedContext,
7505 (pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
7506 pDstSurface->idAssociatedContext,
7507 (pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
7508
7509 /* Clip the box. */
7510 /** @todo Use [src|dst]SubResource to index p[Src|Dst]Surface->paMipmapLevels array directly. */
7511 uint32_t iSrcFace;
7512 uint32_t iSrcMipmap;
7513 vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
7514
7515 uint32_t iDstFace;
7516 uint32_t iDstMipmap;
7517 vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
7518
7519 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
7520 rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
7521 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
7522
7523 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
7524 rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
7525 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
7526
7527 SVGA3dCopyBox clipBox = *pBox;
7528 vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
7529
7530 UINT DstSubresource = dstSubResource;
7531 UINT DstX = clipBox.x;
7532 UINT DstY = clipBox.y;
7533 UINT DstZ = clipBox.z;
7534
7535 UINT SrcSubresource = srcSubResource;
7536 D3D11_BOX SrcBox;
7537 SrcBox.left = clipBox.srcx;
7538 SrcBox.top = clipBox.srcy;
7539 SrcBox.front = clipBox.srcz;
7540 SrcBox.right = clipBox.srcx + clipBox.w;
7541 SrcBox.bottom = clipBox.srcy + clipBox.h;
7542 SrcBox.back = clipBox.srcz + clipBox.d;
7543
7544 ID3D11Resource *pDstResource;
7545 ID3D11Resource *pSrcResource;
7546
7547 pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
7548 pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
7549
7550 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
7551 pSrcResource, SrcSubresource, &SrcBox);
7552
7553 pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
7554 return VINF_SUCCESS;
7555}
7556
7557
7558static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, SVGA3dSurfaceId srcSid)
7559{
7560 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7561 RT_NOREF(pBackend);
7562
7563 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7564 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7565
7566 PVMSVGA3DSURFACE pSrcSurface;
7567 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
7568 AssertRCReturn(rc, rc);
7569
7570 PVMSVGA3DSURFACE pDstSurface;
7571 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
7572 AssertRCReturn(rc, rc);
7573
7574 if (pSrcSurface->pBackendSurface == NULL)
7575 {
7576 /* Create the resource. */
7577 if (pSrcSurface->format != SVGA3D_BUFFER)
7578 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
7579 else
7580 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
7581 AssertRCReturn(rc, rc);
7582 }
7583
7584 if (pDstSurface->pBackendSurface == NULL)
7585 {
7586 /* Create the resource. */
7587 if (pSrcSurface->format != SVGA3D_BUFFER)
7588 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
7589 else
7590 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
7591 AssertRCReturn(rc, rc);
7592 }
7593
7594 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
7595 pDXContext->cid, pSrcSurface->idAssociatedContext,
7596 (pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
7597 pDstSurface->idAssociatedContext,
7598 (pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
7599
7600 ID3D11Resource *pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
7601 ID3D11Resource *pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
7602
7603 pDevice->pImmediateContext->CopyResource(pDstResource, pSrcResource);
7604
7605 pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
7606 return VINF_SUCCESS;
7607}
7608
7609
7610#include "shaders/d3d11blitter.hlsl.vs.h"
7611#include "shaders/d3d11blitter.hlsl.ps.h"
7612
7613#define HTEST(stmt) \
7614 hr = stmt; \
7615 AssertReturn(SUCCEEDED(hr), hr)
7616
7617
7618static void BlitRelease(D3D11BLITTER *pBlitter)
7619{
7620 D3D_RELEASE(pBlitter->pVertexShader);
7621 D3D_RELEASE(pBlitter->pPixelShader);
7622 D3D_RELEASE(pBlitter->pSamplerState);
7623 D3D_RELEASE(pBlitter->pRasterizerState);
7624 D3D_RELEASE(pBlitter->pBlendState);
7625 RT_ZERO(*pBlitter);
7626}
7627
7628
7629static HRESULT BlitInit(D3D11BLITTER *pBlitter, ID3D11Device *pDevice, ID3D11DeviceContext *pImmediateContext)
7630{
7631 HRESULT hr;
7632
7633 RT_ZERO(*pBlitter);
7634
7635 pBlitter->pDevice = pDevice;
7636 pBlitter->pImmediateContext = pImmediateContext;
7637
7638 HTEST(pBlitter->pDevice->CreateVertexShader(g_vs_blitter, sizeof(g_vs_blitter), NULL, &pBlitter->pVertexShader));
7639 HTEST(pBlitter->pDevice->CreatePixelShader(g_ps_blitter, sizeof(g_ps_blitter), NULL, &pBlitter->pPixelShader));
7640
7641 D3D11_SAMPLER_DESC SamplerDesc;
7642 SamplerDesc.Filter = D3D11_FILTER_ANISOTROPIC;
7643 SamplerDesc.AddressU = D3D11_TEXTURE_ADDRESS_WRAP;
7644 SamplerDesc.AddressV = D3D11_TEXTURE_ADDRESS_WRAP;
7645 SamplerDesc.AddressW = D3D11_TEXTURE_ADDRESS_WRAP;
7646 SamplerDesc.MipLODBias = 0.0f;
7647 SamplerDesc.MaxAnisotropy = 4;
7648 SamplerDesc.ComparisonFunc = D3D11_COMPARISON_ALWAYS;
7649 SamplerDesc.BorderColor[0] = 0.0f;
7650 SamplerDesc.BorderColor[1] = 0.0f;
7651 SamplerDesc.BorderColor[2] = 0.0f;
7652 SamplerDesc.BorderColor[3] = 0.0f;
7653 SamplerDesc.MinLOD = 0.0f;
7654 SamplerDesc.MaxLOD = 0.0f;
7655 HTEST(pBlitter->pDevice->CreateSamplerState(&SamplerDesc, &pBlitter->pSamplerState));
7656
7657 D3D11_RASTERIZER_DESC RasterizerDesc;
7658 RasterizerDesc.FillMode = D3D11_FILL_SOLID;
7659 RasterizerDesc.CullMode = D3D11_CULL_NONE;
7660 RasterizerDesc.FrontCounterClockwise = FALSE;
7661 RasterizerDesc.DepthBias = 0;
7662 RasterizerDesc.DepthBiasClamp = 0.0f;
7663 RasterizerDesc.SlopeScaledDepthBias = 0.0f;
7664 RasterizerDesc.DepthClipEnable = FALSE;
7665 RasterizerDesc.ScissorEnable = FALSE;
7666 RasterizerDesc.MultisampleEnable = FALSE;
7667 RasterizerDesc.AntialiasedLineEnable = FALSE;
7668 HTEST(pBlitter->pDevice->CreateRasterizerState(&RasterizerDesc, &pBlitter->pRasterizerState));
7669
7670 D3D11_BLEND_DESC BlendDesc;
7671 BlendDesc.AlphaToCoverageEnable = FALSE;
7672 BlendDesc.IndependentBlendEnable = FALSE;
7673 for (unsigned i = 0; i < RT_ELEMENTS(BlendDesc.RenderTarget); ++i)
7674 {
7675 BlendDesc.RenderTarget[i].BlendEnable = FALSE;
7676 BlendDesc.RenderTarget[i].SrcBlend = D3D11_BLEND_SRC_COLOR;
7677 BlendDesc.RenderTarget[i].DestBlend = D3D11_BLEND_ZERO;
7678 BlendDesc.RenderTarget[i].BlendOp = D3D11_BLEND_OP_ADD;
7679 BlendDesc.RenderTarget[i].SrcBlendAlpha = D3D11_BLEND_SRC_ALPHA;
7680 BlendDesc.RenderTarget[i].DestBlendAlpha = D3D11_BLEND_ZERO;
7681 BlendDesc.RenderTarget[i].BlendOpAlpha = D3D11_BLEND_OP_ADD;
7682 BlendDesc.RenderTarget[i].RenderTargetWriteMask = 0xF;
7683 }
7684 HTEST(pBlitter->pDevice->CreateBlendState(&BlendDesc, &pBlitter->pBlendState));
7685
7686 return S_OK;
7687}
7688
7689
7690static HRESULT BlitFromTexture(D3D11BLITTER *pBlitter, ID3D11RenderTargetView *pDstRenderTargetView,
7691 float cDstWidth, float cDstHeight, D3D11_RECT const &rectDst,
7692 ID3D11ShaderResourceView *pSrcShaderResourceView)
7693{
7694 HRESULT hr;
7695
7696 /*
7697 * Save pipeline state.
7698 */
7699 struct
7700 {
7701 D3D11_PRIMITIVE_TOPOLOGY Topology;
7702 ID3D11InputLayout *pInputLayout;
7703 ID3D11Buffer *pConstantBuffer;
7704 ID3D11VertexShader *pVertexShader;
7705 ID3D11HullShader *pHullShader;
7706 ID3D11DomainShader *pDomainShader;
7707 ID3D11GeometryShader *pGeometryShader;
7708 ID3D11ShaderResourceView *pShaderResourceView;
7709 ID3D11PixelShader *pPixelShader;
7710 ID3D11SamplerState *pSamplerState;
7711 ID3D11RasterizerState *pRasterizerState;
7712 ID3D11BlendState *pBlendState;
7713 FLOAT BlendFactor[4];
7714 UINT SampleMask;
7715 ID3D11RenderTargetView *apRenderTargetView[D3D11_SIMULTANEOUS_RENDER_TARGET_COUNT];
7716 ID3D11DepthStencilView *pDepthStencilView;
7717 UINT NumViewports;
7718 D3D11_VIEWPORT aViewport[D3D11_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE];
7719 } SavedState;
7720
7721 pBlitter->pImmediateContext->IAGetPrimitiveTopology(&SavedState.Topology);
7722 pBlitter->pImmediateContext->IAGetInputLayout(&SavedState.pInputLayout);
7723 pBlitter->pImmediateContext->VSGetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
7724 pBlitter->pImmediateContext->VSGetShader(&SavedState.pVertexShader, NULL, NULL);
7725 pBlitter->pImmediateContext->HSGetShader(&SavedState.pHullShader, NULL, NULL);
7726 pBlitter->pImmediateContext->DSGetShader(&SavedState.pDomainShader, NULL, NULL);
7727 pBlitter->pImmediateContext->GSGetShader(&SavedState.pGeometryShader, NULL, NULL);
7728 pBlitter->pImmediateContext->PSGetShaderResources(0, 1, &SavedState.pShaderResourceView);
7729 pBlitter->pImmediateContext->PSGetShader(&SavedState.pPixelShader, NULL, NULL);
7730 pBlitter->pImmediateContext->PSGetSamplers(0, 1, &SavedState.pSamplerState);
7731 pBlitter->pImmediateContext->RSGetState(&SavedState.pRasterizerState);
7732 pBlitter->pImmediateContext->OMGetBlendState(&SavedState.pBlendState, SavedState.BlendFactor, &SavedState.SampleMask);
7733 pBlitter->pImmediateContext->OMGetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, &SavedState.pDepthStencilView);
7734 SavedState.NumViewports = RT_ELEMENTS(SavedState.aViewport);
7735 pBlitter->pImmediateContext->RSGetViewports(&SavedState.NumViewports, &SavedState.aViewport[0]);
7736
7737 /*
7738 * Setup pipeline for the blitter.
7739 */
7740
7741 /* Render target is first.
7742 * If the source texture is bound as a render target, then this call will unbind it
7743 * and allow to use it as the shader resource.
7744 */
7745 pBlitter->pImmediateContext->OMSetRenderTargets(1, &pDstRenderTargetView, NULL);
7746
7747 /* Input assembler. */
7748 pBlitter->pImmediateContext->IASetInputLayout(NULL);
7749 pBlitter->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
7750
7751 /* Constant buffer. */
7752 struct
7753 {
7754 float scaleX;
7755 float scaleY;
7756 float offsetX;
7757 float offsetY;
7758 } VSConstantBuffer;
7759 VSConstantBuffer.scaleX = (float)(rectDst.right - rectDst.left) / cDstWidth;
7760 VSConstantBuffer.scaleY = (float)(rectDst.bottom - rectDst.top) / cDstHeight;
7761 VSConstantBuffer.offsetX = (float)(rectDst.right + rectDst.left) / cDstWidth - 1.0f;
7762 VSConstantBuffer.offsetY = -((float)(rectDst.bottom + rectDst.top) / cDstHeight - 1.0f);
7763
7764 D3D11_SUBRESOURCE_DATA initialData;
7765 initialData.pSysMem = &VSConstantBuffer;
7766 initialData.SysMemPitch = sizeof(VSConstantBuffer);
7767 initialData.SysMemSlicePitch = sizeof(VSConstantBuffer);
7768
7769 D3D11_BUFFER_DESC bd;
7770 RT_ZERO(bd);
7771 bd.ByteWidth = sizeof(VSConstantBuffer);
7772 bd.Usage = D3D11_USAGE_IMMUTABLE;
7773 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
7774
7775 ID3D11Buffer *pConstantBuffer;
7776 HTEST(pBlitter->pDevice->CreateBuffer(&bd, &initialData, &pConstantBuffer));
7777 pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &pConstantBuffer);
7778 D3D_RELEASE(pConstantBuffer); /* xSSetConstantBuffers "will hold a reference to the interfaces passed in." */
7779
7780 /* Vertex shader. */
7781 pBlitter->pImmediateContext->VSSetShader(pBlitter->pVertexShader, NULL, 0);
7782
7783 /* Unused shaders. */
7784 pBlitter->pImmediateContext->HSSetShader(NULL, NULL, 0);
7785 pBlitter->pImmediateContext->DSSetShader(NULL, NULL, 0);
7786 pBlitter->pImmediateContext->GSSetShader(NULL, NULL, 0);
7787
7788 /* Shader resource view. */
7789 pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &pSrcShaderResourceView);
7790
7791 /* Pixel shader. */
7792 pBlitter->pImmediateContext->PSSetShader(pBlitter->pPixelShader, NULL, 0);
7793
7794 /* Sampler. */
7795 pBlitter->pImmediateContext->PSSetSamplers(0, 1, &pBlitter->pSamplerState);
7796
7797 /* Rasterizer. */
7798 pBlitter->pImmediateContext->RSSetState(pBlitter->pRasterizerState);
7799
7800 /* Blend state. */
7801 static FLOAT const BlendFactor[4] = { 0.0f, 0.0f, 0.0f, 0.0f };
7802 pBlitter->pImmediateContext->OMSetBlendState(pBlitter->pBlendState, BlendFactor, 0xffffffff);
7803
7804 /* Viewport. */
7805 D3D11_VIEWPORT Viewport;
7806 Viewport.TopLeftX = 0;
7807 Viewport.TopLeftY = 0;
7808 Viewport.Width = cDstWidth;
7809 Viewport.Height = cDstHeight;
7810 Viewport.MinDepth = 0.0f;
7811 Viewport.MaxDepth = 1.0f;
7812 pBlitter->pImmediateContext->RSSetViewports(1, &Viewport);
7813
7814 /* Draw. */
7815 pBlitter->pImmediateContext->Draw(4, 0);
7816
7817 /*
7818 * Restore pipeline state.
7819 */
7820 pBlitter->pImmediateContext->IASetPrimitiveTopology(SavedState.Topology);
7821 pBlitter->pImmediateContext->IASetInputLayout(SavedState.pInputLayout);
7822 D3D_RELEASE(SavedState.pInputLayout);
7823 pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
7824 D3D_RELEASE(SavedState.pConstantBuffer);
7825 pBlitter->pImmediateContext->VSSetShader(SavedState.pVertexShader, NULL, 0);
7826 D3D_RELEASE(SavedState.pVertexShader);
7827
7828 pBlitter->pImmediateContext->HSSetShader(SavedState.pHullShader, NULL, 0);
7829 D3D_RELEASE(SavedState.pHullShader);
7830 pBlitter->pImmediateContext->DSSetShader(SavedState.pDomainShader, NULL, 0);
7831 D3D_RELEASE(SavedState.pDomainShader);
7832 pBlitter->pImmediateContext->GSSetShader(SavedState.pGeometryShader, NULL, 0);
7833 D3D_RELEASE(SavedState.pGeometryShader);
7834
7835 pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &SavedState.pShaderResourceView);
7836 D3D_RELEASE(SavedState.pShaderResourceView);
7837 pBlitter->pImmediateContext->PSSetShader(SavedState.pPixelShader, NULL, 0);
7838 D3D_RELEASE(SavedState.pPixelShader);
7839 pBlitter->pImmediateContext->PSSetSamplers(0, 1, &SavedState.pSamplerState);
7840 D3D_RELEASE(SavedState.pSamplerState);
7841 pBlitter->pImmediateContext->RSSetState(SavedState.pRasterizerState);
7842 D3D_RELEASE(SavedState.pRasterizerState);
7843 pBlitter->pImmediateContext->OMSetBlendState(SavedState.pBlendState, SavedState.BlendFactor, SavedState.SampleMask);
7844 D3D_RELEASE(SavedState.pBlendState);
7845 pBlitter->pImmediateContext->OMSetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, SavedState.pDepthStencilView);
7846 D3D_RELEASE_ARRAY(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView);
7847 D3D_RELEASE(SavedState.pDepthStencilView);
7848 pBlitter->pImmediateContext->RSSetViewports(SavedState.NumViewports, &SavedState.aViewport[0]);
7849
7850 return S_OK;
7851}
7852
7853
7854static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7855 SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dBox const *pBoxDst,
7856 SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dBox const *pBoxSrc,
7857 SVGA3dDXPresentBltMode mode)
7858{
7859 RT_NOREF(mode);
7860
7861 ASSERT_GUEST_RETURN(pBoxDst->z == 0 && pBoxDst->d == 1, VERR_INVALID_PARAMETER);
7862 ASSERT_GUEST_RETURN(pBoxSrc->z == 0 && pBoxSrc->d == 1, VERR_INVALID_PARAMETER);
7863
7864 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7865 RT_NOREF(pBackend);
7866
7867 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7868 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7869
7870 PVMSVGA3DSURFACE pSrcSurface;
7871 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
7872 AssertRCReturn(rc, rc);
7873
7874 PVMSVGA3DSURFACE pDstSurface;
7875 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
7876 AssertRCReturn(rc, rc);
7877
7878 if (pSrcSurface->pBackendSurface == NULL)
7879 {
7880 /* Create the resource. */
7881 if (pSrcSurface->format != SVGA3D_BUFFER)
7882 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
7883 else
7884 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
7885 AssertRCReturn(rc, rc);
7886 }
7887
7888 if (pDstSurface->pBackendSurface == NULL)
7889 {
7890 /* Create the resource. */
7891 if (pSrcSurface->format != SVGA3D_BUFFER)
7892 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
7893 else
7894 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
7895 AssertRCReturn(rc, rc);
7896 }
7897
7898 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
7899 pDXContext->cid, pSrcSurface->idAssociatedContext,
7900 (pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
7901 pDstSurface->idAssociatedContext,
7902 (pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
7903
7904 /* Clip the box. */
7905 /** @todo Use [src|dst]SubResource to index p[Src|Dst]Surface->paMipmapLevels array directly. */
7906 uint32_t iSrcFace;
7907 uint32_t iSrcMipmap;
7908 vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
7909
7910 uint32_t iDstFace;
7911 uint32_t iDstMipmap;
7912 vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
7913
7914 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
7915 rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
7916 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
7917
7918 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
7919 rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
7920 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
7921
7922 SVGA3dBox clipBoxSrc = *pBoxSrc;
7923 vmsvgaR3ClipBox(&pSrcMipLevel->mipmapSize, &clipBoxSrc);
7924
7925 SVGA3dBox clipBoxDst = *pBoxDst;
7926 vmsvgaR3ClipBox(&pDstMipLevel->mipmapSize, &clipBoxDst);
7927
7928 ID3D11Resource *pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
7929 ID3D11Resource *pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
7930
7931 D3D11_RENDER_TARGET_VIEW_DESC RTVDesc;
7932 RT_ZERO(RTVDesc);
7933 RTVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pDstSurface->format);;
7934 RTVDesc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
7935 RTVDesc.Texture2D.MipSlice = dstSubResource;
7936
7937 ID3D11RenderTargetView *pDstRenderTargetView;
7938 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pDstResource, &RTVDesc, &pDstRenderTargetView);
7939 AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
7940
7941 D3D11_SHADER_RESOURCE_VIEW_DESC SRVDesc;
7942 RT_ZERO(SRVDesc);
7943 SRVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pSrcSurface->format);
7944 SRVDesc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
7945 SRVDesc.Texture2D.MostDetailedMip = srcSubResource;
7946 SRVDesc.Texture2D.MipLevels = 1;
7947
7948 ID3D11ShaderResourceView *pSrcShaderResourceView;
7949 hr = pDevice->pDevice->CreateShaderResourceView(pSrcResource, &SRVDesc, &pSrcShaderResourceView);
7950 AssertReturnStmt(SUCCEEDED(hr), D3D_RELEASE(pDstRenderTargetView), VERR_NOT_SUPPORTED);
7951
7952 D3D11_RECT rectDst;
7953 rectDst.left = pBoxDst->x;
7954 rectDst.top = pBoxDst->y;
7955 rectDst.right = pBoxDst->x + pBoxDst->w;
7956 rectDst.bottom = pBoxDst->y + pBoxDst->h;
7957
7958 BlitFromTexture(&pDevice->Blitter, pDstRenderTargetView, (float)pDstMipLevel->mipmapSize.width, (float)pDstMipLevel->mipmapSize.height,
7959 rectDst, pSrcShaderResourceView);
7960
7961 D3D_RELEASE(pSrcShaderResourceView);
7962 D3D_RELEASE(pDstRenderTargetView);
7963
7964 pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
7965 return VINF_SUCCESS;
7966}
7967
7968
7969static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
7970{
7971 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7972 RT_NOREF(pBackend);
7973
7974 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7975 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7976
7977 ID3D11ShaderResourceView *pShaderResourceView = pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId].u.pShaderResourceView;
7978 AssertReturn(pShaderResourceView, VERR_INVALID_STATE);
7979
7980 SVGACOTableDXSRViewEntry const *pSRViewEntry = dxGetShaderResourceViewEntry(pDXContext, shaderResourceViewId);
7981 AssertReturn(pSRViewEntry, VERR_INVALID_STATE);
7982
7983 uint32_t const sid = pSRViewEntry->sid;
7984
7985 PVMSVGA3DSURFACE pSurface;
7986 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
7987 AssertRCReturn(rc, rc);
7988 AssertReturn(pSurface->pBackendSurface, VERR_INVALID_STATE);
7989
7990 pDevice->pImmediateContext->GenerateMips(pShaderResourceView);
7991
7992 pSurface->pBackendSurface->cidDrawing = pDXContext->cid;
7993 return VINF_SUCCESS;
7994}
7995
7996
7997static int dxDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
7998{
7999 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
8000 PVMSVGA3DSURFACE pSurface;
8001 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
8002 AssertRCReturn(rc, rc);
8003
8004 ID3D11ShaderResourceView *pShaderResourceView;
8005 DXVIEW *pView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
8006 Assert(pView->u.pView == NULL);
8007
8008 if (pSurface->pBackendSurface == NULL)
8009 {
8010 /* Create the actual texture or buffer. */
8011 /** @todo One function to create all resources from surfaces. */
8012 if (pSurface->format != SVGA3D_BUFFER)
8013 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
8014 else
8015 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
8016
8017 AssertRCReturn(rc, rc);
8018 }
8019
8020 HRESULT hr = dxShaderResourceViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pShaderResourceView);
8021 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
8022
8023 return dxViewInit(pView, pSurface, pDXContext, shaderResourceViewId, VMSVGA3D_VIEWTYPE_SHADERRESOURCE, pShaderResourceView);
8024}
8025
8026
8027static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
8028{
8029 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8030 RT_NOREF(pBackend);
8031
8032 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8033 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8034
8035 /** @todo Probably not necessary because SRVs are defined in setupPipeline. */
8036 return dxDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
8037}
8038
8039
8040static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8041{
8042 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8043 RT_NOREF(pBackend);
8044
8045 return dxViewDestroy(&pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId]);
8046}
8047
8048
8049static int dxDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
8050{
8051 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
8052 PVMSVGA3DSURFACE pSurface;
8053 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
8054 AssertRCReturn(rc, rc);
8055
8056 DXVIEW *pView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
8057 Assert(pView->u.pView == NULL);
8058
8059 if (pSurface->pBackendSurface == NULL)
8060 {
8061 /* Create the actual texture. */
8062 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
8063 AssertRCReturn(rc, rc);
8064 }
8065
8066 ID3D11RenderTargetView *pRenderTargetView;
8067 HRESULT hr = dxRenderTargetViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pRenderTargetView);
8068 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
8069
8070 return dxViewInit(pView, pSurface, pDXContext, renderTargetViewId, VMSVGA3D_VIEWTYPE_RENDERTARGET, pRenderTargetView);
8071}
8072
8073
8074static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
8075{
8076 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8077 RT_NOREF(pBackend);
8078
8079 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8080 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8081
8082 return dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
8083}
8084
8085
8086static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
8087{
8088 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8089 RT_NOREF(pBackend);
8090
8091 return dxViewDestroy(&pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId]);
8092}
8093
8094
8095static int dxDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
8096{
8097 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
8098 PVMSVGA3DSURFACE pSurface;
8099 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
8100 AssertRCReturn(rc, rc);
8101
8102 DXVIEW *pView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
8103 Assert(pView->u.pView == NULL);
8104
8105 if (pSurface->pBackendSurface == NULL)
8106 {
8107 /* Create the actual texture. */
8108 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
8109 AssertRCReturn(rc, rc);
8110 }
8111
8112 ID3D11DepthStencilView *pDepthStencilView;
8113 HRESULT hr = dxDepthStencilViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pDepthStencilView);
8114 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
8115
8116 return dxViewInit(pView, pSurface, pDXContext, depthStencilViewId, VMSVGA3D_VIEWTYPE_DEPTHSTENCIL, pDepthStencilView);
8117}
8118
8119static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
8120{
8121 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8122 RT_NOREF(pBackend);
8123
8124 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8125 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8126
8127 return dxDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
8128}
8129
8130
8131static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
8132{
8133 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8134 RT_NOREF(pBackend);
8135
8136 return dxViewDestroy(&pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId]);
8137}
8138
8139
8140static int dxDefineElementLayout(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8141{
8142 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8143 D3D_RELEASE(pDXElementLayout->pElementLayout);
8144 pDXElementLayout->cElementDesc = 0;
8145 RT_ZERO(pDXElementLayout->aElementDesc);
8146
8147 RT_NOREF(pEntry);
8148
8149 return VINF_SUCCESS;
8150}
8151
8152
8153static int dxDestroyElementLayout(DXELEMENTLAYOUT *pDXElementLayout)
8154{
8155 D3D_RELEASE(pDXElementLayout->pElementLayout);
8156 pDXElementLayout->cElementDesc = 0;
8157 RT_ZERO(pDXElementLayout->aElementDesc);
8158 return VINF_SUCCESS;
8159}
8160
8161
8162static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8163{
8164 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8165 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8166 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8167
8168 RT_NOREF(pBackend);
8169
8170 /* Not much can be done here because ID3D11Device::CreateInputLayout requires
8171 * a pShaderBytecodeWithInputSignature which is not known at this moment.
8172 * InputLayout object will be created in setupPipeline.
8173 */
8174
8175 Assert(elementLayoutId == pEntry->elid);
8176
8177 return dxDefineElementLayout(pDXContext, elementLayoutId, pEntry);
8178}
8179
8180
8181static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
8182{
8183 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8184 RT_NOREF(pBackend);
8185
8186 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8187 dxDestroyElementLayout(pDXElementLayout);
8188
8189 return VINF_SUCCESS;
8190}
8191
8192
8193static int dxDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8194 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8195{
8196 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8197 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8198
8199 HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
8200 if (SUCCEEDED(hr))
8201 return VINF_SUCCESS;
8202 return VERR_INVALID_STATE;
8203}
8204
8205
8206static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8207 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8208{
8209 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8210 RT_NOREF(pBackend);
8211
8212 return dxDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
8213}
8214
8215
8216static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId)
8217{
8218 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8219 RT_NOREF(pBackend);
8220
8221 D3D_RELEASE(pDXContext->pBackendDXContext->papBlendState[blendId]);
8222 return VINF_SUCCESS;
8223}
8224
8225
8226static int dxDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8227{
8228 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8229 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8230
8231 HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8232 if (SUCCEEDED(hr))
8233 return VINF_SUCCESS;
8234 return VERR_INVALID_STATE;
8235}
8236
8237
8238static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8239{
8240 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8241 RT_NOREF(pBackend);
8242
8243 return dxDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
8244}
8245
8246
8247static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId)
8248{
8249 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8250 RT_NOREF(pBackend);
8251
8252 D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8253 return VINF_SUCCESS;
8254}
8255
8256
8257static int dxDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8258{
8259 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8260 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8261
8262 HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8263 if (SUCCEEDED(hr))
8264 return VINF_SUCCESS;
8265 return VERR_INVALID_STATE;
8266}
8267
8268
8269static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8270{
8271 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8272 RT_NOREF(pBackend);
8273
8274 return dxDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
8275}
8276
8277
8278static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
8279{
8280 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8281 RT_NOREF(pBackend);
8282
8283 D3D_RELEASE(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8284 return VINF_SUCCESS;
8285}
8286
8287
8288static int dxDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8289{
8290 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8291 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8292
8293 HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8294 if (SUCCEEDED(hr))
8295 return VINF_SUCCESS;
8296 return VERR_INVALID_STATE;
8297}
8298
8299
8300static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8301{
8302 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8303 RT_NOREF(pBackend);
8304
8305 return dxDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
8306}
8307
8308
8309static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId)
8310{
8311 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8312 RT_NOREF(pBackend);
8313
8314 D3D_RELEASE(pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8315 return VINF_SUCCESS;
8316}
8317
8318
8319static int dxDefineShader(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8320{
8321 /** @todo A common approach for creation of COTable backend objects: runtime, empty DX COTable, live DX COTable. */
8322 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8323 Assert(pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID);
8324
8325 /* Init the backend shader structure, if the shader has not been created yet. */
8326 pDXShader->enmShaderType = pEntry->type;
8327 pDXShader->pShader = NULL;
8328 pDXShader->soid = SVGA_ID_INVALID;
8329
8330 return VINF_SUCCESS;
8331}
8332
8333
8334static int dxDestroyShader(DXSHADER *pDXShader)
8335{
8336 pDXShader->enmShaderType = SVGA3D_SHADERTYPE_INVALID;
8337 D3D_RELEASE(pDXShader->pShader);
8338 RTMemFree(pDXShader->pvDXBC);
8339 pDXShader->pvDXBC = NULL;
8340 pDXShader->cbDXBC = 0;
8341 pDXShader->soid = SVGA_ID_INVALID;
8342 return VINF_SUCCESS;
8343}
8344
8345
8346static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8347{
8348 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8349 RT_NOREF(pBackend);
8350
8351 return dxDefineShader(pDXContext, shaderId, pEntry);
8352}
8353
8354
8355static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId)
8356{
8357 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8358 RT_NOREF(pBackend);
8359
8360 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8361 dxDestroyShader(pDXShader);
8362
8363 return VINF_SUCCESS;
8364}
8365
8366
8367static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, DXShaderInfo const *pShaderInfo)
8368{
8369 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8370 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8371 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8372
8373 RT_NOREF(pBackend);
8374
8375 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8376 if (pDXShader->pvDXBC)
8377 {
8378 /* New DXBC code and new shader must be created. */
8379 D3D_RELEASE(pDXShader->pShader);
8380 RTMemFree(pDXShader->pvDXBC);
8381 pDXShader->pvDXBC = NULL;
8382 pDXShader->cbDXBC = 0;
8383 }
8384
8385 pDXShader->shaderInfo = *pShaderInfo;
8386
8387 return VINF_SUCCESS;
8388}
8389
8390
8391static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry)
8392{
8393 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8394 RT_NOREF(pBackend);
8395
8396 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8397 dxDestroyStreamOutput(pDXStreamOutput);
8398
8399 RT_NOREF(pEntry);
8400 return VINF_SUCCESS;
8401}
8402
8403
8404static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
8405{
8406 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8407 RT_NOREF(pBackend);
8408
8409 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8410 dxDestroyStreamOutput(pDXStreamOutput);
8411
8412 return VINF_SUCCESS;
8413}
8414
8415
8416static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
8417{
8418 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8419 RT_NOREF(pBackend, pDXContext, soid);
8420
8421 return VINF_SUCCESS;
8422}
8423
8424
8425static int dxCOTableRealloc(void **ppvCOTable, uint32_t *pcCOTable, uint32_t cbEntry, uint32_t cEntries, uint32_t cValidEntries)
8426{
8427 uint32_t const cCOTableCurrent = *pcCOTable;
8428
8429 if (*pcCOTable != cEntries)
8430 {
8431 /* Grow/shrink the array. */
8432 if (cEntries)
8433 {
8434 void *pvNew = RTMemRealloc(*ppvCOTable, cEntries * cbEntry);
8435 AssertReturn(pvNew, VERR_NO_MEMORY);
8436 *ppvCOTable = pvNew;
8437 }
8438 else
8439 {
8440 RTMemFree(*ppvCOTable);
8441 *ppvCOTable = NULL;
8442 }
8443
8444 *pcCOTable = cEntries;
8445 }
8446
8447 if (*ppvCOTable)
8448 {
8449 uint32_t const cEntriesToKeep = RT_MIN(cCOTableCurrent, cValidEntries);
8450 memset((uint8_t *)(*ppvCOTable) + cEntriesToKeep * cbEntry, 0, (cEntries - cEntriesToKeep) * cbEntry);
8451 }
8452
8453 return VINF_SUCCESS;
8454}
8455
8456static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cValidEntries)
8457{
8458 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8459 RT_NOREF(pBackend);
8460
8461 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
8462
8463 int rc = VINF_SUCCESS;
8464
8465 /*
8466 * 1) Release current backend table, if exists;
8467 * 2) Reallocate memory for the new backend table;
8468 * 3) If cValidEntries is not zero, then re-define corresponding backend table elements.
8469 */
8470 switch (type)
8471 {
8472 case SVGA_COTABLE_RTVIEW:
8473 /* Clear current entries. */
8474 if (pBackendDXContext->paRenderTargetView)
8475 {
8476 for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
8477 {
8478 DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
8479 if (i < cValidEntries)
8480 dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8481 else
8482 dxViewDestroy(pDXView);
8483 }
8484 }
8485
8486 rc = dxCOTableRealloc((void **)&pBackendDXContext->paRenderTargetView, &pBackendDXContext->cRenderTargetView,
8487 sizeof(pBackendDXContext->paRenderTargetView[0]), pDXContext->cot.cRTView, cValidEntries);
8488 AssertRCBreak(rc);
8489
8490 for (uint32_t i = 0; i < cValidEntries; ++i)
8491 {
8492 SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[i];
8493 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8494 continue; /* Skip uninitialized entry. */
8495
8496 /* Define views which were not defined yet in backend. */
8497 DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
8498 /** @todo Verify that the pEntry content still corresponds to the view. */
8499 if (pDXView->u.pView)
8500 dxViewAddToList(pThisCC, pDXView);
8501 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
8502 dxDefineRenderTargetView(pThisCC, pDXContext, i, pEntry);
8503 }
8504 break;
8505 case SVGA_COTABLE_DSVIEW:
8506 if (pBackendDXContext->paDepthStencilView)
8507 {
8508 for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
8509 {
8510 DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
8511 if (i < cValidEntries)
8512 dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8513 else
8514 dxViewDestroy(pDXView);
8515 }
8516 }
8517
8518 rc = dxCOTableRealloc((void **)&pBackendDXContext->paDepthStencilView, &pBackendDXContext->cDepthStencilView,
8519 sizeof(pBackendDXContext->paDepthStencilView[0]), pDXContext->cot.cDSView, cValidEntries);
8520 AssertRCBreak(rc);
8521
8522 for (uint32_t i = 0; i < cValidEntries; ++i)
8523 {
8524 SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[i];
8525 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8526 continue; /* Skip uninitialized entry. */
8527
8528 /* Define views which were not defined yet in backend. */
8529 DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
8530 /** @todo Verify that the pEntry content still corresponds to the view. */
8531 if (pDXView->u.pView)
8532 dxViewAddToList(pThisCC, pDXView);
8533 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
8534 dxDefineDepthStencilView(pThisCC, pDXContext, i, pEntry);
8535 }
8536 break;
8537 case SVGA_COTABLE_SRVIEW:
8538 if (pBackendDXContext->paShaderResourceView)
8539 {
8540 for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
8541 {
8542 DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
8543 if (i < cValidEntries)
8544 dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8545 else
8546 dxViewDestroy(pDXView);
8547 }
8548 }
8549
8550 rc = dxCOTableRealloc((void **)&pBackendDXContext->paShaderResourceView, &pBackendDXContext->cShaderResourceView,
8551 sizeof(pBackendDXContext->paShaderResourceView[0]), pDXContext->cot.cSRView, cValidEntries);
8552 AssertRCBreak(rc);
8553
8554 for (uint32_t i = 0; i < cValidEntries; ++i)
8555 {
8556 SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[i];
8557 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8558 continue; /* Skip uninitialized entry. */
8559
8560 /* Define views which were not defined yet in backend. */
8561 DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
8562 /** @todo Verify that the pEntry content still corresponds to the view. */
8563 if (pDXView->u.pView)
8564 dxViewAddToList(pThisCC, pDXView);
8565 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
8566 dxDefineShaderResourceView(pThisCC, pDXContext, i, pEntry);
8567 }
8568 break;
8569 case SVGA_COTABLE_ELEMENTLAYOUT:
8570 if (pBackendDXContext->paElementLayout)
8571 {
8572 for (uint32_t i = cValidEntries; i < pBackendDXContext->cElementLayout; ++i)
8573 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
8574 }
8575
8576 rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
8577 sizeof(pBackendDXContext->paElementLayout[0]), pDXContext->cot.cElementLayout, cValidEntries);
8578 AssertRCBreak(rc);
8579
8580 for (uint32_t i = 0; i < cValidEntries; ++i)
8581 {
8582 SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[i];
8583 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8584 continue; /* Skip uninitialized entry. */
8585
8586 dxDefineElementLayout(pDXContext, i, pEntry);
8587 }
8588 break;
8589 case SVGA_COTABLE_BLENDSTATE:
8590 if (pBackendDXContext->papBlendState)
8591 {
8592 for (uint32_t i = cValidEntries; i < pBackendDXContext->cBlendState; ++i)
8593 D3D_RELEASE(pBackendDXContext->papBlendState[i]);
8594 }
8595
8596 rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
8597 sizeof(pBackendDXContext->papBlendState[0]), pDXContext->cot.cBlendState, cValidEntries);
8598 AssertRCBreak(rc);
8599
8600 for (uint32_t i = 0; i < cValidEntries; ++i)
8601 {
8602 SVGACOTableDXBlendStateEntry const *pEntry = &pDXContext->cot.paBlendState[i];
8603 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8604 continue; /* Skip uninitialized entry. */
8605
8606 dxDefineBlendState(pThisCC, pDXContext, i, pEntry);
8607 }
8608 break;
8609 case SVGA_COTABLE_DEPTHSTENCIL:
8610 if (pBackendDXContext->papDepthStencilState)
8611 {
8612 for (uint32_t i = cValidEntries; i < pBackendDXContext->cDepthStencilState; ++i)
8613 D3D_RELEASE(pBackendDXContext->papDepthStencilState[i]);
8614 }
8615
8616 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
8617 sizeof(pBackendDXContext->papDepthStencilState[0]), pDXContext->cot.cDepthStencil, cValidEntries);
8618 AssertRCBreak(rc);
8619
8620 for (uint32_t i = 0; i < cValidEntries; ++i)
8621 {
8622 SVGACOTableDXDepthStencilEntry const *pEntry = &pDXContext->cot.paDepthStencil[i];
8623 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8624 continue; /* Skip uninitialized entry. */
8625
8626 dxDefineDepthStencilState(pThisCC, pDXContext, i, pEntry);
8627 }
8628 break;
8629 case SVGA_COTABLE_RASTERIZERSTATE:
8630 if (pBackendDXContext->papRasterizerState)
8631 {
8632 for (uint32_t i = cValidEntries; i < pBackendDXContext->cRasterizerState; ++i)
8633 D3D_RELEASE(pBackendDXContext->papRasterizerState[i]);
8634 }
8635
8636 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
8637 sizeof(pBackendDXContext->papRasterizerState[0]), pDXContext->cot.cRasterizerState, cValidEntries);
8638 AssertRCBreak(rc);
8639
8640 for (uint32_t i = 0; i < cValidEntries; ++i)
8641 {
8642 SVGACOTableDXRasterizerStateEntry const *pEntry = &pDXContext->cot.paRasterizerState[i];
8643 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8644 continue; /* Skip uninitialized entry. */
8645
8646 dxDefineRasterizerState(pThisCC, pDXContext, i, pEntry);
8647 }
8648 break;
8649 case SVGA_COTABLE_SAMPLER:
8650 if (pBackendDXContext->papSamplerState)
8651 {
8652 for (uint32_t i = cValidEntries; i < pBackendDXContext->cSamplerState; ++i)
8653 D3D_RELEASE(pBackendDXContext->papSamplerState[i]);
8654 }
8655
8656 rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
8657 sizeof(pBackendDXContext->papSamplerState[0]), pDXContext->cot.cSampler, cValidEntries);
8658 AssertRCBreak(rc);
8659
8660 for (uint32_t i = 0; i < cValidEntries; ++i)
8661 {
8662 SVGACOTableDXSamplerEntry const *pEntry = &pDXContext->cot.paSampler[i];
8663 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8664 continue; /* Skip uninitialized entry. */
8665
8666 dxDefineSamplerState(pThisCC, pDXContext, i, pEntry);
8667 }
8668 break;
8669 case SVGA_COTABLE_STREAMOUTPUT:
8670 if (pBackendDXContext->paStreamOutput)
8671 {
8672 for (uint32_t i = cValidEntries; i < pBackendDXContext->cStreamOutput; ++i)
8673 dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
8674 }
8675
8676 rc = dxCOTableRealloc((void **)&pBackendDXContext->paStreamOutput, &pBackendDXContext->cStreamOutput,
8677 sizeof(pBackendDXContext->paStreamOutput[0]), pDXContext->cot.cStreamOutput, cValidEntries);
8678 AssertRCBreak(rc);
8679
8680 for (uint32_t i = 0; i < cValidEntries; ++i)
8681 {
8682 SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[i];
8683 /** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
8684 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8685 continue; /* Skip uninitialized entry. */
8686
8687 /* Reset the stream output backend data. It will be re-created when a GS shader with this streamoutput
8688 * will be set in setupPipeline.
8689 */
8690 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[i];
8691 dxDestroyStreamOutput(pDXStreamOutput);
8692 }
8693 break;
8694 case SVGA_COTABLE_DXQUERY:
8695 if (pBackendDXContext->paQuery)
8696 {
8697 /* Destroy the no longer used entries. */
8698 for (uint32_t i = cValidEntries; i < pBackendDXContext->cQuery; ++i)
8699 dxDestroyQuery(&pBackendDXContext->paQuery[i]);
8700 }
8701
8702 rc = dxCOTableRealloc((void **)&pBackendDXContext->paQuery, &pBackendDXContext->cQuery,
8703 sizeof(pBackendDXContext->paQuery[0]), pDXContext->cot.cQuery, cValidEntries);
8704 AssertRCBreak(rc);
8705
8706 for (uint32_t i = 0; i < cValidEntries; ++i)
8707 {
8708 SVGACOTableDXQueryEntry const *pEntry = &pDXContext->cot.paQuery[i];
8709 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8710 continue; /* Skip uninitialized entry. */
8711
8712 /* Define queries which were not defined yet in backend. */
8713 DXQUERY *pDXQuery = &pBackendDXContext->paQuery[i];
8714 if ( pEntry->type != SVGA3D_QUERYTYPE_INVALID
8715 && pDXQuery->pQuery == NULL)
8716 dxDefineQuery(pThisCC, pDXContext, i, pEntry);
8717 else
8718 Assert(pEntry->type == SVGA3D_QUERYTYPE_INVALID || pDXQuery->pQuery);
8719 }
8720 break;
8721 case SVGA_COTABLE_DXSHADER:
8722 if (pBackendDXContext->paShader)
8723 {
8724 /* Destroy the no longer used entries. */
8725 for (uint32_t i = cValidEntries; i < pBackendDXContext->cShader; ++i)
8726 dxDestroyShader(&pBackendDXContext->paShader[i]);
8727 }
8728
8729 rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
8730 sizeof(pBackendDXContext->paShader[0]), pDXContext->cot.cShader, cValidEntries);
8731 AssertRCBreak(rc);
8732
8733 for (uint32_t i = 0; i < cValidEntries; ++i)
8734 {
8735 SVGACOTableDXShaderEntry const *pEntry = &pDXContext->cot.paShader[i];
8736 /** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
8737 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8738 continue; /* Skip uninitialized entry. */
8739
8740 /* Define shaders which were not defined yet in backend. */
8741 DXSHADER *pDXShader = &pBackendDXContext->paShader[i];
8742 if ( pEntry->type != SVGA3D_SHADERTYPE_INVALID
8743 && pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
8744 dxDefineShader(pDXContext, i, pEntry);
8745 else
8746 Assert(pEntry->type == pDXShader->enmShaderType);
8747
8748 }
8749 break;
8750 case SVGA_COTABLE_UAVIEW:
8751 if (pBackendDXContext->paUnorderedAccessView)
8752 {
8753 for (uint32_t i = 0; i < pBackendDXContext->cUnorderedAccessView; ++i)
8754 {
8755 DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
8756 if (i < cValidEntries)
8757 dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8758 else
8759 dxViewDestroy(pDXView);
8760 }
8761 }
8762
8763 rc = dxCOTableRealloc((void **)&pBackendDXContext->paUnorderedAccessView, &pBackendDXContext->cUnorderedAccessView,
8764 sizeof(pBackendDXContext->paUnorderedAccessView[0]), pDXContext->cot.cUAView, cValidEntries);
8765 AssertRCBreak(rc);
8766
8767 for (uint32_t i = 0; i < cValidEntries; ++i)
8768 {
8769 SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[i];
8770 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8771 continue; /* Skip uninitialized entry. */
8772
8773 /* Define views which were not defined yet in backend. */
8774 DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
8775 /** @todo Verify that the pEntry content still corresponds to the view. */
8776 if (pDXView->u.pView)
8777 dxViewAddToList(pThisCC, pDXView);
8778 else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
8779 dxDefineUnorderedAccessView(pThisCC, pDXContext, i, pEntry);
8780 }
8781 break;
8782 case SVGA_COTABLE_MAX: break; /* Compiler warning */
8783 }
8784 return rc;
8785}
8786
8787
8788static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8789{
8790 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8791
8792 RT_NOREF(pBackend, pDXContext);
8793 AssertFailed(); /** @todo Implement */
8794 return VERR_NOT_IMPLEMENTED;
8795}
8796
8797
8798static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8799{
8800 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8801
8802 RT_NOREF(pBackend, pDXContext);
8803 AssertFailed(); /** @todo Implement */
8804 return VERR_NOT_IMPLEMENTED;
8805}
8806
8807
8808static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8809{
8810 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8811
8812 RT_NOREF(pBackend, pDXContext);
8813 AssertFailed(); /** @todo Implement */
8814 return VERR_NOT_IMPLEMENTED;
8815}
8816
8817
8818static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8819{
8820 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8821
8822 RT_NOREF(pBackend, pDXContext);
8823 AssertFailed(); /** @todo Implement */
8824 return VERR_NOT_IMPLEMENTED;
8825}
8826
8827
8828static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8829{
8830 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8831
8832 RT_NOREF(pBackend, pDXContext);
8833 AssertFailed(); /** @todo Implement */
8834 return VERR_NOT_IMPLEMENTED;
8835}
8836
8837
8838static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8839{
8840 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8841
8842 RT_NOREF(pBackend, pDXContext);
8843 AssertFailed(); /** @todo Implement */
8844 return VERR_NOT_IMPLEMENTED;
8845}
8846
8847
8848static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8849{
8850 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8851
8852 RT_NOREF(pBackend, pDXContext);
8853 AssertFailed(); /** @todo Implement */
8854 return VERR_NOT_IMPLEMENTED;
8855}
8856
8857
8858static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8859{
8860 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8861
8862 RT_NOREF(pBackend, pDXContext);
8863 AssertFailed(); /** @todo Implement */
8864 return VERR_NOT_IMPLEMENTED;
8865}
8866
8867
8868static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8869{
8870 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8871
8872 RT_NOREF(pBackend, pDXContext);
8873 AssertFailed(); /** @todo Implement */
8874 return VERR_NOT_IMPLEMENTED;
8875}
8876
8877
8878static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8879{
8880 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8881
8882 RT_NOREF(pBackend, pDXContext);
8883 AssertFailed(); /** @todo Implement */
8884 return VERR_NOT_IMPLEMENTED;
8885}
8886
8887
8888static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8889{
8890 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8891
8892 RT_NOREF(pBackend, pDXContext);
8893 AssertFailed(); /** @todo Implement */
8894 return VERR_NOT_IMPLEMENTED;
8895}
8896
8897
8898static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8899{
8900 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8901
8902 RT_NOREF(pBackend, pDXContext);
8903 AssertFailed(); /** @todo Implement */
8904 return VERR_NOT_IMPLEMENTED;
8905}
8906
8907
8908static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8909{
8910 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8911
8912 RT_NOREF(pBackend, pDXContext);
8913 AssertFailed(); /** @todo Implement */
8914 return VERR_NOT_IMPLEMENTED;
8915}
8916
8917
8918static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8919{
8920 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8921
8922 RT_NOREF(pBackend, pDXContext);
8923 AssertFailed(); /** @todo Implement */
8924 return VERR_NOT_IMPLEMENTED;
8925}
8926
8927
8928static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8929{
8930 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8931
8932 RT_NOREF(pBackend, pDXContext);
8933 AssertFailed(); /** @todo Implement */
8934 return VERR_NOT_IMPLEMENTED;
8935}
8936
8937
8938static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8939{
8940 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8941
8942 RT_NOREF(pBackend, pDXContext);
8943 AssertFailed(); /** @todo Implement */
8944 return VERR_NOT_IMPLEMENTED;
8945}
8946
8947
8948static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8949{
8950 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8951
8952 RT_NOREF(pBackend, pDXContext);
8953 AssertFailed(); /** @todo Implement */
8954 return VERR_NOT_IMPLEMENTED;
8955}
8956
8957
8958static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8959{
8960 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8961
8962 RT_NOREF(pBackend, pDXContext);
8963 AssertFailed(); /** @todo Implement */
8964 return VERR_NOT_IMPLEMENTED;
8965}
8966
8967
8968static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8969{
8970 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8971
8972 RT_NOREF(pBackend, pDXContext);
8973 AssertFailed(); /** @todo Implement */
8974 return VERR_NOT_IMPLEMENTED;
8975}
8976
8977
8978static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
8979{
8980 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8981
8982 RT_NOREF(pBackend, pDXContext);
8983 AssertFailed(); /** @todo Implement */
8984 return VERR_NOT_IMPLEMENTED;
8985}
8986
8987
8988static int dxDefineUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
8989{
8990 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
8991 PVMSVGA3DSURFACE pSurface;
8992 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
8993 AssertRCReturn(rc, rc);
8994
8995 ID3D11UnorderedAccessView *pUnorderedAccessView;
8996 DXVIEW *pView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
8997 Assert(pView->u.pView == NULL);
8998
8999 if (pSurface->pBackendSurface == NULL)
9000 {
9001 /* Create the actual texture or buffer. */
9002 /** @todo One function to create all resources from surfaces. */
9003 if (pSurface->format != SVGA3D_BUFFER)
9004 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
9005 else
9006 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9007
9008 AssertRCReturn(rc, rc);
9009 }
9010
9011 HRESULT hr = dxUnorderedAccessViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pUnorderedAccessView);
9012 AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
9013
9014 return dxViewInit(pView, pSurface, pDXContext, uaViewId, VMSVGA3D_VIEWTYPE_UNORDEREDACCESS, pUnorderedAccessView);
9015}
9016
9017
9018static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
9019{
9020 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9021 RT_NOREF(pBackend);
9022
9023 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9024 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9025
9026 /** @todo Probably not necessary because UAVs are defined in setupPipeline. */
9027 return dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pEntry);
9028}
9029
9030
9031static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId)
9032{
9033 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9034 RT_NOREF(pBackend);
9035
9036 return dxViewDestroy(&pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId]);
9037}
9038
9039
9040static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, uint32_t const aValues[4])
9041{
9042 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9043 RT_NOREF(pBackend);
9044
9045 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9046 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9047
9048 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9049 if (!pDXView->u.pUnorderedAccessView)
9050 {
9051 /* (Re-)create the view, because a creation of a view is deferred until a draw or a clear call. */
9052 SVGACOTableDXUAViewEntry const *pEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
9053 int rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pEntry);
9054 AssertRCReturn(rc, rc);
9055 }
9056 pDevice->pImmediateContext->ClearUnorderedAccessViewUint(pDXView->u.pUnorderedAccessView, aValues);
9057 return VINF_SUCCESS;
9058}
9059
9060
9061static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, float const aValues[4])
9062{
9063 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9064 RT_NOREF(pBackend);
9065
9066 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9067 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9068
9069 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9070 if (!pDXView->u.pUnorderedAccessView)
9071 {
9072 /* (Re-)create the view, because a creation of a view is deferred until a draw or a clear call. */
9073 SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[uaViewId];
9074 int rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pEntry);
9075 AssertRCReturn(rc, rc);
9076 }
9077 pDevice->pImmediateContext->ClearUnorderedAccessViewFloat(pDXView->u.pUnorderedAccessView, aValues);
9078 return VINF_SUCCESS;
9079}
9080
9081
9082static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId srcUAViewId, SVGA3dSurfaceId destSid, uint32_t destByteOffset)
9083{
9084 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9085 RT_NOREF(pBackend);
9086
9087 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9088 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9089
9090 /* Get corresponding resource. Create the buffer if does not yet exist. */
9091 ID3D11Buffer *pDstBuffer;
9092 if (destSid != SVGA3D_INVALID_ID)
9093 {
9094 PVMSVGA3DSURFACE pSurface;
9095 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, destSid, &pSurface);
9096 AssertRCReturn(rc, rc);
9097
9098 if (pSurface->pBackendSurface == NULL)
9099 {
9100 /* Create the resource and initialize it with the current surface data. */
9101 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9102 AssertRCReturn(rc, rc);
9103 }
9104
9105 pDstBuffer = pSurface->pBackendSurface->u.pBuffer;
9106 }
9107 else
9108 pDstBuffer = NULL;
9109
9110 ID3D11UnorderedAccessView *pSrcView;
9111 if (srcUAViewId != SVGA3D_INVALID_ID)
9112 {
9113 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[srcUAViewId];
9114 AssertReturn(pDXView->u.pUnorderedAccessView, VERR_INVALID_STATE);
9115 pSrcView = pDXView->u.pUnorderedAccessView;
9116 }
9117 else
9118 pSrcView = NULL;
9119
9120 pDevice->pImmediateContext->CopyStructureCount(pDstBuffer, destByteOffset, pSrcView);
9121
9122 return VINF_SUCCESS;
9123}
9124
9125
9126static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t uavSpliceIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9127{
9128 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9129 RT_NOREF(pBackend);
9130
9131 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9132 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9133
9134 RT_NOREF(uavSpliceIndex, cUAViewId, paUAViewId);
9135
9136 return VINF_SUCCESS;
9137}
9138
9139
9140static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9141{
9142 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9143 RT_NOREF(pBackend);
9144
9145 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9146 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9147
9148 /* Get corresponding resource. Create the buffer if does not yet exist. */
9149 ID3D11Buffer *pBufferForArgs;
9150 if (argsBufferSid != SVGA_ID_INVALID)
9151 {
9152 PVMSVGA3DSURFACE pSurface;
9153 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, argsBufferSid, &pSurface);
9154 AssertRCReturn(rc, rc);
9155
9156 if (pSurface->pBackendSurface == NULL)
9157 {
9158 /* Create the resource and initialize it with the current surface data. */
9159 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9160 AssertRCReturn(rc, rc);
9161 }
9162
9163 pBufferForArgs = pSurface->pBackendSurface->u.pBuffer;
9164 }
9165 else
9166 pBufferForArgs = NULL;
9167
9168 dxSetupPipeline(pThisCC, pDXContext);
9169
9170 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9171
9172 pDevice->pImmediateContext->DrawIndexedInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9173
9174 /* Note which surfaces are being drawn. */
9175 dxTrackRenderTargets(pThisCC, pDXContext);
9176
9177 return VINF_SUCCESS;
9178}
9179
9180
9181static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9182{
9183 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9184 RT_NOREF(pBackend);
9185
9186 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9187 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9188
9189 /* Get corresponding resource. Create the buffer if does not yet exist. */
9190 ID3D11Buffer *pBufferForArgs;
9191 if (argsBufferSid != SVGA_ID_INVALID)
9192 {
9193 PVMSVGA3DSURFACE pSurface;
9194 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, argsBufferSid, &pSurface);
9195 AssertRCReturn(rc, rc);
9196
9197 if (pSurface->pBackendSurface == NULL)
9198 {
9199 /* Create the resource and initialize it with the current surface data. */
9200 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9201 AssertRCReturn(rc, rc);
9202 }
9203
9204 pBufferForArgs = pSurface->pBackendSurface->u.pBuffer;
9205 }
9206 else
9207 pBufferForArgs = NULL;
9208
9209 dxSetupPipeline(pThisCC, pDXContext);
9210
9211 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9212
9213 pDevice->pImmediateContext->DrawInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9214
9215 /* Note which surfaces are being drawn. */
9216 dxTrackRenderTargets(pThisCC, pDXContext);
9217
9218 return VINF_SUCCESS;
9219}
9220
9221
9222static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t threadGroupCountX, uint32_t threadGroupCountY, uint32_t threadGroupCountZ)
9223{
9224 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9225 RT_NOREF(pBackend);
9226
9227 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9228 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9229
9230 dxSetupPipeline(pThisCC, pDXContext);
9231
9232 pDevice->pImmediateContext->Dispatch(threadGroupCountX, threadGroupCountY, threadGroupCountZ);
9233
9234 return VINF_SUCCESS;
9235}
9236
9237
9238static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9239{
9240 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9241
9242 RT_NOREF(pBackend, pDXContext);
9243 AssertFailed(); /** @todo Implement */
9244 return VERR_NOT_IMPLEMENTED;
9245}
9246
9247
9248static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9249{
9250 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9251
9252 RT_NOREF(pBackend, pDXContext);
9253 AssertFailed(); /** @todo Implement */
9254 return VERR_NOT_IMPLEMENTED;
9255}
9256
9257
9258static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9259{
9260 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9261
9262 RT_NOREF(pBackend, pDXContext);
9263 AssertFailed(); /** @todo Implement */
9264 return VERR_NOT_IMPLEMENTED;
9265}
9266
9267
9268static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9269{
9270 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9271
9272 RT_NOREF(pBackend, pDXContext);
9273 AssertFailed(); /** @todo Implement */
9274 return VERR_NOT_IMPLEMENTED;
9275}
9276
9277
9278static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9279{
9280 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9281
9282 RT_NOREF(pBackend, pDXContext);
9283 AssertFailed(); /** @todo Implement */
9284 return VERR_NOT_IMPLEMENTED;
9285}
9286
9287
9288static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9289{
9290 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9291
9292 RT_NOREF(pBackend, pDXContext);
9293 AssertFailed(); /** @todo Implement */
9294 return VERR_NOT_IMPLEMENTED;
9295}
9296
9297
9298static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9299{
9300 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9301
9302 RT_NOREF(pBackend, pDXContext);
9303 AssertFailed(); /** @todo Implement */
9304 return VERR_NOT_IMPLEMENTED;
9305}
9306
9307
9308static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9309{
9310 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9311
9312 RT_NOREF(pBackend, pDXContext);
9313 AssertFailed(); /** @todo Implement */
9314 return VERR_NOT_IMPLEMENTED;
9315}
9316
9317
9318static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9319{
9320 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9321
9322 RT_NOREF(pBackend, pDXContext);
9323 AssertFailed(); /** @todo Implement */
9324 return VERR_NOT_IMPLEMENTED;
9325}
9326
9327
9328static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9329{
9330 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9331
9332 RT_NOREF(pBackend, pDXContext);
9333 AssertFailed(); /** @todo Implement */
9334 return VERR_NOT_IMPLEMENTED;
9335}
9336
9337
9338static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9339{
9340 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9341 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9342
9343//DEBUG_BREAKPOINT_TEST();
9344 uint32_t const *pUAIds = &pDXContext->svgaDXContext.csuaViewIds[0];
9345 ID3D11UnorderedAccessView *papUnorderedAccessView[SVGA3D_DX11_1_MAX_UAVIEWS];
9346 UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
9347 for (uint32_t i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
9348 {
9349 SVGA3dUAViewId const uaViewId = pUAIds[i];
9350 if (uaViewId != SVGA3D_INVALID_ID)
9351 {
9352 ASSERT_GUEST_RETURN(uaViewId < pDXContext->pBackendDXContext->cUnorderedAccessView, VERR_INVALID_PARAMETER);
9353
9354 DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9355 Assert(pDXView->u.pUnorderedAccessView);
9356 papUnorderedAccessView[i] = pDXView->u.pUnorderedAccessView;
9357
9358 SVGACOTableDXUAViewEntry const *pEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
9359 aUAVInitialCounts[i] = pEntry->structureCount;
9360 }
9361 else
9362 {
9363 papUnorderedAccessView[i] = NULL;
9364 aUAVInitialCounts[i] = (UINT)-1;
9365 }
9366 }
9367
9368 dxCSUnorderedAccessViewSet(pDevice, 0, SVGA3D_DX11_1_MAX_UAVIEWS, papUnorderedAccessView, aUAVInitialCounts);
9369 return VINF_SUCCESS;
9370}
9371
9372
9373static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9374{
9375 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9376 RT_NOREF(pBackend);
9377
9378 DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9379 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9380
9381 RT_NOREF(startIndex, cUAViewId, paUAViewId);
9382
9383 return VINF_SUCCESS;
9384}
9385
9386
9387static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9388{
9389 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9390
9391 RT_NOREF(pBackend, pDXContext);
9392 AssertFailed(); /** @todo Implement */
9393 return VERR_NOT_IMPLEMENTED;
9394}
9395
9396
9397static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9398{
9399 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9400
9401 RT_NOREF(pBackend, pDXContext);
9402 AssertFailed(); /** @todo Implement */
9403 return VERR_NOT_IMPLEMENTED;
9404}
9405
9406
9407static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9408{
9409 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9410
9411 RT_NOREF(pBackend, pDXContext);
9412 AssertFailed(); /** @todo Implement */
9413 return VERR_NOT_IMPLEMENTED;
9414}
9415
9416
9417static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9418{
9419 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9420
9421 RT_NOREF(pBackend, pDXContext);
9422 AssertFailed(); /** @todo Implement */
9423 return VERR_NOT_IMPLEMENTED;
9424}
9425
9426
9427static DECLCALLBACK(int) vmsvga3dBackDXLoadState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
9428{
9429 RT_NOREF(pThisCC);
9430 uint32_t u32;
9431 int rc;
9432
9433 rc = pHlp->pfnSSMGetU32(pSSM, &u32);
9434 AssertLogRelRCReturn(rc, rc);
9435 AssertLogRelRCReturn(u32 == pDXContext->pBackendDXContext->cShader, VERR_INVALID_STATE);
9436
9437 for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
9438 {
9439 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
9440
9441 rc = pHlp->pfnSSMGetU32(pSSM, &u32);
9442 AssertLogRelRCReturn(rc, rc);
9443 AssertLogRelReturn((SVGA3dShaderType)u32 == pDXShader->enmShaderType, VERR_INVALID_STATE);
9444
9445 if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
9446 continue;
9447
9448 pHlp->pfnSSMGetU32(pSSM, &pDXShader->soid);
9449
9450 pHlp->pfnSSMGetU32(pSSM, &u32);
9451 pDXShader->shaderInfo.enmProgramType = (VGPU10_PROGRAM_TYPE)u32;
9452
9453 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cbBytecode);
9454 AssertLogRelRCReturn(rc, rc);
9455 AssertLogRelReturn(pDXShader->shaderInfo.cbBytecode <= 2 * SVGA3D_MAX_SHADER_MEMORY_BYTES, VERR_INVALID_STATE);
9456
9457 if (pDXShader->shaderInfo.cbBytecode)
9458 {
9459 pDXShader->shaderInfo.pvBytecode = RTMemAlloc(pDXShader->shaderInfo.cbBytecode);
9460 AssertPtrReturn(pDXShader->shaderInfo.pvBytecode, VERR_NO_MEMORY);
9461 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
9462 }
9463
9464 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cInputSignature);
9465 AssertLogRelRCReturn(rc, rc);
9466 AssertLogRelReturn(pDXShader->shaderInfo.cInputSignature <= 32, VERR_INVALID_STATE);
9467 if (pDXShader->shaderInfo.cInputSignature)
9468 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
9469
9470 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cOutputSignature);
9471 AssertLogRelRCReturn(rc, rc);
9472 AssertLogRelReturn(pDXShader->shaderInfo.cOutputSignature <= 32, VERR_INVALID_STATE);
9473 if (pDXShader->shaderInfo.cOutputSignature)
9474 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
9475
9476 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cPatchConstantSignature);
9477 AssertLogRelRCReturn(rc, rc);
9478 AssertLogRelReturn(pDXShader->shaderInfo.cPatchConstantSignature <= 32, VERR_INVALID_STATE);
9479 if (pDXShader->shaderInfo.cPatchConstantSignature)
9480 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
9481
9482 rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cDclResource);
9483 AssertLogRelRCReturn(rc, rc);
9484 AssertLogRelReturn(pDXShader->shaderInfo.cDclResource <= SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_STATE);
9485 if (pDXShader->shaderInfo.cDclResource)
9486 pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
9487 }
9488
9489 rc = pHlp->pfnSSMGetU32(pSSM, &pDXContext->pBackendDXContext->cSOTarget);
9490 AssertLogRelRCReturn(rc, rc);
9491
9492 return VINF_SUCCESS;
9493}
9494
9495
9496static DECLCALLBACK(int) vmsvga3dBackDXSaveState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
9497{
9498 RT_NOREF(pThisCC);
9499 int rc;
9500
9501 pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cShader);
9502 for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
9503 {
9504 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
9505
9506 pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->enmShaderType);
9507 if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
9508 continue;
9509
9510 pHlp->pfnSSMPutU32(pSSM, pDXShader->soid);
9511
9512 pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->shaderInfo.enmProgramType);
9513
9514 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cbBytecode);
9515 if (pDXShader->shaderInfo.cbBytecode)
9516 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
9517
9518 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cInputSignature);
9519 if (pDXShader->shaderInfo.cInputSignature)
9520 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
9521
9522 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cOutputSignature);
9523 if (pDXShader->shaderInfo.cOutputSignature)
9524 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
9525
9526 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cPatchConstantSignature);
9527 if (pDXShader->shaderInfo.cPatchConstantSignature)
9528 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
9529
9530 pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cDclResource);
9531 if (pDXShader->shaderInfo.cDclResource)
9532 pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
9533 }
9534 rc = pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cSOTarget);
9535 AssertLogRelRCReturn(rc, rc);
9536
9537 return VINF_SUCCESS;
9538}
9539
9540
9541static DECLCALLBACK(int) vmsvga3dBackQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
9542{
9543 RT_NOREF(pThisCC);
9544
9545 int rc = VINF_SUCCESS;
9546 if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
9547 {
9548 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
9549 {
9550 if (pvInterfaceFuncs)
9551 {
9552 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs;
9553 p->pfnDXSaveState = vmsvga3dBackDXSaveState;
9554 p->pfnDXLoadState = vmsvga3dBackDXLoadState;
9555 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
9556 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
9557 p->pfnDXBindContext = vmsvga3dBackDXBindContext;
9558 p->pfnDXSwitchContext = vmsvga3dBackDXSwitchContext;
9559 p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
9560 p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
9561 p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
9562 p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
9563 p->pfnDXSetShader = vmsvga3dBackDXSetShader;
9564 p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
9565 p->pfnDXDraw = vmsvga3dBackDXDraw;
9566 p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
9567 p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
9568 p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
9569 p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
9570 p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
9571 p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
9572 p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
9573 p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
9574 p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
9575 p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
9576 p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
9577 p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
9578 p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
9579 p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
9580 p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
9581 p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
9582 p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
9583 p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
9584 p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
9585 p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
9586 p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
9587 p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
9588 p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
9589 p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
9590 p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
9591 p->pfnDXGenMips = vmsvga3dBackDXGenMips;
9592 p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
9593 p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
9594 p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
9595 p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
9596 p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
9597 p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
9598 p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
9599 p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
9600 p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
9601 p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
9602 p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
9603 p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
9604 p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
9605 p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
9606 p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
9607 p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
9608 p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
9609 p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
9610 p->pfnDXBindShader = vmsvga3dBackDXBindShader;
9611 p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
9612 p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
9613 p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
9614 p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
9615 p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
9616 p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
9617 p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
9618 p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
9619 p->pfnDXHint = vmsvga3dBackDXHint;
9620 p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
9621 p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
9622 p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
9623 p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
9624 p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
9625 p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
9626 p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
9627 p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
9628 p->pfnScreenCopy = vmsvga3dBackScreenCopy;
9629 p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
9630 p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
9631 p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
9632 p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
9633 p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
9634 p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
9635 p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
9636 p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
9637 p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
9638 p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
9639 p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
9640 p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
9641 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
9642 p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
9643 p->pfnDXDispatch = vmsvga3dBackDXDispatch;
9644 p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
9645 p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
9646 p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
9647 p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
9648 p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
9649 p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
9650 p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
9651 p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
9652 p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
9653 p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
9654 p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
9655 p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
9656 p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
9657 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
9658 p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
9659 p->pfnVBDXClearRenderTargetViewRegion = vmsvga3dBackVBDXClearRenderTargetViewRegion;
9660 }
9661 }
9662 else
9663 {
9664 AssertFailed();
9665 rc = VERR_INVALID_PARAMETER;
9666 }
9667 }
9668 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
9669 {
9670 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
9671 {
9672 if (pvInterfaceFuncs)
9673 {
9674 VMSVGA3DBACKENDFUNCSMAP *p = (VMSVGA3DBACKENDFUNCSMAP *)pvInterfaceFuncs;
9675 p->pfnSurfaceMap = vmsvga3dBackSurfaceMap;
9676 p->pfnSurfaceUnmap = vmsvga3dBackSurfaceUnmap;
9677 }
9678 }
9679 else
9680 {
9681 AssertFailed();
9682 rc = VERR_INVALID_PARAMETER;
9683 }
9684 }
9685 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
9686 {
9687 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
9688 {
9689 if (pvInterfaceFuncs)
9690 {
9691 VMSVGA3DBACKENDFUNCSGBO *p = (VMSVGA3DBACKENDFUNCSGBO *)pvInterfaceFuncs;
9692 p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
9693 p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
9694 }
9695 }
9696 else
9697 {
9698 AssertFailed();
9699 rc = VERR_INVALID_PARAMETER;
9700 }
9701 }
9702 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_3D) == 0)
9703 {
9704 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCS3D))
9705 {
9706 if (pvInterfaceFuncs)
9707 {
9708 VMSVGA3DBACKENDFUNCS3D *p = (VMSVGA3DBACKENDFUNCS3D *)pvInterfaceFuncs;
9709 p->pfnInit = vmsvga3dBackInit;
9710 p->pfnPowerOn = vmsvga3dBackPowerOn;
9711 p->pfnTerminate = vmsvga3dBackTerminate;
9712 p->pfnReset = vmsvga3dBackReset;
9713 p->pfnQueryCaps = vmsvga3dBackQueryCaps;
9714 p->pfnChangeMode = vmsvga3dBackChangeMode;
9715 p->pfnCreateTexture = vmsvga3dBackCreateTexture;
9716 p->pfnSurfaceDestroy = vmsvga3dBackSurfaceDestroy;
9717 p->pfnSurfaceInvalidateImage = vmsvga3dBackSurfaceInvalidateImage;
9718 p->pfnSurfaceCopy = vmsvga3dBackSurfaceCopy;
9719 p->pfnSurfaceDMACopyBox = vmsvga3dBackSurfaceDMACopyBox;
9720 p->pfnSurfaceStretchBlt = vmsvga3dBackSurfaceStretchBlt;
9721 p->pfnUpdateHostScreenViewport = vmsvga3dBackUpdateHostScreenViewport;
9722 p->pfnDefineScreen = vmsvga3dBackDefineScreen;
9723 p->pfnDestroyScreen = vmsvga3dBackDestroyScreen;
9724 p->pfnSurfaceBlitToScreen = vmsvga3dBackSurfaceBlitToScreen;
9725 p->pfnSurfaceUpdateHeapBuffers = vmsvga3dBackSurfaceUpdateHeapBuffers;
9726 }
9727 }
9728 else
9729 {
9730 AssertFailed();
9731 rc = VERR_INVALID_PARAMETER;
9732 }
9733 }
9734 else
9735 rc = VERR_NOT_IMPLEMENTED;
9736 return rc;
9737}
9738
9739
9740extern VMSVGA3DBACKENDDESC const g_BackendDX =
9741{
9742 "DX",
9743 vmsvga3dBackQueryInterface
9744};
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