VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 94264

Last change on this file since 94264 was 94264, checked in by vboxsync, 3 years ago

Devices/Graphics: implemented some DXQuery commands; fixed various issues found by piglit: bugref:9830

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1/* $Id: DevVGA-SVGA3d-dx.cpp 94264 2022-03-16 05:57:21Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42/*
43 *
44 * Command handlers.
45 *
46 */
47
48int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
49{
50 int rc;
51 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
52 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
53 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
54 AssertReturn(p3dState, VERR_INVALID_STATE);
55
56 PVMSVGA3DDXCONTEXT pDXContext;
57 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
58 AssertRCReturn(rc, rc);
59
60 /* Copy the host structure back to the guest memory. */
61 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
62
63 return rc;
64}
65
66
67int vmsvga3dDXSwitchContext(PVGASTATECC pThisCC, uint32_t cid)
68{
69 int rc;
70 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
71 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSwitchContext, VERR_INVALID_STATE);
72 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
73 AssertReturn(p3dState, VERR_INVALID_STATE);
74
75 PVMSVGA3DDXCONTEXT pDXContext;
76 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
77 AssertRCReturn(rc, rc);
78
79 /* Notify the host backend that context is about to be switched. */
80 rc = pSvgaR3State->pFuncsDX->pfnDXSwitchContext(pThisCC, pDXContext);
81 if (rc == VINF_NOT_IMPLEMENTED || RT_FAILURE(rc))
82 return rc;
83
84 /** @todo Keep track of changes in the pipeline and apply only modified state. */
85 /* It is not necessary to restore SVGADXContextMobFormat::shaderState::shaderResources
86 * because they are applied by the backend before each Draw call.
87 */
88 #define DX_STATE_VS 0x00000001
89 #define DX_STATE_PS 0x00000002
90 #define DX_STATE_SAMPLERS 0x00000004
91 #define DX_STATE_INPUTLAYOUT 0x00000008
92 #define DX_STATE_TOPOLOGY 0x00000010
93 #define DX_STATE_VERTEXBUFFER 0x00000020
94 #define DX_STATE_INDEXBUFFER 0x00000040
95 #define DX_STATE_BLENDSTATE 0x00000080
96 #define DX_STATE_DEPTHSTENCILSTATE 0x00000100
97 #define DX_STATE_SOTARGETS 0x00000200
98 #define DX_STATE_VIEWPORTS 0x00000400
99 #define DX_STATE_SCISSORRECTS 0x00000800
100 #define DX_STATE_RASTERIZERSTATE 0x00001000
101 #define DX_STATE_RENDERTARGETS 0x00002000
102 #define DX_STATE_GS 0x00004000
103 #define DX_STATE_CONSTANTBUFFERS 0x00008000
104 uint32_t u32TrackedState = 0
105 | DX_STATE_VS
106 | DX_STATE_PS
107 | DX_STATE_SAMPLERS
108 | DX_STATE_INPUTLAYOUT
109 | DX_STATE_TOPOLOGY
110 | DX_STATE_VERTEXBUFFER
111 | DX_STATE_INDEXBUFFER
112 | DX_STATE_BLENDSTATE
113 | DX_STATE_DEPTHSTENCILSTATE
114 | DX_STATE_SOTARGETS
115 | DX_STATE_VIEWPORTS
116 | DX_STATE_SCISSORRECTS
117 | DX_STATE_RASTERIZERSTATE
118 | DX_STATE_RENDERTARGETS
119 | DX_STATE_GS
120 | DX_STATE_CONSTANTBUFFERS
121 ;
122
123 LogFunc(("cid = %d, state = 0x%08X\n", cid, u32TrackedState));
124
125 if (u32TrackedState & DX_STATE_VS)
126 {
127 u32TrackedState &= ~DX_STATE_VS;
128
129 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_VS;
130
131 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
132 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
133
134 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
135 AssertRC(rc);
136 }
137
138
139 if (u32TrackedState & DX_STATE_PS)
140 {
141 u32TrackedState &= ~DX_STATE_PS;
142
143 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_PS;
144
145 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
146 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
147
148 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
149 AssertRC(rc);
150 }
151
152
153 if (u32TrackedState & DX_STATE_GS)
154 {
155 u32TrackedState &= ~DX_STATE_GS;
156
157 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_GS;
158
159 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
160 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
161
162 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
163 AssertRC(rc);
164 }
165
166
167 if (u32TrackedState & DX_STATE_SAMPLERS)
168 {
169 u32TrackedState &= ~DX_STATE_SAMPLERS;
170
171 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_DX10_MAX; ++i) /** @todo SVGA3D_SHADERTYPE_MAX */
172 {
173 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
174 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
175
176 uint32_t startSampler = 0;
177 uint32_t cSamplerId = SVGA3D_DX_MAX_SAMPLERS;
178 SVGA3dSamplerId *paSamplerId = &pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[0];
179
180 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, startSampler, shaderType, cSamplerId, paSamplerId);
181 AssertRC(rc);
182 }
183 }
184
185
186 if (u32TrackedState & DX_STATE_INPUTLAYOUT)
187 {
188 u32TrackedState &= ~DX_STATE_INPUTLAYOUT;
189
190 SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
191
192 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
193 AssertRC(rc);
194 }
195
196
197 if (u32TrackedState & DX_STATE_TOPOLOGY)
198 {
199 u32TrackedState &= ~DX_STATE_TOPOLOGY;
200
201 SVGA3dPrimitiveType const topology = (SVGA3dPrimitiveType)pDXContext->svgaDXContext.inputAssembly.topology;
202
203 if (topology != SVGA3D_PRIMITIVE_INVALID)
204 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
205 AssertRC(rc);
206 }
207
208
209 if (u32TrackedState & DX_STATE_VERTEXBUFFER)
210 {
211 u32TrackedState &= ~DX_STATE_VERTEXBUFFER;
212
213 /** @todo Track which vertex buffers were modified and update only the corresponding slots.
214 * 32 bits mask is enough.
215 */
216 uint32_t startBuffer = 0;
217 uint32_t cVertexBuffer = SVGA3D_DX_MAX_VERTEXBUFFERS;
218 SVGA3dVertexBuffer aVertexBuffer[SVGA3D_DX_MAX_VERTEXBUFFERS];
219 for (uint32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
220 {
221 aVertexBuffer[i].sid = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].bufferId;
222 aVertexBuffer[i].stride = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].stride;
223 aVertexBuffer[i].offset = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].offset;
224 }
225
226 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, aVertexBuffer);
227 AssertRC(rc);
228 }
229
230
231 if (u32TrackedState & DX_STATE_INDEXBUFFER)
232 {
233 u32TrackedState &= ~DX_STATE_INDEXBUFFER;
234
235 SVGA3dSurfaceId const sid = pDXContext->svgaDXContext.inputAssembly.indexBufferSid;
236 SVGA3dSurfaceFormat const format = (SVGA3dSurfaceFormat)pDXContext->svgaDXContext.inputAssembly.indexBufferFormat;
237 uint32_t const offset = pDXContext->svgaDXContext.inputAssembly.indexBufferOffset;
238
239 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, sid, format, offset);
240 AssertRC(rc);
241 }
242
243
244 if (u32TrackedState & DX_STATE_BLENDSTATE)
245 {
246 u32TrackedState &= ~DX_STATE_BLENDSTATE;
247
248 SVGA3dBlendStateId const blendId = pDXContext->svgaDXContext.renderState.blendStateId;
249 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
250 float const *paBlendFactor = (float *)&pDXContext->svgaDXContext.renderState.blendFactor[0];
251 uint32_t const sampleMask = pDXContext->svgaDXContext.renderState.sampleMask;
252
253 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, paBlendFactor, sampleMask);
254 AssertRC(rc);
255 }
256
257
258 if (u32TrackedState & DX_STATE_DEPTHSTENCILSTATE)
259 {
260 u32TrackedState &= ~DX_STATE_DEPTHSTENCILSTATE;
261
262 SVGA3dDepthStencilStateId const depthStencilId = pDXContext->svgaDXContext.renderState.depthStencilStateId;
263 uint32_t const stencilRef = pDXContext->svgaDXContext.renderState.stencilRef;
264
265 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, stencilRef);
266 AssertRC(rc);
267 }
268
269
270 if (u32TrackedState & DX_STATE_SOTARGETS)
271 {
272 u32TrackedState &= ~DX_STATE_SOTARGETS;
273
274 uint32_t cSoTarget = SVGA3D_DX_MAX_SOTARGETS;
275 SVGA3dSoTarget aSoTarget[SVGA3D_DX_MAX_SOTARGETS];
276 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
277 {
278 aSoTarget[i].sid = pDXContext->svgaDXContext.streamOut.targets[i];
279 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere by the host? */
280 aSoTarget[i].offset = 0;
281 aSoTarget[i].sizeInBytes = 0;
282 }
283
284 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, aSoTarget);
285 AssertRC(rc);
286 }
287
288
289 if (u32TrackedState & DX_STATE_VIEWPORTS)
290 {
291 u32TrackedState &= ~DX_STATE_VIEWPORTS;
292
293 uint32_t const cViewport = pDXContext->svgaDXContext.numViewports;
294 SVGA3dViewport const *paViewport = &pDXContext->svgaDXContext.viewports[0];
295
296 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
297 AssertRC(rc);
298 }
299
300
301 if (u32TrackedState & DX_STATE_SCISSORRECTS)
302 {
303 u32TrackedState &= ~DX_STATE_SCISSORRECTS;
304
305 uint32_t const cRect = pDXContext->svgaDXContext.numScissorRects;
306 SVGASignedRect const *paRect = &pDXContext->svgaDXContext.scissorRects[0];
307
308 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
309 AssertRC(rc);
310 }
311
312
313 if (u32TrackedState & DX_STATE_RASTERIZERSTATE)
314 {
315 u32TrackedState &= ~DX_STATE_RASTERIZERSTATE;
316
317 SVGA3dRasterizerStateId const rasterizerId = pDXContext->svgaDXContext.renderState.rasterizerStateId;
318
319 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
320 AssertRC(rc);
321 }
322
323
324 if (u32TrackedState & DX_STATE_RENDERTARGETS)
325 {
326 u32TrackedState &= ~DX_STATE_RENDERTARGETS;
327
328 SVGA3dDepthStencilViewId const depthStencilViewId = (SVGA3dRenderTargetViewId)pDXContext->svgaDXContext.renderState.depthStencilViewId;
329 uint32_t const cRenderTargetViewId = SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS;
330 SVGA3dRenderTargetViewId const *paRenderTargetViewId = (SVGA3dRenderTargetViewId *)&pDXContext->svgaDXContext.renderState.renderTargetViewIds[0];
331
332 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
333 AssertRC(rc);
334 }
335
336
337 if (u32TrackedState & DX_STATE_CONSTANTBUFFERS)
338 {
339 u32TrackedState &= ~DX_STATE_CONSTANTBUFFERS;
340
341 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_DX10_MAX; ++i) /** @todo SVGA3D_SHADERTYPE_MAX */
342 {
343 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
344 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
345
346 /** @todo Track which constant buffers were modified and update only the corresponding slots.
347 * 32 bit mask is enough.
348 */
349 for (int iSlot = 0; iSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++iSlot)
350 {
351 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[iSlot];
352 if (pCBB->sid == SVGA3D_INVALID_ID) // This will not be necessary when constant buffers slots will be tracked.
353 continue;
354
355 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, iSlot, shaderType, pCBB->sid, pCBB->offsetInBytes, pCBB->sizeInBytes);
356 AssertRC(rc);
357 }
358 }
359 }
360
361 Assert(u32TrackedState == 0);
362
363 return rc;
364}
365
366
367/**
368 * Create a new 3D DX context.
369 *
370 * @returns VBox status code.
371 * @param pThisCC The VGA/VMSVGA state for ring-3.
372 * @param cid Context id to be created.
373 */
374int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
375{
376 int rc;
377 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
378 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
379 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
380 AssertReturn(p3dState, VERR_INVALID_STATE);
381
382 PVMSVGA3DDXCONTEXT pDXContext;
383
384 LogFunc(("cid %d\n", cid));
385
386 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
387
388 if (cid >= p3dState->cDXContexts)
389 {
390 /* Grow the array. */
391 uint32_t cNew = RT_ALIGN(cid + 15, 16);
392 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
393 AssertReturn(pvNew, VERR_NO_MEMORY);
394 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
395 while (p3dState->cDXContexts < cNew)
396 {
397 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
398 AssertReturn(pDXContext, VERR_NO_MEMORY);
399 pDXContext->cid = SVGA3D_INVALID_ID;
400 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
401 }
402 }
403 /* If one already exists with this id, then destroy it now. */
404 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
405 vmsvga3dDXDestroyContext(pThisCC, cid);
406
407 pDXContext = p3dState->papDXContexts[cid];
408 memset(pDXContext, 0, sizeof(*pDXContext));
409
410 /* 0xFFFFFFFF (SVGA_ID_INVALID) is a better initial value than 0 for most of svgaDXContext fields. */
411 memset(&pDXContext->svgaDXContext, 0xFF, sizeof(pDXContext->svgaDXContext));
412 pDXContext->svgaDXContext.inputAssembly.topology = SVGA3D_PRIMITIVE_INVALID;
413 pDXContext->svgaDXContext.numViewports = 0;
414 pDXContext->svgaDXContext.numScissorRects = 0;
415 pDXContext->cid = cid;
416
417 /* Init the backend specific data. */
418 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
419
420 /* Cleanup on failure. */
421 if (RT_FAILURE(rc))
422 vmsvga3dDXDestroyContext(pThisCC, cid);
423
424 return rc;
425}
426
427
428int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
429{
430 int rc;
431 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
432 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
433 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
434 AssertReturn(p3dState, VERR_INVALID_STATE);
435
436 PVMSVGA3DDXCONTEXT pDXContext;
437 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
438 AssertRCReturn(rc, rc);
439
440 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
441
442 RT_ZERO(*pDXContext);
443 pDXContext->cid = SVGA3D_INVALID_ID;
444
445 return rc;
446}
447
448
449int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
450{
451 int rc;
452 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
453 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
454 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
455 AssertReturn(p3dState, VERR_INVALID_STATE);
456
457 PVMSVGA3DDXCONTEXT pDXContext;
458 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
459 AssertRCReturn(rc, rc);
460
461 if (pSvgaDXContext)
462 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
463
464 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
465 return rc;
466}
467
468
469int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGADXContextMobFormat *pSvgaDXContext)
470{
471 int rc;
472 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
473 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
474 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
475 AssertReturn(p3dState, VERR_INVALID_STATE);
476
477 PVMSVGA3DDXCONTEXT pDXContext;
478 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
479 AssertRCReturn(rc, rc);
480
481 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
482 if (RT_SUCCESS(rc))
483 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
484 return rc;
485}
486
487
488int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
489{
490 int rc;
491 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
492 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
493 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
494 AssertReturn(p3dState, VERR_INVALID_STATE);
495
496 PVMSVGA3DDXCONTEXT pDXContext;
497 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
498 AssertRCReturn(rc, rc);
499
500 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
501 return rc;
502}
503
504
505int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
506{
507 int rc;
508 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
509 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
510 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
511 AssertReturn(p3dState, VERR_INVALID_STATE);
512
513 PVMSVGA3DDXCONTEXT pDXContext;
514 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
515 AssertRCReturn(rc, rc);
516
517 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
518 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
519 RT_UNTRUSTED_VALIDATED_FENCE();
520
521 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
522 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[pCmd->slot];
523 pCBB->sid = pCmd->sid;
524 pCBB->offsetInBytes = pCmd->offsetInBytes;
525 pCBB->sizeInBytes = pCmd->sizeInBytes;
526
527 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
528 return rc;
529}
530
531
532int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
533{
534 int rc;
535 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
536 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
537 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
538 AssertReturn(p3dState, VERR_INVALID_STATE);
539
540 PVMSVGA3DDXCONTEXT pDXContext;
541 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
542 AssertRCReturn(rc, rc);
543
544 ASSERT_GUEST_RETURN(pCmd->startView < SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_PARAMETER);
545 ASSERT_GUEST_RETURN(cShaderResourceViewId <= SVGA3D_DX_MAX_SRVIEWS - pCmd->startView, VERR_INVALID_PARAMETER);
546 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
547 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
548 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
549 ASSERT_GUEST_RETURN( paShaderResourceViewId[i] < pDXContext->cot.cSRView
550 || paShaderResourceViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
551 RT_UNTRUSTED_VALIDATED_FENCE();
552
553 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
554 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
555 {
556 SVGA3dShaderResourceViewId const shaderResourceViewId = paShaderResourceViewId[i];
557 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[pCmd->startView + i] = shaderResourceViewId;
558 }
559
560 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext, pCmd->startView, pCmd->type, cShaderResourceViewId, paShaderResourceViewId);
561 return rc;
562}
563
564
565int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
566{
567 int rc;
568 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
569 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
570 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
571 AssertReturn(p3dState, VERR_INVALID_STATE);
572
573 PVMSVGA3DDXCONTEXT pDXContext;
574 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
575 AssertRCReturn(rc, rc);
576
577 ASSERT_GUEST_RETURN( pCmd->shaderId < pDXContext->cot.cShader
578 || pCmd->shaderId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
579 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
580 RT_UNTRUSTED_VALIDATED_FENCE();
581
582 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
583 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pCmd->shaderId;
584
585 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, pCmd->shaderId, pCmd->type);
586 return rc;
587}
588
589
590int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
591{
592 int rc;
593 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
594 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
595 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
596 AssertReturn(p3dState, VERR_INVALID_STATE);
597
598 PVMSVGA3DDXCONTEXT pDXContext;
599 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
600 AssertRCReturn(rc, rc);
601
602 ASSERT_GUEST_RETURN(pCmd->startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
603 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - pCmd->startSampler, VERR_INVALID_PARAMETER);
604 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
605 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
606 RT_UNTRUSTED_VALIDATED_FENCE();
607
608 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
609 for (uint32_t i = 0; i < cSamplerId; ++i)
610 {
611 SVGA3dSamplerId const samplerId = paSamplerId[i];
612 ASSERT_GUEST_RETURN( samplerId < pDXContext->cot.cSampler
613 || samplerId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
614 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[pCmd->startSampler + i] = samplerId;
615 }
616 RT_UNTRUSTED_VALIDATED_FENCE();
617
618 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
619 return rc;
620}
621
622
623#ifdef DUMP_BITMAPS
624static void vmsvga3dDXDrawDumpRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
625{
626 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
627 {
628 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] != SVGA3D_INVALID_ID)
629 {
630 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[i]];
631 Log(("Dump RT[%u] sid = %u rtvid = %u\n", i, pRTViewEntry->sid, pDXContext->svgaDXContext.renderState.renderTargetViewIds[i]));
632
633 SVGA3dSurfaceImageId image;
634 image.sid = pRTViewEntry->sid;
635 image.face = 0;
636 image.mipmap = 0;
637 VMSVGA3D_MAPPED_SURFACE map;
638 int rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
639 if (RT_SUCCESS(rc))
640 {
641 vmsvga3dMapWriteBmpFile(&map, "rt-");
642 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
643 }
644 else
645 Log(("Map failed %Rrc\n", rc));
646 }
647 }
648}
649#endif
650
651int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
652{
653 int rc;
654 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
655 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
656 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
657 AssertReturn(p3dState, VERR_INVALID_STATE);
658
659 PVMSVGA3DDXCONTEXT pDXContext;
660 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
661 AssertRCReturn(rc, rc);
662
663 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
664#ifdef DUMP_BITMAPS
665 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
666#endif
667 return rc;
668}
669
670
671int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
672{
673 int rc;
674 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
675 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
676 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
677 AssertReturn(p3dState, VERR_INVALID_STATE);
678
679 PVMSVGA3DDXCONTEXT pDXContext;
680 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
681 AssertRCReturn(rc, rc);
682
683 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
684#ifdef DUMP_BITMAPS
685 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
686#endif
687 return rc;
688}
689
690
691int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd)
692{
693 int rc;
694 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
695 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
696 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
697 AssertReturn(p3dState, VERR_INVALID_STATE);
698
699 PVMSVGA3DDXCONTEXT pDXContext;
700 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
701 AssertRCReturn(rc, rc);
702
703 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext,
704 pCmd->vertexCountPerInstance, pCmd->instanceCount, pCmd->startVertexLocation, pCmd->startInstanceLocation);
705#ifdef DUMP_BITMAPS
706 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
707#endif
708 return rc;
709}
710
711
712int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd)
713{
714 int rc;
715 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
716 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
717 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
718 AssertReturn(p3dState, VERR_INVALID_STATE);
719
720 PVMSVGA3DDXCONTEXT pDXContext;
721 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
722 AssertRCReturn(rc, rc);
723
724 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext,
725 pCmd->indexCountPerInstance, pCmd->instanceCount, pCmd->startIndexLocation, pCmd->baseVertexLocation, pCmd->startInstanceLocation);
726#ifdef DUMP_BITMAPS
727 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
728#endif
729 return rc;
730}
731
732
733int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
734{
735 int rc;
736 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
737 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
738 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
739 AssertReturn(p3dState, VERR_INVALID_STATE);
740
741 PVMSVGA3DDXCONTEXT pDXContext;
742 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
743 AssertRCReturn(rc, rc);
744
745 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
746#ifdef DUMP_BITMAPS
747 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
748#endif
749 return rc;
750}
751
752
753int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
754{
755 int rc;
756 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
757 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
758 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
759 AssertReturn(p3dState, VERR_INVALID_STATE);
760
761 PVMSVGA3DDXCONTEXT pDXContext;
762 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
763 AssertRCReturn(rc, rc);
764
765 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
766 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
767 RT_UNTRUSTED_VALIDATED_FENCE();
768
769 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
770
771 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
772 return rc;
773}
774
775
776int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
777{
778 int rc;
779 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
780 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
781 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
782 AssertReturn(p3dState, VERR_INVALID_STATE);
783
784 PVMSVGA3DDXCONTEXT pDXContext;
785 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
786 AssertRCReturn(rc, rc);
787
788 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
789 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
790 RT_UNTRUSTED_VALIDATED_FENCE();
791
792 for (uint32_t i = 0; i < cVertexBuffer; ++i)
793 {
794 uint32_t const idxVertexBuffer = startBuffer + i;
795
796 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
797 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
798 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
799 }
800
801 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
802 return rc;
803}
804
805
806int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
807{
808 int rc;
809 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
810 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
811 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
812 AssertReturn(p3dState, VERR_INVALID_STATE);
813
814 PVMSVGA3DDXCONTEXT pDXContext;
815 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
816 AssertRCReturn(rc, rc);
817
818 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = pCmd->sid;
819 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = pCmd->offset;
820 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = pCmd->format;
821
822 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
823 return rc;
824}
825
826
827int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
828{
829 int rc;
830 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
831 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
832 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
833 AssertReturn(p3dState, VERR_INVALID_STATE);
834
835 PVMSVGA3DDXCONTEXT pDXContext;
836 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
837 AssertRCReturn(rc, rc);
838
839 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
840
841 pDXContext->svgaDXContext.inputAssembly.topology = topology;
842
843 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
844 return rc;
845}
846
847
848int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
849{
850 int rc;
851 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
852 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
853 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
854 AssertReturn(p3dState, VERR_INVALID_STATE);
855
856 PVMSVGA3DDXCONTEXT pDXContext;
857 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
858 AssertRCReturn(rc, rc);
859
860 ASSERT_GUEST_RETURN( depthStencilViewId < pDXContext->cot.cDSView
861 || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
862 ASSERT_GUEST_RETURN(cRenderTargetViewId <= SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
863 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
864 ASSERT_GUEST_RETURN( paRenderTargetViewId[i] < pDXContext->cot.cRTView
865 || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
866 RT_UNTRUSTED_VALIDATED_FENCE();
867
868 pDXContext->svgaDXContext.renderState.depthStencilViewId = depthStencilViewId;
869 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
870 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = paRenderTargetViewId[i];
871
872 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
873 return rc;
874}
875
876
877int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
878{
879 int rc;
880 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
881 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
882 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
883 AssertReturn(p3dState, VERR_INVALID_STATE);
884
885 PVMSVGA3DDXCONTEXT pDXContext;
886 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
887 AssertRCReturn(rc, rc);
888
889 SVGA3dBlendStateId const blendId = pCmd->blendId;
890
891 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
892 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
893 RT_UNTRUSTED_VALIDATED_FENCE();
894
895 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
896 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
897 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, pCmd->blendFactor, sizeof(pDXContext->svgaDXContext.renderState.blendFactor));
898 pDXContext->svgaDXContext.renderState.sampleMask = pCmd->sampleMask;
899
900 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
901 return rc;
902}
903
904
905int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
906{
907 int rc;
908 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
909 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
910 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
911 AssertReturn(p3dState, VERR_INVALID_STATE);
912
913 PVMSVGA3DDXCONTEXT pDXContext;
914 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
915 AssertRCReturn(rc, rc);
916
917 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
918
919 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
920 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
921 RT_UNTRUSTED_VALIDATED_FENCE();
922
923 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
924 pDXContext->svgaDXContext.renderState.stencilRef = pCmd->stencilRef;
925
926 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
927 return rc;
928}
929
930
931int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
932{
933 int rc;
934 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
935 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
936 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
937 AssertReturn(p3dState, VERR_INVALID_STATE);
938
939 PVMSVGA3DDXCONTEXT pDXContext;
940 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
941 AssertRCReturn(rc, rc);
942
943 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
944 RT_UNTRUSTED_VALIDATED_FENCE();
945
946 pDXContext->svgaDXContext.renderState.rasterizerStateId = rasterizerId;
947
948 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
949 return rc;
950}
951
952
953int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineQuery const *pCmd)
954{
955 int rc;
956 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
957 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
958 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
959 AssertReturn(p3dState, VERR_INVALID_STATE);
960
961 PVMSVGA3DDXCONTEXT pDXContext;
962 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
963 AssertRCReturn(rc, rc);
964
965 SVGA3dQueryId const queryId = pCmd->queryId;
966
967 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
968 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
969 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_QUERYTYPE_MIN && pCmd->type < SVGA3D_QUERYTYPE_MAX, VERR_INVALID_PARAMETER);
970 RT_UNTRUSTED_VALIDATED_FENCE();
971
972 /* Cleanup the current query. */
973 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext, queryId);
974
975 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
976 pEntry->type = pCmd->type;
977 pEntry->state = SVGADX_QDSTATE_IDLE;
978 pEntry->flags = pCmd->flags;
979 pEntry->mobid = SVGA_ID_INVALID;
980 pEntry->offset = 0;
981
982 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext, queryId, pEntry);
983 return rc;
984}
985
986
987int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyQuery const *pCmd)
988{
989 int rc;
990 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
991 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
992 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
993 AssertReturn(p3dState, VERR_INVALID_STATE);
994
995 PVMSVGA3DDXCONTEXT pDXContext;
996 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
997 AssertRCReturn(rc, rc);
998
999 SVGA3dQueryId const queryId = pCmd->queryId;
1000
1001 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1002 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1003 RT_UNTRUSTED_VALIDATED_FENCE();
1004
1005 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext, queryId);
1006
1007 /* Cleanup COTable entry.*/
1008 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1009 pEntry->type = SVGA3D_QUERYTYPE_INVALID;
1010 pEntry->state = SVGADX_QDSTATE_INVALID;
1011 pEntry->flags = 0;
1012 pEntry->mobid = SVGA_ID_INVALID;
1013 pEntry->offset = 0;
1014
1015 return rc;
1016}
1017
1018
1019int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindQuery const *pCmd, PVMSVGAMOB pMob)
1020{
1021 int rc;
1022 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1023 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindQuery, VERR_INVALID_STATE);
1024 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1025 AssertReturn(p3dState, VERR_INVALID_STATE);
1026
1027 PVMSVGA3DDXCONTEXT pDXContext;
1028 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1029 AssertRCReturn(rc, rc);
1030
1031 SVGA3dQueryId const queryId = pCmd->queryId;
1032
1033 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1034 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1035 RT_UNTRUSTED_VALIDATED_FENCE();
1036
1037 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1038 pEntry->mobid = vmsvgaR3MobId(pMob);
1039
1040 rc = pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC, pDXContext, queryId);
1041 return rc;
1042}
1043
1044
1045int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetQueryOffset const *pCmd)
1046{
1047 int rc;
1048 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1049 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1050 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1051 AssertReturn(p3dState, VERR_INVALID_STATE);
1052
1053 PVMSVGA3DDXCONTEXT pDXContext;
1054 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1055 AssertRCReturn(rc, rc);
1056
1057 SVGA3dQueryId const queryId = pCmd->queryId;
1058
1059 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1060 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1061 RT_UNTRUSTED_VALIDATED_FENCE();
1062
1063 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1064 pEntry->offset = pCmd->mobOffset;
1065
1066 return rc;
1067}
1068
1069
1070int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBeginQuery const *pCmd)
1071{
1072 int rc;
1073 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1074 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
1075 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1076 AssertReturn(p3dState, VERR_INVALID_STATE);
1077
1078 PVMSVGA3DDXCONTEXT pDXContext;
1079 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1080 AssertRCReturn(rc, rc);
1081
1082 SVGA3dQueryId const queryId = pCmd->queryId;
1083
1084 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1085 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1086 RT_UNTRUSTED_VALIDATED_FENCE();
1087
1088 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1089 Assert(pEntry->state == SVGADX_QDSTATE_IDLE || SVGADX_QDSTATE_PENDING);
1090 if (pEntry->state != SVGADX_QDSTATE_ACTIVE)
1091 {
1092 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext, queryId);
1093 if (RT_SUCCESS(rc))
1094 pEntry->state = SVGADX_QDSTATE_ACTIVE;
1095 }
1096 return rc;
1097}
1098
1099
1100int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXEndQuery const *pCmd)
1101{
1102 int rc;
1103 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1104 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
1105 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1106 AssertReturn(p3dState, VERR_INVALID_STATE);
1107
1108 PVMSVGA3DDXCONTEXT pDXContext;
1109 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1110 AssertRCReturn(rc, rc);
1111
1112 SVGA3dQueryId const queryId = pCmd->queryId;
1113
1114 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1115 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1116 RT_UNTRUSTED_VALIDATED_FENCE();
1117
1118 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1119 Assert(pEntry->state == SVGADX_QDSTATE_ACTIVE);
1120 if (pEntry->state == SVGADX_QDSTATE_ACTIVE)
1121 {
1122 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext, queryId);
1123 if (RT_SUCCESS(rc))
1124 pEntry->state = SVGADX_QDSTATE_PENDING;
1125 }
1126
1127 return rc;
1128}
1129
1130
1131int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1132{
1133 int rc;
1134 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1135 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackQuery, VERR_INVALID_STATE);
1136 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1137 AssertReturn(p3dState, VERR_INVALID_STATE);
1138
1139 PVMSVGA3DDXCONTEXT pDXContext;
1140 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1141 AssertRCReturn(rc, rc);
1142
1143 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackQuery(pThisCC, pDXContext);
1144 return rc;
1145}
1146
1147
1148int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext)
1149{
1150 int rc;
1151 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1152 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
1153 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1154 AssertReturn(p3dState, VERR_INVALID_STATE);
1155
1156 PVMSVGA3DDXCONTEXT pDXContext;
1157 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1158 AssertRCReturn(rc, rc);
1159
1160 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext);
1161 return rc;
1162}
1163
1164
1165int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cSoTarget, SVGA3dSoTarget const *paSoTarget)
1166{
1167 int rc;
1168 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1169 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
1170 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1171 AssertReturn(p3dState, VERR_INVALID_STATE);
1172
1173 PVMSVGA3DDXCONTEXT pDXContext;
1174 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1175 AssertRCReturn(rc, rc);
1176
1177 ASSERT_GUEST_RETURN(cSoTarget < SVGA3D_DX_MAX_SOTARGETS, VERR_INVALID_PARAMETER);
1178 RT_UNTRUSTED_VALIDATED_FENCE();
1179
1180 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere? */
1181 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
1182 pDXContext->svgaDXContext.streamOut.targets[i] = i < cSoTarget ? paSoTarget[i].sid : SVGA3D_INVALID_ID;
1183
1184 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, paSoTarget);
1185 return rc;
1186}
1187
1188
1189int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
1190{
1191 int rc;
1192 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1193 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
1194 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1195 AssertReturn(p3dState, VERR_INVALID_STATE);
1196
1197 PVMSVGA3DDXCONTEXT pDXContext;
1198 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1199 AssertRCReturn(rc, rc);
1200
1201 ASSERT_GUEST_RETURN(cViewport <= SVGA3D_DX_MAX_VIEWPORTS, VERR_INVALID_PARAMETER);
1202 RT_UNTRUSTED_VALIDATED_FENCE();
1203
1204 pDXContext->svgaDXContext.numViewports = (uint8_t)cViewport;
1205 for (uint32_t i = 0; i < cViewport; ++i)
1206 pDXContext->svgaDXContext.viewports[i] = paViewport[i];
1207
1208 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
1209 return rc;
1210}
1211
1212
1213int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
1214{
1215 int rc;
1216 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1217 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
1218 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1219 AssertReturn(p3dState, VERR_INVALID_STATE);
1220
1221 PVMSVGA3DDXCONTEXT pDXContext;
1222 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1223 AssertRCReturn(rc, rc);
1224
1225 ASSERT_GUEST_RETURN(cRect <= SVGA3D_DX_MAX_SCISSORRECTS, VERR_INVALID_PARAMETER);
1226 RT_UNTRUSTED_VALIDATED_FENCE();
1227
1228 pDXContext->svgaDXContext.numScissorRects = (uint8_t)cRect;
1229 for (uint32_t i = 0; i < cRect; ++i)
1230 pDXContext->svgaDXContext.scissorRects[i] = paRect[i];
1231
1232 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
1233 return rc;
1234}
1235
1236
1237int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd)
1238{
1239 int rc;
1240 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1241 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
1242 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1243 AssertReturn(p3dState, VERR_INVALID_STATE);
1244
1245 PVMSVGA3DDXCONTEXT pDXContext;
1246 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1247 AssertRCReturn(rc, rc);
1248
1249 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1250
1251 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1252 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1253 RT_UNTRUSTED_VALIDATED_FENCE();
1254
1255 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pCmd->rgba);
1256 return rc;
1257}
1258
1259
1260int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd)
1261{
1262 int rc;
1263 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1264 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
1265 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1266 AssertReturn(p3dState, VERR_INVALID_STATE);
1267
1268 PVMSVGA3DDXCONTEXT pDXContext;
1269 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1270 AssertRCReturn(rc, rc);
1271
1272 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1273
1274 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1275 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1276 RT_UNTRUSTED_VALIDATED_FENCE();
1277
1278 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext, pCmd->flags, depthStencilViewId, pCmd->depth, (uint8_t)pCmd->stencil);
1279 return rc;
1280}
1281
1282
1283int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd)
1284{
1285 int rc;
1286 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1287 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
1288 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1289 AssertReturn(p3dState, VERR_INVALID_STATE);
1290
1291 PVMSVGA3DDXCONTEXT pDXContext;
1292 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1293 AssertRCReturn(rc, rc);
1294
1295 /** @todo Memcpy if both resources do not have the hardware resource. */
1296
1297 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext, pCmd->dstSid, pCmd->dstSubResource, pCmd->srcSid, pCmd->srcSubResource, &pCmd->box);
1298 return rc;
1299}
1300
1301
1302int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1303{
1304 int rc;
1305 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1306 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
1307 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1308 AssertReturn(p3dState, VERR_INVALID_STATE);
1309
1310 PVMSVGA3DDXCONTEXT pDXContext;
1311 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1312 AssertRCReturn(rc, rc);
1313
1314 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext);
1315 return rc;
1316}
1317
1318
1319int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
1320{
1321 int rc;
1322 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1323 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
1324 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1325 AssertReturn(p3dState, VERR_INVALID_STATE);
1326
1327 PVMSVGA3DDXCONTEXT pDXContext;
1328 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1329 AssertRCReturn(rc, rc);
1330
1331 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext);
1332 return rc;
1333}
1334
1335
1336int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd)
1337{
1338 int rc;
1339 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1340 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
1341 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1342 AssertReturn(p3dState, VERR_INVALID_STATE);
1343
1344 PVMSVGA3DDXCONTEXT pDXContext;
1345 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1346 AssertRCReturn(rc, rc);
1347
1348 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1349
1350 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1351 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1352 RT_UNTRUSTED_VALIDATED_FENCE();
1353
1354 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext, shaderResourceViewId);
1355 return rc;
1356}
1357
1358
1359int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
1360{
1361 int rc;
1362 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1363 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
1364 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1365 AssertReturn(p3dState, VERR_INVALID_STATE);
1366
1367 PVMSVGA3DDXCONTEXT pDXContext;
1368 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1369 AssertRCReturn(rc, rc);
1370
1371 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1372
1373 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1374 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1375 RT_UNTRUSTED_VALIDATED_FENCE();
1376
1377 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1378 pEntry->sid = pCmd->sid;
1379 pEntry->format = pCmd->format;
1380 pEntry->resourceDimension = pCmd->resourceDimension;
1381 pEntry->desc = pCmd->desc;
1382
1383 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
1384 return rc;
1385}
1386
1387
1388int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
1389{
1390 int rc;
1391 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1392 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
1393 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1394 AssertReturn(p3dState, VERR_INVALID_STATE);
1395
1396 PVMSVGA3DDXCONTEXT pDXContext;
1397 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1398 AssertRCReturn(rc, rc);
1399
1400 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1401
1402 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1403 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1404 RT_UNTRUSTED_VALIDATED_FENCE();
1405
1406 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1407 RT_ZERO(*pEntry);
1408
1409 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext, shaderResourceViewId);
1410 return rc;
1411}
1412
1413
1414int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
1415{
1416 int rc;
1417 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1418 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
1419 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1420 AssertReturn(p3dState, VERR_INVALID_STATE);
1421
1422 PVMSVGA3DDXCONTEXT pDXContext;
1423 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1424 AssertRCReturn(rc, rc);
1425
1426 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1427
1428 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1429 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1430 RT_UNTRUSTED_VALIDATED_FENCE();
1431
1432 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1433 pEntry->sid = pCmd->sid;
1434 pEntry->format = pCmd->format;
1435 pEntry->resourceDimension = pCmd->resourceDimension;
1436 pEntry->desc = pCmd->desc;
1437
1438 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
1439 return rc;
1440}
1441
1442
1443int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
1444{
1445 int rc;
1446 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1447 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
1448 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1449 AssertReturn(p3dState, VERR_INVALID_STATE);
1450
1451 PVMSVGA3DDXCONTEXT pDXContext;
1452 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1453 AssertRCReturn(rc, rc);
1454
1455 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1456
1457 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1458 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1459 RT_UNTRUSTED_VALIDATED_FENCE();
1460
1461 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1462 RT_ZERO(*pEntry);
1463
1464 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
1465 {
1466 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] == renderTargetViewId)
1467 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = SVGA_ID_INVALID;
1468 }
1469
1470 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext, renderTargetViewId);
1471 return rc;
1472}
1473
1474
1475int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
1476{
1477 int rc;
1478 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1479 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
1480 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1481 AssertReturn(p3dState, VERR_INVALID_STATE);
1482
1483 PVMSVGA3DDXCONTEXT pDXContext;
1484 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1485 AssertRCReturn(rc, rc);
1486
1487 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1488
1489 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1490 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1491 RT_UNTRUSTED_VALIDATED_FENCE();
1492
1493 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1494 pEntry->sid = pCmd->sid;
1495 pEntry->format = pCmd->format;
1496 pEntry->resourceDimension = pCmd->resourceDimension;
1497 pEntry->mipSlice = pCmd->mipSlice;
1498 pEntry->firstArraySlice = pCmd->firstArraySlice;
1499 pEntry->arraySize = pCmd->arraySize;
1500 pEntry->flags = pCmd->flags;
1501
1502 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
1503 return rc;
1504}
1505
1506
1507int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
1508{
1509 int rc;
1510 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1511 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
1512 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1513 AssertReturn(p3dState, VERR_INVALID_STATE);
1514
1515 PVMSVGA3DDXCONTEXT pDXContext;
1516 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1517 AssertRCReturn(rc, rc);
1518
1519 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1520
1521 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1522 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1523 RT_UNTRUSTED_VALIDATED_FENCE();
1524
1525 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1526 RT_ZERO(*pEntry);
1527
1528 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext, depthStencilViewId);
1529 return rc;
1530}
1531
1532
1533int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
1534{
1535 int rc;
1536 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1537 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
1538 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1539 AssertReturn(p3dState, VERR_INVALID_STATE);
1540
1541 PVMSVGA3DDXCONTEXT pDXContext;
1542 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1543 AssertRCReturn(rc, rc);
1544
1545 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1546 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1547 RT_UNTRUSTED_VALIDATED_FENCE();
1548
1549 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1550 pEntry->elid = elementLayoutId;
1551 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1552 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1553
1554#ifdef LOG_ENABLED
1555 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1556 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1557 {
1558 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1559 i,
1560 pEntry->descs[i].inputSlot,
1561 pEntry->descs[i].alignedByteOffset,
1562 pEntry->descs[i].format,
1563 pEntry->descs[i].inputSlotClass,
1564 pEntry->descs[i].instanceDataStepRate,
1565 pEntry->descs[i].inputRegister
1566 ));
1567 }
1568#endif
1569
1570 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1571 return rc;
1572}
1573
1574
1575int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyElementLayout const *pCmd)
1576{
1577 int rc;
1578 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1579 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1580 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1581 AssertReturn(p3dState, VERR_INVALID_STATE);
1582
1583 PVMSVGA3DDXCONTEXT pDXContext;
1584 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1585 AssertRCReturn(rc, rc);
1586
1587 SVGA3dElementLayoutId const elementLayoutId = pCmd->elementLayoutId;
1588
1589 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1590 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1591 RT_UNTRUSTED_VALIDATED_FENCE();
1592
1593 pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext, elementLayoutId);
1594
1595 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1596 RT_ZERO(*pEntry);
1597 pEntry->elid = SVGA3D_INVALID_ID;
1598
1599 return rc;
1600}
1601
1602
1603int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1604{
1605 int rc;
1606 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1607 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1608 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1609 AssertReturn(p3dState, VERR_INVALID_STATE);
1610
1611 PVMSVGA3DDXCONTEXT pDXContext;
1612 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1613 AssertRCReturn(rc, rc);
1614
1615 const SVGA3dBlendStateId blendId = pCmd->blendId;
1616
1617 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1618 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1619 RT_UNTRUSTED_VALIDATED_FENCE();
1620
1621 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1622 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1623 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1624 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1625
1626 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1627 return rc;
1628}
1629
1630
1631int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext)
1632{
1633 int rc;
1634 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1635 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1636 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1637 AssertReturn(p3dState, VERR_INVALID_STATE);
1638
1639 PVMSVGA3DDXCONTEXT pDXContext;
1640 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1641 AssertRCReturn(rc, rc);
1642
1643 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext);
1644 return rc;
1645}
1646
1647
1648int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1649{
1650 int rc;
1651 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1652 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1653 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1654 AssertReturn(p3dState, VERR_INVALID_STATE);
1655
1656 PVMSVGA3DDXCONTEXT pDXContext;
1657 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1658 AssertRCReturn(rc, rc);
1659
1660 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1661
1662 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1663 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1664 RT_UNTRUSTED_VALIDATED_FENCE();
1665
1666 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1667 pEntry->depthEnable = pCmd->depthEnable;
1668 pEntry->depthWriteMask = pCmd->depthWriteMask;
1669 pEntry->depthFunc = pCmd->depthFunc;
1670 pEntry->stencilEnable = pCmd->stencilEnable;
1671 pEntry->frontEnable = pCmd->frontEnable;
1672 pEntry->backEnable = pCmd->backEnable;
1673 pEntry->stencilReadMask = pCmd->stencilReadMask;
1674 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1675
1676 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1677 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1678 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1679 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1680
1681 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1682 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1683 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1684 pEntry->backStencilFunc = pCmd->backStencilFunc;
1685
1686 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1687 return rc;
1688}
1689
1690
1691int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext)
1692{
1693 int rc;
1694 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1695 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1696 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1697 AssertReturn(p3dState, VERR_INVALID_STATE);
1698
1699 PVMSVGA3DDXCONTEXT pDXContext;
1700 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1701 AssertRCReturn(rc, rc);
1702
1703 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext);
1704 return rc;
1705}
1706
1707
1708int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1709{
1710 int rc;
1711 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1712 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1713 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1714 AssertReturn(p3dState, VERR_INVALID_STATE);
1715
1716 PVMSVGA3DDXCONTEXT pDXContext;
1717 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1718 AssertRCReturn(rc, rc);
1719
1720 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1721
1722 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1723 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1724 RT_UNTRUSTED_VALIDATED_FENCE();
1725
1726 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1727 pEntry->fillMode = pCmd->fillMode;
1728 pEntry->cullMode = pCmd->cullMode;
1729 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1730 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1731 pEntry->depthBias = pCmd->depthBias;
1732 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1733 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1734 pEntry->depthClipEnable = pCmd->depthClipEnable;
1735 pEntry->scissorEnable = pCmd->scissorEnable;
1736 pEntry->multisampleEnable = pCmd->multisampleEnable;
1737 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1738 pEntry->lineWidth = pCmd->lineWidth;
1739 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1740 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1741 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1742 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1743 RT_ZERO(pEntry->mustBeZero);
1744
1745 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1746 return rc;
1747}
1748
1749
1750int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1751{
1752 int rc;
1753 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1754 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1755 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1756 AssertReturn(p3dState, VERR_INVALID_STATE);
1757
1758 PVMSVGA3DDXCONTEXT pDXContext;
1759 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1760 AssertRCReturn(rc, rc);
1761
1762 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext);
1763 return rc;
1764}
1765
1766
1767int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1768{
1769 int rc;
1770 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1771 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1772 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1773 AssertReturn(p3dState, VERR_INVALID_STATE);
1774
1775 PVMSVGA3DDXCONTEXT pDXContext;
1776 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1777 AssertRCReturn(rc, rc);
1778
1779 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1780
1781 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1782 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1783 RT_UNTRUSTED_VALIDATED_FENCE();
1784
1785 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1786 pEntry->filter = pCmd->filter;
1787 pEntry->addressU = pCmd->addressU;
1788 pEntry->addressV = pCmd->addressV;
1789 pEntry->addressW = pCmd->addressW;
1790 pEntry->mipLODBias = pCmd->mipLODBias;
1791 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1792 pEntry->comparisonFunc = pCmd->comparisonFunc;
1793 pEntry->borderColor = pCmd->borderColor;
1794 pEntry->minLOD = pCmd->minLOD;
1795 pEntry->maxLOD = pCmd->maxLOD;
1796
1797 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1798 return rc;
1799}
1800
1801
1802int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1803{
1804 int rc;
1805 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1806 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1807 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1808 AssertReturn(p3dState, VERR_INVALID_STATE);
1809
1810 PVMSVGA3DDXCONTEXT pDXContext;
1811 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1812 AssertRCReturn(rc, rc);
1813
1814 rc = pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext);
1815 return rc;
1816}
1817
1818
1819int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1820{
1821 int rc;
1822 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1823 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1824 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1825 AssertReturn(p3dState, VERR_INVALID_STATE);
1826
1827 PVMSVGA3DDXCONTEXT pDXContext;
1828 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1829 AssertRCReturn(rc, rc);
1830
1831 SVGA3dShaderId const shaderId = pCmd->shaderId;
1832
1833 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1834 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1835 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1836 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1837 RT_UNTRUSTED_VALIDATED_FENCE();
1838
1839 /* Cleanup the current shader. */
1840 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1841
1842 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1843 pEntry->type = pCmd->type;
1844 pEntry->sizeInBytes = pCmd->sizeInBytes;
1845 pEntry->offsetInBytes = 0;
1846 pEntry->mobid = SVGA_ID_INVALID;
1847
1848 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, shaderId, pEntry);
1849 return rc;
1850}
1851
1852
1853int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd)
1854{
1855 int rc;
1856 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1857 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1858 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1859 AssertReturn(p3dState, VERR_INVALID_STATE);
1860
1861 PVMSVGA3DDXCONTEXT pDXContext;
1862 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1863 AssertRCReturn(rc, rc);
1864
1865 SVGA3dShaderId const shaderId = pCmd->shaderId;
1866
1867 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1868 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1869 RT_UNTRUSTED_VALIDATED_FENCE();
1870
1871 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1872
1873 /* Cleanup COTable entries.*/
1874 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1875 pEntry->type = SVGA3D_SHADERTYPE_INVALID;
1876 pEntry->sizeInBytes = 0;
1877 pEntry->offsetInBytes = 0;
1878 pEntry->mobid = SVGA_ID_INVALID;
1879
1880 /** @todo Destroy shaders on context and backend deletion. */
1881 return rc;
1882}
1883
1884
1885static int dxBindShader(DXShaderInfo *pShaderInfo, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1886{
1887 /* How many bytes the MOB can hold. */
1888 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1889 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1890 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
1891
1892 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, pShaderInfo);
1893 if (RT_SUCCESS(rc))
1894 {
1895 /* Get the length of the shader bytecode. */
1896 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
1897 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
1898 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
1899
1900 /* Check if the MOB contains SVGA3dDXSignatureHeader and signature entries.
1901 * If they are not there (Linux guest driver does not provide them), then it is fine
1902 * and the signatures generated by DXShaderParse will be used.
1903 */
1904 uint32_t const cbSignaturesMax = cbMob - cToken * 4; /* How many bytes for signatures are available. */
1905 if (cbSignaturesMax > sizeof(SVGA3dDXSignatureHeader))
1906 {
1907 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + cToken * 4);
1908 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
1909 {
1910 DEBUG_BREAKPOINT_TEST();
1911 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShaderInfo->aInputSignature)
1912 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShaderInfo->aOutputSignature)
1913 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShaderInfo->aPatchConstantSignature),
1914 VERR_INVALID_PARAMETER);
1915
1916 uint32_t const cSignature = pSignatureHeader->numInputSignatures
1917 + pSignatureHeader->numOutputSignatures
1918 + pSignatureHeader->numPatchConstantSignatures;
1919 ASSERT_GUEST_RETURN( cbSignaturesMax - sizeof(SVGA3dDXSignatureHeader)
1920 > cSignature * sizeof(sizeof(SVGA3dDXSignatureEntry)), VERR_INVALID_PARAMETER);
1921
1922 /* Copy to DXShaderInfo. */
1923 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
1924 pShaderInfo->cInputSignature = pSignatureHeader->numInputSignatures;
1925 memcpy(pShaderInfo->aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
1926
1927 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
1928 pShaderInfo->cOutputSignature = pSignatureHeader->numOutputSignatures;
1929 memcpy(pShaderInfo->aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
1930
1931 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
1932 pShaderInfo->cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
1933 memcpy(pShaderInfo->aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
1934 }
1935 }
1936 }
1937
1938 return rc;
1939}
1940
1941
1942int vmsvga3dDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd, PVMSVGAMOB pMob)
1943{
1944 int rc;
1945 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1946 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
1947 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1948 AssertReturn(p3dState, VERR_INVALID_STATE);
1949
1950 PVMSVGA3DDXCONTEXT pDXContext;
1951 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1952 AssertRCReturn(rc, rc);
1953
1954 ASSERT_GUEST_RETURN(pCmd->shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1955 RT_UNTRUSTED_VALIDATED_FENCE();
1956
1957 /* 'type' and 'sizeInBytes' has been already initialized by DefineShader. */
1958 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shid];
1959 //pEntry->type;
1960 //pEntry->sizeInBytes;
1961 pEntry->offsetInBytes = pCmd->offsetInBytes;
1962 pEntry->mobid = vmsvgaR3MobId(pMob);
1963
1964 if (pMob)
1965 {
1966 /* Bind a mob to the shader. */
1967
1968 /* Create a memory pointer for the MOB, which is accessible by host. */
1969 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1970 if (RT_SUCCESS(rc))
1971 {
1972 /* Get pointer to the shader bytecode. This will also verify the offset. */
1973 void const *pvShaderBytecode = vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1974 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
1975
1976 /* Get the shader and optional signatures from the MOB. */
1977 DXShaderInfo shaderInfo;
1978 RT_ZERO(shaderInfo);
1979 rc = dxBindShader(&shaderInfo, pMob, pEntry, pvShaderBytecode);
1980 if (RT_SUCCESS(rc))
1981 {
1982 /* pfnDXBindShader makes a copy of shaderInfo on success. */
1983 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pCmd->shid, &shaderInfo);
1984 }
1985 AssertRC(rc);
1986
1987 /** @todo Backing store is not needed anymore in any case? */
1988 if (RT_FAILURE(rc))
1989 {
1990 DXShaderFree(&shaderInfo);
1991
1992 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1993 }
1994 }
1995 }
1996 else
1997 {
1998 /* Unbind. */
1999 /** @todo Nothing to do here but release the MOB? */
2000 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2001 }
2002
2003 return rc;
2004}
2005
2006
2007int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd)
2008{
2009 int rc;
2010 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2011 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
2012 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2013 AssertReturn(p3dState, VERR_INVALID_STATE);
2014
2015 PVMSVGA3DDXCONTEXT pDXContext;
2016 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2017 AssertRCReturn(rc, rc);
2018
2019 SVGA3dStreamOutputId const soid = pCmd->soid;
2020
2021 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2022 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2023 ASSERT_GUEST_RETURN(pCmd->numOutputStreamEntries < SVGA3D_MAX_DX10_STREAMOUT_DECLS, VERR_INVALID_PARAMETER);
2024 RT_UNTRUSTED_VALIDATED_FENCE();
2025
2026 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
2027 pEntry->numOutputStreamEntries = pCmd->numOutputStreamEntries;
2028 memcpy(pEntry->decl, pCmd->decl, sizeof(pEntry->decl));
2029 memcpy(pEntry->streamOutputStrideInBytes, pCmd->streamOutputStrideInBytes, sizeof(pEntry->streamOutputStrideInBytes));
2030 pEntry->rasterizedStream = 0; // Apparently invalid in this command: pCmd->rasterizedStream;
2031 pEntry->numOutputStreamStrides = 0;
2032 pEntry->mobid = SVGA_ID_INVALID;
2033 pEntry->offsetInBytes = 0;
2034 pEntry->usesMob = 0;
2035 pEntry->pad0 = 0;
2036 pEntry->pad1 = 0;
2037 RT_ZERO(pEntry->pad2);
2038
2039 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext, soid, pEntry);
2040 return rc;
2041}
2042
2043
2044int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd)
2045{
2046 int rc;
2047 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2048 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
2049 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2050 AssertReturn(p3dState, VERR_INVALID_STATE);
2051
2052 PVMSVGA3DDXCONTEXT pDXContext;
2053 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2054 AssertRCReturn(rc, rc);
2055
2056 SVGA3dStreamOutputId const soid = pCmd->soid;
2057
2058 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2059 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2060 RT_UNTRUSTED_VALIDATED_FENCE();
2061
2062 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext, soid);
2063
2064 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
2065 RT_ZERO(*pEntry);
2066 pEntry->mobid = SVGA_ID_INVALID;
2067
2068 return rc;
2069}
2070
2071
2072int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd)
2073{
2074 int rc;
2075 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2076 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
2077 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2078 AssertReturn(p3dState, VERR_INVALID_STATE);
2079
2080 PVMSVGA3DDXCONTEXT pDXContext;
2081 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2082 AssertRCReturn(rc, rc);
2083
2084 SVGA3dStreamOutputId const soid = pCmd->soid;
2085
2086 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2087 ASSERT_GUEST_RETURN( soid == SVGA_ID_INVALID
2088 || soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2089 RT_UNTRUSTED_VALIDATED_FENCE();
2090
2091 pDXContext->svgaDXContext.streamOut.soid = soid;
2092
2093 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext, soid);
2094 return rc;
2095}
2096
2097
2098int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, PVMSVGAMOB pMob)
2099{
2100 int rc;
2101 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2102 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
2103 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2104 AssertReturn(p3dState, VERR_INVALID_STATE);
2105
2106 PVMSVGA3DDXCONTEXT pDXContext;
2107 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2108 AssertRCReturn(rc, rc);
2109 RT_UNTRUSTED_VALIDATED_FENCE();
2110
2111 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2112 RT_UNTRUSTED_VALIDATED_FENCE();
2113
2114 uint32_t validSizeInBytes;
2115 uint32_t cbCOT;
2116 if (pMob)
2117 {
2118 /* Bind a mob to the COTable. */
2119 validSizeInBytes = pCmd->validSizeInBytes;
2120 cbCOT = vmsvgaR3MobSize(pMob);
2121
2122 ASSERT_GUEST_RETURN(validSizeInBytes <= cbCOT, VERR_INVALID_PARAMETER);
2123 RT_UNTRUSTED_VALIDATED_FENCE();
2124
2125 /* Create a memory pointer, which is accessible by host. */
2126 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
2127 }
2128 else
2129 {
2130 /* Unbind. */
2131 validSizeInBytes = 0;
2132 cbCOT = 0;
2133 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[pCmd->type]);
2134 }
2135
2136 uint32_t cEntries = 0;
2137 uint32_t cValidEntries = 0;
2138 if (RT_SUCCESS(rc))
2139 {
2140 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
2141 {
2142 sizeof(SVGACOTableDXRTViewEntry),
2143 sizeof(SVGACOTableDXDSViewEntry),
2144 sizeof(SVGACOTableDXSRViewEntry),
2145 sizeof(SVGACOTableDXElementLayoutEntry),
2146 sizeof(SVGACOTableDXBlendStateEntry),
2147 sizeof(SVGACOTableDXDepthStencilEntry),
2148 sizeof(SVGACOTableDXRasterizerStateEntry),
2149 sizeof(SVGACOTableDXSamplerEntry),
2150 sizeof(SVGACOTableDXStreamOutputEntry),
2151 sizeof(SVGACOTableDXQueryEntry),
2152 sizeof(SVGACOTableDXShaderEntry),
2153 sizeof(SVGACOTableDXUAViewEntry),
2154 };
2155
2156 cEntries = cbCOT / s_acbEntry[pCmd->type];
2157 cValidEntries = validSizeInBytes / s_acbEntry[pCmd->type];
2158 }
2159
2160 if (RT_SUCCESS(rc))
2161 {
2162 pDXContext->aCOTMobs[pCmd->type] = pMob;
2163
2164 void *pvCOT = vmsvgaR3MobBackingStorePtr(pMob, 0);
2165 switch (pCmd->type)
2166 {
2167 case SVGA_COTABLE_RTVIEW:
2168 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
2169 pDXContext->cot.cRTView = cEntries;
2170 break;
2171 case SVGA_COTABLE_DSVIEW:
2172 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
2173 pDXContext->cot.cDSView = cEntries;
2174 break;
2175 case SVGA_COTABLE_SRVIEW:
2176 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
2177 pDXContext->cot.cSRView = cEntries;
2178 break;
2179 case SVGA_COTABLE_ELEMENTLAYOUT:
2180 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
2181 pDXContext->cot.cElementLayout = cEntries;
2182 break;
2183 case SVGA_COTABLE_BLENDSTATE:
2184 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
2185 pDXContext->cot.cBlendState = cEntries;
2186 break;
2187 case SVGA_COTABLE_DEPTHSTENCIL:
2188 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
2189 pDXContext->cot.cDepthStencil = cEntries;
2190 break;
2191 case SVGA_COTABLE_RASTERIZERSTATE:
2192 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
2193 pDXContext->cot.cRasterizerState = cEntries;
2194 break;
2195 case SVGA_COTABLE_SAMPLER:
2196 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
2197 pDXContext->cot.cSampler = cEntries;
2198 break;
2199 case SVGA_COTABLE_STREAMOUTPUT:
2200 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
2201 pDXContext->cot.cStreamOutput = cEntries;
2202 break;
2203 case SVGA_COTABLE_DXQUERY:
2204 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
2205 pDXContext->cot.cQuery = cEntries;
2206 break;
2207 case SVGA_COTABLE_DXSHADER:
2208 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
2209 pDXContext->cot.cShader = cEntries;
2210 break;
2211 case SVGA_COTABLE_UAVIEW:
2212 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
2213 pDXContext->cot.cUAView = cEntries;
2214 break;
2215 case SVGA_COTABLE_MAX: break; /* Compiler warning */
2216 }
2217 }
2218 else
2219 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2220
2221 /* Notify the backend. */
2222 if (RT_SUCCESS(rc))
2223 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, pCmd->type, cValidEntries);
2224
2225 return rc;
2226}
2227
2228
2229int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd)
2230{
2231 int rc;
2232 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2233 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2234 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2235 AssertReturn(p3dState, VERR_INVALID_STATE);
2236
2237 PVMSVGA3DDXCONTEXT pDXContext;
2238 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2239 AssertRCReturn(rc, rc);
2240 RT_UNTRUSTED_VALIDATED_FENCE();
2241
2242 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2243 RT_UNTRUSTED_VALIDATED_FENCE();
2244
2245 PVMSVGAMOB pMob = pDXContext->aCOTMobs[pCmd->type];
2246 rc = vmsvgaR3MobBackingStoreWriteToGuest(pSvgaR3State, pMob);
2247 return rc;
2248}
2249
2250
2251int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2252{
2253 int rc;
2254 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2255 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
2256 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2257 AssertReturn(p3dState, VERR_INVALID_STATE);
2258
2259 PVMSVGA3DDXCONTEXT pDXContext;
2260 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2261 AssertRCReturn(rc, rc);
2262
2263 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
2264 return rc;
2265}
2266
2267
2268int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
2269{
2270 int rc;
2271 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2272 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
2273 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2274 AssertReturn(p3dState, VERR_INVALID_STATE);
2275
2276 PVMSVGA3DDXCONTEXT pDXContext;
2277 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2278 AssertRCReturn(rc, rc);
2279
2280 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
2281 return rc;
2282}
2283
2284
2285int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
2286{
2287 int rc;
2288 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2289 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
2290 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2291 AssertReturn(p3dState, VERR_INVALID_STATE);
2292
2293 PVMSVGA3DDXCONTEXT pDXContext;
2294 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2295 AssertRCReturn(rc, rc);
2296
2297 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
2298 return rc;
2299}
2300
2301
2302int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
2303{
2304 int rc;
2305 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2306 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllQuery, VERR_INVALID_STATE);
2307 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2308 AssertReturn(p3dState, VERR_INVALID_STATE);
2309
2310 PVMSVGA3DDXCONTEXT pDXContext;
2311 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2312 AssertRCReturn(rc, rc);
2313
2314 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllQuery(pThisCC, pDXContext);
2315 return rc;
2316}
2317
2318
2319int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
2320{
2321 int rc;
2322 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2323 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery, VERR_INVALID_STATE);
2324 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2325 AssertReturn(p3dState, VERR_INVALID_STATE);
2326
2327 PVMSVGA3DDXCONTEXT pDXContext;
2328 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2329 AssertRCReturn(rc, rc);
2330
2331 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery(pThisCC, pDXContext);
2332 return rc;
2333}
2334
2335
2336int vmsvga3dDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext)
2337{
2338 int rc;
2339 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2340 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMobFence64, VERR_INVALID_STATE);
2341 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2342 AssertReturn(p3dState, VERR_INVALID_STATE);
2343
2344 PVMSVGA3DDXCONTEXT pDXContext;
2345 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2346 AssertRCReturn(rc, rc);
2347
2348 rc = pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC, pDXContext);
2349 return rc;
2350}
2351
2352
2353int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2354{
2355 int rc;
2356 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2357 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
2358 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2359 AssertReturn(p3dState, VERR_INVALID_STATE);
2360
2361 PVMSVGA3DDXCONTEXT pDXContext;
2362 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2363 AssertRCReturn(rc, rc);
2364
2365 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
2366 return rc;
2367}
2368
2369
2370int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
2371{
2372 int rc;
2373 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2374 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
2375 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2376 AssertReturn(p3dState, VERR_INVALID_STATE);
2377
2378 PVMSVGA3DDXCONTEXT pDXContext;
2379 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2380 AssertRCReturn(rc, rc);
2381
2382 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
2383 return rc;
2384}
2385
2386
2387int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
2388{
2389 int rc;
2390 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2391 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
2392 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2393 AssertReturn(p3dState, VERR_INVALID_STATE);
2394
2395 PVMSVGA3DDXCONTEXT pDXContext;
2396 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2397 AssertRCReturn(rc, rc);
2398
2399 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
2400 return rc;
2401}
2402
2403
2404int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2405{
2406 int rc;
2407 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2408 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
2409 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2410 AssertReturn(p3dState, VERR_INVALID_STATE);
2411
2412 PVMSVGA3DDXCONTEXT pDXContext;
2413 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2414 AssertRCReturn(rc, rc);
2415
2416 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
2417 return rc;
2418}
2419
2420
2421int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2422{
2423 int rc;
2424 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2425 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
2426 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2427 AssertReturn(p3dState, VERR_INVALID_STATE);
2428
2429 PVMSVGA3DDXCONTEXT pDXContext;
2430 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2431 AssertRCReturn(rc, rc);
2432
2433 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
2434 return rc;
2435}
2436
2437
2438int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2439{
2440 int rc;
2441 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2442 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
2443 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2444 AssertReturn(p3dState, VERR_INVALID_STATE);
2445
2446 PVMSVGA3DDXCONTEXT pDXContext;
2447 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2448 AssertRCReturn(rc, rc);
2449
2450 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
2451 return rc;
2452}
2453
2454
2455int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2456{
2457 int rc;
2458 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2459 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
2460 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2461 AssertReturn(p3dState, VERR_INVALID_STATE);
2462
2463 PVMSVGA3DDXCONTEXT pDXContext;
2464 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2465 AssertRCReturn(rc, rc);
2466
2467 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
2468 return rc;
2469}
2470
2471
2472int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2473{
2474 int rc;
2475 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2476 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
2477 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2478 AssertReturn(p3dState, VERR_INVALID_STATE);
2479
2480 PVMSVGA3DDXCONTEXT pDXContext;
2481 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2482 AssertRCReturn(rc, rc);
2483
2484 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
2485 return rc;
2486}
2487
2488
2489int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2490{
2491 int rc;
2492 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2493 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
2494 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2495 AssertReturn(p3dState, VERR_INVALID_STATE);
2496
2497 PVMSVGA3DDXCONTEXT pDXContext;
2498 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2499 AssertRCReturn(rc, rc);
2500
2501 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
2502 return rc;
2503}
2504
2505
2506int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2507{
2508 int rc;
2509 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2510 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
2511 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2512 AssertReturn(p3dState, VERR_INVALID_STATE);
2513
2514 PVMSVGA3DDXCONTEXT pDXContext;
2515 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2516 AssertRCReturn(rc, rc);
2517
2518 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
2519 return rc;
2520}
2521
2522
2523int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2524{
2525 int rc;
2526 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2527 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
2528 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2529 AssertReturn(p3dState, VERR_INVALID_STATE);
2530
2531 PVMSVGA3DDXCONTEXT pDXContext;
2532 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2533 AssertRCReturn(rc, rc);
2534
2535 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
2536 return rc;
2537}
2538
2539
2540int vmsvga3dGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2541{
2542 int rc;
2543 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2544 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnGrowOTable, VERR_INVALID_STATE);
2545 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2546 AssertReturn(p3dState, VERR_INVALID_STATE);
2547
2548 PVMSVGA3DDXCONTEXT pDXContext;
2549 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2550 AssertRCReturn(rc, rc);
2551
2552 rc = pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC, pDXContext);
2553 return rc;
2554}
2555
2556
2557int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2558{
2559 int rc;
2560 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2561 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGrowCOTable, VERR_INVALID_STATE);
2562 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2563 AssertReturn(p3dState, VERR_INVALID_STATE);
2564
2565 PVMSVGA3DDXCONTEXT pDXContext;
2566 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2567 AssertRCReturn(rc, rc);
2568
2569 rc = pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC, pDXContext);
2570 return rc;
2571}
2572
2573
2574int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2575{
2576 int rc;
2577 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2578 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2579 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2580 AssertReturn(p3dState, VERR_INVALID_STATE);
2581
2582 PVMSVGA3DDXCONTEXT pDXContext;
2583 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2584 AssertRCReturn(rc, rc);
2585
2586 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2587 return rc;
2588}
2589
2590
2591int vmsvga3dDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext)
2592{
2593 int rc;
2594 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2595 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3, VERR_INVALID_STATE);
2596 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2597 AssertReturn(p3dState, VERR_INVALID_STATE);
2598
2599 PVMSVGA3DDXCONTEXT pDXContext;
2600 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2601 AssertRCReturn(rc, rc);
2602
2603 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC, pDXContext);
2604 return rc;
2605}
2606
2607
2608int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2609{
2610 int rc;
2611 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2612 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2613 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2614 AssertReturn(p3dState, VERR_INVALID_STATE);
2615
2616 PVMSVGA3DDXCONTEXT pDXContext;
2617 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2618 AssertRCReturn(rc, rc);
2619
2620 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2621 return rc;
2622}
2623
2624
2625int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2626{
2627 int rc;
2628 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2629 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2630 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2631 AssertReturn(p3dState, VERR_INVALID_STATE);
2632
2633 PVMSVGA3DDXCONTEXT pDXContext;
2634 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2635 AssertRCReturn(rc, rc);
2636
2637 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2638 return rc;
2639}
2640
2641
2642int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2643{
2644 int rc;
2645 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2646 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2647 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2648 AssertReturn(p3dState, VERR_INVALID_STATE);
2649
2650 PVMSVGA3DDXCONTEXT pDXContext;
2651 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2652 AssertRCReturn(rc, rc);
2653
2654 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2655 return rc;
2656}
2657
2658
2659int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2660{
2661 int rc;
2662 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2663 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2664 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2665 AssertReturn(p3dState, VERR_INVALID_STATE);
2666
2667 PVMSVGA3DDXCONTEXT pDXContext;
2668 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2669 AssertRCReturn(rc, rc);
2670
2671 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2672 return rc;
2673}
2674
2675
2676int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2677{
2678 int rc;
2679 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2680 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2681 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2682 AssertReturn(p3dState, VERR_INVALID_STATE);
2683
2684 PVMSVGA3DDXCONTEXT pDXContext;
2685 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2686 AssertRCReturn(rc, rc);
2687
2688 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2689 return rc;
2690}
2691
2692
2693int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2694{
2695 int rc;
2696 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2697 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2698 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2699 AssertReturn(p3dState, VERR_INVALID_STATE);
2700
2701 PVMSVGA3DDXCONTEXT pDXContext;
2702 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2703 AssertRCReturn(rc, rc);
2704
2705 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext);
2706 return rc;
2707}
2708
2709
2710int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2711{
2712 int rc;
2713 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2714 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2715 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2716 AssertReturn(p3dState, VERR_INVALID_STATE);
2717
2718 PVMSVGA3DDXCONTEXT pDXContext;
2719 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2720 AssertRCReturn(rc, rc);
2721
2722 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext);
2723 return rc;
2724}
2725
2726
2727int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext)
2728{
2729 int rc;
2730 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2731 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2732 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2733 AssertReturn(p3dState, VERR_INVALID_STATE);
2734
2735 PVMSVGA3DDXCONTEXT pDXContext;
2736 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2737 AssertRCReturn(rc, rc);
2738
2739 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext);
2740 return rc;
2741}
2742
2743
2744int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext)
2745{
2746 int rc;
2747 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2748 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2749 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2750 AssertReturn(p3dState, VERR_INVALID_STATE);
2751
2752 PVMSVGA3DDXCONTEXT pDXContext;
2753 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2754 AssertRCReturn(rc, rc);
2755
2756 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext);
2757 return rc;
2758}
2759
2760
2761int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2762{
2763 int rc;
2764 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2765 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2766 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2767 AssertReturn(p3dState, VERR_INVALID_STATE);
2768
2769 PVMSVGA3DDXCONTEXT pDXContext;
2770 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2771 AssertRCReturn(rc, rc);
2772
2773 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext);
2774 return rc;
2775}
2776
2777
2778int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2779{
2780 int rc;
2781 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2782 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2783 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2784 AssertReturn(p3dState, VERR_INVALID_STATE);
2785
2786 PVMSVGA3DDXCONTEXT pDXContext;
2787 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2788 AssertRCReturn(rc, rc);
2789
2790 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext);
2791 return rc;
2792}
2793
2794
2795int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2796{
2797 int rc;
2798 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2799 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2800 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2801 AssertReturn(p3dState, VERR_INVALID_STATE);
2802
2803 PVMSVGA3DDXCONTEXT pDXContext;
2804 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2805 AssertRCReturn(rc, rc);
2806
2807 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext);
2808 return rc;
2809}
2810
2811
2812int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2813{
2814 int rc;
2815 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2816 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2817 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2818 AssertReturn(p3dState, VERR_INVALID_STATE);
2819
2820 PVMSVGA3DDXCONTEXT pDXContext;
2821 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2822 AssertRCReturn(rc, rc);
2823
2824 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext);
2825 return rc;
2826}
2827
2828
2829int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext)
2830{
2831 int rc;
2832 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2833 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2834 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2835 AssertReturn(p3dState, VERR_INVALID_STATE);
2836
2837 PVMSVGA3DDXCONTEXT pDXContext;
2838 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2839 AssertRCReturn(rc, rc);
2840
2841 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext);
2842 return rc;
2843}
2844
2845
2846int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2847{
2848 int rc;
2849 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2850 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
2851 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2852 AssertReturn(p3dState, VERR_INVALID_STATE);
2853
2854 PVMSVGA3DDXCONTEXT pDXContext;
2855 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2856 AssertRCReturn(rc, rc);
2857
2858 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
2859 return rc;
2860}
2861
2862
2863int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2864{
2865 int rc;
2866 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2867 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
2868 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2869 AssertReturn(p3dState, VERR_INVALID_STATE);
2870
2871 PVMSVGA3DDXCONTEXT pDXContext;
2872 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2873 AssertRCReturn(rc, rc);
2874
2875 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
2876 return rc;
2877}
2878
2879
2880int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2881{
2882 int rc;
2883 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2884 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
2885 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2886 AssertReturn(p3dState, VERR_INVALID_STATE);
2887
2888 PVMSVGA3DDXCONTEXT pDXContext;
2889 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2890 AssertRCReturn(rc, rc);
2891
2892 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
2893 return rc;
2894}
2895
2896
2897int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
2898{
2899 int rc;
2900 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2901 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
2902 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2903 AssertReturn(p3dState, VERR_INVALID_STATE);
2904
2905 PVMSVGA3DDXCONTEXT pDXContext;
2906 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2907 AssertRCReturn(rc, rc);
2908
2909 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
2910 return rc;
2911}
2912
2913
2914int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2915{
2916 int rc;
2917 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2918 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStructureCount, VERR_INVALID_STATE);
2919 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2920 AssertReturn(p3dState, VERR_INVALID_STATE);
2921
2922 PVMSVGA3DDXCONTEXT pDXContext;
2923 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2924 AssertRCReturn(rc, rc);
2925
2926 rc = pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC, pDXContext);
2927 return rc;
2928}
2929
2930
2931int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2932{
2933 int rc;
2934 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2935 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
2936 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2937 AssertReturn(p3dState, VERR_INVALID_STATE);
2938
2939 PVMSVGA3DDXCONTEXT pDXContext;
2940 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2941 AssertRCReturn(rc, rc);
2942
2943 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
2944 return rc;
2945}
2946
2947
2948int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2949{
2950 int rc;
2951 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2952 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
2953 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2954 AssertReturn(p3dState, VERR_INVALID_STATE);
2955
2956 PVMSVGA3DDXCONTEXT pDXContext;
2957 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2958 AssertRCReturn(rc, rc);
2959
2960 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
2961 return rc;
2962}
2963
2964
2965int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2966{
2967 int rc;
2968 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2969 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
2970 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2971 AssertReturn(p3dState, VERR_INVALID_STATE);
2972
2973 PVMSVGA3DDXCONTEXT pDXContext;
2974 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2975 AssertRCReturn(rc, rc);
2976
2977 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
2978 return rc;
2979}
2980
2981
2982int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
2983{
2984 int rc;
2985 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2986 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
2987 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2988 AssertReturn(p3dState, VERR_INVALID_STATE);
2989
2990 PVMSVGA3DDXCONTEXT pDXContext;
2991 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2992 AssertRCReturn(rc, rc);
2993
2994 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
2995 return rc;
2996}
2997
2998
2999int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
3000{
3001 int rc;
3002 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3003 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
3004 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3005 AssertReturn(p3dState, VERR_INVALID_STATE);
3006
3007 PVMSVGA3DDXCONTEXT pDXContext;
3008 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3009 AssertRCReturn(rc, rc);
3010
3011 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
3012 return rc;
3013}
3014
3015
3016int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
3017{
3018 int rc;
3019 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3020 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
3021 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3022 AssertReturn(p3dState, VERR_INVALID_STATE);
3023
3024 PVMSVGA3DDXCONTEXT pDXContext;
3025 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3026 AssertRCReturn(rc, rc);
3027
3028 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
3029 return rc;
3030}
3031
3032
3033int vmsvga3dDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext)
3034{
3035 int rc;
3036 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3037 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4, VERR_INVALID_STATE);
3038 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3039 AssertReturn(p3dState, VERR_INVALID_STATE);
3040
3041 PVMSVGA3DDXCONTEXT pDXContext;
3042 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3043 AssertRCReturn(rc, rc);
3044
3045 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC, pDXContext);
3046 return rc;
3047}
3048
3049
3050int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
3051{
3052 int rc;
3053 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3054 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
3055 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3056 AssertReturn(p3dState, VERR_INVALID_STATE);
3057
3058 PVMSVGA3DDXCONTEXT pDXContext;
3059 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3060 AssertRCReturn(rc, rc);
3061
3062 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext);
3063 return rc;
3064}
3065
3066
3067int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
3068{
3069 int rc;
3070 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3071 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
3072 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3073 AssertReturn(p3dState, VERR_INVALID_STATE);
3074
3075 PVMSVGA3DDXCONTEXT pDXContext;
3076 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3077 AssertRCReturn(rc, rc);
3078
3079 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
3080 return rc;
3081}
3082
3083
3084int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext)
3085{
3086 int rc;
3087 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3088 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob, VERR_INVALID_STATE);
3089 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3090 AssertReturn(p3dState, VERR_INVALID_STATE);
3091
3092 PVMSVGA3DDXCONTEXT pDXContext;
3093 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3094 AssertRCReturn(rc, rc);
3095
3096 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC, pDXContext);
3097 return rc;
3098}
3099
3100
3101int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3102{
3103 int rc;
3104 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3105 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
3106 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3107 AssertReturn(p3dState, VERR_INVALID_STATE);
3108
3109 PVMSVGA3DDXCONTEXT pDXContext;
3110 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3111 AssertRCReturn(rc, rc);
3112
3113 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
3114 return rc;
3115}
3116
3117
3118int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
3119{
3120 int rc;
3121 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3122 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput, VERR_INVALID_STATE);
3123 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3124 AssertReturn(p3dState, VERR_INVALID_STATE);
3125
3126 PVMSVGA3DDXCONTEXT pDXContext;
3127 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3128 AssertRCReturn(rc, rc);
3129
3130 rc = pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC, pDXContext);
3131 return rc;
3132}
3133
3134
3135int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
3136{
3137 int rc;
3138 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3139 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
3140 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3141 AssertReturn(p3dState, VERR_INVALID_STATE);
3142
3143 PVMSVGA3DDXCONTEXT pDXContext;
3144 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3145 AssertRCReturn(rc, rc);
3146
3147 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
3148 return rc;
3149}
3150
3151
3152int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3153{
3154 int rc;
3155 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3156 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
3157 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3158 AssertReturn(p3dState, VERR_INVALID_STATE);
3159
3160 PVMSVGA3DDXCONTEXT pDXContext;
3161 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3162 AssertRCReturn(rc, rc);
3163
3164 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
3165 return rc;
3166}
3167
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