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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 94377

Last change on this file since 94377 was 94265, checked in by vboxsync, 3 years ago

Devices/Graphics: DXQuery commands; DXDestroy commands; DXBufferCopy: bugref:9830

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1/* $Id: DevVGA-SVGA3d-dx.cpp 94265 2022-03-16 10:33:19Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42static int dxReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry *pEntry);
43
44
45/*
46 *
47 * Command handlers.
48 *
49 */
50
51int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
52{
53 int rc;
54 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
55 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
56 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
57 AssertReturn(p3dState, VERR_INVALID_STATE);
58
59 PVMSVGA3DDXCONTEXT pDXContext;
60 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
61 AssertRCReturn(rc, rc);
62
63 /* Copy the host structure back to the guest memory. */
64 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
65
66 return rc;
67}
68
69
70int vmsvga3dDXSwitchContext(PVGASTATECC pThisCC, uint32_t cid)
71{
72 int rc;
73 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
74 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSwitchContext, VERR_INVALID_STATE);
75 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
76 AssertReturn(p3dState, VERR_INVALID_STATE);
77
78 PVMSVGA3DDXCONTEXT pDXContext;
79 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
80 AssertRCReturn(rc, rc);
81
82 /* Notify the host backend that context is about to be switched. */
83 rc = pSvgaR3State->pFuncsDX->pfnDXSwitchContext(pThisCC, pDXContext);
84 if (rc == VINF_NOT_IMPLEMENTED || RT_FAILURE(rc))
85 return rc;
86
87 /** @todo Keep track of changes in the pipeline and apply only modified state. */
88 /* It is not necessary to restore SVGADXContextMobFormat::shaderState::shaderResources
89 * because they are applied by the backend before each Draw call.
90 */
91 #define DX_STATE_VS 0x00000001
92 #define DX_STATE_PS 0x00000002
93 #define DX_STATE_SAMPLERS 0x00000004
94 #define DX_STATE_INPUTLAYOUT 0x00000008
95 #define DX_STATE_TOPOLOGY 0x00000010
96 #define DX_STATE_VERTEXBUFFER 0x00000020
97 #define DX_STATE_INDEXBUFFER 0x00000040
98 #define DX_STATE_BLENDSTATE 0x00000080
99 #define DX_STATE_DEPTHSTENCILSTATE 0x00000100
100 #define DX_STATE_SOTARGETS 0x00000200
101 #define DX_STATE_VIEWPORTS 0x00000400
102 #define DX_STATE_SCISSORRECTS 0x00000800
103 #define DX_STATE_RASTERIZERSTATE 0x00001000
104 #define DX_STATE_RENDERTARGETS 0x00002000
105 #define DX_STATE_GS 0x00004000
106 #define DX_STATE_CONSTANTBUFFERS 0x00008000
107 uint32_t u32TrackedState = 0
108 | DX_STATE_VS
109 | DX_STATE_PS
110 | DX_STATE_SAMPLERS
111 | DX_STATE_INPUTLAYOUT
112 | DX_STATE_TOPOLOGY
113 | DX_STATE_VERTEXBUFFER
114 | DX_STATE_INDEXBUFFER
115 | DX_STATE_BLENDSTATE
116 | DX_STATE_DEPTHSTENCILSTATE
117 | DX_STATE_SOTARGETS
118 | DX_STATE_VIEWPORTS
119 | DX_STATE_SCISSORRECTS
120 | DX_STATE_RASTERIZERSTATE
121 | DX_STATE_RENDERTARGETS
122 | DX_STATE_GS
123 | DX_STATE_CONSTANTBUFFERS
124 ;
125
126 LogFunc(("cid = %d, state = 0x%08X\n", cid, u32TrackedState));
127
128 if (u32TrackedState & DX_STATE_VS)
129 {
130 u32TrackedState &= ~DX_STATE_VS;
131
132 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_VS;
133
134 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
135 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
136
137 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
138 AssertRC(rc);
139 }
140
141
142 if (u32TrackedState & DX_STATE_PS)
143 {
144 u32TrackedState &= ~DX_STATE_PS;
145
146 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_PS;
147
148 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
149 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
150
151 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
152 AssertRC(rc);
153 }
154
155
156 if (u32TrackedState & DX_STATE_GS)
157 {
158 u32TrackedState &= ~DX_STATE_GS;
159
160 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_GS;
161
162 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
163 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
164
165 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
166 AssertRC(rc);
167 }
168
169
170 if (u32TrackedState & DX_STATE_SAMPLERS)
171 {
172 u32TrackedState &= ~DX_STATE_SAMPLERS;
173
174 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_DX10_MAX; ++i) /** @todo SVGA3D_SHADERTYPE_MAX */
175 {
176 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
177 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
178
179 uint32_t startSampler = 0;
180 uint32_t cSamplerId = SVGA3D_DX_MAX_SAMPLERS;
181 SVGA3dSamplerId *paSamplerId = &pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[0];
182
183 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, startSampler, shaderType, cSamplerId, paSamplerId);
184 AssertRC(rc);
185 }
186 }
187
188
189 if (u32TrackedState & DX_STATE_INPUTLAYOUT)
190 {
191 u32TrackedState &= ~DX_STATE_INPUTLAYOUT;
192
193 SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
194
195 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
196 AssertRC(rc);
197 }
198
199
200 if (u32TrackedState & DX_STATE_TOPOLOGY)
201 {
202 u32TrackedState &= ~DX_STATE_TOPOLOGY;
203
204 SVGA3dPrimitiveType const topology = (SVGA3dPrimitiveType)pDXContext->svgaDXContext.inputAssembly.topology;
205
206 if (topology != SVGA3D_PRIMITIVE_INVALID)
207 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
208 AssertRC(rc);
209 }
210
211
212 if (u32TrackedState & DX_STATE_VERTEXBUFFER)
213 {
214 u32TrackedState &= ~DX_STATE_VERTEXBUFFER;
215
216 /** @todo Track which vertex buffers were modified and update only the corresponding slots.
217 * 32 bits mask is enough.
218 */
219 uint32_t startBuffer = 0;
220 uint32_t cVertexBuffer = SVGA3D_DX_MAX_VERTEXBUFFERS;
221 SVGA3dVertexBuffer aVertexBuffer[SVGA3D_DX_MAX_VERTEXBUFFERS];
222 for (uint32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
223 {
224 aVertexBuffer[i].sid = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].bufferId;
225 aVertexBuffer[i].stride = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].stride;
226 aVertexBuffer[i].offset = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].offset;
227 }
228
229 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, aVertexBuffer);
230 AssertRC(rc);
231 }
232
233
234 if (u32TrackedState & DX_STATE_INDEXBUFFER)
235 {
236 u32TrackedState &= ~DX_STATE_INDEXBUFFER;
237
238 SVGA3dSurfaceId const sid = pDXContext->svgaDXContext.inputAssembly.indexBufferSid;
239 SVGA3dSurfaceFormat const format = (SVGA3dSurfaceFormat)pDXContext->svgaDXContext.inputAssembly.indexBufferFormat;
240 uint32_t const offset = pDXContext->svgaDXContext.inputAssembly.indexBufferOffset;
241
242 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, sid, format, offset);
243 AssertRC(rc);
244 }
245
246
247 if (u32TrackedState & DX_STATE_BLENDSTATE)
248 {
249 u32TrackedState &= ~DX_STATE_BLENDSTATE;
250
251 SVGA3dBlendStateId const blendId = pDXContext->svgaDXContext.renderState.blendStateId;
252 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
253 float const *paBlendFactor = (float *)&pDXContext->svgaDXContext.renderState.blendFactor[0];
254 uint32_t const sampleMask = pDXContext->svgaDXContext.renderState.sampleMask;
255
256 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, paBlendFactor, sampleMask);
257 AssertRC(rc);
258 }
259
260
261 if (u32TrackedState & DX_STATE_DEPTHSTENCILSTATE)
262 {
263 u32TrackedState &= ~DX_STATE_DEPTHSTENCILSTATE;
264
265 SVGA3dDepthStencilStateId const depthStencilId = pDXContext->svgaDXContext.renderState.depthStencilStateId;
266 uint32_t const stencilRef = pDXContext->svgaDXContext.renderState.stencilRef;
267
268 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, stencilRef);
269 AssertRC(rc);
270 }
271
272
273 if (u32TrackedState & DX_STATE_SOTARGETS)
274 {
275 u32TrackedState &= ~DX_STATE_SOTARGETS;
276
277 uint32_t cSoTarget = SVGA3D_DX_MAX_SOTARGETS;
278 SVGA3dSoTarget aSoTarget[SVGA3D_DX_MAX_SOTARGETS];
279 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
280 {
281 aSoTarget[i].sid = pDXContext->svgaDXContext.streamOut.targets[i];
282 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere by the host? */
283 aSoTarget[i].offset = 0;
284 aSoTarget[i].sizeInBytes = 0;
285 }
286
287 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, aSoTarget);
288 AssertRC(rc);
289 }
290
291
292 if (u32TrackedState & DX_STATE_VIEWPORTS)
293 {
294 u32TrackedState &= ~DX_STATE_VIEWPORTS;
295
296 uint32_t const cViewport = pDXContext->svgaDXContext.numViewports;
297 SVGA3dViewport const *paViewport = &pDXContext->svgaDXContext.viewports[0];
298
299 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
300 AssertRC(rc);
301 }
302
303
304 if (u32TrackedState & DX_STATE_SCISSORRECTS)
305 {
306 u32TrackedState &= ~DX_STATE_SCISSORRECTS;
307
308 uint32_t const cRect = pDXContext->svgaDXContext.numScissorRects;
309 SVGASignedRect const *paRect = &pDXContext->svgaDXContext.scissorRects[0];
310
311 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
312 AssertRC(rc);
313 }
314
315
316 if (u32TrackedState & DX_STATE_RASTERIZERSTATE)
317 {
318 u32TrackedState &= ~DX_STATE_RASTERIZERSTATE;
319
320 SVGA3dRasterizerStateId const rasterizerId = pDXContext->svgaDXContext.renderState.rasterizerStateId;
321
322 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
323 AssertRC(rc);
324 }
325
326
327 if (u32TrackedState & DX_STATE_RENDERTARGETS)
328 {
329 u32TrackedState &= ~DX_STATE_RENDERTARGETS;
330
331 SVGA3dDepthStencilViewId const depthStencilViewId = (SVGA3dRenderTargetViewId)pDXContext->svgaDXContext.renderState.depthStencilViewId;
332 uint32_t const cRenderTargetViewId = SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS;
333 SVGA3dRenderTargetViewId const *paRenderTargetViewId = (SVGA3dRenderTargetViewId *)&pDXContext->svgaDXContext.renderState.renderTargetViewIds[0];
334
335 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
336 AssertRC(rc);
337 }
338
339
340 if (u32TrackedState & DX_STATE_CONSTANTBUFFERS)
341 {
342 u32TrackedState &= ~DX_STATE_CONSTANTBUFFERS;
343
344 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_DX10_MAX; ++i) /** @todo SVGA3D_SHADERTYPE_MAX */
345 {
346 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
347 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
348
349 /** @todo Track which constant buffers were modified and update only the corresponding slots.
350 * 32 bit mask is enough.
351 */
352 for (int iSlot = 0; iSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++iSlot)
353 {
354 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[iSlot];
355 if (pCBB->sid == SVGA3D_INVALID_ID) // This will not be necessary when constant buffers slots will be tracked.
356 continue;
357
358 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, iSlot, shaderType, pCBB->sid, pCBB->offsetInBytes, pCBB->sizeInBytes);
359 AssertRC(rc);
360 }
361 }
362 }
363
364 Assert(u32TrackedState == 0);
365
366 return rc;
367}
368
369
370/**
371 * Create a new 3D DX context.
372 *
373 * @returns VBox status code.
374 * @param pThisCC The VGA/VMSVGA state for ring-3.
375 * @param cid Context id to be created.
376 */
377int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
378{
379 int rc;
380 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
381 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
382 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
383 AssertReturn(p3dState, VERR_INVALID_STATE);
384
385 PVMSVGA3DDXCONTEXT pDXContext;
386
387 LogFunc(("cid %d\n", cid));
388
389 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
390
391 if (cid >= p3dState->cDXContexts)
392 {
393 /* Grow the array. */
394 uint32_t cNew = RT_ALIGN(cid + 15, 16);
395 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
396 AssertReturn(pvNew, VERR_NO_MEMORY);
397 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
398 while (p3dState->cDXContexts < cNew)
399 {
400 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
401 AssertReturn(pDXContext, VERR_NO_MEMORY);
402 pDXContext->cid = SVGA3D_INVALID_ID;
403 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
404 }
405 }
406 /* If one already exists with this id, then destroy it now. */
407 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
408 vmsvga3dDXDestroyContext(pThisCC, cid);
409
410 pDXContext = p3dState->papDXContexts[cid];
411 memset(pDXContext, 0, sizeof(*pDXContext));
412
413 /* 0xFFFFFFFF (SVGA_ID_INVALID) is a better initial value than 0 for most of svgaDXContext fields. */
414 memset(&pDXContext->svgaDXContext, 0xFF, sizeof(pDXContext->svgaDXContext));
415 pDXContext->svgaDXContext.inputAssembly.topology = SVGA3D_PRIMITIVE_INVALID;
416 pDXContext->svgaDXContext.numViewports = 0;
417 pDXContext->svgaDXContext.numScissorRects = 0;
418 pDXContext->cid = cid;
419
420 /* Init the backend specific data. */
421 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
422
423 /* Cleanup on failure. */
424 if (RT_FAILURE(rc))
425 vmsvga3dDXDestroyContext(pThisCC, cid);
426
427 return rc;
428}
429
430
431int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
432{
433 int rc;
434 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
435 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
436 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
437 AssertReturn(p3dState, VERR_INVALID_STATE);
438
439 PVMSVGA3DDXCONTEXT pDXContext;
440 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
441 AssertRCReturn(rc, rc);
442
443 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
444
445 RT_ZERO(*pDXContext);
446 pDXContext->cid = SVGA3D_INVALID_ID;
447
448 return rc;
449}
450
451
452int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
453{
454 int rc;
455 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
456 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
457 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
458 AssertReturn(p3dState, VERR_INVALID_STATE);
459
460 PVMSVGA3DDXCONTEXT pDXContext;
461 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
462 AssertRCReturn(rc, rc);
463
464 if (pSvgaDXContext)
465 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
466
467 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
468 return rc;
469}
470
471
472int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGADXContextMobFormat *pSvgaDXContext)
473{
474 int rc;
475 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
476 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
477 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
478 AssertReturn(p3dState, VERR_INVALID_STATE);
479
480 PVMSVGA3DDXCONTEXT pDXContext;
481 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
482 AssertRCReturn(rc, rc);
483
484 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
485 if (RT_SUCCESS(rc))
486 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
487 return rc;
488}
489
490
491int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
492{
493 int rc;
494 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
495 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
496 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
497 AssertReturn(p3dState, VERR_INVALID_STATE);
498
499 PVMSVGA3DDXCONTEXT pDXContext;
500 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
501 AssertRCReturn(rc, rc);
502
503 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
504 return rc;
505}
506
507
508int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
509{
510 int rc;
511 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
512 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
513 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
514 AssertReturn(p3dState, VERR_INVALID_STATE);
515
516 PVMSVGA3DDXCONTEXT pDXContext;
517 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
518 AssertRCReturn(rc, rc);
519
520 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
521 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
522 RT_UNTRUSTED_VALIDATED_FENCE();
523
524 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
525 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[pCmd->slot];
526 pCBB->sid = pCmd->sid;
527 pCBB->offsetInBytes = pCmd->offsetInBytes;
528 pCBB->sizeInBytes = pCmd->sizeInBytes;
529
530 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
531 return rc;
532}
533
534
535int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
536{
537 int rc;
538 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
539 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
540 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
541 AssertReturn(p3dState, VERR_INVALID_STATE);
542
543 PVMSVGA3DDXCONTEXT pDXContext;
544 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
545 AssertRCReturn(rc, rc);
546
547 ASSERT_GUEST_RETURN(pCmd->startView < SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_PARAMETER);
548 ASSERT_GUEST_RETURN(cShaderResourceViewId <= SVGA3D_DX_MAX_SRVIEWS - pCmd->startView, VERR_INVALID_PARAMETER);
549 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
550 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
551 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
552 ASSERT_GUEST_RETURN( paShaderResourceViewId[i] < pDXContext->cot.cSRView
553 || paShaderResourceViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
554 RT_UNTRUSTED_VALIDATED_FENCE();
555
556 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
557 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
558 {
559 SVGA3dShaderResourceViewId const shaderResourceViewId = paShaderResourceViewId[i];
560 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[pCmd->startView + i] = shaderResourceViewId;
561 }
562
563 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext, pCmd->startView, pCmd->type, cShaderResourceViewId, paShaderResourceViewId);
564 return rc;
565}
566
567
568int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
569{
570 int rc;
571 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
572 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
573 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
574 AssertReturn(p3dState, VERR_INVALID_STATE);
575
576 PVMSVGA3DDXCONTEXT pDXContext;
577 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
578 AssertRCReturn(rc, rc);
579
580 ASSERT_GUEST_RETURN( pCmd->shaderId < pDXContext->cot.cShader
581 || pCmd->shaderId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
582 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
583 RT_UNTRUSTED_VALIDATED_FENCE();
584
585 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
586 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pCmd->shaderId;
587
588 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, pCmd->shaderId, pCmd->type);
589 return rc;
590}
591
592
593int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
594{
595 int rc;
596 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
597 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
598 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
599 AssertReturn(p3dState, VERR_INVALID_STATE);
600
601 PVMSVGA3DDXCONTEXT pDXContext;
602 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
603 AssertRCReturn(rc, rc);
604
605 ASSERT_GUEST_RETURN(pCmd->startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
606 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - pCmd->startSampler, VERR_INVALID_PARAMETER);
607 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
608 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
609 RT_UNTRUSTED_VALIDATED_FENCE();
610
611 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
612 for (uint32_t i = 0; i < cSamplerId; ++i)
613 {
614 SVGA3dSamplerId const samplerId = paSamplerId[i];
615 ASSERT_GUEST_RETURN( samplerId < pDXContext->cot.cSampler
616 || samplerId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
617 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[pCmd->startSampler + i] = samplerId;
618 }
619 RT_UNTRUSTED_VALIDATED_FENCE();
620
621 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
622 return rc;
623}
624
625
626#ifdef DUMP_BITMAPS
627static void vmsvga3dDXDrawDumpRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
628{
629 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
630 {
631 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] != SVGA3D_INVALID_ID)
632 {
633 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[i]];
634 Log(("Dump RT[%u] sid = %u rtvid = %u\n", i, pRTViewEntry->sid, pDXContext->svgaDXContext.renderState.renderTargetViewIds[i]));
635
636 SVGA3dSurfaceImageId image;
637 image.sid = pRTViewEntry->sid;
638 image.face = 0;
639 image.mipmap = 0;
640 VMSVGA3D_MAPPED_SURFACE map;
641 int rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
642 if (RT_SUCCESS(rc))
643 {
644 vmsvga3dMapWriteBmpFile(&map, "rt-");
645 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
646 }
647 else
648 Log(("Map failed %Rrc\n", rc));
649 }
650 }
651}
652#endif
653
654int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
655{
656 int rc;
657 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
658 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
659 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
660 AssertReturn(p3dState, VERR_INVALID_STATE);
661
662 PVMSVGA3DDXCONTEXT pDXContext;
663 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
664 AssertRCReturn(rc, rc);
665
666 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
667#ifdef DUMP_BITMAPS
668 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
669#endif
670 return rc;
671}
672
673
674int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
675{
676 int rc;
677 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
678 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
679 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
680 AssertReturn(p3dState, VERR_INVALID_STATE);
681
682 PVMSVGA3DDXCONTEXT pDXContext;
683 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
684 AssertRCReturn(rc, rc);
685
686 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
687#ifdef DUMP_BITMAPS
688 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
689#endif
690 return rc;
691}
692
693
694int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd)
695{
696 int rc;
697 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
698 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
699 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
700 AssertReturn(p3dState, VERR_INVALID_STATE);
701
702 PVMSVGA3DDXCONTEXT pDXContext;
703 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
704 AssertRCReturn(rc, rc);
705
706 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext,
707 pCmd->vertexCountPerInstance, pCmd->instanceCount, pCmd->startVertexLocation, pCmd->startInstanceLocation);
708#ifdef DUMP_BITMAPS
709 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
710#endif
711 return rc;
712}
713
714
715int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd)
716{
717 int rc;
718 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
719 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
720 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
721 AssertReturn(p3dState, VERR_INVALID_STATE);
722
723 PVMSVGA3DDXCONTEXT pDXContext;
724 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
725 AssertRCReturn(rc, rc);
726
727 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext,
728 pCmd->indexCountPerInstance, pCmd->instanceCount, pCmd->startIndexLocation, pCmd->baseVertexLocation, pCmd->startInstanceLocation);
729#ifdef DUMP_BITMAPS
730 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
731#endif
732 return rc;
733}
734
735
736int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
737{
738 int rc;
739 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
740 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
741 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
742 AssertReturn(p3dState, VERR_INVALID_STATE);
743
744 PVMSVGA3DDXCONTEXT pDXContext;
745 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
746 AssertRCReturn(rc, rc);
747
748 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
749#ifdef DUMP_BITMAPS
750 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
751#endif
752 return rc;
753}
754
755
756int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
757{
758 int rc;
759 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
760 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
761 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
762 AssertReturn(p3dState, VERR_INVALID_STATE);
763
764 PVMSVGA3DDXCONTEXT pDXContext;
765 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
766 AssertRCReturn(rc, rc);
767
768 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
769 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
770 RT_UNTRUSTED_VALIDATED_FENCE();
771
772 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
773
774 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
775 return rc;
776}
777
778
779int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
780{
781 int rc;
782 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
783 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
784 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
785 AssertReturn(p3dState, VERR_INVALID_STATE);
786
787 PVMSVGA3DDXCONTEXT pDXContext;
788 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
789 AssertRCReturn(rc, rc);
790
791 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
792 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
793 RT_UNTRUSTED_VALIDATED_FENCE();
794
795 for (uint32_t i = 0; i < cVertexBuffer; ++i)
796 {
797 uint32_t const idxVertexBuffer = startBuffer + i;
798
799 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
800 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
801 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
802 }
803
804 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
805 return rc;
806}
807
808
809int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
810{
811 int rc;
812 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
813 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
814 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
815 AssertReturn(p3dState, VERR_INVALID_STATE);
816
817 PVMSVGA3DDXCONTEXT pDXContext;
818 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
819 AssertRCReturn(rc, rc);
820
821 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = pCmd->sid;
822 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = pCmd->offset;
823 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = pCmd->format;
824
825 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
826 return rc;
827}
828
829
830int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
831{
832 int rc;
833 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
834 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
835 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
836 AssertReturn(p3dState, VERR_INVALID_STATE);
837
838 PVMSVGA3DDXCONTEXT pDXContext;
839 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
840 AssertRCReturn(rc, rc);
841
842 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
843
844 pDXContext->svgaDXContext.inputAssembly.topology = topology;
845
846 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
847 return rc;
848}
849
850
851int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
852{
853 int rc;
854 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
855 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
856 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
857 AssertReturn(p3dState, VERR_INVALID_STATE);
858
859 PVMSVGA3DDXCONTEXT pDXContext;
860 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
861 AssertRCReturn(rc, rc);
862
863 ASSERT_GUEST_RETURN( depthStencilViewId < pDXContext->cot.cDSView
864 || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
865 ASSERT_GUEST_RETURN(cRenderTargetViewId <= SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
866 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
867 ASSERT_GUEST_RETURN( paRenderTargetViewId[i] < pDXContext->cot.cRTView
868 || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
869 RT_UNTRUSTED_VALIDATED_FENCE();
870
871 pDXContext->svgaDXContext.renderState.depthStencilViewId = depthStencilViewId;
872 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
873 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = paRenderTargetViewId[i];
874
875 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
876 return rc;
877}
878
879
880int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
881{
882 int rc;
883 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
884 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
885 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
886 AssertReturn(p3dState, VERR_INVALID_STATE);
887
888 PVMSVGA3DDXCONTEXT pDXContext;
889 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
890 AssertRCReturn(rc, rc);
891
892 SVGA3dBlendStateId const blendId = pCmd->blendId;
893
894 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
895 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
896 RT_UNTRUSTED_VALIDATED_FENCE();
897
898 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
899 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
900 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, pCmd->blendFactor, sizeof(pDXContext->svgaDXContext.renderState.blendFactor));
901 pDXContext->svgaDXContext.renderState.sampleMask = pCmd->sampleMask;
902
903 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
904 return rc;
905}
906
907
908int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
909{
910 int rc;
911 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
912 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
913 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
914 AssertReturn(p3dState, VERR_INVALID_STATE);
915
916 PVMSVGA3DDXCONTEXT pDXContext;
917 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
918 AssertRCReturn(rc, rc);
919
920 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
921
922 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
923 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
924 RT_UNTRUSTED_VALIDATED_FENCE();
925
926 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
927 pDXContext->svgaDXContext.renderState.stencilRef = pCmd->stencilRef;
928
929 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
930 return rc;
931}
932
933
934int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
935{
936 int rc;
937 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
938 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
939 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
940 AssertReturn(p3dState, VERR_INVALID_STATE);
941
942 PVMSVGA3DDXCONTEXT pDXContext;
943 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
944 AssertRCReturn(rc, rc);
945
946 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
947 RT_UNTRUSTED_VALIDATED_FENCE();
948
949 pDXContext->svgaDXContext.renderState.rasterizerStateId = rasterizerId;
950
951 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
952 return rc;
953}
954
955
956int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineQuery const *pCmd)
957{
958 int rc;
959 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
960 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
961 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
962 AssertReturn(p3dState, VERR_INVALID_STATE);
963
964 PVMSVGA3DDXCONTEXT pDXContext;
965 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
966 AssertRCReturn(rc, rc);
967
968 SVGA3dQueryId const queryId = pCmd->queryId;
969
970 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
971 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
972 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_QUERYTYPE_MIN && pCmd->type < SVGA3D_QUERYTYPE_MAX, VERR_INVALID_PARAMETER);
973 RT_UNTRUSTED_VALIDATED_FENCE();
974
975 /* Cleanup the current query. */
976 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext, queryId);
977
978 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
979 pEntry->type = pCmd->type;
980 pEntry->state = SVGADX_QDSTATE_IDLE;
981 pEntry->flags = pCmd->flags;
982 pEntry->mobid = SVGA_ID_INVALID;
983 pEntry->offset = 0;
984
985 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext, queryId, pEntry);
986 return rc;
987}
988
989
990int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyQuery const *pCmd)
991{
992 int rc;
993 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
994 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
995 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
996 AssertReturn(p3dState, VERR_INVALID_STATE);
997
998 PVMSVGA3DDXCONTEXT pDXContext;
999 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1000 AssertRCReturn(rc, rc);
1001
1002 SVGA3dQueryId const queryId = pCmd->queryId;
1003
1004 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1005 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1006 RT_UNTRUSTED_VALIDATED_FENCE();
1007
1008 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext, queryId);
1009
1010 /* Cleanup COTable entry.*/
1011 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1012 pEntry->type = SVGA3D_QUERYTYPE_INVALID;
1013 pEntry->state = SVGADX_QDSTATE_INVALID;
1014 pEntry->flags = 0;
1015 pEntry->mobid = SVGA_ID_INVALID;
1016 pEntry->offset = 0;
1017
1018 return rc;
1019}
1020
1021
1022int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindQuery const *pCmd, PVMSVGAMOB pMob)
1023{
1024 int rc;
1025 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1026 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindQuery, VERR_INVALID_STATE);
1027 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1028 AssertReturn(p3dState, VERR_INVALID_STATE);
1029
1030 PVMSVGA3DDXCONTEXT pDXContext;
1031 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1032 AssertRCReturn(rc, rc);
1033
1034 SVGA3dQueryId const queryId = pCmd->queryId;
1035
1036 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1037 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1038 RT_UNTRUSTED_VALIDATED_FENCE();
1039
1040 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1041 pEntry->mobid = vmsvgaR3MobId(pMob);
1042
1043 rc = pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC, pDXContext, queryId);
1044 return rc;
1045}
1046
1047
1048int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetQueryOffset const *pCmd)
1049{
1050 int rc;
1051 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1052 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1053 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1054 AssertReturn(p3dState, VERR_INVALID_STATE);
1055
1056 PVMSVGA3DDXCONTEXT pDXContext;
1057 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1058 AssertRCReturn(rc, rc);
1059
1060 SVGA3dQueryId const queryId = pCmd->queryId;
1061
1062 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1063 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1064 RT_UNTRUSTED_VALIDATED_FENCE();
1065
1066 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1067 pEntry->offset = pCmd->mobOffset;
1068
1069 return rc;
1070}
1071
1072
1073int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBeginQuery const *pCmd)
1074{
1075 int rc;
1076 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1077 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
1078 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1079 AssertReturn(p3dState, VERR_INVALID_STATE);
1080
1081 PVMSVGA3DDXCONTEXT pDXContext;
1082 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1083 AssertRCReturn(rc, rc);
1084
1085 SVGA3dQueryId const queryId = pCmd->queryId;
1086
1087 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1088 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1089 RT_UNTRUSTED_VALIDATED_FENCE();
1090
1091 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1092 Assert(pEntry->state == SVGADX_QDSTATE_IDLE || pEntry->state == SVGADX_QDSTATE_PENDING || pEntry->state == SVGADX_QDSTATE_FINISHED);
1093 if (pEntry->state != SVGADX_QDSTATE_ACTIVE)
1094 {
1095 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext, queryId);
1096 if (RT_SUCCESS(rc))
1097 pEntry->state = SVGADX_QDSTATE_ACTIVE;
1098 }
1099 return rc;
1100}
1101
1102
1103int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXEndQuery const *pCmd)
1104{
1105 int rc;
1106 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1107 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
1108 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1109 AssertReturn(p3dState, VERR_INVALID_STATE);
1110
1111 PVMSVGA3DDXCONTEXT pDXContext;
1112 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1113 AssertRCReturn(rc, rc);
1114
1115 SVGA3dQueryId const queryId = pCmd->queryId;
1116
1117 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1118 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1119 RT_UNTRUSTED_VALIDATED_FENCE();
1120
1121 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1122 Assert(pEntry->state == SVGADX_QDSTATE_ACTIVE);
1123 if (pEntry->state == SVGADX_QDSTATE_ACTIVE)
1124 {
1125 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext, queryId);
1126 if (RT_SUCCESS(rc))
1127 pEntry->state = SVGADX_QDSTATE_PENDING;
1128 }
1129
1130 return rc;
1131}
1132
1133
1134int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackQuery const *pCmd)
1135{
1136 int rc;
1137 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1138 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackQuery, VERR_INVALID_STATE);
1139 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1140 AssertReturn(p3dState, VERR_INVALID_STATE);
1141
1142 PVMSVGA3DDXCONTEXT pDXContext;
1143 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1144 AssertRCReturn(rc, rc);
1145
1146 SVGA3dQueryId const queryId = pCmd->queryId;
1147
1148 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1149 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1150 RT_UNTRUSTED_VALIDATED_FENCE();
1151
1152 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1153 Assert(pEntry->state == SVGADX_QDSTATE_PENDING);
1154
1155 rc = dxReadbackQuery(pThisCC, pDXContext, queryId, pEntry);
1156 return rc;
1157}
1158
1159
1160int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext)
1161{
1162 int rc;
1163 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1164 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
1165 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1166 AssertReturn(p3dState, VERR_INVALID_STATE);
1167
1168 PVMSVGA3DDXCONTEXT pDXContext;
1169 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1170 AssertRCReturn(rc, rc);
1171
1172 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext);
1173 return rc;
1174}
1175
1176
1177int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cSoTarget, SVGA3dSoTarget const *paSoTarget)
1178{
1179 int rc;
1180 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1181 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
1182 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1183 AssertReturn(p3dState, VERR_INVALID_STATE);
1184
1185 PVMSVGA3DDXCONTEXT pDXContext;
1186 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1187 AssertRCReturn(rc, rc);
1188
1189 ASSERT_GUEST_RETURN(cSoTarget < SVGA3D_DX_MAX_SOTARGETS, VERR_INVALID_PARAMETER);
1190 RT_UNTRUSTED_VALIDATED_FENCE();
1191
1192 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere? */
1193 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
1194 pDXContext->svgaDXContext.streamOut.targets[i] = i < cSoTarget ? paSoTarget[i].sid : SVGA3D_INVALID_ID;
1195
1196 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, paSoTarget);
1197 return rc;
1198}
1199
1200
1201int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
1202{
1203 int rc;
1204 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1205 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
1206 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1207 AssertReturn(p3dState, VERR_INVALID_STATE);
1208
1209 PVMSVGA3DDXCONTEXT pDXContext;
1210 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1211 AssertRCReturn(rc, rc);
1212
1213 ASSERT_GUEST_RETURN(cViewport <= SVGA3D_DX_MAX_VIEWPORTS, VERR_INVALID_PARAMETER);
1214 RT_UNTRUSTED_VALIDATED_FENCE();
1215
1216 pDXContext->svgaDXContext.numViewports = (uint8_t)cViewport;
1217 for (uint32_t i = 0; i < cViewport; ++i)
1218 pDXContext->svgaDXContext.viewports[i] = paViewport[i];
1219
1220 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
1221 return rc;
1222}
1223
1224
1225int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
1226{
1227 int rc;
1228 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1229 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
1230 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1231 AssertReturn(p3dState, VERR_INVALID_STATE);
1232
1233 PVMSVGA3DDXCONTEXT pDXContext;
1234 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1235 AssertRCReturn(rc, rc);
1236
1237 ASSERT_GUEST_RETURN(cRect <= SVGA3D_DX_MAX_SCISSORRECTS, VERR_INVALID_PARAMETER);
1238 RT_UNTRUSTED_VALIDATED_FENCE();
1239
1240 pDXContext->svgaDXContext.numScissorRects = (uint8_t)cRect;
1241 for (uint32_t i = 0; i < cRect; ++i)
1242 pDXContext->svgaDXContext.scissorRects[i] = paRect[i];
1243
1244 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
1245 return rc;
1246}
1247
1248
1249int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd)
1250{
1251 int rc;
1252 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1253 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
1254 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1255 AssertReturn(p3dState, VERR_INVALID_STATE);
1256
1257 PVMSVGA3DDXCONTEXT pDXContext;
1258 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1259 AssertRCReturn(rc, rc);
1260
1261 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1262
1263 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1264 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1265 RT_UNTRUSTED_VALIDATED_FENCE();
1266
1267 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pCmd->rgba);
1268 return rc;
1269}
1270
1271
1272int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd)
1273{
1274 int rc;
1275 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1276 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
1277 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1278 AssertReturn(p3dState, VERR_INVALID_STATE);
1279
1280 PVMSVGA3DDXCONTEXT pDXContext;
1281 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1282 AssertRCReturn(rc, rc);
1283
1284 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1285
1286 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1287 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1288 RT_UNTRUSTED_VALIDATED_FENCE();
1289
1290 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext, pCmd->flags, depthStencilViewId, pCmd->depth, (uint8_t)pCmd->stencil);
1291 return rc;
1292}
1293
1294
1295int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd)
1296{
1297 int rc;
1298 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1299 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
1300 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1301 AssertReturn(p3dState, VERR_INVALID_STATE);
1302
1303 PVMSVGA3DDXCONTEXT pDXContext;
1304 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1305 AssertRCReturn(rc, rc);
1306
1307 /** @todo Memcpy if both resources do not have the hardware resource. */
1308
1309 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext, pCmd->dstSid, pCmd->dstSubResource, pCmd->srcSid, pCmd->srcSubResource, &pCmd->box);
1310 return rc;
1311}
1312
1313
1314int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1315{
1316 int rc;
1317 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1318 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
1319 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1320 AssertReturn(p3dState, VERR_INVALID_STATE);
1321
1322 PVMSVGA3DDXCONTEXT pDXContext;
1323 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1324 AssertRCReturn(rc, rc);
1325
1326 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext);
1327 return rc;
1328}
1329
1330
1331int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
1332{
1333 int rc;
1334 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1335 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
1336 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1337 AssertReturn(p3dState, VERR_INVALID_STATE);
1338
1339 PVMSVGA3DDXCONTEXT pDXContext;
1340 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1341 AssertRCReturn(rc, rc);
1342
1343 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext);
1344 return rc;
1345}
1346
1347
1348int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd)
1349{
1350 int rc;
1351 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1352 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
1353 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1354 AssertReturn(p3dState, VERR_INVALID_STATE);
1355
1356 PVMSVGA3DDXCONTEXT pDXContext;
1357 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1358 AssertRCReturn(rc, rc);
1359
1360 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1361
1362 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1363 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1364 RT_UNTRUSTED_VALIDATED_FENCE();
1365
1366 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext, shaderResourceViewId);
1367 return rc;
1368}
1369
1370
1371int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
1372{
1373 int rc;
1374 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1375 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
1376 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1377 AssertReturn(p3dState, VERR_INVALID_STATE);
1378
1379 PVMSVGA3DDXCONTEXT pDXContext;
1380 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1381 AssertRCReturn(rc, rc);
1382
1383 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1384
1385 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1386 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1387 RT_UNTRUSTED_VALIDATED_FENCE();
1388
1389 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1390 pEntry->sid = pCmd->sid;
1391 pEntry->format = pCmd->format;
1392 pEntry->resourceDimension = pCmd->resourceDimension;
1393 pEntry->desc = pCmd->desc;
1394
1395 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
1396 return rc;
1397}
1398
1399
1400int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
1401{
1402 int rc;
1403 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1404 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
1405 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1406 AssertReturn(p3dState, VERR_INVALID_STATE);
1407
1408 PVMSVGA3DDXCONTEXT pDXContext;
1409 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1410 AssertRCReturn(rc, rc);
1411
1412 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1413
1414 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1415 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1416 RT_UNTRUSTED_VALIDATED_FENCE();
1417
1418 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1419 RT_ZERO(*pEntry);
1420
1421 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext, shaderResourceViewId);
1422 return rc;
1423}
1424
1425
1426int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
1427{
1428 int rc;
1429 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1430 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
1431 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1432 AssertReturn(p3dState, VERR_INVALID_STATE);
1433
1434 PVMSVGA3DDXCONTEXT pDXContext;
1435 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1436 AssertRCReturn(rc, rc);
1437
1438 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1439
1440 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1441 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1442 RT_UNTRUSTED_VALIDATED_FENCE();
1443
1444 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1445 pEntry->sid = pCmd->sid;
1446 pEntry->format = pCmd->format;
1447 pEntry->resourceDimension = pCmd->resourceDimension;
1448 pEntry->desc = pCmd->desc;
1449
1450 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
1451 return rc;
1452}
1453
1454
1455int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
1456{
1457 int rc;
1458 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1459 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
1460 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1461 AssertReturn(p3dState, VERR_INVALID_STATE);
1462
1463 PVMSVGA3DDXCONTEXT pDXContext;
1464 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1465 AssertRCReturn(rc, rc);
1466
1467 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1468
1469 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1470 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1471 RT_UNTRUSTED_VALIDATED_FENCE();
1472
1473 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1474 RT_ZERO(*pEntry);
1475
1476 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
1477 {
1478 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] == renderTargetViewId)
1479 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = SVGA_ID_INVALID;
1480 }
1481
1482 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext, renderTargetViewId);
1483 return rc;
1484}
1485
1486
1487int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
1488{
1489 int rc;
1490 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1491 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
1492 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1493 AssertReturn(p3dState, VERR_INVALID_STATE);
1494
1495 PVMSVGA3DDXCONTEXT pDXContext;
1496 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1497 AssertRCReturn(rc, rc);
1498
1499 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1500
1501 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1502 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1503 RT_UNTRUSTED_VALIDATED_FENCE();
1504
1505 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1506 pEntry->sid = pCmd->sid;
1507 pEntry->format = pCmd->format;
1508 pEntry->resourceDimension = pCmd->resourceDimension;
1509 pEntry->mipSlice = pCmd->mipSlice;
1510 pEntry->firstArraySlice = pCmd->firstArraySlice;
1511 pEntry->arraySize = pCmd->arraySize;
1512 pEntry->flags = pCmd->flags;
1513
1514 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
1515 return rc;
1516}
1517
1518
1519int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
1520{
1521 int rc;
1522 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1523 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
1524 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1525 AssertReturn(p3dState, VERR_INVALID_STATE);
1526
1527 PVMSVGA3DDXCONTEXT pDXContext;
1528 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1529 AssertRCReturn(rc, rc);
1530
1531 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1532
1533 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1534 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1535 RT_UNTRUSTED_VALIDATED_FENCE();
1536
1537 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1538 RT_ZERO(*pEntry);
1539
1540 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext, depthStencilViewId);
1541 return rc;
1542}
1543
1544
1545int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
1546{
1547 int rc;
1548 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1549 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
1550 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1551 AssertReturn(p3dState, VERR_INVALID_STATE);
1552
1553 PVMSVGA3DDXCONTEXT pDXContext;
1554 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1555 AssertRCReturn(rc, rc);
1556
1557 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1558 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1559 RT_UNTRUSTED_VALIDATED_FENCE();
1560
1561 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1562 pEntry->elid = elementLayoutId;
1563 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1564 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1565
1566#ifdef LOG_ENABLED
1567 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1568 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1569 {
1570 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1571 i,
1572 pEntry->descs[i].inputSlot,
1573 pEntry->descs[i].alignedByteOffset,
1574 pEntry->descs[i].format,
1575 pEntry->descs[i].inputSlotClass,
1576 pEntry->descs[i].instanceDataStepRate,
1577 pEntry->descs[i].inputRegister
1578 ));
1579 }
1580#endif
1581
1582 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1583 return rc;
1584}
1585
1586
1587int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyElementLayout const *pCmd)
1588{
1589 int rc;
1590 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1591 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1592 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1593 AssertReturn(p3dState, VERR_INVALID_STATE);
1594
1595 PVMSVGA3DDXCONTEXT pDXContext;
1596 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1597 AssertRCReturn(rc, rc);
1598
1599 SVGA3dElementLayoutId const elementLayoutId = pCmd->elementLayoutId;
1600
1601 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1602 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1603 RT_UNTRUSTED_VALIDATED_FENCE();
1604
1605 pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext, elementLayoutId);
1606
1607 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1608 RT_ZERO(*pEntry);
1609 pEntry->elid = SVGA3D_INVALID_ID;
1610
1611 return rc;
1612}
1613
1614
1615int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1616{
1617 int rc;
1618 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1619 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1620 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1621 AssertReturn(p3dState, VERR_INVALID_STATE);
1622
1623 PVMSVGA3DDXCONTEXT pDXContext;
1624 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1625 AssertRCReturn(rc, rc);
1626
1627 SVGA3dBlendStateId const blendId = pCmd->blendId;
1628
1629 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1630 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1631 RT_UNTRUSTED_VALIDATED_FENCE();
1632
1633 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1634 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1635 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1636 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1637
1638 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1639 return rc;
1640}
1641
1642
1643int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyBlendState const *pCmd)
1644{
1645 int rc;
1646 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1647 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1648 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1649 AssertReturn(p3dState, VERR_INVALID_STATE);
1650
1651 PVMSVGA3DDXCONTEXT pDXContext;
1652 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1653 AssertRCReturn(rc, rc);
1654
1655 SVGA3dBlendStateId const blendId = pCmd->blendId;
1656
1657 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1658 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1659 RT_UNTRUSTED_VALIDATED_FENCE();
1660
1661 pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext, blendId);
1662
1663 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1664 RT_ZERO(*pEntry);
1665
1666 return rc;
1667}
1668
1669
1670int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1671{
1672 int rc;
1673 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1674 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1675 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1676 AssertReturn(p3dState, VERR_INVALID_STATE);
1677
1678 PVMSVGA3DDXCONTEXT pDXContext;
1679 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1680 AssertRCReturn(rc, rc);
1681
1682 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1683
1684 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1685 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1686 RT_UNTRUSTED_VALIDATED_FENCE();
1687
1688 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1689 pEntry->depthEnable = pCmd->depthEnable;
1690 pEntry->depthWriteMask = pCmd->depthWriteMask;
1691 pEntry->depthFunc = pCmd->depthFunc;
1692 pEntry->stencilEnable = pCmd->stencilEnable;
1693 pEntry->frontEnable = pCmd->frontEnable;
1694 pEntry->backEnable = pCmd->backEnable;
1695 pEntry->stencilReadMask = pCmd->stencilReadMask;
1696 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1697
1698 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1699 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1700 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1701 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1702
1703 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1704 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1705 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1706 pEntry->backStencilFunc = pCmd->backStencilFunc;
1707
1708 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1709 return rc;
1710}
1711
1712
1713int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilState const *pCmd)
1714{
1715 int rc;
1716 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1717 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1718 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1719 AssertReturn(p3dState, VERR_INVALID_STATE);
1720
1721 PVMSVGA3DDXCONTEXT pDXContext;
1722 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1723 AssertRCReturn(rc, rc);
1724
1725 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1726
1727 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1728 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1729 RT_UNTRUSTED_VALIDATED_FENCE();
1730
1731 pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext, depthStencilId);
1732
1733 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1734 RT_ZERO(*pEntry);
1735
1736 return rc;
1737}
1738
1739
1740int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1741{
1742 int rc;
1743 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1744 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1745 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1746 AssertReturn(p3dState, VERR_INVALID_STATE);
1747
1748 PVMSVGA3DDXCONTEXT pDXContext;
1749 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1750 AssertRCReturn(rc, rc);
1751
1752 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1753
1754 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1755 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1756 RT_UNTRUSTED_VALIDATED_FENCE();
1757
1758 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1759 pEntry->fillMode = pCmd->fillMode;
1760 pEntry->cullMode = pCmd->cullMode;
1761 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1762 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1763 pEntry->depthBias = pCmd->depthBias;
1764 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1765 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1766 pEntry->depthClipEnable = pCmd->depthClipEnable;
1767 pEntry->scissorEnable = pCmd->scissorEnable;
1768 pEntry->multisampleEnable = pCmd->multisampleEnable;
1769 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1770 pEntry->lineWidth = pCmd->lineWidth;
1771 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1772 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1773 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1774 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1775 RT_ZERO(pEntry->mustBeZero);
1776
1777 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1778 return rc;
1779}
1780
1781
1782int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRasterizerState const *pCmd)
1783{
1784 int rc;
1785 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1786 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1787 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1788 AssertReturn(p3dState, VERR_INVALID_STATE);
1789
1790 PVMSVGA3DDXCONTEXT pDXContext;
1791 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1792 AssertRCReturn(rc, rc);
1793
1794 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1795
1796 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1797 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1798 RT_UNTRUSTED_VALIDATED_FENCE();
1799
1800 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext, rasterizerId);
1801
1802 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1803 RT_ZERO(*pEntry);
1804
1805 return rc;
1806}
1807
1808
1809int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1810{
1811 int rc;
1812 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1813 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1814 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1815 AssertReturn(p3dState, VERR_INVALID_STATE);
1816
1817 PVMSVGA3DDXCONTEXT pDXContext;
1818 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1819 AssertRCReturn(rc, rc);
1820
1821 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1822
1823 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1824 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1825 RT_UNTRUSTED_VALIDATED_FENCE();
1826
1827 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1828 pEntry->filter = pCmd->filter;
1829 pEntry->addressU = pCmd->addressU;
1830 pEntry->addressV = pCmd->addressV;
1831 pEntry->addressW = pCmd->addressW;
1832 pEntry->mipLODBias = pCmd->mipLODBias;
1833 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1834 pEntry->comparisonFunc = pCmd->comparisonFunc;
1835 pEntry->borderColor = pCmd->borderColor;
1836 pEntry->minLOD = pCmd->minLOD;
1837 pEntry->maxLOD = pCmd->maxLOD;
1838
1839 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1840 return rc;
1841}
1842
1843
1844int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroySamplerState const *pCmd)
1845{
1846 int rc;
1847 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1848 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1849 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1850 AssertReturn(p3dState, VERR_INVALID_STATE);
1851
1852 PVMSVGA3DDXCONTEXT pDXContext;
1853 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1854 AssertRCReturn(rc, rc);
1855
1856 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1857
1858 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1859 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1860 RT_UNTRUSTED_VALIDATED_FENCE();
1861
1862 pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext, samplerId);
1863
1864 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1865 RT_ZERO(*pEntry);
1866
1867 return rc;
1868}
1869
1870
1871int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1872{
1873 int rc;
1874 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1875 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1876 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1877 AssertReturn(p3dState, VERR_INVALID_STATE);
1878
1879 PVMSVGA3DDXCONTEXT pDXContext;
1880 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1881 AssertRCReturn(rc, rc);
1882
1883 SVGA3dShaderId const shaderId = pCmd->shaderId;
1884
1885 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1886 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1887 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1888 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1889 RT_UNTRUSTED_VALIDATED_FENCE();
1890
1891 /* Cleanup the current shader. */
1892 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1893
1894 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1895 pEntry->type = pCmd->type;
1896 pEntry->sizeInBytes = pCmd->sizeInBytes;
1897 pEntry->offsetInBytes = 0;
1898 pEntry->mobid = SVGA_ID_INVALID;
1899
1900 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, shaderId, pEntry);
1901 return rc;
1902}
1903
1904
1905int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd)
1906{
1907 int rc;
1908 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1909 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1910 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1911 AssertReturn(p3dState, VERR_INVALID_STATE);
1912
1913 PVMSVGA3DDXCONTEXT pDXContext;
1914 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1915 AssertRCReturn(rc, rc);
1916
1917 SVGA3dShaderId const shaderId = pCmd->shaderId;
1918
1919 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1920 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1921 RT_UNTRUSTED_VALIDATED_FENCE();
1922
1923 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1924
1925 /* Cleanup COTable entries.*/
1926 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1927 pEntry->type = SVGA3D_SHADERTYPE_INVALID;
1928 pEntry->sizeInBytes = 0;
1929 pEntry->offsetInBytes = 0;
1930 pEntry->mobid = SVGA_ID_INVALID;
1931
1932 /** @todo Destroy shaders on context and backend deletion. */
1933 return rc;
1934}
1935
1936
1937static int dxBindShader(DXShaderInfo *pShaderInfo, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1938{
1939 /* How many bytes the MOB can hold. */
1940 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1941 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1942 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
1943
1944 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, pShaderInfo);
1945 if (RT_SUCCESS(rc))
1946 {
1947 /* Get the length of the shader bytecode. */
1948 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
1949 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
1950 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
1951
1952 /* Check if the MOB contains SVGA3dDXSignatureHeader and signature entries.
1953 * If they are not there (Linux guest driver does not provide them), then it is fine
1954 * and the signatures generated by DXShaderParse will be used.
1955 */
1956 uint32_t const cbSignaturesMax = cbMob - cToken * 4; /* How many bytes for signatures are available. */
1957 if (cbSignaturesMax > sizeof(SVGA3dDXSignatureHeader))
1958 {
1959 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + cToken * 4);
1960 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
1961 {
1962 DEBUG_BREAKPOINT_TEST();
1963 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShaderInfo->aInputSignature)
1964 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShaderInfo->aOutputSignature)
1965 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShaderInfo->aPatchConstantSignature),
1966 VERR_INVALID_PARAMETER);
1967
1968 uint32_t const cSignature = pSignatureHeader->numInputSignatures
1969 + pSignatureHeader->numOutputSignatures
1970 + pSignatureHeader->numPatchConstantSignatures;
1971 ASSERT_GUEST_RETURN( cbSignaturesMax - sizeof(SVGA3dDXSignatureHeader)
1972 > cSignature * sizeof(sizeof(SVGA3dDXSignatureEntry)), VERR_INVALID_PARAMETER);
1973
1974 /* Copy to DXShaderInfo. */
1975 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
1976 pShaderInfo->cInputSignature = pSignatureHeader->numInputSignatures;
1977 memcpy(pShaderInfo->aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
1978
1979 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
1980 pShaderInfo->cOutputSignature = pSignatureHeader->numOutputSignatures;
1981 memcpy(pShaderInfo->aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
1982
1983 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
1984 pShaderInfo->cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
1985 memcpy(pShaderInfo->aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
1986 }
1987 }
1988 }
1989
1990 return rc;
1991}
1992
1993
1994int vmsvga3dDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd, PVMSVGAMOB pMob)
1995{
1996 int rc;
1997 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1998 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
1999 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2000 AssertReturn(p3dState, VERR_INVALID_STATE);
2001
2002 PVMSVGA3DDXCONTEXT pDXContext;
2003 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2004 AssertRCReturn(rc, rc);
2005
2006 ASSERT_GUEST_RETURN(pCmd->shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
2007 RT_UNTRUSTED_VALIDATED_FENCE();
2008
2009 /* 'type' and 'sizeInBytes' has been already initialized by DefineShader. */
2010 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shid];
2011 //pEntry->type;
2012 //pEntry->sizeInBytes;
2013 pEntry->offsetInBytes = pCmd->offsetInBytes;
2014 pEntry->mobid = vmsvgaR3MobId(pMob);
2015
2016 if (pMob)
2017 {
2018 /* Bind a mob to the shader. */
2019
2020 /* Create a memory pointer for the MOB, which is accessible by host. */
2021 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
2022 if (RT_SUCCESS(rc))
2023 {
2024 /* Get pointer to the shader bytecode. This will also verify the offset. */
2025 void const *pvShaderBytecode = vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
2026 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
2027
2028 /* Get the shader and optional signatures from the MOB. */
2029 DXShaderInfo shaderInfo;
2030 RT_ZERO(shaderInfo);
2031 rc = dxBindShader(&shaderInfo, pMob, pEntry, pvShaderBytecode);
2032 if (RT_SUCCESS(rc))
2033 {
2034 /* pfnDXBindShader makes a copy of shaderInfo on success. */
2035 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pCmd->shid, &shaderInfo);
2036 }
2037 AssertRC(rc);
2038
2039 /** @todo Backing store is not needed anymore in any case? */
2040 if (RT_FAILURE(rc))
2041 {
2042 DXShaderFree(&shaderInfo);
2043
2044 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2045 }
2046 }
2047 }
2048 else
2049 {
2050 /* Unbind. */
2051 /** @todo Nothing to do here but release the MOB? */
2052 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2053 }
2054
2055 return rc;
2056}
2057
2058
2059int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd)
2060{
2061 int rc;
2062 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2063 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
2064 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2065 AssertReturn(p3dState, VERR_INVALID_STATE);
2066
2067 PVMSVGA3DDXCONTEXT pDXContext;
2068 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2069 AssertRCReturn(rc, rc);
2070
2071 SVGA3dStreamOutputId const soid = pCmd->soid;
2072
2073 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2074 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2075 ASSERT_GUEST_RETURN(pCmd->numOutputStreamEntries < SVGA3D_MAX_DX10_STREAMOUT_DECLS, VERR_INVALID_PARAMETER);
2076 RT_UNTRUSTED_VALIDATED_FENCE();
2077
2078 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
2079 pEntry->numOutputStreamEntries = pCmd->numOutputStreamEntries;
2080 memcpy(pEntry->decl, pCmd->decl, sizeof(pEntry->decl));
2081 memcpy(pEntry->streamOutputStrideInBytes, pCmd->streamOutputStrideInBytes, sizeof(pEntry->streamOutputStrideInBytes));
2082 pEntry->rasterizedStream = 0; // Apparently invalid in this command: pCmd->rasterizedStream;
2083 pEntry->numOutputStreamStrides = 0;
2084 pEntry->mobid = SVGA_ID_INVALID;
2085 pEntry->offsetInBytes = 0;
2086 pEntry->usesMob = 0;
2087 pEntry->pad0 = 0;
2088 pEntry->pad1 = 0;
2089 RT_ZERO(pEntry->pad2);
2090
2091 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext, soid, pEntry);
2092 return rc;
2093}
2094
2095
2096int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd)
2097{
2098 int rc;
2099 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2100 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
2101 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2102 AssertReturn(p3dState, VERR_INVALID_STATE);
2103
2104 PVMSVGA3DDXCONTEXT pDXContext;
2105 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2106 AssertRCReturn(rc, rc);
2107
2108 SVGA3dStreamOutputId const soid = pCmd->soid;
2109
2110 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2111 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2112 RT_UNTRUSTED_VALIDATED_FENCE();
2113
2114 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext, soid);
2115
2116 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
2117 RT_ZERO(*pEntry);
2118 pEntry->mobid = SVGA_ID_INVALID;
2119
2120 return rc;
2121}
2122
2123
2124int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd)
2125{
2126 int rc;
2127 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2128 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
2129 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2130 AssertReturn(p3dState, VERR_INVALID_STATE);
2131
2132 PVMSVGA3DDXCONTEXT pDXContext;
2133 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2134 AssertRCReturn(rc, rc);
2135
2136 SVGA3dStreamOutputId const soid = pCmd->soid;
2137
2138 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2139 ASSERT_GUEST_RETURN( soid == SVGA_ID_INVALID
2140 || soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2141 RT_UNTRUSTED_VALIDATED_FENCE();
2142
2143 pDXContext->svgaDXContext.streamOut.soid = soid;
2144
2145 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext, soid);
2146 return rc;
2147}
2148
2149
2150int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, PVMSVGAMOB pMob)
2151{
2152 int rc;
2153 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2154 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
2155 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2156 AssertReturn(p3dState, VERR_INVALID_STATE);
2157
2158 PVMSVGA3DDXCONTEXT pDXContext;
2159 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2160 AssertRCReturn(rc, rc);
2161 RT_UNTRUSTED_VALIDATED_FENCE();
2162
2163 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2164 RT_UNTRUSTED_VALIDATED_FENCE();
2165
2166 uint32_t validSizeInBytes;
2167 uint32_t cbCOT;
2168 if (pMob)
2169 {
2170 /* Bind a mob to the COTable. */
2171 validSizeInBytes = pCmd->validSizeInBytes;
2172 cbCOT = vmsvgaR3MobSize(pMob);
2173
2174 ASSERT_GUEST_RETURN(validSizeInBytes <= cbCOT, VERR_INVALID_PARAMETER);
2175 RT_UNTRUSTED_VALIDATED_FENCE();
2176
2177 /* Create a memory pointer, which is accessible by host. */
2178 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
2179 }
2180 else
2181 {
2182 /* Unbind. */
2183 validSizeInBytes = 0;
2184 cbCOT = 0;
2185 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[pCmd->type]);
2186 }
2187
2188 uint32_t cEntries = 0;
2189 uint32_t cValidEntries = 0;
2190 if (RT_SUCCESS(rc))
2191 {
2192 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
2193 {
2194 sizeof(SVGACOTableDXRTViewEntry),
2195 sizeof(SVGACOTableDXDSViewEntry),
2196 sizeof(SVGACOTableDXSRViewEntry),
2197 sizeof(SVGACOTableDXElementLayoutEntry),
2198 sizeof(SVGACOTableDXBlendStateEntry),
2199 sizeof(SVGACOTableDXDepthStencilEntry),
2200 sizeof(SVGACOTableDXRasterizerStateEntry),
2201 sizeof(SVGACOTableDXSamplerEntry),
2202 sizeof(SVGACOTableDXStreamOutputEntry),
2203 sizeof(SVGACOTableDXQueryEntry),
2204 sizeof(SVGACOTableDXShaderEntry),
2205 sizeof(SVGACOTableDXUAViewEntry),
2206 };
2207
2208 cEntries = cbCOT / s_acbEntry[pCmd->type];
2209 cValidEntries = validSizeInBytes / s_acbEntry[pCmd->type];
2210 }
2211
2212 if (RT_SUCCESS(rc))
2213 {
2214 pDXContext->aCOTMobs[pCmd->type] = pMob;
2215
2216 void *pvCOT = vmsvgaR3MobBackingStorePtr(pMob, 0);
2217 switch (pCmd->type)
2218 {
2219 case SVGA_COTABLE_RTVIEW:
2220 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
2221 pDXContext->cot.cRTView = cEntries;
2222 break;
2223 case SVGA_COTABLE_DSVIEW:
2224 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
2225 pDXContext->cot.cDSView = cEntries;
2226 break;
2227 case SVGA_COTABLE_SRVIEW:
2228 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
2229 pDXContext->cot.cSRView = cEntries;
2230 break;
2231 case SVGA_COTABLE_ELEMENTLAYOUT:
2232 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
2233 pDXContext->cot.cElementLayout = cEntries;
2234 break;
2235 case SVGA_COTABLE_BLENDSTATE:
2236 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
2237 pDXContext->cot.cBlendState = cEntries;
2238 break;
2239 case SVGA_COTABLE_DEPTHSTENCIL:
2240 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
2241 pDXContext->cot.cDepthStencil = cEntries;
2242 break;
2243 case SVGA_COTABLE_RASTERIZERSTATE:
2244 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
2245 pDXContext->cot.cRasterizerState = cEntries;
2246 break;
2247 case SVGA_COTABLE_SAMPLER:
2248 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
2249 pDXContext->cot.cSampler = cEntries;
2250 break;
2251 case SVGA_COTABLE_STREAMOUTPUT:
2252 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
2253 pDXContext->cot.cStreamOutput = cEntries;
2254 break;
2255 case SVGA_COTABLE_DXQUERY:
2256 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
2257 pDXContext->cot.cQuery = cEntries;
2258 break;
2259 case SVGA_COTABLE_DXSHADER:
2260 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
2261 pDXContext->cot.cShader = cEntries;
2262 break;
2263 case SVGA_COTABLE_UAVIEW:
2264 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
2265 pDXContext->cot.cUAView = cEntries;
2266 break;
2267 case SVGA_COTABLE_MAX: break; /* Compiler warning */
2268 }
2269 }
2270 else
2271 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2272
2273 /* Notify the backend. */
2274 if (RT_SUCCESS(rc))
2275 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, pCmd->type, cValidEntries);
2276
2277 return rc;
2278}
2279
2280
2281int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd)
2282{
2283 int rc;
2284 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2285 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2286 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2287 AssertReturn(p3dState, VERR_INVALID_STATE);
2288
2289 PVMSVGA3DDXCONTEXT pDXContext;
2290 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2291 AssertRCReturn(rc, rc);
2292 RT_UNTRUSTED_VALIDATED_FENCE();
2293
2294 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2295 RT_UNTRUSTED_VALIDATED_FENCE();
2296
2297 PVMSVGAMOB pMob = pDXContext->aCOTMobs[pCmd->type];
2298 rc = vmsvgaR3MobBackingStoreWriteToGuest(pSvgaR3State, pMob);
2299 return rc;
2300}
2301
2302
2303int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2304{
2305 int rc;
2306 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2307 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
2308 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2309 AssertReturn(p3dState, VERR_INVALID_STATE);
2310
2311 PVMSVGA3DDXCONTEXT pDXContext;
2312 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2313 AssertRCReturn(rc, rc);
2314
2315 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
2316 return rc;
2317}
2318
2319
2320int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
2321{
2322 int rc;
2323 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2324 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
2325 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2326 AssertReturn(p3dState, VERR_INVALID_STATE);
2327
2328 PVMSVGA3DDXCONTEXT pDXContext;
2329 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2330 AssertRCReturn(rc, rc);
2331
2332 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
2333 return rc;
2334}
2335
2336
2337int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
2338{
2339 int rc;
2340 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2341 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
2342 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2343 AssertReturn(p3dState, VERR_INVALID_STATE);
2344
2345 PVMSVGA3DDXCONTEXT pDXContext;
2346 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2347 AssertRCReturn(rc, rc);
2348
2349 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
2350 return rc;
2351}
2352
2353
2354int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindAllQuery const *pCmd)
2355{
2356 int rc;
2357 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2358 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindQuery, VERR_INVALID_STATE);
2359 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2360 AssertReturn(p3dState, VERR_INVALID_STATE);
2361
2362 RT_NOREF(idDXContext);
2363
2364 PVMSVGA3DDXCONTEXT pDXContext;
2365 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2366 AssertRCReturn(rc, rc);
2367
2368 for (uint32_t i = 0; i < pDXContext->cot.cQuery; ++i)
2369 {
2370 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[i];
2371 if (pEntry->type != SVGA3D_QUERYTYPE_INVALID)
2372 {
2373 pEntry->mobid = pCmd->mobid;
2374 pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC, pDXContext, i);
2375 }
2376 }
2377
2378 return rc;
2379}
2380
2381
2382static int dxReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry *pEntry)
2383{
2384 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2385
2386 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pEntry->mobid);
2387 ASSERT_GUEST_RETURN(pMob, VERR_INVALID_STATE); /* No MOB bound. */
2388
2389 uint32_t const cbMob = vmsvgaR3MobSize(pMob);
2390 ASSERT_GUEST_RETURN(cbMob > pEntry->offset, VERR_INVALID_PARAMETER);
2391 uint32_t const cbAvail = cbMob - pEntry->offset;
2392
2393 /* Create a memory pointer, which is accessible by host. */
2394 int rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, cbMob);
2395 AssertRCReturn(rc, rc);
2396
2397 void *pvQuery = vmsvgaR3MobBackingStorePtr(pMob, pEntry->offset);
2398 /** @todo Write the query data only. */
2399 uint32_t cbQuery = 0; /* Actual size of query data returned by backend. */
2400 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackQuery(pThisCC, pDXContext, queryId, pvQuery, cbAvail, &cbQuery);
2401 if (RT_SUCCESS(rc))
2402 rc = vmsvgaR3MobBackingStoreWriteToGuest(pSvgaR3State, pMob);
2403
2404 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2405
2406 pEntry->state = SVGADX_QDSTATE_FINISHED;
2407 return rc;
2408}
2409
2410
2411int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackAllQuery const *pCmd)
2412{
2413 int rc;
2414 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2415 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackQuery, VERR_INVALID_STATE);
2416 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2417 AssertReturn(p3dState, VERR_INVALID_STATE);
2418
2419 RT_NOREF(idDXContext);
2420
2421 PVMSVGA3DDXCONTEXT pDXContext;
2422 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2423 AssertRCReturn(rc, rc);
2424
2425 for (uint32_t i = 0; i < pDXContext->cot.cQuery; ++i)
2426 {
2427 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[i];
2428 if (pEntry->state == SVGADX_QDSTATE_PENDING)
2429 {
2430 dxReadbackQuery(pThisCC, pDXContext, i, pEntry);
2431 }
2432 }
2433
2434 return rc;
2435}
2436
2437
2438int vmsvga3dDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext)
2439{
2440 int rc;
2441 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2442 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMobFence64, VERR_INVALID_STATE);
2443 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2444 AssertReturn(p3dState, VERR_INVALID_STATE);
2445
2446 PVMSVGA3DDXCONTEXT pDXContext;
2447 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2448 AssertRCReturn(rc, rc);
2449
2450 rc = pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC, pDXContext);
2451 return rc;
2452}
2453
2454
2455int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2456{
2457 int rc;
2458 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2459 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
2460 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2461 AssertReturn(p3dState, VERR_INVALID_STATE);
2462
2463 PVMSVGA3DDXCONTEXT pDXContext;
2464 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2465 AssertRCReturn(rc, rc);
2466
2467 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
2468 return rc;
2469}
2470
2471
2472int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
2473{
2474 int rc;
2475 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2476 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
2477 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2478 AssertReturn(p3dState, VERR_INVALID_STATE);
2479
2480 PVMSVGA3DDXCONTEXT pDXContext;
2481 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2482 AssertRCReturn(rc, rc);
2483
2484 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
2485 return rc;
2486}
2487
2488
2489int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
2490{
2491 int rc;
2492 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2493 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
2494 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2495 AssertReturn(p3dState, VERR_INVALID_STATE);
2496
2497 PVMSVGA3DDXCONTEXT pDXContext;
2498 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2499 AssertRCReturn(rc, rc);
2500
2501 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
2502 return rc;
2503}
2504
2505
2506int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2507{
2508 int rc;
2509 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2510 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
2511 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2512 AssertReturn(p3dState, VERR_INVALID_STATE);
2513
2514 PVMSVGA3DDXCONTEXT pDXContext;
2515 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2516 AssertRCReturn(rc, rc);
2517
2518 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
2519 return rc;
2520}
2521
2522
2523int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2524{
2525 int rc;
2526 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2527 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
2528 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2529 AssertReturn(p3dState, VERR_INVALID_STATE);
2530
2531 PVMSVGA3DDXCONTEXT pDXContext;
2532 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2533 AssertRCReturn(rc, rc);
2534
2535 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
2536 return rc;
2537}
2538
2539
2540int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2541{
2542 int rc;
2543 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2544 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
2545 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2546 AssertReturn(p3dState, VERR_INVALID_STATE);
2547
2548 PVMSVGA3DDXCONTEXT pDXContext;
2549 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2550 AssertRCReturn(rc, rc);
2551
2552 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
2553 return rc;
2554}
2555
2556
2557int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2558{
2559 int rc;
2560 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2561 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
2562 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2563 AssertReturn(p3dState, VERR_INVALID_STATE);
2564
2565 PVMSVGA3DDXCONTEXT pDXContext;
2566 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2567 AssertRCReturn(rc, rc);
2568
2569 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
2570 return rc;
2571}
2572
2573
2574int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2575{
2576 int rc;
2577 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2578 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
2579 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2580 AssertReturn(p3dState, VERR_INVALID_STATE);
2581
2582 PVMSVGA3DDXCONTEXT pDXContext;
2583 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2584 AssertRCReturn(rc, rc);
2585
2586 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
2587 return rc;
2588}
2589
2590
2591int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2592{
2593 int rc;
2594 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2595 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
2596 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2597 AssertReturn(p3dState, VERR_INVALID_STATE);
2598
2599 PVMSVGA3DDXCONTEXT pDXContext;
2600 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2601 AssertRCReturn(rc, rc);
2602
2603 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
2604 return rc;
2605}
2606
2607
2608int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2609{
2610 int rc;
2611 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2612 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
2613 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2614 AssertReturn(p3dState, VERR_INVALID_STATE);
2615
2616 PVMSVGA3DDXCONTEXT pDXContext;
2617 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2618 AssertRCReturn(rc, rc);
2619
2620 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
2621 return rc;
2622}
2623
2624
2625int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2626{
2627 int rc;
2628 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2629 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
2630 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2631 AssertReturn(p3dState, VERR_INVALID_STATE);
2632
2633 PVMSVGA3DDXCONTEXT pDXContext;
2634 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2635 AssertRCReturn(rc, rc);
2636
2637 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
2638 return rc;
2639}
2640
2641
2642int vmsvga3dGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2643{
2644 int rc;
2645 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2646 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnGrowOTable, VERR_INVALID_STATE);
2647 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2648 AssertReturn(p3dState, VERR_INVALID_STATE);
2649
2650 PVMSVGA3DDXCONTEXT pDXContext;
2651 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2652 AssertRCReturn(rc, rc);
2653
2654 rc = pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC, pDXContext);
2655 return rc;
2656}
2657
2658
2659int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2660{
2661 int rc;
2662 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2663 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGrowCOTable, VERR_INVALID_STATE);
2664 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2665 AssertReturn(p3dState, VERR_INVALID_STATE);
2666
2667 PVMSVGA3DDXCONTEXT pDXContext;
2668 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2669 AssertRCReturn(rc, rc);
2670
2671 rc = pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC, pDXContext);
2672 return rc;
2673}
2674
2675
2676int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2677{
2678 int rc;
2679 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2680 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2681 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2682 AssertReturn(p3dState, VERR_INVALID_STATE);
2683
2684 PVMSVGA3DDXCONTEXT pDXContext;
2685 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2686 AssertRCReturn(rc, rc);
2687
2688 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2689 return rc;
2690}
2691
2692
2693int vmsvga3dDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext)
2694{
2695 int rc;
2696 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2697 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3, VERR_INVALID_STATE);
2698 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2699 AssertReturn(p3dState, VERR_INVALID_STATE);
2700
2701 PVMSVGA3DDXCONTEXT pDXContext;
2702 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2703 AssertRCReturn(rc, rc);
2704
2705 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC, pDXContext);
2706 return rc;
2707}
2708
2709
2710int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2711{
2712 int rc;
2713 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2714 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2715 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2716 AssertReturn(p3dState, VERR_INVALID_STATE);
2717
2718 PVMSVGA3DDXCONTEXT pDXContext;
2719 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2720 AssertRCReturn(rc, rc);
2721
2722 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2723 return rc;
2724}
2725
2726
2727int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2728{
2729 int rc;
2730 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2731 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2732 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2733 AssertReturn(p3dState, VERR_INVALID_STATE);
2734
2735 PVMSVGA3DDXCONTEXT pDXContext;
2736 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2737 AssertRCReturn(rc, rc);
2738
2739 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2740 return rc;
2741}
2742
2743
2744int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2745{
2746 int rc;
2747 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2748 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2749 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2750 AssertReturn(p3dState, VERR_INVALID_STATE);
2751
2752 PVMSVGA3DDXCONTEXT pDXContext;
2753 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2754 AssertRCReturn(rc, rc);
2755
2756 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2757 return rc;
2758}
2759
2760
2761int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2762{
2763 int rc;
2764 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2765 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2766 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2767 AssertReturn(p3dState, VERR_INVALID_STATE);
2768
2769 PVMSVGA3DDXCONTEXT pDXContext;
2770 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2771 AssertRCReturn(rc, rc);
2772
2773 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2774 return rc;
2775}
2776
2777
2778int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2779{
2780 int rc;
2781 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2782 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2783 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2784 AssertReturn(p3dState, VERR_INVALID_STATE);
2785
2786 PVMSVGA3DDXCONTEXT pDXContext;
2787 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2788 AssertRCReturn(rc, rc);
2789
2790 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2791 return rc;
2792}
2793
2794
2795int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2796{
2797 int rc;
2798 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2799 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2800 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2801 AssertReturn(p3dState, VERR_INVALID_STATE);
2802
2803 PVMSVGA3DDXCONTEXT pDXContext;
2804 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2805 AssertRCReturn(rc, rc);
2806
2807 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext);
2808 return rc;
2809}
2810
2811
2812int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2813{
2814 int rc;
2815 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2816 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2817 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2818 AssertReturn(p3dState, VERR_INVALID_STATE);
2819
2820 PVMSVGA3DDXCONTEXT pDXContext;
2821 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2822 AssertRCReturn(rc, rc);
2823
2824 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext);
2825 return rc;
2826}
2827
2828
2829int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext)
2830{
2831 int rc;
2832 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2833 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2834 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2835 AssertReturn(p3dState, VERR_INVALID_STATE);
2836
2837 PVMSVGA3DDXCONTEXT pDXContext;
2838 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2839 AssertRCReturn(rc, rc);
2840
2841 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext);
2842 return rc;
2843}
2844
2845
2846int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext)
2847{
2848 int rc;
2849 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2850 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2851 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2852 AssertReturn(p3dState, VERR_INVALID_STATE);
2853
2854 PVMSVGA3DDXCONTEXT pDXContext;
2855 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2856 AssertRCReturn(rc, rc);
2857
2858 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext);
2859 return rc;
2860}
2861
2862
2863int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2864{
2865 int rc;
2866 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2867 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2868 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2869 AssertReturn(p3dState, VERR_INVALID_STATE);
2870
2871 PVMSVGA3DDXCONTEXT pDXContext;
2872 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2873 AssertRCReturn(rc, rc);
2874
2875 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext);
2876 return rc;
2877}
2878
2879
2880int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2881{
2882 int rc;
2883 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2884 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2885 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2886 AssertReturn(p3dState, VERR_INVALID_STATE);
2887
2888 PVMSVGA3DDXCONTEXT pDXContext;
2889 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2890 AssertRCReturn(rc, rc);
2891
2892 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext);
2893 return rc;
2894}
2895
2896
2897int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2898{
2899 int rc;
2900 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2901 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2902 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2903 AssertReturn(p3dState, VERR_INVALID_STATE);
2904
2905 PVMSVGA3DDXCONTEXT pDXContext;
2906 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2907 AssertRCReturn(rc, rc);
2908
2909 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext);
2910 return rc;
2911}
2912
2913
2914int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2915{
2916 int rc;
2917 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2918 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2919 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2920 AssertReturn(p3dState, VERR_INVALID_STATE);
2921
2922 PVMSVGA3DDXCONTEXT pDXContext;
2923 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2924 AssertRCReturn(rc, rc);
2925
2926 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext);
2927 return rc;
2928}
2929
2930
2931int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext)
2932{
2933 int rc;
2934 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2935 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2936 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2937 AssertReturn(p3dState, VERR_INVALID_STATE);
2938
2939 PVMSVGA3DDXCONTEXT pDXContext;
2940 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2941 AssertRCReturn(rc, rc);
2942
2943 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext);
2944 return rc;
2945}
2946
2947
2948int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2949{
2950 int rc;
2951 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2952 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
2953 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2954 AssertReturn(p3dState, VERR_INVALID_STATE);
2955
2956 PVMSVGA3DDXCONTEXT pDXContext;
2957 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2958 AssertRCReturn(rc, rc);
2959
2960 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
2961 return rc;
2962}
2963
2964
2965int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2966{
2967 int rc;
2968 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2969 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
2970 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2971 AssertReturn(p3dState, VERR_INVALID_STATE);
2972
2973 PVMSVGA3DDXCONTEXT pDXContext;
2974 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2975 AssertRCReturn(rc, rc);
2976
2977 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
2978 return rc;
2979}
2980
2981
2982int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2983{
2984 int rc;
2985 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2986 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
2987 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2988 AssertReturn(p3dState, VERR_INVALID_STATE);
2989
2990 PVMSVGA3DDXCONTEXT pDXContext;
2991 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2992 AssertRCReturn(rc, rc);
2993
2994 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
2995 return rc;
2996}
2997
2998
2999int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
3000{
3001 int rc;
3002 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3003 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
3004 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3005 AssertReturn(p3dState, VERR_INVALID_STATE);
3006
3007 PVMSVGA3DDXCONTEXT pDXContext;
3008 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3009 AssertRCReturn(rc, rc);
3010
3011 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
3012 return rc;
3013}
3014
3015
3016int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
3017{
3018 int rc;
3019 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3020 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStructureCount, VERR_INVALID_STATE);
3021 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3022 AssertReturn(p3dState, VERR_INVALID_STATE);
3023
3024 PVMSVGA3DDXCONTEXT pDXContext;
3025 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3026 AssertRCReturn(rc, rc);
3027
3028 rc = pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC, pDXContext);
3029 return rc;
3030}
3031
3032
3033int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3034{
3035 int rc;
3036 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3037 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
3038 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3039 AssertReturn(p3dState, VERR_INVALID_STATE);
3040
3041 PVMSVGA3DDXCONTEXT pDXContext;
3042 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3043 AssertRCReturn(rc, rc);
3044
3045 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
3046 return rc;
3047}
3048
3049
3050int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3051{
3052 int rc;
3053 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3054 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
3055 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3056 AssertReturn(p3dState, VERR_INVALID_STATE);
3057
3058 PVMSVGA3DDXCONTEXT pDXContext;
3059 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3060 AssertRCReturn(rc, rc);
3061
3062 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
3063 return rc;
3064}
3065
3066
3067int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3068{
3069 int rc;
3070 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3071 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
3072 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3073 AssertReturn(p3dState, VERR_INVALID_STATE);
3074
3075 PVMSVGA3DDXCONTEXT pDXContext;
3076 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3077 AssertRCReturn(rc, rc);
3078
3079 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
3080 return rc;
3081}
3082
3083
3084int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
3085{
3086 int rc;
3087 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3088 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
3089 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3090 AssertReturn(p3dState, VERR_INVALID_STATE);
3091
3092 PVMSVGA3DDXCONTEXT pDXContext;
3093 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3094 AssertRCReturn(rc, rc);
3095
3096 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
3097 return rc;
3098}
3099
3100
3101int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
3102{
3103 int rc;
3104 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3105 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
3106 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3107 AssertReturn(p3dState, VERR_INVALID_STATE);
3108
3109 PVMSVGA3DDXCONTEXT pDXContext;
3110 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3111 AssertRCReturn(rc, rc);
3112
3113 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
3114 return rc;
3115}
3116
3117
3118int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
3119{
3120 int rc;
3121 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3122 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
3123 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3124 AssertReturn(p3dState, VERR_INVALID_STATE);
3125
3126 PVMSVGA3DDXCONTEXT pDXContext;
3127 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3128 AssertRCReturn(rc, rc);
3129
3130 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
3131 return rc;
3132}
3133
3134
3135int vmsvga3dDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext)
3136{
3137 int rc;
3138 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3139 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4, VERR_INVALID_STATE);
3140 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3141 AssertReturn(p3dState, VERR_INVALID_STATE);
3142
3143 PVMSVGA3DDXCONTEXT pDXContext;
3144 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3145 AssertRCReturn(rc, rc);
3146
3147 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC, pDXContext);
3148 return rc;
3149}
3150
3151
3152int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
3153{
3154 int rc;
3155 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3156 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
3157 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3158 AssertReturn(p3dState, VERR_INVALID_STATE);
3159
3160 PVMSVGA3DDXCONTEXT pDXContext;
3161 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3162 AssertRCReturn(rc, rc);
3163
3164 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext);
3165 return rc;
3166}
3167
3168
3169int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
3170{
3171 int rc;
3172 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3173 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
3174 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3175 AssertReturn(p3dState, VERR_INVALID_STATE);
3176
3177 PVMSVGA3DDXCONTEXT pDXContext;
3178 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3179 AssertRCReturn(rc, rc);
3180
3181 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
3182 return rc;
3183}
3184
3185
3186int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext)
3187{
3188 int rc;
3189 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3190 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob, VERR_INVALID_STATE);
3191 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3192 AssertReturn(p3dState, VERR_INVALID_STATE);
3193
3194 PVMSVGA3DDXCONTEXT pDXContext;
3195 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3196 AssertRCReturn(rc, rc);
3197
3198 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC, pDXContext);
3199 return rc;
3200}
3201
3202
3203int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3204{
3205 int rc;
3206 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3207 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
3208 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3209 AssertReturn(p3dState, VERR_INVALID_STATE);
3210
3211 PVMSVGA3DDXCONTEXT pDXContext;
3212 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3213 AssertRCReturn(rc, rc);
3214
3215 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
3216 return rc;
3217}
3218
3219
3220int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
3221{
3222 int rc;
3223 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3224 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput, VERR_INVALID_STATE);
3225 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3226 AssertReturn(p3dState, VERR_INVALID_STATE);
3227
3228 PVMSVGA3DDXCONTEXT pDXContext;
3229 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3230 AssertRCReturn(rc, rc);
3231
3232 rc = pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC, pDXContext);
3233 return rc;
3234}
3235
3236
3237int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
3238{
3239 int rc;
3240 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3241 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
3242 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3243 AssertReturn(p3dState, VERR_INVALID_STATE);
3244
3245 PVMSVGA3DDXCONTEXT pDXContext;
3246 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3247 AssertRCReturn(rc, rc);
3248
3249 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
3250 return rc;
3251}
3252
3253
3254int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3255{
3256 int rc;
3257 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3258 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
3259 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3260 AssertReturn(p3dState, VERR_INVALID_STATE);
3261
3262 PVMSVGA3DDXCONTEXT pDXContext;
3263 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3264 AssertRCReturn(rc, rc);
3265
3266 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
3267 return rc;
3268}
3269
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