DevVGA-SVGA3d-dx-savedstate.cpp@ 97405

Last change on this file since 97405 was 96407, checked in by vboxsync, 2 years ago
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1	/* $Id: DevVGA-SVGA3d-dx-savedstate.cpp 96407 2022-08-22 17:43:14Z vboxsync $ */
2	/** @file
3	* DevSVGA3d - VMWare SVGA device, 3D parts - DX backend saved state.
4	*/
5
6	/*
7	* Copyright (C) 2022 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33	#include <VBox/AssertGuest.h>
34	#include <iprt/errcore.h>
35	#include <VBox/log.h>
36	#include <VBox/vmm/pdmdev.h>
37
38	#include <iprt/assert.h>
39	#include <iprt/mem.h>
40
41	#include <VBoxVideo.h> /* required by DevVGA.h */
42
43	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
44	#include "DevVGA.h"
45
46	#include "DevVGA-SVGA.h"
47	#include "DevVGA-SVGA3d.h"
48	#include "DevVGA-SVGA3d-internal.h"
49	#include "DevVGA-SVGA-internal.h"
50
51	/*
52	* Load
53	*/
54
55	static int vmsvga3dDXLoadSurface(PCPDMDEVHLPR3 pHlp, PVGASTATECC pThisCC, PSSMHANDLE pSSM)
56	{
57	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
58	int rc;
59
60	uint32_t sid;
61	rc = pHlp->pfnSSMGetU32(pSSM, &sid);
62	AssertRCReturn(rc, rc);
63
64	if (sid == SVGA3D_INVALID_ID)
65	return VINF_SUCCESS;
66
67	/* Define the surface. */
68	SVGAOTableSurfaceEntry entrySurface;
69	rc = vmsvgaR3OTableReadSurface(pThisCC->svga.pSvgaR3State, sid, &entrySurface);
70	AssertRCReturn(rc, rc);
71
72	/** @todo fAllocMipLevels=false and alloc miplevels if there is data to be loaded. */
73	rc = vmsvga3dSurfaceDefine(pThisCC, sid, entrySurface.surface1Flags, entrySurface.format,
74	entrySurface.multisampleCount, entrySurface.autogenFilter,
75	entrySurface.numMipLevels, &entrySurface.size,
76	entrySurface.arraySize,
77	/* fAllocMipLevels = */ true);
78	AssertRCReturn(rc, rc);
79
80	PVMSVGA3DSURFACE pSurface = p3dState->papSurfaces[sid];
81	AssertReturn(pSurface->id == sid, VERR_INTERNAL_ERROR);
82
83	/* Load the surface fields which are not part of SVGAOTableSurfaceEntry. */
84	pHlp->pfnSSMGetU32(pSSM, &pSurface->idAssociatedContext);
85
86	/* Load miplevels data to the surface buffers. */
87	for (uint32_t j = 0; j < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; j++)
88	{
89	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[j];
90
91	/* vmsvga3dSurfaceDefine already allocated the surface data buffer. */
92	Assert(pMipmapLevel->cbSurface);
93	AssertReturn(pMipmapLevel->pSurfaceData, VERR_INTERNAL_ERROR);
94
95	/* Fetch the data present boolean first. */
96	bool fDataPresent;
97	rc = pHlp->pfnSSMGetBool(pSSM, &fDataPresent);
98	AssertRCReturn(rc, rc);
99
100	if (fDataPresent)
101	{
102	rc = pHlp->pfnSSMGetMem(pSSM, pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);
103	AssertRCReturn(rc, rc);
104
105	pMipmapLevel->fDirty = true;
106	pSurface->fDirty = true;
107	}
108	else
109	pMipmapLevel->fDirty = false;
110	}
111
112	return VINF_SUCCESS;
113	}
114
115	static int vmsvga3dDXLoadContext(PCPDMDEVHLPR3 pHlp, PVGASTATECC pThisCC, PSSMHANDLE pSSM)
116	{
117	PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State;
118	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
119	uint32_t u32;
120	int rc;
121
122	uint32_t cid;
123	rc = pHlp->pfnSSMGetU32(pSSM, &cid);
124	AssertRCReturn(rc, rc);
125
126	if (cid == SVGA3D_INVALID_ID)
127	return VINF_SUCCESS;
128
129	/* Define the context. */
130	rc = vmsvga3dDXDefineContext(pThisCC, cid);
131	AssertRCReturn(rc, rc);
132
133	PVMSVGA3DDXCONTEXT pDXContext = p3dState->papDXContexts[cid];
134	AssertReturn(pDXContext->cid == cid, VERR_INTERNAL_ERROR);
135
136	/* Load the context. */
137	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
138	AssertRCReturn(rc, rc);
139	AssertReturn(u32 == sizeof(SVGADXContextMobFormat), VERR_INVALID_STATE);
140
141	pHlp->pfnSSMGetMem(pSSM, &pDXContext->svgaDXContext, sizeof(SVGADXContextMobFormat));
142
143	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
144	AssertLogRelRCReturn(rc, rc);
145	AssertReturn(u32 == RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_STATE);
146
147	for (unsigned i = 0; i < RT_ELEMENTS(pDXContext->aCOTMobs); ++i)
148	{
149	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
150	AssertLogRelRCReturn(rc, rc);
151	pDXContext->aCOTMobs[i] = vmsvgaR3MobGet(pSvgaR3State, u32);
152	Assert(pDXContext->aCOTMobs[i] \|\| u32 == SVGA_ID_INVALID);
153	}
154
155	struct
156	{
157	SVGACOTableType COTableType;
158	uint32_t cbEntry;
159	uint32_t *pcEntries;
160	void **ppaEntries;
161	} cot[] =
162	{
163	{SVGA_COTABLE_RTVIEW, sizeof(SVGACOTableDXRTViewEntry), &pDXContext->cot.cRTView, (void **)&pDXContext->cot.paRTView},
164	{SVGA_COTABLE_DSVIEW, sizeof(SVGACOTableDXDSViewEntry), &pDXContext->cot.cDSView, (void **)&pDXContext->cot.paDSView},
165	{SVGA_COTABLE_SRVIEW, sizeof(SVGACOTableDXSRViewEntry), &pDXContext->cot.cSRView, (void **)&pDXContext->cot.paSRView},
166	{SVGA_COTABLE_ELEMENTLAYOUT, sizeof(SVGACOTableDXElementLayoutEntry), &pDXContext->cot.cElementLayout, (void **)&pDXContext->cot.paElementLayout},
167	{SVGA_COTABLE_BLENDSTATE, sizeof(SVGACOTableDXBlendStateEntry), &pDXContext->cot.cBlendState, (void **)&pDXContext->cot.paBlendState},
168	{SVGA_COTABLE_DEPTHSTENCIL, sizeof(SVGACOTableDXDepthStencilEntry), &pDXContext->cot.cDepthStencil, (void **)&pDXContext->cot.paDepthStencil},
169	{SVGA_COTABLE_RASTERIZERSTATE, sizeof(SVGACOTableDXRasterizerStateEntry), &pDXContext->cot.cRasterizerState, (void **)&pDXContext->cot.paRasterizerState},
170	{SVGA_COTABLE_SAMPLER, sizeof(SVGACOTableDXSamplerEntry), &pDXContext->cot.cSampler, (void **)&pDXContext->cot.paSampler},
171	{SVGA_COTABLE_STREAMOUTPUT, sizeof(SVGACOTableDXStreamOutputEntry), &pDXContext->cot.cStreamOutput, (void **)&pDXContext->cot.paStreamOutput},
172	{SVGA_COTABLE_DXQUERY, sizeof(SVGACOTableDXQueryEntry), &pDXContext->cot.cQuery, (void **)&pDXContext->cot.paQuery},
173	{SVGA_COTABLE_DXSHADER, sizeof(SVGACOTableDXShaderEntry), &pDXContext->cot.cShader, (void **)&pDXContext->cot.paShader},
174	{SVGA_COTABLE_UAVIEW, sizeof(SVGACOTableDXUAViewEntry), &pDXContext->cot.cUAView, (void **)&pDXContext->cot.paUAView},
175	};
176
177	AssertCompile(RT_ELEMENTS(cot) == RT_ELEMENTS(pDXContext->aCOTMobs));
178	for (unsigned i = 0; i < RT_ELEMENTS(cot); ++i)
179	{
180	uint32_t cEntries;
181	pHlp->pfnSSMGetU32(pSSM, &cEntries);
182	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
183	AssertRCReturn(rc, rc);
184	AssertReturn(u32 == cot[i].cbEntry, VERR_INVALID_STATE);
185
186	*cot[i].pcEntries = cEntries;
187	*cot[i].ppaEntries = vmsvgaR3MobBackingStorePtr(pDXContext->aCOTMobs[cot[i].COTableType], 0);
188
189	if (cEntries)
190	{
191	rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, cot[i].COTableType, cEntries);
192	AssertLogRelRCReturn(rc, rc);
193	}
194	}
195
196	rc = pSvgaR3State->pFuncsDX->pfnDXLoadState(pThisCC, pDXContext, pHlp, pSSM);
197	AssertRCReturn(rc, rc);
198
199	return VINF_SUCCESS;
200	}
201
202	int vmsvga3dDXLoadExec(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
203	{
204	RT_NOREF(pThis, uPass);
205
206	if (uVersion < VGA_SAVEDSTATE_VERSION_VMSVGA_DX)
207	AssertFailedReturn(VERR_INVALID_STATE);
208
209	PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
210	PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State;
211	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
212	int rc;
213
214	/*
215	* VMSVGA3DSTATE
216	*/
217	pHlp->pfnSSMGetU32(pSSM, &p3dState->cSurfaces);
218	rc = pHlp->pfnSSMGetU32(pSSM, &p3dState->cDXContexts);
219	AssertRCReturn(rc, rc);
220
221	/*
222	* Surfaces
223	*/
224	p3dState->papSurfaces = (PVMSVGA3DSURFACE )RTMemAlloc(p3dState->cSurfaces sizeof(PVMSVGA3DSURFACE));
225	AssertReturn(p3dState->papSurfaces, VERR_NO_MEMORY);
226	for (uint32_t i = 0; i < p3dState->cSurfaces; ++i)
227	{
228	p3dState->papSurfaces[i] = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(VMSVGA3DSURFACE));
229	AssertPtrReturn(p3dState->papSurfaces[i], VERR_NO_MEMORY);
230	p3dState->papSurfaces[i]->id = SVGA3D_INVALID_ID;
231	}
232
233	for (uint32_t i = 0; i < p3dState->cSurfaces; ++i)
234	{
235	rc = vmsvga3dDXLoadSurface(pHlp, pThisCC, pSSM);
236	AssertRCReturn(rc, rc);
237	}
238
239	/*
240	* DX contexts
241	*/
242	p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT )RTMemAlloc(p3dState->cDXContexts sizeof(PVMSVGA3DDXCONTEXT));
243	AssertReturn(p3dState->papDXContexts, VERR_NO_MEMORY);
244	for (uint32_t i = 0; i < p3dState->cDXContexts; ++i)
245	{
246	p3dState->papDXContexts[i] = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DDXCONTEXT));
247	AssertPtrReturn(p3dState->papDXContexts[i], VERR_NO_MEMORY);
248	p3dState->papDXContexts[i]->cid = SVGA3D_INVALID_ID;
249	}
250
251	for (uint32_t i = 0; i < p3dState->cDXContexts; ++i)
252	{
253	rc = vmsvga3dDXLoadContext(pHlp, pThisCC, pSSM);
254	AssertRCReturn(rc, rc);
255	}
256
257	if (pSvgaR3State->idDXContextCurrent != SVGA_ID_INVALID)
258	vmsvga3dDXSwitchContext(pThisCC, pSvgaR3State->idDXContextCurrent);
259
260	return VINF_SUCCESS;
261	}
262
263	/*
264	* Save
265	*/
266
267	static int vmsvga3dDXSaveSurface(PCPDMDEVHLPR3 pHlp, PVGASTATECC pThisCC, PSSMHANDLE pSSM, PVMSVGA3DSURFACE pSurface)
268	{
269	RT_NOREF(pThisCC);
270	int rc;
271
272	rc = pHlp->pfnSSMPutU32(pSSM, pSurface->id);
273	AssertRCReturn(rc, rc);
274
275	if (pSurface->id == SVGA3D_INVALID_ID)
276	return VINF_SUCCESS;
277
278	/* Save the surface fields which are not part of SVGAOTableSurfaceEntry. */
279	pHlp->pfnSSMPutU32(pSSM, pSurface->idAssociatedContext);
280
281	for (uint32_t iArray = 0; iArray < pSurface->surfaceDesc.numArrayElements; ++iArray)
282	{
283	for (uint32_t iMipmap = 0; iMipmap < pSurface->cLevels; ++iMipmap)
284	{
285	uint32_t idx = iMipmap + iArray * pSurface->cLevels;
286	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[idx];
287
288	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
289	{
290	if (pMipmapLevel->pSurfaceData)
291	{
292	/* Data follows */
293	rc = pHlp->pfnSSMPutBool(pSSM, true);
294	AssertRCReturn(rc, rc);
295
296	Assert(pMipmapLevel->cbSurface);
297	rc = pHlp->pfnSSMPutMem(pSSM, pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);
298	AssertRCReturn(rc, rc);
299	}
300	else
301	{
302	/* No data follows */
303	rc = pHlp->pfnSSMPutBool(pSSM, false);
304	AssertRCReturn(rc, rc);
305	}
306	}
307	else
308	{
309	SVGA3dSurfaceImageId image;
310	image.sid = pSurface->id;
311	image.face = iArray;
312	image.mipmap = iMipmap;
313
314	VMSGA3D_BOX_DIMENSIONS dims;
315	rc = vmsvga3dGetBoxDimensions(pThisCC, &image, NULL, &dims);
316	AssertRCReturn(rc, rc);
317
318	VMSVGA3D_MAPPED_SURFACE map;
319	rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
320	if (RT_SUCCESS(rc))
321	{
322	/* Save mapped surface data. */
323	pHlp->pfnSSMPutBool(pSSM, true);
324	if (map.cbRow == map.cbRowPitch)
325	{
326	rc = pHlp->pfnSSMPutMem(pSSM, map.pvData, pMipmapLevel->cbSurface);
327	AssertRCReturn(rc, rc);
328	}
329	else
330	{
331	uint8_t pu8Map = (uint8_t )map.pvData;
332	for (uint32_t z = 0; z < map.box.d; ++z)
333	{
334	uint8_t *pu8MapPlane = pu8Map;
335	for (uint32_t y = 0; y < dims.cyBlocks; ++y)
336	{
337	rc = pHlp->pfnSSMPutMem(pSSM, pu8MapPlane, dims.cbRow);
338	AssertRCReturn(rc, rc);
339
340	pu8MapPlane += map.cbRowPitch;
341	}
342	pu8Map += map.cbDepthPitch;
343	}
344	}
345
346	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, false);
347	}
348	else
349	{
350	AssertFailed();
351
352	/* No data follows */
353	rc = pHlp->pfnSSMPutBool(pSSM, false);
354	AssertRCReturn(rc, rc);
355	}
356	}
357	}
358	}
359
360	return VINF_SUCCESS;
361	}
362
363	static int vmsvga3dDXSaveContext(PCPDMDEVHLPR3 pHlp, PVGASTATECC pThisCC, PSSMHANDLE pSSM, PVMSVGA3DDXCONTEXT pDXContext)
364	{
365	PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State;
366	int rc;
367
368	rc = pHlp->pfnSSMPutU32(pSSM, pDXContext->cid);
369	AssertRCReturn(rc, rc);
370
371	if (pDXContext->cid == SVGA3D_INVALID_ID)
372	return VINF_SUCCESS;
373
374	/* Save the context. */
375	pHlp->pfnSSMPutU32(pSSM, sizeof(SVGADXContextMobFormat));
376	pHlp->pfnSSMPutMem(pSSM, &pDXContext->svgaDXContext, sizeof(SVGADXContextMobFormat));
377
378	rc = pHlp->pfnSSMPutU32(pSSM, RT_ELEMENTS(pDXContext->aCOTMobs));
379	AssertLogRelRCReturn(rc, rc);
380	for (unsigned i = 0; i < RT_ELEMENTS(pDXContext->aCOTMobs); ++i)
381	{
382	uint32_t const mobId = vmsvgaR3MobId(pDXContext->aCOTMobs[i]);
383	rc = pHlp->pfnSSMPutU32(pSSM, mobId);
384	AssertLogRelRCReturn(rc, rc);
385	}
386
387	struct
388	{
389	uint32_t cEntries;
390	uint32_t cbEntry;
391	void *paEntries;
392	} cot[] =
393	{
394	{pDXContext->cot.cRTView, sizeof(SVGACOTableDXRTViewEntry), pDXContext->cot.paRTView},
395	{pDXContext->cot.cDSView, sizeof(SVGACOTableDXDSViewEntry), pDXContext->cot.paDSView},
396	{pDXContext->cot.cSRView, sizeof(SVGACOTableDXSRViewEntry), pDXContext->cot.paSRView},
397	{pDXContext->cot.cElementLayout, sizeof(SVGACOTableDXElementLayoutEntry), pDXContext->cot.paElementLayout},
398	{pDXContext->cot.cBlendState, sizeof(SVGACOTableDXBlendStateEntry), pDXContext->cot.paBlendState},
399	{pDXContext->cot.cDepthStencil, sizeof(SVGACOTableDXDepthStencilEntry), pDXContext->cot.paDepthStencil},
400	{pDXContext->cot.cRasterizerState, sizeof(SVGACOTableDXRasterizerStateEntry), pDXContext->cot.paRasterizerState},
401	{pDXContext->cot.cSampler, sizeof(SVGACOTableDXSamplerEntry), pDXContext->cot.paSampler},
402	{pDXContext->cot.cStreamOutput, sizeof(SVGACOTableDXStreamOutputEntry), pDXContext->cot.paStreamOutput},
403	{pDXContext->cot.cQuery, sizeof(SVGACOTableDXQueryEntry), pDXContext->cot.paQuery},
404	{pDXContext->cot.cShader, sizeof(SVGACOTableDXShaderEntry), pDXContext->cot.paShader},
405	{pDXContext->cot.cUAView, sizeof(SVGACOTableDXUAViewEntry), pDXContext->cot.paUAView},
406	};
407
408	AssertCompile(RT_ELEMENTS(cot) == RT_ELEMENTS(pDXContext->aCOTMobs));
409	for (unsigned i = 0; i < RT_ELEMENTS(cot); ++i)
410	{
411	pHlp->pfnSSMPutU32(pSSM, cot[i].cEntries);
412	rc = pHlp->pfnSSMPutU32(pSSM, cot[i].cbEntry);
413	AssertLogRelRCReturn(rc, rc);
414	}
415
416	rc = pSvgaR3State->pFuncsDX->pfnDXSaveState(pThisCC, pDXContext, pHlp, pSSM);
417	AssertRCReturn(rc, rc);
418
419	return VINF_SUCCESS;
420	}
421
422	int vmsvga3dDXSaveExec(PPDMDEVINS pDevIns, PVGASTATECC pThisCC, PSSMHANDLE pSSM)
423	{
424	PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
425	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
426	int rc;
427
428	/*
429	* VMSVGA3DSTATE
430	*/
431	pHlp->pfnSSMPutU32(pSSM, p3dState->cSurfaces);
432	rc = pHlp->pfnSSMPutU32(pSSM, p3dState->cDXContexts);
433	AssertRCReturn(rc, rc);
434
435	/*
436	* Surfaces
437	*/
438	for (uint32_t sid = 0; sid < p3dState->cSurfaces; ++sid)
439	{
440	rc = vmsvga3dDXSaveSurface(pHlp, pThisCC, pSSM, p3dState->papSurfaces[sid]);
441	AssertRCReturn(rc, rc);
442	}
443
444	/*
445	* DX contexts
446	*/
447	for (uint32_t cid = 0; cid < p3dState->cDXContexts; ++cid)
448	{
449	rc = vmsvga3dDXSaveContext(pHlp, pThisCC, pSSM, p3dState->papDXContexts[cid]);
450	AssertRCReturn(rc, rc);
451	}
452
453	return VINF_SUCCESS;
454	}

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-savedstate.cpp@ 97405

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