DevVGA-SVGA3d-dx-dx11.cpp@ 105381

Last change on this file since 105381 was 105264, checked in by vboxsync, 8 months ago
Devices/Graphics: suppress multisample flag for some formats. bugref:10717
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 503.6 KB

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1	/* $Id: DevVGA-SVGA3d-dx-dx11.cpp 105264 2024-07-10 16:37:59Z vboxsync $ */
2	/** @file
3	* DevVMWare - VMWare SVGA device
4	*/
5
6	/*
7	* Copyright (C) 2020-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33	#include <VBox/AssertGuest.h>
34	#include <VBox/log.h>
35	#include <VBox/vmm/pdmdev.h>
36	#include <VBox/vmm/pgm.h>
37
38	#include <iprt/asm-mem.h>
39	#include <iprt/assert.h>
40	#include <iprt/errcore.h>
41	#include <iprt/mem.h>
42
43	#include <VBoxVideo.h> /* required by DevVGA.h */
44	#include <VBoxVideo3D.h>
45
46	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
47	#include "DevVGA.h"
48
49	#include "DevVGA-SVGA.h"
50	#include "DevVGA-SVGA3d.h"
51	#include "DevVGA-SVGA3d-internal.h"
52	#include "DevVGA-SVGA3d-dx-shader.h"
53
54	/* d3d11_1.h has a structure field named 'Status' but Status is defined as int on Linux host */
55	#if defined(Status)
56	#undef Status
57	#endif
58	#ifndef RT_OS_WINDOWS
59	# pragma GCC diagnostic push
60	# pragma GCC diagnostic ignored "-Wpedantic"
61	#endif
62	#include <d3d11_1.h>
63	#ifndef RT_OS_WINDOWS
64	# pragma GCC diagnostic pop
65	#endif
66
67
68	#ifdef RT_OS_WINDOWS
69	# define VBOX_D3D11_LIBRARY_NAME "d3d11"
70	#else
71	# define VBOX_D3D11_LIBRARY_NAME "VBoxDxVk"
72	#endif
73
74	/* One ID3D11Device object is used for all VMSVGA guest contexts because the VGPU design makes resources
75	* independent from rendering contexts. I.e. multiple guest contexts freely access a surface.
76	*
77	* The initial implementation of this backend has used separate ID3D11Devices for each VMSVGA context
78	* and created shared resources to allow one ID3D11Device to access a resource which was rendered to by
79	* another ID3D11Device. This synchronization of access to shared resources kills performance actually.
80	*/
81
82	/* A single staging ID3D11Buffer is used for uploading data to other buffers. */
83	#define DX_COMMON_STAGING_BUFFER
84	/* Always flush after submitting a draw call for debugging. */
85	//#define DX_FLUSH_AFTER_DRAW
86
87	#define D3D_RELEASE_ARRAY(a_Count, a_papArray) do { \
88	for (uint32_t i = 0; i < (a_Count); ++i) \
89	D3D_RELEASE((a_papArray)[i]); \
90	} while (0)
91
92	typedef struct D3D11BLITTER
93	{
94	ID3D11Device1 *pDevice;
95	ID3D11DeviceContext1 *pImmediateContext;
96
97	ID3D11VertexShader *pVertexShader;
98	ID3D11PixelShader *pPixelShader;
99	ID3D11SamplerState *pSamplerState;
100	ID3D11RasterizerState1 *pRasterizerState;
101	ID3D11BlendState1 *pBlendState;
102	} D3D11BLITTER;
103
104	typedef struct DXDEVICE
105	{
106	ID3D11Device1 pDevice; / Device. */
107	ID3D11DeviceContext1 pImmediateContext; / Corresponding context. */
108	IDXGIFactory pDxgiFactory; / DXGI Factory. */
109	D3D_FEATURE_LEVEL FeatureLevel;
110
111	uint32_t MultisampleCountMask; /* 1 << (MSCount - 1) for MSCount = 2, 4, 8, 16, 32 */
112
113	ID3D11VideoDevice *pVideoDevice;
114	ID3D11VideoContext *pVideoContext;
115	#ifdef DX_COMMON_STAGING_BUFFER
116	/* Staging buffer for transfer to surface buffers. */
117	ID3D11Buffer pStagingBuffer; / The staging buffer resource. */
118	uint32_t cbStagingBuffer; /* Current size of the staging buffer resource. */
119	#endif
120
121	D3D11BLITTER Blitter; /* Blits one texture to another. */
122	} DXDEVICE;
123
124	/* Kind of a texture view. */
125	typedef enum VMSVGA3DBACKVIEWTYPE
126	{
127	VMSVGA3D_VIEWTYPE_NONE = 0,
128	VMSVGA3D_VIEWTYPE_RENDERTARGET = 1,
129	VMSVGA3D_VIEWTYPE_DEPTHSTENCIL = 2,
130	VMSVGA3D_VIEWTYPE_SHADERRESOURCE = 3,
131	VMSVGA3D_VIEWTYPE_UNORDEREDACCESS = 4,
132	VMSVGA3D_VIEWTYPE_VIDEODECODEROUTPUT = 5,
133	VMSVGA3D_VIEWTYPE_VIDEOPROCESSORINPUT = 6,
134	VMSVGA3D_VIEWTYPE_VIDEOPROCESSOROUTPUT = 7
135	} VMSVGA3DBACKVIEWTYPE;
136
137	/* Information about a texture view to track all created views:.
138	* when a surface is invalidated, then all views must deleted;
139	* when a view is deleted, then the view must be unlinked from the surface.
140	*/
141	typedef struct DXVIEWINFO
142	{
143	uint32_t sid; /* Surface which the view was created for. */
144	uint32_t cid; /* DX context which created the view. */
145	uint32_t viewId; /* View id assigned by the guest. */
146	VMSVGA3DBACKVIEWTYPE enmViewType;
147	} DXVIEWINFO;
148
149	/* Context Object Table element for a texture view. */
150	typedef struct DXVIEW
151	{
152	uint32_t cid; /* DX context which created the view. */
153	uint32_t sid; /* Surface which the view was created for. */
154	uint32_t viewId; /* View id assigned by the guest. */
155	VMSVGA3DBACKVIEWTYPE enmViewType;
156
157	union
158	{
159	ID3D11View pView; / The view object. */
160	ID3D11RenderTargetView *pRenderTargetView;
161	ID3D11DepthStencilView *pDepthStencilView;
162	ID3D11ShaderResourceView *pShaderResourceView;
163	ID3D11UnorderedAccessView *pUnorderedAccessView;
164	ID3D11VideoDecoderOutputView *pVideoDecoderOutputView;
165	ID3D11VideoProcessorInputView *pVideoProcessorInputView;
166	ID3D11VideoProcessorOutputView *pVideoProcessorOutputView;
167	} u;
168
169	RTLISTNODE nodeSurfaceView; /* Views are linked to the surface. */
170	} DXVIEW;
171
172	/* What kind of resource has been created for the VMSVGA3D surface. */
173	typedef enum VMSVGA3DBACKRESTYPE
174	{
175	VMSVGA3D_RESTYPE_NONE = 0,
176	VMSVGA3D_RESTYPE_TEXTURE_1D = 1,
177	VMSVGA3D_RESTYPE_TEXTURE_2D = 2,
178	VMSVGA3D_RESTYPE_TEXTURE_CUBE = 3,
179	VMSVGA3D_RESTYPE_TEXTURE_3D = 4,
180	VMSVGA3D_RESTYPE_BUFFER = 5,
181	} VMSVGA3DBACKRESTYPE;
182
183	typedef struct VMSVGA3DBACKENDSURFACE
184	{
185	VMSVGA3DBACKRESTYPE enmResType;
186	DXGI_FORMAT enmDxgiFormat;
187	union
188	{
189	ID3D11Resource *pResource;
190	ID3D11Texture1D *pTexture1D;
191	ID3D11Texture2D *pTexture2D;
192	ID3D11Texture3D *pTexture3D;
193	ID3D11Buffer *pBuffer;
194	} u;
195
196	/* For updates from memory. */
197	union /** @todo One per format. */
198	{
199	ID3D11Resource *pResource;
200	ID3D11Texture1D *pTexture1D;
201	ID3D11Texture2D *pTexture2D;
202	ID3D11Texture3D *pTexture3D;
203	#ifndef DX_COMMON_STAGING_BUFFER
204	ID3D11Buffer *pBuffer;
205	#endif
206	} dynamic;
207
208	/* For reading the texture content. */
209	union /** @todo One per format. */
210	{
211	ID3D11Resource *pResource;
212	ID3D11Texture1D *pTexture1D;
213	ID3D11Texture2D *pTexture2D;
214	ID3D11Texture3D *pTexture3D;
215	#ifndef DX_COMMON_STAGING_BUFFER
216	ID3D11Buffer *pBuffer;
217	#endif
218	} staging;
219
220	/* Render target views, depth stencil views and shader resource views created for this texture or buffer. */
221	RTLISTANCHOR listView; /* DXVIEW */
222
223	} VMSVGA3DBACKENDSURFACE;
224
225
226	typedef struct VMSVGAHWSCREEN
227	{
228	ID3D11Texture2D pTexture; / Shared texture for the screen content. Only used as CopyResource target. */
229	IDXGIResource pDxgiResource; / Interface of the texture. */
230	IDXGIKeyedMutex pDXGIKeyedMutex; / Synchronization interface for the render device. */
231	HANDLE SharedHandle; /* The shared handle of this structure. */
232	uint32_t sidScreenTarget; /* The source surface for this screen. */
233	} VMSVGAHWSCREEN;
234
235
236	typedef struct DXELEMENTLAYOUT
237	{
238	ID3D11InputLayout *pElementLayout;
239	uint32_t cElementDesc;
240	D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
241	} DXELEMENTLAYOUT;
242
243	typedef struct DXSHADER
244	{
245	SVGA3dShaderType enmShaderType;
246	union
247	{
248	ID3D11DeviceChild pShader; / All. */
249	ID3D11VertexShader pVertexShader; / SVGA3D_SHADERTYPE_VS */
250	ID3D11PixelShader pPixelShader; / SVGA3D_SHADERTYPE_PS */
251	ID3D11GeometryShader pGeometryShader; / SVGA3D_SHADERTYPE_GS */
252	ID3D11HullShader pHullShader; / SVGA3D_SHADERTYPE_HS */
253	ID3D11DomainShader pDomainShader; / SVGA3D_SHADERTYPE_DS */
254	ID3D11ComputeShader pComputeShader; / SVGA3D_SHADERTYPE_CS */
255	};
256	void *pvDXBC;
257	uint32_t cbDXBC;
258
259	uint32_t soid; /* Stream output declarations for geometry shaders. */
260
261	DXShaderInfo shaderInfo;
262	} DXSHADER;
263
264	typedef struct DXQUERY
265	{
266	union
267	{
268	ID3D11Query *pQuery;
269	ID3D11Predicate *pPredicate;
270	};
271	} DXQUERY;
272
273	typedef struct DXVIDEOPROCESSOR
274	{
275	ID3D11VideoProcessorEnumerator *pEnum;
276	ID3D11VideoProcessor *pVideoProcessor;
277	} DXVIDEOPROCESSOR;
278
279	typedef struct DXVIDEODECODER
280	{
281	ID3D11VideoDecoder *pVideoDecoder;
282	} DXVIDEODECODER;
283
284	typedef struct DXSTREAMOUTPUT
285	{
286	UINT cDeclarationEntry;
287	D3D11_SO_DECLARATION_ENTRY aDeclarationEntry[SVGA3D_MAX_STREAMOUT_DECLS];
288	} DXSTREAMOUTPUT;
289
290	typedef struct DXBOUNDVERTEXBUFFER
291	{
292	ID3D11Buffer *pBuffer;
293	uint32_t stride;
294	uint32_t offset;
295	} DXBOUNDVERTEXBUFFER;
296
297	typedef struct DXBOUNDINDEXBUFFER
298	{
299	ID3D11Buffer *pBuffer;
300	DXGI_FORMAT indexBufferFormat;
301	uint32_t indexBufferOffset;
302	} DXBOUNDINDEXBUFFER;
303
304	typedef struct DXBOUNDRESOURCES /* Currently bound resources. Mirror SVGADXContextMobFormat structure. */
305	{
306	struct
307	{
308	ID3D11Buffer *constantBuffers[SVGA3D_DX_MAX_CONSTBUFFERS];
309	} shaderState[SVGA3D_NUM_SHADERTYPE];
310	} DXBOUNDRESOURCES;
311
312
313	typedef struct VMSVGA3DBACKENDDXCONTEXT
314	{
315	/* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
316	uint32_t cBlendState; /* Number of entries in the papBlendState array. */
317	uint32_t cDepthStencilState; /* papDepthStencilState */
318	uint32_t cSamplerState; /* papSamplerState */
319	uint32_t cRasterizerState; /* papRasterizerState */
320	uint32_t cElementLayout; /* paElementLayout */
321	uint32_t cRenderTargetView; /* paRenderTargetView */
322	uint32_t cDepthStencilView; /* paDepthStencilView */
323	uint32_t cShaderResourceView; /* paShaderResourceView */
324	uint32_t cQuery; /* paQuery */
325	uint32_t cShader; /* paShader */
326	uint32_t cStreamOutput; /* paStreamOutput */
327	uint32_t cUnorderedAccessView; /* paUnorderedAccessView */
328	ID3D11BlendState1 **papBlendState;
329	ID3D11DepthStencilState **papDepthStencilState;
330	ID3D11SamplerState **papSamplerState;
331	ID3D11RasterizerState1 **papRasterizerState;
332	DXELEMENTLAYOUT *paElementLayout;
333	DXVIEW *paRenderTargetView;
334	DXVIEW *paDepthStencilView;
335	DXVIEW *paShaderResourceView;
336	DXQUERY *paQuery;
337	DXSHADER *paShader;
338	DXSTREAMOUTPUT *paStreamOutput;
339	DXVIEW *paUnorderedAccessView;
340
341	uint32_t cVideoProcessor; /* paVideoProcessor */
342	uint32_t cVideoDecoderOutputView; /* paVideoDecoderOutputView */
343	uint32_t cVideoDecoder; /* paVideoDecoder */
344	uint32_t cVideoProcessorInputView; /* paVideoProcessorInputView */
345	uint32_t cVideoProcessorOutputView; /* paVideoProcessorOutputView */
346	DXVIDEOPROCESSOR *paVideoProcessor;
347	DXVIEW *paVideoDecoderOutputView;
348	DXVIDEODECODER *paVideoDecoder;
349	DXVIEW *paVideoProcessorInputView;
350	DXVIEW *paVideoProcessorOutputView;
351
352	uint32_t cSOTarget; /* How many SO targets are currently set (SetSOTargets) */
353
354	DXBOUNDRESOURCES resources;
355	} VMSVGA3DBACKENDDXCONTEXT;
356
357	/* Shader disassembler function. Optional. */
358	typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
359	typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
360
361	typedef struct VMSVGA3DBACKEND
362	{
363	RTLDRMOD hD3D11;
364	PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
365
366	RTLDRMOD hD3DCompiler;
367	PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
368
369	DXDEVICE dxDevice;
370	UINT VendorId;
371	UINT DeviceId;
372
373	SVGADXContextMobFormat svgaDXContext; /* Current state of pipeline. */
374
375	DXBOUNDRESOURCES resources; /* What is currently applied to the pipeline. */
376	} VMSVGA3DBACKEND;
377
378
379	/* Static function prototypes. */
380	static int dxDeviceFlush(DXDEVICE *pDevice);
381	static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
382	static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
383	static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface);
384	static int dxDestroyShader(DXSHADER *pDXShader);
385	static int dxDestroyQuery(DXQUERY *pDXQuery);
386	static int dxReadBuffer(DXDEVICE pDevice, ID3D11Buffer pBuffer, UINT Offset, UINT Bytes, void *ppvData, uint32_t pcbData);
387
388	static int dxCreateVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGACOTableDXVideoProcessorEntry const *pEntry);
389	static void dxDestroyVideoProcessor(DXVIDEOPROCESSOR *pDXVideoProcessor);
390	static int dxCreateVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGACOTableDXVideoDecoderEntry const *pEntry);
391	static void dxDestroyVideoDecoder(DXVIDEODECODER *pDXVideoDecoder);
392
393	static HRESULT BlitInit(D3D11BLITTER pBlitter, ID3D11Device1 pDevice, ID3D11DeviceContext1 *pImmediateContext);
394	static void BlitRelease(D3D11BLITTER *pBlitter);
395
396
397	/* This is not available with the DXVK headers for some reason. */
398	#ifndef RT_OS_WINDOWS
399	typedef enum D3D11_TEXTURECUBE_FACE {
400	D3D11_TEXTURECUBE_FACE_POSITIVE_X,
401	D3D11_TEXTURECUBE_FACE_NEGATIVE_X,
402	D3D11_TEXTURECUBE_FACE_POSITIVE_Y,
403	D3D11_TEXTURECUBE_FACE_NEGATIVE_Y,
404	D3D11_TEXTURECUBE_FACE_POSITIVE_Z,
405	D3D11_TEXTURECUBE_FACE_NEGATIVE_Z
406	} D3D11_TEXTURECUBE_FACE;
407	#endif
408
409
410	#if 0 /* unused */
411	DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace)
412	{
413	D3D11_TEXTURECUBE_FACE Face;
414	switch (iFace)
415	{
416	case 0: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_X; break;
417	case 1: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_X; break;
418	case 2: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Y; break;
419	case 3: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Y; break;
420	case 4: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Z; break;
421	default:
422	case 5: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Z; break;
423	}
424	return Face;
425	}
426	#endif
427
428	/* This is to workaround issues with X8 formats, because they can't be used in some operations. */
429	#define DX_REPLACE_X8_WITH_A8
430	static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
431	{
432	/* Ensure that correct headers are used.
433	* SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
434	*/
435	AssertCompile(SVGA3D_AYUV == 152);
436
437	#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
438	/** @todo More formats. */
439	switch (format)
440	{
441	#ifdef DX_REPLACE_X8_WITH_A8
442	case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
443	#else
444	case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
445	#endif
446	case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
447	case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
448	case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
449	case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
450	case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
451	case SVGA3D_Z_D32: break;
452	case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
453	case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
454	case SVGA3D_Z_D15S1: break;
455	case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
456	case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
457	case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
458	case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
459	case SVGA3D_DXT1: return DXGI_FORMAT_;
460	case SVGA3D_DXT2: return DXGI_FORMAT_;
461	case SVGA3D_DXT3: return DXGI_FORMAT_;
462	case SVGA3D_DXT4: return DXGI_FORMAT_;
463	case SVGA3D_DXT5: return DXGI_FORMAT_;
464	case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
465	case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
466	case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
467	case SVGA3D_FORMAT_DEAD1: break;
468	case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
469	case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
470	case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
471	case SVGA3D_V8U8: return DXGI_FORMAT_;
472	case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
473	case SVGA3D_CxV8U8: return DXGI_FORMAT_;
474	case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
475	case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
476	case SVGA3D_ALPHA8: return DXGI_FORMAT_;
477	case SVGA3D_R_S10E5: return DXGI_FORMAT_;
478	case SVGA3D_R_S23E8: return DXGI_FORMAT_;
479	case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
480	case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
481	case SVGA3D_BUFFER: return DXGI_FORMAT_;
482	case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
483	case SVGA3D_V16U16: return DXGI_FORMAT_;
484	case SVGA3D_G16R16: return DXGI_FORMAT_;
485	case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
486	case SVGA3D_UYVY: return DXGI_FORMAT_;
487	case SVGA3D_YUY2: return DXGI_FORMAT_YUY2;
488	case SVGA3D_NV12: return DXGI_FORMAT_NV12;
489	case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
490	case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
491	case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
492	case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
493	case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
494	case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
495	case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
496	case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
497	case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
498	case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
499	case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
500	case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
501	case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
502	case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
503	case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
504	case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
505	case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
506	case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
507	case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
508	case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
509	case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
510	case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
511	case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
512	case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
513	case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
514	case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
515	case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
516	case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
517	case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
518	case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
519	case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
520	case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
521	case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
522	case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
523	case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
524	case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
525	case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
526	case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
527	case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
528	case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
529	case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
530	case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
531	case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
532	case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
533	case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
534	case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
535	case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
536	case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
537	case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
538	case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
539	case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
540	case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
541	case SVGA3D_P8: break;
542	case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
543	case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
544	case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
545	case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
546	case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
547	case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
548	case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
549	case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
550	case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
551	case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
552	case SVGA3D_ATI1: break;
553	case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
554	case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
555	case SVGA3D_ATI2: break;
556	case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
557	case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
558	case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
559	case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
560	#ifdef DX_REPLACE_X8_WITH_A8
561	case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
562	case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
563	#else
564	case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
565	case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
566	#endif
567	case SVGA3D_Z_DF16: break;
568	case SVGA3D_Z_DF24: break;
569	case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
570	case SVGA3D_YV12: break;
571	case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
572	case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
573	case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
574	case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
575	case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
576	case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
577	case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
578	case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
579	case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
580	case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
581	case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
582	case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
583	case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
584	case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
585	case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
586	case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
587	case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
588	case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
589	case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
590	case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
591	#ifdef DX_REPLACE_X8_WITH_A8
592	case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
593	#else
594	case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
595	#endif
596	case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
597	case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
598
599	case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
600	case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_BC6H_TYPELESS;
601	case SVGA3D_BC6H_UF16: return DXGI_FORMAT_BC6H_UF16;
602	case SVGA3D_BC6H_SF16: return DXGI_FORMAT_BC6H_SF16;
603	case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_BC7_TYPELESS;
604	case SVGA3D_BC7_UNORM: return DXGI_FORMAT_BC7_UNORM;
605	case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_BC7_UNORM_SRGB;
606	case SVGA3D_AYUV: return DXGI_FORMAT_AYUV;
607
608	case SVGA3D_FORMAT_INVALID:
609	case SVGA3D_FORMAT_MAX: break;
610	}
611	// AssertFailed();
612	return DXGI_FORMAT_UNKNOWN;
613	#undef DXGI_FORMAT_
614	}
615
616
617	static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
618	{
619	switch (enmDevCap)
620	{
621	case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
622	case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
623	case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
624	case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
625	case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
626	case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
627	case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
628	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
629	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
630	case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
631	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
632	case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
633	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
634	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
635	case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
636	case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
637	case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
638	case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
639	case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
640	case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
641	case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
642	case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
643	case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
644	case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
645	case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
646	case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
647	case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
648	case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
649	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
650	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
651	case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
652	case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
653	case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
654	case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
655	case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
656	case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
657	case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
658	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
659	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
660	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
661	case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
662	case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
663	case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
664	default:
665	AssertFailed();
666	break;
667	}
668	return SVGA3D_FORMAT_INVALID;
669	}
670
671
672	static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
673	{
674	switch (enmDevCap)
675	{
676	case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
677	case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
678	case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
679	case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
680	case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
681	case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
682	case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
683	case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
684	case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
685	case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
686	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
687	case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
688	case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
689	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
690	case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
691	case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
692	case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
693	case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
694	case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
695	case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
696	case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
697	case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
698	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
699	case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
700	case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
701	case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
702	case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
703	case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
704	case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
705	case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
706	case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
707	case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
708	case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
709	case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
710	case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
711	case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
712	case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
713	case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
714	case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
715	case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
716	case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
717	case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
718	case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
719	case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
720	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
721	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
722	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
723	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
724	case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
725	case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
726	case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
727	case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
728	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
729	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
730	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
731	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
732	case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
733	case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
734	case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
735	case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
736	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
737	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
738	case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
739	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
740	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
741	case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
742	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
743	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
744	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
745	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
746	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
747	case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
748	case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
749	case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
750	case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
751	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
752	case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
753	case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
754	case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
755	case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
756	case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
757	case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
758	case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
759	case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
760	case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
761	case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
762	case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
763	case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
764	case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
765	case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
766	case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
767	case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
768	case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
769	case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
770	case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
771	case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
772	case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
773	case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
774	case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
775	case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
776	case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
777	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
778	case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
779	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
780	case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
781	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
782	case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
783	case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
784	case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
785	case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
786	case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
787	case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
788	case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
789	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
790	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
791	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
792	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
793	case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
794	case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
795	case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
796	case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
797	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
798	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
799	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
800	case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
801	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
802	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
803	case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
804	case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
805	case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
806	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
807	case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
808	case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
809	case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
810	case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
811	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
812	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
813	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
814	case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
815	case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
816	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
817	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
818	case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
819	case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
820	case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
821	case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
822	case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
823	case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
824	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
825	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
826	default:
827	AssertFailed();
828	break;
829	}
830	return SVGA3D_FORMAT_INVALID;
831	}
832
833
834	static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
835	{
836	int rc = VINF_SUCCESS;
837
838	*pu32DevCap = 0;
839
840	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
841	if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
842	{
843	RT_NOREF(pState);
844	/** @todo Implement */
845	}
846	else
847	rc = VERR_NOT_SUPPORTED;
848	return rc;
849	}
850
851	static int dxFormatAllowMultisample(DXGI_FORMAT dxgiFormat)
852	{
853	/* Windows 11 guest does not allow multisample flag for a number of formats.
854	* D3D11 implementation on non-Windows hosts might return such flag.
855	*/
856	switch (dxgiFormat)
857	{
858	case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS:
859	case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT:
860	case DXGI_FORMAT_R24_UNORM_X8_TYPELESS:
861	case DXGI_FORMAT_X24_TYPELESS_G8_UINT:
862	return false;
863	default: break;
864	}
865	return true;
866	}
867
868	static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
869	{
870	int rc = VINF_SUCCESS;
871
872	*pu32DevCap = 0;
873
874	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
875	if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
876	{
877	ID3D11Device *pDevice = pState->pBackend->dxDevice.pDevice;
878	UINT FormatSupport = 0;
879	HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
880	if (SUCCEEDED(hr))
881	{
882	*pu32DevCap \|= SVGA3D_DXFMT_SUPPORTED;
883
884	if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
885	*pu32DevCap \|= SVGA3D_DXFMT_SHADER_SAMPLE;
886
887	if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
888	*pu32DevCap \|= SVGA3D_DXFMT_COLOR_RENDERTARGET;
889
890	if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
891	*pu32DevCap \|= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
892
893	if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
894	*pu32DevCap \|= SVGA3D_DXFMT_BLENDABLE;
895
896	if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
897	*pu32DevCap \|= SVGA3D_DXFMT_MIPS;
898
899	if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
900	*pu32DevCap \|= SVGA3D_DXFMT_ARRAY;
901
902	if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
903	*pu32DevCap \|= SVGA3D_DXFMT_VOLUME;
904
905	if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
906	*pu32DevCap \|= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
907
908	if (pState->pBackend->dxDevice.MultisampleCountMask != 0)
909	{
910	UINT NumQualityLevels;
911	hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
912	if (SUCCEEDED(hr) && NumQualityLevels != 0 && dxFormatAllowMultisample(dxgiFormat))
913	*pu32DevCap \|= SVGA3D_DXFMT_MULTISAMPLE;
914	}
915	}
916	else
917	{
918	LogFunc(("CheckFormatSupport failed for 0x%08x, hr = 0x%08x\n", dxgiFormat, hr));
919	rc = VERR_NOT_SUPPORTED;
920	}
921	}
922	else
923	rc = VERR_NOT_SUPPORTED;
924	return rc;
925	}
926
927
928	static void dxLogRelVideoCaps(ID3D11VideoDevice *pVideoDevice)
929	{
930	#define FORMAT_ELEMENT(aFormat) { aFormat, #aFormat }
931	static const struct {
932	DXGI_FORMAT format;
933	char const *pszFormat;
934	} aVDFormats[] =
935	{
936	FORMAT_ELEMENT(DXGI_FORMAT_NV12),
937	FORMAT_ELEMENT(DXGI_FORMAT_YUY2),
938	FORMAT_ELEMENT(DXGI_FORMAT_AYUV),
939	};
940
941	static const struct {
942	DXGI_FORMAT format;
943	char const *pszFormat;
944	} aVPFormats[] =
945	{
946	// Queried from driver
947	FORMAT_ELEMENT(DXGI_FORMAT_R8_UNORM),
948	FORMAT_ELEMENT(DXGI_FORMAT_R16_UNORM),
949	FORMAT_ELEMENT(DXGI_FORMAT_NV12),
950	FORMAT_ELEMENT(DXGI_FORMAT_420_OPAQUE),
951	FORMAT_ELEMENT(DXGI_FORMAT_P010),
952	FORMAT_ELEMENT(DXGI_FORMAT_P016),
953	FORMAT_ELEMENT(DXGI_FORMAT_YUY2),
954	FORMAT_ELEMENT(DXGI_FORMAT_NV11),
955	FORMAT_ELEMENT(DXGI_FORMAT_AYUV),
956	FORMAT_ELEMENT(DXGI_FORMAT_R16G16B16A16_FLOAT),
957	FORMAT_ELEMENT(DXGI_FORMAT_Y216),
958	FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8X8_UNORM),
959	FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8A8_UNORM),
960	FORMAT_ELEMENT(DXGI_FORMAT_R8G8B8A8_UNORM),
961	FORMAT_ELEMENT(DXGI_FORMAT_R10G10B10A2_UNORM),
962
963	// From format table
964	FORMAT_ELEMENT(DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM),
965	FORMAT_ELEMENT(DXGI_FORMAT_R8G8B8A8_UNORM_SRGB),
966	FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8A8_UNORM_SRGB),
967	FORMAT_ELEMENT(DXGI_FORMAT_Y410),
968	FORMAT_ELEMENT(DXGI_FORMAT_Y416),
969	FORMAT_ELEMENT(DXGI_FORMAT_Y210),
970	FORMAT_ELEMENT(DXGI_FORMAT_AI44),
971	FORMAT_ELEMENT(DXGI_FORMAT_IA44),
972	FORMAT_ELEMENT(DXGI_FORMAT_P8),
973	FORMAT_ELEMENT(DXGI_FORMAT_A8P8),
974	};
975	#undef FORMAT_ELEMENT
976
977	static char const *apszFilterName[] =
978	{
979	"BRIGHTNESS",
980	"CONTRAST",
981	"HUE",
982	"SATURATION",
983	"NOISE_REDUCTION",
984	"EDGE_ENHANCEMENT",
985	"ANAMORPHIC_SCALING",
986	"STEREO_ADJUSTMENT",
987	};
988
989	HRESULT hr;
990
991	UINT cProfiles = pVideoDevice->GetVideoDecoderProfileCount();
992	for (UINT i = 0; i < cProfiles; ++i)
993	{
994	GUID DecodeProfile;
995	hr = pVideoDevice->GetVideoDecoderProfile(i, &DecodeProfile);
996	if (SUCCEEDED(hr))
997	LogRel(("VMSVGA: DecodeProfile[%d]: %RTuuid\n", i, &DecodeProfile));
998	}
999
1000	D3D11_VIDEO_DECODER_DESC DecoderDesc;
1001	// Commonly used D3D11_DECODER_PROFILE_H264_VLD_NOFGT
1002	DecoderDesc.Guid = { 0x1b81be68, 0xa0c7,0x11d3,0xb9,0x84,0x00,0xc0,0x4f,0x2e,0x73,0xc5 };
1003	DecoderDesc.SampleWidth = 1920;
1004	DecoderDesc.SampleHeight = 1080;
1005	DecoderDesc.OutputFormat = DXGI_FORMAT_NV12;
1006
1007	UINT cConfigs = 0;
1008	hr = pVideoDevice->GetVideoDecoderConfigCount(&DecoderDesc, &cConfigs);
1009	for (UINT i = 0; i < cConfigs; ++i)
1010	{
1011	D3D11_VIDEO_DECODER_CONFIG DecoderConfig;
1012	hr = pVideoDevice->GetVideoDecoderConfig(&DecoderDesc, i, &DecoderConfig);
1013	if (SUCCEEDED(hr))
1014	{
1015	LogRel2(("VMSVGA: Config[%d]:\n"
1016	"VMSVGA: %RTuuid\n"
1017	"VMSVGA: %RTuuid\n"
1018	"VMSVGA: %RTuuid\n"
1019	"VMSVGA: BitstreamRaw 0x%x\n"
1020	"VMSVGA: MBCRO 0x%x\n"
1021	"VMSVGA: RDH 0x%x\n"
1022	"VMSVGA: SR8 0x%x\n"
1023	"VMSVGA: R8Sub 0x%x\n"
1024	"VMSVGA: SH8or9C 0x%x\n"
1025	"VMSVGA: SRInterlea 0x%x\n"
1026	"VMSVGA: IRUnsigned 0x%x\n"
1027	"VMSVGA: RDAccel 0x%x\n"
1028	"VMSVGA: HInvScan 0x%x\n"
1029	"VMSVGA: SpecIDCT 0x%x\n"
1030	"VMSVGA: 4GCoefs 0x%x\n"
1031	"VMSVGA: MinRTBC 0x%x\n"
1032	"VMSVGA: DecSpec 0x%x\n"
1033	,
1034	i, &DecoderConfig.guidConfigBitstreamEncryption,
1035	&DecoderConfig.guidConfigMBcontrolEncryption,
1036	&DecoderConfig.guidConfigResidDiffEncryption,
1037	DecoderConfig.ConfigBitstreamRaw,
1038	DecoderConfig.ConfigMBcontrolRasterOrder,
1039	DecoderConfig.ConfigResidDiffHost,
1040	DecoderConfig.ConfigSpatialResid8,
1041	DecoderConfig.ConfigResid8Subtraction,
1042	DecoderConfig.ConfigSpatialHost8or9Clipping,
1043	DecoderConfig.ConfigSpatialResidInterleaved,
1044	DecoderConfig.ConfigIntraResidUnsigned,
1045	DecoderConfig.ConfigResidDiffAccelerator,
1046	DecoderConfig.ConfigHostInverseScan,
1047	DecoderConfig.ConfigSpecificIDCT,
1048	DecoderConfig.Config4GroupedCoefs,
1049	DecoderConfig.ConfigMinRenderTargetBuffCount,
1050	DecoderConfig.ConfigDecoderSpecific
1051	));
1052	}
1053	}
1054
1055	for (UINT idxFormat = 0; idxFormat < RT_ELEMENTS(aVDFormats); ++idxFormat)
1056	{
1057	BOOL Supported;
1058	hr = pVideoDevice->CheckVideoDecoderFormat(&DecoderDesc.Guid, aVDFormats[idxFormat].format, &Supported);
1059	if (FAILED(hr))
1060	Supported = FALSE;
1061	LogRel(("VMSVGA: %s: %s\n", aVDFormats[idxFormat].pszFormat, Supported ? "supported" : "-"));
1062	}
1063
1064	/* An arbitrary common video content. */
1065	D3D11_VIDEO_PROCESSOR_CONTENT_DESC Desc;
1066	Desc.InputFrameFormat = D3D11_VIDEO_FRAME_FORMAT_PROGRESSIVE;
1067	Desc.InputFrameRate.Numerator = 25;
1068	Desc.InputFrameRate.Denominator = 1;
1069	Desc.InputWidth = 1920;
1070	Desc.InputHeight = 1080;
1071	Desc.OutputFrameRate.Numerator = 30;
1072	Desc.OutputFrameRate.Denominator = 1;
1073	Desc.OutputWidth = 864;
1074	Desc.OutputHeight = 486;
1075	Desc.Usage = D3D11_VIDEO_USAGE_OPTIMAL_QUALITY;
1076
1077	ID3D11VideoProcessorEnumerator *pEnum = 0;
1078	hr = pVideoDevice->CreateVideoProcessorEnumerator(&Desc, &pEnum);
1079	if (SUCCEEDED(hr))
1080	{
1081	for (unsigned i = 0; i < RT_ELEMENTS(aVPFormats); ++i)
1082	{
1083	UINT Flags;
1084	hr = pEnum->CheckVideoProcessorFormat(aVPFormats[i].format, &Flags);
1085	if (FAILED(hr))
1086	Flags = 0;
1087	LogRel(("VMSVGA: %s: flags %x\n", aVPFormats[i].pszFormat, Flags));
1088	}
1089
1090	D3D11_VIDEO_PROCESSOR_CAPS Caps;
1091	hr = pEnum->GetVideoProcessorCaps(&Caps);
1092	if (SUCCEEDED(hr))
1093	{
1094	LogRel(("VMSVGA: VideoProcessorCaps:\n"
1095	"VMSVGA: DeviceCaps %x\n"
1096	"VMSVGA: FeatureCaps %x\n"
1097	"VMSVGA: FilterCaps %x\n"
1098	"VMSVGA: InputFormatCaps %x\n"
1099	"VMSVGA: AutoStreamCaps %x\n"
1100	"VMSVGA: StereoCaps %x\n"
1101	"VMSVGA: RateConversionCapsCount %d\n"
1102	"VMSVGA: MaxInputStreams %d\n"
1103	"VMSVGA: MaxStreamStates %d\n"
1104	"",
1105	Caps.DeviceCaps,
1106	Caps.FeatureCaps,
1107	Caps.FilterCaps,
1108	Caps.InputFormatCaps,
1109	Caps.AutoStreamCaps,
1110	Caps.StereoCaps,
1111	Caps.RateConversionCapsCount,
1112	Caps.MaxInputStreams,
1113	Caps.MaxStreamStates
1114	));
1115
1116	for (unsigned i = 0; i < RT_ELEMENTS(apszFilterName); ++i)
1117	{
1118	if (Caps.FilterCaps & (1 << i))
1119	{
1120	D3D11_VIDEO_PROCESSOR_FILTER_RANGE Range;
1121	hr = pEnum->GetVideoProcessorFilterRange((D3D11_VIDEO_PROCESSOR_FILTER)i, &Range);
1122	if (SUCCEEDED(hr))
1123	{
1124	LogRel(("VMSVGA: Filter[%s]: Min %d, Max %d, Default %d, Multiplier " FLOAT_FMT_STR "\n",
1125	apszFilterName[i],
1126	Range.Minimum,
1127	Range.Maximum,
1128	Range.Default,
1129	FLOAT_FMT_ARGS(Range.Multiplier)
1130	));
1131	}
1132	}
1133	}
1134
1135	for (unsigned idxRateCaps = 0; idxRateCaps < Caps.RateConversionCapsCount; ++idxRateCaps)
1136	{
1137	D3D11_VIDEO_PROCESSOR_RATE_CONVERSION_CAPS RateCaps;
1138	hr = pEnum->GetVideoProcessorRateConversionCaps(idxRateCaps, &RateCaps);
1139	if (SUCCEEDED(hr))
1140	{
1141	LogRel(("VMSVGA: RateConversionCaps[%u]:\n"
1142	"VMSVGA: PastFrames %d\n"
1143	"VMSVGA: FutureFrames %d\n"
1144	"VMSVGA: ProcessorCaps %x\n"
1145	"VMSVGA: ITelecineCaps %x\n"
1146	"VMSVGA: CustomRateCount %d\n"
1147	"",
1148	idxRateCaps,
1149	RateCaps.PastFrames,
1150	RateCaps.FutureFrames,
1151	RateCaps.ProcessorCaps,
1152	RateCaps.ITelecineCaps,
1153	RateCaps.CustomRateCount
1154	));
1155
1156	for (unsigned idxCustomRateCap = 0; idxCustomRateCap < RateCaps.CustomRateCount; ++idxCustomRateCap)
1157	{
1158	D3D11_VIDEO_PROCESSOR_CUSTOM_RATE Rate;
1159	hr = pEnum->GetVideoProcessorCustomRate(idxRateCaps, idxCustomRateCap, &Rate);
1160	if (SUCCEEDED(hr))
1161	{
1162	LogRel(("VMSVGA: CustomRate[%u][%u]:\n"
1163	"VMSVGA: CustomRate %d/%d\n"
1164	"VMSVGA: OutputFrames %d\n"
1165	"VMSVGA: InputInterlaced %d\n"
1166	"VMSVGA: InputFramesOrFields %d\n"
1167	"",
1168	idxRateCaps, idxCustomRateCap,
1169	Rate.CustomRate.Numerator,
1170	Rate.CustomRate.Denominator,
1171	Rate.OutputFrames,
1172	Rate.InputInterlaced,
1173	Rate.InputFramesOrFields
1174	));
1175	}
1176	}
1177	}
1178	}
1179	}
1180
1181	D3D_RELEASE(pEnum);
1182	}
1183	}
1184
1185
1186	static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDXDevice)
1187	{
1188	int rc = VINF_SUCCESS;
1189
1190	IDXGIAdapter pAdapter = NULL; / Default adapter. */
1191	static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
1192	{
1193	D3D_FEATURE_LEVEL_11_1,
1194	D3D_FEATURE_LEVEL_11_0
1195	};
1196	UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
1197	#ifdef DEBUG
1198	Flags \|= D3D11_CREATE_DEVICE_DEBUG;
1199	#endif
1200
1201	ID3D11Device *pDevice = 0;
1202	ID3D11DeviceContext *pImmediateContext = 0;
1203	HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1204	D3D_DRIVER_TYPE_HARDWARE,
1205	NULL,
1206	Flags,
1207	s_aFeatureLevels,
1208	RT_ELEMENTS(s_aFeatureLevels),
1209	D3D11_SDK_VERSION,
1210	&pDevice,
1211	&pDXDevice->FeatureLevel,
1212	&pImmediateContext);
1213	#ifdef DEBUG
1214	if (FAILED(hr))
1215	{
1216	/* Device creation may fail because _DEBUG flag requires "D3D11 SDK Layers for Windows 10" ("Graphics Tools"):
1217	* Settings/System/Apps/Optional features/Add a feature/Graphics Tools
1218	* Retry without the flag.
1219	*/
1220	Flags &= ~D3D11_CREATE_DEVICE_DEBUG;
1221	hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1222	D3D_DRIVER_TYPE_HARDWARE,
1223	NULL,
1224	Flags,
1225	s_aFeatureLevels,
1226	RT_ELEMENTS(s_aFeatureLevels),
1227	D3D11_SDK_VERSION,
1228	&pDevice,
1229	&pDXDevice->FeatureLevel,
1230	&pImmediateContext);
1231	}
1232	#endif
1233
1234	if (SUCCEEDED(hr))
1235	{
1236	LogRel(("VMSVGA: Feature level %#x\n", pDXDevice->FeatureLevel));
1237
1238	hr = pDevice->QueryInterface(__uuidof(ID3D11Device1), (void**)&pDXDevice->pDevice);
1239	AssertReturnStmt(SUCCEEDED(hr),
1240	D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDevice),
1241	VERR_NOT_SUPPORTED);
1242
1243	hr = pImmediateContext->QueryInterface(__uuidof(ID3D11DeviceContext1), (void**)&pDXDevice->pImmediateContext);
1244	AssertReturnStmt(SUCCEEDED(hr),
1245	D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDXDevice->pDevice); D3D_RELEASE(pDevice),
1246	VERR_NOT_SUPPORTED);
1247
1248	HRESULT hr2;
1249	#ifdef DEBUG
1250	/* Break into debugger when DX runtime detects anything unusual. */
1251	ID3D11Debug *pDebug = 0;
1252	hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1253	if (SUCCEEDED(hr2))
1254	{
1255	ID3D11InfoQueue *pInfoQueue = 0;
1256	hr2 = pDebug->QueryInterface(__uuidof(ID3D11InfoQueue), (void**)&pInfoQueue);
1257	if (SUCCEEDED(hr2))
1258	{
1259	pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_CORRUPTION, true);
1260	// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_ERROR, true);
1261	// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_WARNING, true);
1262
1263	/* No breakpoints for the following messages. */
1264	D3D11_MESSAGE_ID saIgnoredMessageIds[] =
1265	{
1266	/* Message ID: Caused by: */
1267	D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_TYPE_MISMATCH, /* Autogenerated input signatures. */
1268	D3D11_MESSAGE_ID_LIVE_DEVICE, /* Live object report. Does not seem to prevent a breakpoint. */
1269	(D3D11_MESSAGE_ID)3146081 /DEVICE_DRAW_RENDERTARGETVIEW_NOT_SET/, /* U. */
1270	D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_NOT_SET, /* U. */
1271	D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_MISMATCH, /* U. */
1272	D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_EMPTY_LAYOUT, /* P. */
1273	D3D11_MESSAGE_ID_DEVICE_SHADER_LINKAGE_REGISTERMASK, /* S. */
1274	};
1275
1276	D3D11_INFO_QUEUE_FILTER filter;
1277	RT_ZERO(filter);
1278	filter.DenyList.NumIDs = RT_ELEMENTS(saIgnoredMessageIds);
1279	filter.DenyList.pIDList = saIgnoredMessageIds;
1280	pInfoQueue->AddStorageFilterEntries(&filter);
1281
1282	D3D_RELEASE(pInfoQueue);
1283	}
1284	D3D_RELEASE(pDebug);
1285	}
1286	#endif
1287
1288	IDXGIDevice *pDxgiDevice = 0;
1289	hr = pDXDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
1290	if (SUCCEEDED(hr))
1291	{
1292	IDXGIAdapter *pDxgiAdapter = 0;
1293	hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
1294	if (SUCCEEDED(hr))
1295	{
1296	hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDXDevice->pDxgiFactory);
1297	D3D_RELEASE(pDxgiAdapter);
1298	}
1299
1300	D3D_RELEASE(pDxgiDevice);
1301	}
1302
1303	/* Failure to query VideoDevice should be ignored. */
1304	hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11VideoDevice), (void**)&pDXDevice->pVideoDevice);
1305	Assert(SUCCEEDED(hr2));
1306	if (SUCCEEDED(hr2))
1307	{
1308	hr2 = pDXDevice->pImmediateContext->QueryInterface(__uuidof(ID3D11VideoContext), (void**)&pDXDevice->pVideoContext);
1309	Assert(SUCCEEDED(hr2));
1310	if (SUCCEEDED(hr2))
1311	{
1312	LogRel(("VMSVGA: VideoDevice available\n"));
1313	}
1314	else
1315	{
1316	D3D_RELEASE(pDXDevice->pVideoDevice);
1317	pDXDevice->pVideoContext = NULL;
1318	}
1319	}
1320	else
1321	pDXDevice->pVideoDevice = NULL;
1322	}
1323
1324	if (SUCCEEDED(hr))
1325	BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
1326	else
1327	rc = VERR_NOT_SUPPORTED;
1328
1329	if (SUCCEEDED(hr))
1330	{
1331	/* Query multisample support for a common format. */
1332	DXGI_FORMAT const dxgiFormat = DXGI_FORMAT_B8G8R8A8_UNORM;
1333
1334	for (uint32_t i = 2; i <= D3D11_MAX_MULTISAMPLE_SAMPLE_COUNT; i *= 2)
1335	{
1336	UINT NumQualityLevels = 0;
1337	HRESULT hr2 = pDXDevice->pDevice->CheckMultisampleQualityLevels(dxgiFormat, i, &NumQualityLevels);
1338	if (SUCCEEDED(hr2) && NumQualityLevels > 0)
1339	pDXDevice->MultisampleCountMask \|= UINT32_C(1) << (i - 1);
1340	}
1341	}
1342	return rc;
1343	}
1344
1345
1346	static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
1347	{
1348	RT_NOREF(pBackend);
1349
1350	BlitRelease(&pDevice->Blitter);
1351
1352	#ifdef DX_COMMON_STAGING_BUFFER
1353	D3D_RELEASE(pDevice->pStagingBuffer);
1354	#endif
1355
1356	D3D_RELEASE(pDevice->pVideoDevice);
1357	D3D_RELEASE(pDevice->pVideoContext);
1358
1359	D3D_RELEASE(pDevice->pDxgiFactory);
1360	D3D_RELEASE(pDevice->pImmediateContext);
1361
1362	#ifdef DEBUG
1363	HRESULT hr2;
1364	ID3D11Debug *pDebug = 0;
1365	hr2 = pDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1366	if (SUCCEEDED(hr2))
1367	{
1368	/// @todo Use this to see whether all resources have been properly released.
1369	//DEBUG_BREAKPOINT_TEST();
1370	//pDebug->ReportLiveDeviceObjects(D3D11_RLDO_DETAIL \| (D3D11_RLDO_FLAGS)0x4 /D3D11_RLDO_IGNORE_INTERNAL/);
1371	D3D_RELEASE(pDebug);
1372	}
1373	#endif
1374
1375	D3D_RELEASE(pDevice->pDevice);
1376	RT_ZERO(*pDevice);
1377	}
1378
1379
1380	static void dxViewAddToList(PVGASTATECC pThisCC, DXVIEW *pDXView)
1381	{
1382	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1383	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1384
1385	Assert(pDXView->u.pView); /* Only already created views should be added. Guard against mis-use by callers. */
1386
1387	PVMSVGA3DSURFACE pSurface;
1388	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDXView->sid, &pSurface);
1389	AssertRCReturnVoid(rc);
1390
1391	RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1392	}
1393
1394
1395	static void dxViewRemoveFromList(DXVIEW *pDXView)
1396	{
1397	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1398	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1399	/* pView can be NULL, if COT entry is already empty. */
1400	if (pDXView->u.pView)
1401	{
1402	Assert(pDXView->nodeSurfaceView.pNext && pDXView->nodeSurfaceView.pPrev);
1403	RTListNodeRemove(&pDXView->nodeSurfaceView);
1404	}
1405	}
1406
1407
1408	static int dxViewDestroy(DXVIEW *pDXView)
1409	{
1410	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1411	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1412	if (pDXView->u.pView)
1413	{
1414	D3D_RELEASE(pDXView->u.pView);
1415	RTListNodeRemove(&pDXView->nodeSurfaceView);
1416	RT_ZERO(*pDXView);
1417	}
1418
1419	return VINF_SUCCESS;
1420	}
1421
1422
1423	static int dxViewInit(DXVIEW pDXView, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT pDXContext, uint32_t viewId, VMSVGA3DBACKVIEWTYPE enmViewType, ID3D11View *pView)
1424	{
1425	pDXView->cid = pDXContext->cid;
1426	pDXView->sid = pSurface->id;
1427	pDXView->viewId = viewId;
1428	pDXView->enmViewType = enmViewType;
1429	pDXView->u.pView = pView;
1430	RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1431
1432	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1433	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1434
1435	DXVIEW pIter, pNext;
1436	RTListForEachSafe(&pSurface->pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
1437	{
1438	AssertPtr(pNext);
1439	LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
1440	}
1441
1442	return VINF_SUCCESS;
1443	}
1444
1445
1446	static DXDEVICE *dxDeviceGet(PVMSVGA3DSTATE p3dState)
1447	{
1448	DXDEVICE *pDXDevice = &p3dState->pBackend->dxDevice;
1449	#ifdef DEBUG
1450	HRESULT hr = pDXDevice->pDevice->GetDeviceRemovedReason();
1451	Assert(SUCCEEDED(hr));
1452	#endif
1453	return pDXDevice;
1454	}
1455
1456
1457	static int dxDeviceFlush(DXDEVICE *pDevice)
1458	{
1459	/** @todo Should the flush follow the query submission? */
1460	pDevice->pImmediateContext->Flush();
1461
1462	ID3D11Query *pQuery = 0;
1463	D3D11_QUERY_DESC qd;
1464	RT_ZERO(qd);
1465	qd.Query = D3D11_QUERY_EVENT;
1466
1467	HRESULT hr = pDevice->pDevice->CreateQuery(&qd, &pQuery);
1468	Assert(hr == S_OK); RT_NOREF(hr);
1469	pDevice->pImmediateContext->End(pQuery);
1470
1471	BOOL queryData;
1472	while (pDevice->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
1473	RTThreadYield();
1474
1475	D3D_RELEASE(pQuery);
1476
1477	return VINF_SUCCESS;
1478	}
1479
1480
1481	static ID3D11Resource *dxResource(PVMSVGA3DSURFACE pSurface)
1482	{
1483	VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
1484	if (!pBackendSurface)
1485	AssertFailedReturn(NULL);
1486	return pBackendSurface->u.pResource;
1487	}
1488
1489	// Not used
1490	#if 0
1491	static uint32_t dxGetRenderTargetViewSid(PVMSVGA3DDXCONTEXT pDXContext, uint32_t renderTargetViewId)
1492	{
1493	ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, SVGA_ID_INVALID);
1494
1495	SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1496	return pRTViewEntry->sid;
1497	}
1498	#endif
1499
1500	static int dxDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const pEntry, DXSHADER pDXShader)
1501	{
1502	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1503	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1504
1505	/* Make D3D11_SO_DECLARATION_ENTRY array from SVGA3dStreamOutputDeclarationEntry. */
1506	SVGA3dStreamOutputDeclarationEntry const *paDecls;
1507	PVMSVGAMOB pMob = NULL;
1508	if (pEntry->usesMob)
1509	{
1510	pMob = vmsvgaR3MobGet(pSvgaR3State, pEntry->mobid);
1511	ASSERT_GUEST_RETURN(pMob, VERR_INVALID_PARAMETER);
1512
1513	/* Create a memory pointer for the MOB, which is accessible by host. */
1514	int rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1515	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1516
1517	/* Get pointer to the shader bytecode. This will also verify the offset. */
1518	paDecls = (SVGA3dStreamOutputDeclarationEntry const *)vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1519	AssertReturnStmt(paDecls, vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob), VERR_INTERNAL_ERROR);
1520	}
1521	else
1522	paDecls = &pEntry->decl[0];
1523
1524	pDXStreamOutput->cDeclarationEntry = pEntry->numOutputStreamEntries;
1525	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1526	{
1527	D3D11_SO_DECLARATION_ENTRY *pDst = &pDXStreamOutput->aDeclarationEntry[i];
1528	SVGA3dStreamOutputDeclarationEntry const *pSrc = &paDecls[i];
1529
1530	uint32_t const registerMask = pSrc->registerMask & 0xF;
1531	unsigned const iFirstBit = ASMBitFirstSetU32(registerMask);
1532	unsigned const iLastBit = ASMBitLastSetU32(registerMask);
1533
1534	pDst->Stream = pSrc->stream;
1535	pDst->SemanticName = NULL; /* Semantic name and index will be taken from the shader output declaration. */
1536	pDst->SemanticIndex = 0;
1537	pDst->StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;
1538	pDst->ComponentCount = iFirstBit > 0 ? iLastBit - (iFirstBit - 1) : 0;
1539	pDst->OutputSlot = pSrc->outputSlot;
1540	}
1541
1542	uint32_t MaxSemanticIndex = 0;
1543	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1544	{
1545	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1546	SVGA3dStreamOutputDeclarationEntry const *decl = &paDecls[i];
1547
1548	/* Find the corresponding register and mask in the GS shader output. */
1549	int idxFound = -1;
1550	for (uint32_t iOutputEntry = 0; iOutputEntry < pDXShader->shaderInfo.cOutputSignature; ++iOutputEntry)
1551	{
1552	SVGA3dDXSignatureEntry const *pOutputEntry = &pDXShader->shaderInfo.aOutputSignature[iOutputEntry];
1553	if ( pOutputEntry->registerIndex == decl->registerIndex
1554	&& (decl->registerMask & ~pOutputEntry->mask) == 0) /* SO decl mask is a subset of shader output mask. */
1555	{
1556	idxFound = iOutputEntry;
1557	break;
1558	}
1559	}
1560
1561	if (idxFound >= 0)
1562	{
1563	DXShaderAttributeSemantic const *pOutputSemantic = &pDXShader->shaderInfo.aOutputSemantic[idxFound];
1564	pDeclarationEntry->SemanticName = pOutputSemantic->pcszSemanticName;
1565	pDeclarationEntry->SemanticIndex = pOutputSemantic->SemanticIndex;
1566	MaxSemanticIndex = RT_MAX(MaxSemanticIndex, pOutputSemantic->SemanticIndex);
1567	}
1568	else
1569	AssertFailed();
1570	}
1571
1572	/* A geometry shader may return components of the same register as different attributes:
1573	*
1574	* Output signature
1575	* Name Index Mask Register
1576	* ATTRIB 2 xy 2
1577	* ATTRIB 3 z 2
1578	*
1579	* For ATTRIB 3 the stream output declaration expects StartComponent = 0 and ComponentCount = 1
1580	* (not StartComponent = 2 and ComponentCount = 1):
1581	*
1582	* Stream output declaration
1583	* SemanticName SemanticIndex StartComponent ComponentCount
1584	* ATTRIB 2 0 2
1585	* ATTRIB 3 0 1
1586	*
1587	* Stream output declaration can have multiple entries for the same attribute.
1588	* In this case StartComponent is the offset within the attribute.
1589	*
1590	* Output signature
1591	* Name Index Mask Register
1592	* ATTRIB 0 xyzw 0
1593	*
1594	* Stream output declaration
1595	* SemanticName SemanticIndex StartComponent ComponentCount
1596	* ATTRIB 0 0 1
1597	* ATTRIB 0 1 1
1598	*
1599	* StartComponent has been computed as the component offset in a register:
1600	* 'StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;'.
1601	*
1602	* StartComponent must be the offset in an attribute.
1603	*/
1604	for (uint32_t SemanticIndex = 0; SemanticIndex <= MaxSemanticIndex; ++SemanticIndex)
1605	{
1606	/* Find minimum StartComponent value for this attribute. */
1607	uint32_t MinStartComponent = UINT32_MAX;
1608	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1609	{
1610	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1611	if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1612	MinStartComponent = RT_MIN(MinStartComponent, pDeclarationEntry->StartComponent);
1613	}
1614
1615	AssertContinue(MinStartComponent != UINT32_MAX);
1616
1617	/* Adjust the StartComponent to start from 0 for this attribute. */
1618	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1619	{
1620	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1621	if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1622	pDeclarationEntry->StartComponent -= MinStartComponent;
1623	}
1624	}
1625
1626	if (pMob)
1627	vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1628
1629	return VINF_SUCCESS;
1630	}
1631
1632	static void dxDestroyStreamOutput(DXSTREAMOUTPUT *pDXStreamOutput)
1633	{
1634	RT_ZERO(*pDXStreamOutput);
1635	}
1636
1637	static D3D11_BLEND dxBlendFactorAlpha(uint8_t svgaBlend)
1638	{
1639	/* "Blend options that end in _COLOR are not allowed." but the guest sometimes sends them. */
1640	switch (svgaBlend)
1641	{
1642	case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1643	case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1644	case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_ALPHA;
1645	case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_ALPHA;
1646	case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1647	case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1648	case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1649	case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1650	case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_ALPHA;
1651	case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_ALPHA;
1652	case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1653	case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1654	case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1655	case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_ALPHA;
1656	case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_ALPHA;
1657	case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1658	case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1659	case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1660	case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1661	default:
1662	break;
1663	}
1664	return D3D11_BLEND_ZERO;
1665	}
1666
1667
1668	static D3D11_BLEND dxBlendFactorColor(uint8_t svgaBlend)
1669	{
1670	switch (svgaBlend)
1671	{
1672	case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1673	case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1674	case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_COLOR;
1675	case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_COLOR;
1676	case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1677	case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1678	case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1679	case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1680	case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_COLOR;
1681	case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_COLOR;
1682	case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1683	case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1684	case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1685	case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_COLOR;
1686	case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_COLOR;
1687	case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1688	case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1689	case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1690	case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1691	default:
1692	break;
1693	}
1694	return D3D11_BLEND_ZERO;
1695	}
1696
1697
1698	static D3D11_BLEND_OP dxBlendOp(uint8_t svgaBlendEq)
1699	{
1700	return (D3D11_BLEND_OP)svgaBlendEq;
1701	}
1702
1703
1704	static D3D11_LOGIC_OP dxLogicOp(uint8_t svgaLogicEq)
1705	{
1706	return (D3D11_LOGIC_OP)svgaLogicEq;
1707	}
1708
1709
1710	/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
1711	static HRESULT dxBlendStateCreate(DXDEVICE pDevice, SVGACOTableDXBlendStateEntry const pEntry, ID3D11BlendState1 **pp)
1712	{
1713	D3D11_BLEND_DESC1 BlendDesc;
1714	BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
1715	BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
1716	for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
1717	{
1718	BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
1719	BlendDesc.RenderTarget[i].LogicOpEnable = RT_BOOL(pEntry->perRT[i].logicOpEnable);
1720	BlendDesc.RenderTarget[i].SrcBlend = dxBlendFactorColor(pEntry->perRT[i].srcBlend);
1721	BlendDesc.RenderTarget[i].DestBlend = dxBlendFactorColor(pEntry->perRT[i].destBlend);
1722	BlendDesc.RenderTarget[i].BlendOp = dxBlendOp (pEntry->perRT[i].blendOp);
1723	BlendDesc.RenderTarget[i].SrcBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].srcBlendAlpha);
1724	BlendDesc.RenderTarget[i].DestBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].destBlendAlpha);
1725	BlendDesc.RenderTarget[i].BlendOpAlpha = dxBlendOp (pEntry->perRT[i].blendOpAlpha);
1726	BlendDesc.RenderTarget[i].LogicOp = dxLogicOp (pEntry->perRT[i].logicOp);
1727	BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
1728	}
1729
1730	HRESULT hr = pDevice->pDevice->CreateBlendState1(&BlendDesc, pp);
1731	Assert(SUCCEEDED(hr));
1732	return hr;
1733	}
1734
1735
1736	static HRESULT dxDepthStencilStateCreate(DXDEVICE pDevice, SVGACOTableDXDepthStencilEntry const pEntry, ID3D11DepthStencilState **pp)
1737	{
1738	D3D11_DEPTH_STENCIL_DESC desc;
1739	desc.DepthEnable = pEntry->depthEnable;
1740	desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
1741	desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
1742	desc.StencilEnable = pEntry->stencilEnable;
1743	desc.StencilReadMask = pEntry->stencilReadMask;
1744	desc.StencilWriteMask = pEntry->stencilWriteMask;
1745	desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
1746	desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
1747	desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
1748	desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
1749	desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
1750	desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
1751	desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
1752	desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
1753	/** @todo frontEnable, backEnable */
1754
1755	HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
1756	Assert(SUCCEEDED(hr));
1757	return hr;
1758	}
1759
1760
1761	static HRESULT dxSamplerStateCreate(DXDEVICE pDevice, SVGACOTableDXSamplerEntry const pEntry, ID3D11SamplerState **pp)
1762	{
1763	D3D11_SAMPLER_DESC desc;
1764	/* Guest sometimes sends inconsistent (from D3D11 point of view) set of filter flags. */
1765	if (pEntry->filter & SVGA3D_FILTER_ANISOTROPIC)
1766	desc.Filter = (pEntry->filter & SVGA3D_FILTER_COMPARE)
1767	? D3D11_FILTER_COMPARISON_ANISOTROPIC
1768	: D3D11_FILTER_ANISOTROPIC;
1769	else
1770	desc.Filter = (D3D11_FILTER)pEntry->filter;
1771	desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
1772	desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
1773	desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
1774	desc.MipLODBias = pEntry->mipLODBias;
1775	desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
1776	desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
1777	desc.BorderColor[0] = pEntry->borderColor.value[0];
1778	desc.BorderColor[1] = pEntry->borderColor.value[1];
1779	desc.BorderColor[2] = pEntry->borderColor.value[2];
1780	desc.BorderColor[3] = pEntry->borderColor.value[3];
1781	desc.MinLOD = pEntry->minLOD;
1782	desc.MaxLOD = pEntry->maxLOD;
1783
1784	HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
1785	Assert(SUCCEEDED(hr));
1786	return hr;
1787	}
1788
1789
1790	static D3D11_FILL_MODE dxFillMode(uint8_t svgaFillMode)
1791	{
1792	if (svgaFillMode == SVGA3D_FILLMODE_POINT)
1793	return D3D11_FILL_WIREFRAME;
1794	return (D3D11_FILL_MODE)svgaFillMode;
1795	}
1796
1797
1798	static D3D11_CULL_MODE dxCullMode(uint8_t svgaCullMode)
1799	{
1800	return (D3D11_CULL_MODE)svgaCullMode;
1801	}
1802
1803
1804	static HRESULT dxRasterizerStateCreate(DXDEVICE pDevice, SVGACOTableDXRasterizerStateEntry const pEntry, ID3D11RasterizerState1 **pp)
1805	{
1806	D3D11_RASTERIZER_DESC1 desc;
1807	desc.FillMode = dxFillMode(pEntry->fillMode);
1808	desc.CullMode = dxCullMode(pEntry->cullMode);
1809	desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
1810	/** @todo provokingVertexLast */
1811	desc.DepthBias = pEntry->depthBias;
1812	desc.DepthBiasClamp = pEntry->depthBiasClamp;
1813	desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
1814	desc.DepthClipEnable = pEntry->depthClipEnable;
1815	desc.ScissorEnable = pEntry->scissorEnable;
1816	desc.MultisampleEnable = pEntry->multisampleEnable;
1817	desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
1818	desc.ForcedSampleCount = pEntry->forcedSampleCount;
1819	/** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern */
1820
1821	HRESULT hr = pDevice->pDevice->CreateRasterizerState1(&desc, pp);
1822	Assert(SUCCEEDED(hr));
1823	return hr;
1824	}
1825
1826
1827	static HRESULT dxRenderTargetViewCreate(PVGASTATECC pThisCC, SVGACOTableDXRTViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11RenderTargetView **pp)
1828	{
1829	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
1830
1831	ID3D11Resource *pResource = dxResource(pSurface);
1832
1833	D3D11_RENDER_TARGET_VIEW_DESC desc;
1834	RT_ZERO(desc);
1835	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1836	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
1837	switch (pEntry->resourceDimension)
1838	{
1839	case SVGA3D_RESOURCE_BUFFER:
1840	desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1841	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1842	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1843	break;
1844	case SVGA3D_RESOURCE_TEXTURE1D:
1845	if (pSurface->surfaceDesc.numArrayElements <= 1)
1846	{
1847	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
1848	desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1849	}
1850	else
1851	{
1852	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
1853	desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1854	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1855	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1856	}
1857	break;
1858	case SVGA3D_RESOURCE_TEXTURE2D:
1859	if (pSurface->surfaceDesc.numArrayElements <= 1)
1860	{
1861	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1862	? D3D11_RTV_DIMENSION_TEXTURE2DMS
1863	: D3D11_RTV_DIMENSION_TEXTURE2D;
1864	desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1865	}
1866	else
1867	{
1868	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1869	? D3D11_RTV_DIMENSION_TEXTURE2DMSARRAY
1870	: D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1871	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1872	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1873	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1874	}
1875	break;
1876	case SVGA3D_RESOURCE_TEXTURE3D:
1877	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
1878	desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1879	desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1880	desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1881	break;
1882	case SVGA3D_RESOURCE_TEXTURECUBE:
1883	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1884	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1885	desc.Texture2DArray.FirstArraySlice = 0;
1886	desc.Texture2DArray.ArraySize = 6;
1887	break;
1888	case SVGA3D_RESOURCE_BUFFEREX:
1889	AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1890	desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1891	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1892	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1893	break;
1894	default:
1895	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1896	}
1897
1898	HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
1899	Assert(SUCCEEDED(hr));
1900	return hr;
1901	}
1902
1903
1904	static HRESULT dxShaderResourceViewCreate(PVGASTATECC pThisCC, SVGACOTableDXSRViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11ShaderResourceView **pp)
1905	{
1906	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
1907
1908	ID3D11Resource *pResource = dxResource(pSurface);
1909
1910	D3D11_SHADER_RESOURCE_VIEW_DESC desc;
1911	RT_ZERO(desc);
1912	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1913	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
1914
1915	switch (pEntry->resourceDimension)
1916	{
1917	case SVGA3D_RESOURCE_BUFFER:
1918	desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
1919	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1920	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1921	break;
1922	case SVGA3D_RESOURCE_TEXTURE1D:
1923	if (pSurface->surfaceDesc.numArrayElements <= 1)
1924	{
1925	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
1926	desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1927	desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
1928	}
1929	else
1930	{
1931	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
1932	desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1933	desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
1934	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1935	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1936	}
1937	break;
1938	case SVGA3D_RESOURCE_TEXTURE2D:
1939	if (pSurface->surfaceDesc.numArrayElements <= 1)
1940	{
1941	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1942	? D3D11_SRV_DIMENSION_TEXTURE2DMS
1943	: D3D11_SRV_DIMENSION_TEXTURE2D;
1944	desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1945	desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
1946	}
1947	else
1948	{
1949	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1950	? D3D11_SRV_DIMENSION_TEXTURE2DMSARRAY
1951	: D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
1952	desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1953	desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
1954	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1955	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1956	}
1957	break;
1958	case SVGA3D_RESOURCE_TEXTURE3D:
1959	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
1960	desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1961	desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
1962	break;
1963	case SVGA3D_RESOURCE_TEXTURECUBE:
1964	if (pSurface->surfaceDesc.numArrayElements <= 6)
1965	{
1966	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
1967	desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1968	desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
1969	}
1970	else
1971	{
1972	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBEARRAY;
1973	desc.TextureCubeArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1974	desc.TextureCubeArray.MipLevels = pEntry->desc.tex.mipLevels;
1975	desc.TextureCubeArray.First2DArrayFace = pEntry->desc.tex.firstArraySlice;
1976	desc.TextureCubeArray.NumCubes = pEntry->desc.tex.arraySize / 6;
1977	}
1978	break;
1979	case SVGA3D_RESOURCE_BUFFEREX:
1980	AssertFailed(); /** @todo test. */
1981	desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
1982	desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
1983	desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
1984	desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
1985	break;
1986	default:
1987	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1988	}
1989
1990	HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
1991	Assert(SUCCEEDED(hr));
1992	return hr;
1993	}
1994
1995
1996	static HRESULT dxUnorderedAccessViewCreate(PVGASTATECC pThisCC, SVGACOTableDXUAViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11UnorderedAccessView **pp)
1997	{
1998	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
1999
2000	ID3D11Resource *pResource = dxResource(pSurface);
2001
2002	D3D11_UNORDERED_ACCESS_VIEW_DESC desc;
2003	RT_ZERO(desc);
2004	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
2005	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
2006
2007	switch (pEntry->resourceDimension)
2008	{
2009	case SVGA3D_RESOURCE_BUFFER:
2010	desc.ViewDimension = D3D11_UAV_DIMENSION_BUFFER;
2011	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
2012	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
2013	desc.Buffer.Flags = pEntry->desc.buffer.flags;
2014	break;
2015	case SVGA3D_RESOURCE_TEXTURE1D:
2016	if (pSurface->surfaceDesc.numArrayElements <= 1)
2017	{
2018	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1D;
2019	desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
2020	}
2021	else
2022	{
2023	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1DARRAY;
2024	desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
2025	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
2026	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
2027	}
2028	break;
2029	case SVGA3D_RESOURCE_TEXTURE2D:
2030	if (pSurface->surfaceDesc.numArrayElements <= 1)
2031	{
2032	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2D;
2033	desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
2034	}
2035	else
2036	{
2037	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2DARRAY;
2038	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
2039	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
2040	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
2041	}
2042	break;
2043	case SVGA3D_RESOURCE_TEXTURE3D:
2044	desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
2045	desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
2046	desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
2047	break;
2048	default:
2049	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2050	}
2051
2052	HRESULT hr = pDevice->pDevice->CreateUnorderedAccessView(pResource, &desc, pp);
2053	Assert(SUCCEEDED(hr));
2054	return hr;
2055	}
2056
2057
2058	static HRESULT dxDepthStencilViewCreate(PVGASTATECC pThisCC, SVGACOTableDXDSViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11DepthStencilView **pp)
2059	{
2060	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2061
2062	ID3D11Resource *pResource = dxResource(pSurface);
2063
2064	D3D11_DEPTH_STENCIL_VIEW_DESC desc;
2065	RT_ZERO(desc);
2066	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
2067	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
2068	desc.Flags = pEntry->flags;
2069	switch (pEntry->resourceDimension)
2070	{
2071	case SVGA3D_RESOURCE_TEXTURE1D:
2072	if (pSurface->surfaceDesc.numArrayElements <= 1)
2073	{
2074	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
2075	desc.Texture1D.MipSlice = pEntry->mipSlice;
2076	}
2077	else
2078	{
2079	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
2080	desc.Texture1DArray.MipSlice = pEntry->mipSlice;
2081	desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
2082	desc.Texture1DArray.ArraySize = pEntry->arraySize;
2083	}
2084	break;
2085	case SVGA3D_RESOURCE_TEXTURE2D:
2086	if (pSurface->surfaceDesc.numArrayElements <= 1)
2087	{
2088	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
2089	? D3D11_DSV_DIMENSION_TEXTURE2DMS
2090	: D3D11_DSV_DIMENSION_TEXTURE2D;
2091	desc.Texture2D.MipSlice = pEntry->mipSlice;
2092	}
2093	else
2094	{
2095	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
2096	? D3D11_DSV_DIMENSION_TEXTURE2DMSARRAY
2097	: D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
2098	desc.Texture2DArray.MipSlice = pEntry->mipSlice;
2099	desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
2100	desc.Texture2DArray.ArraySize = pEntry->arraySize;
2101	}
2102	break;
2103	default:
2104	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2105	}
2106
2107	HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
2108	Assert(SUCCEEDED(hr));
2109	return hr;
2110	}
2111
2112
2113	static HRESULT dxShaderCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
2114	{
2115	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2116
2117	HRESULT hr = S_OK;
2118
2119	switch (pDXShader->enmShaderType)
2120	{
2121	case SVGA3D_SHADERTYPE_VS:
2122	hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
2123	Assert(SUCCEEDED(hr));
2124	break;
2125	case SVGA3D_SHADERTYPE_PS:
2126	hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
2127	Assert(SUCCEEDED(hr));
2128	break;
2129	case SVGA3D_SHADERTYPE_GS:
2130	{
2131	SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
2132	if (soid == SVGA_ID_INVALID)
2133	{
2134	hr = pDevice->pDevice->CreateGeometryShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pGeometryShader);
2135	Assert(SUCCEEDED(hr));
2136	}
2137	else
2138	{
2139	ASSERT_GUEST_RETURN(soid < pDXContext->pBackendDXContext->cStreamOutput, E_INVALIDARG);
2140
2141	SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[soid];
2142	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
2143
2144	hr = pDevice->pDevice->CreateGeometryShaderWithStreamOutput(pDXShader->pvDXBC, pDXShader->cbDXBC,
2145	pDXStreamOutput->aDeclarationEntry, pDXStreamOutput->cDeclarationEntry,
2146	pEntry->numOutputStreamStrides ? pEntry->streamOutputStrideInBytes : NULL, pEntry->numOutputStreamStrides,
2147	pEntry->rasterizedStream,
2148	/pClassLinkage=/ NULL, &pDXShader->pGeometryShader);
2149	AssertBreak(SUCCEEDED(hr));
2150
2151	pDXShader->soid = soid;
2152	}
2153	break;
2154	}
2155	case SVGA3D_SHADERTYPE_HS:
2156	hr = pDevice->pDevice->CreateHullShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pHullShader);
2157	Assert(SUCCEEDED(hr));
2158	break;
2159	case SVGA3D_SHADERTYPE_DS:
2160	hr = pDevice->pDevice->CreateDomainShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pDomainShader);
2161	Assert(SUCCEEDED(hr));
2162	break;
2163	case SVGA3D_SHADERTYPE_CS:
2164	hr = pDevice->pDevice->CreateComputeShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pComputeShader);
2165	Assert(SUCCEEDED(hr));
2166	break;
2167	default:
2168	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2169	}
2170
2171	return hr;
2172	}
2173
2174
2175	static void dxShaderSet(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, DXSHADER *pDXShader)
2176	{
2177	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2178
2179	switch (type)
2180	{
2181	case SVGA3D_SHADERTYPE_VS:
2182	pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
2183	break;
2184	case SVGA3D_SHADERTYPE_PS:
2185	pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
2186	break;
2187	case SVGA3D_SHADERTYPE_GS:
2188	{
2189	Assert(!pDXShader \|\| (pDXShader->soid == pDXContext->svgaDXContext.streamOut.soid));
2190	RT_NOREF(pDXContext);
2191	pDevice->pImmediateContext->GSSetShader(pDXShader ? pDXShader->pGeometryShader : NULL, NULL, 0);
2192	} break;
2193	case SVGA3D_SHADERTYPE_HS:
2194	pDevice->pImmediateContext->HSSetShader(pDXShader ? pDXShader->pHullShader : NULL, NULL, 0);
2195	break;
2196	case SVGA3D_SHADERTYPE_DS:
2197	pDevice->pImmediateContext->DSSetShader(pDXShader ? pDXShader->pDomainShader : NULL, NULL, 0);
2198	break;
2199	case SVGA3D_SHADERTYPE_CS:
2200	pDevice->pImmediateContext->CSSetShader(pDXShader ? pDXShader->pComputeShader : NULL, NULL, 0);
2201	break;
2202	default:
2203	ASSERT_GUEST_FAILED_RETURN_VOID();
2204	}
2205	}
2206
2207
2208	static void dxConstantBufferSet(DXDEVICE pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer pConstantBuffer)
2209	{
2210	switch (type)
2211	{
2212	case SVGA3D_SHADERTYPE_VS:
2213	pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
2214	break;
2215	case SVGA3D_SHADERTYPE_PS:
2216	pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
2217	break;
2218	case SVGA3D_SHADERTYPE_GS:
2219	pDevice->pImmediateContext->GSSetConstantBuffers(slot, 1, &pConstantBuffer);
2220	break;
2221	case SVGA3D_SHADERTYPE_HS:
2222	pDevice->pImmediateContext->HSSetConstantBuffers(slot, 1, &pConstantBuffer);
2223	break;
2224	case SVGA3D_SHADERTYPE_DS:
2225	pDevice->pImmediateContext->DSSetConstantBuffers(slot, 1, &pConstantBuffer);
2226	break;
2227	case SVGA3D_SHADERTYPE_CS:
2228	pDevice->pImmediateContext->CSSetConstantBuffers(slot, 1, &pConstantBuffer);
2229	break;
2230	default:
2231	ASSERT_GUEST_FAILED_RETURN_VOID();
2232	}
2233	}
2234
2235
2236	static void dxSamplerSet(DXDEVICE pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState const *papSampler)
2237	{
2238	switch (type)
2239	{
2240	case SVGA3D_SHADERTYPE_VS:
2241	pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
2242	break;
2243	case SVGA3D_SHADERTYPE_PS:
2244	pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
2245	break;
2246	case SVGA3D_SHADERTYPE_GS:
2247	pDevice->pImmediateContext->GSSetSamplers(startSampler, cSampler, papSampler);
2248	break;
2249	case SVGA3D_SHADERTYPE_HS:
2250	pDevice->pImmediateContext->HSSetSamplers(startSampler, cSampler, papSampler);
2251	break;
2252	case SVGA3D_SHADERTYPE_DS:
2253	pDevice->pImmediateContext->DSSetSamplers(startSampler, cSampler, papSampler);
2254	break;
2255	case SVGA3D_SHADERTYPE_CS:
2256	pDevice->pImmediateContext->CSSetSamplers(startSampler, cSampler, papSampler);
2257	break;
2258	default:
2259	ASSERT_GUEST_FAILED_RETURN_VOID();
2260	}
2261	}
2262
2263
2264	static void dxShaderResourceViewSet(DXDEVICE pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView const *papShaderResourceView)
2265	{
2266	switch (type)
2267	{
2268	case SVGA3D_SHADERTYPE_VS:
2269	pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2270	break;
2271	case SVGA3D_SHADERTYPE_PS:
2272	pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2273	break;
2274	case SVGA3D_SHADERTYPE_GS:
2275	pDevice->pImmediateContext->GSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2276	break;
2277	case SVGA3D_SHADERTYPE_HS:
2278	pDevice->pImmediateContext->HSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2279	break;
2280	case SVGA3D_SHADERTYPE_DS:
2281	pDevice->pImmediateContext->DSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2282	break;
2283	case SVGA3D_SHADERTYPE_CS:
2284	pDevice->pImmediateContext->CSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2285	break;
2286	default:
2287	ASSERT_GUEST_FAILED_RETURN_VOID();
2288	}
2289	}
2290
2291
2292	static void dxCSUnorderedAccessViewSet(DXDEVICE pDevice, uint32_t startView, uint32_t cView, ID3D11UnorderedAccessView const papUnorderedAccessView, UINT pUAVInitialCounts)
2293	{
2294	pDevice->pImmediateContext->CSSetUnorderedAccessViews(startView, cView, papUnorderedAccessView, pUAVInitialCounts);
2295	}
2296
2297
2298	static int dxBackendSurfaceAlloc(PVMSVGA3DBACKENDSURFACE *ppBackendSurface)
2299	{
2300	PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
2301	AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
2302	RTListInit(&pBackendSurface->listView);
2303	*ppBackendSurface = pBackendSurface;
2304	return VINF_SUCCESS;
2305	}
2306
2307
2308	static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
2309	{
2310	/* Catch unimplemented flags. */
2311	Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS \| SVGA3D_SURFACE_BIND_RAW_VIEWS)));
2312
2313	UINT BindFlags = 0;
2314
2315	if (surfaceFlags & (SVGA3D_SURFACE_BIND_VERTEX_BUFFER \| SVGA3D_SURFACE_HINT_VERTEXBUFFER))
2316	BindFlags \|= D3D11_BIND_VERTEX_BUFFER;
2317	if (surfaceFlags & (SVGA3D_SURFACE_BIND_INDEX_BUFFER \| SVGA3D_SURFACE_HINT_INDEXBUFFER))
2318	BindFlags \|= D3D11_BIND_INDEX_BUFFER;
2319	if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags \|= D3D11_BIND_CONSTANT_BUFFER;
2320	if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags \|= D3D11_BIND_SHADER_RESOURCE;
2321	if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags \|= D3D11_BIND_RENDER_TARGET;
2322	if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags \|= D3D11_BIND_DEPTH_STENCIL;
2323	if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags \|= D3D11_BIND_STREAM_OUTPUT;
2324	if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags \|= D3D11_BIND_UNORDERED_ACCESS;
2325	if (surfaceFlags & SVGA3D_SURFACE_RESERVED1) BindFlags \|= D3D11_BIND_DECODER;
2326
2327	return BindFlags;
2328	}
2329
2330
2331	static DXGI_FORMAT dxGetDxgiTypelessFormat(DXGI_FORMAT dxgiFormat)
2332	{
2333	switch (dxgiFormat)
2334	{
2335	case DXGI_FORMAT_R32G32B32A32_FLOAT:
2336	case DXGI_FORMAT_R32G32B32A32_UINT:
2337	case DXGI_FORMAT_R32G32B32A32_SINT:
2338	return DXGI_FORMAT_R32G32B32A32_TYPELESS; /* 1 */
2339	case DXGI_FORMAT_R32G32B32_FLOAT:
2340	case DXGI_FORMAT_R32G32B32_UINT:
2341	case DXGI_FORMAT_R32G32B32_SINT:
2342	return DXGI_FORMAT_R32G32B32_TYPELESS; /* 5 */
2343	case DXGI_FORMAT_R16G16B16A16_FLOAT:
2344	case DXGI_FORMAT_R16G16B16A16_UNORM:
2345	case DXGI_FORMAT_R16G16B16A16_UINT:
2346	case DXGI_FORMAT_R16G16B16A16_SNORM:
2347	case DXGI_FORMAT_R16G16B16A16_SINT:
2348	return DXGI_FORMAT_R16G16B16A16_TYPELESS; /* 9 */
2349	case DXGI_FORMAT_R32G32_FLOAT:
2350	case DXGI_FORMAT_R32G32_UINT:
2351	case DXGI_FORMAT_R32G32_SINT:
2352	return DXGI_FORMAT_R32G32_TYPELESS; /* 15 */
2353	case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2354	case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS:
2355	case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT:
2356	return DXGI_FORMAT_R32G8X24_TYPELESS; /* 19 */
2357	case DXGI_FORMAT_R10G10B10A2_UNORM:
2358	case DXGI_FORMAT_R10G10B10A2_UINT:
2359	return DXGI_FORMAT_R10G10B10A2_TYPELESS; /* 23 */
2360	case DXGI_FORMAT_R8G8B8A8_UNORM:
2361	case DXGI_FORMAT_R8G8B8A8_UNORM_SRGB:
2362	case DXGI_FORMAT_R8G8B8A8_UINT:
2363	case DXGI_FORMAT_R8G8B8A8_SNORM:
2364	case DXGI_FORMAT_R8G8B8A8_SINT:
2365	return DXGI_FORMAT_R8G8B8A8_TYPELESS; /* 27 */
2366	case DXGI_FORMAT_R16G16_FLOAT:
2367	case DXGI_FORMAT_R16G16_UNORM:
2368	case DXGI_FORMAT_R16G16_UINT:
2369	case DXGI_FORMAT_R16G16_SNORM:
2370	case DXGI_FORMAT_R16G16_SINT:
2371	return DXGI_FORMAT_R16G16_TYPELESS; /* 33 */
2372	case DXGI_FORMAT_D32_FLOAT:
2373	case DXGI_FORMAT_R32_FLOAT:
2374	case DXGI_FORMAT_R32_UINT:
2375	case DXGI_FORMAT_R32_SINT:
2376	return DXGI_FORMAT_R32_TYPELESS; /* 39 */
2377	case DXGI_FORMAT_D24_UNORM_S8_UINT:
2378	case DXGI_FORMAT_R24_UNORM_X8_TYPELESS:
2379	case DXGI_FORMAT_X24_TYPELESS_G8_UINT:
2380	return DXGI_FORMAT_R24G8_TYPELESS; /* 44 */
2381	case DXGI_FORMAT_R8G8_UNORM:
2382	case DXGI_FORMAT_R8G8_UINT:
2383	case DXGI_FORMAT_R8G8_SNORM:
2384	case DXGI_FORMAT_R8G8_SINT:
2385	return DXGI_FORMAT_R8G8_TYPELESS; /* 48*/
2386	case DXGI_FORMAT_R16_FLOAT:
2387	case DXGI_FORMAT_D16_UNORM:
2388	case DXGI_FORMAT_R16_UNORM:
2389	case DXGI_FORMAT_R16_UINT:
2390	case DXGI_FORMAT_R16_SNORM:
2391	case DXGI_FORMAT_R16_SINT:
2392	return DXGI_FORMAT_R16_TYPELESS; /* 53 */
2393	case DXGI_FORMAT_R8_UNORM:
2394	case DXGI_FORMAT_R8_UINT:
2395	case DXGI_FORMAT_R8_SNORM:
2396	case DXGI_FORMAT_R8_SINT:
2397	return DXGI_FORMAT_R8_TYPELESS; /* 60*/
2398	case DXGI_FORMAT_BC1_UNORM:
2399	case DXGI_FORMAT_BC1_UNORM_SRGB:
2400	return DXGI_FORMAT_BC1_TYPELESS; /* 70 */
2401	case DXGI_FORMAT_BC2_UNORM:
2402	case DXGI_FORMAT_BC2_UNORM_SRGB:
2403	return DXGI_FORMAT_BC2_TYPELESS; /* 73 */
2404	case DXGI_FORMAT_BC3_UNORM:
2405	case DXGI_FORMAT_BC3_UNORM_SRGB:
2406	return DXGI_FORMAT_BC3_TYPELESS; /* 76 */
2407	case DXGI_FORMAT_BC4_UNORM:
2408	case DXGI_FORMAT_BC4_SNORM:
2409	return DXGI_FORMAT_BC4_TYPELESS; /* 79 */
2410	case DXGI_FORMAT_BC5_UNORM:
2411	case DXGI_FORMAT_BC5_SNORM:
2412	return DXGI_FORMAT_BC5_TYPELESS; /* 82 */
2413	case DXGI_FORMAT_B8G8R8A8_UNORM:
2414	case DXGI_FORMAT_B8G8R8A8_UNORM_SRGB:
2415	return DXGI_FORMAT_B8G8R8A8_TYPELESS; /* 90 */
2416	case DXGI_FORMAT_B8G8R8X8_UNORM:
2417	case DXGI_FORMAT_B8G8R8X8_UNORM_SRGB:
2418	return DXGI_FORMAT_B8G8R8X8_TYPELESS; /* 92 */
2419	case DXGI_FORMAT_BC6H_UF16:
2420	case DXGI_FORMAT_BC6H_SF16:
2421	return DXGI_FORMAT_BC6H_TYPELESS; /* 94 */
2422	case DXGI_FORMAT_BC7_UNORM:
2423	case DXGI_FORMAT_BC7_UNORM_SRGB:
2424	return DXGI_FORMAT_BC7_TYPELESS; /* 97 */
2425	default:
2426	break;
2427	}
2428
2429	return dxgiFormat;
2430	}
2431
2432
2433	static bool dxIsDepthStencilFormat(DXGI_FORMAT dxgiFormat)
2434	{
2435	switch (dxgiFormat)
2436	{
2437	case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2438	case DXGI_FORMAT_D32_FLOAT:
2439	case DXGI_FORMAT_D24_UNORM_S8_UINT:
2440	case DXGI_FORMAT_D16_UNORM:
2441	return true;
2442	default:
2443	break;
2444	}
2445
2446	return false;
2447	}
2448
2449
2450	static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
2451	{
2452	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2453	AssertReturn(p3dState, VERR_INVALID_STATE);
2454
2455	PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2456	AssertReturn(pBackend, VERR_INVALID_STATE);
2457
2458	UINT MiscFlags = 0;
2459	DXDEVICE *pDXDevice = &p3dState->pBackend->dxDevice;
2460	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2461
2462	if (pSurface->pBackendSurface != NULL)
2463	{
2464	AssertFailed(); /** @todo Should the function not be used like that? */
2465	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2466	}
2467
2468	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2469	int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2470	AssertRCReturn(rc, rc);
2471
2472	uint32_t const cWidth = pSurface->paMipmapLevels[0].cBlocksX * pSurface->cxBlock;
2473	uint32_t const cHeight = pSurface->paMipmapLevels[0].cBlocksY * pSurface->cyBlock;
2474	uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
2475	uint32_t const numMipLevels = pSurface->cLevels;
2476
2477	DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2478	AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
2479
2480	/* Create typeless textures, unless it is a depth/stencil resource,
2481	* because D3D11_BIND_DEPTH_STENCIL requires a depth/stencil format.
2482	* Always use typeless format for staging/dynamic resources.
2483	* Use explicit format for screen targets. For example they can be used
2484	* for video processor output view, which does not allow a typeless format.
2485	*/
2486	DXGI_FORMAT const dxgiFormatTypeless = dxGetDxgiTypelessFormat(dxgiFormat);
2487	if ( !dxIsDepthStencilFormat(dxgiFormat)
2488	&& !RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET))
2489	dxgiFormat = dxgiFormatTypeless;
2490
2491	/* Format for staging resource is always the typeless one. */
2492	DXGI_FORMAT const dxgiFormatStaging = dxgiFormatTypeless;
2493
2494	DXGI_FORMAT dxgiFormatDynamic;
2495	/* Some drivers do not allow to use depth typeless formats for dynamic resources.
2496	* Create a placeholder texture (it does not work with CopySubresource).
2497	*/
2498	/** @todo Implement upload from such textures. */
2499	if (dxgiFormatTypeless == DXGI_FORMAT_R24G8_TYPELESS)
2500	dxgiFormatDynamic = DXGI_FORMAT_R32_UINT;
2501	else if (dxgiFormatTypeless == DXGI_FORMAT_R32G8X24_TYPELESS)
2502	dxgiFormatDynamic = DXGI_FORMAT_R32G32_UINT;
2503	else
2504	dxgiFormatDynamic = dxgiFormatTypeless;
2505
2506	/*
2507	* Create D3D11 texture object.
2508	*/
2509	D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
2510	if (pSurface->paMipmapLevels[0].pSurfaceData && pSurface->surfaceDesc.multisampleCount <= 1)
2511	{
2512	/* Can happen for a non GBO surface or if GBO texture was updated prior to creation of the hardware resource. */
2513	uint32_t const cSubresource = numMipLevels * pSurface->surfaceDesc.numArrayElements;
2514	paInitialData = (D3D11_SUBRESOURCE_DATA )RTMemAlloc(cSubresource sizeof(D3D11_SUBRESOURCE_DATA));
2515	AssertPtrReturn(paInitialData, VERR_NO_MEMORY);
2516
2517	for (uint32_t i = 0; i < cSubresource; ++i)
2518	{
2519	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
2520	D3D11_SUBRESOURCE_DATA *p = &paInitialData[i];
2521	p->pSysMem = pMipmapLevel->pSurfaceData;
2522	p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
2523	p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
2524	}
2525	}
2526
2527	HRESULT hr = S_OK;
2528	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
2529	{
2530	Assert(pSurface->cFaces == 6);
2531	Assert(cWidth == cHeight);
2532	Assert(cDepth == 1);
2533	//DEBUG_BREAKPOINT_TEST();
2534
2535	D3D11_TEXTURE2D_DESC td;
2536	RT_ZERO(td);
2537	td.Width = cWidth;
2538	td.Height = cHeight;
2539	td.MipLevels = numMipLevels;
2540	td.ArraySize = pSurface->surfaceDesc.numArrayElements; /* This is 6 * numCubes */
2541	td.Format = dxgiFormat;
2542	td.SampleDesc.Count = 1;
2543	td.SampleDesc.Quality = 0;
2544	td.Usage = D3D11_USAGE_DEFAULT;
2545	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2546	td.CPUAccessFlags = 0; /** @todo */
2547	td.MiscFlags = MiscFlags \| D3D11_RESOURCE_MISC_TEXTURECUBE; /** @todo */
2548	if ( numMipLevels > 1
2549	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2550	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2551
2552	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2553	Assert(SUCCEEDED(hr));
2554	if (SUCCEEDED(hr))
2555	{
2556	/* Map-able texture. */
2557	td.Format = dxgiFormatDynamic;
2558	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2559	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2560	td.Usage = D3D11_USAGE_DYNAMIC;
2561	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2562	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2563	td.MiscFlags = 0;
2564	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2565	Assert(SUCCEEDED(hr));
2566	}
2567
2568	if (SUCCEEDED(hr))
2569	{
2570	/* Staging texture. */
2571	td.Format = dxgiFormatStaging;
2572	td.Usage = D3D11_USAGE_STAGING;
2573	td.BindFlags = 0; /* No flags allowed. */
2574	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2575	td.MiscFlags = 0;
2576	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2577	Assert(SUCCEEDED(hr));
2578	}
2579
2580	if (SUCCEEDED(hr))
2581	{
2582	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_CUBE;
2583	}
2584	}
2585	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_1D)
2586	{
2587	/*
2588	* 1D texture.
2589	*/
2590	Assert(pSurface->cFaces == 1);
2591
2592	D3D11_TEXTURE1D_DESC td;
2593	RT_ZERO(td);
2594	td.Width = cWidth;
2595	td.MipLevels = numMipLevels;
2596	td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2597	td.Format = dxgiFormat;
2598	td.Usage = D3D11_USAGE_DEFAULT;
2599	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2600	td.CPUAccessFlags = 0;
2601	td.MiscFlags = MiscFlags; /** @todo */
2602	if ( numMipLevels > 1
2603	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2604	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2605
2606	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->u.pTexture1D);
2607	Assert(SUCCEEDED(hr));
2608	if (SUCCEEDED(hr))
2609	{
2610	/* Map-able texture. */
2611	td.Format = dxgiFormatDynamic;
2612	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2613	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2614	td.Usage = D3D11_USAGE_DYNAMIC;
2615	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2616	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2617	td.MiscFlags = 0;
2618	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->dynamic.pTexture1D);
2619	Assert(SUCCEEDED(hr));
2620	}
2621
2622	if (SUCCEEDED(hr))
2623	{
2624	/* Staging texture. */
2625	td.Format = dxgiFormatStaging;
2626	td.Usage = D3D11_USAGE_STAGING;
2627	td.BindFlags = 0; /* No flags allowed. */
2628	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2629	td.MiscFlags = 0;
2630	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->staging.pTexture1D);
2631	Assert(SUCCEEDED(hr));
2632	}
2633
2634	if (SUCCEEDED(hr))
2635	{
2636	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_1D;
2637	}
2638	}
2639	else
2640	{
2641	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_VOLUME)
2642	{
2643	/*
2644	* Volume texture.
2645	*/
2646	Assert(pSurface->cFaces == 1);
2647	Assert(pSurface->surfaceDesc.numArrayElements == 1);
2648
2649	D3D11_TEXTURE3D_DESC td;
2650	RT_ZERO(td);
2651	td.Width = cWidth;
2652	td.Height = cHeight;
2653	td.Depth = cDepth;
2654	td.MipLevels = numMipLevels;
2655	td.Format = dxgiFormat;
2656	td.Usage = D3D11_USAGE_DEFAULT;
2657	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2658	td.CPUAccessFlags = 0; /** @todo */
2659	td.MiscFlags = MiscFlags; /** @todo */
2660	if ( numMipLevels > 1
2661	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2662	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2663
2664	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->u.pTexture3D);
2665	Assert(SUCCEEDED(hr));
2666	if (SUCCEEDED(hr))
2667	{
2668	/* Map-able texture. */
2669	td.Format = dxgiFormatDynamic;
2670	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2671	td.Usage = D3D11_USAGE_DYNAMIC;
2672	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2673	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2674	td.MiscFlags = 0;
2675	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->dynamic.pTexture3D);
2676	Assert(SUCCEEDED(hr));
2677	}
2678
2679	if (SUCCEEDED(hr))
2680	{
2681	/* Staging texture. */
2682	td.Format = dxgiFormatStaging;
2683	td.Usage = D3D11_USAGE_STAGING;
2684	td.BindFlags = 0; /* No flags allowed. */
2685	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2686	td.MiscFlags = 0;
2687	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->staging.pTexture3D);
2688	Assert(SUCCEEDED(hr));
2689	}
2690
2691	if (SUCCEEDED(hr))
2692	{
2693	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
2694	}
2695	}
2696	else
2697	{
2698	/*
2699	* 2D texture.
2700	*/
2701	Assert(cDepth == 1);
2702	Assert(pSurface->cFaces == 1);
2703
2704	D3D11_TEXTURE2D_DESC td;
2705	RT_ZERO(td);
2706	td.Width = cWidth;
2707	td.Height = cHeight;
2708	td.MipLevels = numMipLevels;
2709	td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2710	td.Format = dxgiFormat;
2711	td.SampleDesc.Count = pSurface->surfaceDesc.multisampleCount;
2712	td.SampleDesc.Quality = 0;
2713	td.Usage = D3D11_USAGE_DEFAULT;
2714	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2715	td.CPUAccessFlags = 0; /** @todo */
2716	td.MiscFlags = MiscFlags; /** @todo */
2717	if ( numMipLevels > 1
2718	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2719	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2720
2721	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2722	Assert(SUCCEEDED(hr));
2723	if (SUCCEEDED(hr))
2724	{
2725	/* Map-able texture. */
2726	td.Format = dxgiFormatDynamic;
2727	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2728	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2729	td.SampleDesc.Count = 1;
2730	td.SampleDesc.Quality = 0;
2731	td.Usage = D3D11_USAGE_DYNAMIC;
2732	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2733	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2734	td.MiscFlags = 0;
2735	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2736	Assert(SUCCEEDED(hr));
2737	}
2738
2739	if (SUCCEEDED(hr))
2740	{
2741	/* Staging texture. */
2742	td.Format = dxgiFormatStaging;
2743	td.Usage = D3D11_USAGE_STAGING;
2744	td.BindFlags = 0; /* No flags allowed. */
2745	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2746	td.MiscFlags = 0;
2747	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2748	Assert(SUCCEEDED(hr));
2749	}
2750
2751	if (SUCCEEDED(hr))
2752	{
2753	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_2D;
2754	}
2755	}
2756	}
2757
2758	if (hr == DXGI_ERROR_DEVICE_REMOVED)
2759	{
2760	DEBUG_BREAKPOINT_TEST();
2761	hr = pDXDevice->pDevice->GetDeviceRemovedReason();
2762	}
2763
2764	Assert(hr == S_OK);
2765
2766	RTMemFree(paInitialData);
2767
2768	if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
2769	{
2770	}
2771
2772	if (SUCCEEDED(hr))
2773	{
2774	/*
2775	* Success.
2776	*/
2777	LogFunc(("sid = %u\n", pSurface->id));
2778	pBackendSurface->enmDxgiFormat = dxgiFormat;
2779	pSurface->pBackendSurface = pBackendSurface;
2780	return VINF_SUCCESS;
2781	}
2782
2783	D3D_RELEASE(pBackendSurface->staging.pResource);
2784	D3D_RELEASE(pBackendSurface->dynamic.pResource);
2785	D3D_RELEASE(pBackendSurface->u.pResource);
2786	RTMemFree(pBackendSurface);
2787	return VERR_NO_MEMORY;
2788	}
2789
2790	#if 0
2791	static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2792	{
2793	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2794	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2795
2796	/* Buffers should be created as such. */
2797	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
2798	\| SVGA3D_SURFACE_HINT_VERTEXBUFFER
2799	\| SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2800	\| SVGA3D_SURFACE_BIND_INDEX_BUFFER
2801	)), VERR_INVALID_PARAMETER);
2802
2803	if (pSurface->pBackendSurface != NULL)
2804	{
2805	AssertFailed(); /** @todo Should the function not be used like that? */
2806	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2807	}
2808
2809	PVMSVGA3DMIPMAPLEVEL pMipLevel;
2810	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2811	AssertRCReturn(rc, rc);
2812
2813	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2814	rc = dxBackendSurfaceAlloc(&pBackendSurface);
2815	AssertRCReturn(rc, rc);
2816
2817	LogFunc(("sid = %u, size = %u\n", pSurface->id, pMipLevel->cbSurface));
2818
2819	/* Upload the current data, if any. */
2820	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2821	D3D11_SUBRESOURCE_DATA initialData;
2822	if (pMipLevel->pSurfaceData)
2823	{
2824	initialData.pSysMem = pMipLevel->pSurfaceData;
2825	initialData.SysMemPitch = pMipLevel->cbSurface;
2826	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2827
2828	pInitialData = &initialData;
2829	}
2830
2831	D3D11_BUFFER_DESC bd;
2832	RT_ZERO(bd);
2833	bd.ByteWidth = pMipLevel->cbSurface;
2834	bd.Usage = D3D11_USAGE_DEFAULT;
2835	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2836
2837	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2838	Assert(SUCCEEDED(hr));
2839	#ifndef DX_COMMON_STAGING_BUFFER
2840	if (SUCCEEDED(hr))
2841	{
2842	/* Map-able Buffer. */
2843	bd.Usage = D3D11_USAGE_DYNAMIC;
2844	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2845	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2846	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->dynamic.pBuffer);
2847	Assert(SUCCEEDED(hr));
2848	}
2849
2850	if (SUCCEEDED(hr))
2851	{
2852	/* Staging texture. */
2853	bd.Usage = D3D11_USAGE_STAGING;
2854	bd.BindFlags = 0; /* No flags allowed. */
2855	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2856	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->staging.pBuffer);
2857	Assert(SUCCEEDED(hr));
2858	}
2859	#endif
2860
2861	if (SUCCEEDED(hr))
2862	{
2863	/*
2864	* Success.
2865	*/
2866	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2867	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2868	pSurface->pBackendSurface = pBackendSurface;
2869	return VINF_SUCCESS;
2870	}
2871
2872	/* Failure. */
2873	D3D_RELEASE(pBackendSurface->u.pBuffer);
2874	#ifndef DX_COMMON_STAGING_BUFFER
2875	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
2876	D3D_RELEASE(pBackendSurface->staging.pBuffer);
2877	#endif
2878	RTMemFree(pBackendSurface);
2879	return VERR_NO_MEMORY;
2880	}
2881	#endif
2882
2883	static int vmsvga3dBackSurfaceCreateSoBuffer(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
2884	{
2885	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2886	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2887
2888	/* Buffers should be created as such. */
2889	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT), VERR_INVALID_PARAMETER);
2890
2891	if (pSurface->pBackendSurface != NULL)
2892	{
2893	AssertFailed(); /** @todo Should the function not be used like that? */
2894	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2895	}
2896
2897	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2898	int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2899	AssertRCReturn(rc, rc);
2900
2901	D3D11_BUFFER_DESC bd;
2902	RT_ZERO(bd);
2903	bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2904	bd.Usage = D3D11_USAGE_DEFAULT;
2905	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2906	bd.CPUAccessFlags = 0; /// @todo ? D3D11_CPU_ACCESS_READ;
2907	bd.MiscFlags = 0;
2908	bd.StructureByteStride = 0;
2909
2910	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.pBuffer);
2911	#ifndef DX_COMMON_STAGING_BUFFER
2912	if (SUCCEEDED(hr))
2913	{
2914	/* Map-able Buffer. */
2915	bd.Usage = D3D11_USAGE_DYNAMIC;
2916	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2917	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2918	hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->dynamic.pBuffer);
2919	Assert(SUCCEEDED(hr));
2920	}
2921
2922	if (SUCCEEDED(hr))
2923	{
2924	/* Staging texture. */
2925	bd.Usage = D3D11_USAGE_STAGING;
2926	bd.BindFlags = 0; /* No flags allowed. */
2927	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2928	hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->staging.pBuffer);
2929	Assert(SUCCEEDED(hr));
2930	}
2931	#endif
2932
2933	if (SUCCEEDED(hr))
2934	{
2935	/*
2936	* Success.
2937	*/
2938	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2939	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2940	pSurface->pBackendSurface = pBackendSurface;
2941	return VINF_SUCCESS;
2942	}
2943
2944	/* Failure. */
2945	D3D_RELEASE(pBackendSurface->u.pBuffer);
2946	#ifndef DX_COMMON_STAGING_BUFFER
2947	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
2948	D3D_RELEASE(pBackendSurface->staging.pBuffer);
2949	#endif
2950	RTMemFree(pBackendSurface);
2951	return VERR_NO_MEMORY;
2952	}
2953
2954	#if 0
2955	static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface, uint32_t offsetInBytes, uint32_t sizeInBytes)
2956	{
2957	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2958	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2959
2960	/* Buffers should be created as such. */
2961	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
2962
2963	if (pSurface->pBackendSurface != NULL)
2964	{
2965	AssertFailed(); /** @todo Should the function not be used like that? */
2966	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2967	}
2968
2969	PVMSVGA3DMIPMAPLEVEL pMipLevel;
2970	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2971	AssertRCReturn(rc, rc);
2972
2973	ASSERT_GUEST_RETURN( offsetInBytes < pMipLevel->cbSurface
2974	&& sizeInBytes <= pMipLevel->cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
2975
2976	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2977	rc = dxBackendSurfaceAlloc(&pBackendSurface);
2978	AssertRCReturn(rc, rc);
2979
2980	/* Upload the current data, if any. */
2981	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2982	D3D11_SUBRESOURCE_DATA initialData;
2983	if (pMipLevel->pSurfaceData)
2984	{
2985	initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
2986	initialData.SysMemPitch = pMipLevel->cbSurface;
2987	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2988
2989	pInitialData = &initialData;
2990
2991	// Log(("%.*Rhxd\n", sizeInBytes, initialData.pSysMem));
2992	}
2993
2994	D3D11_BUFFER_DESC bd;
2995	RT_ZERO(bd);
2996	bd.ByteWidth = sizeInBytes;
2997	bd.Usage = D3D11_USAGE_DYNAMIC;
2998	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
2999	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3000	bd.MiscFlags = 0;
3001	bd.StructureByteStride = 0;
3002
3003	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3004	if (SUCCEEDED(hr))
3005	{
3006	/*
3007	* Success.
3008	*/
3009	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3010	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3011	pSurface->pBackendSurface = pBackendSurface;
3012	return VINF_SUCCESS;
3013	}
3014
3015	/* Failure. */
3016	D3D_RELEASE(pBackendSurface->u.pBuffer);
3017	RTMemFree(pBackendSurface);
3018	return VERR_NO_MEMORY;
3019	}
3020	#endif
3021
3022	static int vmsvga3dBackSurfaceCreateResource(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
3023	{
3024	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
3025	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3026
3027	if (pSurface->pBackendSurface != NULL)
3028	{
3029	AssertFailed(); /** @todo Should the function not be used like that? */
3030	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
3031	}
3032
3033	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3034	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
3035	AssertRCReturn(rc, rc);
3036
3037	PVMSVGA3DBACKENDSURFACE pBackendSurface;
3038	rc = dxBackendSurfaceAlloc(&pBackendSurface);
3039	AssertRCReturn(rc, rc);
3040
3041	HRESULT hr;
3042
3043	/*
3044	* Figure out the type of the surface.
3045	*/
3046	if (pSurface->format == SVGA3D_BUFFER)
3047	{
3048	/* Upload the current data, if any. */
3049	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3050	D3D11_SUBRESOURCE_DATA initialData;
3051	if (pMipLevel->pSurfaceData)
3052	{
3053	initialData.pSysMem = pMipLevel->pSurfaceData;
3054	initialData.SysMemPitch = pMipLevel->cbSurface;
3055	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
3056
3057	pInitialData = &initialData;
3058	}
3059
3060	D3D11_BUFFER_DESC bd;
3061	RT_ZERO(bd);
3062	bd.ByteWidth = pMipLevel->cbSurface;
3063
3064	if (pSurface->f.surfaceFlags & (SVGA3D_SURFACE_STAGING_UPLOAD \| SVGA3D_SURFACE_STAGING_DOWNLOAD))
3065	bd.Usage = D3D11_USAGE_STAGING;
3066	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
3067	bd.Usage = D3D11_USAGE_DYNAMIC;
3068	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_STATIC)
3069	{
3070	/* Use D3D11_USAGE_DEFAULT instead of D3D11_USAGE_IMMUTABLE to let the guest the guest update
3071	* the buffer later.
3072	*
3073	* The guest issues SVGA_3D_CMD_INVALIDATE_GB_IMAGE followed by SVGA_3D_CMD_UPDATE_GB_IMAGE
3074	* when the data in SVGA3D_SURFACE_HINT_STATIC surface is updated.
3075	* D3D11_USAGE_IMMUTABLE would work if the device destroys the D3D buffer on INVALIDATE
3076	* and re-creates it in setupPipeline with initial data from the backing guest MOB.
3077	* Currently the device does not destroy the buffer on INVALIDATE. So just use D3D11_USAGE_DEFAULT.
3078	*/
3079	bd.Usage = D3D11_USAGE_DEFAULT;
3080	}
3081	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE)
3082	bd.Usage = D3D11_USAGE_DEFAULT;
3083
3084	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
3085
3086	if (bd.Usage == D3D11_USAGE_STAGING)
3087	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
3088	else if (bd.Usage == D3D11_USAGE_DYNAMIC)
3089	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3090
3091	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_DRAWINDIRECT_ARGS)
3092	bd.MiscFlags \|= D3D11_RESOURCE_MISC_DRAWINDIRECT_ARGS;
3093	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_RAW_VIEWS)
3094	bd.MiscFlags \|= D3D11_RESOURCE_MISC_BUFFER_ALLOW_RAW_VIEWS;
3095	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BUFFER_STRUCTURED)
3096	bd.MiscFlags \|= D3D11_RESOURCE_MISC_BUFFER_STRUCTURED;
3097	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_RESOURCE_CLAMP)
3098	bd.MiscFlags \|= D3D11_RESOURCE_MISC_RESOURCE_CLAMP;
3099
3100	if (bd.MiscFlags & D3D11_RESOURCE_MISC_BUFFER_STRUCTURED)
3101	{
3102	SVGAOTableSurfaceEntry entrySurface;
3103	rc = vmsvgaR3OTableReadSurface(pThisCC->svga.pSvgaR3State, pSurface->id, &entrySurface);
3104	AssertRCReturn(rc, rc);
3105
3106	bd.StructureByteStride = entrySurface.bufferByteStride;
3107	}
3108
3109	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3110	Assert(SUCCEEDED(hr));
3111	#ifndef DX_COMMON_STAGING_BUFFER
3112	if (SUCCEEDED(hr))
3113	{
3114	/* Map-able Buffer. */
3115	bd.Usage = D3D11_USAGE_DYNAMIC;
3116	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
3117	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3118	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->dynamic.pBuffer);
3119	Assert(SUCCEEDED(hr));
3120	}
3121
3122	if (SUCCEEDED(hr))
3123	{
3124	/* Staging texture. */
3125	bd.Usage = D3D11_USAGE_STAGING;
3126	bd.BindFlags = 0; /* No flags allowed. */
3127	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
3128	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->staging.pBuffer);
3129	Assert(SUCCEEDED(hr));
3130	}
3131	#endif
3132	if (SUCCEEDED(hr))
3133	{
3134	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3135	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3136	}
3137	}
3138	else
3139	{
3140	/** @todo Texture. Currently vmsvga3dBackSurfaceCreateTexture is called for textures. */
3141	AssertFailed();
3142	hr = E_FAIL;
3143	}
3144
3145	if (SUCCEEDED(hr))
3146	{
3147	/*
3148	* Success.
3149	*/
3150	pSurface->pBackendSurface = pBackendSurface;
3151	return VINF_SUCCESS;
3152	}
3153
3154	/* Failure. */
3155	D3D_RELEASE(pBackendSurface->u.pResource);
3156	D3D_RELEASE(pBackendSurface->dynamic.pResource);
3157	D3D_RELEASE(pBackendSurface->staging.pResource);
3158	RTMemFree(pBackendSurface);
3159	return VERR_NO_MEMORY;
3160	}
3161
3162
3163	static int dxEnsureResource(PVGASTATECC pThisCC, uint32_t sid,
3164	PVMSVGA3DSURFACE ppSurface, ID3D11Resource *ppResource)
3165	{
3166	/* Get corresponding resource for sid. Create the surface if does not yet exist. */
3167	PVMSVGA3DSURFACE pSurface;
3168	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3169	AssertRCReturn(rc, rc);
3170
3171	if (pSurface->pBackendSurface == NULL)
3172	{
3173	/* Create the actual texture or buffer. */
3174	/** @todo One function to create all resources from surfaces. */
3175	if (pSurface->format != SVGA3D_BUFFER)
3176	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSurface);
3177	else
3178	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pSurface);
3179
3180	AssertRCReturn(rc, rc);
3181	LogFunc(("Created for sid = %u\n", sid));
3182	}
3183
3184	ID3D11Resource *pResource = dxResource(pSurface);
3185	AssertReturn(pResource, VERR_INVALID_STATE);
3186
3187	*ppSurface = pSurface;
3188	*ppResource = pResource;
3189	return VINF_SUCCESS;
3190	}
3191
3192
3193	#ifdef DX_COMMON_STAGING_BUFFER
3194	static int dxStagingBufferRealloc(DXDEVICE *pDXDevice, uint32_t cbRequiredSize)
3195	{
3196	AssertReturn(cbRequiredSize < SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
3197
3198	if (RT_LIKELY(cbRequiredSize <= pDXDevice->cbStagingBuffer))
3199	return VINF_SUCCESS;
3200
3201	D3D_RELEASE(pDXDevice->pStagingBuffer);
3202
3203	uint32_t const cbAlloc = RT_ALIGN_32(cbRequiredSize, _64K);
3204
3205	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3206	D3D11_BUFFER_DESC bd;
3207	RT_ZERO(bd);
3208	bd.ByteWidth = cbAlloc;
3209	bd.Usage = D3D11_USAGE_STAGING;
3210	//bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
3211	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
3212
3213	int rc = VINF_SUCCESS;
3214	ID3D11Buffer *pBuffer;
3215	HRESULT hr = pDXDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
3216	if (SUCCEEDED(hr))
3217	{
3218	pDXDevice->pStagingBuffer = pBuffer;
3219	pDXDevice->cbStagingBuffer = cbAlloc;
3220	}
3221	else
3222	{
3223	pDXDevice->cbStagingBuffer = 0;
3224	rc = VERR_NO_MEMORY;
3225	}
3226
3227	return rc;
3228	}
3229	#endif
3230
3231
3232	static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3233	{
3234	RT_NOREF(pDevIns, pThis);
3235
3236	int rc;
3237	#ifdef RT_OS_LINUX /** @todo Remove, this is currently needed for loading the X11 library in order to call XInitThreads(). */
3238	rc = glLdrInit(pDevIns);
3239	if (RT_FAILURE(rc))
3240	{
3241	LogRel(("VMSVGA3d: Error loading OpenGL library and resolving necessary functions: %Rrc\n", rc));
3242	return rc;
3243	}
3244	#endif
3245
3246	PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
3247	AssertReturn(pBackend, VERR_NO_MEMORY);
3248	pThisCC->svga.p3dState->pBackend = pBackend;
3249
3250	rc = RTLdrLoadSystem(VBOX_D3D11_LIBRARY_NAME, /* fNoUnload = */ true, &pBackend->hD3D11);
3251	AssertRC(rc);
3252	if (RT_SUCCESS(rc))
3253	{
3254	rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
3255	AssertRC(rc);
3256	}
3257
3258	if (RT_SUCCESS(rc))
3259	{
3260	/* Failure to load the shader disassembler is ignored. */
3261	int rc2 = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
3262	if (RT_SUCCESS(rc2))
3263	rc2 = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
3264	Log6Func(("Load D3DDisassemble: %Rrc\n", rc2));
3265	}
3266
3267	vmsvga3dDXInitContextMobData(&pBackend->svgaDXContext);
3268	//DEBUG_BREAKPOINT_TEST();
3269	return rc;
3270	}
3271
3272
3273	static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3274	{
3275	RT_NOREF(pDevIns, pThis);
3276
3277	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3278	AssertReturn(pState, VERR_INVALID_STATE);
3279
3280	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3281	AssertReturn(pBackend, VERR_INVALID_STATE);
3282
3283	int rc = dxDeviceCreate(pBackend, &pBackend->dxDevice);
3284	if (RT_SUCCESS(rc))
3285	{
3286	IDXGIAdapter *pAdapter = NULL;
3287	HRESULT hr = pBackend->dxDevice.pDxgiFactory->EnumAdapters(0, &pAdapter);
3288	if (SUCCEEDED(hr))
3289	{
3290	DXGI_ADAPTER_DESC desc;
3291	hr = pAdapter->GetDesc(&desc);
3292	if (SUCCEEDED(hr))
3293	{
3294	pBackend->VendorId = desc.VendorId;
3295	pBackend->DeviceId = desc.DeviceId;
3296
3297	char sz[RT_ELEMENTS(desc.Description)];
3298	for (unsigned i = 0; i < RT_ELEMENTS(desc.Description); ++i)
3299	sz[i] = (char)desc.Description[i];
3300	LogRelMax(1, ("VMSVGA: Adapter %04x:%04x [%s]\n", pBackend->VendorId, pBackend->DeviceId, sz));
3301	}
3302
3303	pAdapter->Release();
3304	}
3305
3306	if (pBackend->dxDevice.pVideoDevice)
3307	dxLogRelVideoCaps(pBackend->dxDevice.pVideoDevice);
3308
3309	if (!pThis->svga.fVMSVGA3dMSAA)
3310	pBackend->dxDevice.MultisampleCountMask = 0;
3311	}
3312	return rc;
3313	}
3314
3315
3316	static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
3317	{
3318	RT_NOREF(pThisCC);
3319	return VINF_SUCCESS;
3320	}
3321
3322
3323	static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
3324	{
3325	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3326	AssertReturn(pState, VERR_INVALID_STATE);
3327
3328	if (pState->pBackend)
3329	dxDeviceDestroy(pState->pBackend, &pState->pBackend->dxDevice);
3330
3331	return VINF_SUCCESS;
3332	}
3333
3334
3335	/** @todo Such structures must be in VBoxVideo3D.h */
3336	typedef struct VBOX3DNOTIFYDEFINESCREEN
3337	{
3338	VBOX3DNOTIFY Core;
3339	uint32_t cWidth;
3340	uint32_t cHeight;
3341	int32_t xRoot;
3342	int32_t yRoot;
3343	uint32_t fPrimary;
3344	uint32_t cDpi;
3345	} VBOX3DNOTIFYDEFINESCREEN;
3346
3347
3348	static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3349	{
3350	VBOX3DNOTIFYDEFINESCREEN n;
3351	n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
3352	n.Core.iDisplay = pScreen->idScreen;
3353	n.Core.u32Reserved = 0;
3354	n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3355	RT_ZERO(n.Core.au8Data);
3356	n.cWidth = pScreen->cWidth;
3357	n.cHeight = pScreen->cHeight;
3358	n.xRoot = pScreen->xOrigin;
3359	n.yRoot = pScreen->yOrigin;
3360	n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
3361	n.cDpi = pScreen->cDpi;
3362
3363	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3364	}
3365
3366
3367	static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3368	{
3369	VBOX3DNOTIFY n;
3370	n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
3371	n.iDisplay = pScreen->idScreen;
3372	n.u32Reserved = 0;
3373	n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3374	RT_ZERO(n.au8Data);
3375
3376	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3377	}
3378
3379
3380	static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
3381	{
3382	VBOX3DNOTIFY n;
3383	n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
3384	n.iDisplay = pScreen->idScreen;
3385	n.u32Reserved = 0;
3386	n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3387	(uint64_t )&n.au8Data[0] = (uint64_t)hSharedSurface;
3388
3389	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3390	}
3391
3392
3393	typedef struct VBOX3DNOTIFYUPDATE
3394	{
3395	VBOX3DNOTIFY Core;
3396	uint32_t x;
3397	uint32_t y;
3398	uint32_t w;
3399	uint32_t h;
3400	} VBOX3DNOTIFYUPDATE;
3401
3402
3403	static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3404	uint32_t x, uint32_t y, uint32_t w, uint32_t h)
3405	{
3406	VBOX3DNOTIFYUPDATE n;
3407	n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
3408	n.Core.iDisplay = pScreen->idScreen;
3409	n.Core.u32Reserved = 0;
3410	n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3411	RT_ZERO(n.Core.au8Data);
3412	n.x = x;
3413	n.y = y;
3414	n.w = w;
3415	n.h = h;
3416
3417	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3418	}
3419
3420	static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
3421	{
3422	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3423
3424	DXDEVICE *pDXDevice = &pBackend->dxDevice;
3425	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
3426
3427	D3D11_TEXTURE2D_DESC td;
3428	RT_ZERO(td);
3429	td.Width = cWidth;
3430	td.Height = cHeight;
3431	td.MipLevels = 1;
3432	td.ArraySize = 1;
3433	td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
3434	td.SampleDesc.Count = 1;
3435	td.SampleDesc.Quality = 0;
3436	td.Usage = D3D11_USAGE_DEFAULT;
3437	td.BindFlags = D3D11_BIND_RENDER_TARGET \| D3D11_BIND_SHADER_RESOURCE;
3438	td.CPUAccessFlags = 0;
3439	td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
3440
3441	HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
3442	if (SUCCEEDED(hr))
3443	{
3444	/* Get the shared handle. */
3445	hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
3446	if (SUCCEEDED(hr))
3447	{
3448	hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
3449	if (SUCCEEDED(hr))
3450	hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
3451	}
3452	}
3453
3454	if (SUCCEEDED(hr))
3455	return VINF_SUCCESS;
3456
3457	AssertFailed();
3458	return VERR_NOT_SUPPORTED;
3459	}
3460
3461
3462	static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
3463	{
3464	RT_NOREF(pState);
3465	D3D_RELEASE(p->pDXGIKeyedMutex);
3466	D3D_RELEASE(p->pDxgiResource);
3467	D3D_RELEASE(p->pTexture);
3468	p->SharedHandle = 0;
3469	p->sidScreenTarget = SVGA_ID_INVALID;
3470	}
3471
3472
3473	static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3474	{
3475	RT_NOREF(pThis, pThisCC, pScreen);
3476
3477	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
3478
3479	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3480	AssertReturn(pState, VERR_INVALID_STATE);
3481
3482	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3483	AssertReturn(pBackend, VERR_INVALID_STATE);
3484
3485	Assert(pScreen->pHwScreen == NULL);
3486
3487	VMSVGAHWSCREEN p = (VMSVGAHWSCREEN )RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
3488	AssertPtrReturn(p, VERR_NO_MEMORY);
3489
3490	p->sidScreenTarget = SVGA_ID_INVALID;
3491
3492	int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
3493	if (RT_SUCCESS(rc))
3494	{
3495	/* The frontend supports the screen. Create the actual resource. */
3496	rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
3497	if (RT_SUCCESS(rc))
3498	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
3499	}
3500
3501	if (RT_SUCCESS(rc))
3502	{
3503	LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
3504	pScreen->pHwScreen = p;
3505	}
3506	else
3507	{
3508	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
3509	vmsvga3dHwScreenDestroy(pState, p);
3510	RTMemFree(p);
3511	}
3512
3513	return rc;
3514	}
3515
3516
3517	static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3518	{
3519	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3520	AssertReturn(pState, VERR_INVALID_STATE);
3521
3522	vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
3523
3524	if (pScreen->pHwScreen)
3525	{
3526	vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
3527	RTMemFree(pScreen->pHwScreen);
3528	pScreen->pHwScreen = NULL;
3529	}
3530
3531	return VINF_SUCCESS;
3532	}
3533
3534
3535	static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3536	SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
3537	SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
3538	{
3539	RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
3540
3541	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3542	AssertReturn(pState, VERR_INVALID_STATE);
3543
3544	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3545	AssertReturn(pBackend, VERR_INVALID_STATE);
3546
3547	VMSVGAHWSCREEN *p = pScreen->pHwScreen;
3548	AssertReturn(p, VERR_NOT_SUPPORTED);
3549
3550	PVMSVGA3DSURFACE pSurface;
3551	int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
3552	AssertRCReturn(rc, rc);
3553
3554	/** @todo Implement. */
3555	AssertFailed();
3556	return VERR_NOT_IMPLEMENTED;
3557	}
3558
3559
3560	static DECLCALLBACK(int) vmsvga3dBackSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
3561	VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
3562	{
3563	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3564	AssertReturn(pState, VERR_INVALID_STATE);
3565
3566	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3567	AssertReturn(pBackend, VERR_INVALID_STATE);
3568
3569	PVMSVGA3DSURFACE pSurface;
3570	int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3571	AssertRCReturn(rc, rc);
3572
3573	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3574	AssertPtrReturn(pBackendSurface, VERR_INVALID_STATE);
3575
3576	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3577	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3578	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3579
3580	DXDEVICE *pDevice = &pBackend->dxDevice;
3581	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3582
3583	SVGA3dBox clipBox;
3584	if (pBox)
3585	{
3586	clipBox = *pBox;
3587	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
3588	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
3589	}
3590	else
3591	{
3592	clipBox.x = 0;
3593	clipBox.y = 0;
3594	clipBox.z = 0;
3595	clipBox.w = pMipLevel->mipmapSize.width;
3596	clipBox.h = pMipLevel->mipmapSize.height;
3597	clipBox.d = pMipLevel->mipmapSize.depth;
3598	}
3599
3600	D3D11_MAP d3d11MapType;
3601	switch (enmMapType)
3602	{
3603	case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
3604	case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
3605	case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
3606	case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
3607	default:
3608	AssertFailed();
3609	return VERR_INVALID_PARAMETER;
3610	}
3611
3612	D3D11_MAPPED_SUBRESOURCE mappedResource;
3613	RT_ZERO(mappedResource);
3614
3615	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3616	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3617	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3618	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3619	{
3620	ID3D11Resource *pMappedResource;
3621	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3622	{
3623	pMappedResource = pBackendSurface->staging.pResource;
3624
3625	/* Copy the texture content to the staging texture.
3626	* The requested miplevel of the texture is copied to the miplevel 0 of the staging texture,
3627	* because the staging (and dynamic) structures do not have miplevels.
3628	* Always copy entire miplevel so all Dst are zero and pSrcBox is NULL, as D3D11 requires.
3629	*/
3630	ID3D11Resource *pDstResource = pMappedResource;
3631	UINT DstSubresource = 0;
3632	UINT DstX = 0;
3633	UINT DstY = 0;
3634	UINT DstZ = 0;
3635	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3636	UINT SrcSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3637	D3D11_BOX *pSrcBox = NULL;
3638	//D3D11_BOX SrcBox;
3639	//SrcBox.left = 0;
3640	//SrcBox.top = 0;
3641	//SrcBox.front = 0;
3642	//SrcBox.right = pMipLevel->mipmapSize.width;
3643	//SrcBox.bottom = pMipLevel->mipmapSize.height;
3644	//SrcBox.back = pMipLevel->mipmapSize.depth;
3645	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3646	pSrcResource, SrcSubresource, pSrcBox);
3647	}
3648	else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3649	pMappedResource = pBackendSurface->staging.pResource;
3650	else
3651	pMappedResource = pBackendSurface->dynamic.pResource;
3652
3653	UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3654	HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3655	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3656	if (SUCCEEDED(hr))
3657	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3658	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3659	else
3660	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3661	}
3662	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3663	{
3664	#ifdef DX_COMMON_STAGING_BUFFER
3665	/* Map the staging buffer. */
3666	rc = dxStagingBufferRealloc(pDevice, pMipLevel->cbSurface);
3667	if (RT_SUCCESS(rc))
3668	{
3669	/* The staging buffer does not allow D3D11_MAP_WRITE_DISCARD, so replace it. */
3670	if (d3d11MapType == D3D11_MAP_WRITE_DISCARD)
3671	d3d11MapType = D3D11_MAP_WRITE;
3672
3673	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3674	{
3675	/* Copy from the buffer to the staging buffer. */
3676	ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
3677	UINT DstSubresource = 0;
3678	UINT DstX = clipBox.x;
3679	UINT DstY = clipBox.y;
3680	UINT DstZ = clipBox.z;
3681	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3682	UINT SrcSubresource = 0;
3683	D3D11_BOX SrcBox;
3684	SrcBox.left = clipBox.x;
3685	SrcBox.top = clipBox.y;
3686	SrcBox.front = clipBox.z;
3687	SrcBox.right = clipBox.w;
3688	SrcBox.bottom = clipBox.h;
3689	SrcBox.back = clipBox.d;
3690	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3691	pSrcResource, SrcSubresource, &SrcBox);
3692	}
3693
3694	UINT const Subresource = 0; /* Buffers have only one subresource. */
3695	HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
3696	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3697	if (SUCCEEDED(hr))
3698	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3699	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3700	else
3701	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3702	}
3703	#else
3704	ID3D11Resource *pMappedResource;
3705	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3706	{
3707	pMappedResource = pBackendSurface->staging.pResource;
3708
3709	/* Copy the resource content to the staging resource. */
3710	ID3D11Resource *pDstResource = pMappedResource;
3711	UINT DstSubresource = 0;
3712	UINT DstX = clipBox.x;
3713	UINT DstY = clipBox.y;
3714	UINT DstZ = clipBox.z;
3715	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3716	UINT SrcSubresource = 0;
3717	D3D11_BOX SrcBox;
3718	SrcBox.left = clipBox.x;
3719	SrcBox.top = clipBox.y;
3720	SrcBox.front = clipBox.z;
3721	SrcBox.right = clipBox.w;
3722	SrcBox.bottom = clipBox.h;
3723	SrcBox.back = clipBox.d;
3724	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3725	pSrcResource, SrcSubresource, &SrcBox);
3726	}
3727	else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3728	pMappedResource = pBackendSurface->staging.pResource;
3729	else
3730	pMappedResource = pBackendSurface->dynamic.pResource;
3731
3732	UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3733	HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3734	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3735	if (SUCCEEDED(hr))
3736	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3737	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3738	else
3739	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3740	#endif
3741	}
3742	else
3743	{
3744	// UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
3745	/** @todo Implement. */
3746	AssertFailed();
3747	rc = VERR_NOT_IMPLEMENTED;
3748	}
3749
3750	return rc;
3751	}
3752
3753
3754	static DECLCALLBACK(int) vmsvga3dBackSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, VMSVGA3D_MAPPED_SURFACE pMap, bool fWritten)
3755	{
3756	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3757	AssertReturn(pState, VERR_INVALID_STATE);
3758
3759	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3760	AssertReturn(pBackend, VERR_INVALID_STATE);
3761
3762	PVMSVGA3DSURFACE pSurface;
3763	int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3764	AssertRCReturn(rc, rc);
3765
3766	/* The called should not use the function for system memory surfaces. */
3767	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3768	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3769
3770	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3771	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3772	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3773
3774	DXDEVICE *pDevice = &pBackend->dxDevice;
3775	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3776
3777	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3778	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3779	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3780	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3781	{
3782	ID3D11Resource *pMappedResource;
3783	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3784	pMappedResource = pBackendSurface->staging.pResource;
3785	else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3786	pMappedResource = pBackendSurface->staging.pResource;
3787	else
3788	pMappedResource = pBackendSurface->dynamic.pResource;
3789
3790	UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3791	pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3792
3793	if ( fWritten
3794	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3795	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3796	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3797	{
3798	/* If entire resource must be copied then use pSrcBox = NULL and dst point (0,0,0)
3799	* Because DX11 insists on this for some resource types, for example DEPTH_STENCIL resources.
3800	*/
3801	uint32_t const cWidth0 = pSurface->paMipmapLevels[0].mipmapSize.width;
3802	uint32_t const cHeight0 = pSurface->paMipmapLevels[0].mipmapSize.height;
3803	uint32_t const cDepth0 = pSurface->paMipmapLevels[0].mipmapSize.depth;
3804	/** @todo Entire subresource is always mapped. So find a way to copy it back, important for DEPTH_STENCIL mipmaps. */
3805	bool const fEntireResource = pMap->box.x == 0 && pMap->box.y == 0 && pMap->box.z == 0
3806	&& pMap->box.w == cWidth0 && pMap->box.h == cHeight0 && pMap->box.d == cDepth0;
3807
3808	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3809	UINT DstSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3810	UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3811	UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3812	UINT DstZ = pMap->box.z;
3813	ID3D11Resource *pSrcResource = pMappedResource;
3814	UINT SrcSubresource = Subresource;
3815	D3D11_BOX *pSrcBox;
3816	D3D11_BOX SrcBox;
3817	if (fEntireResource)
3818	pSrcBox = NULL;
3819	else
3820	{
3821	uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3822	uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3823
3824	SrcBox.left = DstX;
3825	SrcBox.top = DstY;
3826	SrcBox.front = DstZ;
3827	SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3828	SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3829	SrcBox.back = DstZ + pMap->box.d;
3830	pSrcBox = &SrcBox;
3831	}
3832
3833	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3834	pSrcResource, SrcSubresource, pSrcBox);
3835	}
3836	}
3837	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3838	{
3839	Log4(("Unmap buffer sid = %u:\n%.*Rhxd\n", pSurface->id, pMap->cbRow, pMap->pvData));
3840
3841	#ifdef DX_COMMON_STAGING_BUFFER
3842	/* Unmap the staging buffer. */
3843	UINT const Subresource = 0; /* Buffers have only one subresource. */
3844	pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
3845
3846	/* Copy from the staging buffer to the actual buffer */
3847	if ( fWritten
3848	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3849	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3850	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3851	{
3852	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3853	UINT DstSubresource = 0;
3854	UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3855	UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3856	UINT DstZ = pMap->box.z;
3857	ID3D11Resource *pSrcResource = pDevice->pStagingBuffer;
3858	UINT SrcSubresource = 0;
3859	D3D11_BOX SrcBox;
3860
3861	uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3862	uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3863
3864	SrcBox.left = DstX;
3865	SrcBox.top = DstY;
3866	SrcBox.front = DstZ;
3867	SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3868	SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3869	SrcBox.back = DstZ + pMap->box.d;
3870
3871	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3872	pSrcResource, SrcSubresource, &SrcBox);
3873	}
3874	#else
3875	ID3D11Resource *pMappedResource;
3876	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3877	pMappedResource = pBackendSurface->staging.pResource;
3878	else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3879	pMappedResource = pBackendSurface->staging.pResource;
3880	else
3881	pMappedResource = pBackendSurface->dynamic.pResource;
3882
3883	UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3884	pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3885
3886	if ( fWritten
3887	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3888	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3889	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3890	{
3891	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3892	UINT DstSubresource = 0;
3893	UINT DstX = pMap->box.x;
3894	UINT DstY = pMap->box.y;
3895	UINT DstZ = pMap->box.z;
3896	ID3D11Resource *pSrcResource = pMappedResource;
3897	UINT SrcSubresource = 0;
3898	D3D11_BOX SrcBox;
3899	SrcBox.left = DstX;
3900	SrcBox.top = DstY;
3901	SrcBox.front = DstZ;
3902	SrcBox.right = DstX + pMap->box.w;
3903	SrcBox.bottom = DstY + pMap->box.h;
3904	SrcBox.back = DstZ + pMap->box.d;
3905	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3906	pSrcResource, SrcSubresource, &SrcBox);
3907	}
3908	#endif
3909	}
3910	else
3911	{
3912	AssertFailed();
3913	rc = VERR_NOT_IMPLEMENTED;
3914	}
3915
3916	return rc;
3917	}
3918
3919
3920	static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
3921	{
3922	int rc = VINF_SUCCESS;
3923
3924	PVMSVGA3DSURFACE pSurface;
3925	if (sid != SVGA_ID_INVALID)
3926	{
3927	/* Create the surface if does not yet exist. */
3928	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3929	AssertReturn(pState, VERR_INVALID_STATE);
3930
3931	rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
3932	AssertRCReturn(rc, rc);
3933
3934	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
3935	{
3936	/* Create the actual texture. */
3937	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSurface);
3938	AssertRCReturn(rc, rc);
3939	}
3940	}
3941	else
3942	pSurface = NULL;
3943
3944	/* Notify the HW accelerated screen if it is used. */
3945	VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3946	if (!pHwScreen)
3947	return VINF_SUCCESS;
3948
3949	/* Same surface -> do nothing. */
3950	if (pHwScreen->sidScreenTarget == sid)
3951	return VINF_SUCCESS;
3952
3953	if (sid != SVGA_ID_INVALID)
3954	{
3955	AssertReturn( pSurface->pBackendSurface
3956	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3957	&& RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
3958
3959	HANDLE const hSharedSurface = pHwScreen->SharedHandle;
3960	rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
3961	}
3962
3963	if (RT_SUCCESS(rc))
3964	{
3965	pHwScreen->sidScreenTarget = sid;
3966	}
3967
3968	return rc;
3969	}
3970
3971
3972	static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT pScreen, SVGA3dRect const pRect)
3973	{
3974	VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3975	AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
3976
3977	if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
3978	return VINF_SUCCESS; /* No surface bound. */
3979
3980	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3981	AssertReturn(pState, VERR_INVALID_STATE);
3982
3983	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3984	AssertReturn(pBackend, VERR_INVALID_STATE);
3985
3986	PVMSVGA3DSURFACE pSurface;
3987	int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
3988	AssertRCReturn(rc, rc);
3989
3990	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3991	AssertReturn( pBackendSurface
3992	&& pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3993	&& RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET),
3994	VERR_INVALID_PARAMETER);
3995
3996	SVGA3dRect boundRect;
3997	boundRect.x = 0;
3998	boundRect.y = 0;
3999	boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4000	boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
4001	SVGA3dRect clipRect = *pRect;
4002	vmsvgaR3Clip3dRect(&boundRect, &clipRect);
4003	ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
4004
4005	/* Copy the screen texture to the shared surface. */
4006	DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
4007	if (result == S_OK)
4008	{
4009	pBackend->dxDevice.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.pTexture2D);
4010
4011	dxDeviceFlush(&pBackend->dxDevice);
4012
4013	result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
4014	}
4015	else
4016	AssertFailed();
4017
4018	rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
4019	return rc;
4020	}
4021
4022
4023	/*
4024	*
4025	* 3D interface.
4026	*
4027	*/
4028
4029	static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
4030	{
4031	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4032	AssertReturn(pState, VERR_INVALID_STATE);
4033
4034	int rc = VINF_SUCCESS;
4035
4036	*pu32Val = 0;
4037
4038	if (idx3dCaps > SVGA3D_DEVCAP_MAX)
4039	{
4040	LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
4041	return VERR_NOT_SUPPORTED;
4042	}
4043
4044	D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->dxDevice.FeatureLevel;
4045
4046	/* Most values are taken from:
4047	* https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
4048	*
4049	* Shader values are from
4050	* https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
4051	*/
4052
4053	switch (idx3dCaps)
4054	{
4055	case SVGA3D_DEVCAP_3D:
4056	*pu32Val = VBSVGA3D_CAP_3D;
4057	if (pState->pBackend->dxDevice.pVideoDevice)
4058	*pu32Val \|= VBSVGA3D_CAP_VIDEO;
4059	break;
4060
4061	case SVGA3D_DEVCAP_MAX_LIGHTS:
4062	pu32Val = SVGA3D_NUM_LIGHTS; / VGPU9. Not applicable to DX11. */
4063	break;
4064
4065	case SVGA3D_DEVCAP_MAX_TEXTURES:
4066	pu32Val = SVGA3D_NUM_TEXTURE_UNITS; / VGPU9. Not applicable to DX11. */
4067	break;
4068
4069	case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
4070	*pu32Val = SVGA3D_NUM_CLIPPLANES;
4071	break;
4072
4073	case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
4074	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4075	*pu32Val = SVGA3DVSVERSION_40;
4076	else
4077	*pu32Val = SVGA3DVSVERSION_30;
4078	break;
4079
4080	case SVGA3D_DEVCAP_VERTEX_SHADER:
4081	*pu32Val = 1;
4082	break;
4083
4084	case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
4085	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4086	*pu32Val = SVGA3DPSVERSION_40;
4087	else
4088	*pu32Val = SVGA3DPSVERSION_30;
4089	break;
4090
4091	case SVGA3D_DEVCAP_FRAGMENT_SHADER:
4092	*pu32Val = 1;
4093	break;
4094
4095	case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
4096	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4097	*pu32Val = 8;
4098	else
4099	*pu32Val = 4;
4100	break;
4101
4102	case SVGA3D_DEVCAP_S23E8_TEXTURES:
4103	case SVGA3D_DEVCAP_S10E5_TEXTURES:
4104	/* Must be obsolete by now; surface format caps specify the same thing. */
4105	break;
4106
4107	case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
4108	/* Obsolete */
4109	break;
4110
4111	/*
4112	* 2. The BUFFER_FORMAT capabilities are deprecated, and they always
4113	* return TRUE. Even on physical hardware that does not support
4114	* these formats natively, the SVGA3D device will provide an emulation
4115	* which should be invisible to the guest OS.
4116	*/
4117	case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
4118	case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
4119	case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
4120	*pu32Val = 1;
4121	break;
4122
4123	case SVGA3D_DEVCAP_QUERY_TYPES:
4124	/* Obsolete */
4125	break;
4126
4127	case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
4128	/* Obsolete */
4129	break;
4130
4131	case SVGA3D_DEVCAP_MAX_POINT_SIZE:
4132	AssertCompile(sizeof(uint32_t) == sizeof(float));
4133	(float )pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
4134	break;
4135
4136	case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
4137	/* Obsolete */
4138	break;
4139
4140	case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
4141	case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
4142	if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4143	*pu32Val = 16384;
4144	else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4145	*pu32Val = 8192;
4146	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4147	*pu32Val = 4096;
4148	else
4149	*pu32Val = 2048;
4150	break;
4151
4152	case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
4153	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4154	*pu32Val = 2048;
4155	else
4156	*pu32Val = 256;
4157	break;
4158
4159	case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
4160	if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4161	*pu32Val = 16384;
4162	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4163	*pu32Val = 8192;
4164	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4165	*pu32Val = 2048;
4166	else
4167	*pu32Val = 128;
4168	break;
4169
4170	case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
4171	/* Obsolete */
4172	break;
4173
4174	case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
4175	if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4176	*pu32Val = D3D11_REQ_MAXANISOTROPY;
4177	else
4178	*pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
4179	break;
4180
4181	case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
4182	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4183	*pu32Val = UINT32_MAX;
4184	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4185	*pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
4186	else
4187	*pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
4188	break;
4189
4190	case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
4191	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4192	*pu32Val = UINT32_MAX;
4193	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4194	*pu32Val = 1048575;
4195	else
4196	*pu32Val = 65534;
4197	break;
4198
4199	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
4200	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4201	*pu32Val = UINT32_MAX;
4202	else
4203	*pu32Val = 512;
4204	break;
4205
4206	case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
4207	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4208	*pu32Val = UINT32_MAX;
4209	else
4210	*pu32Val = 512;
4211	break;
4212
4213	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
4214	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4215	*pu32Val = 4096;
4216	else
4217	*pu32Val = 32;
4218	break;
4219
4220	case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
4221	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4222	*pu32Val = 4096;
4223	else
4224	*pu32Val = 32;
4225	break;
4226
4227	case SVGA3D_DEVCAP_TEXTURE_OPS:
4228	/* Obsolete */
4229	break;
4230
4231	case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
4232	case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
4233	case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
4234	case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
4235	case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
4236	case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
4237	case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
4238	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
4239	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
4240	case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
4241	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
4242	case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
4243	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
4244	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
4245	case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
4246	case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
4247	case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
4248	case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
4249	case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
4250	case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
4251	case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
4252	case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
4253	case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
4254	case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
4255	case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
4256	case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
4257	case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
4258	case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
4259	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
4260	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
4261	case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
4262	case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
4263	case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
4264	case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
4265	case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
4266	case SVGA3D_DEVCAP_SURFACEFMT_NV12:
4267	case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
4268	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
4269	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
4270	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
4271	case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
4272	case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
4273	case SVGA3D_DEVCAP_SURFACEFMT_YV12:
4274	{
4275	SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
4276	rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
4277	break;
4278	}
4279
4280	case SVGA3D_DEVCAP_MISSING62:
4281	/* Unused */
4282	break;
4283
4284	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
4285	/* Obsolete */
4286	break;
4287
4288	case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
4289	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4290	*pu32Val = 8;
4291	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4292	*pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
4293	else
4294	*pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
4295	break;
4296
4297	case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
4298	case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
4299	pu32Val = (1 << (2-1)) \| (1 << (4-1)) \| (1 << (8-1)); / 2x, 4x, 8x */
4300	break;
4301
4302	case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
4303	/* Obsolete */
4304	break;
4305
4306	case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
4307	/* Obsolete */
4308	break;
4309
4310	case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
4311	*pu32Val = 1;
4312	break;
4313
4314	case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
4315	*pu32Val = SVGA3D_MAX_CONTEXT_IDS;
4316	break;
4317
4318	case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
4319	*pu32Val = SVGA3D_MAX_SURFACE_IDS;
4320	break;
4321
4322	case SVGA3D_DEVCAP_DEAD1:
4323	/* Obsolete */
4324	break;
4325
4326	case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
4327	/* Obsolete */
4328	break;
4329
4330	case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
4331	/* Obsolete */
4332	break;
4333
4334	case SVGA3D_DEVCAP_LINE_AA:
4335	*pu32Val = 1;
4336	break;
4337
4338	case SVGA3D_DEVCAP_LINE_STIPPLE:
4339	pu32Val = 0; / DX11 does not seem to support this directly. */
4340	break;
4341
4342	case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
4343	AssertCompile(sizeof(uint32_t) == sizeof(float));
4344	(float )pu32Val = 1.0f;
4345	break;
4346
4347	case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
4348	AssertCompile(sizeof(uint32_t) == sizeof(float));
4349	(float )pu32Val = 1.0f;
4350	break;
4351
4352	case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
4353	/* Deprecated. */
4354	AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
4355	break;
4356
4357	case SVGA3D_DEVCAP_TS_COLOR_KEY:
4358	pu32Val = 0; / DX11 does not seem to support this directly. */
4359	break;
4360
4361	case SVGA3D_DEVCAP_DEAD2:
4362	break;
4363
4364	case SVGA3D_DEVCAP_DXCONTEXT:
4365	*pu32Val = 1;
4366	break;
4367
4368	case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
4369	*pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
4370	break;
4371
4372	case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
4373	*pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
4374	break;
4375
4376	case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
4377	*pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
4378	break;
4379
4380	case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
4381	pu32Val = 0; / boolean */
4382	break;
4383
4384	case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
4385	case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
4386	case SVGA3D_DEVCAP_DXFMT_R5G6B5:
4387	case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
4388	case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
4389	case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
4390	case SVGA3D_DEVCAP_DXFMT_Z_D32:
4391	case SVGA3D_DEVCAP_DXFMT_Z_D16:
4392	case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
4393	case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
4394	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
4395	case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
4396	case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
4397	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
4398	case SVGA3D_DEVCAP_DXFMT_DXT1:
4399	case SVGA3D_DEVCAP_DXFMT_DXT2:
4400	case SVGA3D_DEVCAP_DXFMT_DXT3:
4401	case SVGA3D_DEVCAP_DXFMT_DXT4:
4402	case SVGA3D_DEVCAP_DXFMT_DXT5:
4403	case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
4404	case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
4405	case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
4406	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
4407	case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
4408	case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
4409	case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
4410	case SVGA3D_DEVCAP_DXFMT_V8U8:
4411	case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
4412	case SVGA3D_DEVCAP_DXFMT_CxV8U8:
4413	case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
4414	case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
4415	case SVGA3D_DEVCAP_DXFMT_ALPHA8:
4416	case SVGA3D_DEVCAP_DXFMT_R_S10E5:
4417	case SVGA3D_DEVCAP_DXFMT_R_S23E8:
4418	case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
4419	case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
4420	case SVGA3D_DEVCAP_DXFMT_BUFFER:
4421	case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
4422	case SVGA3D_DEVCAP_DXFMT_V16U16:
4423	case SVGA3D_DEVCAP_DXFMT_G16R16:
4424	case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
4425	case SVGA3D_DEVCAP_DXFMT_UYVY:
4426	case SVGA3D_DEVCAP_DXFMT_YUY2:
4427	case SVGA3D_DEVCAP_DXFMT_NV12:
4428	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
4429	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
4430	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
4431	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
4432	case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
4433	case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
4434	case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
4435	case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
4436	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
4437	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
4438	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
4439	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
4440	case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
4441	case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
4442	case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
4443	case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
4444	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
4445	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
4446	case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
4447	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
4448	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
4449	case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
4450	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
4451	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
4452	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
4453	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
4454	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
4455	case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
4456	case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
4457	case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
4458	case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
4459	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
4460	case SVGA3D_DEVCAP_DXFMT_R32_UINT:
4461	case SVGA3D_DEVCAP_DXFMT_R32_SINT:
4462	case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
4463	case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
4464	case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
4465	case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
4466	case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
4467	case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
4468	case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
4469	case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
4470	case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
4471	case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
4472	case SVGA3D_DEVCAP_DXFMT_R16_UINT:
4473	case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
4474	case SVGA3D_DEVCAP_DXFMT_R16_SINT:
4475	case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
4476	case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
4477	case SVGA3D_DEVCAP_DXFMT_R8_UINT:
4478	case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
4479	case SVGA3D_DEVCAP_DXFMT_R8_SINT:
4480	case SVGA3D_DEVCAP_DXFMT_P8:
4481	case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
4482	case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
4483	case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
4484	case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
4485	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
4486	case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
4487	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
4488	case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
4489	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
4490	case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
4491	case SVGA3D_DEVCAP_DXFMT_ATI1:
4492	case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
4493	case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
4494	case SVGA3D_DEVCAP_DXFMT_ATI2:
4495	case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
4496	case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
4497	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
4498	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
4499	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
4500	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
4501	case SVGA3D_DEVCAP_DXFMT_Z_DF16:
4502	case SVGA3D_DEVCAP_DXFMT_Z_DF24:
4503	case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
4504	case SVGA3D_DEVCAP_DXFMT_YV12:
4505	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
4506	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
4507	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
4508	case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
4509	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
4510	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
4511	case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
4512	case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
4513	case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
4514	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
4515	case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
4516	case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
4517	case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
4518	case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
4519	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
4520	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
4521	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
4522	case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
4523	case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
4524	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
4525	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
4526	case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
4527	case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
4528	case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
4529	case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
4530	case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
4531	case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
4532	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
4533	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
4534	{
4535	SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
4536	rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
4537	break;
4538	}
4539
4540	case SVGA3D_DEVCAP_SM41:
4541	pu32Val = 1; / boolean */
4542	break;
4543
4544	case SVGA3D_DEVCAP_MULTISAMPLE_2X:
4545	pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (2 - 1))); / boolean */
4546	break;
4547
4548	case SVGA3D_DEVCAP_MULTISAMPLE_4X:
4549	pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (4 - 1))); / boolean */
4550	break;
4551
4552	case SVGA3D_DEVCAP_MS_FULL_QUALITY:
4553	pu32Val = 0; / boolean */
4554	break;
4555
4556	case SVGA3D_DEVCAP_LOGICOPS:
4557	AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
4558	pu32Val = 0; / boolean */
4559	break;
4560
4561	case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
4562	pu32Val = 0; / boolean */
4563	break;
4564
4565	case SVGA3D_DEVCAP_RESERVED_1:
4566	break;
4567
4568	case SVGA3D_DEVCAP_RESERVED_2:
4569	break;
4570
4571	case SVGA3D_DEVCAP_SM5:
4572	pu32Val = 1; / boolean */
4573	break;
4574
4575	case SVGA3D_DEVCAP_MULTISAMPLE_8X:
4576	pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (8 - 1))); / boolean */
4577	break;
4578
4579	case SVGA3D_DEVCAP_MAX:
4580	case SVGA3D_DEVCAP_INVALID:
4581	rc = VERR_NOT_SUPPORTED;
4582	break;
4583	}
4584
4585	return rc;
4586	}
4587
4588
4589	static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
4590	{
4591	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4592	AssertReturn(pState, VERR_INVALID_STATE);
4593
4594	return VINF_SUCCESS;
4595	}
4596
4597
4598	static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
4599	uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
4600	{
4601	RT_NOREF(cCopyBoxes);
4602	AssertReturn(pBox, VERR_INVALID_PARAMETER);
4603
4604	LogFunc(("src sid %d -> dst sid %d\n", src.sid, dest.sid));
4605
4606	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4607	AssertReturn(pState, VERR_INVALID_STATE);
4608
4609	PVMSVGA3DBACKEND pBackend = pState->pBackend;
4610
4611	PVMSVGA3DSURFACE pSrcSurface;
4612	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, src.sid, &pSrcSurface);
4613	AssertRCReturn(rc, rc);
4614
4615	PVMSVGA3DSURFACE pDstSurface;
4616	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dest.sid, &pDstSurface);
4617	AssertRCReturn(rc, rc);
4618
4619	/** @todo Implement a separate code paths for memory->texture, texture->memory and memory->memory transfers */
4620	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
4621	pSrcSurface->pBackendSurface ? "" : " sysmem", pSrcSurface->id,
4622	pDstSurface->pBackendSurface ? "" : " sysmem", pDstSurface->id));
4623
4624	//DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
4625	//AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4626
4627	if (pSrcSurface->pBackendSurface == NULL)
4628	{
4629	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSrcSurface);
4630	AssertRCReturn(rc, rc);
4631	}
4632
4633	if (pDstSurface->pBackendSurface == NULL)
4634	{
4635	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDstSurface);
4636	AssertRCReturn(rc, rc);
4637	}
4638
4639	DXDEVICE *pDXDevice = &pBackend->dxDevice;
4640
4641	/* Clip the box. */
4642	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
4643	rc = vmsvga3dMipmapLevel(pSrcSurface, src.face, src.mipmap, &pSrcMipLevel);
4644	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4645
4646	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
4647	rc = vmsvga3dMipmapLevel(pDstSurface, dest.face, dest.mipmap, &pDstMipLevel);
4648	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4649
4650	SVGA3dCopyBox clipBox = *pBox;
4651	vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
4652
4653	UINT DstSubresource = vmsvga3dCalcSubresource(dest.mipmap, dest.face, pDstSurface->cLevels);
4654	UINT DstX = clipBox.x;
4655	UINT DstY = clipBox.y;
4656	UINT DstZ = clipBox.z;
4657
4658	UINT SrcSubresource = vmsvga3dCalcSubresource(src.mipmap, src.face, pSrcSurface->cLevels);
4659	D3D11_BOX SrcBox;
4660	SrcBox.left = clipBox.srcx;
4661	SrcBox.top = clipBox.srcy;
4662	SrcBox.front = clipBox.srcz;
4663	SrcBox.right = clipBox.srcx + clipBox.w;
4664	SrcBox.bottom = clipBox.srcy + clipBox.h;
4665	SrcBox.back = clipBox.srcz + clipBox.d;
4666
4667	Assert(cCopyBoxes == 1); /** @todo */
4668
4669	ID3D11Resource *pDstResource;
4670	ID3D11Resource *pSrcResource;
4671	pDstResource = dxResource(pDstSurface);
4672	pSrcResource = dxResource(pSrcSurface);
4673
4674	pDXDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4675	pSrcResource, SrcSubresource, &SrcBox);
4676
4677	return rc;
4678	}
4679
4680
4681	static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
4682	{
4683	RT_NOREF(pThisCC, idScreen, pOldViewport);
4684	/** @todo Scroll the screen content without requiring the guest to redraw. */
4685	}
4686
4687
4688	static DECLCALLBACK(int) vmsvga3dBackSurfaceUpdateHeapBuffers(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
4689	{
4690	/** @todo */
4691	RT_NOREF(pThisCC, pSurface);
4692	return VERR_NOT_IMPLEMENTED;
4693	}
4694
4695
4696	/*
4697	*
4698	* VGPU9 callbacks. Not implemented.
4699	*
4700	*/
4701	/** @todo later */
4702
4703	/**
4704	* Create a new 3d context
4705	*
4706	* @returns VBox status code.
4707	* @param pThisCC The VGA/VMSVGA state for ring-3.
4708	* @param cid Context id
4709	*/
4710	static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
4711	{
4712	RT_NOREF(cid);
4713
4714	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4715	AssertReturn(pState, VERR_INVALID_STATE);
4716
4717	DEBUG_BREAKPOINT_TEST();
4718	return VERR_NOT_IMPLEMENTED;
4719	}
4720
4721
4722	/**
4723	* Destroy an existing 3d context
4724	*
4725	* @returns VBox status code.
4726	* @param pThisCC The VGA/VMSVGA state for ring-3.
4727	* @param cid Context id
4728	*/
4729	static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
4730	{
4731	RT_NOREF(cid);
4732
4733	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4734	AssertReturn(pState, VERR_INVALID_STATE);
4735
4736	DEBUG_BREAKPOINT_TEST();
4737	return VINF_SUCCESS;
4738	}
4739
4740
4741	static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
4742	{
4743	RT_NOREF(cid, type, matrix);
4744
4745	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4746	AssertReturn(pState, VERR_INVALID_STATE);
4747
4748	DEBUG_BREAKPOINT_TEST();
4749	return VINF_SUCCESS;
4750	}
4751
4752
4753	static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
4754	{
4755	RT_NOREF(cid, zRange);
4756
4757	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4758	AssertReturn(pState, VERR_INVALID_STATE);
4759
4760	DEBUG_BREAKPOINT_TEST();
4761	return VINF_SUCCESS;
4762	}
4763
4764
4765	static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
4766	{
4767	RT_NOREF(cid, cRenderStates, pRenderState);
4768
4769	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4770	AssertReturn(pState, VERR_INVALID_STATE);
4771
4772	DEBUG_BREAKPOINT_TEST();
4773	return VINF_SUCCESS;
4774	}
4775
4776
4777	static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
4778	{
4779	RT_NOREF(cid, type, target);
4780
4781	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4782	AssertReturn(pState, VERR_INVALID_STATE);
4783
4784	DEBUG_BREAKPOINT_TEST();
4785	return VINF_SUCCESS;
4786	}
4787
4788
4789	static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
4790	{
4791	RT_NOREF(cid, cTextureStates, pTextureState);
4792
4793	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4794	AssertReturn(pState, VERR_INVALID_STATE);
4795
4796	DEBUG_BREAKPOINT_TEST();
4797	return VINF_SUCCESS;
4798	}
4799
4800
4801	static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
4802	{
4803	RT_NOREF(cid, face, pMaterial);
4804
4805	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4806	AssertReturn(pState, VERR_INVALID_STATE);
4807
4808	DEBUG_BREAKPOINT_TEST();
4809	return VINF_SUCCESS;
4810	}
4811
4812
4813	static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
4814	{
4815	RT_NOREF(cid, index, pData);
4816
4817	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4818	AssertReturn(pState, VERR_INVALID_STATE);
4819
4820	DEBUG_BREAKPOINT_TEST();
4821	return VINF_SUCCESS;
4822	}
4823
4824
4825	static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
4826	{
4827	RT_NOREF(cid, index, enabled);
4828
4829	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4830	AssertReturn(pState, VERR_INVALID_STATE);
4831
4832	DEBUG_BREAKPOINT_TEST();
4833	return VINF_SUCCESS;
4834	}
4835
4836
4837	static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4838	{
4839	RT_NOREF(cid, pRect);
4840
4841	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4842	AssertReturn(pState, VERR_INVALID_STATE);
4843
4844	DEBUG_BREAKPOINT_TEST();
4845	return VINF_SUCCESS;
4846	}
4847
4848
4849	static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
4850	{
4851	RT_NOREF(cid, index, plane);
4852
4853	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4854	AssertReturn(pState, VERR_INVALID_STATE);
4855
4856	DEBUG_BREAKPOINT_TEST();
4857	return VINF_SUCCESS;
4858	}
4859
4860
4861	static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
4862	uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
4863	{
4864	/* From SVGA3D_BeginClear comments:
4865	*
4866	* Clear is not affected by clipping, depth test, or other
4867	* render state which affects the fragment pipeline.
4868	*
4869	* Therefore this code must ignore the current scissor rect.
4870	*/
4871
4872	RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
4873
4874	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4875	AssertReturn(pState, VERR_INVALID_STATE);
4876
4877	DEBUG_BREAKPOINT_TEST();
4878	return VINF_SUCCESS;
4879	}
4880
4881
4882	static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
4883	uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
4884	uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
4885	{
4886	RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
4887
4888	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4889	AssertReturn(pState, VERR_INVALID_STATE);
4890
4891	DEBUG_BREAKPOINT_TEST();
4892	return VINF_SUCCESS;
4893	}
4894
4895
4896	static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4897	{
4898	RT_NOREF(cid, pRect);
4899
4900	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4901	AssertReturn(pState, VERR_INVALID_STATE);
4902
4903	DEBUG_BREAKPOINT_TEST();
4904	return VINF_SUCCESS;
4905	}
4906
4907
4908	static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
4909	{
4910	RT_NOREF(sid, filter);
4911
4912	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4913	AssertReturn(pState, VERR_INVALID_STATE);
4914
4915	DEBUG_BREAKPOINT_TEST();
4916	return VINF_SUCCESS;
4917	}
4918
4919
4920	static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
4921	uint32_t cbData, uint32_t *pShaderData)
4922	{
4923	RT_NOREF(cid, shid, type, cbData, pShaderData);
4924
4925	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4926	AssertReturn(pState, VERR_INVALID_STATE);
4927
4928	DEBUG_BREAKPOINT_TEST();
4929	return VINF_SUCCESS;
4930	}
4931
4932
4933	static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
4934	{
4935	RT_NOREF(cid, shid, type);
4936
4937	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4938	AssertReturn(pState, VERR_INVALID_STATE);
4939
4940	DEBUG_BREAKPOINT_TEST();
4941	return VINF_SUCCESS;
4942	}
4943
4944
4945	static DECLCALLBACK(int) vmsvga3dBackShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
4946	{
4947	RT_NOREF(pContext, cid, type, shid);
4948
4949	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4950	AssertReturn(pState, VERR_INVALID_STATE);
4951
4952	DEBUG_BREAKPOINT_TEST();
4953	return VINF_SUCCESS;
4954	}
4955
4956
4957	static DECLCALLBACK(int) vmsvga3dBackShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
4958	SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
4959	{
4960	RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
4961
4962	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4963	AssertReturn(pState, VERR_INVALID_STATE);
4964
4965	DEBUG_BREAKPOINT_TEST();
4966	return VINF_SUCCESS;
4967	}
4968
4969	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryCreate(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4970	{
4971	RT_NOREF(pThisCC, pContext);
4972	DEBUG_BREAKPOINT_TEST();
4973	return VINF_SUCCESS;
4974	}
4975
4976	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryDelete(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4977	{
4978	RT_NOREF(pThisCC, pContext);
4979	DEBUG_BREAKPOINT_TEST();
4980	return VINF_SUCCESS;
4981	}
4982
4983	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryBegin(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4984	{
4985	RT_NOREF(pThisCC, pContext);
4986	DEBUG_BREAKPOINT_TEST();
4987	return VINF_SUCCESS;
4988	}
4989
4990	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryEnd(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4991	{
4992	RT_NOREF(pThisCC, pContext);
4993	DEBUG_BREAKPOINT_TEST();
4994	return VINF_SUCCESS;
4995	}
4996
4997	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryGetData(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
4998	{
4999	RT_NOREF(pThisCC, pContext, pu32Pixels);
5000	DEBUG_BREAKPOINT_TEST();
5001	return VINF_SUCCESS;
5002	}
5003
5004
5005	/**
5006	* Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
5007	*
5008	* @param pThisCC The device context.
5009	* @param fClearCOTableEntry Whether to clear the corresponding COTable entry.
5010	* @param pSurface The surface being destroyed.
5011	*/
5012	static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface)
5013	{
5014	RT_NOREF(pThisCC);
5015
5016	/* The caller should not use the function for system memory surfaces. */
5017	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5018	if (!pBackendSurface)
5019	return;
5020	pSurface->pBackendSurface = NULL;
5021
5022	LogFunc(("sid=%u\n", pSurface->id));
5023
5024	/* If any views have been created for this resource, then also release them. */
5025	DXVIEW pIter, pNext;
5026	RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
5027	{
5028	LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
5029
5030	/** @todo The common DX code should track the views and clean COTable on a surface destruction. */
5031	if (fClearCOTableEntry)
5032	{
5033	PVMSVGA3DDXCONTEXT pDXContext;
5034	int rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pIter->cid, &pDXContext);
5035	AssertRC(rc);
5036	if (RT_SUCCESS(rc))
5037	{
5038	switch (pIter->enmViewType)
5039	{
5040	case VMSVGA3D_VIEWTYPE_RENDERTARGET:
5041	{
5042	SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[pIter->viewId];
5043	RT_ZERO(*pEntry);
5044	break;
5045	}
5046	case VMSVGA3D_VIEWTYPE_DEPTHSTENCIL:
5047	{
5048	SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[pIter->viewId];
5049	RT_ZERO(*pEntry);
5050	break;
5051	}
5052	case VMSVGA3D_VIEWTYPE_SHADERRESOURCE:
5053	{
5054	SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[pIter->viewId];
5055	RT_ZERO(*pEntry);
5056	break;
5057	}
5058	case VMSVGA3D_VIEWTYPE_UNORDEREDACCESS:
5059	{
5060	SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[pIter->viewId];
5061	RT_ZERO(*pEntry);
5062	break;
5063	}
5064	case VMSVGA3D_VIEWTYPE_VIDEODECODEROUTPUT:
5065	{
5066	VBSVGACOTableDXVideoDecoderOutputViewEntry *pEntry = &pDXContext->cot.paVideoDecoderOutputView[pIter->viewId];
5067	RT_ZERO(*pEntry);
5068	break;
5069	}
5070	case VMSVGA3D_VIEWTYPE_VIDEOPROCESSORINPUT:
5071	{
5072	VBSVGACOTableDXVideoProcessorInputViewEntry *pEntry = &pDXContext->cot.paVideoProcessorInputView[pIter->viewId];
5073	RT_ZERO(*pEntry);
5074	break;
5075	}
5076	case VMSVGA3D_VIEWTYPE_VIDEOPROCESSOROUTPUT:
5077	{
5078	VBSVGACOTableDXVideoProcessorOutputViewEntry *pEntry = &pDXContext->cot.paVideoProcessorOutputView[pIter->viewId];
5079	RT_ZERO(*pEntry);
5080	break;
5081	}
5082	case VMSVGA3D_VIEWTYPE_NONE:
5083	AssertFailed();
5084	break;
5085	}
5086	}
5087	}
5088
5089	dxViewDestroy(pIter);
5090	}
5091
5092	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
5093	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
5094	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
5095	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5096	{
5097	D3D_RELEASE(pBackendSurface->staging.pResource);
5098	D3D_RELEASE(pBackendSurface->dynamic.pResource);
5099	D3D_RELEASE(pBackendSurface->u.pResource);
5100	}
5101	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
5102	{
5103	#ifndef DX_COMMON_STAGING_BUFFER
5104	D3D_RELEASE(pBackendSurface->staging.pBuffer);
5105	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
5106	#endif
5107	D3D_RELEASE(pBackendSurface->u.pBuffer);
5108	}
5109	else
5110	{
5111	AssertFailed();
5112	}
5113
5114	RTMemFree(pBackendSurface);
5115	}
5116
5117
5118	static DECLCALLBACK(void) vmsvga3dBackSurfaceInvalidateImage(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface, uint32_t uFace, uint32_t uMipmap)
5119	{
5120	RT_NOREF(pThisCC, uFace, uMipmap);
5121
5122	/* The caller should not use the function for system memory surfaces. */
5123	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5124	if (!pBackendSurface)
5125	return;
5126
5127	LogFunc(("sid=%u\n", pSurface->id));
5128
5129	/* The guest uses this to invalidate a buffer. */
5130	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
5131	{
5132	Assert(uFace == 0 && uMipmap == 0); /* The caller ensures this. */
5133	/** @todo This causes flickering when a buffer is invalidated and re-created right before a draw call. */
5134	//vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
5135	}
5136	else
5137	{
5138	/** @todo Delete views that have been created for this mipmap.
5139	* For now just delete all views, they will be recte=reated if necessary.
5140	*/
5141	ASSERT_GUEST_FAILED();
5142	DXVIEW pIter, pNext;
5143	RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
5144	{
5145	dxViewDestroy(pIter);
5146	}
5147	}
5148	}
5149
5150
5151	/**
5152	* Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
5153	*
5154	* @returns VBox status code.
5155	* @param pThis The VGA device instance.
5156	* @param pState The VMSVGA3d state.
5157	* @param pDstSurface The destination host surface.
5158	* @param uDstFace The destination face (valid).
5159	* @param uDstMipmap The destination mipmap level (valid).
5160	* @param pDstBox The destination box.
5161	* @param pSrcSurface The source host surface.
5162	* @param uSrcFace The destination face (valid).
5163	* @param uSrcMipmap The source mimap level (valid).
5164	* @param pSrcBox The source box.
5165	* @param enmMode The strecht blt mode .
5166	* @param pContext The VMSVGA3d context (already current for OGL).
5167	*/
5168	static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
5169	PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
5170	PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
5171	SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
5172	{
5173	RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
5174	pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
5175
5176	AssertFailed();
5177	return VINF_SUCCESS;
5178	}
5179
5180
5181	/**
5182	* Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
5183	*
5184	* @returns Failure status code or @a rc.
5185	* @param pThis The shared VGA/VMSVGA instance data.
5186	* @param pThisCC The VGA/VMSVGA state for ring-3.
5187	* @param pState The VMSVGA3d state.
5188	* @param pSurface The host surface.
5189	* @param pMipLevel Mipmap level. The caller knows it already.
5190	* @param uHostFace The host face (valid).
5191	* @param uHostMipmap The host mipmap level (valid).
5192	* @param GuestPtr The guest pointer.
5193	* @param cbGuestPitch The guest pitch.
5194	* @param transfer The transfer direction.
5195	* @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
5196	* @param pContext The context (for OpenGL).
5197	* @param rc The current rc for all boxes.
5198	* @param iBox The current box number (for Direct 3D).
5199	*/
5200	static DECLCALLBACK(int) vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
5201	PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
5202	SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
5203	SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
5204	{
5205	RT_NOREF(pState, pMipLevel, pContext, iBox);
5206
5207	/* The called should not use the function for system memory surfaces. */
5208	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5209	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
5210
5211	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
5212	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
5213	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
5214	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5215	{
5216	/** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
5217	/** @todo Use vmsvga3dGetBoxDimensions because it does clipping and calculations. */
5218	uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
5219	uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
5220	Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
5221	Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
5222	uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
5223	uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
5224	AssertMsgReturn(cBlocksX && cBlocksY && pBox->d, ("Empty box %dx%dx%d\n", pBox->w, pBox->h, pBox->d), VERR_INTERNAL_ERROR);
5225
5226	/* vmsvgaR3GmrTransfer verifies uGuestOffset.
5227	* srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
5228	* to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
5229	*/
5230	uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
5231	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
5232
5233	/* 3D texture needs additional processing. */
5234	ASSERT_GUEST_RETURN( pBox->z < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5235	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5236	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->z,
5237	VERR_INVALID_PARAMETER);
5238	ASSERT_GUEST_RETURN( pBox->srcz < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5239	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5240	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->srcz,
5241	VERR_INVALID_PARAMETER);
5242
5243	uGuestOffset += pBox->srcz * pMipLevel->cbSurfacePlane;
5244
5245	SVGA3dSurfaceImageId image;
5246	image.sid = pSurface->id;
5247	image.face = uHostFace;
5248	image.mipmap = uHostMipmap;
5249
5250	SVGA3dBox box;
5251	box.x = pBox->x;
5252	box.y = pBox->y;
5253	box.z = pBox->z;
5254	box.w = pBox->w;
5255	box.h = pBox->h;
5256	box.d = pBox->d;
5257
5258	VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
5259	? VMSVGA3D_SURFACE_MAP_WRITE
5260	: VMSVGA3D_SURFACE_MAP_READ;
5261
5262	VMSVGA3D_MAPPED_SURFACE map;
5263	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
5264	if (RT_SUCCESS(rc))
5265	{
5266	#if 0
5267	if (box.w == 250 && box.h == 250 && box.d == 1 && enmMap == VMSVGA3D_SURFACE_MAP_READ)
5268	{
5269	DEBUG_BREAKPOINT_TEST();
5270	vmsvga3dMapWriteBmpFile(&map, "P");
5271	}
5272	#endif
5273	/* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
5274	* and offset of the first scanline.
5275	*/
5276	uint32_t cbLockedBuf = map.cbRowPitch * cBlocksY;
5277	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5278	cbLockedBuf += map.cbDepthPitch * (pBox->d - 1); /// @todo why map does not compute this for 2D textures
5279	uint8_t pu8LockedBuf = (uint8_t )map.pvData;
5280	uint32_t offLockedBuf = 0;
5281
5282	for (uint32_t iPlane = 0; iPlane < pBox->d; ++iPlane)
5283	{
5284	AssertBreak(uGuestOffset < UINT32_MAX);
5285
5286	rc = vmsvgaR3GmrTransfer(pThis,
5287	pThisCC,
5288	transfer,
5289	pu8LockedBuf,
5290	cbLockedBuf,
5291	offLockedBuf,
5292	map.cbRowPitch,
5293	GuestPtr,
5294	(uint32_t)uGuestOffset,
5295	cbGuestPitch,
5296	cBlocksX * pSurface->cbBlock,
5297	cBlocksY);
5298	AssertRC(rc);
5299
5300	uGuestOffset += pMipLevel->cbSurfacePlane;
5301	offLockedBuf += map.cbDepthPitch;
5302	}
5303
5304	bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
5305	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, fWritten);
5306	}
5307	}
5308	else
5309	{
5310	AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
5311	rc = VERR_NOT_IMPLEMENTED;
5312	}
5313
5314	return rc;
5315	}
5316
5317
5318	/**
5319	* Create D3D/OpenGL texture object for the specified surface.
5320	*
5321	* Surfaces are created when needed.
5322	*
5323	* @param pThisCC The device context.
5324	* @param pContext The context.
5325	* @param idAssociatedContext Probably the same as pContext->id.
5326	* @param pSurface The surface to create the texture for.
5327	*/
5328	static DECLCALLBACK(int) vmsvga3dBackCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
5329	PVMSVGA3DSURFACE pSurface)
5330
5331	{
5332	RT_NOREF(pThisCC, pContext, idAssociatedContext, pSurface);
5333
5334	AssertFailed();
5335	return VINF_SUCCESS;
5336	}
5337
5338
5339	/*
5340	* DX callbacks.
5341	*/
5342
5343	static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5344	{
5345	RT_NOREF(pThisCC);
5346
5347	/* Allocate a backend specific context structure. */
5348	PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
5349	AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
5350	pDXContext->pBackendDXContext = pBackendDXContext;
5351
5352	LogFunc(("cid %d\n", pDXContext->cid));
5353	return VINF_SUCCESS;
5354	}
5355
5356
5357	static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5358	{
5359	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5360
5361	LogFunc(("cid %d\n", pDXContext->cid));
5362
5363	if (pDXContext->pBackendDXContext)
5364	{
5365	/* Make sure that any pending draw calls are finished. */
5366	dxDeviceFlush(&pBackend->dxDevice);
5367
5368	/* Clean up context resources. */
5369	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5370
5371	for (uint32_t idxShaderState = 0; idxShaderState < RT_ELEMENTS(pBackendDXContext->resources.shaderState); ++idxShaderState)
5372	{
5373	ID3D11Buffer **papConstantBuffer = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[0];
5374	D3D_RELEASE_ARRAY(RT_ELEMENTS(pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers), papConstantBuffer);
5375	}
5376
5377	if (pBackendDXContext->paRenderTargetView)
5378	{
5379	for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
5380	D3D_RELEASE(pBackendDXContext->paRenderTargetView[i].u.pRenderTargetView);
5381	}
5382	if (pBackendDXContext->paDepthStencilView)
5383	{
5384	for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
5385	D3D_RELEASE(pBackendDXContext->paDepthStencilView[i].u.pDepthStencilView);
5386	}
5387	if (pBackendDXContext->paShaderResourceView)
5388	{
5389	for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
5390	D3D_RELEASE(pBackendDXContext->paShaderResourceView[i].u.pShaderResourceView);
5391	}
5392	if (pBackendDXContext->paElementLayout)
5393	{
5394	for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
5395	D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
5396	}
5397	if (pBackendDXContext->papBlendState)
5398	D3D_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
5399	if (pBackendDXContext->papDepthStencilState)
5400	D3D_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
5401	if (pBackendDXContext->papRasterizerState)
5402	D3D_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
5403	if (pBackendDXContext->papSamplerState)
5404	D3D_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
5405	if (pBackendDXContext->paQuery)
5406	{
5407	for (uint32_t i = 0; i < pBackendDXContext->cQuery; ++i)
5408	dxDestroyQuery(&pBackendDXContext->paQuery[i]);
5409	}
5410	if (pBackendDXContext->paShader)
5411	{
5412	for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
5413	dxDestroyShader(&pBackendDXContext->paShader[i]);
5414	}
5415	if (pBackendDXContext->paStreamOutput)
5416	{
5417	for (uint32_t i = 0; i < pBackendDXContext->cStreamOutput; ++i)
5418	dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
5419	}
5420	if (pBackendDXContext->paUnorderedAccessView)
5421	{
5422	for (uint32_t i = 0; i < pBackendDXContext->cUnorderedAccessView; ++i)
5423	D3D_RELEASE(pBackendDXContext->paUnorderedAccessView[i].u.pUnorderedAccessView);
5424	}
5425	if (pBackendDXContext->paVideoProcessor)
5426	{
5427	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessor; ++i)
5428	dxDestroyVideoProcessor(&pBackendDXContext->paVideoProcessor[i]);
5429	}
5430	if (pBackendDXContext->paVideoDecoderOutputView)
5431	{
5432	/** @todo dxViewDestroy? */
5433	for (uint32_t i = 0; i < pBackendDXContext->cVideoDecoderOutputView; ++i)
5434	D3D_RELEASE(pBackendDXContext->paVideoDecoderOutputView[i].u.pVideoDecoderOutputView);
5435	}
5436	if (pBackendDXContext->paVideoDecoder)
5437	{
5438	for (uint32_t i = 0; i < pBackendDXContext->cVideoDecoder; ++i)
5439	dxDestroyVideoDecoder(&pBackendDXContext->paVideoDecoder[i]);
5440	}
5441	if (pBackendDXContext->paVideoProcessorInputView)
5442	{
5443	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorInputView; ++i)
5444	D3D_RELEASE(pBackendDXContext->paVideoProcessorInputView[i].u.pVideoProcessorInputView);
5445	}
5446	if (pBackendDXContext->paVideoProcessorOutputView)
5447	{
5448	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorOutputView; ++i)
5449	D3D_RELEASE(pBackendDXContext->paVideoProcessorOutputView[i].u.pVideoProcessorOutputView);
5450	}
5451
5452	RTMemFreeZ(pBackendDXContext->papBlendState, sizeof(pBackendDXContext->papBlendState[0]) * pBackendDXContext->cBlendState);
5453	RTMemFreeZ(pBackendDXContext->papDepthStencilState, sizeof(pBackendDXContext->papDepthStencilState[0]) * pBackendDXContext->cDepthStencilState);
5454	RTMemFreeZ(pBackendDXContext->papSamplerState, sizeof(pBackendDXContext->papSamplerState[0]) * pBackendDXContext->cSamplerState);
5455	RTMemFreeZ(pBackendDXContext->papRasterizerState, sizeof(pBackendDXContext->papRasterizerState[0]) * pBackendDXContext->cRasterizerState);
5456	RTMemFreeZ(pBackendDXContext->paElementLayout, sizeof(pBackendDXContext->paElementLayout[0]) * pBackendDXContext->cElementLayout);
5457	RTMemFreeZ(pBackendDXContext->paRenderTargetView, sizeof(pBackendDXContext->paRenderTargetView[0]) * pBackendDXContext->cRenderTargetView);
5458	RTMemFreeZ(pBackendDXContext->paDepthStencilView, sizeof(pBackendDXContext->paDepthStencilView[0]) * pBackendDXContext->cDepthStencilView);
5459	RTMemFreeZ(pBackendDXContext->paShaderResourceView, sizeof(pBackendDXContext->paShaderResourceView[0]) * pBackendDXContext->cShaderResourceView);
5460	RTMemFreeZ(pBackendDXContext->paQuery, sizeof(pBackendDXContext->paQuery[0]) * pBackendDXContext->cQuery);
5461	RTMemFreeZ(pBackendDXContext->paShader, sizeof(pBackendDXContext->paShader[0]) * pBackendDXContext->cShader);
5462	RTMemFreeZ(pBackendDXContext->paStreamOutput, sizeof(pBackendDXContext->paStreamOutput[0]) * pBackendDXContext->cStreamOutput);
5463	RTMemFreeZ(pBackendDXContext->paUnorderedAccessView, sizeof(pBackendDXContext->paUnorderedAccessView[0]) * pBackendDXContext->cUnorderedAccessView);
5464	RTMemFreeZ(pBackendDXContext->paVideoProcessor, sizeof(pBackendDXContext->paVideoProcessor[0]) * pBackendDXContext->cVideoProcessor);
5465	RTMemFreeZ(pBackendDXContext->paVideoDecoderOutputView, sizeof(pBackendDXContext->paVideoDecoderOutputView[0]) * pBackendDXContext->cVideoDecoderOutputView);
5466	RTMemFreeZ(pBackendDXContext->paVideoDecoder, sizeof(pBackendDXContext->paVideoDecoder[0]) * pBackendDXContext->cVideoDecoder);
5467	RTMemFreeZ(pBackendDXContext->paVideoProcessorInputView, sizeof(pBackendDXContext->paVideoProcessorInputView[0]) * pBackendDXContext->cVideoProcessorInputView);
5468	RTMemFreeZ(pBackendDXContext->paVideoProcessorOutputView, sizeof(pBackendDXContext->paVideoProcessorOutputView[0]) * pBackendDXContext->cVideoProcessorOutputView);
5469
5470	RTMemFreeZ(pBackendDXContext, sizeof(*pBackendDXContext));
5471	pDXContext->pBackendDXContext = NULL;
5472	}
5473	return VINF_SUCCESS;
5474	}
5475
5476
5477	static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5478	{
5479	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5480	RT_NOREF(pBackend, pDXContext);
5481	return VINF_SUCCESS;
5482	}
5483
5484
5485	static DECLCALLBACK(int) vmsvga3dBackDXSwitchContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5486	{
5487	/* The new context state will be applied by the generic DX code. */
5488	RT_NOREF(pThisCC, pDXContext);
5489	return VINF_SUCCESS;
5490	}
5491
5492
5493	static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5494	{
5495	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5496	RT_NOREF(pBackend, pDXContext);
5497	return VINF_SUCCESS;
5498	}
5499
5500
5501	static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5502	{
5503	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5504
5505	RT_NOREF(pBackend, pDXContext);
5506	AssertFailed(); /** @todo Implement */
5507	return VERR_NOT_IMPLEMENTED;
5508	}
5509
5510
5511	static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
5512	{
5513	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5514	RT_NOREF(pBackend);
5515
5516	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
5517	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5518
5519	if (sid == SVGA_ID_INVALID)
5520	{
5521	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5522	D3D_RELEASE(pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot]);
5523	return VINF_SUCCESS;
5524	}
5525
5526	PVMSVGA3DSURFACE pSurface;
5527	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
5528	AssertRCReturn(rc, rc);
5529
5530	PVMSVGA3DMIPMAPLEVEL pMipLevel;
5531	rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
5532	AssertRCReturn(rc, rc);
5533
5534	uint32_t const cbSurface = pMipLevel->cbSurface;
5535	ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
5536	&& sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
5537
5538	/* Constant buffers are created on demand. */
5539	Assert(pSurface->pBackendSurface == NULL);
5540
5541	/* Upload the current data, if any. */
5542	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
5543	D3D11_SUBRESOURCE_DATA initialData;
5544	if (pMipLevel->pSurfaceData)
5545	{
5546	initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
5547	initialData.SysMemPitch = sizeInBytes;
5548	initialData.SysMemSlicePitch = sizeInBytes;
5549
5550	pInitialData = &initialData;
5551
5552	#ifdef LOG_ENABLED
5553	if (LogIs8Enabled())
5554	{
5555	float pValuesF = (float )initialData.pSysMem;
5556	for (unsigned i = 0; i < sizeInBytes / sizeof(float) / 4; ++i)
5557	{
5558	Log8(("ConstF /%d/ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ",\n",
5559	i, FLOAT_FMT_ARGS(pValuesF[i4 + 0]), FLOAT_FMT_ARGS(pValuesF[i4 + 1]), FLOAT_FMT_ARGS(pValuesF[i4 + 2]), FLOAT_FMT_ARGS(pValuesF[i4 + 3])));
5560	}
5561	}
5562	#endif
5563	}
5564
5565	D3D11_BUFFER_DESC bd;
5566	RT_ZERO(bd);
5567	bd.ByteWidth = sizeInBytes;
5568	bd.Usage = D3D11_USAGE_DEFAULT;
5569	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
5570	bd.CPUAccessFlags = 0;
5571	bd.MiscFlags = 0;
5572	bd.StructureByteStride = 0;
5573
5574	ID3D11Buffer *pBuffer = 0;
5575	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
5576	if (SUCCEEDED(hr))
5577	{
5578	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5579	ID3D11Buffer **ppOldBuffer = &pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot];
5580	LogFunc(("constant buffer: [%u][%u]: sid = %u, %u, %u (%p -> %p)\n",
5581	idxShaderState, slot, sid, offsetInBytes, sizeInBytes, *ppOldBuffer, pBuffer));
5582	D3D_RELEASE(*ppOldBuffer);
5583	*ppOldBuffer = pBuffer;
5584	}
5585
5586	return VINF_SUCCESS;
5587	}
5588
5589	static int dxSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type)
5590	{
5591	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
5592	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
5593
5594	AssertReturn(type >= SVGA3D_SHADERTYPE_MIN && type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
5595
5596	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5597	uint32_t const *pSRIds = &pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[0];
5598	ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
5599	for (uint32_t i = 0; i < SVGA3D_DX_MAX_SRVIEWS; ++i)
5600	{
5601	SVGA3dShaderResourceViewId const shaderResourceViewId = pSRIds[i];
5602	if (shaderResourceViewId != SVGA3D_INVALID_ID)
5603	{
5604	ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
5605
5606	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
5607	Assert(pDXView->u.pShaderResourceView);
5608	papShaderResourceView[i] = pDXView->u.pShaderResourceView;
5609	}
5610	else
5611	papShaderResourceView[i] = NULL;
5612	}
5613
5614	dxShaderResourceViewSet(pDXDevice, type, 0, SVGA3D_DX_MAX_SRVIEWS, papShaderResourceView);
5615	return VINF_SUCCESS;
5616	}
5617
5618
5619	static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
5620	{
5621	/* Shader resources will be set in setupPipeline. */
5622	RT_NOREF(pThisCC, pDXContext, startView, type, cShaderResourceViewId, paShaderResourceViewId);
5623	return VINF_SUCCESS;
5624	}
5625
5626
5627	static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGA3dShaderType type)
5628	{
5629	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5630	RT_NOREF(pBackend, pDXContext);
5631
5632	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
5633	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5634
5635	RT_NOREF(shaderId, type);
5636
5637	return VINF_SUCCESS;
5638	}
5639
5640
5641	static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
5642	{
5643	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5644	RT_NOREF(pBackend);
5645
5646	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
5647	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5648
5649	ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
5650	for (uint32_t i = 0; i < cSamplerId; ++i)
5651	{
5652	SVGA3dSamplerId samplerId = paSamplerId[i];
5653	if (samplerId != SVGA3D_INVALID_ID)
5654	{
5655	ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
5656	papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
5657	}
5658	else
5659	papSamplerState[i] = NULL;
5660	}
5661
5662	dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
5663	return VINF_SUCCESS;
5664	}
5665
5666
5667	static void vboxDXMatchShaderInput(DXSHADER pDXShader, DXSHADER pDXShaderPrior)
5668	{
5669	/* For each input generic attribute of the shader find corresponding entry in the prior shader. */
5670	for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5671	{
5672	SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5673	DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5674
5675	if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5676	continue;
5677
5678	int iMatch = -1;
5679	for (uint32_t iPrior = 0; iPrior < pDXShaderPrior->shaderInfo.cOutputSignature; ++iPrior)
5680	{
5681	SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iPrior];
5682
5683	if (pPriorSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5684	continue;
5685
5686	if (pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex)
5687	{
5688	iMatch = iPrior;
5689	if (pPriorSignatureEntry->mask == pSignatureEntry->mask)
5690	break; /* Exact match, no need to continue search. */
5691	}
5692	}
5693
5694	if (iMatch >= 0)
5695	{
5696	SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iMatch];
5697	DXShaderAttributeSemantic const *pPriorSemantic = &pDXShaderPrior->shaderInfo.aOutputSemantic[iMatch];
5698
5699	Assert(pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex);
5700	Assert((pPriorSignatureEntry->mask & pSignatureEntry->mask) == pSignatureEntry->mask);
5701	RT_NOREF(pPriorSignatureEntry);
5702
5703	pSemantic->SemanticIndex = pPriorSemantic->SemanticIndex;
5704	}
5705	}
5706	}
5707
5708
5709	static void vboxDXMatchShaderSignatures(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
5710	{
5711	SVGA3dShaderId const shaderIdVS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN].shaderId;
5712	SVGA3dShaderId const shaderIdHS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_HS - SVGA3D_SHADERTYPE_MIN].shaderId;
5713	SVGA3dShaderId const shaderIdDS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_DS - SVGA3D_SHADERTYPE_MIN].shaderId;
5714	SVGA3dShaderId const shaderIdGS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_GS - SVGA3D_SHADERTYPE_MIN].shaderId;
5715	SVGA3dShaderId const shaderIdPS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_PS - SVGA3D_SHADERTYPE_MIN].shaderId;
5716
5717	/* Try to fix the input semantic indices. Output is usually not changed. */
5718	switch (pDXShader->enmShaderType)
5719	{
5720	case SVGA3D_SHADERTYPE_VS:
5721	{
5722	/* Match input to input layout, which sets generic semantic indices to the source registerIndex (dxCreateInputLayout). */
5723	for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5724	{
5725	SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5726	DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5727
5728	if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5729	continue;
5730
5731	pSemantic->SemanticIndex = pSignatureEntry->registerIndex;
5732	}
5733	break;
5734	}
5735	case SVGA3D_SHADERTYPE_HS:
5736	{
5737	/* Input of a HS shader is the output of VS. */
5738	DXSHADER *pDXShaderPrior;
5739	if (shaderIdVS != SVGA3D_INVALID_ID)
5740	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5741	else
5742	pDXShaderPrior = NULL;
5743
5744	if (pDXShaderPrior)
5745	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5746
5747	break;
5748	}
5749	case SVGA3D_SHADERTYPE_DS:
5750	{
5751	/* Input of a DS shader is the output of HS. */
5752	DXSHADER *pDXShaderPrior;
5753	if (shaderIdHS != SVGA3D_INVALID_ID)
5754	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdHS];
5755	else
5756	pDXShaderPrior = NULL;
5757
5758	if (pDXShaderPrior)
5759	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5760
5761	break;
5762	}
5763	case SVGA3D_SHADERTYPE_GS:
5764	{
5765	/* Input signature of a GS shader is the output of DS or VS. */
5766	DXSHADER *pDXShaderPrior;
5767	if (shaderIdDS != SVGA3D_INVALID_ID)
5768	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5769	else if (shaderIdVS != SVGA3D_INVALID_ID)
5770	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5771	else
5772	pDXShaderPrior = NULL;
5773
5774	if (pDXShaderPrior)
5775	{
5776	/* If GS shader does not have input signature (Windows guest can do that),
5777	* then assign the prior shader signature as GS input.
5778	*/
5779	if (pDXShader->shaderInfo.cInputSignature == 0)
5780	{
5781	pDXShader->shaderInfo.cInputSignature = pDXShaderPrior->shaderInfo.cOutputSignature;
5782	memcpy(pDXShader->shaderInfo.aInputSignature,
5783	pDXShaderPrior->shaderInfo.aOutputSignature,
5784	pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
5785	memcpy(pDXShader->shaderInfo.aInputSemantic,
5786	pDXShaderPrior->shaderInfo.aOutputSemantic,
5787	pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(DXShaderAttributeSemantic));
5788	}
5789	else
5790	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5791	}
5792
5793	/* Output signature of a GS shader is the input of the pixel shader. */
5794	if (shaderIdPS != SVGA3D_INVALID_ID)
5795	{
5796	/* If GS shader does not have output signature (Windows guest can do that),
5797	* then assign the PS shader signature as GS output.
5798	*/
5799	if (pDXShader->shaderInfo.cOutputSignature == 0)
5800	{
5801	DXSHADER const *pDXShaderPosterior = &pDXContext->pBackendDXContext->paShader[shaderIdPS];
5802	pDXShader->shaderInfo.cOutputSignature = pDXShaderPosterior->shaderInfo.cInputSignature;
5803	memcpy(pDXShader->shaderInfo.aOutputSignature,
5804	pDXShaderPosterior->shaderInfo.aInputSignature,
5805	pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
5806	memcpy(pDXShader->shaderInfo.aOutputSemantic,
5807	pDXShaderPosterior->shaderInfo.aInputSemantic,
5808	pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(DXShaderAttributeSemantic));
5809	}
5810	}
5811
5812	SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
5813	if (soid != SVGA3D_INVALID_ID)
5814	{
5815	ASSERT_GUEST_RETURN_VOID(soid < pDXContext->pBackendDXContext->cStreamOutput);
5816
5817	/* Set semantic names and indices for SO declaration entries according to the shader output. */
5818	SVGACOTableDXStreamOutputEntry const *pStreamOutputEntry = &pDXContext->cot.paStreamOutput[soid];
5819	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
5820
5821	if (pDXStreamOutput->cDeclarationEntry == 0)
5822	{
5823	int rc = dxDefineStreamOutput(pThisCC, pDXContext, soid, pStreamOutputEntry, pDXShader);
5824	AssertRCReturnVoid(rc);
5825	#ifdef LOG_ENABLED
5826	Log6(("Stream output declaration:\n\n"));
5827	Log6(("Stream SemanticName SemanticIndex StartComponent ComponentCount OutputSlot\n"));
5828	Log6(("------ -------------- ------------- -------------- -------------- ----------\n"));
5829	for (unsigned i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
5830	{
5831	D3D11_SO_DECLARATION_ENTRY *p = &pDXStreamOutput->aDeclarationEntry[i];
5832	Log6(("%d %-14s %d %d %d %d\n",
5833	p->Stream, p->SemanticName, p->SemanticIndex, p->StartComponent, p->ComponentCount, p->OutputSlot));
5834	}
5835	Log6(("\n"));
5836	#endif
5837
5838	}
5839	}
5840	break;
5841	}
5842	case SVGA3D_SHADERTYPE_PS:
5843	{
5844	/* Input of a PS shader is the output of GS, DS or VS. */
5845	DXSHADER *pDXShaderPrior;
5846	if (shaderIdGS != SVGA3D_INVALID_ID)
5847	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdGS];
5848	else if (shaderIdDS != SVGA3D_INVALID_ID)
5849	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5850	else if (shaderIdVS != SVGA3D_INVALID_ID)
5851	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5852	else
5853	pDXShaderPrior = NULL;
5854
5855	if (pDXShaderPrior)
5856	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5857	break;
5858	}
5859	default:
5860	break;
5861	}
5862
5863	/* Intermediate shaders normally have both input and output signatures. However it is ok if they do not.
5864	* Just catch this unusual case in order to see if everything is fine.
5865	*/
5866	Assert( ( pDXShader->enmShaderType == SVGA3D_SHADERTYPE_VS
5867	\|\| pDXShader->enmShaderType == SVGA3D_SHADERTYPE_PS
5868	\|\| pDXShader->enmShaderType == SVGA3D_SHADERTYPE_CS)
5869	\|\| (pDXShader->shaderInfo.cInputSignature && pDXShader->shaderInfo.cOutputSignature));
5870	}
5871
5872
5873	static void vboxDXUpdateVSInputSignature(PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
5874	{
5875	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
5876	if (elementLayoutId != SVGA3D_INVALID_ID)
5877	{
5878	SVGACOTableDXElementLayoutEntry const *pElementLayout = &pDXContext->cot.paElementLayout[elementLayoutId];
5879	for (uint32_t i = 0; i < RT_MIN(pElementLayout->numDescs, pDXShader->shaderInfo.cInputSignature); ++i)
5880	{
5881	SVGA3dInputElementDesc const *pElementDesc = &pElementLayout->descs[i];
5882	SVGA3dDXSignatureEntry *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5883	pSignatureEntry->componentType = DXShaderComponentTypeFromFormat(pElementDesc->format);
5884	}
5885	}
5886	}
5887
5888
5889	static void dxCreateInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, DXSHADER *pDXShader)
5890	{
5891	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
5892	AssertReturnVoid(pDevice->pDevice);
5893
5894	SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
5895	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
5896
5897	if (pDXElementLayout->cElementDesc == 0)
5898	{
5899	/* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
5900	* if they are consistent between the element layout and shader input signature.
5901	* "In general, data passed between pipeline stages is completely generic and is not uniquely
5902	* interpreted by the system; arbitrary semantics are allowed ..."
5903	*
5904	* However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
5905	*
5906	* System-Value semantics ("SV_*") between shaders require proper names of course.
5907	* But they are irrelevant for input attributes.
5908	*/
5909	pDXElementLayout->cElementDesc = pEntry->numDescs;
5910	for (uint32_t i = 0; i < pEntry->numDescs; ++i)
5911	{
5912	D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
5913	SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
5914	pDst->SemanticName = "ATTRIB";
5915	pDst->SemanticIndex = pSrc->inputRegister;
5916	pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
5917	Assert(pDst->Format != DXGI_FORMAT_UNKNOWN);
5918	pDst->InputSlot = pSrc->inputSlot;
5919	pDst->AlignedByteOffset = pSrc->alignedByteOffset;
5920	pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
5921	pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
5922	}
5923	}
5924
5925	HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
5926	pDXElementLayout->cElementDesc,
5927	pDXShader->pvDXBC,
5928	pDXShader->cbDXBC,
5929	&pDXElementLayout->pElementLayout);
5930	Assert(SUCCEEDED(hr)); RT_NOREF(hr);
5931	}
5932
5933
5934	static void dxSetConstantBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5935	{
5936	//DEBUG_BREAKPOINT_TEST();
5937	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5938	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
5939	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5940
5941	AssertCompile(RT_ELEMENTS(pBackendDXContext->resources.shaderState[0].constantBuffers) == SVGA3D_DX_MAX_CONSTBUFFERS);
5942
5943	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
5944	{
5945	SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
5946	for (uint32_t idxSlot = 0; idxSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++idxSlot)
5947	{
5948	ID3D11Buffer **pBufferContext = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
5949	ID3D11Buffer **pBufferPipeline = &pBackend->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
5950	if (pBufferContext != pBufferPipeline)
5951	{
5952	LogFunc(("constant buffer: [%u][%u]: %p -> %p\n",
5953	idxShaderState, idxSlot, pBufferPipeline, pBufferContext));
5954	dxConstantBufferSet(pDXDevice, idxSlot, shaderType, *pBufferContext);
5955
5956	if (*pBufferContext)
5957	(*pBufferContext)->AddRef();
5958	D3D_RELEASE(*pBufferPipeline);
5959	pBufferPipeline = pBufferContext;
5960	}
5961	}
5962	}
5963	}
5964
5965	static void dxSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5966	{
5967	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5968
5969	ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
5970	UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
5971	UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
5972
5973	int32_t idxMinSlot = SVGA3D_DX_MAX_VERTEXBUFFERS;
5974	int32_t idxMaxSlot = -1;
5975	for (int32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
5976	{
5977	SVGA3dBufferBinding const *pBufferContext = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i];
5978	SVGA3dBufferBinding *pBufferPipeline = &pBackend->svgaDXContext.inputAssembly.vertexBuffers[i];
5979
5980	if ( pBufferContext->bufferId != pBufferPipeline->bufferId
5981	\|\| pBufferContext->stride != pBufferPipeline->stride
5982	\|\| pBufferContext->offset != pBufferPipeline->offset)
5983	{
5984	/* The slot has a new buffer. */
5985	LogFunc(("vb[%u]: sid = %u, stride %d, off %d -> sid = %u, stride %d, off %d\n",
5986	i, pBufferPipeline->bufferId, pBufferPipeline->stride, pBufferPipeline->offset,
5987	pBufferContext->bufferId, pBufferContext->stride, pBufferContext->offset));
5988
5989	pBufferPipeline = pBufferContext;
5990
5991	idxMaxSlot = RT_MAX(idxMaxSlot, i);
5992	idxMinSlot = RT_MIN(idxMinSlot, i);
5993	}
5994	#ifdef LOG_ENABLED
5995	else if (pBufferPipeline->bufferId != SVGA3D_INVALID_ID)
5996	{
5997	LogFunc(("vb[%u]: sid = %u, stride %d, off %d\n",
5998	i, pBufferPipeline->bufferId, pBufferPipeline->stride, pBufferPipeline->offset));
5999	}
6000	#endif
6001	ID3D11Buffer *pBuffer = NULL;
6002	if (pBufferPipeline->bufferId != SVGA3D_INVALID_ID)
6003	{
6004	PVMSVGA3DSURFACE pSurface;
6005	ID3D11Resource *pResource;
6006	int rc = dxEnsureResource(pThisCC, pBufferPipeline->bufferId, &pSurface, &pResource);
6007	if ( RT_SUCCESS(rc)
6008	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
6009	pBuffer = (ID3D11Buffer *)pResource;
6010	else
6011	AssertMsgFailed(("%Rrc %p %d\n", rc, pSurface->pBackendSurface, pSurface->pBackendSurface ? pSurface->pBackendSurface->enmResType : VMSVGA3D_RESTYPE_NONE));
6012	}
6013
6014	paResources[i] = pBuffer;
6015	if (pBuffer)
6016	{
6017	LogFunc(("vb[%u]: %p\n", i, pBuffer));
6018	paStride[i] = pBufferPipeline->stride;
6019	paOffset[i] = pBufferPipeline->offset;
6020	}
6021	else
6022	{
6023	paStride[i] = 0;
6024	paOffset[i] = 0;
6025	}
6026	}
6027
6028	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
6029	LogFunc(("idxMinSlot = %d, idxMaxSlot = %d\n", idxMinSlot, idxMaxSlot));
6030	if (idxMaxSlot >= 0)
6031	pDXDevice->pImmediateContext->IASetVertexBuffers(idxMinSlot, (idxMaxSlot - idxMinSlot) + 1,
6032	&paResources[idxMinSlot], &paStride[idxMinSlot], &paOffset[idxMinSlot]);
6033	}
6034
6035	static void dxSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6036	{
6037	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6038
6039	SVGADXContextMobFormat *pPipelineState = &pBackend->svgaDXContext;
6040	SVGADXContextMobFormat const *pContextState = &pDXContext->svgaDXContext;
6041
6042	if ( pPipelineState->inputAssembly.indexBufferSid != pContextState->inputAssembly.indexBufferSid
6043	\|\| pPipelineState->inputAssembly.indexBufferOffset != pContextState->inputAssembly.indexBufferOffset
6044	\|\| pPipelineState->inputAssembly.indexBufferFormat != pContextState->inputAssembly.indexBufferFormat)
6045	{
6046	LogFunc(("ib: sid = %u, offset %u, fmt %u -> sid = %u, offset %u, fmt %u\n",
6047	pPipelineState->inputAssembly.indexBufferSid, pPipelineState->inputAssembly.indexBufferOffset, pPipelineState->inputAssembly.indexBufferFormat,
6048	pContextState->inputAssembly.indexBufferSid, pContextState->inputAssembly.indexBufferOffset, pContextState->inputAssembly.indexBufferFormat));
6049
6050	pPipelineState->inputAssembly.indexBufferSid = pContextState->inputAssembly.indexBufferSid;
6051	pPipelineState->inputAssembly.indexBufferOffset = pContextState->inputAssembly.indexBufferOffset;
6052	pPipelineState->inputAssembly.indexBufferFormat = pContextState->inputAssembly.indexBufferFormat;
6053	}
6054	#ifdef LOG_ENABLED
6055	else if (pPipelineState->inputAssembly.indexBufferSid != SVGA3D_INVALID_ID)
6056	{
6057	LogFunc(("ib: sid = %u, offset %u, fmt %u\n",
6058	pPipelineState->inputAssembly.indexBufferSid, pPipelineState->inputAssembly.indexBufferOffset, pPipelineState->inputAssembly.indexBufferFormat));
6059	}
6060	#endif
6061
6062	ID3D11Buffer *pBuffer = NULL;
6063	if (pPipelineState->inputAssembly.indexBufferSid != SVGA3D_INVALID_ID)
6064	{
6065	PVMSVGA3DSURFACE pSurface;
6066	ID3D11Resource *pResource;
6067	int rc = dxEnsureResource(pThisCC, pPipelineState->inputAssembly.indexBufferSid, &pSurface, &pResource);
6068	if ( RT_SUCCESS(rc)
6069	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
6070	pBuffer = (ID3D11Buffer *)pResource;
6071	else
6072	AssertMsgFailed(("%Rrc %p %d\n", rc, pSurface->pBackendSurface, pSurface->pBackendSurface ? pSurface->pBackendSurface->enmResType : VMSVGA3D_RESTYPE_NONE));
6073	}
6074
6075	DXGI_FORMAT enmDxgiFormat;
6076	UINT Offset;
6077	if (pBuffer)
6078	{
6079	enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi((SVGA3dSurfaceFormat)pPipelineState->inputAssembly.indexBufferFormat);
6080	AssertReturnVoid(enmDxgiFormat == DXGI_FORMAT_R16_UINT \|\| enmDxgiFormat == DXGI_FORMAT_R32_UINT);
6081	Offset = pPipelineState->inputAssembly.indexBufferOffset;
6082	}
6083	else
6084	{
6085	enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
6086	Offset = 0;
6087	}
6088
6089	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
6090	pDXDevice->pImmediateContext->IASetIndexBuffer(pBuffer, enmDxgiFormat, Offset);
6091	}
6092
6093	#ifdef LOG_ENABLED
6094	static void dxDbgLogVertexElement(DXGI_FORMAT Format, void const *pvElementData)
6095	{
6096	switch (Format)
6097	{
6098	case DXGI_FORMAT_R32G32B32A32_FLOAT:
6099	{
6100	float const pValues = (float const )pvElementData;
6101	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6102	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1]), FLOAT_FMT_ARGS(pValues[2]), FLOAT_FMT_ARGS(pValues[3])));
6103	break;
6104	}
6105	case DXGI_FORMAT_R32G32B32_FLOAT:
6106	{
6107	float const pValues = (float const )pvElementData;
6108	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6109	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1]), FLOAT_FMT_ARGS(pValues[2])));
6110	break;
6111	}
6112	case DXGI_FORMAT_R32G32_FLOAT:
6113	{
6114	float const pValues = (float const )pvElementData;
6115	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6116	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1])));
6117	break;
6118	}
6119	case DXGI_FORMAT_R32_FLOAT:
6120	{
6121	float const pValues = (float const )pvElementData;
6122	Log8(("{ " FLOAT_FMT_STR " },",
6123	FLOAT_FMT_ARGS(pValues[0])));
6124	break;
6125	}
6126	case DXGI_FORMAT_R16G16B16A16_FLOAT:
6127	{
6128	uint16_t const pValues = (uint16_t const )pvElementData;
6129	Log8(("{ /f16/ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6130	FLOAT_FMT_ARGS(float16ToFloat(pValues[0])), FLOAT_FMT_ARGS(float16ToFloat(pValues[1])),
6131	FLOAT_FMT_ARGS(float16ToFloat(pValues[2])), FLOAT_FMT_ARGS(float16ToFloat(pValues[3]))));
6132	break;
6133	}
6134	case DXGI_FORMAT_R16G16_FLOAT:
6135	{
6136	uint16_t const pValues = (uint16_t const )pvElementData;
6137	Log8(("{ /f16/ " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6138	FLOAT_FMT_ARGS(float16ToFloat(pValues[0])), FLOAT_FMT_ARGS(float16ToFloat(pValues[1]))));
6139	break;
6140	}
6141	case DXGI_FORMAT_R32G32_SINT:
6142	{
6143	int32_t const pValues = (int32_t const )pvElementData;
6144	Log8(("{ %d, %d },",
6145	pValues[0], pValues[1]));
6146	break;
6147	}
6148	case DXGI_FORMAT_R32G32_UINT:
6149	{
6150	uint32_t const pValues = (uint32_t const )pvElementData;
6151	Log8(("{ %u, %u },",
6152	pValues[0], pValues[1]));
6153	break;
6154	}
6155	case DXGI_FORMAT_R32_SINT:
6156	{
6157	int32_t const pValues = (int32_t const )pvElementData;
6158	Log8(("{ %d },",
6159	pValues[0]));
6160	break;
6161	}
6162	case DXGI_FORMAT_R32_UINT:
6163	{
6164	uint32_t const pValues = (uint32_t const )pvElementData;
6165	Log8(("{ %u },",
6166	pValues[0]));
6167	break;
6168	}
6169	case DXGI_FORMAT_R16G16B16A16_SINT:
6170	{
6171	int16_t const pValues = (int16_t const )pvElementData;
6172	Log8(("{ /s16/ %d, %d, %d, %d },",
6173	pValues[0], pValues[1], pValues[2], pValues[3]));
6174	break;
6175	}
6176	case DXGI_FORMAT_R16G16_SINT:
6177	{
6178	int16_t const pValues = (int16_t const )pvElementData;
6179	Log8(("{ /s16/ %d, %d },",
6180	pValues[0], pValues[1]));
6181	break;
6182	}
6183	case DXGI_FORMAT_R16G16_UINT:
6184	{
6185	uint16_t const pValues = (uint16_t const )pvElementData;
6186	Log8(("{ /u16/ %u, %u },",
6187	pValues[0], pValues[1]));
6188	break;
6189	}
6190	case DXGI_FORMAT_R16G16_SNORM:
6191	{
6192	int16_t const pValues = (int16_t const )pvElementData;
6193	Log8(("{ /sn16/ 0x%x, 0x%x },",
6194	pValues[0], pValues[1]));
6195	break;
6196	}
6197	case DXGI_FORMAT_R16G16_UNORM:
6198	{
6199	uint16_t const pValues = (uint16_t const )pvElementData;
6200	Log8(("{ /un16/ 0x%x, 0x%x },",
6201	pValues[0], pValues[1]));
6202	break;
6203	}
6204	case DXGI_FORMAT_R16_UINT:
6205	{
6206	uint16_t const pValues = (uint16_t const )pvElementData;
6207	Log8(("{ /u16/ %u },",
6208	pValues[0]));
6209	break;
6210	}
6211	case DXGI_FORMAT_R8G8B8A8_SINT:
6212	{
6213	uint8_t const pValues = (uint8_t const )pvElementData;
6214	Log8(("{ /8sint/ %d, %d, %d, %d },",
6215	pValues[0], pValues[1], pValues[2], pValues[3]));
6216	break;
6217	}
6218	case DXGI_FORMAT_R8G8B8A8_UINT:
6219	{
6220	uint8_t const pValues = (uint8_t const )pvElementData;
6221	Log8(("{ /8uint/ %u, %u, %u, %u },",
6222	pValues[0], pValues[1], pValues[2], pValues[3]));
6223	break;
6224	}
6225	case DXGI_FORMAT_B8G8R8A8_UNORM:
6226	{
6227	uint8_t const pValues = (uint8_t const )pvElementData;
6228	Log8(("{ /8unorm/ %u, %u, %u, %u },",
6229	pValues[0], pValues[1], pValues[2], pValues[3]));
6230	break;
6231	}
6232	case DXGI_FORMAT_R8G8B8A8_UNORM:
6233	{
6234	uint8_t const pValues = (uint8_t const )pvElementData;
6235	Log8(("{ /8unorm/ %u, %u, %u, %u },",
6236	pValues[0], pValues[1], pValues[2], pValues[3]));
6237	break;
6238	}
6239	case DXGI_FORMAT_R8G8_UNORM:
6240	{
6241	uint8_t const pValues = (uint8_t const )pvElementData;
6242	Log8(("{ /8unorm/ %u, %u },",
6243	pValues[0], pValues[1]));
6244	break;
6245	}
6246	case DXGI_FORMAT_R8_UINT:
6247	{
6248	uint8_t const pValues = (uint8_t const )pvElementData;
6249	Log8(("{ /8unorm/ %u },",
6250	pValues[0]));
6251	break;
6252	}
6253	default:
6254	Log8(("{ ??? DXGI_FORMAT %d },",
6255	Format));
6256	AssertFailed();
6257	}
6258	}
6259
6260
6261	static void dxDbgDumpVertexData(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6262	{
6263	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6264	{
6265	SVGA3dBufferBinding const *pVBInfo = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot];
6266	if (pVBInfo->bufferId == SVGA3D_INVALID_ID)
6267	continue;
6268
6269	PVMSVGA3DSURFACE pSurface = NULL;
6270	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pVBInfo->bufferId, &pSurface);
6271	AssertContinue(RT_SUCCESS(rc));
6272	AssertContinue(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6273
6274	SVGA3dSurfaceImageId image;
6275	image.sid = pVBInfo->bufferId;
6276	image.face = 0;
6277	image.mipmap = 0;
6278
6279	VMSVGA3D_MAPPED_SURFACE map;
6280	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
6281	AssertRC(rc);
6282	if (RT_SUCCESS(rc))
6283	{
6284	uint8_t const pu8VertexData = (uint8_t )map.pvData;
6285	pu8VertexData += pVBInfo->offset;
6286	pu8VertexData += startVertexLocation * pVBInfo->stride;
6287
6288	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6289	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6290	Assert(pDXElementLayout->cElementDesc > 0);
6291
6292	Log8(("Vertex buffer dump: sid = %u, vertexCount %u, startVertexLocation %d, offset = %d, stride = %d:\n",
6293	pVBInfo->bufferId, vertexCount, startVertexLocation, pVBInfo->offset, pVBInfo->stride));
6294
6295	for (uint32_t v = 0; v < vertexCount; ++v)
6296	{
6297	Log8(("slot[%u] /* v%u */ { ", iSlot, startVertexLocation + v));
6298
6299	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6300	{
6301	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6302	if (pElement->InputSlot == iSlot)
6303	dxDbgLogVertexElement(pElement->Format, pu8VertexData + pElement->AlignedByteOffset);
6304	}
6305
6306	Log8((" },\n"));
6307
6308	if (pVBInfo->stride == 0)
6309	break;
6310
6311	pu8VertexData += pVBInfo->stride;
6312	}
6313
6314	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
6315	}
6316	}
6317	}
6318
6319
6320	static void dxDbgDumpIndexedVertexData(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
6321	{
6322	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
6323
6324	uint32_t const indexBufferSid = pDXContext->svgaDXContext.inputAssembly.indexBufferSid;
6325	if (indexBufferSid == SVGA3D_INVALID_ID)
6326	return;
6327	uint32_t const indexBufferFormat = pDXContext->svgaDXContext.inputAssembly.indexBufferFormat;
6328	uint32_t const indexBufferOffset = pDXContext->svgaDXContext.inputAssembly.indexBufferOffset;
6329
6330	PVMSVGA3DSURFACE pSurface = NULL;
6331	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, indexBufferSid, &pSurface);
6332	AssertReturnVoid(RT_SUCCESS(rc));
6333	AssertReturnVoid(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6334
6335	UINT const BytesPerIndex = indexBufferFormat == SVGA3D_R16_UINT ? 2 : 4;
6336
6337	void *pvIndexBuffer;
6338	uint32_t cbIndexBuffer;
6339	rc = dxReadBuffer(pDXDevice, pSurface->pBackendSurface->u.pBuffer,
6340	indexBufferOffset + startIndexLocation * BytesPerIndex,
6341	indexCount * BytesPerIndex, &pvIndexBuffer, &cbIndexBuffer);
6342	AssertRC(rc);
6343	if (RT_SUCCESS(rc))
6344	{
6345	uint8_t const pu8IndexData = (uint8_t )pvIndexBuffer;
6346
6347	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6348	{
6349	SVGA3dBufferBinding const *pVBInfo = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot];
6350	if (pVBInfo->bufferId == SVGA3D_INVALID_ID)
6351	continue;
6352
6353	pSurface = NULL;
6354	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pVBInfo->bufferId, &pSurface);
6355	AssertContinue(RT_SUCCESS(rc));
6356	AssertContinue(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6357
6358	SVGA3dSurfaceImageId image;
6359	image.sid = pVBInfo->bufferId;
6360	image.face = 0;
6361	image.mipmap = 0;
6362
6363	VMSVGA3D_MAPPED_SURFACE mapVB;
6364	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &mapVB);
6365	AssertRC(rc);
6366	if (RT_SUCCESS(rc))
6367	{
6368	uint8_t const pu8VertexData = (uint8_t )mapVB.pvData;
6369	pu8VertexData += pVBInfo->offset;
6370	pu8VertexData += baseVertexLocation * pVBInfo->stride;
6371
6372	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6373	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6374	Assert(pDXElementLayout->cElementDesc > 0);
6375
6376	Log8(("Vertex buffer dump: sid = %u, indexCount %u, startIndexLocation %d, baseVertexLocation %d, offset = %d, stride = %d:\n",
6377	pVBInfo->bufferId, indexCount, startIndexLocation, baseVertexLocation, pVBInfo->offset, pVBInfo->stride));
6378
6379	for (uint32_t i = 0; i < indexCount; ++i)
6380	{
6381	uint32_t Index;
6382	if (BytesPerIndex == 2)
6383	Index = ((uint16_t *)pu8IndexData)[i];
6384	else
6385	Index = ((uint32_t *)pu8IndexData)[i];
6386
6387	Log8(("slot[%u] /* v%u */ { ", iSlot, Index));
6388
6389	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6390	{
6391	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6392	if (pElement->InputSlotClass != D3D11_INPUT_PER_VERTEX_DATA)
6393	continue;
6394
6395	if (pElement->InputSlot == iSlot)
6396	{
6397	uint8_t const pu8Vertex = pu8VertexData + Index pVBInfo->stride;
6398	dxDbgLogVertexElement(pElement->Format, pu8Vertex + pElement->AlignedByteOffset);
6399	}
6400	}
6401
6402	Log8((" },\n"));
6403
6404	if (pVBInfo->stride == 0)
6405	break;
6406	}
6407
6408	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &mapVB, /* fWritten = */ false);
6409	}
6410	}
6411
6412	RTMemFree(pvIndexBuffer);
6413	}
6414	}
6415
6416
6417	static void dxDbgDumpInstanceData(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t instanceCount, uint32_t startInstanceLocation)
6418	{
6419	/*
6420	* Dump per-instance data.
6421	*/
6422	for (uint32_t iInstance = 0; iInstance < instanceCount; ++iInstance)
6423	{
6424	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6425	{
6426	SVGA3dBufferBinding const *pVBInfo = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot];
6427	if (pVBInfo->bufferId == SVGA3D_INVALID_ID)
6428	continue;
6429
6430	PVMSVGA3DSURFACE pSurface = NULL;
6431	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pVBInfo->bufferId, &pSurface);
6432	AssertContinue(RT_SUCCESS(rc));
6433	AssertContinue(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6434
6435	SVGA3dSurfaceImageId image;
6436	image.sid = pVBInfo->bufferId;
6437	image.face = 0;
6438	image.mipmap = 0;
6439
6440	VMSVGA3D_MAPPED_SURFACE mapVB;
6441	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &mapVB);
6442	AssertRC(rc);
6443	if (RT_SUCCESS(rc))
6444	{
6445	uint8_t const pu8VertexData = (uint8_t )mapVB.pvData;
6446	pu8VertexData += pVBInfo->offset;
6447	pu8VertexData += startInstanceLocation * pVBInfo->stride;
6448
6449	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6450	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6451	Assert(pDXElementLayout->cElementDesc > 0);
6452
6453	Log8(("Instance data dump: sid = %u, iInstance %u, startInstanceLocation %d, offset = %d, stride = %d:\n",
6454	pVBInfo->bufferId, iInstance, startInstanceLocation, pVBInfo->offset, pVBInfo->stride));
6455
6456	Log8(("slot[%u] /* i%u */ { ", iSlot, iInstance));
6457	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6458	{
6459	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6460	if (pElement->InputSlotClass != D3D11_INPUT_PER_INSTANCE_DATA)
6461	continue;
6462
6463	if (pElement->InputSlot == iSlot)
6464	{
6465	uint8_t const pu8Vertex = pu8VertexData + iInstance pVBInfo->stride;
6466	dxDbgLogVertexElement(pElement->Format, pu8Vertex + pElement->AlignedByteOffset);
6467	}
6468	}
6469	Log8((" },\n"));
6470
6471	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &mapVB, /* fWritten = */ false);
6472	}
6473	}
6474	}
6475	}
6476
6477	static void dxDbgDumpVertices_Draw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6478	{
6479	dxDbgDumpVertexData(pThisCC, pDXContext, vertexCount, startVertexLocation);
6480	}
6481
6482
6483	static void dxDbgDumpVertices_DrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
6484	{
6485	dxDbgDumpIndexedVertexData(pThisCC, pDXContext, indexCount, startIndexLocation, baseVertexLocation);
6486	}
6487
6488
6489	static void dxDbgDumpVertices_DrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
6490	uint32_t vertexCountPerInstance, uint32_t instanceCount,
6491	uint32_t startVertexLocation, uint32_t startInstanceLocation)
6492	{
6493	dxDbgDumpVertexData(pThisCC, pDXContext, vertexCountPerInstance, startVertexLocation);
6494	dxDbgDumpInstanceData(pThisCC, pDXContext, instanceCount, startInstanceLocation);
6495	}
6496
6497
6498	static void dxDbgDumpVertices_DrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
6499	uint32_t indexCountPerInstance, uint32_t instanceCount,
6500	uint32_t startIndexLocation, int32_t baseVertexLocation,
6501	uint32_t startInstanceLocation)
6502	{
6503	dxDbgDumpIndexedVertexData(pThisCC, pDXContext, indexCountPerInstance, startIndexLocation, baseVertexLocation);
6504	dxDbgDumpInstanceData(pThisCC, pDXContext, instanceCount, startInstanceLocation);
6505	}
6506	#endif
6507
6508
6509	static int dxCreateRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
6510	{
6511	PVMSVGA3DSURFACE pSurface;
6512	ID3D11Resource *pResource;
6513	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
6514	AssertRCReturn(rc, rc);
6515
6516	DXVIEW *pView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
6517	Assert(pView->u.pView == NULL);
6518
6519	ID3D11RenderTargetView *pRenderTargetView;
6520	HRESULT hr = dxRenderTargetViewCreate(pThisCC, pEntry, pSurface, &pRenderTargetView);
6521	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6522
6523	return dxViewInit(pView, pSurface, pDXContext, renderTargetViewId, VMSVGA3D_VIEWTYPE_RENDERTARGET, pRenderTargetView);
6524	}
6525
6526
6527	static int dxEnsureRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId viewId, DXVIEW **ppResult)
6528	{
6529	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
6530
6531	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[viewId];
6532	if (!pDXView->u.pView)
6533	{
6534	SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[viewId];
6535	int rc = dxCreateRenderTargetView(pThisCC, pDXContext, viewId, pEntry);
6536	AssertRCReturn(rc, rc);
6537	}
6538	*ppResult = pDXView;
6539	return VINF_SUCCESS;
6540	}
6541
6542
6543	static int dxCreateDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
6544	{
6545	PVMSVGA3DSURFACE pSurface;
6546	ID3D11Resource *pResource;
6547	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
6548	AssertRCReturn(rc, rc);
6549
6550	DXVIEW *pView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
6551	Assert(pView->u.pView == NULL);
6552
6553	ID3D11DepthStencilView *pDepthStencilView;
6554	HRESULT hr = dxDepthStencilViewCreate(pThisCC, pEntry, pSurface, &pDepthStencilView);
6555	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6556
6557	return dxViewInit(pView, pSurface, pDXContext, depthStencilViewId, VMSVGA3D_VIEWTYPE_DEPTHSTENCIL, pDepthStencilView);
6558	}
6559
6560
6561	static int dxEnsureDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId viewId, DXVIEW **ppResult)
6562	{
6563	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
6564
6565	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paDepthStencilView[viewId];
6566	if (!pDXView->u.pView)
6567	{
6568	SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[viewId];
6569	int rc = dxCreateDepthStencilView(pThisCC, pDXContext, viewId, pEntry);
6570	AssertRCReturn(rc, rc);
6571	}
6572	*ppResult = pDXView;
6573	return VINF_SUCCESS;
6574	}
6575
6576
6577	static int dxCreateShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
6578	{
6579	PVMSVGA3DSURFACE pSurface;
6580	ID3D11Resource *pResource;
6581	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
6582	AssertRCReturn(rc, rc);
6583
6584	DXVIEW *pView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
6585	Assert(pView->u.pView == NULL);
6586
6587	ID3D11ShaderResourceView *pShaderResourceView;
6588	HRESULT hr = dxShaderResourceViewCreate(pThisCC, pEntry, pSurface, &pShaderResourceView);
6589	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6590
6591	return dxViewInit(pView, pSurface, pDXContext, shaderResourceViewId, VMSVGA3D_VIEWTYPE_SHADERRESOURCE, pShaderResourceView);
6592	}
6593
6594
6595	static int dxEnsureShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId viewId, DXVIEW **ppResult)
6596	{
6597	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
6598
6599	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[viewId];
6600	if (!pDXView->u.pView)
6601	{
6602	SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[viewId];
6603	int rc = dxCreateShaderResourceView(pThisCC, pDXContext, viewId, pEntry);
6604	AssertRCReturn(rc, rc);
6605	}
6606	*ppResult = pDXView;
6607	return VINF_SUCCESS;
6608	}
6609
6610
6611	static int dxCreateUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
6612	{
6613	PVMSVGA3DSURFACE pSurface;
6614	ID3D11Resource *pResource;
6615	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
6616	AssertRCReturn(rc, rc);
6617
6618	DXVIEW *pView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
6619	Assert(pView->u.pView == NULL);
6620
6621	ID3D11UnorderedAccessView *pUnorderedAccessView;
6622	HRESULT hr = dxUnorderedAccessViewCreate(pThisCC, pEntry, pSurface, &pUnorderedAccessView);
6623	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6624
6625	return dxViewInit(pView, pSurface, pDXContext, uaViewId, VMSVGA3D_VIEWTYPE_UNORDEREDACCESS, pUnorderedAccessView);
6626	}
6627
6628
6629	static int dxEnsureUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId viewId, DXVIEW **ppResult)
6630	{
6631	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
6632
6633	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[viewId];
6634	if (!pDXView->u.pView)
6635	{
6636	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[viewId];
6637	int rc = dxCreateUnorderedAccessView(pThisCC, pDXContext, viewId, pEntry);
6638	AssertRCReturn(rc, rc);
6639	}
6640	*ppResult = pDXView;
6641	return VINF_SUCCESS;
6642	}
6643
6644
6645	static void dxSetupPipeline(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6646	{
6647	/* Make sure that any draw operations on shader resource views have finished. */
6648	AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState) == SVGA3D_NUM_SHADERTYPE);
6649	AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState[0].shaderResources) == SVGA3D_DX_MAX_SRVIEWS);
6650
6651	int rc;
6652
6653	/* Unbind render target views because they mught be (re-)used as shader resource views. */
6654	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
6655	pDXDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(0, NULL, NULL, 0, 0, NULL, NULL);
6656	for (unsigned i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
6657	{
6658	ID3D11UnorderedAccessView *pNullUA = 0;
6659	pDXDevice->pImmediateContext->CSSetUnorderedAccessViews(i, 1, &pNullUA, NULL);
6660	}
6661
6662	dxSetConstantBuffers(pThisCC, pDXContext);
6663	dxSetVertexBuffers(pThisCC, pDXContext);
6664	dxSetIndexBuffer(pThisCC, pDXContext);
6665
6666	/*
6667	* Shader resources
6668	*/
6669
6670	/* Make sure that the shader resource views exist. */
6671	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6672	{
6673	for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6674	{
6675	SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6676	if (shaderResourceViewId != SVGA3D_INVALID_ID)
6677	{
6678	DXVIEW *pDXView;
6679	rc = dxEnsureShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, &pDXView);
6680	AssertContinue(RT_SUCCESS(rc));
6681
6682	#ifdef LOG_ENABLED
6683	SVGACOTableDXSRViewEntry const *pSRViewEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
6684	PVMSVGA3DSURFACE pSurface = NULL;
6685	vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDXView->sid, &pSurface);
6686	LogFunc(("srv[%d][%d] sid = %u, srvid = %u, format = %s(%d), %dx%d\n",
6687	idxShaderState, idxSR, pDXView->sid, shaderResourceViewId, vmsvgaLookupEnum((int)pSRViewEntry->format, &g_SVGA3dSurfaceFormat2String), pSRViewEntry->format,
6688	pSurface->paMipmapLevels[0].cBlocksX * pSurface->cxBlock, pSurface->paMipmapLevels[0].cBlocksY * pSurface->cyBlock));
6689	#endif
6690
6691	#ifdef DUMP_BITMAPS
6692	SVGA3dSurfaceImageId image;
6693	image.sid = pDXView->sid;
6694	image.face = 0;
6695	image.mipmap = 0;
6696	VMSVGA3D_MAPPED_SURFACE map;
6697	int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
6698	if (RT_SUCCESS(rc2))
6699	{
6700	vmsvga3dMapWriteBmpFile(&map, "sr-");
6701	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
6702	}
6703	else
6704	LogFunc(("Map failed %Rrc\n", rc));
6705	#endif
6706	}
6707	}
6708
6709	dxSetShaderResources(pThisCC, pDXContext, (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN));
6710	}
6711
6712	/*
6713	* Compute shader unordered access views
6714	*/
6715
6716	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6717	{
6718	SVGA3dUAViewId const viewId = pDXContext->svgaDXContext.csuaViewIds[idxUA];
6719	if (viewId != SVGA3D_INVALID_ID)
6720	{
6721	DXVIEW *pDXView;
6722	rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, viewId, &pDXView);
6723	AssertContinue(RT_SUCCESS(rc));
6724
6725	#ifdef LOG_ENABLED
6726	SVGACOTableDXUAViewEntry const *pUAViewEntry = &pDXContext->cot.paUAView[viewId];
6727	LogFunc(("csuav[%d] sid = %u, uaid = %u, format = %s(%d)\n", idxUA, pDXView->sid, viewId, vmsvgaLookupEnum((int)pUAViewEntry->format, &g_SVGA3dSurfaceFormat2String), pUAViewEntry->format));
6728	#endif
6729	}
6730	}
6731
6732	/* Set views. */
6733	rc = dxSetCSUnorderedAccessViews(pThisCC, pDXContext);
6734	AssertRC(rc);
6735
6736	/*
6737	* Render targets and unordered access views.
6738	*/
6739
6740	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
6741	AssertReturnVoid(pDevice->pDevice);
6742
6743	/* Make sure that the render target views exist. */
6744	if (pDXContext->svgaDXContext.renderState.depthStencilViewId != SVGA3D_INVALID_ID)
6745	{
6746	uint32_t const viewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
6747
6748	DXVIEW *pDXView;
6749	rc = dxEnsureDepthStencilView(pThisCC, pDXContext, viewId, &pDXView);
6750	AssertRC(rc);
6751
6752	#ifdef LOG_ENABLED
6753	SVGACOTableDXDSViewEntry const *pDSViewEntry = &pDXContext->cot.paDSView[viewId];
6754	LogFunc(("dsv sid = %u, dsvid = %u, format = %s(%d)\n", pDXView->sid, viewId, vmsvgaLookupEnum((int)pDSViewEntry->format, &g_SVGA3dSurfaceFormat2String), pDSViewEntry->format));
6755	#endif
6756	}
6757
6758	for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
6759	{
6760	uint32_t const viewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
6761	if (viewId != SVGA3D_INVALID_ID)
6762	{
6763	DXVIEW *pDXView;
6764	rc = dxEnsureRenderTargetView(pThisCC, pDXContext, viewId, &pDXView);
6765	AssertContinue(RT_SUCCESS(rc));
6766
6767	#ifdef LOG_ENABLED
6768	SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[viewId];
6769	LogFunc(("rtv sid = %u, rtvid = %u, format = %s(%d)\n", pDXView->sid, viewId, vmsvgaLookupEnum((int)pRTViewEntry->format, &g_SVGA3dSurfaceFormat2String), pRTViewEntry->format));
6770	#endif
6771	}
6772	}
6773
6774	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6775	{
6776	SVGA3dUAViewId const viewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
6777	if (viewId != SVGA3D_INVALID_ID)
6778	{
6779	DXVIEW *pDXView;
6780	rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, viewId, &pDXView);
6781	AssertContinue(RT_SUCCESS(rc));
6782
6783	#ifdef LOG_ENABLED
6784	SVGACOTableDXUAViewEntry const *pUAViewEntry = &pDXContext->cot.paUAView[viewId];
6785	LogFunc(("uav[%d] sid = %u, uaid = %u, format = %s(%d)\n", idxUA, pDXView->sid, viewId, vmsvgaLookupEnum((int)pUAViewEntry->format, &g_SVGA3dSurfaceFormat2String), pUAViewEntry->format));
6786	#endif
6787	}
6788	}
6789
6790	/* Set render targets. */
6791	rc = dxSetRenderTargets(pThisCC, pDXContext);
6792	AssertRC(rc);
6793
6794	/*
6795	* Shaders
6796	*/
6797
6798	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6799	{
6800	DXSHADER *pDXShader;
6801	SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
6802	SVGA3dShaderId const shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6803
6804	if (shaderId != SVGA3D_INVALID_ID)
6805	{
6806	pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
6807	if (pDXShader->pShader == NULL)
6808	{
6809	/* Create a new shader. */
6810
6811	/* Apply resource types to a pixel shader. */
6812	if (shaderType == SVGA3D_SHADERTYPE_PS) /* Others too? */
6813	{
6814	VGPU10_RESOURCE_DIMENSION aResourceDimension[SVGA3D_DX_MAX_SRVIEWS];
6815	RT_ZERO(aResourceDimension);
6816	VGPU10_RESOURCE_RETURN_TYPE aResourceReturnType[SVGA3D_DX_MAX_SRVIEWS];
6817	RT_ZERO(aResourceReturnType);
6818	uint32_t cResources = 0;
6819
6820	for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6821	{
6822	SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6823	if (shaderResourceViewId != SVGA3D_INVALID_ID)
6824	{
6825	ASSERT_GUEST_CONTINUE(shaderResourceViewId < pDXContext->cot.cSRView);
6826	SVGACOTableDXSRViewEntry const *pSRViewEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
6827
6828	PVMSVGA3DSURFACE pSurface;
6829	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pSRViewEntry->sid, &pSurface);
6830	AssertRCReturnVoid(rc);
6831
6832	aResourceReturnType[idxSR] = DXShaderResourceReturnTypeFromFormat(pSRViewEntry->format);
6833
6834	switch (pSRViewEntry->resourceDimension)
6835	{
6836	case SVGA3D_RESOURCE_BUFFEREX:
6837	case SVGA3D_RESOURCE_BUFFER:
6838	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_BUFFER;
6839	break;
6840	case SVGA3D_RESOURCE_TEXTURE1D:
6841	if (pSurface->surfaceDesc.numArrayElements <= 1)
6842	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1D;
6843	else
6844	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1DARRAY;
6845	break;
6846	case SVGA3D_RESOURCE_TEXTURE2D:
6847	if (pSurface->surfaceDesc.numArrayElements <= 1)
6848	aResourceDimension[idxSR] = pSurface->surfaceDesc.multisampleCount > 1
6849	? VGPU10_RESOURCE_DIMENSION_TEXTURE2DMS
6850	: VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6851	else
6852	aResourceDimension[idxSR] = pSurface->surfaceDesc.multisampleCount > 1
6853	? VGPU10_RESOURCE_DIMENSION_TEXTURE2DMSARRAY
6854	: VGPU10_RESOURCE_DIMENSION_TEXTURE2DARRAY;
6855	break;
6856	case SVGA3D_RESOURCE_TEXTURE3D:
6857	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE3D;
6858	break;
6859	case SVGA3D_RESOURCE_TEXTURECUBE:
6860	if (pSurface->surfaceDesc.numArrayElements <= 6)
6861	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBE;
6862	else
6863	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBEARRAY;
6864	break;
6865	default:
6866	ASSERT_GUEST_FAILED();
6867	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6868	}
6869
6870	cResources = idxSR + 1;
6871
6872	/* Update componentType of the pixel shader output signature to correspond to the bound resources. */
6873	if (idxSR < pDXShader->shaderInfo.cOutputSignature)
6874	{
6875	SVGA3dDXSignatureEntry *pSignatureEntry = &pDXShader->shaderInfo.aOutputSignature[idxSR];
6876	pSignatureEntry->componentType = DXShaderComponentTypeFromFormat(pSRViewEntry->format);
6877	}
6878	}
6879	}
6880
6881	rc = DXShaderUpdateResources(&pDXShader->shaderInfo, aResourceDimension, aResourceReturnType, cResources);
6882	AssertRC(rc); /* Ignore rc because the shader will most likely work anyway. */
6883	}
6884
6885	if (shaderType == SVGA3D_SHADERTYPE_VS)
6886	{
6887	/* Update componentType of the vertex shader input signature to correspond to the input declaration. */
6888	vboxDXUpdateVSInputSignature(pDXContext, pDXShader);
6889	}
6890
6891	vboxDXMatchShaderSignatures(pThisCC, pDXContext, pDXShader);
6892
6893	rc = DXShaderCreateDXBC(&pDXShader->shaderInfo, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
6894	if (RT_SUCCESS(rc))
6895	{
6896	#ifdef LOG_ENABLED
6897	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6898	if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
6899	{
6900	ID3D10Blob *pBlob = 0;
6901	HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
6902	if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
6903	Log6(("%s\n", pBlob->GetBufferPointer()));
6904	else
6905	AssertFailed();
6906	D3D_RELEASE(pBlob);
6907	}
6908	LogFunc(("Shader: set cid=%u shid=%u type=%d, GuestSignatures %d\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures));
6909	#endif
6910
6911	HRESULT hr = dxShaderCreate(pThisCC, pDXContext, pDXShader);
6912	if (FAILED(hr))
6913	rc = VERR_INVALID_STATE;
6914	}
6915	}
6916
6917	LogFunc(("Shader: cid=%u shid=%u type=%d, GuestSignatures %d, %Rrc\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures, rc));
6918	}
6919	else
6920	pDXShader = NULL;
6921
6922	if (RT_SUCCESS(rc))
6923	dxShaderSet(pThisCC, pDXContext, shaderType, pDXShader);
6924
6925	AssertRC(rc);
6926	}
6927
6928	/*
6929	* InputLayout
6930	*/
6931	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6932	ID3D11InputLayout *pInputLayout = NULL;
6933	if (elementLayoutId != SVGA3D_INVALID_ID)
6934	{
6935	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6936	if (!pDXElementLayout->pElementLayout)
6937	{
6938	uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
6939	uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6940	if (shid < pDXContext->pBackendDXContext->cShader)
6941	{
6942	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
6943	if (pDXShader->pvDXBC)
6944	dxCreateInputLayout(pThisCC, pDXContext, elementLayoutId, pDXShader);
6945	else
6946	LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid));
6947	}
6948	else
6949	LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid));
6950	}
6951
6952	pInputLayout = pDXElementLayout->pElementLayout;
6953
6954	LogFunc(("Input layout id %u\n", elementLayoutId));
6955	}
6956
6957	pDevice->pImmediateContext->IASetInputLayout(pInputLayout);
6958
6959	LogFunc(("Topology %u\n", pDXContext->svgaDXContext.inputAssembly.topology));
6960	LogFunc(("Blend id %u\n", pDXContext->svgaDXContext.renderState.blendStateId));
6961	}
6962
6963
6964	static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6965	{
6966	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6967	RT_NOREF(pBackend);
6968
6969	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
6970	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6971
6972	dxSetupPipeline(pThisCC, pDXContext);
6973
6974	#ifdef LOG_ENABLED
6975	if (LogIs8Enabled())
6976	dxDbgDumpVertices_Draw(pThisCC, pDXContext, vertexCount, startVertexLocation);
6977	#endif
6978
6979	if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
6980	pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
6981	else
6982	{
6983	/*
6984	* Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
6985	*/
6986
6987	/* Make sure that 16 bit indices are enough. */
6988	if (vertexCount > 65535)
6989	{
6990	LogRelMax(1, ("VMSVGA: ignore Draw(TRIANGLEFAN, %u)\n", vertexCount));
6991	return VERR_NOT_SUPPORTED;
6992	}
6993
6994	/* Generate indices. */
6995	UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
6996	UINT const cbAlloc = IndexCount * sizeof(USHORT);
6997	USHORT paIndices = (USHORT )RTMemAlloc(cbAlloc);
6998	AssertReturn(paIndices, VERR_NO_MEMORY);
6999	USHORT iVertex = 1;
7000	for (UINT i = 0; i < IndexCount; i+= 3)
7001	{
7002	paIndices[i] = 0;
7003	paIndices[i + 1] = iVertex;
7004	++iVertex;
7005	paIndices[i + 2] = iVertex;
7006	}
7007
7008	D3D11_SUBRESOURCE_DATA InitData;
7009	InitData.pSysMem = paIndices;
7010	InitData.SysMemPitch = cbAlloc;
7011	InitData.SysMemSlicePitch = cbAlloc;
7012
7013	D3D11_BUFFER_DESC bd;
7014	RT_ZERO(bd);
7015	bd.ByteWidth = cbAlloc;
7016	bd.Usage = D3D11_USAGE_IMMUTABLE;
7017	bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
7018	//bd.CPUAccessFlags = 0;
7019	//bd.MiscFlags = 0;
7020	//bd.StructureByteStride = 0;
7021
7022	ID3D11Buffer *pIndexBuffer = 0;
7023	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
7024	Assert(SUCCEEDED(hr));RT_NOREF(hr);
7025
7026	/* Save the current index buffer. */
7027	ID3D11Buffer *pSavedIndexBuffer = 0;
7028	DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
7029	UINT SavedOffset = 0;
7030	pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
7031
7032	/* Set up the device state. */
7033	pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
7034	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
7035
7036	UINT const StartIndexLocation = 0;
7037	INT const BaseVertexLocation = startVertexLocation;
7038	pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
7039
7040	/* Restore the device state. */
7041	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
7042	pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
7043	D3D_RELEASE(pSavedIndexBuffer);
7044
7045	/* Cleanup. */
7046	D3D_RELEASE(pIndexBuffer);
7047	RTMemFree(paIndices);
7048	}
7049
7050	#ifdef DX_FLUSH_AFTER_DRAW
7051	dxDeviceFlush(pDevice);
7052	#endif
7053
7054	return VINF_SUCCESS;
7055	}
7056
7057	static int dxReadBuffer(DXDEVICE pDevice, ID3D11Buffer pBuffer, UINT Offset, UINT Bytes, void *ppvData, uint32_t pcbData)
7058	{
7059	D3D11_BUFFER_DESC desc;
7060	RT_ZERO(desc);
7061	pBuffer->GetDesc(&desc);
7062
7063	AssertReturn( Offset < desc.ByteWidth
7064	&& Bytes <= desc.ByteWidth - Offset, VERR_INVALID_STATE);
7065
7066	void *pvData = RTMemAlloc(Bytes);
7067	if (!pvData)
7068	return VERR_NO_MEMORY;
7069
7070	*ppvData = pvData;
7071	*pcbData = Bytes;
7072
7073	#ifdef DX_COMMON_STAGING_BUFFER
7074	int rc = dxStagingBufferRealloc(pDevice, Bytes);
7075	if (RT_SUCCESS(rc))
7076	{
7077	/* Copy 'Bytes' bytes starting at 'Offset' from the buffer to the start of staging buffer. */
7078	ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
7079	UINT DstSubresource = 0;
7080	UINT DstX = 0;
7081	UINT DstY = 0;
7082	UINT DstZ = 0;
7083	ID3D11Resource *pSrcResource = pBuffer;
7084	UINT SrcSubresource = 0;
7085	D3D11_BOX SrcBox;
7086	SrcBox.left = Offset;
7087	SrcBox.top = 0;
7088	SrcBox.front = 0;
7089	SrcBox.right = Offset + Bytes;
7090	SrcBox.bottom = 1;
7091	SrcBox.back = 1;
7092	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
7093	pSrcResource, SrcSubresource, &SrcBox);
7094
7095	D3D11_MAPPED_SUBRESOURCE mappedResource;
7096	UINT const Subresource = 0; /* Buffers have only one subresource. */
7097	HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
7098	D3D11_MAP_READ, /* MapFlags = */ 0, &mappedResource);
7099	if (SUCCEEDED(hr))
7100	{
7101	memcpy(pvData, mappedResource.pData, Bytes);
7102
7103	/* Unmap the staging buffer. */
7104	pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
7105	}
7106	else
7107	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
7108
7109	}
7110	#else
7111	uint32_t const cbAlloc = Bytes;
7112
7113	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
7114	D3D11_BUFFER_DESC bd;
7115	RT_ZERO(bd);
7116	bd.ByteWidth = Bytes;
7117	bd.Usage = D3D11_USAGE_STAGING;
7118	//bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
7119	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
7120
7121	int rc = VINF_SUCCESS;
7122	ID3D11Buffer *pStagingBuffer;
7123	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pStagingBuffer);
7124	if (SUCCEEDED(hr))
7125	{
7126	/* Copy from the buffer to the staging buffer. */
7127	ID3D11Resource *pDstResource = pStagingBuffer;
7128	UINT DstSubresource = 0;
7129	UINT DstX = 0;
7130	UINT DstY = 0;
7131	UINT DstZ = 0;
7132	ID3D11Resource *pSrcResource = pBuffer;
7133	UINT SrcSubresource = 0;
7134	D3D11_BOX SrcBox;
7135	SrcBox.left = Offset;
7136	SrcBox.top = 0;
7137	SrcBox.front = 0;
7138	SrcBox.right = Offset + Bytes;
7139	SrcBox.bottom = 1;
7140	SrcBox.back = 1;
7141	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
7142	pSrcResource, SrcSubresource, &SrcBox);
7143
7144	D3D11_MAPPED_SUBRESOURCE mappedResource;
7145	UINT const Subresource = 0; /* Buffers have only one subresource. */
7146	hr = pDevice->pImmediateContext->Map(pStagingBuffer, Subresource,
7147	D3D11_MAP_READ, /* MapFlags = */ 0, &mappedResource);
7148	if (SUCCEEDED(hr))
7149	{
7150	memcpy(pvData, mappedResource.pData, Bytes);
7151
7152	/* Unmap the staging buffer. */
7153	pDevice->pImmediateContext->Unmap(pStagingBuffer, Subresource);
7154	}
7155	else
7156	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
7157
7158	D3D_RELEASE(pStagingBuffer);
7159	}
7160	else
7161	{
7162	rc = VERR_NO_MEMORY;
7163	}
7164	#endif
7165
7166	if (RT_FAILURE(rc))
7167	{
7168	RTMemFree(*ppvData);
7169	*ppvData = NULL;
7170	*pcbData = 0;
7171	}
7172
7173	return rc;
7174	}
7175
7176
7177	static int dxDrawIndexedTriangleFan(DXDEVICE *pDevice, uint32_t IndexCountTF, uint32_t StartIndexLocationTF, int32_t BaseVertexLocationTF)
7178	{
7179	/*
7180	* Emulate an indexed SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of triangle list.
7181	*/
7182
7183	/* Make sure that 16 bit indices are enough. */
7184	if (IndexCountTF > 65535)
7185	{
7186	LogRelMax(1, ("VMSVGA: ignore DrawIndexed(TRIANGLEFAN, %u)\n", IndexCountTF));
7187	return VERR_NOT_SUPPORTED;
7188	}
7189
7190	/* Save the current index buffer. */
7191	ID3D11Buffer *pSavedIndexBuffer = 0;
7192	DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
7193	UINT SavedOffset = 0;
7194	pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
7195
7196	AssertReturn( SavedFormat == DXGI_FORMAT_R16_UINT
7197	\|\| SavedFormat == DXGI_FORMAT_R32_UINT, VERR_NOT_SUPPORTED);
7198
7199	/* How many bytes are used by triangle fan indices. */
7200	UINT const BytesPerIndexTF = SavedFormat == DXGI_FORMAT_R16_UINT ? 2 : 4;
7201	UINT const BytesTF = BytesPerIndexTF * IndexCountTF;
7202
7203	/* Read the current index buffer content to obtain indices. */
7204	void *pvDataTF;
7205	uint32_t cbDataTF;
7206	int rc = dxReadBuffer(pDevice, pSavedIndexBuffer, StartIndexLocationTF, BytesTF, &pvDataTF, &cbDataTF);
7207	AssertRCReturn(rc, rc);
7208	AssertReturnStmt(cbDataTF >= BytesPerIndexTF, RTMemFree(pvDataTF), VERR_INVALID_STATE);
7209
7210	/* Generate indices for triangle list. */
7211	UINT const IndexCount = 3 * (IndexCountTF - 2); /* 3_per_triangle * num_triangles */
7212	UINT const cbAlloc = IndexCount * sizeof(USHORT);
7213	USHORT paIndices = (USHORT )RTMemAlloc(cbAlloc);
7214	AssertReturnStmt(paIndices, RTMemFree(pvDataTF), VERR_NO_MEMORY);
7215
7216	USHORT iVertex = 1;
7217	if (BytesPerIndexTF == 2)
7218	{
7219	USHORT paIndicesTF = (USHORT )pvDataTF;
7220	for (UINT i = 0; i < IndexCount; i+= 3)
7221	{
7222	paIndices[i] = paIndicesTF[0];
7223	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7224	paIndices[i + 1] = paIndicesTF[iVertex];
7225	++iVertex;
7226	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7227	paIndices[i + 2] = paIndicesTF[iVertex];
7228	}
7229	}
7230	else
7231	{
7232	UINT paIndicesTF = (UINT )pvDataTF;
7233	for (UINT i = 0; i < IndexCount; i+= 3)
7234	{
7235	paIndices[i] = paIndicesTF[0];
7236	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7237	paIndices[i + 1] = paIndicesTF[iVertex];
7238	++iVertex;
7239	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7240	paIndices[i + 2] = paIndicesTF[iVertex];
7241	}
7242	}
7243
7244	D3D11_SUBRESOURCE_DATA InitData;
7245	InitData.pSysMem = paIndices;
7246	InitData.SysMemPitch = cbAlloc;
7247	InitData.SysMemSlicePitch = cbAlloc;
7248
7249	D3D11_BUFFER_DESC bd;
7250	RT_ZERO(bd);
7251	bd.ByteWidth = cbAlloc;
7252	bd.Usage = D3D11_USAGE_IMMUTABLE;
7253	bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
7254	//bd.CPUAccessFlags = 0;
7255	//bd.MiscFlags = 0;
7256	//bd.StructureByteStride = 0;
7257
7258	ID3D11Buffer *pIndexBuffer = 0;
7259	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
7260	Assert(SUCCEEDED(hr));RT_NOREF(hr);
7261
7262	/* Set up the device state. */
7263	pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
7264	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
7265
7266	UINT const StartIndexLocation = 0;
7267	INT const BaseVertexLocation = BaseVertexLocationTF;
7268	pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
7269
7270	/* Restore the device state. */
7271	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
7272	pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
7273	D3D_RELEASE(pSavedIndexBuffer);
7274
7275	/* Cleanup. */
7276	D3D_RELEASE(pIndexBuffer);
7277	RTMemFree(paIndices);
7278	RTMemFree(pvDataTF);
7279
7280	return VINF_SUCCESS;
7281	}
7282
7283
7284	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
7285	{
7286	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7287	RT_NOREF(pBackend);
7288
7289	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7290	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7291
7292	dxSetupPipeline(pThisCC, pDXContext);
7293
7294	#ifdef LOG_ENABLED
7295	if (LogIs8Enabled())
7296	dxDbgDumpVertices_DrawIndexed(pThisCC, pDXContext, indexCount, startIndexLocation, baseVertexLocation);
7297	#endif
7298
7299	if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
7300	pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
7301	else
7302	{
7303	dxDrawIndexedTriangleFan(pDevice, indexCount, startIndexLocation, baseVertexLocation);
7304	}
7305
7306	#ifdef DX_FLUSH_AFTER_DRAW
7307	dxDeviceFlush(pDevice);
7308	#endif
7309
7310	return VINF_SUCCESS;
7311	}
7312
7313
7314	static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7315	uint32_t vertexCountPerInstance, uint32_t instanceCount, uint32_t startVertexLocation, uint32_t startInstanceLocation)
7316	{
7317	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7318	RT_NOREF(pBackend);
7319
7320	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7321	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7322
7323	dxSetupPipeline(pThisCC, pDXContext);
7324
7325	#ifdef LOG_ENABLED
7326	if (LogIs8Enabled())
7327	dxDbgDumpVertices_DrawInstanced(pThisCC, pDXContext, vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
7328	#endif
7329
7330	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7331
7332	pDevice->pImmediateContext->DrawInstanced(vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
7333
7334	#ifdef DX_FLUSH_AFTER_DRAW
7335	dxDeviceFlush(pDevice);
7336	#endif
7337
7338	return VINF_SUCCESS;
7339	}
7340
7341
7342	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7343	uint32_t indexCountPerInstance, uint32_t instanceCount, uint32_t startIndexLocation, int32_t baseVertexLocation, uint32_t startInstanceLocation)
7344	{
7345	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7346	RT_NOREF(pBackend);
7347
7348	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7349	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7350
7351	dxSetupPipeline(pThisCC, pDXContext);
7352
7353	#ifdef LOG_ENABLED
7354	if (LogIs8Enabled())
7355	dxDbgDumpVertices_DrawIndexedInstanced(pThisCC, pDXContext, indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
7356	#endif
7357
7358	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7359
7360	pDevice->pImmediateContext->DrawIndexedInstanced(indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
7361
7362	#ifdef DX_FLUSH_AFTER_DRAW
7363	dxDeviceFlush(pDevice);
7364	#endif
7365
7366	return VINF_SUCCESS;
7367	}
7368
7369
7370	static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
7371	{
7372	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7373	RT_NOREF(pBackend);
7374
7375	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7376	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7377
7378	dxSetupPipeline(pThisCC, pDXContext);
7379
7380	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7381
7382	pDevice->pImmediateContext->DrawAuto();
7383
7384	#ifdef DX_FLUSH_AFTER_DRAW
7385	dxDeviceFlush(pDevice);
7386	#endif
7387
7388	return VINF_SUCCESS;
7389	}
7390
7391
7392	static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
7393	{
7394	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7395	RT_NOREF(pBackend, pDXContext);
7396
7397	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7398	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7399
7400	RT_NOREF(elementLayoutId);
7401
7402	return VINF_SUCCESS;
7403	}
7404
7405
7406	static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
7407	{
7408	/* Will be set in setupPipeline. */
7409	RT_NOREF(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
7410	return VINF_SUCCESS;
7411	}
7412
7413
7414	static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
7415	{
7416	/* Will be set in setupPipeline. */
7417	RT_NOREF(pThisCC, pDXContext, sid, format, offset);
7418	return VINF_SUCCESS;
7419	}
7420
7421	static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
7422	{
7423	ASSERT_GUEST_RETURN(primitiveType < SVGA3D_PRIMITIVE_MAX, D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED);
7424
7425	static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
7426	{
7427	D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
7428	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
7429	D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
7430	D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
7431	D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
7432	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
7433	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
7434	D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
7435	D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
7436	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
7437	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
7438	D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
7439	D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
7440	D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
7441	D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
7442	D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
7443	D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
7444	D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
7445	D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
7446	D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
7447	D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
7448	D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
7449	D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
7450	D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
7451	D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
7452	D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
7453	D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
7454	D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
7455	D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
7456	D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
7457	D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
7458	D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
7459	D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
7460	D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
7461	D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
7462	D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
7463	D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
7464	D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
7465	D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
7466	D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
7467	D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
7468	D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
7469	D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
7470	};
7471	return aD3D11PrimitiveTopology[primitiveType];
7472	}
7473
7474	static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
7475	{
7476	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7477	RT_NOREF(pBackend, pDXContext);
7478
7479	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7480	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7481
7482	D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
7483	pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
7484	return VINF_SUCCESS;
7485	}
7486
7487
7488	static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
7489	{
7490	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7491	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7492
7493	UINT UAVStartSlot = 0;
7494	UINT NumUAVs = 0;
7495	ID3D11UnorderedAccessView *apUnorderedAccessViews[SVGA3D_DX11_1_MAX_UAVIEWS];
7496	UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
7497	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
7498	{
7499	apUnorderedAccessViews[idxUA] = NULL;
7500	aUAVInitialCounts[idxUA] = (UINT)-1;
7501
7502	SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
7503	if (uaViewId != SVGA3D_INVALID_ID)
7504	{
7505	ASSERT_GUEST_CONTINUE(uaViewId < pDXContext->cot.cUAView);
7506
7507	if (NumUAVs == 0)
7508	UAVStartSlot = idxUA;
7509	NumUAVs = idxUA - UAVStartSlot + 1;
7510	apUnorderedAccessViews[idxUA] = pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pUnorderedAccessView;
7511
7512	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[uaViewId];
7513	aUAVInitialCounts[idxUA] = pEntry->structureCount;
7514	}
7515	}
7516
7517	UINT NumRTVs = 0;
7518	ID3D11RenderTargetView *apRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
7519	RT_ZERO(apRenderTargetViews);
7520	for (uint32_t i = 0; i < pDXContext->cRenderTargets; ++i)
7521	{
7522	SVGA3dRenderTargetViewId const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
7523	if (renderTargetViewId != SVGA3D_INVALID_ID)
7524	{
7525	ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
7526	apRenderTargetViews[i] = pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId].u.pRenderTargetView;
7527	++NumRTVs;
7528	}
7529	}
7530
7531	/* RTVs are followed by UAVs. */
7532	Assert(NumUAVs == 0 \|\| NumRTVs <= pDXContext->svgaDXContext.uavSpliceIndex);
7533
7534	ID3D11DepthStencilView *pDepthStencilView = NULL;
7535	SVGA3dDepthStencilViewId const depthStencilViewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
7536	if (depthStencilViewId != SVGA_ID_INVALID)
7537	pDepthStencilView = pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId].u.pDepthStencilView;
7538
7539	pDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(NumRTVs,
7540	apRenderTargetViews,
7541	pDepthStencilView,
7542	pDXContext->svgaDXContext.uavSpliceIndex,
7543	NumUAVs,
7544	apUnorderedAccessViews,
7545	aUAVInitialCounts);
7546	return VINF_SUCCESS;
7547	}
7548
7549
7550	static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
7551	{
7552	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7553	RT_NOREF(pBackend, pDXContext);
7554
7555	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7556	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7557
7558	RT_NOREF(depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
7559
7560	return VINF_SUCCESS;
7561	}
7562
7563
7564	static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
7565	{
7566	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7567	RT_NOREF(pBackend);
7568
7569	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7570	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7571
7572	if (blendId != SVGA3D_INVALID_ID)
7573	{
7574	ID3D11BlendState1 *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
7575	pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
7576	}
7577	else
7578	pDevice->pImmediateContext->OMSetBlendState(NULL, NULL, 0);
7579
7580	return VINF_SUCCESS;
7581	}
7582
7583
7584	static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
7585	{
7586	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7587	RT_NOREF(pBackend);
7588
7589	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7590	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7591
7592	if (depthStencilId != SVGA3D_INVALID_ID)
7593	{
7594	ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
7595	pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
7596	}
7597	else
7598	pDevice->pImmediateContext->OMSetDepthStencilState(NULL, 0);
7599
7600	return VINF_SUCCESS;
7601	}
7602
7603
7604	static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
7605	{
7606	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7607	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7608	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7609
7610	RT_NOREF(pBackend);
7611
7612	if (rasterizerId != SVGA3D_INVALID_ID)
7613	{
7614	ID3D11RasterizerState1 *pRasterizerState = pDXContext->pBackendDXContext->papRasterizerState[rasterizerId];
7615	pDevice->pImmediateContext->RSSetState(pRasterizerState);
7616	}
7617	else
7618	pDevice->pImmediateContext->RSSetState(NULL);
7619
7620	return VINF_SUCCESS;
7621	}
7622
7623
7624	typedef struct VGPU10QUERYINFO
7625	{
7626	SVGA3dQueryType svgaQueryType;
7627	uint32_t cbDataVMSVGA;
7628	D3D11_QUERY dxQueryType;
7629	uint32_t cbDataD3D11;
7630	} VGPU10QUERYINFO;
7631
7632	static VGPU10QUERYINFO const *dxQueryInfo(SVGA3dQueryType type)
7633	{
7634	static VGPU10QUERYINFO const aQueryInfo[SVGA3D_QUERYTYPE_MAX] =
7635	{
7636	{ SVGA3D_QUERYTYPE_OCCLUSION, sizeof(SVGADXOcclusionQueryResult),
7637	D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7638	{ SVGA3D_QUERYTYPE_TIMESTAMP, sizeof(SVGADXTimestampQueryResult),
7639	D3D11_QUERY_TIMESTAMP, sizeof(UINT64) },
7640	{ SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT, sizeof(SVGADXTimestampDisjointQueryResult),
7641	D3D11_QUERY_TIMESTAMP_DISJOINT, sizeof(D3D11_QUERY_DATA_TIMESTAMP_DISJOINT) },
7642	{ SVGA3D_QUERYTYPE_PIPELINESTATS, sizeof(SVGADXPipelineStatisticsQueryResult),
7643	D3D11_QUERY_PIPELINE_STATISTICS, sizeof(D3D11_QUERY_DATA_PIPELINE_STATISTICS) },
7644	{ SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE, sizeof(SVGADXOcclusionPredicateQueryResult),
7645	D3D11_QUERY_OCCLUSION_PREDICATE, sizeof(BOOL) },
7646	{ SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS, sizeof(SVGADXStreamOutStatisticsQueryResult),
7647	D3D11_QUERY_SO_STATISTICS, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7648	{ SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE, sizeof(SVGADXStreamOutPredicateQueryResult),
7649	D3D11_QUERY_SO_OVERFLOW_PREDICATE, sizeof(BOOL) },
7650	{ SVGA3D_QUERYTYPE_OCCLUSION64, sizeof(SVGADXOcclusion64QueryResult),
7651	D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7652	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM0, sizeof(SVGADXStreamOutStatisticsQueryResult),
7653	D3D11_QUERY_SO_STATISTICS_STREAM0, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7654	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM1, sizeof(SVGADXStreamOutStatisticsQueryResult),
7655	D3D11_QUERY_SO_STATISTICS_STREAM1, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7656	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM2, sizeof(SVGADXStreamOutStatisticsQueryResult),
7657	D3D11_QUERY_SO_STATISTICS_STREAM2, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7658	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM3, sizeof(SVGADXStreamOutStatisticsQueryResult),
7659	D3D11_QUERY_SO_STATISTICS_STREAM3, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7660	{ SVGA3D_QUERYTYPE_SOP_STREAM0, sizeof(SVGADXStreamOutPredicateQueryResult),
7661	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM0, sizeof(BOOL) },
7662	{ SVGA3D_QUERYTYPE_SOP_STREAM1, sizeof(SVGADXStreamOutPredicateQueryResult),
7663	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM1, sizeof(BOOL) },
7664	{ SVGA3D_QUERYTYPE_SOP_STREAM2, sizeof(SVGADXStreamOutPredicateQueryResult),
7665	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM2, sizeof(BOOL) },
7666	{ SVGA3D_QUERYTYPE_SOP_STREAM3, sizeof(SVGADXStreamOutPredicateQueryResult),
7667	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM3, sizeof(BOOL) },
7668	};
7669
7670	ASSERT_GUEST_RETURN(type < RT_ELEMENTS(aQueryInfo), NULL);
7671	return &aQueryInfo[type];
7672	}
7673
7674	static int dxDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7675	{
7676	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7677	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7678
7679	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7680	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7681	if (!pQueryInfo)
7682	return VERR_INVALID_PARAMETER;
7683
7684	D3D11_QUERY_DESC desc;
7685	desc.Query = pQueryInfo->dxQueryType;
7686	desc.MiscFlags = 0;
7687	if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7688	desc.MiscFlags \|= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7689
7690	HRESULT hr = pDXDevice->pDevice->CreateQuery(&desc, &pDXQuery->pQuery);
7691	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7692
7693	return VINF_SUCCESS;
7694	}
7695
7696
7697	static int dxDestroyQuery(DXQUERY *pDXQuery)
7698	{
7699	D3D_RELEASE(pDXQuery->pQuery);
7700	return VINF_SUCCESS;
7701	}
7702
7703
7704	static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7705	{
7706	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7707	RT_NOREF(pBackend);
7708
7709	return dxDefineQuery(pThisCC, pDXContext, queryId, pEntry);
7710	}
7711
7712
7713	static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7714	{
7715	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7716	RT_NOREF(pBackend);
7717
7718	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7719	dxDestroyQuery(pDXQuery);
7720
7721	return VINF_SUCCESS;
7722	}
7723
7724
7725	/** @todo queryId makes pDXQuery redundant */
7726	static int dxBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, DXQUERY *pDXQuery)
7727	{
7728	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7729	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7730
7731	/* Begin is disabled for some queries. */
7732	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7733	if (pEntry->type == SVGA3D_QUERYTYPE_TIMESTAMP)
7734	return VINF_SUCCESS;
7735
7736	pDXDevice->pImmediateContext->Begin(pDXQuery->pQuery);
7737	return VINF_SUCCESS;
7738	}
7739
7740
7741	static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7742	{
7743	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7744	RT_NOREF(pBackend);
7745
7746	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7747	int rc = dxBeginQuery(pThisCC, pDXContext, queryId, pDXQuery);
7748	return rc;
7749	}
7750
7751
7752	static int dxGetQueryResult(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7753	SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7754	{
7755	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7756	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7757
7758	typedef union _DXQUERYRESULT
7759	{
7760	UINT64 occlusion;
7761	UINT64 timestamp;
7762	D3D11_QUERY_DATA_TIMESTAMP_DISJOINT timestampDisjoint;
7763	D3D11_QUERY_DATA_PIPELINE_STATISTICS pipelineStatistics;
7764	BOOL occlusionPredicate;
7765	D3D11_QUERY_DATA_SO_STATISTICS soStatistics;
7766	BOOL soOverflowPredicate;
7767	} DXQUERYRESULT;
7768
7769	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7770	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7771	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7772	if (!pQueryInfo)
7773	return VERR_INVALID_PARAMETER;
7774
7775	DXQUERYRESULT dxQueryResult;
7776	while (pDXDevice->pImmediateContext->GetData(pDXQuery->pQuery, &dxQueryResult, pQueryInfo->cbDataD3D11, 0) != S_OK)
7777	{
7778	RTThreadYield();
7779	}
7780
7781	/* Copy back the result. */
7782	switch (pEntry->type)
7783	{
7784	case SVGA3D_QUERYTYPE_OCCLUSION:
7785	pQueryResult->occ.samplesRendered = (uint32_t)dxQueryResult.occlusion;
7786	break;
7787	case SVGA3D_QUERYTYPE_TIMESTAMP:
7788	pQueryResult->ts.timestamp = dxQueryResult.timestamp;
7789	break;
7790	case SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT:
7791	pQueryResult->tsDisjoint.realFrequency = dxQueryResult.timestampDisjoint.Frequency;
7792	pQueryResult->tsDisjoint.disjoint = dxQueryResult.timestampDisjoint.Disjoint;
7793	break;
7794	case SVGA3D_QUERYTYPE_PIPELINESTATS:
7795	pQueryResult->pipelineStats.inputAssemblyVertices = dxQueryResult.pipelineStatistics.IAVertices;
7796	pQueryResult->pipelineStats.inputAssemblyPrimitives = dxQueryResult.pipelineStatistics.IAPrimitives;
7797	pQueryResult->pipelineStats.vertexShaderInvocations = dxQueryResult.pipelineStatistics.VSInvocations;
7798	pQueryResult->pipelineStats.geometryShaderInvocations = dxQueryResult.pipelineStatistics.GSInvocations;
7799	pQueryResult->pipelineStats.geometryShaderPrimitives = dxQueryResult.pipelineStatistics.GSPrimitives;
7800	pQueryResult->pipelineStats.clipperInvocations = dxQueryResult.pipelineStatistics.CInvocations;
7801	pQueryResult->pipelineStats.clipperPrimitives = dxQueryResult.pipelineStatistics.CPrimitives;
7802	pQueryResult->pipelineStats.pixelShaderInvocations = dxQueryResult.pipelineStatistics.PSInvocations;
7803	pQueryResult->pipelineStats.hullShaderInvocations = dxQueryResult.pipelineStatistics.HSInvocations;
7804	pQueryResult->pipelineStats.domainShaderInvocations = dxQueryResult.pipelineStatistics.DSInvocations;
7805	pQueryResult->pipelineStats.computeShaderInvocations = dxQueryResult.pipelineStatistics.CSInvocations;
7806	break;
7807	case SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE:
7808	pQueryResult->occPred.anySamplesRendered = dxQueryResult.occlusionPredicate;
7809	break;
7810	case SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS:
7811	case SVGA3D_QUERYTYPE_SOSTATS_STREAM0:
7812	case SVGA3D_QUERYTYPE_SOSTATS_STREAM1:
7813	case SVGA3D_QUERYTYPE_SOSTATS_STREAM2:
7814	case SVGA3D_QUERYTYPE_SOSTATS_STREAM3:
7815	pQueryResult->soStats.numPrimitivesWritten = dxQueryResult.soStatistics.NumPrimitivesWritten;
7816	pQueryResult->soStats.numPrimitivesRequired = dxQueryResult.soStatistics.PrimitivesStorageNeeded;
7817	break;
7818	case SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE:
7819	case SVGA3D_QUERYTYPE_SOP_STREAM0:
7820	case SVGA3D_QUERYTYPE_SOP_STREAM1:
7821	case SVGA3D_QUERYTYPE_SOP_STREAM2:
7822	case SVGA3D_QUERYTYPE_SOP_STREAM3:
7823	pQueryResult->soPred.overflowed = dxQueryResult.soOverflowPredicate;
7824	break;
7825	case SVGA3D_QUERYTYPE_OCCLUSION64:
7826	pQueryResult->occ64.samplesRendered = dxQueryResult.occlusion;
7827	break;
7828	}
7829
7830	*pcbOut = pQueryInfo->cbDataVMSVGA;
7831	return VINF_SUCCESS;
7832	}
7833
7834	static int dxEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7835	SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7836	{
7837	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7838	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7839
7840	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7841	pDXDevice->pImmediateContext->End(pDXQuery->pQuery);
7842
7843	/** @todo Consider issuing QueryEnd and getting data later in FIFO thread loop. */
7844	return dxGetQueryResult(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7845	}
7846
7847
7848	static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7849	SVGA3dQueryId queryId, SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7850	{
7851	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7852	RT_NOREF(pBackend);
7853
7854	int rc = dxEndQuery(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7855	return rc;
7856	}
7857
7858
7859	static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, uint32_t predicateValue)
7860	{
7861	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7862	RT_NOREF(pBackend);
7863
7864	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7865	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7866
7867	if (queryId != SVGA3D_INVALID_ID)
7868	{
7869	DEBUG_BREAKPOINT_TEST();
7870	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7871	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7872
7873	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7874	if (!pQueryInfo)
7875	return VERR_INVALID_PARAMETER;
7876
7877	D3D_RELEASE(pDXQuery->pQuery);
7878
7879	D3D11_QUERY_DESC desc;
7880	desc.Query = pQueryInfo->dxQueryType;
7881	desc.MiscFlags = 0;
7882	if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7883	desc.MiscFlags \|= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7884
7885	HRESULT hr = pDXDevice->pDevice->CreatePredicate(&desc, &pDXQuery->pPredicate);
7886	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7887
7888	pDXDevice->pImmediateContext->SetPredication(pDXQuery->pPredicate, RT_BOOL(predicateValue));
7889	}
7890	else
7891	pDXDevice->pImmediateContext->SetPredication(NULL, FALSE);
7892
7893	return VINF_SUCCESS;
7894	}
7895
7896
7897	static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cSOTarget, SVGA3dSoTarget const *paSoTarget)
7898	{
7899	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7900	RT_NOREF(pBackend);
7901
7902	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7903	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7904
7905	/* For each paSoTarget[i]:
7906	* If the stream outout buffer object does not exist then create it.
7907	* If the surface has been updated by the guest then update the buffer object.
7908	* Use SOSetTargets to set the buffers.
7909	*/
7910
7911	ID3D11Buffer *paResource[SVGA3D_DX_MAX_SOTARGETS];
7912	UINT paOffset[SVGA3D_DX_MAX_SOTARGETS];
7913
7914	/* Always re-bind all 4 SO targets. They can be NULL. */
7915	for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
7916	{
7917	/* Get corresponding resource. Create the buffer if does not yet exist. */
7918	if (i < cSOTarget && paSoTarget[i].sid != SVGA_ID_INVALID)
7919	{
7920	PVMSVGA3DSURFACE pSurface;
7921	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paSoTarget[i].sid, &pSurface);
7922	AssertRCReturn(rc, rc);
7923
7924	if (pSurface->pBackendSurface == NULL)
7925	{
7926	/* Create the resource. */
7927	rc = vmsvga3dBackSurfaceCreateSoBuffer(pThisCC, pSurface);
7928	AssertRCReturn(rc, rc);
7929	}
7930
7931	/** @todo How paSoTarget[i].sizeInBytes is used? Maybe when the buffer is created? */
7932	paResource[i] = pSurface->pBackendSurface->u.pBuffer;
7933	paOffset[i] = paSoTarget[i].offset;
7934	}
7935	else
7936	{
7937	paResource[i] = NULL;
7938	paOffset[i] = 0;
7939	}
7940	}
7941
7942	pDevice->pImmediateContext->SOSetTargets(SVGA3D_DX_MAX_SOTARGETS, paResource, paOffset);
7943
7944	pDXContext->pBackendDXContext->cSOTarget = cSOTarget;
7945
7946	return VINF_SUCCESS;
7947	}
7948
7949
7950	static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
7951	{
7952	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7953	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7954	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7955
7956	RT_NOREF(pBackend, pDXContext);
7957
7958	/* D3D11_VIEWPORT is identical to SVGA3dViewport. */
7959	D3D11_VIEWPORT pViewports = (D3D11_VIEWPORT )paViewport;
7960
7961	pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
7962	return VINF_SUCCESS;
7963	}
7964
7965
7966	static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
7967	{
7968	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7969	RT_NOREF(pBackend, pDXContext);
7970
7971	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7972	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7973
7974	/* D3D11_RECT is identical to SVGASignedRect. */
7975	D3D11_RECT pRects = (D3D11_RECT )paRect;
7976
7977	pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
7978	return VINF_SUCCESS;
7979	}
7980
7981
7982	static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
7983	{
7984	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7985	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7986
7987	DXVIEW *pDXView;
7988	int rc = dxEnsureRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pDXView);
7989	AssertRCReturn(rc, rc);
7990
7991	pDXDevice->pImmediateContext->ClearRenderTargetView(pDXView->u.pRenderTargetView, pRGBA->value);
7992	return VINF_SUCCESS;
7993	}
7994
7995
7996	static DECLCALLBACK(int) vmsvga3dBackVBDXClearRenderTargetViewRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId,
7997	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
7998	{
7999	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
8000	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
8001
8002	DXVIEW *pDXView;
8003	int rc = dxEnsureRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pDXView);
8004	AssertRCReturn(rc, rc);
8005
8006	pDXDevice->pImmediateContext->ClearView(pDXView->u.pRenderTargetView, pColor->value, (D3D11_RECT *)paRect, cRect);
8007	return VINF_SUCCESS;
8008	}
8009
8010
8011	static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
8012	{
8013	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8014	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8015
8016	DXVIEW *pDXView;
8017	int rc = dxEnsureDepthStencilView(pThisCC, pDXContext, depthStencilViewId, &pDXView);
8018	AssertRCReturn(rc, rc);
8019
8020	UINT ClearFlags = 0;
8021	if (flags & SVGA3D_CLEAR_DEPTH)
8022	ClearFlags \|= D3D11_CLEAR_DEPTH;
8023	if (flags & SVGA3D_CLEAR_STENCIL)
8024	ClearFlags \|= D3D11_CLEAR_STENCIL;
8025
8026	pDevice->pImmediateContext->ClearDepthStencilView(pDXView->u.pDepthStencilView, ClearFlags, depth, stencil);
8027	return VINF_SUCCESS;
8028	}
8029
8030
8031	static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
8032	{
8033	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8034	RT_NOREF(pBackend, pDXContext);
8035
8036	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8037	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8038
8039	PVMSVGA3DSURFACE pSrcSurface;
8040	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8041	AssertRCReturn(rc, rc);
8042
8043	PVMSVGA3DSURFACE pDstSurface;
8044	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8045	AssertRCReturn(rc, rc);
8046
8047	if (pSrcSurface->pBackendSurface == NULL)
8048	{
8049	/* Create the resource. */
8050	if (pSrcSurface->format != SVGA3D_BUFFER)
8051	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSrcSurface);
8052	else
8053	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pSrcSurface);
8054	AssertRCReturn(rc, rc);
8055	}
8056
8057	if (pDstSurface->pBackendSurface == NULL)
8058	{
8059	/* Create the resource. */
8060	if (pSrcSurface->format != SVGA3D_BUFFER)
8061	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDstSurface);
8062	else
8063	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDstSurface);
8064	AssertRCReturn(rc, rc);
8065	}
8066
8067	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
8068	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pSrcSurface->id,
8069	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pDstSurface->id));
8070
8071	/* Clip the box. */
8072	/** @todo Use [src\|dst]SubResource to index p[Src\|Dst]Surface->paMipmapLevels array directly. */
8073	uint32_t iSrcFace;
8074	uint32_t iSrcMipmap;
8075	vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
8076
8077	uint32_t iDstFace;
8078	uint32_t iDstMipmap;
8079	vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
8080
8081	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
8082	rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
8083	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8084
8085	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
8086	rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
8087	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8088
8089	SVGA3dCopyBox clipBox = *pBox;
8090	vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
8091
8092	UINT DstSubresource = dstSubResource;
8093	UINT DstX = clipBox.x;
8094	UINT DstY = clipBox.y;
8095	UINT DstZ = clipBox.z;
8096
8097	UINT SrcSubresource = srcSubResource;
8098	D3D11_BOX SrcBox;
8099	SrcBox.left = clipBox.srcx;
8100	SrcBox.top = clipBox.srcy;
8101	SrcBox.front = clipBox.srcz;
8102	SrcBox.right = clipBox.srcx + clipBox.w;
8103	SrcBox.bottom = clipBox.srcy + clipBox.h;
8104	SrcBox.back = clipBox.srcz + clipBox.d;
8105
8106	ID3D11Resource *pDstResource;
8107	ID3D11Resource *pSrcResource;
8108
8109	pDstResource = dxResource(pDstSurface);
8110	pSrcResource = dxResource(pSrcSurface);
8111
8112	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
8113	pSrcResource, SrcSubresource, &SrcBox);
8114
8115	#ifdef DUMP_BITMAPS
8116	SVGA3dSurfaceImageId image;
8117	image.sid = pDstSurface->id;
8118	image.face = 0;
8119	image.mipmap = 0;
8120	VMSVGA3D_MAPPED_SURFACE map;
8121	int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
8122	if (RT_SUCCESS(rc2))
8123	{
8124	vmsvga3dMapWriteBmpFile(&map, "copyregion-");
8125	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
8126	}
8127	else
8128	Log(("Map failed %Rrc\n", rc));
8129	#endif
8130
8131	return VINF_SUCCESS;
8132	}
8133
8134
8135	static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, SVGA3dSurfaceId srcSid)
8136	{
8137	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8138	RT_NOREF(pBackend, pDXContext);
8139
8140	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8141	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8142
8143	PVMSVGA3DSURFACE pSrcSurface;
8144	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8145	AssertRCReturn(rc, rc);
8146
8147	PVMSVGA3DSURFACE pDstSurface;
8148	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8149	AssertRCReturn(rc, rc);
8150
8151	if (pSrcSurface->pBackendSurface == NULL)
8152	{
8153	/* Create the resource. */
8154	if (pSrcSurface->format != SVGA3D_BUFFER)
8155	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSrcSurface);
8156	else
8157	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pSrcSurface);
8158	AssertRCReturn(rc, rc);
8159	}
8160
8161	if (pDstSurface->pBackendSurface == NULL)
8162	{
8163	/* Create the resource. */
8164	if (pSrcSurface->format != SVGA3D_BUFFER)
8165	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDstSurface);
8166	else
8167	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDstSurface);
8168	AssertRCReturn(rc, rc);
8169	}
8170
8171	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
8172	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pSrcSurface->id,
8173	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pDstSurface->id));
8174
8175	ID3D11Resource *pDstResource = dxResource(pDstSurface);
8176	ID3D11Resource *pSrcResource = dxResource(pSrcSurface);
8177
8178	pDevice->pImmediateContext->CopyResource(pDstResource, pSrcResource);
8179
8180	return VINF_SUCCESS;
8181	}
8182
8183
8184	#include "shaders/d3d11blitter.hlsl.vs.h"
8185	#include "shaders/d3d11blitter.hlsl.ps.h"
8186
8187	#define HTEST(stmt) \
8188	hr = stmt; \
8189	AssertReturn(SUCCEEDED(hr), hr)
8190
8191
8192	static void BlitRelease(D3D11BLITTER *pBlitter)
8193	{
8194	D3D_RELEASE(pBlitter->pVertexShader);
8195	D3D_RELEASE(pBlitter->pPixelShader);
8196	D3D_RELEASE(pBlitter->pSamplerState);
8197	D3D_RELEASE(pBlitter->pRasterizerState);
8198	D3D_RELEASE(pBlitter->pBlendState);
8199	RT_ZERO(*pBlitter);
8200	}
8201
8202
8203	static HRESULT BlitInit(D3D11BLITTER pBlitter, ID3D11Device1 pDevice, ID3D11DeviceContext1 *pImmediateContext)
8204	{
8205	HRESULT hr;
8206
8207	RT_ZERO(*pBlitter);
8208
8209	pBlitter->pDevice = pDevice;
8210	pBlitter->pImmediateContext = pImmediateContext;
8211
8212	HTEST(pBlitter->pDevice->CreateVertexShader(g_vs_blitter, sizeof(g_vs_blitter), NULL, &pBlitter->pVertexShader));
8213	HTEST(pBlitter->pDevice->CreatePixelShader(g_ps_blitter, sizeof(g_ps_blitter), NULL, &pBlitter->pPixelShader));
8214
8215	D3D11_SAMPLER_DESC SamplerDesc;
8216	SamplerDesc.Filter = D3D11_FILTER_ANISOTROPIC;
8217	SamplerDesc.AddressU = D3D11_TEXTURE_ADDRESS_WRAP;
8218	SamplerDesc.AddressV = D3D11_TEXTURE_ADDRESS_WRAP;
8219	SamplerDesc.AddressW = D3D11_TEXTURE_ADDRESS_WRAP;
8220	SamplerDesc.MipLODBias = 0.0f;
8221	SamplerDesc.MaxAnisotropy = 4;
8222	SamplerDesc.ComparisonFunc = D3D11_COMPARISON_ALWAYS;
8223	SamplerDesc.BorderColor[0] = 0.0f;
8224	SamplerDesc.BorderColor[1] = 0.0f;
8225	SamplerDesc.BorderColor[2] = 0.0f;
8226	SamplerDesc.BorderColor[3] = 0.0f;
8227	SamplerDesc.MinLOD = 0.0f;
8228	SamplerDesc.MaxLOD = 0.0f;
8229	HTEST(pBlitter->pDevice->CreateSamplerState(&SamplerDesc, &pBlitter->pSamplerState));
8230
8231	D3D11_RASTERIZER_DESC1 RasterizerDesc;
8232	RasterizerDesc.FillMode = D3D11_FILL_SOLID;
8233	RasterizerDesc.CullMode = D3D11_CULL_NONE;
8234	RasterizerDesc.FrontCounterClockwise = FALSE;
8235	RasterizerDesc.DepthBias = 0;
8236	RasterizerDesc.DepthBiasClamp = 0.0f;
8237	RasterizerDesc.SlopeScaledDepthBias = 0.0f;
8238	RasterizerDesc.DepthClipEnable = FALSE;
8239	RasterizerDesc.ScissorEnable = FALSE;
8240	RasterizerDesc.MultisampleEnable = FALSE;
8241	RasterizerDesc.AntialiasedLineEnable = FALSE;
8242	RasterizerDesc.ForcedSampleCount = 0;
8243	HTEST(pBlitter->pDevice->CreateRasterizerState1(&RasterizerDesc, &pBlitter->pRasterizerState));
8244
8245	D3D11_BLEND_DESC1 BlendDesc;
8246	BlendDesc.AlphaToCoverageEnable = FALSE;
8247	BlendDesc.IndependentBlendEnable = FALSE;
8248	for (unsigned i = 0; i < RT_ELEMENTS(BlendDesc.RenderTarget); ++i)
8249	{
8250	BlendDesc.RenderTarget[i].BlendEnable = FALSE;
8251	BlendDesc.RenderTarget[i].LogicOpEnable = FALSE;
8252	BlendDesc.RenderTarget[i].SrcBlend = D3D11_BLEND_SRC_COLOR;
8253	BlendDesc.RenderTarget[i].DestBlend = D3D11_BLEND_ZERO;
8254	BlendDesc.RenderTarget[i].BlendOp = D3D11_BLEND_OP_ADD;
8255	BlendDesc.RenderTarget[i].SrcBlendAlpha = D3D11_BLEND_SRC_ALPHA;
8256	BlendDesc.RenderTarget[i].DestBlendAlpha = D3D11_BLEND_ZERO;
8257	BlendDesc.RenderTarget[i].BlendOpAlpha = D3D11_BLEND_OP_ADD;
8258	BlendDesc.RenderTarget[i].LogicOp = D3D11_LOGIC_OP_CLEAR;
8259	BlendDesc.RenderTarget[i].RenderTargetWriteMask = 0xF;
8260	}
8261	HTEST(pBlitter->pDevice->CreateBlendState1(&BlendDesc, &pBlitter->pBlendState));
8262
8263	return S_OK;
8264	}
8265
8266
8267	static HRESULT BlitFromTexture(D3D11BLITTER pBlitter, ID3D11RenderTargetView pDstRenderTargetView,
8268	float cDstWidth, float cDstHeight, D3D11_RECT const &rectDst,
8269	ID3D11ShaderResourceView *pSrcShaderResourceView)
8270	{
8271	HRESULT hr;
8272
8273	/*
8274	* Save pipeline state.
8275	*/
8276	struct
8277	{
8278	D3D11_PRIMITIVE_TOPOLOGY Topology;
8279	ID3D11InputLayout *pInputLayout;
8280	ID3D11Buffer *pConstantBuffer;
8281	ID3D11VertexShader *pVertexShader;
8282	ID3D11HullShader *pHullShader;
8283	ID3D11DomainShader *pDomainShader;
8284	ID3D11GeometryShader *pGeometryShader;
8285	ID3D11ShaderResourceView *pShaderResourceView;
8286	ID3D11PixelShader *pPixelShader;
8287	ID3D11SamplerState *pSamplerState;
8288	ID3D11RasterizerState *pRasterizerState;
8289	ID3D11BlendState *pBlendState;
8290	FLOAT BlendFactor[4];
8291	UINT SampleMask;
8292	ID3D11RenderTargetView *apRenderTargetView[D3D11_SIMULTANEOUS_RENDER_TARGET_COUNT];
8293	ID3D11DepthStencilView *pDepthStencilView;
8294	UINT NumViewports;
8295	D3D11_VIEWPORT aViewport[D3D11_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE];
8296	} SavedState;
8297
8298	pBlitter->pImmediateContext->IAGetPrimitiveTopology(&SavedState.Topology);
8299	pBlitter->pImmediateContext->IAGetInputLayout(&SavedState.pInputLayout);
8300	pBlitter->pImmediateContext->VSGetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
8301	pBlitter->pImmediateContext->VSGetShader(&SavedState.pVertexShader, NULL, NULL);
8302	pBlitter->pImmediateContext->HSGetShader(&SavedState.pHullShader, NULL, NULL);
8303	pBlitter->pImmediateContext->DSGetShader(&SavedState.pDomainShader, NULL, NULL);
8304	pBlitter->pImmediateContext->GSGetShader(&SavedState.pGeometryShader, NULL, NULL);
8305	pBlitter->pImmediateContext->PSGetShaderResources(0, 1, &SavedState.pShaderResourceView);
8306	pBlitter->pImmediateContext->PSGetShader(&SavedState.pPixelShader, NULL, NULL);
8307	pBlitter->pImmediateContext->PSGetSamplers(0, 1, &SavedState.pSamplerState);
8308	pBlitter->pImmediateContext->RSGetState(&SavedState.pRasterizerState);
8309	pBlitter->pImmediateContext->OMGetBlendState(&SavedState.pBlendState, SavedState.BlendFactor, &SavedState.SampleMask);
8310	pBlitter->pImmediateContext->OMGetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, &SavedState.pDepthStencilView);
8311	SavedState.NumViewports = RT_ELEMENTS(SavedState.aViewport);
8312	pBlitter->pImmediateContext->RSGetViewports(&SavedState.NumViewports, &SavedState.aViewport[0]);
8313
8314	/*
8315	* Setup pipeline for the blitter.
8316	*/
8317
8318	/* Render target is first.
8319	* If the source texture is bound as a render target, then this call will unbind it
8320	* and allow to use it as the shader resource.
8321	*/
8322	pBlitter->pImmediateContext->OMSetRenderTargets(1, &pDstRenderTargetView, NULL);
8323
8324	/* Input assembler. */
8325	pBlitter->pImmediateContext->IASetInputLayout(NULL);
8326	pBlitter->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
8327
8328	/* Constant buffer. */
8329	struct
8330	{
8331	float scaleX;
8332	float scaleY;
8333	float offsetX;
8334	float offsetY;
8335	} VSConstantBuffer;
8336	VSConstantBuffer.scaleX = (float)(rectDst.right - rectDst.left) / cDstWidth;
8337	VSConstantBuffer.scaleY = (float)(rectDst.bottom - rectDst.top) / cDstHeight;
8338	VSConstantBuffer.offsetX = (float)(rectDst.right + rectDst.left) / cDstWidth - 1.0f;
8339	VSConstantBuffer.offsetY = -((float)(rectDst.bottom + rectDst.top) / cDstHeight - 1.0f);
8340
8341	D3D11_SUBRESOURCE_DATA initialData;
8342	initialData.pSysMem = &VSConstantBuffer;
8343	initialData.SysMemPitch = sizeof(VSConstantBuffer);
8344	initialData.SysMemSlicePitch = sizeof(VSConstantBuffer);
8345
8346	D3D11_BUFFER_DESC bd;
8347	RT_ZERO(bd);
8348	bd.ByteWidth = sizeof(VSConstantBuffer);
8349	bd.Usage = D3D11_USAGE_IMMUTABLE;
8350	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
8351
8352	ID3D11Buffer *pConstantBuffer;
8353	HTEST(pBlitter->pDevice->CreateBuffer(&bd, &initialData, &pConstantBuffer));
8354	pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &pConstantBuffer);
8355	D3D_RELEASE(pConstantBuffer); /* xSSetConstantBuffers "will hold a reference to the interfaces passed in." */
8356
8357	/* Vertex shader. */
8358	pBlitter->pImmediateContext->VSSetShader(pBlitter->pVertexShader, NULL, 0);
8359
8360	/* Unused shaders. */
8361	pBlitter->pImmediateContext->HSSetShader(NULL, NULL, 0);
8362	pBlitter->pImmediateContext->DSSetShader(NULL, NULL, 0);
8363	pBlitter->pImmediateContext->GSSetShader(NULL, NULL, 0);
8364
8365	/* Shader resource view. */
8366	pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &pSrcShaderResourceView);
8367
8368	/* Pixel shader. */
8369	pBlitter->pImmediateContext->PSSetShader(pBlitter->pPixelShader, NULL, 0);
8370
8371	/* Sampler. */
8372	pBlitter->pImmediateContext->PSSetSamplers(0, 1, &pBlitter->pSamplerState);
8373
8374	/* Rasterizer. */
8375	pBlitter->pImmediateContext->RSSetState(pBlitter->pRasterizerState);
8376
8377	/* Blend state. */
8378	static FLOAT const BlendFactor[4] = { 0.0f, 0.0f, 0.0f, 0.0f };
8379	pBlitter->pImmediateContext->OMSetBlendState(pBlitter->pBlendState, BlendFactor, 0xffffffff);
8380
8381	/* Viewport. */
8382	D3D11_VIEWPORT Viewport;
8383	Viewport.TopLeftX = 0;
8384	Viewport.TopLeftY = 0;
8385	Viewport.Width = cDstWidth;
8386	Viewport.Height = cDstHeight;
8387	Viewport.MinDepth = 0.0f;
8388	Viewport.MaxDepth = 1.0f;
8389	pBlitter->pImmediateContext->RSSetViewports(1, &Viewport);
8390
8391	/* Draw. */
8392	pBlitter->pImmediateContext->Draw(4, 0);
8393
8394	/*
8395	* Restore pipeline state.
8396	*/
8397	pBlitter->pImmediateContext->IASetPrimitiveTopology(SavedState.Topology);
8398	pBlitter->pImmediateContext->IASetInputLayout(SavedState.pInputLayout);
8399	D3D_RELEASE(SavedState.pInputLayout);
8400	pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
8401	D3D_RELEASE(SavedState.pConstantBuffer);
8402	pBlitter->pImmediateContext->VSSetShader(SavedState.pVertexShader, NULL, 0);
8403	D3D_RELEASE(SavedState.pVertexShader);
8404
8405	pBlitter->pImmediateContext->HSSetShader(SavedState.pHullShader, NULL, 0);
8406	D3D_RELEASE(SavedState.pHullShader);
8407	pBlitter->pImmediateContext->DSSetShader(SavedState.pDomainShader, NULL, 0);
8408	D3D_RELEASE(SavedState.pDomainShader);
8409	pBlitter->pImmediateContext->GSSetShader(SavedState.pGeometryShader, NULL, 0);
8410	D3D_RELEASE(SavedState.pGeometryShader);
8411
8412	pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &SavedState.pShaderResourceView);
8413	D3D_RELEASE(SavedState.pShaderResourceView);
8414	pBlitter->pImmediateContext->PSSetShader(SavedState.pPixelShader, NULL, 0);
8415	D3D_RELEASE(SavedState.pPixelShader);
8416	pBlitter->pImmediateContext->PSSetSamplers(0, 1, &SavedState.pSamplerState);
8417	D3D_RELEASE(SavedState.pSamplerState);
8418	pBlitter->pImmediateContext->RSSetState(SavedState.pRasterizerState);
8419	D3D_RELEASE(SavedState.pRasterizerState);
8420	pBlitter->pImmediateContext->OMSetBlendState(SavedState.pBlendState, SavedState.BlendFactor, SavedState.SampleMask);
8421	D3D_RELEASE(SavedState.pBlendState);
8422	pBlitter->pImmediateContext->OMSetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, SavedState.pDepthStencilView);
8423	D3D_RELEASE_ARRAY(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView);
8424	D3D_RELEASE(SavedState.pDepthStencilView);
8425	pBlitter->pImmediateContext->RSSetViewports(SavedState.NumViewports, &SavedState.aViewport[0]);
8426
8427	return S_OK;
8428	}
8429
8430
8431	static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8432	SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dBox const *pBoxDst,
8433	SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dBox const *pBoxSrc,
8434	SVGA3dDXPresentBltMode mode)
8435	{
8436	RT_NOREF(pDXContext, mode);
8437
8438	ASSERT_GUEST_RETURN(pBoxDst->z == 0 && pBoxDst->d == 1, VERR_INVALID_PARAMETER);
8439	ASSERT_GUEST_RETURN(pBoxSrc->z == 0 && pBoxSrc->d == 1, VERR_INVALID_PARAMETER);
8440
8441	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8442	RT_NOREF(pBackend);
8443
8444	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8445	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8446
8447	PVMSVGA3DSURFACE pSrcSurface;
8448	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8449	AssertRCReturn(rc, rc);
8450
8451	PVMSVGA3DSURFACE pDstSurface;
8452	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8453	AssertRCReturn(rc, rc);
8454
8455	if (pSrcSurface->pBackendSurface == NULL)
8456	{
8457	/* Create the resource. */
8458	if (pSrcSurface->format != SVGA3D_BUFFER)
8459	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSrcSurface);
8460	else
8461	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pSrcSurface);
8462	AssertRCReturn(rc, rc);
8463	}
8464
8465	if (pDstSurface->pBackendSurface == NULL)
8466	{
8467	/* Create the resource. */
8468	if (pSrcSurface->format != SVGA3D_BUFFER)
8469	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDstSurface);
8470	else
8471	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDstSurface);
8472	AssertRCReturn(rc, rc);
8473	}
8474
8475	#ifdef DEBUG_sunlover
8476	if (pSrcSurface->surfaceDesc.multisampleCount > 1 \|\| pDstSurface->surfaceDesc.multisampleCount > 1)
8477	DEBUG_BREAKPOINT_TEST();
8478	#endif
8479
8480	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
8481	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pSrcSurface->id,
8482	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pDstSurface->id));
8483
8484	/* Clip the box. */
8485	/** @todo Use [src\|dst]SubResource to index p[Src\|Dst]Surface->paMipmapLevels array directly. */
8486	uint32_t iSrcFace;
8487	uint32_t iSrcMipmap;
8488	vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
8489
8490	uint32_t iDstFace;
8491	uint32_t iDstMipmap;
8492	vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
8493
8494	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
8495	rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
8496	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8497
8498	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
8499	rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
8500	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8501
8502	SVGA3dBox clipBoxSrc = *pBoxSrc;
8503	vmsvgaR3ClipBox(&pSrcMipLevel->mipmapSize, &clipBoxSrc);
8504
8505	SVGA3dBox clipBoxDst = *pBoxDst;
8506	vmsvgaR3ClipBox(&pDstMipLevel->mipmapSize, &clipBoxDst);
8507
8508	ID3D11Resource *pDstResource = dxResource(pDstSurface);
8509	ID3D11Resource *pSrcResource = dxResource(pSrcSurface);
8510
8511	D3D11_RENDER_TARGET_VIEW_DESC RTVDesc;
8512	RT_ZERO(RTVDesc);
8513	RTVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pDstSurface->format);;
8514	RTVDesc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
8515	RTVDesc.Texture2D.MipSlice = dstSubResource;
8516
8517	ID3D11RenderTargetView *pDstRenderTargetView;
8518	HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pDstResource, &RTVDesc, &pDstRenderTargetView);
8519	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
8520
8521	D3D11_SHADER_RESOURCE_VIEW_DESC SRVDesc;
8522	RT_ZERO(SRVDesc);
8523	SRVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pSrcSurface->format);
8524	SRVDesc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
8525	SRVDesc.Texture2D.MostDetailedMip = srcSubResource;
8526	SRVDesc.Texture2D.MipLevels = 1;
8527
8528	ID3D11ShaderResourceView *pSrcShaderResourceView;
8529	hr = pDevice->pDevice->CreateShaderResourceView(pSrcResource, &SRVDesc, &pSrcShaderResourceView);
8530	AssertReturnStmt(SUCCEEDED(hr), D3D_RELEASE(pDstRenderTargetView), VERR_NOT_SUPPORTED);
8531
8532	D3D11_RECT rectDst;
8533	rectDst.left = pBoxDst->x;
8534	rectDst.top = pBoxDst->y;
8535	rectDst.right = pBoxDst->x + pBoxDst->w;
8536	rectDst.bottom = pBoxDst->y + pBoxDst->h;
8537
8538	BlitFromTexture(&pDevice->Blitter, pDstRenderTargetView, (float)pDstMipLevel->mipmapSize.width, (float)pDstMipLevel->mipmapSize.height,
8539	rectDst, pSrcShaderResourceView);
8540
8541	D3D_RELEASE(pSrcShaderResourceView);
8542	D3D_RELEASE(pDstRenderTargetView);
8543
8544	return VINF_SUCCESS;
8545	}
8546
8547
8548	static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8549	{
8550	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
8551	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
8552
8553	DXVIEW *pDXView;
8554	int rc = dxEnsureShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, &pDXView);
8555	AssertRCReturn(rc, rc);
8556
8557	pDXDevice->pImmediateContext->GenerateMips(pDXView->u.pShaderResourceView);
8558	return VINF_SUCCESS;
8559	}
8560
8561
8562	static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
8563	{
8564	/* The view is created when it is used in setupPipeline. */
8565	RT_NOREF(pThisCC, pDXContext, shaderResourceViewId, pEntry);
8566	return VINF_SUCCESS;
8567	}
8568
8569
8570	static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8571	{
8572	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8573	RT_NOREF(pBackend);
8574
8575	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
8576	return dxViewDestroy(pDXView);
8577	}
8578
8579
8580	static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
8581	{
8582	/* The view is created when it is used in setupPipeline or ClearView. */
8583	RT_NOREF(pThisCC, pDXContext, renderTargetViewId, pEntry);
8584	return VINF_SUCCESS;
8585	}
8586
8587
8588	static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
8589	{
8590	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8591	RT_NOREF(pBackend);
8592
8593	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
8594	return dxViewDestroy(pDXView);
8595	}
8596
8597
8598	static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
8599	{
8600	/* The view is created when it is used in setupPipeline or ClearView. */
8601	RT_NOREF(pThisCC, pDXContext, depthStencilViewId, pEntry);
8602	return VINF_SUCCESS;
8603	}
8604
8605
8606	static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
8607	{
8608	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8609	RT_NOREF(pBackend);
8610
8611	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
8612	return dxViewDestroy(pDXView);
8613	}
8614
8615
8616	static int dxDefineElementLayout(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8617	{
8618	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8619	D3D_RELEASE(pDXElementLayout->pElementLayout);
8620	pDXElementLayout->cElementDesc = 0;
8621	RT_ZERO(pDXElementLayout->aElementDesc);
8622
8623	RT_NOREF(pEntry);
8624
8625	return VINF_SUCCESS;
8626	}
8627
8628
8629	static int dxDestroyElementLayout(DXELEMENTLAYOUT *pDXElementLayout)
8630	{
8631	D3D_RELEASE(pDXElementLayout->pElementLayout);
8632	pDXElementLayout->cElementDesc = 0;
8633	RT_ZERO(pDXElementLayout->aElementDesc);
8634	return VINF_SUCCESS;
8635	}
8636
8637
8638	static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8639	{
8640	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8641	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8642	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8643
8644	RT_NOREF(pBackend);
8645
8646	/* Not much can be done here because ID3D11Device::CreateInputLayout requires
8647	* a pShaderBytecodeWithInputSignature which is not known at this moment.
8648	* InputLayout object will be created in setupPipeline.
8649	*/
8650
8651	Assert(elementLayoutId == pEntry->elid);
8652
8653	return dxDefineElementLayout(pDXContext, elementLayoutId, pEntry);
8654	}
8655
8656
8657	static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
8658	{
8659	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8660	RT_NOREF(pBackend);
8661
8662	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8663	dxDestroyElementLayout(pDXElementLayout);
8664
8665	return VINF_SUCCESS;
8666	}
8667
8668
8669	static int dxDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8670	SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8671	{
8672	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8673	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8674
8675	HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
8676	if (SUCCEEDED(hr))
8677	return VINF_SUCCESS;
8678	return VERR_INVALID_STATE;
8679	}
8680
8681
8682	static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8683	SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8684	{
8685	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8686	RT_NOREF(pBackend);
8687
8688	return dxDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
8689	}
8690
8691
8692	static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId)
8693	{
8694	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8695	RT_NOREF(pBackend);
8696
8697	D3D_RELEASE(pDXContext->pBackendDXContext->papBlendState[blendId]);
8698	return VINF_SUCCESS;
8699	}
8700
8701
8702	static int dxDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8703	{
8704	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8705	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8706
8707	HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8708	if (SUCCEEDED(hr))
8709	return VINF_SUCCESS;
8710	return VERR_INVALID_STATE;
8711	}
8712
8713
8714	static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8715	{
8716	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8717	RT_NOREF(pBackend);
8718
8719	return dxDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
8720	}
8721
8722
8723	static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId)
8724	{
8725	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8726	RT_NOREF(pBackend);
8727
8728	D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8729	return VINF_SUCCESS;
8730	}
8731
8732
8733	static int dxDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8734	{
8735	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8736	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8737
8738	HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8739	if (SUCCEEDED(hr))
8740	return VINF_SUCCESS;
8741	return VERR_INVALID_STATE;
8742	}
8743
8744
8745	static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8746	{
8747	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8748	RT_NOREF(pBackend);
8749
8750	return dxDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
8751	}
8752
8753
8754	static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
8755	{
8756	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8757	RT_NOREF(pBackend);
8758
8759	D3D_RELEASE(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8760	return VINF_SUCCESS;
8761	}
8762
8763
8764	static int dxDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8765	{
8766	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8767	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8768
8769	HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8770	if (SUCCEEDED(hr))
8771	return VINF_SUCCESS;
8772	return VERR_INVALID_STATE;
8773	}
8774
8775
8776	static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8777	{
8778	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8779	RT_NOREF(pBackend);
8780
8781	return dxDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
8782	}
8783
8784
8785	static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId)
8786	{
8787	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8788	RT_NOREF(pBackend);
8789
8790	D3D_RELEASE(pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8791	return VINF_SUCCESS;
8792	}
8793
8794
8795	static int dxDefineShader(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8796	{
8797	/** @todo A common approach for creation of COTable backend objects: runtime, empty DX COTable, live DX COTable. */
8798	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8799	Assert(pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID);
8800
8801	/* Init the backend shader structure, if the shader has not been created yet. */
8802	pDXShader->enmShaderType = pEntry->type;
8803	pDXShader->pShader = NULL;
8804	pDXShader->soid = SVGA_ID_INVALID;
8805
8806	return VINF_SUCCESS;
8807	}
8808
8809
8810	static int dxDestroyShader(DXSHADER *pDXShader)
8811	{
8812	pDXShader->enmShaderType = SVGA3D_SHADERTYPE_INVALID;
8813	DXShaderFree(&pDXShader->shaderInfo);
8814	D3D_RELEASE(pDXShader->pShader);
8815	RTMemFree(pDXShader->pvDXBC);
8816	pDXShader->pvDXBC = NULL;
8817	pDXShader->cbDXBC = 0;
8818	pDXShader->soid = SVGA_ID_INVALID;
8819	return VINF_SUCCESS;
8820	}
8821
8822
8823	static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8824	{
8825	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8826	RT_NOREF(pBackend);
8827
8828	return dxDefineShader(pDXContext, shaderId, pEntry);
8829	}
8830
8831
8832	static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId)
8833	{
8834	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8835	RT_NOREF(pBackend);
8836
8837	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8838	dxDestroyShader(pDXShader);
8839
8840	return VINF_SUCCESS;
8841	}
8842
8843
8844	static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, DXShaderInfo const *pShaderInfo)
8845	{
8846	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8847	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8848	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8849
8850	RT_NOREF(pBackend);
8851
8852	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8853	if (pDXShader->pvDXBC)
8854	{
8855	/* New DXBC code and new shader must be created. */
8856	D3D_RELEASE(pDXShader->pShader);
8857	RTMemFree(pDXShader->pvDXBC);
8858	pDXShader->pvDXBC = NULL;
8859	pDXShader->cbDXBC = 0;
8860	}
8861
8862	pDXShader->shaderInfo = *pShaderInfo;
8863
8864	return VINF_SUCCESS;
8865	}
8866
8867
8868	static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry)
8869	{
8870	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8871	RT_NOREF(pBackend);
8872
8873	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8874	dxDestroyStreamOutput(pDXStreamOutput);
8875
8876	RT_NOREF(pEntry);
8877	return VINF_SUCCESS;
8878	}
8879
8880
8881	static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
8882	{
8883	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8884	RT_NOREF(pBackend);
8885
8886	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8887	dxDestroyStreamOutput(pDXStreamOutput);
8888
8889	return VINF_SUCCESS;
8890	}
8891
8892
8893	static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
8894	{
8895	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8896	RT_NOREF(pBackend, pDXContext, soid);
8897
8898	return VINF_SUCCESS;
8899	}
8900
8901
8902	static int dxCOTableRealloc(void *ppvCOTable, uint32_t pcCOTable, uint32_t cbEntry, uint32_t cEntries, uint32_t cValidEntries)
8903	{
8904	uint32_t const cCOTableCurrent = *pcCOTable;
8905
8906	if (*pcCOTable != cEntries)
8907	{
8908	/* Grow/shrink the array. */
8909	if (cEntries)
8910	{
8911	void pvNew = RTMemRealloc(ppvCOTable, cEntries * cbEntry);
8912	AssertReturn(pvNew, VERR_NO_MEMORY);
8913	*ppvCOTable = pvNew;
8914	}
8915	else
8916	{
8917	RTMemFree(*ppvCOTable);
8918	*ppvCOTable = NULL;
8919	}
8920
8921	*pcCOTable = cEntries;
8922	}
8923
8924	if (*ppvCOTable)
8925	{
8926	uint32_t const cEntriesToKeep = RT_MIN(cCOTableCurrent, cValidEntries);
8927	memset((uint8_t )(ppvCOTable) + cEntriesToKeep * cbEntry, 0, (cEntries - cEntriesToKeep) * cbEntry);
8928	}
8929
8930	return VINF_SUCCESS;
8931	}
8932
8933	static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cValidEntries)
8934	{
8935	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8936	RT_NOREF(pBackend);
8937
8938	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
8939
8940	int rc = VINF_SUCCESS;
8941
8942	/*
8943	* 1) Release current backend table, if exists;
8944	* 2) Reallocate memory for the new backend table;
8945	* 3) If cValidEntries is not zero, then re-define corresponding backend table elements.
8946	*/
8947	switch (type)
8948	{
8949	case SVGA_COTABLE_RTVIEW:
8950	/* Clear current entries. */
8951	if (pBackendDXContext->paRenderTargetView)
8952	{
8953	for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
8954	{
8955	DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
8956	if (i < cValidEntries)
8957	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8958	else
8959	dxViewDestroy(pDXView);
8960	}
8961	}
8962
8963	rc = dxCOTableRealloc((void **)&pBackendDXContext->paRenderTargetView, &pBackendDXContext->cRenderTargetView,
8964	sizeof(pBackendDXContext->paRenderTargetView[0]), pDXContext->cot.cRTView, cValidEntries);
8965	AssertRCBreak(rc);
8966
8967	for (uint32_t i = 0; i < cValidEntries; ++i)
8968	{
8969	SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[i];
8970	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8971	continue; /* Skip uninitialized entry. */
8972
8973	/* Define views which were not defined yet in backend. */
8974	DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
8975	/** @todo Verify that the pEntry content still corresponds to the view. */
8976	if (pDXView->u.pView)
8977	dxViewAddToList(pThisCC, pDXView);
8978	}
8979	break;
8980	case SVGA_COTABLE_DSVIEW:
8981	if (pBackendDXContext->paDepthStencilView)
8982	{
8983	for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
8984	{
8985	DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
8986	if (i < cValidEntries)
8987	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8988	else
8989	dxViewDestroy(pDXView);
8990	}
8991	}
8992
8993	rc = dxCOTableRealloc((void **)&pBackendDXContext->paDepthStencilView, &pBackendDXContext->cDepthStencilView,
8994	sizeof(pBackendDXContext->paDepthStencilView[0]), pDXContext->cot.cDSView, cValidEntries);
8995	AssertRCBreak(rc);
8996
8997	for (uint32_t i = 0; i < cValidEntries; ++i)
8998	{
8999	SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[i];
9000	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9001	continue; /* Skip uninitialized entry. */
9002
9003	/* Define views which were not defined yet in backend. */
9004	DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
9005	/** @todo Verify that the pEntry content still corresponds to the view. */
9006	if (pDXView->u.pView)
9007	dxViewAddToList(pThisCC, pDXView);
9008	}
9009	break;
9010	case SVGA_COTABLE_SRVIEW:
9011	if (pBackendDXContext->paShaderResourceView)
9012	{
9013	for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
9014	{
9015	/* Destroy the no longer used entries. */
9016	DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
9017	if (i < cValidEntries)
9018	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9019	else
9020	dxViewDestroy(pDXView);
9021	}
9022	}
9023
9024	rc = dxCOTableRealloc((void **)&pBackendDXContext->paShaderResourceView, &pBackendDXContext->cShaderResourceView,
9025	sizeof(pBackendDXContext->paShaderResourceView[0]), pDXContext->cot.cSRView, cValidEntries);
9026	AssertRCBreak(rc);
9027
9028	for (uint32_t i = 0; i < cValidEntries; ++i)
9029	{
9030	SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[i];
9031	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9032	continue; /* Skip uninitialized entry. */
9033
9034	DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
9035	/** @todo Verify that the pEntry content still corresponds to the view. */
9036	if (pDXView->u.pView)
9037	dxViewAddToList(pThisCC, pDXView);
9038	}
9039	break;
9040	case SVGA_COTABLE_ELEMENTLAYOUT:
9041	if (pBackendDXContext->paElementLayout)
9042	{
9043	for (uint32_t i = cValidEntries; i < pBackendDXContext->cElementLayout; ++i)
9044	D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
9045	}
9046
9047	rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
9048	sizeof(pBackendDXContext->paElementLayout[0]), pDXContext->cot.cElementLayout, cValidEntries);
9049	AssertRCBreak(rc);
9050
9051	for (uint32_t i = 0; i < cValidEntries; ++i)
9052	{
9053	SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[i];
9054	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9055	continue; /* Skip uninitialized entry. */
9056
9057	dxDefineElementLayout(pDXContext, i, pEntry);
9058	}
9059	break;
9060	case SVGA_COTABLE_BLENDSTATE:
9061	if (pBackendDXContext->papBlendState)
9062	{
9063	for (uint32_t i = cValidEntries; i < pBackendDXContext->cBlendState; ++i)
9064	D3D_RELEASE(pBackendDXContext->papBlendState[i]);
9065	}
9066
9067	rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
9068	sizeof(pBackendDXContext->papBlendState[0]), pDXContext->cot.cBlendState, cValidEntries);
9069	AssertRCBreak(rc);
9070
9071	for (uint32_t i = 0; i < cValidEntries; ++i)
9072	{
9073	SVGACOTableDXBlendStateEntry const *pEntry = &pDXContext->cot.paBlendState[i];
9074	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9075	continue; /* Skip uninitialized entry. */
9076
9077	dxDefineBlendState(pThisCC, pDXContext, i, pEntry);
9078	}
9079	break;
9080	case SVGA_COTABLE_DEPTHSTENCIL:
9081	if (pBackendDXContext->papDepthStencilState)
9082	{
9083	for (uint32_t i = cValidEntries; i < pBackendDXContext->cDepthStencilState; ++i)
9084	D3D_RELEASE(pBackendDXContext->papDepthStencilState[i]);
9085	}
9086
9087	rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
9088	sizeof(pBackendDXContext->papDepthStencilState[0]), pDXContext->cot.cDepthStencil, cValidEntries);
9089	AssertRCBreak(rc);
9090
9091	for (uint32_t i = 0; i < cValidEntries; ++i)
9092	{
9093	SVGACOTableDXDepthStencilEntry const *pEntry = &pDXContext->cot.paDepthStencil[i];
9094	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9095	continue; /* Skip uninitialized entry. */
9096
9097	dxDefineDepthStencilState(pThisCC, pDXContext, i, pEntry);
9098	}
9099	break;
9100	case SVGA_COTABLE_RASTERIZERSTATE:
9101	if (pBackendDXContext->papRasterizerState)
9102	{
9103	for (uint32_t i = cValidEntries; i < pBackendDXContext->cRasterizerState; ++i)
9104	D3D_RELEASE(pBackendDXContext->papRasterizerState[i]);
9105	}
9106
9107	rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
9108	sizeof(pBackendDXContext->papRasterizerState[0]), pDXContext->cot.cRasterizerState, cValidEntries);
9109	AssertRCBreak(rc);
9110
9111	for (uint32_t i = 0; i < cValidEntries; ++i)
9112	{
9113	SVGACOTableDXRasterizerStateEntry const *pEntry = &pDXContext->cot.paRasterizerState[i];
9114	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9115	continue; /* Skip uninitialized entry. */
9116
9117	dxDefineRasterizerState(pThisCC, pDXContext, i, pEntry);
9118	}
9119	break;
9120	case SVGA_COTABLE_SAMPLER:
9121	if (pBackendDXContext->papSamplerState)
9122	{
9123	for (uint32_t i = cValidEntries; i < pBackendDXContext->cSamplerState; ++i)
9124	D3D_RELEASE(pBackendDXContext->papSamplerState[i]);
9125	}
9126
9127	rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
9128	sizeof(pBackendDXContext->papSamplerState[0]), pDXContext->cot.cSampler, cValidEntries);
9129	AssertRCBreak(rc);
9130
9131	for (uint32_t i = 0; i < cValidEntries; ++i)
9132	{
9133	SVGACOTableDXSamplerEntry const *pEntry = &pDXContext->cot.paSampler[i];
9134	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9135	continue; /* Skip uninitialized entry. */
9136
9137	dxDefineSamplerState(pThisCC, pDXContext, i, pEntry);
9138	}
9139	break;
9140	case SVGA_COTABLE_STREAMOUTPUT:
9141	if (pBackendDXContext->paStreamOutput)
9142	{
9143	for (uint32_t i = cValidEntries; i < pBackendDXContext->cStreamOutput; ++i)
9144	dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
9145	}
9146
9147	rc = dxCOTableRealloc((void **)&pBackendDXContext->paStreamOutput, &pBackendDXContext->cStreamOutput,
9148	sizeof(pBackendDXContext->paStreamOutput[0]), pDXContext->cot.cStreamOutput, cValidEntries);
9149	AssertRCBreak(rc);
9150
9151	for (uint32_t i = 0; i < cValidEntries; ++i)
9152	{
9153	SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[i];
9154	/** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
9155	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9156	continue; /* Skip uninitialized entry. */
9157
9158	/* Reset the stream output backend data. It will be re-created when a GS shader with this streamoutput
9159	* will be set in setupPipeline.
9160	*/
9161	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[i];
9162	dxDestroyStreamOutput(pDXStreamOutput);
9163	}
9164	break;
9165	case SVGA_COTABLE_DXQUERY:
9166	if (pBackendDXContext->paQuery)
9167	{
9168	/* Destroy the no longer used entries. */
9169	for (uint32_t i = cValidEntries; i < pBackendDXContext->cQuery; ++i)
9170	dxDestroyQuery(&pBackendDXContext->paQuery[i]);
9171	}
9172
9173	rc = dxCOTableRealloc((void **)&pBackendDXContext->paQuery, &pBackendDXContext->cQuery,
9174	sizeof(pBackendDXContext->paQuery[0]), pDXContext->cot.cQuery, cValidEntries);
9175	AssertRCBreak(rc);
9176
9177	for (uint32_t i = 0; i < cValidEntries; ++i)
9178	{
9179	SVGACOTableDXQueryEntry const *pEntry = &pDXContext->cot.paQuery[i];
9180	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9181	continue; /* Skip uninitialized entry. */
9182
9183	/* Define queries which were not defined yet in backend. */
9184	DXQUERY *pDXQuery = &pBackendDXContext->paQuery[i];
9185	if ( pEntry->type != SVGA3D_QUERYTYPE_INVALID
9186	&& pDXQuery->pQuery == NULL)
9187	dxDefineQuery(pThisCC, pDXContext, i, pEntry);
9188	else
9189	Assert(pEntry->type == SVGA3D_QUERYTYPE_INVALID \|\| pDXQuery->pQuery);
9190	}
9191	break;
9192	case SVGA_COTABLE_DXSHADER:
9193	if (pBackendDXContext->paShader)
9194	{
9195	/* Destroy the no longer used entries. */
9196	for (uint32_t i = cValidEntries; i < pBackendDXContext->cShader; ++i)
9197	dxDestroyShader(&pBackendDXContext->paShader[i]);
9198	}
9199
9200	rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
9201	sizeof(pBackendDXContext->paShader[0]), pDXContext->cot.cShader, cValidEntries);
9202	AssertRCBreak(rc);
9203
9204	for (uint32_t i = 0; i < cValidEntries; ++i)
9205	{
9206	SVGACOTableDXShaderEntry const *pEntry = &pDXContext->cot.paShader[i];
9207	/** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
9208	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9209	continue; /* Skip uninitialized entry. */
9210
9211	/* Define shaders which were not defined yet in backend. */
9212	DXSHADER *pDXShader = &pBackendDXContext->paShader[i];
9213	if ( pEntry->type != SVGA3D_SHADERTYPE_INVALID
9214	&& pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
9215	dxDefineShader(pDXContext, i, pEntry);
9216	else
9217	Assert(pEntry->type == pDXShader->enmShaderType);
9218
9219	}
9220	break;
9221	case SVGA_COTABLE_UAVIEW:
9222	if (pBackendDXContext->paUnorderedAccessView)
9223	{
9224	for (uint32_t i = 0; i < pBackendDXContext->cUnorderedAccessView; ++i)
9225	{
9226	DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
9227	if (i < cValidEntries)
9228	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9229	else
9230	dxViewDestroy(pDXView);
9231	}
9232	}
9233
9234	rc = dxCOTableRealloc((void **)&pBackendDXContext->paUnorderedAccessView, &pBackendDXContext->cUnorderedAccessView,
9235	sizeof(pBackendDXContext->paUnorderedAccessView[0]), pDXContext->cot.cUAView, cValidEntries);
9236	AssertRCBreak(rc);
9237
9238	for (uint32_t i = 0; i < cValidEntries; ++i)
9239	{
9240	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[i];
9241	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9242	continue; /* Skip uninitialized entry. */
9243
9244	/* Define views which were not defined yet in backend. */
9245	DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
9246	/** @todo Verify that the pEntry content still corresponds to the view. */
9247	if (pDXView->u.pView)
9248	dxViewAddToList(pThisCC, pDXView);
9249	}
9250	break;
9251	case SVGA_COTABLE_MAX: break; /* Compiler warning */
9252	case VBSVGA_COTABLE_VIDEOPROCESSOR:
9253	if (pBackendDXContext->paVideoProcessor)
9254	{
9255	/* Destroy the no longer used entries. */
9256	for (uint32_t i = cValidEntries; i < pBackendDXContext->cVideoProcessor; ++i)
9257	dxDestroyVideoProcessor(&pBackendDXContext->paVideoProcessor[i]);
9258	}
9259
9260	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoProcessor, &pBackendDXContext->cVideoProcessor,
9261	sizeof(pBackendDXContext->paVideoProcessor[0]), pDXContext->cot.cVideoProcessor, cValidEntries);
9262	AssertRCBreak(rc);
9263
9264	for (uint32_t i = 0; i < cValidEntries; ++i)
9265	{
9266	VBSVGACOTableDXVideoProcessorEntry const *pEntry = &pDXContext->cot.paVideoProcessor[i];
9267	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9268	continue; /* Skip uninitialized entry. */
9269
9270	DXVIDEOPROCESSOR *pDXVideoProcessor = &pBackendDXContext->paVideoProcessor[i];
9271	if (pDXVideoProcessor->pVideoProcessor == NULL)
9272	dxCreateVideoProcessor(pThisCC, pDXContext, i, pEntry);
9273	}
9274	break;
9275	case VBSVGA_COTABLE_VDOV:
9276	if (pBackendDXContext->paVideoDecoderOutputView)
9277	{
9278	/* Destroy the no longer used entries. */
9279	for (uint32_t i = 0; i < pBackendDXContext->cVideoDecoderOutputView; ++i)
9280	{
9281	DXVIEW *pDXView = &pBackendDXContext->paVideoDecoderOutputView[i];
9282	if (i < cValidEntries)
9283	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9284	else
9285	dxViewDestroy(pDXView);
9286	}
9287	}
9288
9289	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoDecoderOutputView, &pBackendDXContext->cVideoDecoderOutputView,
9290	sizeof(pBackendDXContext->paVideoDecoderOutputView[0]), pDXContext->cot.cVideoDecoderOutputView, cValidEntries);
9291	AssertRCBreak(rc);
9292
9293	for (uint32_t i = 0; i < cValidEntries; ++i)
9294	{
9295	VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry = &pDXContext->cot.paVideoDecoderOutputView[i];
9296	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9297	continue; /* Skip uninitialized entry. */
9298
9299	DXVIEW *pDXView = &pBackendDXContext->paVideoDecoderOutputView[i];
9300	if (pDXView->u.pView)
9301	dxViewAddToList(pThisCC, pDXView);
9302	}
9303	break;
9304	case VBSVGA_COTABLE_VIDEODECODER:
9305	if (pBackendDXContext->paVideoDecoder)
9306	{
9307	/* Destroy the no longer used entries. */
9308	for (uint32_t i = cValidEntries; i < pBackendDXContext->cVideoDecoder; ++i)
9309	dxDestroyVideoDecoder(&pBackendDXContext->paVideoDecoder[i]);
9310	}
9311
9312	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoDecoder, &pBackendDXContext->cVideoDecoder,
9313	sizeof(pBackendDXContext->paVideoDecoder[0]), pDXContext->cot.cVideoDecoder, cValidEntries);
9314	AssertRCBreak(rc);
9315
9316	for (uint32_t i = 0; i < cValidEntries; ++i)
9317	{
9318	VBSVGACOTableDXVideoDecoderEntry const *pEntry = &pDXContext->cot.paVideoDecoder[i];
9319	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9320	continue; /* Skip uninitialized entry. */
9321
9322	DXVIDEODECODER *pDXVideoDecoder = &pBackendDXContext->paVideoDecoder[i];
9323	if (pDXVideoDecoder->pVideoDecoder == NULL)
9324	dxCreateVideoDecoder(pThisCC, pDXContext, i, pEntry);
9325	}
9326	break;
9327	case VBSVGA_COTABLE_VPIV:
9328	if (pBackendDXContext->paVideoProcessorInputView)
9329	{
9330	/* Destroy the no longer used entries. */
9331	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorInputView; ++i)
9332	{
9333	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorInputView[i];
9334	if (i < cValidEntries)
9335	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9336	else
9337	dxViewDestroy(pDXView);
9338	}
9339	}
9340
9341	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoProcessorInputView, &pBackendDXContext->cVideoProcessorInputView,
9342	sizeof(pBackendDXContext->paVideoProcessorInputView[0]), pDXContext->cot.cVideoProcessorInputView, cValidEntries);
9343	AssertRCBreak(rc);
9344
9345	for (uint32_t i = 0; i < cValidEntries; ++i)
9346	{
9347	VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorInputView[i];
9348	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9349	continue; /* Skip uninitialized entry. */
9350
9351	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorInputView[i];
9352	if (pDXView->u.pView)
9353	dxViewAddToList(pThisCC, pDXView);
9354	}
9355	break;
9356	case VBSVGA_COTABLE_VPOV:
9357	if (pBackendDXContext->paVideoProcessorOutputView)
9358	{
9359	/* Destroy the no longer used entries. */
9360	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorOutputView; ++i)
9361	{
9362	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorOutputView[i];
9363	if (i < cValidEntries)
9364	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9365	else
9366	dxViewDestroy(pDXView);
9367	}
9368	}
9369
9370	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoProcessorOutputView, &pBackendDXContext->cVideoProcessorOutputView,
9371	sizeof(pBackendDXContext->paVideoProcessorOutputView[0]), pDXContext->cot.cVideoProcessorOutputView, cValidEntries);
9372	AssertRCBreak(rc);
9373
9374	for (uint32_t i = 0; i < cValidEntries; ++i)
9375	{
9376	VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorOutputView[i];
9377	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9378	continue; /* Skip uninitialized entry. */
9379
9380	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorOutputView[i];
9381	if (pDXView->u.pView)
9382	dxViewAddToList(pThisCC, pDXView);
9383	}
9384	break;
9385	case VBSVGA_COTABLE_MAX: break; /* Compiler warning */
9386	#ifndef DEBUG_sunlover
9387	default: break; /* Compiler warning. */
9388	#endif
9389	}
9390	return rc;
9391	}
9392
9393
9394	static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9395	{
9396	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9397
9398	RT_NOREF(pBackend, pDXContext);
9399	AssertFailed(); /** @todo Implement */
9400	return VERR_NOT_IMPLEMENTED;
9401	}
9402
9403
9404	static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9405	{
9406	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9407
9408	RT_NOREF(pBackend, pDXContext);
9409	AssertFailed(); /** @todo Implement */
9410	return VERR_NOT_IMPLEMENTED;
9411	}
9412
9413
9414	static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9415	{
9416	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9417
9418	RT_NOREF(pBackend, pDXContext);
9419	AssertFailed(); /** @todo Implement */
9420	return VERR_NOT_IMPLEMENTED;
9421	}
9422
9423
9424	static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9425	{
9426	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9427
9428	RT_NOREF(pBackend, pDXContext);
9429	AssertFailed(); /** @todo Implement */
9430	return VERR_NOT_IMPLEMENTED;
9431	}
9432
9433
9434	static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9435	{
9436	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9437
9438	RT_NOREF(pBackend, pDXContext);
9439	AssertFailed(); /** @todo Implement */
9440	return VERR_NOT_IMPLEMENTED;
9441	}
9442
9443
9444	static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9445	{
9446	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9447
9448	RT_NOREF(pBackend, pDXContext);
9449	AssertFailed(); /** @todo Implement */
9450	return VERR_NOT_IMPLEMENTED;
9451	}
9452
9453
9454	static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9455	{
9456	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9457
9458	RT_NOREF(pBackend, pDXContext);
9459	AssertFailed(); /** @todo Implement */
9460	return VERR_NOT_IMPLEMENTED;
9461	}
9462
9463
9464	static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9465	{
9466	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9467
9468	RT_NOREF(pBackend, pDXContext);
9469	AssertFailed(); /** @todo Implement */
9470	return VERR_NOT_IMPLEMENTED;
9471	}
9472
9473
9474	static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceImageId const &surface, SVGA3dCopyBox const &box)
9475	{
9476	RT_NOREF(pDXContext);
9477
9478	LogFunc(("sid %u\n", surface.sid));
9479
9480	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
9481	AssertReturn(pState, VERR_INVALID_STATE);
9482
9483	PVMSVGA3DBACKEND pBackend = pState->pBackend;
9484
9485	PVMSVGA3DSURFACE pSurface;
9486	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, surface.sid, &pSurface);
9487	AssertRCReturn(rc, rc);
9488
9489	PVMSVGA3DMIPMAPLEVEL pMipLevel;
9490	rc = vmsvga3dMipmapLevel(pSurface, surface.face, surface.mipmap, &pMipLevel);
9491	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
9492
9493	/* Clip the box. */
9494	SVGA3dCopyBox clipBox = box;
9495	vmsvgaR3ClipCopyBox(&pMipLevel->mipmapSize, &pMipLevel->mipmapSize, &clipBox);
9496
9497	LogFunc(("surface%s sid = %u\n",
9498	pSurface->pBackendSurface ? "" : " sysmem", pSurface->id));
9499
9500	if (pSurface->pBackendSurface)
9501	{
9502	/* Surface -> Surface. */
9503	DXDEVICE *pDXDevice = &pBackend->dxDevice;
9504
9505	UINT DstSubresource = vmsvga3dCalcSubresource(surface.mipmap, surface.face, pSurface->cLevels);
9506	UINT DstX = clipBox.x;
9507	UINT DstY = clipBox.y;
9508	UINT DstZ = clipBox.z;
9509
9510	UINT SrcSubresource = DstSubresource;
9511	D3D11_BOX SrcBox;
9512	SrcBox.left = clipBox.srcx;
9513	SrcBox.top = clipBox.srcy;
9514	SrcBox.front = clipBox.srcz;
9515	SrcBox.right = clipBox.srcx + clipBox.w;
9516	SrcBox.bottom = clipBox.srcy + clipBox.h;
9517	SrcBox.back = clipBox.srcz + clipBox.d;
9518
9519	ID3D11Resource *pDstResource;
9520	ID3D11Resource *pSrcResource;
9521	pDstResource = dxResource(pSurface);
9522	pSrcResource = pDstResource;
9523
9524	pDXDevice->pImmediateContext->CopySubresourceRegion1(pDstResource, DstSubresource, DstX, DstY, DstZ,
9525	pSrcResource, SrcSubresource, &SrcBox, 0);
9526	}
9527	else
9528	{
9529	/* Memory -> Memory. */
9530	uint32_t const cxBlocks = (clipBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
9531	uint32_t const cyBlocks = (clipBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
9532	uint32_t const cbRow = cxBlocks * pSurface->cbBlock;
9533
9534	uint8_t const pu8Src = (uint8_t )pMipLevel->pSurfaceData
9535	+ (clipBox.srcx / pSurface->cxBlock) * pSurface->cbBlock
9536	+ (clipBox.srcy / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
9537	+ clipBox.srcz * pMipLevel->cbSurfacePlane;
9538
9539	uint8_t pu8Dst = (uint8_t )pMipLevel->pSurfaceData
9540	+ (clipBox.x / pSurface->cxBlock) * pSurface->cbBlock
9541	+ (clipBox.y / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
9542	+ clipBox.z * pMipLevel->cbSurfacePlane;
9543
9544	for (uint32_t z = 0; z < clipBox.d; ++z)
9545	{
9546	uint8_t const *pu8PlaneSrc = pu8Src;
9547	uint8_t *pu8PlaneDst = pu8Dst;
9548
9549	for (uint32_t y = 0; y < cyBlocks; ++y)
9550	{
9551	memmove(pu8PlaneDst, pu8PlaneSrc, cbRow);
9552	pu8PlaneDst += pMipLevel->cbSurfacePitch;
9553	pu8PlaneSrc += pMipLevel->cbSurfacePitch;
9554	}
9555
9556	pu8Src += pMipLevel->cbSurfacePlane;
9557	pu8Dst += pMipLevel->cbSurfacePlane;
9558	}
9559	}
9560
9561	return rc;
9562	}
9563
9564
9565	static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
9566	SVGA3dSurfaceId dstSid, uint32_t dstSubResource,
9567	SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dSurfaceFormat copyFormat)
9568	{
9569	RT_NOREF(pDXContext);
9570
9571	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
9572	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9573
9574	PVMSVGA3DSURFACE pSrcSurface;
9575	ID3D11Resource *pSrcResource;
9576	int rc = dxEnsureResource(pThisCC, srcSid, &pSrcSurface, &pSrcResource);
9577	AssertRCReturn(rc, rc);
9578
9579	PVMSVGA3DSURFACE pDstSurface;
9580	ID3D11Resource *pDstResource;
9581	rc = dxEnsureResource(pThisCC, dstSid, &pDstSurface, &pDstResource);
9582	AssertRCReturn(rc, rc);
9583
9584	LogFunc(("cid %d: src sid = %u -> dst sid = %u\n", pDXContext->cid, srcSid, dstSid));
9585
9586	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(copyFormat);
9587	pDXDevice->pImmediateContext->ResolveSubresource(pDstResource, dstSubResource, pSrcResource, srcSubResource, dxgiFormat);
9588
9589	return VINF_SUCCESS;
9590	}
9591
9592
9593	static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9594	{
9595	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9596
9597	RT_NOREF(pBackend, pDXContext);
9598	AssertFailed(); /** @todo Implement */
9599	return VERR_NOT_IMPLEMENTED;
9600	}
9601
9602
9603	static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9604	{
9605	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9606
9607	RT_NOREF(pBackend, pDXContext);
9608	AssertFailed(); /** @todo Implement */
9609	return VERR_NOT_IMPLEMENTED;
9610	}
9611
9612
9613	static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9614	{
9615	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9616
9617	RT_NOREF(pBackend, pDXContext);
9618	AssertFailed(); /** @todo Implement */
9619	return VERR_NOT_IMPLEMENTED;
9620	}
9621
9622
9623	static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9624	{
9625	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9626
9627	RT_NOREF(pBackend, pDXContext);
9628	AssertFailed(); /** @todo Implement */
9629	return VERR_NOT_IMPLEMENTED;
9630	}
9631
9632
9633	static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
9634	{
9635	/* The view is created in setupPipeline or ClearView. */
9636	RT_NOREF(pThisCC, pDXContext, uaViewId, pEntry);
9637	return VINF_SUCCESS;
9638	}
9639
9640
9641	static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId)
9642	{
9643	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9644	RT_NOREF(pBackend);
9645
9646	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9647	return dxViewDestroy(pDXView);
9648	}
9649
9650
9651	static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, uint32_t const aValues[4])
9652	{
9653	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
9654	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9655
9656	DXVIEW *pDXView;
9657	int rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, uaViewId, &pDXView);
9658	AssertRCReturn(rc, rc);
9659
9660	pDXDevice->pImmediateContext->ClearUnorderedAccessViewUint(pDXView->u.pUnorderedAccessView, aValues);
9661	return VINF_SUCCESS;
9662	}
9663
9664
9665	static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, float const aValues[4])
9666	{
9667	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
9668	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9669
9670	DXVIEW *pDXView;
9671	int rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, uaViewId, &pDXView);
9672	AssertRCReturn(rc, rc);
9673
9674	pDXDevice->pImmediateContext->ClearUnorderedAccessViewFloat(pDXView->u.pUnorderedAccessView, aValues);
9675	return VINF_SUCCESS;
9676	}
9677
9678
9679	static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId srcUAViewId, SVGA3dSurfaceId destSid, uint32_t destByteOffset)
9680	{
9681	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
9682	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9683
9684	/* Get corresponding resource. Create the buffer if does not yet exist. */
9685	ID3D11Buffer *pDstBuffer;
9686	if (destSid != SVGA3D_INVALID_ID)
9687	{
9688	PVMSVGA3DSURFACE pSurface;
9689	ID3D11Resource *pResource;
9690	int rc = dxEnsureResource(pThisCC, destSid, &pSurface, &pResource);
9691	AssertRCReturn(rc, rc);
9692	AssertReturn(pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER, VERR_INVALID_STATE);
9693
9694	pDstBuffer = (ID3D11Buffer *)pResource;
9695	}
9696	else
9697	pDstBuffer = NULL;
9698
9699	ID3D11UnorderedAccessView *pSrcView;
9700	if (srcUAViewId != SVGA3D_INVALID_ID)
9701	{
9702	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[srcUAViewId];
9703	AssertReturn(pDXView->u.pUnorderedAccessView, VERR_INVALID_STATE);
9704	pSrcView = pDXView->u.pUnorderedAccessView;
9705	}
9706	else
9707	pSrcView = NULL;
9708
9709	pDXDevice->pImmediateContext->CopyStructureCount(pDstBuffer, destByteOffset, pSrcView);
9710	return VINF_SUCCESS;
9711	}
9712
9713
9714	static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t uavSpliceIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9715	{
9716	/* Views are set in setupPipeline. */
9717	RT_NOREF(pThisCC, pDXContext, uavSpliceIndex, cUAViewId, paUAViewId);
9718	return VINF_SUCCESS;
9719	}
9720
9721
9722	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9723	{
9724	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9725	RT_NOREF(pBackend);
9726
9727	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
9728	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9729
9730	/* Get corresponding resource. Create the buffer if does not yet exist. */
9731	ID3D11Buffer *pBufferForArgs;
9732	if (argsBufferSid != SVGA_ID_INVALID)
9733	{
9734	PVMSVGA3DSURFACE pSurface;
9735	ID3D11Resource *pResource;
9736	int rc = dxEnsureResource(pThisCC, argsBufferSid, &pSurface, &pResource);
9737	AssertRCReturn(rc, rc);
9738	AssertReturn(pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER, VERR_INVALID_STATE);
9739
9740	pBufferForArgs = (ID3D11Buffer *)pResource;
9741	}
9742	else
9743	pBufferForArgs = NULL;
9744
9745	dxSetupPipeline(pThisCC, pDXContext);
9746
9747	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9748
9749	pDevice->pImmediateContext->DrawIndexedInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9750
9751	#ifdef DX_FLUSH_AFTER_DRAW
9752	dxDeviceFlush(pDevice);
9753	#endif
9754
9755	return VINF_SUCCESS;
9756	}
9757
9758
9759	static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9760	{
9761	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9762	RT_NOREF(pBackend);
9763
9764	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
9765	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9766
9767	/* Get corresponding resource. Create the buffer if does not yet exist. */
9768	ID3D11Buffer *pBufferForArgs;
9769	if (argsBufferSid != SVGA_ID_INVALID)
9770	{
9771	PVMSVGA3DSURFACE pSurface;
9772	ID3D11Resource *pResource;
9773	int rc = dxEnsureResource(pThisCC, argsBufferSid, &pSurface, &pResource);
9774	AssertRCReturn(rc, rc);
9775	AssertReturn(pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER, VERR_INVALID_STATE);
9776
9777	pBufferForArgs = (ID3D11Buffer *)pResource;
9778	}
9779	else
9780	pBufferForArgs = NULL;
9781
9782	dxSetupPipeline(pThisCC, pDXContext);
9783
9784	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9785
9786	pDevice->pImmediateContext->DrawInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9787
9788	#ifdef DX_FLUSH_AFTER_DRAW
9789	dxDeviceFlush(pDevice);
9790	#endif
9791
9792	return VINF_SUCCESS;
9793	}
9794
9795
9796	static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t threadGroupCountX, uint32_t threadGroupCountY, uint32_t threadGroupCountZ)
9797	{
9798	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9799	RT_NOREF(pBackend);
9800
9801	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
9802	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9803
9804	dxSetupPipeline(pThisCC, pDXContext);
9805
9806	pDevice->pImmediateContext->Dispatch(threadGroupCountX, threadGroupCountY, threadGroupCountZ);
9807
9808	#ifdef DX_FLUSH_AFTER_DRAW
9809	dxDeviceFlush(pDevice);
9810	#endif
9811
9812	return VINF_SUCCESS;
9813	}
9814
9815
9816	static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9817	{
9818	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9819
9820	RT_NOREF(pBackend, pDXContext);
9821	AssertFailed(); /** @todo Implement */
9822	return VERR_NOT_IMPLEMENTED;
9823	}
9824
9825
9826	static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9827	{
9828	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9829
9830	RT_NOREF(pBackend, pDXContext);
9831	AssertFailed(); /** @todo Implement */
9832	return VERR_NOT_IMPLEMENTED;
9833	}
9834
9835
9836	static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9837	{
9838	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9839
9840	RT_NOREF(pBackend, pDXContext);
9841	AssertFailed(); /** @todo Implement */
9842	return VERR_NOT_IMPLEMENTED;
9843	}
9844
9845
9846	static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9847	{
9848	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9849
9850	RT_NOREF(pBackend, pDXContext);
9851	AssertFailed(); /** @todo Implement */
9852	return VERR_NOT_IMPLEMENTED;
9853	}
9854
9855
9856	static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9857	{
9858	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9859
9860	RT_NOREF(pBackend, pDXContext);
9861	AssertFailed(); /** @todo Implement */
9862	return VERR_NOT_IMPLEMENTED;
9863	}
9864
9865
9866	static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9867	{
9868	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9869
9870	RT_NOREF(pBackend, pDXContext);
9871	AssertFailed(); /** @todo Implement */
9872	return VERR_NOT_IMPLEMENTED;
9873	}
9874
9875
9876	static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9877	{
9878	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9879
9880	RT_NOREF(pBackend, pDXContext);
9881	AssertFailed(); /** @todo Implement */
9882	return VERR_NOT_IMPLEMENTED;
9883	}
9884
9885
9886	static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9887	{
9888	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9889
9890	RT_NOREF(pBackend, pDXContext);
9891	AssertFailed(); /** @todo Implement */
9892	return VERR_NOT_IMPLEMENTED;
9893	}
9894
9895
9896	static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9897	{
9898	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9899
9900	RT_NOREF(pBackend, pDXContext);
9901	AssertFailed(); /** @todo Implement */
9902	return VERR_NOT_IMPLEMENTED;
9903	}
9904
9905
9906	static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9907	{
9908	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9909
9910	RT_NOREF(pBackend, pDXContext);
9911	AssertFailed(); /** @todo Implement */
9912	return VERR_NOT_IMPLEMENTED;
9913	}
9914
9915
9916	static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9917	{
9918	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
9919	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9920
9921	//DEBUG_BREAKPOINT_TEST();
9922	uint32_t const *pUAIds = &pDXContext->svgaDXContext.csuaViewIds[0];
9923	ID3D11UnorderedAccessView *papUnorderedAccessView[SVGA3D_DX11_1_MAX_UAVIEWS];
9924	UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
9925	for (uint32_t i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
9926	{
9927	papUnorderedAccessView[i] = NULL;
9928	aUAVInitialCounts[i] = (UINT)-1;
9929
9930	SVGA3dUAViewId const uaViewId = pUAIds[i];
9931	if (uaViewId != SVGA3D_INVALID_ID)
9932	{
9933	ASSERT_GUEST_CONTINUE(uaViewId < pDXContext->cot.cUAView);
9934
9935	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9936	Assert(pDXView->u.pUnorderedAccessView);
9937	papUnorderedAccessView[i] = pDXView->u.pUnorderedAccessView;
9938
9939	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[uaViewId];
9940	aUAVInitialCounts[i] = pEntry->structureCount;
9941	}
9942	}
9943
9944	dxCSUnorderedAccessViewSet(pDevice, 0, SVGA3D_DX11_1_MAX_UAVIEWS, papUnorderedAccessView, aUAVInitialCounts);
9945	return VINF_SUCCESS;
9946	}
9947
9948
9949	static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9950	{
9951	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9952	RT_NOREF(pBackend, pDXContext);
9953
9954	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
9955	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9956
9957	RT_NOREF(startIndex, cUAViewId, paUAViewId);
9958
9959	return VINF_SUCCESS;
9960	}
9961
9962
9963	static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9964	{
9965	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9966
9967	RT_NOREF(pBackend, pDXContext);
9968	AssertFailed(); /** @todo Implement */
9969	return VERR_NOT_IMPLEMENTED;
9970	}
9971
9972
9973	static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9974	{
9975	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9976
9977	RT_NOREF(pBackend, pDXContext);
9978	AssertFailed(); /** @todo Implement */
9979	return VERR_NOT_IMPLEMENTED;
9980	}
9981
9982
9983	static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9984	{
9985	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9986
9987	RT_NOREF(pBackend, pDXContext);
9988	AssertFailed(); /** @todo Implement */
9989	return VERR_NOT_IMPLEMENTED;
9990	}
9991
9992
9993	static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9994	{
9995	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9996
9997	RT_NOREF(pBackend, pDXContext);
9998	AssertFailed(); /** @todo Implement */
9999	return VERR_NOT_IMPLEMENTED;
10000	}
10001
10002
10003	/*
10004	*
10005	* Video decoding and processing callbacks.
10006	*
10007	*/
10008
10009	/*
10010	* Conversion between the device and D3D11 constants.
10011	*/
10012
10013	static D3D11_VIDEO_FRAME_FORMAT dxVideoFrameFormat(VBSVGA3dVideoFrameFormat FrameFormat)
10014	{
10015	switch (FrameFormat)
10016	{
10017	case VBSVGA3D_VIDEO_FRAME_FORMAT_PROGRESSIVE: return D3D11_VIDEO_FRAME_FORMAT_PROGRESSIVE;
10018	case VBSVGA3D_VIDEO_FRAME_FORMAT_INTERLACED_TOP_FIELD_FIRST: return D3D11_VIDEO_FRAME_FORMAT_INTERLACED_TOP_FIELD_FIRST;
10019	case VBSVGA3D_VIDEO_FRAME_FORMAT_INTERLACED_BOTTOM_FIELD_FIRST: return D3D11_VIDEO_FRAME_FORMAT_INTERLACED_BOTTOM_FIELD_FIRST;
10020	default:
10021	ASSERT_GUEST_FAILED();
10022	break;
10023	}
10024	return D3D11_VIDEO_FRAME_FORMAT_PROGRESSIVE;
10025	}
10026
10027
10028	static D3D11_VIDEO_USAGE dxVideoUsage(VBSVGA3dVideoUsage Usage)
10029	{
10030	switch (Usage)
10031	{
10032	case VBSVGA3D_VIDEO_USAGE_PLAYBACK_NORMAL: return D3D11_VIDEO_USAGE_PLAYBACK_NORMAL;
10033	case VBSVGA3D_VIDEO_USAGE_OPTIMAL_SPEED: return D3D11_VIDEO_USAGE_OPTIMAL_SPEED;
10034	case VBSVGA3D_VIDEO_USAGE_OPTIMAL_QUALITY: return D3D11_VIDEO_USAGE_OPTIMAL_QUALITY;
10035	default:
10036	ASSERT_GUEST_FAILED();
10037	break;
10038	}
10039	return D3D11_VIDEO_USAGE_PLAYBACK_NORMAL;
10040	}
10041
10042
10043	static D3D11_VDOV_DIMENSION dxVDOVDimension(VBSVGA3dVDOVDimension ViewDimension)
10044	{
10045	switch (ViewDimension)
10046	{
10047	case VBSVGA3D_VDOV_DIMENSION_UNKNOWN: return D3D11_VDOV_DIMENSION_UNKNOWN;
10048	case VBSVGA3D_VDOV_DIMENSION_TEXTURE2D: return D3D11_VDOV_DIMENSION_TEXTURE2D;
10049	default:
10050	ASSERT_GUEST_FAILED();
10051	break;
10052	}
10053	return D3D11_VDOV_DIMENSION_UNKNOWN;
10054	}
10055
10056
10057	static D3D11_VPIV_DIMENSION dxVPIVDimension(VBSVGA3dVPIVDimension ViewDimension)
10058	{
10059	switch (ViewDimension)
10060	{
10061	case VBSVGA3D_VPIV_DIMENSION_UNKNOWN: return D3D11_VPIV_DIMENSION_UNKNOWN;
10062	case VBSVGA3D_VPIV_DIMENSION_TEXTURE2D: return D3D11_VPIV_DIMENSION_TEXTURE2D;
10063	default:
10064	ASSERT_GUEST_FAILED();
10065	break;
10066	}
10067	return D3D11_VPIV_DIMENSION_UNKNOWN;
10068	}
10069
10070
10071	static D3D11_VPOV_DIMENSION dxVPOVDimension(VBSVGA3dVPOVDimension ViewDimension)
10072	{
10073	switch (ViewDimension)
10074	{
10075	case VBSVGA3D_VPOV_DIMENSION_UNKNOWN: return D3D11_VPOV_DIMENSION_UNKNOWN;
10076	case VBSVGA3D_VPOV_DIMENSION_TEXTURE2D: return D3D11_VPOV_DIMENSION_TEXTURE2D;
10077	case VBSVGA3D_VPOV_DIMENSION_TEXTURE2DARRAY: return D3D11_VPOV_DIMENSION_TEXTURE2DARRAY;
10078	default:
10079	ASSERT_GUEST_FAILED();
10080	break;
10081	}
10082	return D3D11_VPOV_DIMENSION_UNKNOWN;
10083	}
10084
10085
10086	static D3D11_VIDEO_DECODER_BUFFER_TYPE dxVideoDecoderBufferType(VBSVGA3dVideoDecoderBufferType BufferType)
10087	{
10088	switch (BufferType)
10089	{
10090	case VBSVGA3D_VD_BUFFER_PICTURE_PARAMETERS: return D3D11_VIDEO_DECODER_BUFFER_PICTURE_PARAMETERS;
10091	case VBSVGA3D_VD_BUFFER_MACROBLOCK_CONTROL: return D3D11_VIDEO_DECODER_BUFFER_MACROBLOCK_CONTROL;
10092	case VBSVGA3D_VD_BUFFER_RESIDUAL_DIFFERENCE: return D3D11_VIDEO_DECODER_BUFFER_RESIDUAL_DIFFERENCE;
10093	case VBSVGA3D_VD_BUFFER_DEBLOCKING_CONTROL: return D3D11_VIDEO_DECODER_BUFFER_DEBLOCKING_CONTROL;
10094	case VBSVGA3D_VD_BUFFER_INVERSE_QUANTIZATION_MATRIX: return D3D11_VIDEO_DECODER_BUFFER_INVERSE_QUANTIZATION_MATRIX;
10095	case VBSVGA3D_VD_BUFFER_SLICE_CONTROL: return D3D11_VIDEO_DECODER_BUFFER_SLICE_CONTROL;
10096	case VBSVGA3D_VD_BUFFER_BITSTREAM: return D3D11_VIDEO_DECODER_BUFFER_BITSTREAM;
10097	case VBSVGA3D_VD_BUFFER_MOTION_VECTOR: return D3D11_VIDEO_DECODER_BUFFER_MOTION_VECTOR;
10098	case VBSVGA3D_VD_BUFFER_FILM_GRAIN: return D3D11_VIDEO_DECODER_BUFFER_FILM_GRAIN;
10099	default:
10100	ASSERT_GUEST_FAILED();
10101	break;
10102	}
10103	return D3D11_VIDEO_DECODER_BUFFER_BITSTREAM;
10104	}
10105
10106
10107	/*
10108	* D3D11 wrappers.
10109	*/
10110
10111	static void dxVideoProcessorSetOutputTargetRect(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint8 enable, SVGASignedRect const &outputRect)
10112	{
10113	RECT OutputRect;
10114	OutputRect.left = outputRect.left;
10115	OutputRect.top = outputRect.top;
10116	OutputRect.right = outputRect.right;
10117	OutputRect.bottom = outputRect.bottom;
10118
10119	pDXDevice->pVideoContext->VideoProcessorSetOutputTargetRect(pDXVideoProcessor->pVideoProcessor, RT_BOOL(enable), &OutputRect);
10120	}
10121
10122
10123	static void dxVideoProcessorSetOutputBackgroundColor(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 YCbCr, VBSVGA3dVideoColor const &color)
10124	{
10125	D3D11_VIDEO_COLOR Color;
10126	Color.RGBA.R = color.r;
10127	Color.RGBA.G = color.g;
10128	Color.RGBA.B = color.b;
10129	Color.RGBA.A = color.a;
10130
10131	pDXDevice->pVideoContext->VideoProcessorSetOutputBackgroundColor(pDXVideoProcessor->pVideoProcessor, RT_BOOL(YCbCr), &Color);
10132	}
10133
10134
10135	static void dxVideoProcessorSetOutputColorSpace(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, VBSVGA3dVideoProcessorColorSpace const &colorSpace)
10136	{
10137	D3D11_VIDEO_PROCESSOR_COLOR_SPACE ColorSpace;
10138	ColorSpace.Usage = colorSpace.Usage;
10139	ColorSpace.RGB_Range = colorSpace.RGB_Range;
10140	ColorSpace.YCbCr_Matrix = colorSpace.YCbCr_Matrix;
10141	ColorSpace.YCbCr_xvYCC = colorSpace.YCbCr_xvYCC;
10142	ColorSpace.Nominal_Range = colorSpace.Nominal_Range;
10143	ColorSpace.Reserved = colorSpace.Reserved;
10144
10145	pDXDevice->pVideoContext->VideoProcessorSetOutputColorSpace(pDXVideoProcessor->pVideoProcessor, &ColorSpace);
10146	}
10147
10148
10149	static void dxVideoProcessorSetOutputAlphaFillMode(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, VBSVGA3dVideoProcessorAlphaFillMode fillMode, uint32 streamIndex)
10150	{
10151	D3D11_VIDEO_PROCESSOR_ALPHA_FILL_MODE AlphaFillMode = (D3D11_VIDEO_PROCESSOR_ALPHA_FILL_MODE)fillMode;
10152
10153	pDXDevice->pVideoContext->VideoProcessorSetOutputAlphaFillMode(pDXVideoProcessor->pVideoProcessor, AlphaFillMode, streamIndex);
10154	}
10155
10156
10157	static void dxVideoProcessorSetOutputConstriction(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 enable, uint32 width, uint32 height)
10158	{
10159	SIZE Size;
10160	Size.cx = width;
10161	Size.cy = height;
10162
10163	pDXDevice->pVideoContext->VideoProcessorSetOutputConstriction(pDXVideoProcessor->pVideoProcessor, RT_BOOL(enable), Size);
10164	}
10165
10166
10167	static void dxVideoProcessorSetOutputStereoMode(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 enable)
10168	{
10169	pDXDevice->pVideoContext->VideoProcessorSetOutputStereoMode(pDXVideoProcessor->pVideoProcessor, RT_BOOL(enable));
10170	}
10171
10172
10173	static void dxVideoProcessorSetStreamFrameFormat(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 streamIndex, VBSVGA3dVideoFrameFormat format)
10174	{
10175	D3D11_VIDEO_FRAME_FORMAT FrameFormat = (D3D11_VIDEO_FRAME_FORMAT)format;
10176
10177	pDXDevice->pVideoContext->VideoProcessorSetStreamFrameFormat(pDXVideoProcessor->pVideoProcessor, streamIndex, FrameFormat);
10178	}
10179
10180
10181	static void dxVideoProcessorSetStreamColorSpace(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 streamIndex, VBSVGA3dVideoProcessorColorSpace colorSpace)
10182	{
10183	D3D11_VIDEO_PROCESSOR_COLOR_SPACE ColorSpace;
10184	ColorSpace.Usage = colorSpace.Usage;
10185	ColorSpace.RGB_Range = colorSpace.RGB_Range;
10186	ColorSpace.YCbCr_Matrix = colorSpace.YCbCr_Matrix;
10187	ColorSpace.YCbCr_xvYCC = colorSpace.YCbCr_xvYCC;
10188	ColorSpace.Nominal_Range = colorSpace.Nominal_Range;
10189	ColorSpace.Reserved = colorSpace.Reserved;
10190
10191	pDXDevice->pVideoContext->VideoProcessorSetStreamColorSpace(pDXVideoProcessor->pVideoProcessor, streamIndex, &ColorSpace);
10192	}
10193
10194
10195	static void dxVideoProcessorSetStreamOutputRate(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10196	uint32 streamIndex, VBSVGA3dVideoProcessorOutputRate outputRate, uint32 repeatFrame, SVGA3dFraction64 const &customRate)
10197	{
10198	D3D11_VIDEO_PROCESSOR_OUTPUT_RATE OutputRate = (D3D11_VIDEO_PROCESSOR_OUTPUT_RATE)outputRate;
10199	DXGI_RATIONAL CustomRate;
10200	CustomRate.Numerator = customRate.numerator;
10201	CustomRate.Denominator = customRate.denominator;
10202
10203	pDXDevice->pVideoContext->VideoProcessorSetStreamOutputRate(pDXVideoProcessor->pVideoProcessor, streamIndex, OutputRate, RT_BOOL(repeatFrame), &CustomRate);
10204	}
10205
10206
10207	static void dxVideoProcessorSetStreamSourceRect(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10208	uint32 streamIndex, uint32 enable, SVGASignedRect const &sourceRect)
10209	{
10210	RECT Rect;
10211	Rect.left = sourceRect.left;
10212	Rect.top = sourceRect.top;
10213	Rect.right = sourceRect.right;
10214	Rect.bottom = sourceRect.bottom;
10215
10216	pDXDevice->pVideoContext->VideoProcessorSetStreamSourceRect(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), &Rect);
10217	}
10218
10219
10220	static void dxVideoProcessorSetStreamDestRect(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10221	uint32 streamIndex, uint32 enable, SVGASignedRect const &destRect)
10222	{
10223	RECT Rect;
10224	Rect.left = destRect.left;
10225	Rect.top = destRect.top;
10226	Rect.right = destRect.right;
10227	Rect.bottom = destRect.bottom;
10228
10229	pDXDevice->pVideoContext->VideoProcessorSetStreamDestRect(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), &Rect);
10230	}
10231
10232
10233	static void dxVideoProcessorSetStreamAlpha(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10234	uint32 streamIndex, uint32 enable, float alpha)
10235	{
10236	pDXDevice->pVideoContext->VideoProcessorSetStreamAlpha(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), alpha);
10237	}
10238
10239
10240	static void dxVideoProcessorSetStreamPalette(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10241	uint32 streamIndex, uint32_t cEntries, uint32_t const *paEntries)
10242	{
10243	pDXDevice->pVideoContext->VideoProcessorSetStreamPalette(pDXVideoProcessor->pVideoProcessor, streamIndex, cEntries, paEntries);
10244	}
10245
10246
10247	static void dxVideoProcessorSetStreamPixelAspectRatio(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10248	uint32 streamIndex, uint32 enable, SVGA3dFraction64 const &sourceRatio, SVGA3dFraction64 const &destRatio)
10249	{
10250	DXGI_RATIONAL SourceAspectRatio;
10251	SourceAspectRatio.Numerator = sourceRatio.numerator;
10252	SourceAspectRatio.Denominator = sourceRatio.denominator;
10253
10254	DXGI_RATIONAL DestinationAspectRatio;
10255	DestinationAspectRatio.Numerator = destRatio.numerator;
10256	DestinationAspectRatio.Denominator = destRatio.denominator;
10257
10258	pDXDevice->pVideoContext->VideoProcessorSetStreamPixelAspectRatio(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), &SourceAspectRatio, &DestinationAspectRatio);
10259	}
10260
10261
10262	static void dxVideoProcessorSetStreamLumaKey(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10263	uint32 streamIndex, uint32 enable, float lower, float upper)
10264	{
10265	pDXDevice->pVideoContext->VideoProcessorSetStreamLumaKey(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), lower, upper);
10266	}
10267
10268
10269	static void dxVideoProcessorSetStreamStereoFormat(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10270	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorStereoFormat stereoFormat,
10271	uint8 leftViewFrame0, uint8 baseViewFrame0, VBSVGA3dVideoProcessorStereoFlipMode flipMode, int32 monoOffset)
10272	{
10273	D3D11_VIDEO_PROCESSOR_STEREO_FORMAT Format = (D3D11_VIDEO_PROCESSOR_STEREO_FORMAT)stereoFormat;
10274	D3D11_VIDEO_PROCESSOR_STEREO_FLIP_MODE FlipMode = (D3D11_VIDEO_PROCESSOR_STEREO_FLIP_MODE)flipMode;
10275
10276	pDXDevice->pVideoContext->VideoProcessorSetStreamStereoFormat(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), Format, RT_BOOL(leftViewFrame0), RT_BOOL(baseViewFrame0), FlipMode, monoOffset);
10277	}
10278
10279
10280	static void dxVideoProcessorSetStreamAutoProcessingMode(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10281	uint32 streamIndex, uint32 enable)
10282	{
10283	pDXDevice->pVideoContext->VideoProcessorSetStreamAutoProcessingMode(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable));
10284	}
10285
10286
10287	static void dxVideoProcessorSetStreamFilter(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10288	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorFilter filter, int32 level)
10289	{
10290	D3D11_VIDEO_PROCESSOR_FILTER Filter = (D3D11_VIDEO_PROCESSOR_FILTER)filter;
10291
10292	pDXDevice->pVideoContext->VideoProcessorSetStreamFilter(pDXVideoProcessor->pVideoProcessor, streamIndex, Filter, RT_BOOL(enable), level);
10293	}
10294
10295
10296	static void dxVideoProcessorSetStreamRotation(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10297	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorRotation rotation)
10298	{
10299	D3D11_VIDEO_PROCESSOR_ROTATION Rotation = (D3D11_VIDEO_PROCESSOR_ROTATION)rotation;
10300
10301	pDXDevice->pVideoContext->VideoProcessorSetStreamRotation(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), Rotation);
10302	}
10303
10304
10305	static int dxCreateVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId, VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry)
10306	{
10307	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10308	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10309
10310	PVMSVGA3DSURFACE pSurface;
10311	ID3D11Resource *pResource;
10312	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
10313	AssertRCReturn(rc, rc);
10314
10315	DXVIEW *pView = &pDXContext->pBackendDXContext->paVideoDecoderOutputView[videoDecoderOutputViewId];
10316	Assert(pView->u.pView == NULL);
10317
10318	D3D11_VIDEO_DECODER_OUTPUT_VIEW_DESC Desc;
10319	RT_ZERO(Desc);
10320	memcpy(&Desc.DecodeProfile, &pEntry->desc.DecodeProfile, sizeof(GUID));
10321	Desc.ViewDimension = dxVDOVDimension(pEntry->desc.ViewDimension);
10322	Desc.Texture2D.ArraySlice = pEntry->desc.Texture2D.ArraySlice;
10323
10324	ID3D11VideoDecoderOutputView *pVDOView;
10325	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoDecoderOutputView(pResource, &Desc, &pVDOView);
10326	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10327
10328	return dxViewInit(pView, pSurface, pDXContext, videoDecoderOutputViewId, VMSVGA3D_VIEWTYPE_VIDEODECODEROUTPUT, pVDOView);
10329	}
10330
10331
10332	static int dxCreateVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId videoProcessorInputViewId, VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry)
10333	{
10334	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10335	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10336
10337	PVMSVGA3DSURFACE pSurface;
10338	ID3D11Resource *pResource;
10339	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
10340	AssertRCReturn(rc, rc);
10341
10342	DXVIEW *pView = &pDXContext->pBackendDXContext->paVideoProcessorInputView[videoProcessorInputViewId];
10343	Assert(pView->u.pView == NULL);
10344
10345	D3D11_VIDEO_PROCESSOR_CONTENT_DESC ContentDesc;
10346	RT_ZERO(ContentDesc);
10347	ContentDesc.InputFrameFormat = dxVideoFrameFormat(pEntry->contentDesc.InputFrameFormat);
10348	ContentDesc.InputFrameRate.Numerator = pEntry->contentDesc.InputFrameRate.numerator;
10349	ContentDesc.InputFrameRate.Denominator = pEntry->contentDesc.InputFrameRate.denominator;
10350	ContentDesc.InputWidth = pEntry->contentDesc.InputWidth;
10351	ContentDesc.InputHeight = pEntry->contentDesc.InputHeight;
10352	ContentDesc.OutputFrameRate.Numerator = pEntry->contentDesc.OutputFrameRate.numerator;
10353	ContentDesc.OutputFrameRate.Denominator = pEntry->contentDesc.OutputFrameRate.denominator;
10354	ContentDesc.OutputWidth = pEntry->contentDesc.OutputWidth;
10355	ContentDesc.OutputHeight = pEntry->contentDesc.OutputHeight;
10356	ContentDesc.Usage = dxVideoUsage(pEntry->contentDesc.Usage);
10357
10358	ID3D11VideoProcessorEnumerator *pEnum;
10359	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&ContentDesc, &pEnum);
10360	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10361
10362	D3D11_VIDEO_PROCESSOR_INPUT_VIEW_DESC Desc;
10363	RT_ZERO(Desc);
10364	Desc.FourCC = pEntry->desc.FourCC;
10365	Desc.ViewDimension = dxVPIVDimension(pEntry->desc.ViewDimension);
10366	Desc.Texture2D.MipSlice = pEntry->desc.Texture2D.MipSlice;
10367	Desc.Texture2D.ArraySlice = pEntry->desc.Texture2D.ArraySlice;
10368
10369	ID3D11VideoProcessorInputView *pVPIView;
10370	hr = pDXDevice->pVideoDevice->CreateVideoProcessorInputView(pResource, pEnum, &Desc, &pVPIView);
10371	D3D_RELEASE(pEnum);
10372	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10373
10374	return dxViewInit(pView, pSurface, pDXContext, videoProcessorInputViewId, VMSVGA3D_VIEWTYPE_VIDEOPROCESSORINPUT, pVPIView);
10375	}
10376
10377
10378	static int dxCreateVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId, VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry)
10379	{
10380	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10381	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10382
10383	PVMSVGA3DSURFACE pSurface;
10384	ID3D11Resource *pResource;
10385	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
10386	AssertRCReturn(rc, rc);
10387
10388	DXVIEW *pView = &pDXContext->pBackendDXContext->paVideoProcessorOutputView[videoProcessorOutputViewId];
10389	Assert(pView->u.pView == NULL);
10390
10391	D3D11_VIDEO_PROCESSOR_CONTENT_DESC ContentDesc;
10392	RT_ZERO(ContentDesc);
10393	ContentDesc.InputFrameFormat = dxVideoFrameFormat(pEntry->contentDesc.InputFrameFormat);
10394	ContentDesc.InputFrameRate.Numerator = pEntry->contentDesc.InputFrameRate.numerator;
10395	ContentDesc.InputFrameRate.Denominator = pEntry->contentDesc.InputFrameRate.denominator;
10396	ContentDesc.InputWidth = pEntry->contentDesc.InputWidth;
10397	ContentDesc.InputHeight = pEntry->contentDesc.InputHeight;
10398	ContentDesc.OutputFrameRate.Numerator = pEntry->contentDesc.OutputFrameRate.numerator;
10399	ContentDesc.OutputFrameRate.Denominator = pEntry->contentDesc.OutputFrameRate.denominator;
10400	ContentDesc.OutputWidth = pEntry->contentDesc.OutputWidth;
10401	ContentDesc.OutputHeight = pEntry->contentDesc.OutputHeight;
10402	ContentDesc.Usage = dxVideoUsage(pEntry->contentDesc.Usage);
10403
10404	ID3D11VideoProcessorEnumerator *pEnum;
10405	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&ContentDesc, &pEnum);
10406	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10407
10408	D3D11_VIDEO_PROCESSOR_OUTPUT_VIEW_DESC Desc;
10409	RT_ZERO(Desc);
10410	Desc.ViewDimension = dxVPOVDimension(pEntry->desc.ViewDimension);
10411	if (Desc.ViewDimension == D3D11_VPOV_DIMENSION_TEXTURE2D)
10412	{
10413	Desc.Texture2D.MipSlice = pEntry->desc.Texture2D.MipSlice;
10414	}
10415	else if (Desc.ViewDimension == D3D11_VPOV_DIMENSION_TEXTURE2DARRAY)
10416	{
10417	Desc.Texture2DArray.MipSlice = pEntry->desc.Texture2DArray.MipSlice;
10418	Desc.Texture2DArray.FirstArraySlice = pEntry->desc.Texture2DArray.FirstArraySlice;
10419	Desc.Texture2DArray.ArraySize = pEntry->desc.Texture2DArray.ArraySize;
10420	}
10421
10422	ID3D11VideoProcessorOutputView *pVPOView;
10423	hr = pDXDevice->pVideoDevice->CreateVideoProcessorOutputView(pResource, pEnum, &Desc, &pVPOView);
10424	D3D_RELEASE(pEnum);
10425	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10426
10427	return dxViewInit(pView, pSurface, pDXContext, videoProcessorOutputViewId, VMSVGA3D_VIEWTYPE_VIDEOPROCESSOROUTPUT, pVPOView);
10428	}
10429
10430
10431	static int dxEnsureVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId viewId, DXVIEW **ppResult)
10432	{
10433	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cVideoDecoderOutputView, VERR_INVALID_PARAMETER);
10434
10435	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoDecoderOutputView[viewId];
10436	if (!pDXView->u.pView)
10437	{
10438	VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry = &pDXContext->cot.paVideoDecoderOutputView[viewId];
10439	int rc = dxCreateVideoDecoderOutputView(pThisCC, pDXContext, viewId, pEntry);
10440	AssertRCReturn(rc, rc);
10441	}
10442	*ppResult = pDXView;
10443	return VINF_SUCCESS;
10444	}
10445
10446
10447	static int dxEnsureVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId viewId, DXVIEW **ppResult)
10448	{
10449	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cVideoProcessorInputView, VERR_INVALID_PARAMETER);
10450
10451	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorInputView[viewId];
10452	if (!pDXView->u.pView)
10453	{
10454	VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorInputView[viewId];
10455	int rc = dxCreateVideoProcessorInputView(pThisCC, pDXContext, viewId, pEntry);
10456	AssertRCReturn(rc, rc);
10457	}
10458	*ppResult = pDXView;
10459	return VINF_SUCCESS;
10460	}
10461
10462
10463	static int dxEnsureVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId viewId, DXVIEW **ppResult)
10464	{
10465	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cVideoProcessorOutputView, VERR_INVALID_PARAMETER);
10466
10467	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorOutputView[viewId];
10468	if (!pDXView->u.pView)
10469	{
10470	VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorOutputView[viewId];
10471	int rc = dxCreateVideoProcessorOutputView(pThisCC, pDXContext, viewId, pEntry);
10472	AssertRCReturn(rc, rc);
10473	}
10474	*ppResult = pDXView;
10475	return VINF_SUCCESS;
10476	}
10477
10478
10479	static int dxVideoDecoderBeginFrame(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
10480	VBSVGA3dVideoDecoderId videoDecoderId,
10481	VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId)
10482	{
10483	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10484	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10485
10486	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10487
10488	DXVIEW *pDXView;
10489	int rc = dxEnsureVideoDecoderOutputView(pThisCC, pDXContext, videoDecoderOutputViewId, &pDXView);
10490	AssertRCReturn(rc, rc);
10491
10492	HRESULT hr = pDXDevice->pVideoContext->DecoderBeginFrame(pDXVideoDecoder->pVideoDecoder,
10493	pDXView->u.pVideoDecoderOutputView,
10494	0, NULL);
10495	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10496
10497	return VINF_SUCCESS;
10498	}
10499
10500
10501	static void dxSetupVideoProcessor(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, VBSVGACOTableDXVideoProcessorEntry const *pEntry)
10502	{
10503	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_TARGET_RECT)
10504	dxVideoProcessorSetOutputTargetRect(pDXDevice, pDXVideoProcessor, pEntry->output.TargetRectEnable, pEntry->output.TargetRect);
10505
10506	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_BACKGROUND_COLOR)
10507	dxVideoProcessorSetOutputBackgroundColor(pDXDevice, pDXVideoProcessor, pEntry->output.BackgroundColorYCbCr, pEntry->output.BackgroundColor);
10508
10509	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_COLOR_SPACE)
10510	dxVideoProcessorSetOutputColorSpace(pDXDevice, pDXVideoProcessor, pEntry->output.ColorSpace);
10511
10512	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_ALPHA_FILL_MODE)
10513	dxVideoProcessorSetOutputAlphaFillMode(pDXDevice, pDXVideoProcessor, pEntry->output.AlphaFillMode, pEntry->output.AlphaFillStreamIndex);
10514
10515	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_CONSTRICTION)
10516	dxVideoProcessorSetOutputConstriction(pDXDevice, pDXVideoProcessor, pEntry->output.ConstrictionEnable, pEntry->output.ConstrictionWidth, pEntry->output.ConstrictionHeight);
10517
10518	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_STEREO_MODE)
10519	dxVideoProcessorSetOutputStereoMode(pDXDevice, pDXVideoProcessor, pEntry->output.StereoModeEnable);
10520
10521	for (uint32_t i = 0; i < RT_ELEMENTS(pEntry->aStreamState); ++i)
10522	{
10523	VBSVGA3dVideoProcessorStreamState const *pStreamState = &pEntry->aStreamState[i];
10524	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_FRAME_FORMAT)
10525	dxVideoProcessorSetStreamFrameFormat(pDXDevice, pDXVideoProcessor, i, pStreamState->FrameFormat);
10526
10527	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_COLOR_SPACE)
10528	dxVideoProcessorSetStreamColorSpace(pDXDevice, pDXVideoProcessor, i, pStreamState->ColorSpace);
10529
10530	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_OUTPUT_RATE)
10531	dxVideoProcessorSetStreamOutputRate(pDXDevice, pDXVideoProcessor, i, pStreamState->OutputRate, pStreamState->RepeatFrame, pStreamState->CustomRate);
10532
10533	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_SOURCE_RECT)
10534	dxVideoProcessorSetStreamSourceRect(pDXDevice, pDXVideoProcessor, i, pStreamState->SourceRectEnable, pStreamState->SourceRect);
10535
10536	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_DEST_RECT)
10537	dxVideoProcessorSetStreamDestRect(pDXDevice, pDXVideoProcessor, i, pStreamState->DestRectEnable, pStreamState->DestRect);
10538
10539	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_ALPHA)
10540	dxVideoProcessorSetStreamAlpha(pDXDevice, pDXVideoProcessor, i, pStreamState->AlphaEnable, pStreamState->Alpha);
10541
10542	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_PALETTE)
10543	dxVideoProcessorSetStreamPalette(pDXDevice, pDXVideoProcessor, i, pStreamState->PaletteCount, &pStreamState->aPalette[0]);\
10544
10545	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_ASPECT_RATIO)
10546	dxVideoProcessorSetStreamPixelAspectRatio(pDXDevice, pDXVideoProcessor, i, pStreamState->AspectRatioEnable, pStreamState->AspectSourceRatio, pStreamState->AspectDestRatio);
10547
10548	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_LUMA_KEY)
10549	dxVideoProcessorSetStreamLumaKey(pDXDevice, pDXVideoProcessor, i, pStreamState->LumaKeyEnable, pStreamState->LumaKeyLower, pStreamState->LumaKeyUpper);
10550
10551	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_STEREO_FORMAT)
10552	dxVideoProcessorSetStreamStereoFormat(pDXDevice, pDXVideoProcessor, i, pStreamState->StereoFormatEnable, pStreamState->StereoFormat,
10553	pStreamState->LeftViewFrame0, pStreamState->BaseViewFrame0, pStreamState->FlipMode, pStreamState->MonoOffset);
10554
10555	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_AUTO_PROCESSING_MODE)
10556	dxVideoProcessorSetStreamAutoProcessingMode(pDXDevice, pDXVideoProcessor, i, pStreamState->AutoProcessingModeEnable);
10557
10558	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_FILTER)
10559	{
10560	for (uint32_t idxFilter = 0; idxFilter < VBSVGA3D_VP_MAX_FILTER_COUNT; ++idxFilter)
10561	{
10562	uint32_t const enable = pStreamState->FilterEnableMask & ~(1 << idxFilter);
10563	int32 const level = pStreamState->aFilter[idxFilter].Level;
10564	dxVideoProcessorSetStreamFilter(pDXDevice, pDXVideoProcessor, i, enable, (VBSVGA3dVideoProcessorFilter)idxFilter, level);
10565	}
10566	}
10567
10568	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_ROTATION)
10569	dxVideoProcessorSetStreamRotation(pDXDevice, pDXVideoProcessor, i, pStreamState->RotationEnable, pStreamState->Rotation);
10570	}
10571	}
10572
10573
10574	static int dxCreateVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGACOTableDXVideoProcessorEntry const *pEntry)
10575	{
10576	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10577	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10578
10579	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10580
10581	D3D11_VIDEO_PROCESSOR_CONTENT_DESC Desc;
10582	RT_ZERO(Desc);
10583	Desc.InputFrameFormat = dxVideoFrameFormat(pEntry->desc.InputFrameFormat);
10584	Desc.InputFrameRate.Numerator = pEntry->desc.InputFrameRate.numerator;
10585	Desc.InputFrameRate.Denominator = pEntry->desc.InputFrameRate.denominator;
10586	Desc.InputWidth = pEntry->desc.InputWidth;
10587	Desc.InputHeight = pEntry->desc.InputHeight;
10588	Desc.OutputFrameRate.Numerator = pEntry->desc.OutputFrameRate.numerator;
10589	Desc.OutputFrameRate.Denominator = pEntry->desc.OutputFrameRate.denominator;
10590	Desc.OutputWidth = pEntry->desc.OutputWidth;
10591	Desc.OutputHeight = pEntry->desc.OutputHeight;
10592	Desc.Usage = dxVideoUsage(pEntry->desc.Usage);
10593
10594	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&Desc, &pDXVideoProcessor->pEnum);
10595	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10596
10597	hr = pDXDevice->pVideoDevice->CreateVideoProcessor(pDXVideoProcessor->pEnum, 0, &pDXVideoProcessor->pVideoProcessor);
10598	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10599
10600	dxSetupVideoProcessor(pDXDevice, pDXVideoProcessor, pEntry);
10601	return VINF_SUCCESS;
10602	}
10603
10604
10605	static void dxDestroyVideoProcessor(DXVIDEOPROCESSOR *pDXVideoProcessor)
10606	{
10607	D3D_RELEASE(pDXVideoProcessor->pEnum);
10608	D3D_RELEASE(pDXVideoProcessor->pVideoProcessor);
10609	}
10610
10611
10612	static int dxCreateVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGACOTableDXVideoDecoderEntry const *pEntry)
10613	{
10614	HRESULT hr;
10615
10616	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10617	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10618
10619	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10620
10621	D3D11_VIDEO_DECODER_DESC VideoDesc;
10622	RT_ZERO(VideoDesc);
10623	memcpy(&VideoDesc.Guid, &pEntry->desc.DecodeProfile, sizeof(GUID));
10624	VideoDesc.SampleWidth = pEntry->desc.SampleWidth;
10625	VideoDesc.SampleHeight = pEntry->desc.SampleHeight;
10626	VideoDesc.OutputFormat = vmsvgaDXSurfaceFormat2Dxgi(pEntry->desc.OutputFormat);
10627
10628	D3D11_VIDEO_DECODER_CONFIG Config;
10629	RT_ZERO(Config);
10630	memcpy(&Config.guidConfigBitstreamEncryption, &pEntry->config.guidConfigBitstreamEncryption, sizeof(GUID));
10631	memcpy(&Config.guidConfigMBcontrolEncryption, &pEntry->config.guidConfigMBcontrolEncryption, sizeof(GUID));
10632	memcpy(&Config.guidConfigResidDiffEncryption, &pEntry->config.guidConfigResidDiffEncryption, sizeof(GUID));
10633	Config.ConfigBitstreamRaw = pEntry->config.ConfigBitstreamRaw;
10634	Config.ConfigMBcontrolRasterOrder = pEntry->config.ConfigMBcontrolRasterOrder;
10635	Config.ConfigResidDiffHost = pEntry->config.ConfigResidDiffHost;
10636	Config.ConfigSpatialResid8 = pEntry->config.ConfigSpatialResid8;
10637	Config.ConfigResid8Subtraction = pEntry->config.ConfigResid8Subtraction;
10638	Config.ConfigSpatialHost8or9Clipping = pEntry->config.ConfigSpatialHost8or9Clipping;
10639	Config.ConfigSpatialResidInterleaved = pEntry->config.ConfigSpatialResidInterleaved;
10640	Config.ConfigIntraResidUnsigned = pEntry->config.ConfigIntraResidUnsigned;
10641	Config.ConfigResidDiffAccelerator = pEntry->config.ConfigResidDiffAccelerator;
10642	Config.ConfigHostInverseScan = pEntry->config.ConfigHostInverseScan;
10643	Config.ConfigSpecificIDCT = pEntry->config.ConfigSpecificIDCT;
10644	Config.Config4GroupedCoefs = pEntry->config.Config4GroupedCoefs;
10645	Config.ConfigMinRenderTargetBuffCount = pEntry->config.ConfigMinRenderTargetBuffCount;
10646	Config.ConfigDecoderSpecific = pEntry->config.ConfigDecoderSpecific;
10647
10648	hr = pDXDevice->pVideoDevice->CreateVideoDecoder(&VideoDesc, &Config, &pDXVideoDecoder->pVideoDecoder);
10649	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10650	LogFlowFunc(("Using DecodeProfile %RTuuid\n", &VideoDesc.Guid));
10651
10652	/* COTables are restored from saved state in ascending order. Output View must be created before Decoder. */
10653	AssertCompile(VBSVGA_COTABLE_VDOV < VBSVGA_COTABLE_VIDEODECODER);
10654	if (pEntry->vdovId != SVGA3D_INVALID_ID)
10655	{
10656	int rc = dxVideoDecoderBeginFrame(pThisCC, pDXContext, videoDecoderId, pEntry->vdovId);
10657	AssertRC(rc); RT_NOREF(rc);
10658	}
10659
10660	return VINF_SUCCESS;
10661	}
10662
10663
10664	static void dxDestroyVideoDecoder(DXVIDEODECODER *pDXVideoDecoder)
10665	{
10666	D3D_RELEASE(pDXVideoDecoder->pVideoDecoder);
10667	}
10668
10669
10670	/*
10671	* Backend callbacks.
10672	*/
10673
10674	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGACOTableDXVideoProcessorEntry const *pEntry)
10675	{
10676	return dxCreateVideoProcessor(pThisCC, pDXContext, videoProcessorId, pEntry);
10677	}
10678
10679
10680	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId, VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry)
10681	{
10682	/* The view is created when it is used: either in BeginFrame or ClearView. */
10683	RT_NOREF(pThisCC, pDXContext, videoDecoderOutputViewId, pEntry);
10684	return VINF_SUCCESS;
10685	}
10686
10687
10688	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGACOTableDXVideoDecoderEntry const *pEntry)
10689	{
10690	return dxCreateVideoDecoder(pThisCC, pDXContext, videoDecoderId, pEntry);
10691	}
10692
10693
10694	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoDecoderBeginFrame(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId)
10695	{
10696	return dxVideoDecoderBeginFrame(pThisCC, pDXContext, videoDecoderId, videoDecoderOutputViewId);
10697	}
10698
10699
10700	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoDecoderSubmitBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, uint32_t cBuffer, VBSVGA3dVideoDecoderBufferDesc const *paBufferDesc)
10701	{
10702	HRESULT hr;
10703
10704	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10705	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10706
10707	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10708
10709	D3D11_VIDEO_DECODER_BUFFER_DESC paDesc = (D3D11_VIDEO_DECODER_BUFFER_DESC )RTMemTmpAllocZ(cBuffer * sizeof(D3D11_VIDEO_DECODER_BUFFER_DESC));
10710	AssertReturn(paDesc, VERR_NO_MEMORY);
10711
10712	for (uint32_t i = 0; i < cBuffer; ++i)
10713	{
10714	VBSVGA3dVideoDecoderBufferDesc const *s = &paBufferDesc[i];
10715
10716	PVMSVGA3DSURFACE pSurface;
10717	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, s->sidBuffer, &pSurface);
10718	ASSERT_GUEST_CONTINUE(RT_SUCCESS(rc));
10719
10720	uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface;
10721	ASSERT_GUEST_CONTINUE( s->dataSize <= cbSurface
10722	&& s->dataOffset <= cbSurface - s->dataSize);
10723
10724	D3D11_VIDEO_DECODER_BUFFER_DESC *d = &paDesc[i];
10725	d->BufferType = dxVideoDecoderBufferType(s->bufferType);
10726	d->DataOffset = 0;
10727	d->DataSize = s->dataSize;
10728	d->FirstMBaddress = s->firstMBaddress;
10729	d->NumMBsInBuffer = s->numMBsInBuffer;
10730
10731	UINT DecoderBufferSize;
10732	void *pDecoderBuffer;
10733	hr = pDXDevice->pVideoContext->GetDecoderBuffer(pDXVideoDecoder->pVideoDecoder, d->BufferType,
10734	&DecoderBufferSize, &pDecoderBuffer);
10735	AssertReturnStmt(SUCCEEDED(hr), RTMemTmpFree(paDesc), VERR_NOT_SUPPORTED);
10736
10737	ASSERT_GUEST_CONTINUE(DecoderBufferSize >= s->dataSize);
10738
10739	if (pSurface->pBackendSurface)
10740	{
10741	void *pvGuestBuffer;
10742	uint32_t cbGuestBuffer;
10743	rc = dxReadBuffer(pDXDevice, pSurface->pBackendSurface->u.pBuffer, s->dataOffset, s->dataSize,
10744	&pvGuestBuffer, &cbGuestBuffer);
10745	AssertRC(rc);
10746	if (RT_SUCCESS(rc))
10747	{
10748	memcpy(pDecoderBuffer, pvGuestBuffer, cbGuestBuffer);
10749	RTMemFree(pvGuestBuffer);
10750	}
10751	}
10752	else
10753	memcpy(pDecoderBuffer, (uint8_t *)pSurface->paMipmapLevels[0].pSurfaceData + s->dataOffset, s->dataSize);
10754
10755	hr = pDXDevice->pVideoContext->ReleaseDecoderBuffer(pDXVideoDecoder->pVideoDecoder, d->BufferType);
10756	AssertReturnStmt(SUCCEEDED(hr), RTMemTmpFree(paDesc), VERR_NOT_SUPPORTED);
10757	}
10758
10759	hr = pDXDevice->pVideoContext->SubmitDecoderBuffers(pDXVideoDecoder->pVideoDecoder, cBuffer, paDesc);
10760	AssertReturnStmt(SUCCEEDED(hr), RTMemTmpFree(paDesc), VERR_NOT_SUPPORTED);
10761
10762	RTMemTmpFree(paDesc);
10763	return VINF_SUCCESS;
10764	}
10765
10766
10767	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoDecoderEndFrame(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId)
10768	{
10769	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10770	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10771
10772	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10773
10774	HRESULT hr = pDXDevice->pVideoContext->DecoderEndFrame(pDXVideoDecoder->pVideoDecoder);
10775	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10776
10777	return VINF_SUCCESS;
10778	}
10779
10780
10781	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId videoProcessorInputViewId, VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry)
10782	{
10783	/* The view is created when it is used: either in VideoProcessorBlt or ClearView. */
10784	RT_NOREF(pThisCC, pDXContext, videoProcessorInputViewId, pEntry);
10785	return VINF_SUCCESS;
10786	}
10787
10788
10789	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId, VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry)
10790	{
10791	/* The view is created when it is used: either in VideoProcessorBlt or ClearView. */
10792	RT_NOREF(pThisCC, pDXContext, videoProcessorOutputViewId, pEntry);
10793	return VINF_SUCCESS;
10794	}
10795
10796
10797	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId,
10798	uint32_t OutputFrame, uint32_t StreamCount, VBSVGA3dVideoProcessorStream const *pVideoProcessorStreams)
10799	{
10800	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10801	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10802
10803	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10804
10805	DXVIEW *pVPOView;
10806	int rc = dxEnsureVideoProcessorOutputView(pThisCC, pDXContext, videoProcessorOutputViewId, &pVPOView);
10807	AssertRCReturn(rc, rc);
10808
10809	uint32_t cbStreams = StreamCount * sizeof(D3D11_VIDEO_PROCESSOR_STREAM);
10810
10811	/* ID3D11VideoProcessorInputView arrays for past and future frames. */
10812	VBSVGA3dVideoProcessorStream const *pVPS = pVideoProcessorStreams;
10813	for (uint32_t i = 0; i < StreamCount; ++i)
10814	{
10815	uint32_t const cIds = (pVPS->StereoFormatSeparate == 0 ? 1 : 2) * (pVPS->PastFrames + 1 + pVPS->FutureFrames);
10816
10817	uint32_t const cPastFutureViews = (pVPS->StereoFormatSeparate == 0 ? 1 : 2) * (pVPS->PastFrames + pVPS->FutureFrames);
10818	cbStreams += cPastFutureViews * sizeof(ID3D11VideoProcessorInputView *);
10819
10820	pVPS = (VBSVGA3dVideoProcessorStream )((uint8_t )&pVPS[1] + cIds * sizeof(VBSVGA3dVideoProcessorInputViewId));
10821	}
10822
10823	D3D11_VIDEO_PROCESSOR_STREAM paStreams = (D3D11_VIDEO_PROCESSOR_STREAM )RTMemTmpAllocZ(cbStreams);
10824	AssertReturn(paStreams, VERR_NO_MEMORY);
10825	ID3D11VideoProcessorInputView ppSurfaces = (ID3D11VideoProcessorInputView )&paStreams[StreamCount];
10826
10827	pVPS = pVideoProcessorStreams;
10828	for (uint32_t i = 0; i < StreamCount; ++i)
10829	{
10830	D3D11_VIDEO_PROCESSOR_STREAM *d = &paStreams[i];
10831	d->Enable = pVPS->Enable;
10832	d->OutputIndex = pVPS->OutputIndex;
10833	d->InputFrameOrField = pVPS->InputFrameOrField;
10834	d->PastFrames = pVPS->PastFrames;
10835	d->FutureFrames = pVPS->FutureFrames;
10836
10837	/*
10838	* Fetch input frames.
10839	*/
10840	uint32_t const cIds = (pVPS->StereoFormatSeparate == 0 ? 1 : 2) * (pVPS->PastFrames + 1 + pVPS->FutureFrames);
10841	VBSVGA3dVideoProcessorInputViewId const pId = (VBSVGA3dVideoProcessorInputViewId )&pVPS[1];
10842	DXVIEW *pVPIView;
10843
10844	/* Past frames. */
10845	if (pVPS->PastFrames)
10846	{
10847	DEBUG_BREAKPOINT_TEST();
10848	d->ppPastSurfaces = ppSurfaces;
10849	for (UINT j = 0; j < pVPS->PastFrames; ++j, ++ppSurfaces)
10850	{
10851	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10852	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10853	d->ppPastSurfaces[j] = pVPIView->u.pVideoProcessorInputView;
10854	}
10855	}
10856
10857	/* CurrentFrame */
10858	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10859	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10860	d->pInputSurface = pVPIView->u.pVideoProcessorInputView;
10861
10862	/* Future frames. */
10863	if (pVPS->FutureFrames)
10864	{
10865	d->ppFutureSurfaces = ppSurfaces;
10866	for (UINT j = 0; j < pVPS->FutureFrames; ++j, ++ppSurfaces)
10867	{
10868	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10869	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10870	d->ppFutureSurfaces[j] = pVPIView->u.pVideoProcessorInputView;
10871	}
10872	}
10873
10874	/* Right frames for stereo. */
10875	if (pVPS->StereoFormatSeparate)
10876	{
10877	/* Past frames. */
10878	if (pVPS->PastFrames)
10879	{
10880	d->ppPastSurfacesRight = ppSurfaces;
10881	for (UINT j = 0; j < pVPS->PastFrames; ++j, ++ppSurfaces)
10882	{
10883	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10884	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10885	d->ppPastSurfacesRight[j] = pVPIView->u.pVideoProcessorInputView;
10886	}
10887	}
10888
10889	/* CurrentFrame */
10890	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10891	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10892	d->pInputSurfaceRight = pVPIView->u.pVideoProcessorInputView;
10893
10894	/* Future frames. */
10895	if (pVPS->FutureFrames)
10896	{
10897	d->ppFutureSurfacesRight = ppSurfaces;
10898	for (UINT j = 0; j < pVPS->FutureFrames; ++j, ++ppSurfaces)
10899	{
10900	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10901	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10902	d->ppFutureSurfacesRight[j] = pVPIView->u.pVideoProcessorInputView;
10903	}
10904	}
10905	}
10906
10907	pVPS = (VBSVGA3dVideoProcessorStream )((uint8_t )&pVPS[1] + cIds * sizeof(VBSVGA3dVideoProcessorInputViewId));
10908	}
10909
10910	HRESULT hr = pDXDevice->pVideoContext->VideoProcessorBlt(pDXVideoProcessor->pVideoProcessor, pVPOView->u.pVideoProcessorOutputView,
10911	OutputFrame, StreamCount, paStreams);
10912	RTMemTmpFree(paStreams);
10913	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10914
10915	return VINF_SUCCESS;
10916	}
10917
10918
10919	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId)
10920	{
10921	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10922	RT_NOREF(pBackend);
10923
10924	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10925	dxDestroyVideoDecoder(pDXVideoDecoder);
10926
10927	return VINF_SUCCESS;
10928	}
10929
10930
10931	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId)
10932	{
10933	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10934	RT_NOREF(pBackend);
10935
10936	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoDecoderOutputView[videoDecoderOutputViewId];
10937	dxViewDestroy(pDXView);
10938
10939	return VINF_SUCCESS;
10940	}
10941
10942
10943	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId)
10944	{
10945	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10946	RT_NOREF(pBackend);
10947
10948	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10949	dxDestroyVideoProcessor(pDXVideoProcessor);
10950
10951	return VINF_SUCCESS;
10952	}
10953
10954
10955	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId videoProcessorInputViewId)
10956	{
10957	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10958	RT_NOREF(pBackend);
10959
10960	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorInputView[videoProcessorInputViewId];
10961	dxViewDestroy(pDXView);
10962
10963	return VINF_SUCCESS;
10964	}
10965
10966
10967	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId)
10968	{
10969	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10970	RT_NOREF(pBackend);
10971
10972	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorOutputView[videoProcessorOutputViewId];
10973	dxViewDestroy(pDXView);
10974
10975	return VINF_SUCCESS;
10976	}
10977
10978
10979	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputTargetRect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint8 enable, SVGASignedRect const &outputRect)
10980	{
10981	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10982	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10983
10984	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10985	dxVideoProcessorSetOutputTargetRect(pDXDevice, pDXVideoProcessor, enable, outputRect);
10986	return VINF_SUCCESS;
10987	}
10988
10989
10990	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputBackgroundColor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 YCbCr, VBSVGA3dVideoColor const &color)
10991	{
10992	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10993	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10994
10995	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10996	dxVideoProcessorSetOutputBackgroundColor(pDXDevice, pDXVideoProcessor, YCbCr, color);
10997	return VINF_SUCCESS;
10998	}
10999
11000
11001	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputColorSpace(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGA3dVideoProcessorColorSpace const &colorSpace)
11002	{
11003	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11004	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11005
11006	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11007	dxVideoProcessorSetOutputColorSpace(pDXDevice, pDXVideoProcessor, colorSpace);
11008	return VINF_SUCCESS;
11009	}
11010
11011
11012	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputAlphaFillMode(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGA3dVideoProcessorAlphaFillMode fillMode, uint32 streamIndex)
11013	{
11014	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11015	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11016
11017	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11018	dxVideoProcessorSetOutputAlphaFillMode(pDXDevice, pDXVideoProcessor, fillMode, streamIndex);
11019	return VINF_SUCCESS;
11020	}
11021
11022
11023	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputConstriction(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 enabled, uint32 width, uint32 height)
11024	{
11025	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11026	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11027
11028	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11029	dxVideoProcessorSetOutputConstriction(pDXDevice, pDXVideoProcessor, enabled, width, height);
11030	return VINF_SUCCESS;
11031	}
11032
11033
11034	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputStereoMode(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 enable)
11035	{
11036	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11037	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11038
11039	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11040	dxVideoProcessorSetOutputStereoMode(pDXDevice, pDXVideoProcessor, enable);
11041	return VINF_SUCCESS;
11042	}
11043
11044
11045	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamFrameFormat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 streamIndex, VBSVGA3dVideoFrameFormat format)
11046	{
11047	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11048	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11049
11050	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11051	dxVideoProcessorSetStreamFrameFormat(pDXDevice, pDXVideoProcessor, streamIndex, format);
11052	return VINF_SUCCESS;
11053	}
11054
11055
11056	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamColorSpace(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 streamIndex, VBSVGA3dVideoProcessorColorSpace colorSpace)
11057	{
11058	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11059	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11060
11061	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11062	dxVideoProcessorSetStreamColorSpace(pDXDevice, pDXVideoProcessor, streamIndex, colorSpace);
11063	return VINF_SUCCESS;
11064	}
11065
11066
11067	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamOutputRate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11068	uint32 streamIndex, VBSVGA3dVideoProcessorOutputRate outputRate, uint32 repeatFrame, SVGA3dFraction64 const &customRate)
11069	{
11070	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11071	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11072
11073	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11074	dxVideoProcessorSetStreamOutputRate(pDXDevice, pDXVideoProcessor, streamIndex, outputRate, repeatFrame, customRate);
11075	return VINF_SUCCESS;
11076	}
11077
11078
11079	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamSourceRect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11080	uint32 streamIndex, uint32 enable, SVGASignedRect const &sourceRect)
11081	{
11082	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11083	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11084
11085	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11086	dxVideoProcessorSetStreamSourceRect(pDXDevice, pDXVideoProcessor, streamIndex, enable, sourceRect);
11087	return VINF_SUCCESS;
11088	}
11089
11090
11091	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamDestRect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11092	uint32 streamIndex, uint32 enable, SVGASignedRect const &destRect)
11093	{
11094	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11095	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11096
11097	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11098	dxVideoProcessorSetStreamDestRect(pDXDevice, pDXVideoProcessor, streamIndex, enable, destRect);
11099	return VINF_SUCCESS;
11100	}
11101
11102
11103	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamAlpha(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11104	uint32 streamIndex, uint32 enable, float alpha)
11105	{
11106	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11107	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11108
11109	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11110	dxVideoProcessorSetStreamAlpha(pDXDevice, pDXVideoProcessor, streamIndex, enable, alpha);
11111	return VINF_SUCCESS;
11112	}
11113
11114
11115	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamPalette(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11116	uint32 streamIndex, uint32_t cEntries, uint32_t const *paEntries)
11117	{
11118	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11119	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11120
11121	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11122	dxVideoProcessorSetStreamPalette(pDXDevice, pDXVideoProcessor, streamIndex, cEntries, paEntries);
11123	return VINF_SUCCESS;
11124	}
11125
11126
11127	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamPixelAspectRatio(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11128	uint32 streamIndex, uint32 enable, SVGA3dFraction64 const &sourceRatio, SVGA3dFraction64 const &destRatio)
11129	{
11130	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11131	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11132
11133	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11134	dxVideoProcessorSetStreamPixelAspectRatio(pDXDevice, pDXVideoProcessor, streamIndex, enable, sourceRatio, destRatio);
11135	return VINF_SUCCESS;
11136	}
11137
11138
11139	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamLumaKey(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11140	uint32 streamIndex, uint32 enable, float lower, float upper)
11141	{
11142	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11143	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11144
11145	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11146	dxVideoProcessorSetStreamLumaKey(pDXDevice, pDXVideoProcessor, streamIndex, enable, lower, upper);
11147	return VINF_SUCCESS;
11148	}
11149
11150
11151	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamStereoFormat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11152	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorStereoFormat stereoFormat,
11153	uint8 leftViewFrame0, uint8 baseViewFrame0, VBSVGA3dVideoProcessorStereoFlipMode flipMode, int32 monoOffset)
11154	{
11155	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11156	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11157
11158	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11159	dxVideoProcessorSetStreamStereoFormat(pDXDevice, pDXVideoProcessor, streamIndex, enable, stereoFormat,
11160	leftViewFrame0, baseViewFrame0, flipMode, monoOffset);
11161	return VINF_SUCCESS;
11162	}
11163
11164
11165	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamAutoProcessingMode(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11166	uint32 streamIndex, uint32 enable)
11167	{
11168	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11169	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11170
11171	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11172	dxVideoProcessorSetStreamAutoProcessingMode(pDXDevice, pDXVideoProcessor, streamIndex, enable);
11173	return VINF_SUCCESS;
11174	}
11175
11176
11177	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamFilter(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11178	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorFilter filter, int32 level)
11179	{
11180	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11181	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11182
11183	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11184	dxVideoProcessorSetStreamFilter(pDXDevice, pDXVideoProcessor, streamIndex, enable, filter, level);
11185	return VINF_SUCCESS;
11186	}
11187
11188
11189	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamRotation(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11190	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorRotation rotation)
11191	{
11192	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11193	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11194
11195	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11196	dxVideoProcessorSetStreamRotation(pDXDevice, pDXVideoProcessor, streamIndex, enable, rotation);
11197	return VINF_SUCCESS;
11198	}
11199
11200
11201	static int dxGetVideoCapDecodeProfile(PVGASTATECC pThisCC, DXDEVICE pDXDevice, void pvData, uint32 cbData, uint32 *pcbOut)
11202	{
11203	VBSVGA3dDecodeProfileInfo paDecodeProfileInfo = (VBSVGA3dDecodeProfileInfo )pvData;
11204
11205	UINT ProfileCount = pDXDevice->pVideoDevice->GetVideoDecoderProfileCount();
11206	ProfileCount = RT_MIN(ProfileCount, cbData / sizeof(paDecodeProfileInfo[0]));
11207
11208	#ifndef DEBUG_sunlover
11209	/** @todo Allocation of video decoder output texture often fails on NVidia. Disable video decoding for now. */
11210	if (pThisCC->svga.p3dState->pBackend->VendorId == 0x10de)
11211	ProfileCount = 0;
11212	#else
11213	RT_NOREF(pThisCC);
11214	#endif
11215
11216	for (UINT i = 0; i < ProfileCount; ++i)
11217	{
11218	VBSVGA3dDecodeProfileInfo *d = &paDecodeProfileInfo[i];
11219
11220	/* GUID and VBSVGA3dGuid are identical. */
11221	GUID pGuid = (GUID )&d->DecodeProfile;
11222	HRESULT hr = pDXDevice->pVideoDevice->GetVideoDecoderProfile(i, pGuid);
11223	Assert(SUCCEEDED(hr));
11224	if (SUCCEEDED(hr))
11225	{
11226	struct
11227	{
11228	DXGI_FORMAT format;
11229	uint8 *pSupported;
11230	} aFormats[] =
11231	{
11232	{ DXGI_FORMAT_AYUV, &d->fAYUV },
11233	{ DXGI_FORMAT_NV12, &d->fNV12 },
11234	{ DXGI_FORMAT_YUY2, &d->fYUY2 },
11235	};
11236
11237	for (unsigned idxFormat = 0; idxFormat < RT_ELEMENTS(aFormats); ++idxFormat)
11238	{
11239	BOOL Supported = FALSE;
11240	pDXDevice->pVideoDevice->CheckVideoDecoderFormat(pGuid, aFormats[idxFormat].format, &Supported);
11241	*aFormats[idxFormat].pSupported = RT_BOOL(Supported);
11242	}
11243	}
11244
11245	if (FAILED(hr))
11246	RT_ZERO(*d);
11247	}
11248
11249	pcbOut = ProfileCount sizeof(VBSVGA3dDecodeProfileInfo);
11250	return VINF_SUCCESS;
11251	}
11252
11253
11254	static int dxGetVideoCapDecodeConfig(DXDEVICE pDXDevice, void pvData, uint32 cbData, uint32 *pcbOut)
11255	{
11256	ASSERT_GUEST_RETURN(cbData >= sizeof(VBSVGA3dVideoDecoderDesc), VERR_INVALID_PARAMETER);
11257	VBSVGA3dDecodeConfigInfo pConfigInfo = (VBSVGA3dDecodeConfigInfo )pvData;
11258
11259	D3D11_VIDEO_DECODER_DESC Desc;
11260	RT_ZERO(Desc);
11261	memcpy(&Desc.Guid, &pConfigInfo->desc.DecodeProfile, sizeof(GUID));
11262	Desc.SampleWidth = pConfigInfo->desc.SampleWidth;
11263	Desc.SampleHeight = pConfigInfo->desc.SampleHeight;
11264	Desc.OutputFormat = vmsvgaDXSurfaceFormat2Dxgi(pConfigInfo->desc.OutputFormat);
11265
11266	UINT ConfigCount;
11267	HRESULT hr = pDXDevice->pVideoDevice->GetVideoDecoderConfigCount(&Desc, &ConfigCount);
11268	if (FAILED(hr))
11269	ConfigCount = 0;
11270	ConfigCount = RT_MIN(ConfigCount, (cbData - sizeof(pConfigInfo->desc)) / sizeof(pConfigInfo->aConfig[0]));
11271
11272	UINT cConfigOut = 0;
11273	for (UINT i = 0; i < ConfigCount; ++i)
11274	{
11275	D3D11_VIDEO_DECODER_CONFIG Config;
11276	hr = pDXDevice->pVideoDevice->GetVideoDecoderConfig(&Desc, i, &Config);
11277	Assert(SUCCEEDED(hr));
11278	if (SUCCEEDED(hr))
11279	{
11280	/* Filter out configs with encryption. */
11281	static GUID const NoEncrypt = { 0x1b81beD0, 0xa0c7,0x11d3,0xb9,0x84,0x00,0xc0,0x4f,0x2e,0x73,0xc5 };
11282	if ( memcmp(&NoEncrypt, &Config.guidConfigBitstreamEncryption, sizeof(GUID)) == 0
11283	&& memcmp(&NoEncrypt, &Config.guidConfigMBcontrolEncryption, sizeof(GUID)) == 0
11284	&& memcmp(&NoEncrypt, &Config.guidConfigResidDiffEncryption, sizeof(GUID)) == 0)
11285	{
11286	VBSVGA3dVideoDecoderConfig *d = &pConfigInfo->aConfig[cConfigOut++];
11287
11288	memcpy(&d->guidConfigBitstreamEncryption, &Config.guidConfigBitstreamEncryption, sizeof(VBSVGA3dGuid));
11289	memcpy(&d->guidConfigMBcontrolEncryption, &Config.guidConfigMBcontrolEncryption, sizeof(VBSVGA3dGuid));
11290	memcpy(&d->guidConfigResidDiffEncryption, &Config.guidConfigResidDiffEncryption, sizeof(VBSVGA3dGuid));
11291	d->ConfigBitstreamRaw = Config.ConfigBitstreamRaw;
11292	d->ConfigMBcontrolRasterOrder = Config.ConfigMBcontrolRasterOrder;
11293	d->ConfigResidDiffHost = Config.ConfigResidDiffHost;
11294	d->ConfigSpatialResid8 = Config.ConfigSpatialResid8;
11295	d->ConfigResid8Subtraction = Config.ConfigResid8Subtraction;
11296	d->ConfigSpatialHost8or9Clipping = Config.ConfigSpatialHost8or9Clipping;
11297	d->ConfigSpatialResidInterleaved = Config.ConfigSpatialResidInterleaved;
11298	d->ConfigIntraResidUnsigned = Config.ConfigIntraResidUnsigned;
11299	d->ConfigResidDiffAccelerator = Config.ConfigResidDiffAccelerator;
11300	d->ConfigHostInverseScan = Config.ConfigHostInverseScan;
11301	d->ConfigSpecificIDCT = Config.ConfigSpecificIDCT;
11302	d->Config4GroupedCoefs = Config.Config4GroupedCoefs;
11303	d->ConfigMinRenderTargetBuffCount = Config.ConfigMinRenderTargetBuffCount;
11304	d->ConfigDecoderSpecific = Config.ConfigDecoderSpecific;
11305	}
11306	}
11307	}
11308
11309	//DEBUG_BREAKPOINT_TEST();
11310	pcbOut = sizeof(VBSVGA3dVideoDecoderDesc) + cConfigOut sizeof(VBSVGA3dVideoDecoderConfig);
11311	return VINF_SUCCESS;
11312	}
11313
11314
11315	static int dxGetVideoCapProcessorEnum(DXDEVICE pDXDevice, void pvData, uint32 cbData, uint32 *pcbOut)
11316	{
11317	ASSERT_GUEST_RETURN(cbData >= sizeof(VBSVGA3dProcessorEnumInfo), VERR_INVALID_PARAMETER);
11318
11319	VBSVGA3dProcessorEnumInfo pInfo = (VBSVGA3dProcessorEnumInfo )pvData;
11320	RT_ZERO(pInfo->info);
11321
11322	D3D11_VIDEO_PROCESSOR_CONTENT_DESC ContentDesc;
11323	RT_ZERO(ContentDesc);
11324	ContentDesc.InputFrameFormat = dxVideoFrameFormat(pInfo->desc.InputFrameFormat);
11325	ContentDesc.InputFrameRate.Numerator = pInfo->desc.InputFrameRate.numerator;
11326	ContentDesc.InputFrameRate.Denominator = pInfo->desc.InputFrameRate.denominator;
11327	ContentDesc.InputWidth = pInfo->desc.InputWidth;
11328	ContentDesc.InputHeight = pInfo->desc.InputHeight;
11329	ContentDesc.OutputFrameRate.Numerator = pInfo->desc.OutputFrameRate.numerator;
11330	ContentDesc.OutputFrameRate.Denominator = pInfo->desc.OutputFrameRate.denominator;
11331	ContentDesc.OutputWidth = pInfo->desc.OutputWidth;
11332	ContentDesc.OutputHeight = pInfo->desc.OutputHeight;
11333	ContentDesc.Usage = dxVideoUsage(pInfo->desc.Usage);
11334
11335	ID3D11VideoProcessorEnumerator *pEnum;
11336	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&ContentDesc, &pEnum);
11337	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
11338
11339	struct
11340	{
11341	DXGI_FORMAT format;
11342	uint8 *pFlags;
11343	} aFormats[] =
11344	{
11345	{ DXGI_FORMAT_R8_UNORM, &pInfo->info.fR8_UNORM },
11346	{ DXGI_FORMAT_R16_UNORM, &pInfo->info.fR16_UNORM },
11347	{ DXGI_FORMAT_NV12, &pInfo->info.fNV12 },
11348	{ DXGI_FORMAT_YUY2, &pInfo->info.fYUY2 },
11349	{ DXGI_FORMAT_R16G16B16A16_FLOAT, &pInfo->info.fR16G16B16A16_FLOAT },
11350	{ DXGI_FORMAT_B8G8R8X8_UNORM, &pInfo->info.fB8G8R8X8_UNORM },
11351	{ DXGI_FORMAT_B8G8R8A8_UNORM, &pInfo->info.fB8G8R8A8_UNORM },
11352	{ DXGI_FORMAT_R8G8B8A8_UNORM, &pInfo->info.fR8G8B8A8_UNORM },
11353	{ DXGI_FORMAT_R10G10B10A2_UNORM, &pInfo->info.fR10G10B10A2_UNORM },
11354	{ DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM, &pInfo->info.fR10G10B10_XR_BIAS_A2_UNORM },
11355	{ DXGI_FORMAT_R8G8B8A8_UNORM_SRGB, &pInfo->info.fR8G8B8A8_UNORM_SRGB },
11356	{ DXGI_FORMAT_B8G8R8A8_UNORM_SRGB, &pInfo->info.fB8G8R8A8_UNORM_SRGB },
11357	};
11358
11359	for (unsigned idxFormat = 0; idxFormat < RT_ELEMENTS(aFormats); ++idxFormat)
11360	{
11361	UINT Flags = 0;
11362	hr = pEnum->CheckVideoProcessorFormat(aFormats[idxFormat].format, &Flags);
11363	if (SUCCEEDED(hr))
11364	*aFormats[idxFormat].pFlags = Flags;
11365	}
11366
11367	D3D11_VIDEO_PROCESSOR_CAPS Caps;
11368	hr = pEnum->GetVideoProcessorCaps(&Caps);
11369	if (SUCCEEDED(hr))
11370	{
11371	pInfo->info.Caps.DeviceCaps = Caps.DeviceCaps;
11372	pInfo->info.Caps.FeatureCaps = Caps.FeatureCaps;
11373	pInfo->info.Caps.FilterCaps = Caps.FilterCaps;
11374	pInfo->info.Caps.InputFormatCaps = Caps.InputFormatCaps;
11375	pInfo->info.Caps.AutoStreamCaps = Caps.AutoStreamCaps;
11376	pInfo->info.Caps.StereoCaps = Caps.StereoCaps;
11377	pInfo->info.Caps.RateConversionCapsCount = RT_MIN(Caps.RateConversionCapsCount, VBSVGA3D_MAX_VIDEO_RATE_CONVERSION_CAPS);
11378	pInfo->info.Caps.MaxInputStreams = RT_MIN(Caps.MaxInputStreams, VBSVGA3D_MAX_VIDEO_STREAMS);
11379	pInfo->info.Caps.MaxStreamStates = RT_MIN(Caps.MaxStreamStates, VBSVGA3D_MAX_VIDEO_STREAMS);
11380	}
11381
11382	D3D11_VIDEO_PROCESSOR_RATE_CONVERSION_CAPS RateCaps;
11383	hr = pEnum->GetVideoProcessorRateConversionCaps(0, &RateCaps);
11384	if (SUCCEEDED(hr))
11385	{
11386	pInfo->info.RateCaps.PastFrames = RateCaps.PastFrames;
11387	pInfo->info.RateCaps.FutureFrames = RateCaps.FutureFrames;
11388	pInfo->info.RateCaps.ProcessorCaps = RateCaps.ProcessorCaps;
11389	pInfo->info.RateCaps.ITelecineCaps = RateCaps.ITelecineCaps;
11390	pInfo->info.RateCaps.CustomRateCount = RT_MIN(RateCaps.CustomRateCount, VBSVGA3D_MAX_VIDEO_CUSTOM_RATE_CAPS);
11391	}
11392
11393	for (unsigned i = 0; i < pInfo->info.RateCaps.CustomRateCount; ++i)
11394	{
11395	D3D11_VIDEO_PROCESSOR_CUSTOM_RATE Rate;
11396	hr = pEnum->GetVideoProcessorCustomRate(0, i, &Rate);
11397	if (SUCCEEDED(hr))
11398	{
11399	pInfo->info.aCustomRateCaps[i].CustomRate.numerator = Rate.CustomRate.Numerator;
11400	pInfo->info.aCustomRateCaps[i].CustomRate.denominator = Rate.CustomRate.Denominator;
11401	pInfo->info.aCustomRateCaps[i].OutputFrames = Rate.OutputFrames;
11402	pInfo->info.aCustomRateCaps[i].InputInterlaced = Rate.InputInterlaced;
11403	pInfo->info.aCustomRateCaps[i].InputFramesOrFields = Rate.InputFramesOrFields;
11404	}
11405	}
11406
11407	for (unsigned i = 0; i < VBSVGA3D_VP_MAX_FILTER_COUNT; ++i)
11408	{
11409	if (pInfo->info.Caps.FilterCaps & (1 << i))
11410	{
11411	D3D11_VIDEO_PROCESSOR_FILTER_RANGE Range;
11412	hr = pEnum->GetVideoProcessorFilterRange((D3D11_VIDEO_PROCESSOR_FILTER)i, &Range);
11413	if (SUCCEEDED(hr))
11414	{
11415	pInfo->info.aFilterRange[i].Minimum = Range.Minimum;
11416	pInfo->info.aFilterRange[i].Maximum = Range.Maximum;
11417	pInfo->info.aFilterRange[i].Default = Range.Default;
11418	pInfo->info.aFilterRange[i].Multiplier = Range.Multiplier;
11419	}
11420	}
11421	}
11422
11423	//DEBUG_BREAKPOINT_TEST();
11424	D3D_RELEASE(pEnum);
11425
11426	*pcbOut = sizeof(VBSVGA3dProcessorEnumInfo);
11427	return VINF_SUCCESS;
11428	}
11429
11430
11431	static DECLCALLBACK(int) vmsvga3dBackVBDXGetVideoCapability(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoCapability capability, void pvData, uint32 cbData, uint32 pcbOut)
11432	{
11433	RT_NOREF(pDXContext);
11434
11435	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11436	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11437
11438	switch (capability)
11439	{
11440	case VBSVGA3D_VIDEO_CAPABILITY_DECODE_PROFILE:
11441	return dxGetVideoCapDecodeProfile(pThisCC, pDXDevice, pvData, cbData, pcbOut);
11442	case VBSVGA3D_VIDEO_CAPABILITY_DECODE_CONFIG:
11443	return dxGetVideoCapDecodeConfig(pDXDevice, pvData, cbData, pcbOut);
11444	case VBSVGA3D_VIDEO_CAPABILITY_PROCESSOR_ENUM:
11445	return dxGetVideoCapProcessorEnum(pDXDevice, pvData, cbData, pcbOut);
11446	default:
11447	break;
11448	}
11449
11450	return VERR_NOT_SUPPORTED;
11451	}
11452
11453
11454	static DECLCALLBACK(int) vmsvga3dBackVBDXClearUAV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId viewId,
11455	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11456	{
11457	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11458	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11459
11460	DXVIEW *pDXView;
11461	int rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, viewId, &pDXView);
11462	AssertRCReturn(rc, rc);
11463
11464	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11465	return VINF_SUCCESS;
11466	}
11467
11468
11469	static DECLCALLBACK(int) vmsvga3dBackVBDXClearVDOV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId viewId,
11470	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11471	{
11472	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11473	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11474
11475	DXVIEW *pDXView;
11476	int rc = dxEnsureVideoDecoderOutputView(pThisCC, pDXContext, viewId, &pDXView);
11477	AssertRCReturn(rc, rc);
11478
11479	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11480	return VINF_SUCCESS;
11481	}
11482
11483
11484	static DECLCALLBACK(int) vmsvga3dBackVBDXClearVPIV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId viewId,
11485	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11486	{
11487	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11488	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11489
11490	DXVIEW *pDXView;
11491	int rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, viewId, &pDXView);
11492	AssertRCReturn(rc, rc);
11493
11494	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11495	return VINF_SUCCESS;
11496	}
11497
11498
11499	static DECLCALLBACK(int) vmsvga3dBackVBDXClearVPOV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId viewId,
11500	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11501	{
11502	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11503	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11504
11505	DXVIEW *pDXView;
11506	int rc = dxEnsureVideoProcessorOutputView(pThisCC, pDXContext, viewId, &pDXView);
11507	AssertRCReturn(rc, rc);
11508
11509	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11510	return VINF_SUCCESS;
11511	}
11512
11513
11514	static DECLCALLBACK(int) vmsvga3dBackDXLoadState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
11515	{
11516	RT_NOREF(pThisCC);
11517	uint32_t u32;
11518	int rc;
11519
11520	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
11521	AssertLogRelRCReturn(rc, rc);
11522	AssertLogRelRCReturn(u32 == pDXContext->pBackendDXContext->cShader, VERR_INVALID_STATE);
11523
11524	for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
11525	{
11526	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
11527
11528	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
11529	AssertLogRelRCReturn(rc, rc);
11530	AssertLogRelReturn((SVGA3dShaderType)u32 == pDXShader->enmShaderType, VERR_INVALID_STATE);
11531
11532	if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
11533	continue;
11534
11535	pHlp->pfnSSMGetU32(pSSM, &pDXShader->soid);
11536
11537	pHlp->pfnSSMGetU32(pSSM, &u32);
11538	pDXShader->shaderInfo.enmProgramType = (VGPU10_PROGRAM_TYPE)u32;
11539
11540	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cbBytecode);
11541	AssertLogRelRCReturn(rc, rc);
11542	AssertLogRelReturn(pDXShader->shaderInfo.cbBytecode <= 2 * SVGA3D_MAX_SHADER_MEMORY_BYTES, VERR_INVALID_STATE);
11543
11544	if (pDXShader->shaderInfo.cbBytecode)
11545	{
11546	pDXShader->shaderInfo.pvBytecode = RTMemAlloc(pDXShader->shaderInfo.cbBytecode);
11547	AssertPtrReturn(pDXShader->shaderInfo.pvBytecode, VERR_NO_MEMORY);
11548	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
11549	}
11550
11551	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cInputSignature);
11552	AssertLogRelRCReturn(rc, rc);
11553	AssertLogRelReturn(pDXShader->shaderInfo.cInputSignature <= 32, VERR_INVALID_STATE);
11554	if (pDXShader->shaderInfo.cInputSignature)
11555	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
11556
11557	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cOutputSignature);
11558	AssertLogRelRCReturn(rc, rc);
11559	AssertLogRelReturn(pDXShader->shaderInfo.cOutputSignature <= 32, VERR_INVALID_STATE);
11560	if (pDXShader->shaderInfo.cOutputSignature)
11561	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
11562
11563	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cPatchConstantSignature);
11564	AssertLogRelRCReturn(rc, rc);
11565	AssertLogRelReturn(pDXShader->shaderInfo.cPatchConstantSignature <= 32, VERR_INVALID_STATE);
11566	if (pDXShader->shaderInfo.cPatchConstantSignature)
11567	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
11568
11569	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cDclResource);
11570	AssertLogRelRCReturn(rc, rc);
11571	AssertLogRelReturn(pDXShader->shaderInfo.cDclResource <= SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_STATE);
11572	if (pDXShader->shaderInfo.cDclResource)
11573	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
11574
11575	DXShaderGenerateSemantics(&pDXShader->shaderInfo);
11576	}
11577
11578	rc = pHlp->pfnSSMGetU32(pSSM, &pDXContext->pBackendDXContext->cSOTarget);
11579	AssertLogRelRCReturn(rc, rc);
11580
11581	return VINF_SUCCESS;
11582	}
11583
11584
11585	static DECLCALLBACK(int) vmsvga3dBackDXSaveState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
11586	{
11587	RT_NOREF(pThisCC);
11588	int rc;
11589
11590	pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cShader);
11591	for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
11592	{
11593	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
11594
11595	pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->enmShaderType);
11596	if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
11597	continue;
11598
11599	pHlp->pfnSSMPutU32(pSSM, pDXShader->soid);
11600
11601	pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->shaderInfo.enmProgramType);
11602
11603	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cbBytecode);
11604	if (pDXShader->shaderInfo.cbBytecode)
11605	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
11606
11607	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cInputSignature);
11608	if (pDXShader->shaderInfo.cInputSignature)
11609	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
11610
11611	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cOutputSignature);
11612	if (pDXShader->shaderInfo.cOutputSignature)
11613	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
11614
11615	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cPatchConstantSignature);
11616	if (pDXShader->shaderInfo.cPatchConstantSignature)
11617	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
11618
11619	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cDclResource);
11620	if (pDXShader->shaderInfo.cDclResource)
11621	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
11622	}
11623	rc = pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cSOTarget);
11624	AssertLogRelRCReturn(rc, rc);
11625
11626	return VINF_SUCCESS;
11627	}
11628
11629
11630	static DECLCALLBACK(int) vmsvga3dBackQueryInterface(PVGASTATECC pThisCC, char const pszInterfaceName, void pvInterfaceFuncs, size_t cbInterfaceFuncs)
11631	{
11632	RT_NOREF(pThisCC);
11633
11634	int rc = VINF_SUCCESS;
11635	if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
11636	{
11637	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
11638	{
11639	if (pvInterfaceFuncs)
11640	{
11641	VMSVGA3DBACKENDFUNCSDX p = (VMSVGA3DBACKENDFUNCSDX )pvInterfaceFuncs;
11642	p->pfnDXSaveState = vmsvga3dBackDXSaveState;
11643	p->pfnDXLoadState = vmsvga3dBackDXLoadState;
11644	p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
11645	p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
11646	p->pfnDXBindContext = vmsvga3dBackDXBindContext;
11647	p->pfnDXSwitchContext = vmsvga3dBackDXSwitchContext;
11648	p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
11649	p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
11650	p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
11651	p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
11652	p->pfnDXSetShader = vmsvga3dBackDXSetShader;
11653	p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
11654	p->pfnDXDraw = vmsvga3dBackDXDraw;
11655	p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
11656	p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
11657	p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
11658	p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
11659	p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
11660	p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
11661	p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
11662	p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
11663	p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
11664	p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
11665	p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
11666	p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
11667	p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
11668	p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
11669	p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
11670	p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
11671	p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
11672	p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
11673	p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
11674	p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
11675	p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
11676	p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
11677	p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
11678	p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
11679	p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
11680	p->pfnDXGenMips = vmsvga3dBackDXGenMips;
11681	p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
11682	p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
11683	p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
11684	p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
11685	p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
11686	p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
11687	p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
11688	p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
11689	p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
11690	p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
11691	p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
11692	p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
11693	p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
11694	p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
11695	p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
11696	p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
11697	p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
11698	p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
11699	p->pfnDXBindShader = vmsvga3dBackDXBindShader;
11700	p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
11701	p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
11702	p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
11703	p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
11704	p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
11705	p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
11706	p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
11707	p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
11708	p->pfnDXHint = vmsvga3dBackDXHint;
11709	p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
11710	p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
11711	p->pfnScreenCopy = vmsvga3dBackScreenCopy;
11712	p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
11713	p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
11714	p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
11715	p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
11716	p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
11717	p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
11718	p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
11719	p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
11720	p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
11721	p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
11722	p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
11723	p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
11724	p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
11725	p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
11726	p->pfnDXDispatch = vmsvga3dBackDXDispatch;
11727	p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
11728	p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
11729	p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
11730	p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
11731	p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
11732	p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
11733	p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
11734	p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
11735	p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
11736	p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
11737	p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
11738	p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
11739	p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
11740	p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
11741	p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
11742	p->pfnVBDXClearRenderTargetViewRegion = vmsvga3dBackVBDXClearRenderTargetViewRegion;
11743	p->pfnVBDXClearUAV = vmsvga3dBackVBDXClearUAV;
11744	}
11745	}
11746	else
11747	{
11748	AssertFailed();
11749	rc = VERR_INVALID_PARAMETER;
11750	}
11751	}
11752	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DXVIDEO) == 0)
11753	{
11754	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDXVIDEO))
11755	{
11756	if (pvInterfaceFuncs)
11757	{
11758	VMSVGA3DBACKENDFUNCSDXVIDEO p = (VMSVGA3DBACKENDFUNCSDXVIDEO )pvInterfaceFuncs;
11759	p->pfnVBDXDefineVideoProcessor = vmsvga3dBackVBDXDefineVideoProcessor;
11760	p->pfnVBDXDefineVideoDecoderOutputView = vmsvga3dBackVBDXDefineVideoDecoderOutputView;
11761	p->pfnVBDXDefineVideoDecoder = vmsvga3dBackVBDXDefineVideoDecoder;
11762	p->pfnVBDXVideoDecoderBeginFrame = vmsvga3dBackVBDXVideoDecoderBeginFrame;
11763	p->pfnVBDXVideoDecoderSubmitBuffers = vmsvga3dBackVBDXVideoDecoderSubmitBuffers;
11764	p->pfnVBDXVideoDecoderEndFrame = vmsvga3dBackVBDXVideoDecoderEndFrame;
11765	p->pfnVBDXDefineVideoProcessorInputView = vmsvga3dBackVBDXDefineVideoProcessorInputView;
11766	p->pfnVBDXDefineVideoProcessorOutputView = vmsvga3dBackVBDXDefineVideoProcessorOutputView;
11767	p->pfnVBDXVideoProcessorBlt = vmsvga3dBackVBDXVideoProcessorBlt;
11768	p->pfnVBDXDestroyVideoDecoder = vmsvga3dBackVBDXDestroyVideoDecoder;
11769	p->pfnVBDXDestroyVideoDecoderOutputView = vmsvga3dBackVBDXDestroyVideoDecoderOutputView;
11770	p->pfnVBDXDestroyVideoProcessor = vmsvga3dBackVBDXDestroyVideoProcessor;
11771	p->pfnVBDXDestroyVideoProcessorInputView = vmsvga3dBackVBDXDestroyVideoProcessorInputView;
11772	p->pfnVBDXDestroyVideoProcessorOutputView = vmsvga3dBackVBDXDestroyVideoProcessorOutputView;
11773	p->pfnVBDXVideoProcessorSetOutputTargetRect = vmsvga3dBackVBDXVideoProcessorSetOutputTargetRect;
11774	p->pfnVBDXVideoProcessorSetOutputBackgroundColor = vmsvga3dBackVBDXVideoProcessorSetOutputBackgroundColor;
11775	p->pfnVBDXVideoProcessorSetOutputColorSpace = vmsvga3dBackVBDXVideoProcessorSetOutputColorSpace;
11776	p->pfnVBDXVideoProcessorSetOutputAlphaFillMode = vmsvga3dBackVBDXVideoProcessorSetOutputAlphaFillMode;
11777	p->pfnVBDXVideoProcessorSetOutputConstriction = vmsvga3dBackVBDXVideoProcessorSetOutputConstriction;
11778	p->pfnVBDXVideoProcessorSetOutputStereoMode = vmsvga3dBackVBDXVideoProcessorSetOutputStereoMode;
11779	p->pfnVBDXVideoProcessorSetStreamFrameFormat = vmsvga3dBackVBDXVideoProcessorSetStreamFrameFormat;
11780	p->pfnVBDXVideoProcessorSetStreamColorSpace = vmsvga3dBackVBDXVideoProcessorSetStreamColorSpace;
11781	p->pfnVBDXVideoProcessorSetStreamOutputRate = vmsvga3dBackVBDXVideoProcessorSetStreamOutputRate;
11782	p->pfnVBDXVideoProcessorSetStreamSourceRect = vmsvga3dBackVBDXVideoProcessorSetStreamSourceRect;
11783	p->pfnVBDXVideoProcessorSetStreamDestRect = vmsvga3dBackVBDXVideoProcessorSetStreamDestRect;
11784	p->pfnVBDXVideoProcessorSetStreamAlpha = vmsvga3dBackVBDXVideoProcessorSetStreamAlpha;
11785	p->pfnVBDXVideoProcessorSetStreamPalette = vmsvga3dBackVBDXVideoProcessorSetStreamPalette;
11786	p->pfnVBDXVideoProcessorSetStreamPixelAspectRatio = vmsvga3dBackVBDXVideoProcessorSetStreamPixelAspectRatio;
11787	p->pfnVBDXVideoProcessorSetStreamLumaKey = vmsvga3dBackVBDXVideoProcessorSetStreamLumaKey;
11788	p->pfnVBDXVideoProcessorSetStreamStereoFormat = vmsvga3dBackVBDXVideoProcessorSetStreamStereoFormat;
11789	p->pfnVBDXVideoProcessorSetStreamAutoProcessingMode = vmsvga3dBackVBDXVideoProcessorSetStreamAutoProcessingMode;
11790	p->pfnVBDXVideoProcessorSetStreamFilter = vmsvga3dBackVBDXVideoProcessorSetStreamFilter;
11791	p->pfnVBDXVideoProcessorSetStreamRotation = vmsvga3dBackVBDXVideoProcessorSetStreamRotation;
11792	p->pfnVBDXGetVideoCapability = vmsvga3dBackVBDXGetVideoCapability;
11793	p->pfnVBDXClearVDOV = vmsvga3dBackVBDXClearVDOV;
11794	p->pfnVBDXClearVPIV = vmsvga3dBackVBDXClearVPIV;
11795	p->pfnVBDXClearVPOV = vmsvga3dBackVBDXClearVPOV;
11796	}
11797	}
11798	else
11799	{
11800	AssertFailed();
11801	rc = VERR_INVALID_PARAMETER;
11802	}
11803	}
11804	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
11805	{
11806	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
11807	{
11808	if (pvInterfaceFuncs)
11809	{
11810	VMSVGA3DBACKENDFUNCSMAP p = (VMSVGA3DBACKENDFUNCSMAP )pvInterfaceFuncs;
11811	p->pfnSurfaceMap = vmsvga3dBackSurfaceMap;
11812	p->pfnSurfaceUnmap = vmsvga3dBackSurfaceUnmap;
11813	}
11814	}
11815	else
11816	{
11817	AssertFailed();
11818	rc = VERR_INVALID_PARAMETER;
11819	}
11820	}
11821	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
11822	{
11823	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
11824	{
11825	if (pvInterfaceFuncs)
11826	{
11827	VMSVGA3DBACKENDFUNCSGBO p = (VMSVGA3DBACKENDFUNCSGBO )pvInterfaceFuncs;
11828	p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
11829	p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
11830	}
11831	}
11832	else
11833	{
11834	AssertFailed();
11835	rc = VERR_INVALID_PARAMETER;
11836	}
11837	}
11838	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_3D) == 0)
11839	{
11840	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCS3D))
11841	{
11842	if (pvInterfaceFuncs)
11843	{
11844	VMSVGA3DBACKENDFUNCS3D p = (VMSVGA3DBACKENDFUNCS3D )pvInterfaceFuncs;
11845	p->pfnInit = vmsvga3dBackInit;
11846	p->pfnPowerOn = vmsvga3dBackPowerOn;
11847	p->pfnTerminate = vmsvga3dBackTerminate;
11848	p->pfnReset = vmsvga3dBackReset;
11849	p->pfnQueryCaps = vmsvga3dBackQueryCaps;
11850	p->pfnChangeMode = vmsvga3dBackChangeMode;
11851	p->pfnCreateTexture = vmsvga3dBackCreateTexture;
11852	p->pfnSurfaceDestroy = vmsvga3dBackSurfaceDestroy;
11853	p->pfnSurfaceInvalidateImage = vmsvga3dBackSurfaceInvalidateImage;
11854	p->pfnSurfaceCopy = vmsvga3dBackSurfaceCopy;
11855	p->pfnSurfaceDMACopyBox = vmsvga3dBackSurfaceDMACopyBox;
11856	p->pfnSurfaceStretchBlt = vmsvga3dBackSurfaceStretchBlt;
11857	p->pfnUpdateHostScreenViewport = vmsvga3dBackUpdateHostScreenViewport;
11858	p->pfnDefineScreen = vmsvga3dBackDefineScreen;
11859	p->pfnDestroyScreen = vmsvga3dBackDestroyScreen;
11860	p->pfnSurfaceBlitToScreen = vmsvga3dBackSurfaceBlitToScreen;
11861	p->pfnSurfaceUpdateHeapBuffers = vmsvga3dBackSurfaceUpdateHeapBuffers;
11862	}
11863	}
11864	else
11865	{
11866	AssertFailed();
11867	rc = VERR_INVALID_PARAMETER;
11868	}
11869	}
11870	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_VGPU9) == 0)
11871	{
11872	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSVGPU9))
11873	{
11874	if (pvInterfaceFuncs)
11875	{
11876	VMSVGA3DBACKENDFUNCSVGPU9 p = (VMSVGA3DBACKENDFUNCSVGPU9 )pvInterfaceFuncs;
11877	p->pfnContextDefine = vmsvga3dBackContextDefine;
11878	p->pfnContextDestroy = vmsvga3dBackContextDestroy;
11879	p->pfnSetTransform = vmsvga3dBackSetTransform;
11880	p->pfnSetZRange = vmsvga3dBackSetZRange;
11881	p->pfnSetRenderState = vmsvga3dBackSetRenderState;
11882	p->pfnSetRenderTarget = vmsvga3dBackSetRenderTarget;
11883	p->pfnSetTextureState = vmsvga3dBackSetTextureState;
11884	p->pfnSetMaterial = vmsvga3dBackSetMaterial;
11885	p->pfnSetLightData = vmsvga3dBackSetLightData;
11886	p->pfnSetLightEnabled = vmsvga3dBackSetLightEnabled;
11887	p->pfnSetViewPort = vmsvga3dBackSetViewPort;
11888	p->pfnSetClipPlane = vmsvga3dBackSetClipPlane;
11889	p->pfnCommandClear = vmsvga3dBackCommandClear;
11890	p->pfnDrawPrimitives = vmsvga3dBackDrawPrimitives;
11891	p->pfnSetScissorRect = vmsvga3dBackSetScissorRect;
11892	p->pfnGenerateMipmaps = vmsvga3dBackGenerateMipmaps;
11893	p->pfnShaderDefine = vmsvga3dBackShaderDefine;
11894	p->pfnShaderDestroy = vmsvga3dBackShaderDestroy;
11895	p->pfnShaderSet = vmsvga3dBackShaderSet;
11896	p->pfnShaderSetConst = vmsvga3dBackShaderSetConst;
11897	p->pfnOcclusionQueryCreate = vmsvga3dBackOcclusionQueryCreate;
11898	p->pfnOcclusionQueryDelete = vmsvga3dBackOcclusionQueryDelete;
11899	p->pfnOcclusionQueryBegin = vmsvga3dBackOcclusionQueryBegin;
11900	p->pfnOcclusionQueryEnd = vmsvga3dBackOcclusionQueryEnd;
11901	p->pfnOcclusionQueryGetData = vmsvga3dBackOcclusionQueryGetData;
11902	}
11903	}
11904	else
11905	{
11906	AssertFailed();
11907	rc = VERR_INVALID_PARAMETER;
11908	}
11909	}
11910	else
11911	rc = VERR_NOT_IMPLEMENTED;
11912	return rc;
11913	}
11914
11915
11916	extern VMSVGA3DBACKENDDESC const g_BackendDX =
11917	{
11918	"DX",
11919	vmsvga3dBackQueryInterface
11920	};

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-dx11.cpp@ 105381

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