DevVGA-SVGA.h@ 93115

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1	/* $Id: DevVGA-SVGA.h 93115 2022-01-01 11:31:46Z vboxsync $ */
2	/** @file
3	* VMware SVGA device
4	*/
5	/*
6	* Copyright (C) 2013-2022 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*/
16
17	#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
18	#define VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
19	#ifndef RT_WITHOUT_PRAGMA_ONCE
20	# pragma once
21	#endif
22
23	#ifndef VBOX_WITH_VMSVGA
24	# error "VBOX_WITH_VMSVGA is not defined"
25	#endif
26
27	#define VMSVGA_USE_EMT_HALT_CODE
28
29	#include <VBox/pci.h>
30	#include <VBox/vmm/pdmifs.h>
31	#include <VBox/vmm/pdmthread.h>
32	#include <VBox/vmm/stam.h>
33	#ifdef VMSVGA_USE_EMT_HALT_CODE
34	# include <VBox/vmm/vmapi.h>
35	# include <VBox/vmm/vmcpuset.h>
36	#endif
37
38	#include <iprt/avl.h>
39	#include <iprt/list.h>
40
41
42	/*
43	* PCI device IDs.
44	*/
45	#ifndef PCI_VENDOR_ID_VMWARE
46	# define PCI_VENDOR_ID_VMWARE 0x15AD
47	#endif
48	#ifndef PCI_DEVICE_ID_VMWARE_SVGA2
49	# define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
50	#endif
51
52	/* For "svga_overlay.h" */
53	#ifndef TRUE
54	# define TRUE 1
55	#endif
56	#ifndef FALSE
57	# define FALSE 0
58	#endif
59
60	/* VMSVGA headers. */
61	#include "vmsvga_headers_begin.h"
62	#pragma pack(1) /* VMSVGA structures are '__packed'. */
63	#include <svga3d_caps.h>
64	#include <svga3d_reg.h>
65	#include <svga3d_shaderdefs.h>
66	#include <svga_escape.h>
67	#include <svga_overlay.h>
68	#pragma pack()
69	#include "vmsvga_headers_end.h"
70
71	/**@def FLOAT_FMT_STR
72	* Format string bits to go with FLOAT_FMT_ARGS. */
73	#define FLOAT_FMT_STR "%s%u.%06u"
74	/** @def FLOAT_FMT_ARGS
75	* Format arguments for a float value, corresponding to FLOAT_FMT_STR.
76	* @param r The floating point value to format. */
77	#define FLOAT_FMT_ARGS(r) (r) >= 0.0f ? "" : "-", (unsigned)RT_ABS(r), (unsigned)(RT_ABS((r) - (unsigned)(r)) * 1000000.0f)
78
79	/* Deprecated commands. They are not included in the VMSVGA headers anymore. */
80	#define SVGA_CMD_RECT_FILL 2
81	#define SVGA_CMD_DISPLAY_CURSOR 20
82	#define SVGA_CMD_MOVE_CURSOR 21
83
84	/*
85	* SVGA_CMD_RECT_FILL --
86	*
87	* Fill a rectangular area in the the GFB, and copy the result
88	* to any screens which intersect it.
89	*
90	* Deprecated?
91	*
92	* Availability:
93	* SVGA_CAP_RECT_FILL
94	*/
95
96	typedef
97	struct {
98	uint32_t pixel;
99	uint32_t destX;
100	uint32_t destY;
101	uint32_t width;
102	uint32_t height;
103	} SVGAFifoCmdRectFill;
104
105	/*
106	* SVGA_CMD_DISPLAY_CURSOR --
107	*
108	* Turn the cursor on or off.
109	*
110	* Deprecated.
111	*
112	* Availability:
113	* SVGA_CAP_CURSOR?
114	*/
115
116	typedef
117	struct {
118	uint32_t id; // Reserved, must be zero.
119	uint32_t state; // 0=off
120	} SVGAFifoCmdDisplayCursor;
121
122	/*
123	* SVGA_CMD_MOVE_CURSOR --
124	*
125	* Set the cursor position.
126	*
127	* Deprecated.
128	*
129	* Availability:
130	* SVGA_CAP_CURSOR?
131	*/
132
133	typedef
134	struct {
135	SVGASignedPoint pos;
136	} SVGAFifoCmdMoveCursor;
137
138
139	/** Default FIFO size. */
140	#define VMSVGA_FIFO_SIZE _2M
141	/** The old FIFO size. */
142	#define VMSVGA_FIFO_SIZE_OLD _128K
143
144	/** Default scratch region size. */
145	#define VMSVGA_SCRATCH_SIZE 0x100
146	/** Surface memory available to the guest. */
147	#define VMSVGA_SURFACE_SIZE (51210241024)
148	/** Maximum GMR pages. */
149	#define VMSVGA_MAX_GMR_PAGES 0x100000
150	/** Maximum nr of GMR ids. */
151	#define VMSVGA_MAX_GMR_IDS _8K
152	/** Maximum number of GMR descriptors. */
153	#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
154
155	#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
156
157	/** For validating X and width values.
158	* The code assumes it's at least an order of magnitude less than UINT32_MAX. */
159	#define VMSVGA_MAX_X _1M
160	/** For validating Y and height values.
161	* The code assumes it's at least an order of magnitude less than UINT32_MAX. */
162	#define VMSVGA_MAX_Y _1M
163
164	/* u32ActionFlags */
165	#define VMSVGA_ACTION_CHANGEMODE_BIT 0
166	#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
167
168
169	#ifdef DEBUG
170	/* Enable to log FIFO register accesses. */
171	//# define DEBUG_FIFO_ACCESS
172	/* Enable to log GMR page accesses. */
173	//# define DEBUG_GMR_ACCESS
174	#endif
175
176	#define VMSVGA_FIFO_EXTCMD_NONE 0
177	#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
178	#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
179	#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
180	#define VMSVGA_FIFO_EXTCMD_RESET 4
181	#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
182	#define VMSVGA_FIFO_EXTCMD_POWEROFF 6
183
184	/** Size of the region to backup when switching into svga mode. */
185	#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
186
187	/** @def VMSVGA_WITH_VGA_FB_BACKUP
188	* Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
189	* is SLOW and probably not entirely right, but it helps with getting 3dmark
190	* output and other stuff. */
191	#define VMSVGA_WITH_VGA_FB_BACKUP 1
192
193	/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
194	* defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
195	#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) \|\| defined(DOXYGEN_RUNNING)
196	# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
197	#else
198	# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
199	#endif
200
201	/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
202	* defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
203	#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) \|\| defined(DOXYGEN_RUNNING)
204	# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
205	#else
206	# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
207	#endif
208
209
210	typedef struct
211	{
212	PSSMHANDLE pSSM;
213	uint32_t uVersion;
214	uint32_t uPass;
215	} VMSVGA_STATE_LOAD;
216	typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
217
218	/** Host screen viewport.
219	* (4th quadrant with negated Y values - usual Windows and X11 world view.) */
220	typedef struct VMSVGAVIEWPORT
221	{
222	uint32_t x; /*< x coordinate (left). /
223	uint32_t y; /*< y coordinate (top). /
224	uint32_t cx; /*< width. /
225	uint32_t cy; /*< height. /
226	/** Right side coordinate (exclusive). Same as x + cx. */
227	uint32_t xRight;
228	/** First quadrant low y coordinate.
229	* Same as y + cy - 1 in window coordinates. */
230	uint32_t yLowWC;
231	/** First quadrant high y coordinate (exclusive) - yLowWC + cy.
232	* Same as y - 1 in window coordinates. */
233	uint32_t yHighWC;
234	/** Alignment padding. */
235	uint32_t uAlignment;
236	} VMSVGAVIEWPORT;
237
238	#ifdef VBOX_WITH_VMSVGA3D
239	typedef struct VMSVGAHWSCREEN *PVMSVGAHWSCREEN;
240	#endif
241
242	/**
243	* Screen object state.
244	*/
245	typedef struct VMSVGASCREENOBJECT
246	{
247	/** SVGA_SCREEN_* flags. */
248	uint32_t fuScreen;
249	/** The screen object id. */
250	uint32_t idScreen;
251	/** The screen dimensions. */
252	int32_t xOrigin;
253	int32_t yOrigin;
254	uint32_t cWidth;
255	uint32_t cHeight;
256	/** Offset of the screen buffer in the guest VRAM. */
257	uint32_t offVRAM;
258	/** Scanline pitch. */
259	uint32_t cbPitch;
260	/** Bits per pixel. */
261	uint32_t cBpp;
262	/** The physical DPI that the guest expects for this screen. Zero, if the guest is not DPI aware. */
263	uint32_t cDpi;
264	bool fDefined;
265	bool fModified;
266	void *pvScreenBitmap;
267	#ifdef VBOX_WITH_VMSVGA3D
268	/** Pointer to the HW accelerated (3D) screen data. */
269	R3PTRTYPE(PVMSVGAHWSCREEN) pHwScreen;
270	#endif
271	} VMSVGASCREENOBJECT;
272
273	/** Pointer to the private VMSVGA ring-3 state structure.
274	* @todo Still not entirely satisfired with the type name, but better than
275	* the previous lower/upper case only distinction. */
276	typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
277	/** Pointer to the private (implementation specific) VMSVGA3d state. */
278	typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
279
280
281	/**
282	* The VMSVGA device state.
283	*
284	* This instantatiated as VGASTATE::svga.
285	*/
286	typedef struct VMSVGAState
287	{
288	/** Guest physical address of the FIFO memory range. */
289	RTGCPHYS GCPhysFIFO;
290	/** Size in bytes of the FIFO memory range.
291	* This may be smaller than cbFIFOConfig after restoring an old VM state. */
292	uint32_t cbFIFO;
293	/** The configured FIFO size. */
294	uint32_t cbFIFOConfig;
295	/** SVGA id. */
296	uint32_t u32SVGAId;
297	/** SVGA extensions enabled or not. */
298	uint32_t fEnabled;
299	/** SVGA memory area configured status. */
300	uint32_t fConfigured;
301	/** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
302	* VMSVGA_BUSY_F_EMT_FORCE). */
303	uint32_t volatile fBusy;
304	#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /*< The normal true/false busy FIFO bit. /
305	#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /*< Bit preventing race status flickering when EMT kicks the FIFO thread. /
306	/** Traces (dirty page detection) enabled or not. */
307	uint32_t fTraces;
308	/** Guest OS identifier. */
309	uint32_t u32GuestId;
310	/** Scratch region size (VMSVGAState::au32ScratchRegion). */
311	uint32_t cScratchRegion;
312	/** Irq status. */
313	uint32_t u32IrqStatus;
314	/** Irq mask. */
315	uint32_t u32IrqMask;
316	/** Pitch lock. */
317	uint32_t u32PitchLock;
318	/** Current GMR id. (SVGA_REG_GMR_ID) */
319	uint32_t u32CurrentGMRId;
320	/** SVGA device capabilities. */
321	uint32_t u32DeviceCaps;
322	uint32_t Padding0; /* Used to be I/O port base address. */
323	/** Port io index register. */
324	uint32_t u32IndexReg;
325	/** FIFO request semaphore. */
326	SUPSEMEVENT hFIFORequestSem;
327	/** The last seen SVGA_FIFO_CURSOR_COUNT value.
328	* Used by the FIFO thread and its watchdog. */
329	uint32_t uLastCursorUpdateCount;
330	/** Indicates that the FIFO thread is sleeping and might need waking up. */
331	bool volatile fFIFOThreadSleeping;
332	/** The legacy GFB mode registers. If used, they correspond to screen 0. */
333	/** True when the guest modifies the GFB mode registers. */
334	bool fGFBRegisters;
335	/** SVGA 3D overlay enabled or not. */
336	bool f3DOverlayEnabled;
337	/** Indicates that the guest behaves incorrectly. */
338	bool volatile fBadGuest;
339	bool afPadding[4];
340	uint32_t uWidth;
341	uint32_t uHeight;
342	uint32_t uBpp;
343	uint32_t cbScanline;
344	uint32_t uHostBpp;
345	/** Maximum width supported. */
346	uint32_t u32MaxWidth;
347	/** Maximum height supported. */
348	uint32_t u32MaxHeight;
349	/** Viewport rectangle, i.e. what's currently visible of the target host
350	* window. This is usually (0,0)(uWidth,uHeight), but if the window is
351	* shrunk and scrolling applied, both the origin and size may differ. */
352	VMSVGAVIEWPORT viewport;
353	/** Action flags */
354	uint32_t u32ActionFlags;
355	/** SVGA 3d extensions enabled or not. */
356	bool f3DEnabled;
357	/** VRAM page monitoring enabled or not. */
358	bool fVRAMTracking;
359	/** External command to be executed in the FIFO thread. */
360	uint8_t volatile u8FIFOExtCommand;
361	/** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
362	* thread and does not want it do anything but the command. */
363	bool volatile fFifoExtCommandWakeup;
364	#ifdef DEBUG_GMR_ACCESS
365	/** GMR debug access handler type handle. */
366	PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
367	#endif
368	#if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) \|\| defined(DEBUG_FIFO_ACCESS)
369	/** FIFO debug access handler type handle. */
370	PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
371	#elif defined(DEBUG_GMR_ACCESS)
372	uint32_t uPadding1;
373	#endif
374	/** Number of GMRs (VMSVGA_MAX_GMR_IDS, count of elements in VMSVGAR3STATE::paGMR array). */
375	uint32_t cGMR;
376	uint32_t uScreenOffset; /* Used only for loading older saved states. */
377
378	/** Legacy cursor state. */
379	uint32_t uCursorX;
380	uint32_t uCursorY;
381	uint32_t uCursorID;
382	uint32_t uCursorOn;
383
384	/** Scratch array.
385	* Putting this at the end since it's big it probably not . */
386	uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
387
388	/** Array of SVGA3D_DEVCAP values, which are accessed via SVGA_REG_DEV_CAP. */
389	uint32_t au32DevCaps[SVGA3D_DEVCAP_MAX];
390	/** Index written to the SVGA_REG_DEV_CAP register. */
391	uint32_t u32DevCapIndex;
392	/** Low 32 bit of a command buffer address written to the SVGA_REG_COMMAND_LOW register. */
393	uint32_t u32RegCommandLow;
394	/** High 32 bit of a command buffer address written to the SVGA_REG_COMMAND_HIGH register. */
395	uint32_t u32RegCommandHigh;
396
397	STAMCOUNTER StatRegBitsPerPixelWr;
398	STAMCOUNTER StatRegBusyWr;
399	STAMCOUNTER StatRegCursorXWr;
400	STAMCOUNTER StatRegCursorYWr;
401	STAMCOUNTER StatRegCursorIdWr;
402	STAMCOUNTER StatRegCursorOnWr;
403	STAMCOUNTER StatRegDepthWr;
404	STAMCOUNTER StatRegDisplayHeightWr;
405	STAMCOUNTER StatRegDisplayIdWr;
406	STAMCOUNTER StatRegDisplayIsPrimaryWr;
407	STAMCOUNTER StatRegDisplayPositionXWr;
408	STAMCOUNTER StatRegDisplayPositionYWr;
409	STAMCOUNTER StatRegDisplayWidthWr;
410	STAMCOUNTER StatRegEnableWr;
411	STAMCOUNTER StatRegGmrIdWr;
412	STAMCOUNTER StatRegGuestIdWr;
413	STAMCOUNTER StatRegHeightWr;
414	STAMCOUNTER StatRegIdWr;
415	STAMCOUNTER StatRegIrqMaskWr;
416	STAMCOUNTER StatRegNumDisplaysWr;
417	STAMCOUNTER StatRegNumGuestDisplaysWr;
418	STAMCOUNTER StatRegPaletteWr;
419	STAMCOUNTER StatRegPitchLockWr;
420	STAMCOUNTER StatRegPseudoColorWr;
421	STAMCOUNTER StatRegReadOnlyWr;
422	STAMCOUNTER StatRegScratchWr;
423	STAMCOUNTER StatRegSyncWr;
424	STAMCOUNTER StatRegTopWr;
425	STAMCOUNTER StatRegTracesWr;
426	STAMCOUNTER StatRegUnknownWr;
427	STAMCOUNTER StatRegWidthWr;
428	STAMCOUNTER StatRegCommandLowWr;
429	STAMCOUNTER StatRegCommandHighWr;
430	STAMCOUNTER StatRegDevCapWr;
431	STAMCOUNTER StatRegCmdPrependLowWr;
432	STAMCOUNTER StatRegCmdPrependHighWr;
433
434	STAMCOUNTER StatRegBitsPerPixelRd;
435	STAMCOUNTER StatRegBlueMaskRd;
436	STAMCOUNTER StatRegBusyRd;
437	STAMCOUNTER StatRegBytesPerLineRd;
438	STAMCOUNTER StatRegCapabilitesRd;
439	STAMCOUNTER StatRegConfigDoneRd;
440	STAMCOUNTER StatRegCursorXRd;
441	STAMCOUNTER StatRegCursorYRd;
442	STAMCOUNTER StatRegCursorIdRd;
443	STAMCOUNTER StatRegCursorOnRd;
444	STAMCOUNTER StatRegDepthRd;
445	STAMCOUNTER StatRegDisplayHeightRd;
446	STAMCOUNTER StatRegDisplayIdRd;
447	STAMCOUNTER StatRegDisplayIsPrimaryRd;
448	STAMCOUNTER StatRegDisplayPositionXRd;
449	STAMCOUNTER StatRegDisplayPositionYRd;
450	STAMCOUNTER StatRegDisplayWidthRd;
451	STAMCOUNTER StatRegEnableRd;
452	STAMCOUNTER StatRegFbOffsetRd;
453	STAMCOUNTER StatRegFbSizeRd;
454	STAMCOUNTER StatRegFbStartRd;
455	STAMCOUNTER StatRegGmrIdRd;
456	STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
457	STAMCOUNTER StatRegGmrMaxIdsRd;
458	STAMCOUNTER StatRegGmrsMaxPagesRd;
459	STAMCOUNTER StatRegGreenMaskRd;
460	STAMCOUNTER StatRegGuestIdRd;
461	STAMCOUNTER StatRegHeightRd;
462	STAMCOUNTER StatRegHostBitsPerPixelRd;
463	STAMCOUNTER StatRegIdRd;
464	STAMCOUNTER StatRegIrqMaskRd;
465	STAMCOUNTER StatRegMaxHeightRd;
466	STAMCOUNTER StatRegMaxWidthRd;
467	STAMCOUNTER StatRegMemorySizeRd;
468	STAMCOUNTER StatRegMemRegsRd;
469	STAMCOUNTER StatRegMemSizeRd;
470	STAMCOUNTER StatRegMemStartRd;
471	STAMCOUNTER StatRegNumDisplaysRd;
472	STAMCOUNTER StatRegNumGuestDisplaysRd;
473	STAMCOUNTER StatRegPaletteRd;
474	STAMCOUNTER StatRegPitchLockRd;
475	STAMCOUNTER StatRegPsuedoColorRd;
476	STAMCOUNTER StatRegRedMaskRd;
477	STAMCOUNTER StatRegScratchRd;
478	STAMCOUNTER StatRegScratchSizeRd;
479	STAMCOUNTER StatRegSyncRd;
480	STAMCOUNTER StatRegTopRd;
481	STAMCOUNTER StatRegTracesRd;
482	STAMCOUNTER StatRegUnknownRd;
483	STAMCOUNTER StatRegVramSizeRd;
484	STAMCOUNTER StatRegWidthRd;
485	STAMCOUNTER StatRegWriteOnlyRd;
486	STAMCOUNTER StatRegCommandLowRd;
487	STAMCOUNTER StatRegCommandHighRd;
488	STAMCOUNTER StatRegMaxPrimBBMemRd;
489	STAMCOUNTER StatRegGBMemSizeRd;
490	STAMCOUNTER StatRegDevCapRd;
491	STAMCOUNTER StatRegCmdPrependLowRd;
492	STAMCOUNTER StatRegCmdPrependHighRd;
493	STAMCOUNTER StatRegScrnTgtMaxWidthRd;
494	STAMCOUNTER StatRegScrnTgtMaxHeightRd;
495	STAMCOUNTER StatRegMobMaxSizeRd;
496	} VMSVGAState, VMSVGASTATE;
497
498
499	/**
500	* The VMSVGA device state for ring-3
501	*
502	* This instantatiated as VGASTATER3::svga.
503	*/
504	typedef struct VMSVGASTATER3
505	{
506	/** The R3 FIFO pointer. */
507	R3PTRTYPE(uint32_t *) pau32FIFO;
508	/** R3 Opaque pointer to svga state. */
509	R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
510	/** R3 Opaque pointer to 3d state. */
511	R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
512	/** The separate VGA frame buffer in svga mode.
513	* Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
514	* separate frame buffer for VGA and allows concurrent use of both. The SVGA
515	* SDK is making use of this to do VGA text output while testing other things in
516	* SVGA mode, displaying the result by switching back to VGA text mode. So,
517	* when entering SVGA mode we copy the first part of the frame buffer here and
518	* direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
519	R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
520	/** R3 Opaque pointer to an external fifo cmd parameter. */
521	R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
522
523	/** FIFO external command semaphore. */
524	R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem;
525	/** FIFO IO Thread. */
526	R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
527	} VMSVGASTATER3;
528
529
530	/**
531	* The VMSVGA device state for ring-0
532	*
533	* This instantatiated as VGASTATER0::svga.
534	*/
535	typedef struct VMSVGASTATER0
536	{
537	/** The R0 FIFO pointer.
538	* @note This only points to the _first_ _page_ of the FIFO! */
539	R0PTRTYPE(uint32_t *) pau32FIFO;
540	} VMSVGASTATER0;
541
542
543	typedef struct VGAState *PVGASTATE;
544	typedef struct VGASTATER3 *PVGASTATER3;
545	typedef struct VGASTATER0 *PVGASTATER0;
546	typedef struct VGASTATERC *PVGASTATERC;
547	typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
548
549	DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
550	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
551	DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT offPort, uint32_t pu32, unsigned cb);
552	DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb);
553
554	DECLCALLBACK(void) vmsvgaR3PortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
555	uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
556	DECLCALLBACK(void) vmsvgaR3PortReportMonitorPositions(PPDMIDISPLAYPORT pInterface, uint32_t cPositions, PCRTPOINT paPositions);
557
558	int vmsvgaR3Init(PPDMDEVINS pDevIns);
559	int vmsvgaR3Reset(PPDMDEVINS pDevIns);
560	int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
561	int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
562	int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
563	int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
564	DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
565	DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
566	void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
567
568	#ifdef IN_RING3
569	VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen);
570	int vmsvgaR3UpdateScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
571	#endif
572
573	int vmsvgaR3GmrTransfer(PVGASTATE pThis, PVGASTATECC pThisCC, const SVGA3dTransferType enmTransferType,
574	uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
575	SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
576	uint32_t cbWidth, uint32_t cHeight);
577
578	void vmsvgaR3ClipCopyBox(const SVGA3dSize pSizeSrc, const SVGA3dSize pSizeDest, SVGA3dCopyBox *pBox);
579	void vmsvgaR3ClipBox(const SVGA3dSize pSize, SVGA3dBox pBox);
580	void vmsvgaR3ClipRect(SVGASignedRect const pBound, SVGASignedRect pRect);
581	void vmsvgaR3Clip3dRect(SVGA3dRect const pBound, SVGA3dRect RT_UNTRUSTED_GUEST pRect);
582
583	/*
584	* GBO (Guest Backed Object).
585	* A GBO is a list of the guest pages. GBOs are used for VMSVGA MOBs (Memory OBjects)
586	* and Object Tables which the guest shares with the host.
587	*
588	* A GBO is similar to a GMR. Nevertheless I'll create a new code for GBOs in order
589	* to avoid tweaking and possibly breaking existing code. Moreover it will be probably possible to
590	* map the guest pages into the host R3 memory and access them directly.
591	*/
592
593	/* GBO descriptor. */
594	typedef struct VMSVGAGBODESCRIPTOR
595	{
596	RTGCPHYS GCPhys;
597	uint64_t cPages;
598	} VMSVGAGBODESCRIPTOR, *PVMSVGAGBODESCRIPTOR;
599	typedef VMSVGAGBODESCRIPTOR const *PCVMSVGAGBODESCRIPTOR;
600
601	/* GBO.
602	*/
603	typedef struct VMSVGAGBO
604	{
605	uint32_t fGboFlags;
606	uint32_t cTotalPages;
607	uint32_t cbTotal;
608	uint32_t cDescriptors;
609	PVMSVGAGBODESCRIPTOR paDescriptors;
610	void pvHost; / Pointer to cbTotal bytes on the host if VMSVGAGBO_F_HOST_BACKED is set. */
611	} VMSVGAGBO, *PVMSVGAGBO;
612	typedef VMSVGAGBO const *PCVMSVGAGBO;
613
614	#define VMSVGAGBO_F_WRITE_PROTECTED 0x1
615	#define VMSVGAGBO_F_HOST_BACKED 0x2
616
617	#define VMSVGA_IS_GBO_CREATED(a_Gbo) ((a_Gbo)->paDescriptors != NULL)
618
619	/* MOB is also a GBO.
620	*/
621	typedef struct VMSVGAMOB
622	{
623	AVLU32NODECORE Core; /* Key is the mobid. */
624	RTLISTNODE nodeLRU;
625	VMSVGAGBO Gbo;
626	} VMSVGAMOB, *PVMSVGAMOB;
627	typedef VMSVGAMOB const *PCVMSVGAMOB;
628
629	int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid);
630	void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
631	int vmsvgaR3MobBackingStoreWriteToGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
632	int vmsvgaR3MobBackingStoreReadFromGuest(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
633	void *vmsvgaR3MobBackingStorePtr(PVMSVGAMOB pMob, uint32_t off);
634
635	DECLINLINE(uint32_t) vmsvgaR3MobSize(PVMSVGAMOB pMob)
636	{
637	if (pMob)
638	return pMob->Gbo.cbTotal;
639	return 0;
640	}
641
642	DECLINLINE(uint32_t) vmsvgaR3MobId(PVMSVGAMOB pMob)
643	{
644	if (pMob)
645	return pMob->Core.Key;
646	return SVGA_ID_INVALID;
647	}
648
649	#ifdef DEBUG
650	#define DEBUG_BREAKPOINT_TEST() do { ASMBreakpoint(); } while (0)
651	#else
652	#define DEBUG_BREAKPOINT_TEST() do { } while (0)
653	#endif
654
655	#ifdef VBOX_WITH_VMSVGA3D
656	int vmsvgaR3UpdateGBSurface(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImageId, SVGA3dBox const pBox);
657	int vmsvgaR3UpdateGBSurfaceEx(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImageId, SVGA3dBox const pBoxDst, SVGA3dPoint const *pPtSrc);
658	#endif
659
660	#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h@ 93115

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