1 | /* $Id: DevVGA-SVGA.h 88838 2021-05-03 14:21:10Z vboxsync $ */
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2 | /** @file
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3 | * VMware SVGA device
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4 | */
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5 | /*
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6 | * Copyright (C) 2013-2020 Oracle Corporation
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7 | *
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8 | * This file is part of VirtualBox Open Source Edition (OSE), as
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9 | * available from http://www.virtualbox.org. This file is free software;
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10 | * you can redistribute it and/or modify it under the terms of the GNU
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11 | * General Public License (GPL) as published by the Free Software
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12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | */
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16 |
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17 | #ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
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18 | #define VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
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19 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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20 | # pragma once
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21 | #endif
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22 |
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23 | #ifndef VBOX_WITH_VMSVGA
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24 | # error "VBOX_WITH_VMSVGA is not defined"
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25 | #endif
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26 |
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27 | #define VMSVGA_USE_EMT_HALT_CODE
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28 |
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29 | #include <VBox/pci.h>
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30 | #include <VBox/vmm/pdmifs.h>
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31 | #include <VBox/vmm/pdmthread.h>
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32 | #include <VBox/vmm/stam.h>
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33 | #ifdef VMSVGA_USE_EMT_HALT_CODE
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34 | # include <VBox/vmm/vmapi.h>
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35 | # include <VBox/vmm/vmcpuset.h>
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36 | #endif
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37 |
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38 | #include <iprt/avl.h>
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39 | #include <iprt/list.h>
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40 |
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41 |
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42 | /*
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43 | * PCI device IDs.
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44 | */
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45 | #ifndef PCI_VENDOR_ID_VMWARE
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46 | # define PCI_VENDOR_ID_VMWARE 0x15AD
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47 | #endif
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48 | #ifndef PCI_DEVICE_ID_VMWARE_SVGA2
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49 | # define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
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50 | #endif
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51 |
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52 | /* For "svga_overlay.h" */
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53 | #ifndef TRUE
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54 | # define TRUE 1
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55 | #endif
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56 | #ifndef FALSE
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57 | # define FALSE 0
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58 | #endif
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59 |
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60 | /* VMSVGA headers. */
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61 | #include "vmsvga_headers_begin.h"
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62 | #pragma pack(1) /* VMSVGA structures are '__packed'. */
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63 | #include <svga3d_caps.h>
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64 | #include <svga3d_reg.h>
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65 | #include <svga3d_shaderdefs.h>
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66 | #include <svga_escape.h>
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67 | #include <svga_overlay.h>
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68 | #pragma pack()
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69 | #include "vmsvga_headers_end.h"
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70 |
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71 | /**@def FLOAT_FMT_STR
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72 | * Format string bits to go with FLOAT_FMT_ARGS. */
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73 | #define FLOAT_FMT_STR "%s%u.%06u"
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74 | /** @def FLOAT_FMT_ARGS
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75 | * Format arguments for a float value, corresponding to FLOAT_FMT_STR.
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76 | * @param r The floating point value to format. */
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77 | #define FLOAT_FMT_ARGS(r) (r) >= 0.0f ? "" : "-", (unsigned)RT_ABS(r), (unsigned)(RT_ABS((r) - (unsigned)(r)) * 1000000.0f)
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78 |
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79 | /* Deprecated commands. They are not included in the VMSVGA headers anymore. */
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80 | #define SVGA_CMD_RECT_FILL 2
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81 | #define SVGA_CMD_DISPLAY_CURSOR 20
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82 | #define SVGA_CMD_MOVE_CURSOR 21
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83 |
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84 | /*
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85 | * SVGA_CMD_RECT_FILL --
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86 | *
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87 | * Fill a rectangular area in the the GFB, and copy the result
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88 | * to any screens which intersect it.
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89 | *
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90 | * Deprecated?
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91 | *
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92 | * Availability:
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93 | * SVGA_CAP_RECT_FILL
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94 | */
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95 |
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96 | typedef
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97 | struct {
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98 | uint32_t pixel;
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99 | uint32_t destX;
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100 | uint32_t destY;
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101 | uint32_t width;
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102 | uint32_t height;
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103 | } SVGAFifoCmdRectFill;
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104 |
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105 | /*
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106 | * SVGA_CMD_DISPLAY_CURSOR --
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107 | *
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108 | * Turn the cursor on or off.
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109 | *
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110 | * Deprecated.
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111 | *
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112 | * Availability:
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113 | * SVGA_CAP_CURSOR?
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114 | */
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115 |
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116 | typedef
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117 | struct {
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118 | uint32_t id; // Reserved, must be zero.
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119 | uint32_t state; // 0=off
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120 | } SVGAFifoCmdDisplayCursor;
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121 |
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122 | /*
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123 | * SVGA_CMD_MOVE_CURSOR --
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124 | *
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125 | * Set the cursor position.
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126 | *
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127 | * Deprecated.
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128 | *
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129 | * Availability:
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130 | * SVGA_CAP_CURSOR?
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131 | */
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132 |
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133 | typedef
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134 | struct {
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135 | SVGASignedPoint pos;
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136 | } SVGAFifoCmdMoveCursor;
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137 |
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138 |
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139 | /** Default FIFO size. */
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140 | #define VMSVGA_FIFO_SIZE _2M
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141 | /** The old FIFO size. */
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142 | #define VMSVGA_FIFO_SIZE_OLD _128K
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143 |
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144 | /** Default scratch region size. */
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145 | #define VMSVGA_SCRATCH_SIZE 0x100
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146 | /** Surface memory available to the guest. */
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147 | #define VMSVGA_SURFACE_SIZE (512*1024*1024)
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148 | /** Maximum GMR pages. */
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149 | #define VMSVGA_MAX_GMR_PAGES 0x100000
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150 | /** Maximum nr of GMR ids. */
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151 | #define VMSVGA_MAX_GMR_IDS _8K
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152 | /** Maximum number of GMR descriptors. */
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153 | #define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
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154 |
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155 | #define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
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156 |
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157 | /** For validating X and width values.
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158 | * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
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159 | #define VMSVGA_MAX_X _1M
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160 | /** For validating Y and height values.
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161 | * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
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162 | #define VMSVGA_MAX_Y _1M
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163 |
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164 | /* u32ActionFlags */
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165 | #define VMSVGA_ACTION_CHANGEMODE_BIT 0
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166 | #define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
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167 |
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168 |
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169 | #ifdef DEBUG
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170 | /* Enable to log FIFO register accesses. */
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171 | //# define DEBUG_FIFO_ACCESS
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172 | /* Enable to log GMR page accesses. */
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173 | //# define DEBUG_GMR_ACCESS
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174 | #endif
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175 |
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176 | #define VMSVGA_FIFO_EXTCMD_NONE 0
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177 | #define VMSVGA_FIFO_EXTCMD_TERMINATE 1
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178 | #define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
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179 | #define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
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180 | #define VMSVGA_FIFO_EXTCMD_RESET 4
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181 | #define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
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182 | #define VMSVGA_FIFO_EXTCMD_POWEROFF 6
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183 |
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184 | /** Size of the region to backup when switching into svga mode. */
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185 | #define VMSVGA_VGA_FB_BACKUP_SIZE _512K
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186 |
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187 | /** @def VMSVGA_WITH_VGA_FB_BACKUP
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188 | * Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
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189 | * is SLOW and probably not entirely right, but it helps with getting 3dmark
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190 | * output and other stuff. */
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191 | #define VMSVGA_WITH_VGA_FB_BACKUP 1
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192 |
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193 | /** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
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194 | * defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
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195 | #if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
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196 | # define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
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197 | #else
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198 | # undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
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199 | #endif
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200 |
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201 | /** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
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202 | * defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
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203 | #if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
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204 | # define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
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205 | #else
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206 | # undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
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207 | #endif
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208 |
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209 |
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210 | typedef struct
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211 | {
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212 | PSSMHANDLE pSSM;
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213 | uint32_t uVersion;
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214 | uint32_t uPass;
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215 | } VMSVGA_STATE_LOAD;
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216 | typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
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217 |
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218 | /** Host screen viewport.
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219 | * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
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220 | typedef struct VMSVGAVIEWPORT
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221 | {
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222 | uint32_t x; /**< x coordinate (left). */
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223 | uint32_t y; /**< y coordinate (top). */
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224 | uint32_t cx; /**< width. */
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225 | uint32_t cy; /**< height. */
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226 | /** Right side coordinate (exclusive). Same as x + cx. */
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227 | uint32_t xRight;
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228 | /** First quadrant low y coordinate.
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229 | * Same as y + cy - 1 in window coordinates. */
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230 | uint32_t yLowWC;
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231 | /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
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232 | * Same as y - 1 in window coordinates. */
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233 | uint32_t yHighWC;
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234 | /** Alignment padding. */
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235 | uint32_t uAlignment;
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236 | } VMSVGAVIEWPORT;
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237 |
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238 | #ifdef VBOX_WITH_VMSVGA3D
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239 | typedef struct VMSVGAHWSCREEN *PVMSVGAHWSCREEN;
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240 | #endif
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241 |
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242 | /**
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243 | * Screen object state.
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244 | */
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245 | typedef struct VMSVGASCREENOBJECT
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246 | {
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247 | /** SVGA_SCREEN_* flags. */
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248 | uint32_t fuScreen;
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249 | /** The screen object id. */
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250 | uint32_t idScreen;
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251 | /** The screen dimensions. */
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252 | int32_t xOrigin;
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253 | int32_t yOrigin;
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254 | uint32_t cWidth;
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255 | uint32_t cHeight;
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256 | /** Offset of the screen buffer in the guest VRAM. */
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257 | uint32_t offVRAM;
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258 | /** Scanline pitch. */
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259 | uint32_t cbPitch;
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260 | /** Bits per pixel. */
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261 | uint32_t cBpp;
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262 | /** The physical DPI that the guest expects for this screen. Zero, if the guest is not DPI aware. */
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263 | uint32_t cDpi;
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264 | bool fDefined;
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265 | bool fModified;
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266 | void *pvScreenBitmap;
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267 | #ifdef VBOX_WITH_VMSVGA3D
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268 | /** Pointer to the HW accelerated (3D) screen data. */
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269 | R3PTRTYPE(PVMSVGAHWSCREEN) pHwScreen;
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270 | #endif
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271 | } VMSVGASCREENOBJECT;
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272 |
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273 | /** Pointer to the private VMSVGA ring-3 state structure.
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274 | * @todo Still not entirely satisfired with the type name, but better than
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275 | * the previous lower/upper case only distinction. */
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276 | typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
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277 | /** Pointer to the private (implementation specific) VMSVGA3d state. */
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278 | typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
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279 |
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280 |
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281 | /**
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282 | * The VMSVGA device state.
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283 | *
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284 | * This instantatiated as VGASTATE::svga.
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285 | */
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286 | typedef struct VMSVGAState
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287 | {
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288 | /** Guest physical address of the FIFO memory range. */
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289 | RTGCPHYS GCPhysFIFO;
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290 | /** Size in bytes of the FIFO memory range.
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291 | * This may be smaller than cbFIFOConfig after restoring an old VM state. */
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292 | uint32_t cbFIFO;
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293 | /** The configured FIFO size. */
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294 | uint32_t cbFIFOConfig;
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295 | /** SVGA id. */
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296 | uint32_t u32SVGAId;
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297 | /** SVGA extensions enabled or not. */
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298 | uint32_t fEnabled;
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299 | /** SVGA memory area configured status. */
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300 | uint32_t fConfigured;
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301 | /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
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302 | * VMSVGA_BUSY_F_EMT_FORCE). */
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303 | uint32_t volatile fBusy;
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304 | #define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
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305 | #define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
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306 | /** Traces (dirty page detection) enabled or not. */
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307 | uint32_t fTraces;
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308 | /** Guest OS identifier. */
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309 | uint32_t u32GuestId;
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310 | /** Scratch region size (VMSVGAState::au32ScratchRegion). */
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311 | uint32_t cScratchRegion;
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312 | /** Irq status. */
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313 | uint32_t u32IrqStatus;
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314 | /** Irq mask. */
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315 | uint32_t u32IrqMask;
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316 | /** Pitch lock. */
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317 | uint32_t u32PitchLock;
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318 | /** Current GMR id. (SVGA_REG_GMR_ID) */
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319 | uint32_t u32CurrentGMRId;
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320 | /** SVGA device capabilities. */
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321 | uint32_t u32DeviceCaps;
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322 | uint32_t Padding0; /* Used to be I/O port base address. */
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323 | /** Port io index register. */
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324 | uint32_t u32IndexReg;
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325 | /** FIFO request semaphore. */
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326 | SUPSEMEVENT hFIFORequestSem;
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327 | /** The last seen SVGA_FIFO_CURSOR_COUNT value.
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328 | * Used by the FIFO thread and its watchdog. */
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329 | uint32_t uLastCursorUpdateCount;
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330 | /** Indicates that the FIFO thread is sleeping and might need waking up. */
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331 | bool volatile fFIFOThreadSleeping;
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332 | /** The legacy GFB mode registers. If used, they correspond to screen 0. */
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333 | /** True when the guest modifies the GFB mode registers. */
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334 | bool fGFBRegisters;
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335 | /** SVGA 3D overlay enabled or not. */
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336 | bool f3DOverlayEnabled;
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337 | /** Indicates that the guest behaves incorrectly. */
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338 | bool volatile fBadGuest;
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339 | bool afPadding[4];
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340 | uint32_t uWidth;
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341 | uint32_t uHeight;
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342 | uint32_t uBpp;
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343 | uint32_t cbScanline;
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344 | uint32_t uHostBpp;
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345 | /** Maximum width supported. */
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346 | uint32_t u32MaxWidth;
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347 | /** Maximum height supported. */
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348 | uint32_t u32MaxHeight;
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349 | /** Viewport rectangle, i.e. what's currently visible of the target host
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350 | * window. This is usually (0,0)(uWidth,uHeight), but if the window is
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351 | * shrunk and scrolling applied, both the origin and size may differ. */
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352 | VMSVGAVIEWPORT viewport;
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353 | /** Action flags */
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354 | uint32_t u32ActionFlags;
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355 | /** SVGA 3d extensions enabled or not. */
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356 | bool f3DEnabled;
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357 | /** VRAM page monitoring enabled or not. */
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358 | bool fVRAMTracking;
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359 | /** External command to be executed in the FIFO thread. */
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360 | uint8_t volatile u8FIFOExtCommand;
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361 | /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
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362 | * thread and does not want it do anything but the command. */
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363 | bool volatile fFifoExtCommandWakeup;
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364 | #ifdef DEBUG_GMR_ACCESS
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365 | /** GMR debug access handler type handle. */
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366 | PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
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367 | #endif
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368 | #if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) || defined(DEBUG_FIFO_ACCESS)
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369 | /** FIFO debug access handler type handle. */
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370 | PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
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371 | #elif defined(DEBUG_GMR_ACCESS)
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372 | uint32_t uPadding1;
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373 | #endif
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374 | /** Number of GMRs (VMSVGA_MAX_GMR_IDS, count of elements in VMSVGAR3STATE::paGMR array). */
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375 | uint32_t cGMR;
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376 | uint32_t uScreenOffset; /* Used only for loading older saved states. */
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377 |
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378 | /** Legacy cursor state. */
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379 | uint32_t uCursorX;
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380 | uint32_t uCursorY;
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381 | uint32_t uCursorID;
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382 | uint32_t uCursorOn;
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383 |
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384 | /** Scratch array.
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385 | * Putting this at the end since it's big it probably not . */
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386 | uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
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387 |
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388 | /** Array of SVGA3D_DEVCAP values, which are accessed via SVGA_REG_DEV_CAP. */
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389 | uint32_t au32DevCaps[SVGA3D_DEVCAP_MAX];
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390 | /** Index written to the SVGA_REG_DEV_CAP register. */
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391 | uint32_t u32DevCapIndex;
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392 | /** Low 32 bit of a command buffer address written to the SVGA_REG_COMMAND_LOW register. */
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393 | uint32_t u32RegCommandLow;
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394 | /** High 32 bit of a command buffer address written to the SVGA_REG_COMMAND_HIGH register. */
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395 | uint32_t u32RegCommandHigh;
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396 |
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397 | STAMCOUNTER StatRegBitsPerPixelWr;
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398 | STAMCOUNTER StatRegBusyWr;
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399 | STAMCOUNTER StatRegCursorXWr;
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400 | STAMCOUNTER StatRegCursorYWr;
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401 | STAMCOUNTER StatRegCursorIdWr;
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402 | STAMCOUNTER StatRegCursorOnWr;
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403 | STAMCOUNTER StatRegDepthWr;
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404 | STAMCOUNTER StatRegDisplayHeightWr;
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405 | STAMCOUNTER StatRegDisplayIdWr;
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406 | STAMCOUNTER StatRegDisplayIsPrimaryWr;
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407 | STAMCOUNTER StatRegDisplayPositionXWr;
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408 | STAMCOUNTER StatRegDisplayPositionYWr;
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409 | STAMCOUNTER StatRegDisplayWidthWr;
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410 | STAMCOUNTER StatRegEnableWr;
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411 | STAMCOUNTER StatRegGmrIdWr;
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412 | STAMCOUNTER StatRegGuestIdWr;
|
---|
413 | STAMCOUNTER StatRegHeightWr;
|
---|
414 | STAMCOUNTER StatRegIdWr;
|
---|
415 | STAMCOUNTER StatRegIrqMaskWr;
|
---|
416 | STAMCOUNTER StatRegNumDisplaysWr;
|
---|
417 | STAMCOUNTER StatRegNumGuestDisplaysWr;
|
---|
418 | STAMCOUNTER StatRegPaletteWr;
|
---|
419 | STAMCOUNTER StatRegPitchLockWr;
|
---|
420 | STAMCOUNTER StatRegPseudoColorWr;
|
---|
421 | STAMCOUNTER StatRegReadOnlyWr;
|
---|
422 | STAMCOUNTER StatRegScratchWr;
|
---|
423 | STAMCOUNTER StatRegSyncWr;
|
---|
424 | STAMCOUNTER StatRegTopWr;
|
---|
425 | STAMCOUNTER StatRegTracesWr;
|
---|
426 | STAMCOUNTER StatRegUnknownWr;
|
---|
427 | STAMCOUNTER StatRegWidthWr;
|
---|
428 | STAMCOUNTER StatRegCommandLowWr;
|
---|
429 | STAMCOUNTER StatRegCommandHighWr;
|
---|
430 | STAMCOUNTER StatRegDevCapWr;
|
---|
431 | STAMCOUNTER StatRegCmdPrependLowWr;
|
---|
432 | STAMCOUNTER StatRegCmdPrependHighWr;
|
---|
433 |
|
---|
434 | STAMCOUNTER StatRegBitsPerPixelRd;
|
---|
435 | STAMCOUNTER StatRegBlueMaskRd;
|
---|
436 | STAMCOUNTER StatRegBusyRd;
|
---|
437 | STAMCOUNTER StatRegBytesPerLineRd;
|
---|
438 | STAMCOUNTER StatRegCapabilitesRd;
|
---|
439 | STAMCOUNTER StatRegConfigDoneRd;
|
---|
440 | STAMCOUNTER StatRegCursorXRd;
|
---|
441 | STAMCOUNTER StatRegCursorYRd;
|
---|
442 | STAMCOUNTER StatRegCursorIdRd;
|
---|
443 | STAMCOUNTER StatRegCursorOnRd;
|
---|
444 | STAMCOUNTER StatRegDepthRd;
|
---|
445 | STAMCOUNTER StatRegDisplayHeightRd;
|
---|
446 | STAMCOUNTER StatRegDisplayIdRd;
|
---|
447 | STAMCOUNTER StatRegDisplayIsPrimaryRd;
|
---|
448 | STAMCOUNTER StatRegDisplayPositionXRd;
|
---|
449 | STAMCOUNTER StatRegDisplayPositionYRd;
|
---|
450 | STAMCOUNTER StatRegDisplayWidthRd;
|
---|
451 | STAMCOUNTER StatRegEnableRd;
|
---|
452 | STAMCOUNTER StatRegFbOffsetRd;
|
---|
453 | STAMCOUNTER StatRegFbSizeRd;
|
---|
454 | STAMCOUNTER StatRegFbStartRd;
|
---|
455 | STAMCOUNTER StatRegGmrIdRd;
|
---|
456 | STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
|
---|
457 | STAMCOUNTER StatRegGmrMaxIdsRd;
|
---|
458 | STAMCOUNTER StatRegGmrsMaxPagesRd;
|
---|
459 | STAMCOUNTER StatRegGreenMaskRd;
|
---|
460 | STAMCOUNTER StatRegGuestIdRd;
|
---|
461 | STAMCOUNTER StatRegHeightRd;
|
---|
462 | STAMCOUNTER StatRegHostBitsPerPixelRd;
|
---|
463 | STAMCOUNTER StatRegIdRd;
|
---|
464 | STAMCOUNTER StatRegIrqMaskRd;
|
---|
465 | STAMCOUNTER StatRegMaxHeightRd;
|
---|
466 | STAMCOUNTER StatRegMaxWidthRd;
|
---|
467 | STAMCOUNTER StatRegMemorySizeRd;
|
---|
468 | STAMCOUNTER StatRegMemRegsRd;
|
---|
469 | STAMCOUNTER StatRegMemSizeRd;
|
---|
470 | STAMCOUNTER StatRegMemStartRd;
|
---|
471 | STAMCOUNTER StatRegNumDisplaysRd;
|
---|
472 | STAMCOUNTER StatRegNumGuestDisplaysRd;
|
---|
473 | STAMCOUNTER StatRegPaletteRd;
|
---|
474 | STAMCOUNTER StatRegPitchLockRd;
|
---|
475 | STAMCOUNTER StatRegPsuedoColorRd;
|
---|
476 | STAMCOUNTER StatRegRedMaskRd;
|
---|
477 | STAMCOUNTER StatRegScratchRd;
|
---|
478 | STAMCOUNTER StatRegScratchSizeRd;
|
---|
479 | STAMCOUNTER StatRegSyncRd;
|
---|
480 | STAMCOUNTER StatRegTopRd;
|
---|
481 | STAMCOUNTER StatRegTracesRd;
|
---|
482 | STAMCOUNTER StatRegUnknownRd;
|
---|
483 | STAMCOUNTER StatRegVramSizeRd;
|
---|
484 | STAMCOUNTER StatRegWidthRd;
|
---|
485 | STAMCOUNTER StatRegWriteOnlyRd;
|
---|
486 | STAMCOUNTER StatRegCommandLowRd;
|
---|
487 | STAMCOUNTER StatRegCommandHighRd;
|
---|
488 | STAMCOUNTER StatRegMaxPrimBBMemRd;
|
---|
489 | STAMCOUNTER StatRegGBMemSizeRd;
|
---|
490 | STAMCOUNTER StatRegDevCapRd;
|
---|
491 | STAMCOUNTER StatRegCmdPrependLowRd;
|
---|
492 | STAMCOUNTER StatRegCmdPrependHighRd;
|
---|
493 | STAMCOUNTER StatRegScrnTgtMaxWidthRd;
|
---|
494 | STAMCOUNTER StatRegScrnTgtMaxHeightRd;
|
---|
495 | STAMCOUNTER StatRegMobMaxSizeRd;
|
---|
496 | } VMSVGAState, VMSVGASTATE;
|
---|
497 |
|
---|
498 |
|
---|
499 | /**
|
---|
500 | * The VMSVGA device state for ring-3
|
---|
501 | *
|
---|
502 | * This instantatiated as VGASTATER3::svga.
|
---|
503 | */
|
---|
504 | typedef struct VMSVGASTATER3
|
---|
505 | {
|
---|
506 | /** The R3 FIFO pointer. */
|
---|
507 | R3PTRTYPE(uint32_t *) pau32FIFO;
|
---|
508 | /** R3 Opaque pointer to svga state. */
|
---|
509 | R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
|
---|
510 | /** R3 Opaque pointer to 3d state. */
|
---|
511 | R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
|
---|
512 | /** The separate VGA frame buffer in svga mode.
|
---|
513 | * Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
|
---|
514 | * separate frame buffer for VGA and allows concurrent use of both. The SVGA
|
---|
515 | * SDK is making use of this to do VGA text output while testing other things in
|
---|
516 | * SVGA mode, displaying the result by switching back to VGA text mode. So,
|
---|
517 | * when entering SVGA mode we copy the first part of the frame buffer here and
|
---|
518 | * direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
|
---|
519 | R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
|
---|
520 | /** R3 Opaque pointer to an external fifo cmd parameter. */
|
---|
521 | R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
|
---|
522 |
|
---|
523 | /** FIFO external command semaphore. */
|
---|
524 | R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem;
|
---|
525 | /** FIFO IO Thread. */
|
---|
526 | R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
|
---|
527 | } VMSVGASTATER3;
|
---|
528 |
|
---|
529 |
|
---|
530 | /**
|
---|
531 | * The VMSVGA device state for ring-0
|
---|
532 | *
|
---|
533 | * This instantatiated as VGASTATER0::svga.
|
---|
534 | */
|
---|
535 | typedef struct VMSVGASTATER0
|
---|
536 | {
|
---|
537 | /** The R0 FIFO pointer.
|
---|
538 | * @note This only points to the _first_ _page_ of the FIFO! */
|
---|
539 | R0PTRTYPE(uint32_t *) pau32FIFO;
|
---|
540 | } VMSVGASTATER0;
|
---|
541 |
|
---|
542 |
|
---|
543 | typedef struct VGAState *PVGASTATE;
|
---|
544 | typedef struct VGASTATER3 *PVGASTATER3;
|
---|
545 | typedef struct VGASTATER0 *PVGASTATER0;
|
---|
546 | typedef struct VGASTATERC *PVGASTATERC;
|
---|
547 | typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
|
---|
548 |
|
---|
549 | DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
|
---|
550 | RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
|
---|
551 | DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb);
|
---|
552 | DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb);
|
---|
553 |
|
---|
554 | DECLCALLBACK(void) vmsvgaR3PortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
|
---|
555 | uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
|
---|
556 | DECLCALLBACK(void) vmsvgaR3PortReportMonitorPositions(PPDMIDISPLAYPORT pInterface, uint32_t cPositions, PCRTPOINT paPositions);
|
---|
557 |
|
---|
558 | int vmsvgaR3Init(PPDMDEVINS pDevIns);
|
---|
559 | int vmsvgaR3Reset(PPDMDEVINS pDevIns);
|
---|
560 | int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
|
---|
561 | int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
|
---|
562 | int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
|
---|
563 | int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
|
---|
564 | DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
|
---|
565 | DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
|
---|
566 | void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
|
---|
567 |
|
---|
568 | #ifdef IN_RING3
|
---|
569 | VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen);
|
---|
570 | int vmsvgaR3UpdateScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
|
---|
571 | #endif
|
---|
572 |
|
---|
573 | int vmsvgaR3GmrTransfer(PVGASTATE pThis, PVGASTATECC pThisCC, const SVGA3dTransferType enmTransferType,
|
---|
574 | uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
|
---|
575 | SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
|
---|
576 | uint32_t cbWidth, uint32_t cHeight);
|
---|
577 |
|
---|
578 | void vmsvgaR3ClipCopyBox(const SVGA3dSize *pSizeSrc, const SVGA3dSize *pSizeDest, SVGA3dCopyBox *pBox);
|
---|
579 | void vmsvgaR3ClipBox(const SVGA3dSize *pSize, SVGA3dBox *pBox);
|
---|
580 | void vmsvgaR3ClipRect(SVGASignedRect const *pBound, SVGASignedRect *pRect);
|
---|
581 | void vmsvgaR3Clip3dRect(SVGA3dRect const *pBound, SVGA3dRect RT_UNTRUSTED_GUEST *pRect);
|
---|
582 |
|
---|
583 | /*
|
---|
584 | * GBO (Guest Backed Object).
|
---|
585 | * A GBO is a list of the guest pages. GBOs are used for VMSVGA MOBs (Memory OBjects)
|
---|
586 | * and Object Tables which the guest shares with the host.
|
---|
587 | *
|
---|
588 | * A GBO is similar to a GMR. Nevertheless I'll create a new code for GBOs in order
|
---|
589 | * to avoid tweaking and possibly breaking existing code. Moreover it will be probably possible to
|
---|
590 | * map the guest pages into the host R3 memory and access them directly.
|
---|
591 | */
|
---|
592 |
|
---|
593 | /* GBO descriptor. */
|
---|
594 | typedef struct VMSVGAGBODESCRIPTOR
|
---|
595 | {
|
---|
596 | RTGCPHYS GCPhys;
|
---|
597 | uint64_t cPages;
|
---|
598 | } VMSVGAGBODESCRIPTOR, *PVMSVGAGBODESCRIPTOR;
|
---|
599 | typedef VMSVGAGBODESCRIPTOR const *PCVMSVGAGBODESCRIPTOR;
|
---|
600 |
|
---|
601 | /* GBO.
|
---|
602 | */
|
---|
603 | typedef struct VMSVGAGBO
|
---|
604 | {
|
---|
605 | uint32_t fGboFlags;
|
---|
606 | uint32_t cTotalPages;
|
---|
607 | uint32_t cbTotal;
|
---|
608 | uint32_t cDescriptors;
|
---|
609 | PVMSVGAGBODESCRIPTOR paDescriptors;
|
---|
610 | void *pvHost; /* Pointer to cbTotal bytes on the host if VMSVGAGBO_F_HOST_BACKED is set. */
|
---|
611 | } VMSVGAGBO, *PVMSVGAGBO;
|
---|
612 | typedef VMSVGAGBO const *PCVMSVGAGBO;
|
---|
613 |
|
---|
614 | #define VMSVGAGBO_F_WRITE_PROTECTED 0x1
|
---|
615 | #define VMSVGAGBO_F_HOST_BACKED 0x2
|
---|
616 |
|
---|
617 | #define VMSVGA_IS_GBO_CREATED(a_Gbo) ((a_Gbo)->paDescriptors != NULL)
|
---|
618 |
|
---|
619 | /* MOB is also a GBO.
|
---|
620 | */
|
---|
621 | typedef struct VMSVGAMOB
|
---|
622 | {
|
---|
623 | AVLU32NODECORE Core; /* Key is the mobid. */
|
---|
624 | RTLISTNODE nodeLRU;
|
---|
625 | VMSVGAGBO Gbo;
|
---|
626 | } VMSVGAMOB, *PVMSVGAMOB;
|
---|
627 | typedef VMSVGAMOB const *PCVMSVGAMOB;
|
---|
628 |
|
---|
629 | int vmsvgaR3MobBackingStoreCreate(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob, uint32_t cbValid);
|
---|
630 | void vmsvgaR3MobBackingStoreDelete(PVMSVGAR3STATE pSvgaR3State, PVMSVGAMOB pMob);
|
---|
631 | void *vmsvgaR3MobBackingStoreGet(PVMSVGAMOB pMob, uint32_t off);
|
---|
632 |
|
---|
633 | DECLINLINE(uint32_t) vmsvgaR3MobSize(PVMSVGAMOB pMob)
|
---|
634 | {
|
---|
635 | if (pMob)
|
---|
636 | return pMob->Gbo.cbTotal;
|
---|
637 | return 0;
|
---|
638 | }
|
---|
639 |
|
---|
640 | DECLINLINE(uint32_t) vmsvgaR3MobId(PVMSVGAMOB pMob)
|
---|
641 | {
|
---|
642 | if (pMob)
|
---|
643 | return pMob->Core.Key;
|
---|
644 | return SVGA_ID_INVALID;
|
---|
645 | }
|
---|
646 |
|
---|
647 | #ifdef VBOX_WITH_VMSVGA3D
|
---|
648 | int vmsvgaR3UpdateGBSurface(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dSurfaceImageId const *pImageId, SVGA3dBox const *pBox);
|
---|
649 | int vmsvgaR3UpdateGBSurfaceEx(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dSurfaceImageId const *pImageId, SVGA3dBox const *pBoxDst, SVGA3dPoint const *pPtSrc);
|
---|
650 | #endif
|
---|
651 |
|
---|
652 | #endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */
|
---|