DevVGA-SVGA.h@ 86237

Last change on this file since 86237 was 86237, checked in by vboxsync, 4 years ago
Devices/Graphics: stubs for SVGA_CAP_GBOBJECTS commands. Make sure that SVGA structures are properly packed.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 21.3 KB

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1	/* $Id: DevVGA-SVGA.h 86237 2020-09-23 13:00:37Z vboxsync $ */
2	/** @file
3	* VMware SVGA device
4	*/
5	/*
6	* Copyright (C) 2013-2020 Oracle Corporation
7	*
8	* This file is part of VirtualBox Open Source Edition (OSE), as
9	* available from http://www.virtualbox.org. This file is free software;
10	* you can redistribute it and/or modify it under the terms of the GNU
11	* General Public License (GPL) as published by the Free Software
12	* Foundation, in version 2 as it comes in the "COPYING" file of the
13	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15	*/
16
17	#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
18	#define VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h
19	#ifndef RT_WITHOUT_PRAGMA_ONCE
20	# pragma once
21	#endif
22
23	#ifndef VBOX_WITH_VMSVGA
24	# error "VBOX_WITH_VMSVGA is not defined"
25	#endif
26
27	#include <VBox/pci.h>
28	#include <VBox/vmm/pdmifs.h>
29	#include <VBox/vmm/pdmthread.h>
30	#include <VBox/vmm/stam.h>
31
32	/*
33	* PCI device IDs.
34	*/
35	#ifndef PCI_VENDOR_ID_VMWARE
36	# define PCI_VENDOR_ID_VMWARE 0x15AD
37	#endif
38	#ifndef PCI_DEVICE_ID_VMWARE_SVGA2
39	# define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
40	#endif
41
42	/* For "svga_overlay.h" */
43	#ifndef TRUE
44	# define TRUE 1
45	#endif
46	#ifndef FALSE
47	# define FALSE 0
48	#endif
49
50	/* GCC complains that 'ISO C++ prohibits anonymous structs' when "-Wpedantic" is enabled. */
51	#if RT_GNUC_PREREQ(4, 6)
52	# pragma GCC diagnostic push
53	# pragma GCC diagnostic ignored "-Wpedantic"
54	#endif
55	/* VMSVGA headers from SVGA Gallium driver. */
56	#pragma pack(1) /* VMSVGA structures are '__packed'. */
57	#include <svga3d_caps.h>
58	#include <svga3d_reg.h>
59	#include <svga3d_shaderdefs.h>
60	#include <svga_escape.h>
61	#include <svga_overlay.h>
62	#pragma pack()
63	#if RT_GNUC_PREREQ(4, 6)
64	# pragma GCC diagnostic pop
65	#endif
66
67	/* Deprecated commands. They are not included in the VMSVGA headers anymore. */
68	#define SVGA_CMD_RECT_FILL 2
69	#define SVGA_CMD_DISPLAY_CURSOR 20
70	#define SVGA_CMD_MOVE_CURSOR 21
71
72	/*
73	* SVGA_CMD_RECT_FILL --
74	*
75	* Fill a rectangular area in the the GFB, and copy the result
76	* to any screens which intersect it.
77	*
78	* Deprecated?
79	*
80	* Availability:
81	* SVGA_CAP_RECT_FILL
82	*/
83
84	typedef
85	struct {
86	uint32_t pixel;
87	uint32_t destX;
88	uint32_t destY;
89	uint32_t width;
90	uint32_t height;
91	} SVGAFifoCmdRectFill;
92
93	/*
94	* SVGA_CMD_DISPLAY_CURSOR --
95	*
96	* Turn the cursor on or off.
97	*
98	* Deprecated.
99	*
100	* Availability:
101	* SVGA_CAP_CURSOR?
102	*/
103
104	typedef
105	struct {
106	uint32_t id; // Reserved, must be zero.
107	uint32_t state; // 0=off
108	} SVGAFifoCmdDisplayCursor;
109
110	/*
111	* SVGA_CMD_MOVE_CURSOR --
112	*
113	* Set the cursor position.
114	*
115	* Deprecated.
116	*
117	* Availability:
118	* SVGA_CAP_CURSOR?
119	*/
120
121	typedef
122	struct {
123	SVGASignedPoint pos;
124	} SVGAFifoCmdMoveCursor;
125
126
127	/** Default FIFO size. */
128	#define VMSVGA_FIFO_SIZE _2M
129	/** The old FIFO size. */
130	#define VMSVGA_FIFO_SIZE_OLD _128K
131
132	/** Default scratch region size. */
133	#define VMSVGA_SCRATCH_SIZE 0x100
134	/** Surface memory available to the guest. */
135	#define VMSVGA_SURFACE_SIZE (51210241024)
136	/** Maximum GMR pages. */
137	#define VMSVGA_MAX_GMR_PAGES 0x100000
138	/** Maximum nr of GMR ids. */
139	#define VMSVGA_MAX_GMR_IDS _8K
140	/** Maximum number of GMR descriptors. */
141	#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
142
143	#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
144
145	/** For validating X and width values.
146	* The code assumes it's at least an order of magnitude less than UINT32_MAX. */
147	#define VMSVGA_MAX_X _1M
148	/** For validating Y and height values.
149	* The code assumes it's at least an order of magnitude less than UINT32_MAX. */
150	#define VMSVGA_MAX_Y _1M
151
152	/* u32ActionFlags */
153	#define VMSVGA_ACTION_CHANGEMODE_BIT 0
154	#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
155
156
157	#ifdef DEBUG
158	/* Enable to log FIFO register accesses. */
159	//# define DEBUG_FIFO_ACCESS
160	/* Enable to log GMR page accesses. */
161	//# define DEBUG_GMR_ACCESS
162	#endif
163
164	#define VMSVGA_FIFO_EXTCMD_NONE 0
165	#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
166	#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
167	#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
168	#define VMSVGA_FIFO_EXTCMD_RESET 4
169	#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
170	#define VMSVGA_FIFO_EXTCMD_POWEROFF 6
171
172	/** Size of the region to backup when switching into svga mode. */
173	#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
174
175	/** @def VMSVGA_WITH_VGA_FB_BACKUP
176	* Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
177	* is SLOW and probably not entirely right, but it helps with getting 3dmark
178	* output and other stuff. */
179	#define VMSVGA_WITH_VGA_FB_BACKUP 1
180
181	/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
182	* defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
183	#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) \|\| defined(DOXYGEN_RUNNING)
184	# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
185	#else
186	# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
187	#endif
188
189	/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
190	* defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
191	#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) \|\| defined(DOXYGEN_RUNNING)
192	# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
193	#else
194	# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
195	#endif
196
197
198	typedef struct
199	{
200	PSSMHANDLE pSSM;
201	uint32_t uVersion;
202	uint32_t uPass;
203	} VMSVGA_STATE_LOAD;
204	typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
205
206	/** Host screen viewport.
207	* (4th quadrant with negated Y values - usual Windows and X11 world view.) */
208	typedef struct VMSVGAVIEWPORT
209	{
210	uint32_t x; /*< x coordinate (left). /
211	uint32_t y; /*< y coordinate (top). /
212	uint32_t cx; /*< width. /
213	uint32_t cy; /*< height. /
214	/** Right side coordinate (exclusive). Same as x + cx. */
215	uint32_t xRight;
216	/** First quadrant low y coordinate.
217	* Same as y + cy - 1 in window coordinates. */
218	uint32_t yLowWC;
219	/** First quadrant high y coordinate (exclusive) - yLowWC + cy.
220	* Same as y - 1 in window coordinates. */
221	uint32_t yHighWC;
222	/** Alignment padding. */
223	uint32_t uAlignment;
224	} VMSVGAVIEWPORT;
225
226	#ifdef VBOX_WITH_VMSVGA3D
227	typedef struct VMSVGAHWSCREEN *PVMSVGAHWSCREEN;
228	#endif
229
230	/**
231	* Screen object state.
232	*/
233	typedef struct VMSVGASCREENOBJECT
234	{
235	/** SVGA_SCREEN_* flags. */
236	uint32_t fuScreen;
237	/** The screen object id. */
238	uint32_t idScreen;
239	/** The screen dimensions. */
240	int32_t xOrigin;
241	int32_t yOrigin;
242	uint32_t cWidth;
243	uint32_t cHeight;
244	/** Offset of the screen buffer in the guest VRAM. */
245	uint32_t offVRAM;
246	/** Scanline pitch. */
247	uint32_t cbPitch;
248	/** Bits per pixel. */
249	uint32_t cBpp;
250	bool fDefined;
251	bool fModified;
252	#ifdef VBOX_WITH_VMSVGA3D
253	/** Pointer to the HW accelerated (3D) screen data. */
254	R3PTRTYPE(PVMSVGAHWSCREEN) pHwScreen;
255	#endif
256	} VMSVGASCREENOBJECT;
257
258	/** Pointer to the private VMSVGA ring-3 state structure.
259	* @todo Still not entirely satisfired with the type name, but better than
260	* the previous lower/upper case only distinction. */
261	typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
262	/** Pointer to the private (implementation specific) VMSVGA3d state. */
263	typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
264
265
266	/**
267	* The VMSVGA device state.
268	*
269	* This instantatiated as VGASTATE::svga.
270	*/
271	typedef struct VMSVGAState
272	{
273	/** Guest physical address of the FIFO memory range. */
274	RTGCPHYS GCPhysFIFO;
275	/** Size in bytes of the FIFO memory range.
276	* This may be smaller than cbFIFOConfig after restoring an old VM state. */
277	uint32_t cbFIFO;
278	/** The configured FIFO size. */
279	uint32_t cbFIFOConfig;
280	/** SVGA id. */
281	uint32_t u32SVGAId;
282	/** SVGA extensions enabled or not. */
283	uint32_t fEnabled;
284	/** SVGA memory area configured status. */
285	uint32_t fConfigured;
286	/** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
287	* VMSVGA_BUSY_F_EMT_FORCE). */
288	uint32_t volatile fBusy;
289	#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /*< The normal true/false busy FIFO bit. /
290	#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /*< Bit preventing race status flickering when EMT kicks the FIFO thread. /
291	/** Traces (dirty page detection) enabled or not. */
292	uint32_t fTraces;
293	/** Guest OS identifier. */
294	uint32_t u32GuestId;
295	/** Scratch region size (VMSVGAState::au32ScratchRegion). */
296	uint32_t cScratchRegion;
297	/** Irq status. */
298	uint32_t u32IrqStatus;
299	/** Irq mask. */
300	uint32_t u32IrqMask;
301	/** Pitch lock. */
302	uint32_t u32PitchLock;
303	/** Current GMR id. (SVGA_REG_GMR_ID) */
304	uint32_t u32CurrentGMRId;
305	/** SVGA device capabilities. */
306	uint32_t u32DeviceCaps;
307	uint32_t Padding0; /* Used to be I/O port base address. */
308	/** Port io index register. */
309	uint32_t u32IndexReg;
310	/** FIFO request semaphore. */
311	SUPSEMEVENT hFIFORequestSem;
312	/** The last seen SVGA_FIFO_CURSOR_COUNT value.
313	* Used by the FIFO thread and its watchdog. */
314	uint32_t uLastCursorUpdateCount;
315	/** Indicates that the FIFO thread is sleeping and might need waking up. */
316	bool volatile fFIFOThreadSleeping;
317	/** The legacy GFB mode registers. If used, they correspond to screen 0. */
318	/** True when the guest modifies the GFB mode registers. */
319	bool fGFBRegisters;
320	/** SVGA 3D overlay enabled or not. */
321	bool f3DOverlayEnabled;
322	bool afPadding[5];
323	uint32_t uWidth;
324	uint32_t uHeight;
325	uint32_t uBpp;
326	uint32_t cbScanline;
327	uint32_t uHostBpp;
328	/** Maximum width supported. */
329	uint32_t u32MaxWidth;
330	/** Maximum height supported. */
331	uint32_t u32MaxHeight;
332	/** Viewport rectangle, i.e. what's currently visible of the target host
333	* window. This is usually (0,0)(uWidth,uHeight), but if the window is
334	* shrunk and scrolling applied, both the origin and size may differ. */
335	VMSVGAVIEWPORT viewport;
336	/** Action flags */
337	uint32_t u32ActionFlags;
338	/** SVGA 3d extensions enabled or not. */
339	bool f3DEnabled;
340	/** VRAM page monitoring enabled or not. */
341	bool fVRAMTracking;
342	/** External command to be executed in the FIFO thread. */
343	uint8_t volatile u8FIFOExtCommand;
344	/** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
345	* thread and does not want it do anything but the command. */
346	bool volatile fFifoExtCommandWakeup;
347	#ifdef DEBUG_GMR_ACCESS
348	/** GMR debug access handler type handle. */
349	PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
350	#endif
351	#if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) \|\| defined(DEBUG_FIFO_ACCESS)
352	/** FIFO debug access handler type handle. */
353	PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
354	#elif defined(DEBUG_GMR_ACCESS)
355	uint32_t uPadding1;
356	#endif
357	/** Number of GMRs. */
358	uint32_t cGMR;
359	uint32_t uScreenOffset; /* Used only for loading older saved states. */
360
361	/** Legacy cursor state. */
362	uint32_t uCursorX;
363	uint32_t uCursorY;
364	uint32_t uCursorID;
365	uint32_t uCursorOn;
366
367	/** Scratch array.
368	* Putting this at the end since it's big it probably not . */
369	uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
370
371	/** Array of SVGA3D_DEVCAP values, which are accessed via SVGA_REG_DEV_CAP. */
372	uint32_t au32DevCaps[SVGA3D_DEVCAP_MAX];
373	/** Index written to the SVGA_REG_DEV_CAP register. */
374	uint32_t u32DevCapIndex;
375	uint32_t u32RegCommandLow;
376	uint32_t u32RegCommandHigh;
377
378	STAMCOUNTER StatRegBitsPerPixelWr;
379	STAMCOUNTER StatRegBusyWr;
380	STAMCOUNTER StatRegCursorXWr;
381	STAMCOUNTER StatRegCursorYWr;
382	STAMCOUNTER StatRegCursorIdWr;
383	STAMCOUNTER StatRegCursorOnWr;
384	STAMCOUNTER StatRegDepthWr;
385	STAMCOUNTER StatRegDisplayHeightWr;
386	STAMCOUNTER StatRegDisplayIdWr;
387	STAMCOUNTER StatRegDisplayIsPrimaryWr;
388	STAMCOUNTER StatRegDisplayPositionXWr;
389	STAMCOUNTER StatRegDisplayPositionYWr;
390	STAMCOUNTER StatRegDisplayWidthWr;
391	STAMCOUNTER StatRegEnableWr;
392	STAMCOUNTER StatRegGmrIdWr;
393	STAMCOUNTER StatRegGuestIdWr;
394	STAMCOUNTER StatRegHeightWr;
395	STAMCOUNTER StatRegIdWr;
396	STAMCOUNTER StatRegIrqMaskWr;
397	STAMCOUNTER StatRegNumDisplaysWr;
398	STAMCOUNTER StatRegNumGuestDisplaysWr;
399	STAMCOUNTER StatRegPaletteWr;
400	STAMCOUNTER StatRegPitchLockWr;
401	STAMCOUNTER StatRegPseudoColorWr;
402	STAMCOUNTER StatRegReadOnlyWr;
403	STAMCOUNTER StatRegScratchWr;
404	STAMCOUNTER StatRegSyncWr;
405	STAMCOUNTER StatRegTopWr;
406	STAMCOUNTER StatRegTracesWr;
407	STAMCOUNTER StatRegUnknownWr;
408	STAMCOUNTER StatRegWidthWr;
409	STAMCOUNTER StatRegCommandLowWr;
410	STAMCOUNTER StatRegCommandHighWr;
411	STAMCOUNTER StatRegDevCapWr;
412	STAMCOUNTER StatRegCmdPrependLowWr;
413	STAMCOUNTER StatRegCmdPrependHighWr;
414
415	STAMCOUNTER StatRegBitsPerPixelRd;
416	STAMCOUNTER StatRegBlueMaskRd;
417	STAMCOUNTER StatRegBusyRd;
418	STAMCOUNTER StatRegBytesPerLineRd;
419	STAMCOUNTER StatRegCapabilitesRd;
420	STAMCOUNTER StatRegConfigDoneRd;
421	STAMCOUNTER StatRegCursorXRd;
422	STAMCOUNTER StatRegCursorYRd;
423	STAMCOUNTER StatRegCursorIdRd;
424	STAMCOUNTER StatRegCursorOnRd;
425	STAMCOUNTER StatRegDepthRd;
426	STAMCOUNTER StatRegDisplayHeightRd;
427	STAMCOUNTER StatRegDisplayIdRd;
428	STAMCOUNTER StatRegDisplayIsPrimaryRd;
429	STAMCOUNTER StatRegDisplayPositionXRd;
430	STAMCOUNTER StatRegDisplayPositionYRd;
431	STAMCOUNTER StatRegDisplayWidthRd;
432	STAMCOUNTER StatRegEnableRd;
433	STAMCOUNTER StatRegFbOffsetRd;
434	STAMCOUNTER StatRegFbSizeRd;
435	STAMCOUNTER StatRegFbStartRd;
436	STAMCOUNTER StatRegGmrIdRd;
437	STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
438	STAMCOUNTER StatRegGmrMaxIdsRd;
439	STAMCOUNTER StatRegGmrsMaxPagesRd;
440	STAMCOUNTER StatRegGreenMaskRd;
441	STAMCOUNTER StatRegGuestIdRd;
442	STAMCOUNTER StatRegHeightRd;
443	STAMCOUNTER StatRegHostBitsPerPixelRd;
444	STAMCOUNTER StatRegIdRd;
445	STAMCOUNTER StatRegIrqMaskRd;
446	STAMCOUNTER StatRegMaxHeightRd;
447	STAMCOUNTER StatRegMaxWidthRd;
448	STAMCOUNTER StatRegMemorySizeRd;
449	STAMCOUNTER StatRegMemRegsRd;
450	STAMCOUNTER StatRegMemSizeRd;
451	STAMCOUNTER StatRegMemStartRd;
452	STAMCOUNTER StatRegNumDisplaysRd;
453	STAMCOUNTER StatRegNumGuestDisplaysRd;
454	STAMCOUNTER StatRegPaletteRd;
455	STAMCOUNTER StatRegPitchLockRd;
456	STAMCOUNTER StatRegPsuedoColorRd;
457	STAMCOUNTER StatRegRedMaskRd;
458	STAMCOUNTER StatRegScratchRd;
459	STAMCOUNTER StatRegScratchSizeRd;
460	STAMCOUNTER StatRegSyncRd;
461	STAMCOUNTER StatRegTopRd;
462	STAMCOUNTER StatRegTracesRd;
463	STAMCOUNTER StatRegUnknownRd;
464	STAMCOUNTER StatRegVramSizeRd;
465	STAMCOUNTER StatRegWidthRd;
466	STAMCOUNTER StatRegWriteOnlyRd;
467	STAMCOUNTER StatRegCommandLowRd;
468	STAMCOUNTER StatRegCommandHighRd;
469	STAMCOUNTER StatRegMaxPrimBBMemRd;
470	STAMCOUNTER StatRegGBMemSizeRd;
471	STAMCOUNTER StatRegDevCapRd;
472	STAMCOUNTER StatRegCmdPrependLowRd;
473	STAMCOUNTER StatRegCmdPrependHighRd;
474	STAMCOUNTER StatRegScrnTgtMaxWidthRd;
475	STAMCOUNTER StatRegScrnTgtMaxHeightRd;
476	STAMCOUNTER StatRegMobMaxSizeRd;
477	} VMSVGAState, VMSVGASTATE;
478
479
480	/**
481	* The VMSVGA device state for ring-3
482	*
483	* This instantatiated as VGASTATER3::svga.
484	*/
485	typedef struct VMSVGASTATER3
486	{
487	/** The R3 FIFO pointer. */
488	R3PTRTYPE(uint32_t *) pau32FIFO;
489	/** R3 Opaque pointer to svga state. */
490	R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
491	/** R3 Opaque pointer to 3d state. */
492	R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
493	/** The separate VGA frame buffer in svga mode.
494	* Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
495	* separate frame buffer for VGA and allows concurrent use of both. The SVGA
496	* SDK is making use of this to do VGA text output while testing other things in
497	* SVGA mode, displaying the result by switching back to VGA text mode. So,
498	* when entering SVGA mode we copy the first part of the frame buffer here and
499	* direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
500	R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
501	/** R3 Opaque pointer to an external fifo cmd parameter. */
502	R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
503
504	/** FIFO external command semaphore. */
505	R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem;
506	/** FIFO IO Thread. */
507	R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
508	} VMSVGASTATER3;
509
510
511	/**
512	* The VMSVGA device state for ring-0
513	*
514	* This instantatiated as VGASTATER0::svga.
515	*/
516	typedef struct VMSVGASTATER0
517	{
518	/** The R0 FIFO pointer.
519	* @note This only points to the _first_ _page_ of the FIFO! */
520	R0PTRTYPE(uint32_t *) pau32FIFO;
521	} VMSVGASTATER0;
522
523
524	typedef struct VGAState *PVGASTATE;
525	typedef struct VGASTATER3 *PVGASTATER3;
526	typedef struct VGASTATER0 *PVGASTATER0;
527	typedef struct VGASTATERC *PVGASTATERC;
528	typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
529
530	DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
531	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
532	DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT offPort, uint32_t pu32, unsigned cb);
533	DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb);
534
535	DECLCALLBACK(void) vmsvgaR3PortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
536	uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
537	DECLCALLBACK(void) vmsvgaR3PortReportMonitorPositions(PPDMIDISPLAYPORT pInterface, uint32_t cPositions, PCRTPOINT paPositions);
538
539	int vmsvgaR3Init(PPDMDEVINS pDevIns);
540	int vmsvgaR3Reset(PPDMDEVINS pDevIns);
541	int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
542	int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
543	int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
544	int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
545	DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
546	DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
547	void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
548
549	#ifdef IN_RING3
550	VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATECC pThisCC, uint32_t idScreen);
551	int vmsvgaR3UpdateScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
552	#endif
553
554	int vmsvgaR3GmrTransfer(PVGASTATE pThis, PVGASTATECC pThisCC, const SVGA3dTransferType enmTransferType,
555	uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
556	SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
557	uint32_t cbWidth, uint32_t cHeight);
558
559	void vmsvgaR3ClipCopyBox(const SVGA3dSize pSizeSrc, const SVGA3dSize pSizeDest, SVGA3dCopyBox *pBox);
560	void vmsvgaR3ClipBox(const SVGA3dSize pSize, SVGA3dBox pBox);
561	void vmsvgaR3ClipRect(SVGASignedRect const pBound, SVGASignedRect pRect);
562
563	#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h@ 86237

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