| 1 | /** @file
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| 2 | Defines the defitions used by TDX in OvmfPkg.
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| 3 |
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| 4 | Copyright (c) 2020 - 2021, Intel Corporation. All rights reserved.<BR>
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| 5 | SPDX-License-Identifier: BSD-2-Clause-Patent
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| 6 |
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| 7 | **/
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| 8 |
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| 9 | #ifndef OVMF_INTEL_TDX_H_
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| 10 | #define OVMF_INTEL_TDX_H_
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| 11 |
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| 12 | #include <PiPei.h>
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| 13 | #include <Library/BaseLib.h>
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| 14 | #include <Uefi/UefiSpec.h>
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| 15 | #include <Uefi/UefiBaseType.h>
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| 16 |
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| 17 | #define MP_CPU_PROTECTED_MODE_MAILBOX_APICID_INVALID 0xFFFFFFFF
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| 18 | #define MP_CPU_PROTECTED_MODE_MAILBOX_APICID_BROADCAST 0xFFFFFFFE
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| 19 |
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| 20 | typedef enum {
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| 21 | MpProtectedModeWakeupCommandNoop = 0,
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| 22 | MpProtectedModeWakeupCommandWakeup = 1,
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| 23 | MpProtectedModeWakeupCommandSleep = 2,
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| 24 | MpProtectedModeWakeupCommandAcceptPages = 3,
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| 25 | } MP_CPU_PROTECTED_MODE_WAKEUP_CMD;
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| 26 |
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| 27 | #pragma pack(1)
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| 28 |
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| 29 | //
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| 30 | // Describes the CPU MAILBOX control structure use to
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| 31 | // wakeup cpus spinning in long mode
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| 32 | //
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| 33 | typedef struct {
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| 34 | UINT16 Command;
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| 35 | UINT16 Resv;
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| 36 | UINT32 ApicId;
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| 37 | UINT64 WakeUpVector;
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| 38 | UINT8 ResvForOs[2032];
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| 39 | //
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| 40 | // Arguments available for wakeup code
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| 41 | //
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| 42 | UINT64 WakeUpArgs1;
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| 43 | UINT64 WakeUpArgs2;
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| 44 | UINT64 WakeUpArgs3;
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| 45 | UINT64 WakeUpArgs4;
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| 46 | UINT8 Pad1[0xe0];
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| 47 | UINT64 NumCpusArriving;
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| 48 | UINT8 Pad2[0xf8];
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| 49 | UINT64 NumCpusExiting;
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| 50 | UINT32 Tallies[256];
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| 51 | UINT8 Errors[256];
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| 52 | UINT8 Pad3[0xf8];
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| 53 | } MP_WAKEUP_MAILBOX;
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| 54 |
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| 55 | //
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| 56 | // AP relocation code information including code address and size,
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| 57 | // this structure will be shared be C code and assembly code.
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| 58 | // It is natural aligned by design.
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| 59 | //
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| 60 | typedef struct {
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| 61 | UINT8 *RelocateApLoopFuncAddress;
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| 62 | UINTN RelocateApLoopFuncSize;
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| 63 | } MP_RELOCATION_MAP;
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| 64 |
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| 65 | #pragma pack()
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| 66 |
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| 67 | #endif
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