1 | /** @file
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2 | ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049D
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3 |
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4 | http://infocenter.arm.com/help/topic/com.arm.doc.den0049d/DEN0049D_IO_Remapping_Table.pdf
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5 |
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6 | Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>
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7 | Copyright (c) 2018, ARM Limited. All rights reserved.<BR>
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8 |
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9 | SPDX-License-Identifier: BSD-2-Clause-Patent
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10 | **/
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11 |
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12 | #ifndef __IO_REMAPPING_TABLE_H__
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13 | #define __IO_REMAPPING_TABLE_H__
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14 |
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15 | #include <IndustryStandard/Acpi.h>
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16 |
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17 | #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0
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18 |
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19 | #define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0
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20 | #define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1
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21 | #define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2
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22 | #define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3
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23 | #define EFI_ACPI_IORT_TYPE_SMMUv3 0x4
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24 | #define EFI_ACPI_IORT_TYPE_PMCG 0x5
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25 |
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26 | #define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0
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27 |
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28 | #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0
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29 | #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1
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30 | #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2
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31 | #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3
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32 |
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33 | #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0
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34 | #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1
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35 |
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36 | #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0
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37 | #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1
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38 | #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2
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39 | #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3
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40 | #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU401 0x4
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41 | #define EFI_ACPI_IORT_SMMUv1v2_MODEL_CAVIUM_THX_v2 0x5
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42 |
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43 | #define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0
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44 | #define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1
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45 |
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46 | #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0
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47 | #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1
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48 |
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49 | #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0
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50 | #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1
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51 | #define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN BIT3
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52 |
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53 | #define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC 0x0
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54 | #define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1
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55 | #define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX 0x2
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56 |
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57 | #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0
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58 | #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1
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59 |
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60 | #define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0
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61 |
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62 | #pragma pack(1)
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63 |
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64 | ///
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65 | /// Table header
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66 | ///
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67 | typedef struct {
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68 | EFI_ACPI_DESCRIPTION_HEADER Header;
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69 | UINT32 NumNodes;
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70 | UINT32 NodeOffset;
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71 | UINT32 Reserved;
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72 | } EFI_ACPI_6_0_IO_REMAPPING_TABLE;
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73 |
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74 | ///
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75 | /// Definition for ID mapping table shared by all node types
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76 | ///
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77 | typedef struct {
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78 | UINT32 InputBase;
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79 | UINT32 NumIds;
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80 | UINT32 OutputBase;
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81 | UINT32 OutputReference;
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82 | UINT32 Flags;
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83 | } EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE;
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84 |
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85 | ///
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86 | /// Node header definition shared by all node types
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87 | ///
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88 | typedef struct {
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89 | UINT8 Type;
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90 | UINT16 Length;
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91 | UINT8 Revision;
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92 | UINT32 Reserved;
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93 | UINT32 NumIdMappings;
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94 | UINT32 IdReference;
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95 | } EFI_ACPI_6_0_IO_REMAPPING_NODE;
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96 |
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97 | ///
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98 | /// Node type 0: ITS node
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99 | ///
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100 | typedef struct {
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101 | EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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102 |
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103 | UINT32 NumItsIdentifiers;
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104 | //UINT32 ItsIdentifiers[NumItsIdentifiers];
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105 | } EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
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106 |
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107 | ///
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108 | /// Node type 1: root complex node
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109 | ///
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110 | typedef struct {
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111 | EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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112 |
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113 | UINT32 CacheCoherent;
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114 | UINT8 AllocationHints;
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115 | UINT16 Reserved;
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116 | UINT8 MemoryAccessFlags;
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117 |
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118 | UINT32 AtsAttribute;
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119 | UINT32 PciSegmentNumber;
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120 | UINT8 MemoryAddressSize;
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121 | UINT8 Reserved1[3];
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122 | } EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
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123 |
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124 | ///
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125 | /// Node type 2: named component node
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126 | ///
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127 | typedef struct {
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128 | EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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129 |
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130 | UINT32 Flags;
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131 | UINT32 CacheCoherent;
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132 | UINT8 AllocationHints;
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133 | UINT16 Reserved;
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134 | UINT8 MemoryAccessFlags;
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135 | UINT8 AddressSizeLimit;
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136 | //UINT8 ObjectName[];
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137 | } EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE;
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138 |
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139 | ///
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140 | /// Node type 3: SMMUv1 or SMMUv2 node
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141 | ///
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142 | typedef struct {
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143 | UINT32 Interrupt;
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144 | UINT32 InterruptFlags;
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145 | } EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT;
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146 |
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147 | typedef struct {
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148 | EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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149 |
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150 | UINT64 Base;
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151 | UINT64 Span;
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152 | UINT32 Model;
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153 | UINT32 Flags;
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154 | UINT32 GlobalInterruptArrayRef;
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155 | UINT32 NumContextInterrupts;
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156 | UINT32 ContextInterruptArrayRef;
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157 | UINT32 NumPmuInterrupts;
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158 | UINT32 PmuInterruptArrayRef;
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159 |
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160 | UINT32 SMMU_NSgIrpt;
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161 | UINT32 SMMU_NSgIrptFlags;
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162 | UINT32 SMMU_NSgCfgIrpt;
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163 | UINT32 SMMU_NSgCfgIrptFlags;
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164 |
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165 | //EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[NumContextInterrupts];
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166 | //EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[NumPmuInterrupts];
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167 | } EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
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168 |
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169 | ///
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170 | /// Node type 4: SMMUv3 node
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171 | ///
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172 | typedef struct {
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173 | EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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174 |
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175 | UINT64 Base;
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176 | UINT32 Flags;
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177 | UINT32 Reserved;
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178 | UINT64 VatosAddress;
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179 | UINT32 Model;
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180 | UINT32 Event;
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181 | UINT32 Pri;
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182 | UINT32 Gerr;
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183 | UINT32 Sync;
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184 | UINT32 ProximityDomain;
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185 | UINT32 DeviceIdMappingIndex;
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186 | } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
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187 |
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188 | ///
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189 | /// Node type 5: PMCG node
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190 | ///
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191 | typedef struct {
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192 | EFI_ACPI_6_0_IO_REMAPPING_NODE Node;
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193 |
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194 | UINT64 Base;
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195 | UINT32 OverflowInterruptGsiv;
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196 | UINT32 NodeReference;
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197 | UINT64 Page1Base;
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198 | //EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE OverflowInterruptMsiMapping[1];
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199 | } EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE;
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200 |
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201 | #pragma pack()
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202 |
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203 | #endif
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