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source: vbox/trunk/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/Include/Library/CpuPageTableLib.h@ 105381

Last change on this file since 105381 was 101291, checked in by vboxsync, 19 months ago

EFI/FirmwareNew: Make edk2-stable202308 build on all supported platforms (using gcc at least, msvc not tested yet), bugref:4643

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1/** @file
2 Public include file for PageTableLib library.
3
4 Copyright (c) 2022 - 2023, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7**/
8
9#ifndef PAGE_TABLE_LIB_H_
10#define PAGE_TABLE_LIB_H_
11
12typedef union {
13 struct {
14 UINT32 Present : 1; // 0 = Not present in memory, 1 = Present in memory
15 UINT32 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
16 UINT32 UserSupervisor : 1; // 0 = Supervisor, 1=User
17 UINT32 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching
18 UINT32 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
19 UINT32 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)
20 UINT32 Dirty : 1; // 0 = Not dirty, 1 = Dirty (set by CPU)
21 UINT32 Pat : 1; // PAT
22 UINT32 Global : 1; // 0 = Not global, 1 = Global (if CR4.PGE = 1)
23 UINT32 Reserved1 : 3; // Ignored
24 UINT32 PageTableBaseAddressLow : 20; // Page Table Base Address Low
25
26 UINT32 PageTableBaseAddressHigh : 20; // Page Table Base Address High
27 UINT32 Reserved2 : 7; // Ignored
28 UINT32 ProtectionKey : 4; // Protection key
29 UINT32 Nx : 1; // No Execute bit
30 } Bits;
31 UINT64 Uint64;
32} IA32_MAP_ATTRIBUTE;
33
34#define IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK 0xFFFFFFFFFF000ull
35#define IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS(pa) ((pa)->Uint64 & IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK)
36#define IA32_MAP_ATTRIBUTE_ATTRIBUTES(pa) ((pa)->Uint64 & ~IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK)
37
38//
39// Below enum follows "4.1.1 Four Paging Modes" in Chapter 4 Paging of SDM Volume 3.
40// Page1GB is only supported in 4-level and 5-level.
41//
42typedef enum {
43 Paging32bit,
44
45 //
46 // High byte in paging mode indicates the max levels of the page table.
47 // Low byte in paging mode indicates the max level that can be a leaf entry.
48 //
49 PagingPae = 0x0302,
50
51 Paging4Level = 0x0402,
52 Paging4Level1GB = 0x0403,
53
54 Paging5Level = 0x0502,
55 Paging5Level1GB = 0x0503,
56
57 PagingModeMax
58} PAGING_MODE;
59
60/**
61 Create or update page table to map [LinearAddress, LinearAddress + Length) with specified attribute.
62
63 @param[in, out] PageTable The pointer to the page table to update, or pointer to NULL if a new page table is to be created.
64 @param[in] PagingMode The paging mode.
65 @param[in] Buffer The free buffer to be used for page table creation/updating.
66 @param[in, out] BufferSize The buffer size.
67 On return, the remaining buffer size.
68 The free buffer is used from the end so caller can supply the same Buffer pointer with an updated
69 BufferSize in the second call to this API.
70 @param[in] LinearAddress The start of the linear address range.
71 @param[in] Length The length of the linear address range.
72 @param[in] Attribute The attribute of the linear address range.
73 All non-reserved fields in IA32_MAP_ATTRIBUTE are supported to set in the page table.
74 Page table entries that map the linear address range are reset to 0 before set to the new attribute
75 when a new physical base address is set.
76 @param[in] Mask The mask used for attribute. The corresponding field in Attribute is ignored if that in Mask is 0.
77 @param[out] IsModified TRUE means page table is modified. FALSE means page table is not modified.
78
79 @retval RETURN_UNSUPPORTED PagingMode is not supported.
80 @retval RETURN_INVALID_PARAMETER PageTable, BufferSize, Attribute or Mask is NULL.
81 @retval RETURN_INVALID_PARAMETER For non-present range, Mask->Bits.Present is 0 but some other attributes are provided.
82 @retval RETURN_INVALID_PARAMETER For non-present range, Mask->Bits.Present is 1, Attribute->Bits.Present is 1 but some other attributes are not provided.
83 @retval RETURN_INVALID_PARAMETER For non-present range, Mask->Bits.Present is 1, Attribute->Bits.Present is 0 but some other attributes are provided.
84 @retval RETURN_INVALID_PARAMETER For present range, Mask->Bits.Present is 1, Attribute->Bits.Present is 0 but some other attributes are provided.
85 @retval RETURN_INVALID_PARAMETER *BufferSize is not multiple of 4KB.
86 @retval RETURN_BUFFER_TOO_SMALL The buffer is too small for page table creation/updating.
87 BufferSize is updated to indicate the expected buffer size.
88 Caller may still get RETURN_BUFFER_TOO_SMALL with the new BufferSize.
89 @retval RETURN_SUCCESS PageTable is created/updated successfully or the input Length is 0.
90**/
91RETURN_STATUS
92EFIAPI
93PageTableMap (
94 IN OUT UINTN *PageTable OPTIONAL,
95 IN PAGING_MODE PagingMode,
96 IN VOID *Buffer,
97 IN OUT UINTN *BufferSize,
98 IN UINT64 LinearAddress,
99 IN UINT64 Length,
100 IN IA32_MAP_ATTRIBUTE *Attribute,
101 IN IA32_MAP_ATTRIBUTE *Mask,
102 OUT BOOLEAN *IsModified OPTIONAL
103 );
104
105typedef struct {
106 UINT64 LinearAddress;
107 UINT64 Length;
108 IA32_MAP_ATTRIBUTE Attribute;
109} IA32_MAP_ENTRY;
110
111/**
112 Parse page table.
113
114 @param[in] PageTable Pointer to the page table.
115 @param[in] PagingMode The paging mode.
116 @param[out] Map Return an array that describes multiple linear address ranges.
117 @param[in, out] MapCount On input, the maximum number of entries that Map can hold.
118 On output, the number of entries in Map.
119
120 @retval RETURN_UNSUPPORTED PageLevel is not 5 or 4.
121 @retval RETURN_INVALID_PARAMETER MapCount is NULL.
122 @retval RETURN_INVALID_PARAMETER *MapCount is not 0 but Map is NULL.
123 @retval RETURN_BUFFER_TOO_SMALL *MapCount is too small.
124 @retval RETURN_SUCCESS Page table is parsed successfully.
125**/
126RETURN_STATUS
127EFIAPI
128PageTableParse (
129 IN UINTN PageTable,
130 IN PAGING_MODE PagingMode,
131 IN IA32_MAP_ENTRY *Map,
132 IN OUT UINTN *MapCount
133 );
134
135#endif
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