| 1 | /** @file
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| 2 | CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.
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| 3 |
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| 4 | Copyright (c) 2008 - 2023, Intel Corporation. All rights reserved.<BR>
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| 5 | SPDX-License-Identifier: BSD-2-Clause-Patent
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| 6 |
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| 7 | **/
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| 8 |
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| 9 | #ifndef _CPU_DXE_H_
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| 10 | #define _CPU_DXE_H_
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| 11 |
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| 12 | #include <PiDxe.h>
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| 13 |
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| 14 | #include <Protocol/Cpu.h>
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| 15 | #include <Protocol/MpService.h>
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| 16 | #include <Register/Intel/Cpuid.h>
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| 17 | #include <Register/Intel/Msr.h>
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| 18 |
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| 19 | #include <Ppi/SecPlatformInformation.h>
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| 20 | #include <Ppi/SecPlatformInformation2.h>
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| 21 |
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| 22 | #include <Library/UefiDriverEntryPoint.h>
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| 23 | #include <Library/UefiBootServicesTableLib.h>
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| 24 | #include <Library/DxeServicesTableLib.h>
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| 25 | #include <Library/BaseLib.h>
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| 26 | #include <Library/CpuLib.h>
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| 27 | #include <Library/BaseMemoryLib.h>
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| 28 | #include <Library/MemoryAllocationLib.h>
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| 29 | #include <Library/DebugLib.h>
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| 30 | #include <Library/MtrrLib.h>
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| 31 | #include <Library/LocalApicLib.h>
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| 32 | #include <Library/UefiLib.h>
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| 33 | #include <Library/CpuExceptionHandlerLib.h>
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| 34 | #include <Library/HobLib.h>
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| 35 | #include <Library/ReportStatusCodeLib.h>
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| 36 | #include <Library/MpInitLib.h>
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| 37 | #include <Library/TimerLib.h>
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| 38 |
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| 39 | #include <Guid/IdleLoopEvent.h>
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| 40 | #include <Guid/VectorHandoffTable.h>
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| 41 |
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| 42 | #define HEAP_GUARD_NONSTOP_MODE \
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| 43 | ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT6|BIT4|BIT1|BIT0)) > BIT6)
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| 44 |
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| 45 | #define NULL_DETECTION_NONSTOP_MODE \
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| 46 | ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT6|BIT0)) > BIT6)
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| 47 |
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| 48 | /**
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| 49 | Flush CPU data cache. If the instruction cache is fully coherent
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| 50 | with all DMA operations then function can just return EFI_SUCCESS.
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| 51 |
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| 52 | @param This Protocol instance structure
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| 53 | @param Start Physical address to start flushing from.
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| 54 | @param Length Number of bytes to flush. Round up to chipset
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| 55 | granularity.
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| 56 | @param FlushType Specifies the type of flush operation to perform.
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| 57 |
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| 58 | @retval EFI_SUCCESS If cache was flushed
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| 59 | @retval EFI_UNSUPPORTED If flush type is not supported.
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| 60 | @retval EFI_DEVICE_ERROR If requested range could not be flushed.
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| 61 |
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| 62 | **/
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| 63 | EFI_STATUS
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| 64 | EFIAPI
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| 65 | CpuFlushCpuDataCache (
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| 66 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 67 | IN EFI_PHYSICAL_ADDRESS Start,
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| 68 | IN UINT64 Length,
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| 69 | IN EFI_CPU_FLUSH_TYPE FlushType
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| 70 | );
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| 71 |
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| 72 | /**
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| 73 | Enables CPU interrupts.
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| 74 |
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| 75 | @param This Protocol instance structure
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| 76 |
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| 77 | @retval EFI_SUCCESS If interrupts were enabled in the CPU
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| 78 | @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
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| 79 |
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| 80 | **/
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| 81 | EFI_STATUS
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| 82 | EFIAPI
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| 83 | CpuEnableInterrupt (
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| 84 | IN EFI_CPU_ARCH_PROTOCOL *This
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| 85 | );
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| 86 |
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| 87 | /**
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| 88 | Disables CPU interrupts.
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| 89 |
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| 90 | @param This Protocol instance structure
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| 91 |
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| 92 | @retval EFI_SUCCESS If interrupts were disabled in the CPU.
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| 93 | @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
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| 94 |
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| 95 | **/
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| 96 | EFI_STATUS
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| 97 | EFIAPI
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| 98 | CpuDisableInterrupt (
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| 99 | IN EFI_CPU_ARCH_PROTOCOL *This
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| 100 | );
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| 101 |
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| 102 | /**
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| 103 | Return the state of interrupts.
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| 104 |
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| 105 | @param This Protocol instance structure
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| 106 | @param State Pointer to the CPU's current interrupt state
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| 107 |
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| 108 | @retval EFI_SUCCESS If interrupts were disabled in the CPU.
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| 109 | @retval EFI_INVALID_PARAMETER State is NULL.
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| 110 |
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| 111 | **/
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| 112 | EFI_STATUS
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| 113 | EFIAPI
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| 114 | CpuGetInterruptState (
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| 115 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 116 | OUT BOOLEAN *State
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| 117 | );
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| 118 |
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| 119 | /**
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| 120 | Generates an INIT to the CPU.
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| 121 |
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| 122 | @param This Protocol instance structure
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| 123 | @param InitType Type of CPU INIT to perform
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| 124 |
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| 125 | @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
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| 126 | seen.
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| 127 | @retval EFI_DEVICE_ERROR If CPU INIT failed.
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| 128 | @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
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| 129 |
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| 130 | **/
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| 131 | EFI_STATUS
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| 132 | EFIAPI
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| 133 | CpuInit (
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| 134 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 135 | IN EFI_CPU_INIT_TYPE InitType
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| 136 | );
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| 137 |
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| 138 | /**
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| 139 | Registers a function to be called from the CPU interrupt handler.
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| 140 |
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| 141 | @param This Protocol instance structure
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| 142 | @param InterruptType Defines which interrupt to hook. IA-32
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| 143 | valid range is 0x00 through 0xFF
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| 144 | @param InterruptHandler A pointer to a function of type
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| 145 | EFI_CPU_INTERRUPT_HANDLER that is called
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| 146 | when a processor interrupt occurs. A null
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| 147 | pointer is an error condition.
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| 148 |
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| 149 | @retval EFI_SUCCESS If handler installed or uninstalled.
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| 150 | @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
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| 151 | for InterruptType was previously installed.
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| 152 | @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
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| 153 | InterruptType was not previously installed.
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| 154 | @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
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| 155 | is not supported.
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| 156 |
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| 157 | **/
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| 158 | EFI_STATUS
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| 159 | EFIAPI
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| 160 | CpuRegisterInterruptHandler (
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| 161 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 162 | IN EFI_EXCEPTION_TYPE InterruptType,
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| 163 | IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
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| 164 | );
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| 165 |
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| 166 | /**
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| 167 | Returns a timer value from one of the CPU's internal timers. There is no
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| 168 | inherent time interval between ticks but is a function of the CPU frequency.
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| 169 |
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| 170 | @param This - Protocol instance structure.
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| 171 | @param TimerIndex - Specifies which CPU timer is requested.
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| 172 | @param TimerValue - Pointer to the returned timer value.
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| 173 | @param TimerPeriod - A pointer to the amount of time that passes
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| 174 | in femtoseconds (10-15) for each increment
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| 175 | of TimerValue. If TimerValue does not
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| 176 | increment at a predictable rate, then 0 is
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| 177 | returned. The amount of time that has
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| 178 | passed between two calls to GetTimerValue()
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| 179 | can be calculated with the formula
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| 180 | (TimerValue2 - TimerValue1) * TimerPeriod.
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| 181 | This parameter is optional and may be NULL.
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| 182 |
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| 183 | @retval EFI_SUCCESS - If the CPU timer count was returned.
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| 184 | @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
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| 185 | @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
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| 186 | @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
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| 187 |
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| 188 | **/
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| 189 | EFI_STATUS
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| 190 | EFIAPI
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| 191 | CpuGetTimerValue (
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| 192 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 193 | IN UINT32 TimerIndex,
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| 194 | OUT UINT64 *TimerValue,
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| 195 | OUT UINT64 *TimerPeriod OPTIONAL
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| 196 | );
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| 197 |
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| 198 | /**
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| 199 | Set memory cacheability attributes for given range of memory.
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| 200 |
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| 201 | @param This Protocol instance structure
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| 202 | @param BaseAddress Specifies the start address of the
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| 203 | memory range
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| 204 | @param Length Specifies the length of the memory range
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| 205 | @param Attributes The memory cacheability for the memory range
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| 206 |
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| 207 | @retval EFI_SUCCESS If the cacheability of that memory range is
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| 208 | set successfully
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| 209 | @retval EFI_UNSUPPORTED If the desired operation cannot be done
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| 210 | @retval EFI_INVALID_PARAMETER The input parameter is not correct,
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| 211 | such as Length = 0
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| 212 |
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| 213 | **/
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| 214 | EFI_STATUS
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| 215 | EFIAPI
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| 216 | CpuSetMemoryAttributes (
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| 217 | IN EFI_CPU_ARCH_PROTOCOL *This,
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| 218 | IN EFI_PHYSICAL_ADDRESS BaseAddress,
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| 219 | IN UINT64 Length,
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| 220 | IN UINT64 Attributes
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| 221 | );
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| 222 |
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| 223 | /**
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| 224 | Initialize Global Descriptor Table.
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| 225 |
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| 226 | **/
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| 227 | VOID
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| 228 | InitGlobalDescriptorTable (
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| 229 | VOID
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| 230 | );
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| 231 |
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| 232 | /**
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| 233 | Sets the code selector (CS).
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| 234 |
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| 235 | @param Selector Value of code selector.
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| 236 |
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| 237 | **/
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| 238 | VOID
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| 239 | EFIAPI
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| 240 | SetCodeSelector (
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| 241 | UINT16 Selector
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| 242 | );
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| 243 |
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| 244 | /**
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| 245 | Sets the data selector (DS).
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| 246 |
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| 247 | @param Selector Value of data selector.
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| 248 |
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| 249 | **/
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| 250 | VOID
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| 251 | EFIAPI
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| 252 | SetDataSelectors (
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| 253 | UINT16 Selector
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| 254 | );
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| 255 |
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| 256 | /**
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| 257 | Update GCD memory space attributes according to current page table setup.
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| 258 | **/
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| 259 | VOID
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| 260 | RefreshGcdMemoryAttributesFromPaging (
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| 261 | VOID
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| 262 | );
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| 263 |
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| 264 | /**
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| 265 | Special handler for #DB exception, which will restore the page attributes
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| 266 | (not-present). It should work with #PF handler which will set pages to
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| 267 | 'present'.
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| 268 |
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| 269 | @param ExceptionType Exception type.
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| 270 | @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
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| 271 |
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| 272 | **/
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| 273 | VOID
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| 274 | EFIAPI
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| 275 | DebugExceptionHandler (
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| 276 | IN EFI_EXCEPTION_TYPE ExceptionType,
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| 277 | IN EFI_SYSTEM_CONTEXT SystemContext
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| 278 | );
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| 279 |
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| 280 | /**
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| 281 | Special handler for #PF exception, which will set the pages which caused
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| 282 | #PF to be 'present'. The attribute of those pages should be restored in
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| 283 | the subsequent #DB handler.
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| 284 |
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| 285 | @param ExceptionType Exception type.
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| 286 | @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
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| 287 |
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| 288 | **/
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| 289 | VOID
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| 290 | EFIAPI
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| 291 | PageFaultExceptionHandler (
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| 292 | IN EFI_EXCEPTION_TYPE ExceptionType,
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| 293 | IN EFI_SYSTEM_CONTEXT SystemContext
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| 294 | );
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| 295 |
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| 296 | extern BOOLEAN mIsAllocatingPageTable;
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| 297 | extern UINTN mNumberOfProcessors;
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| 298 |
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| 299 | #endif
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