| 1 | ## @file
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| 2 | # EFI/Framework Open Virtual Machine Firmware (OVMF) platform
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| 3 | #
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| 4 | # Copyright (c) 2020, Rebecca Cran <rebecca@bsdio.com>
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| 5 | # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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| 6 | # Copyright (c) 2014, Pluribus Networks, Inc.
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| 7 | #
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| 8 | # SPDX-License-Identifier: BSD-2-Clause-Patent
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| 9 | #
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| 10 | ##
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| 11 |
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| 12 | [Defines]
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| 13 | DEC_SPECIFICATION = 0x00010005
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| 14 | PACKAGE_NAME = OvmfPkg
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| 15 | PACKAGE_GUID = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5
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| 16 | PACKAGE_VERSION = 0.1
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| 17 |
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| 18 | [Includes]
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| 19 | Include
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| 20 | Csm/Include
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| 21 |
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| 22 | [LibraryClasses]
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| 23 | ## @libraryclass Search and install ACPI tables.
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| 24 | #
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| 25 | AcpiPlatformLib|Include/Library/AcpiPlatformLib.h
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| 26 |
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| 27 | ## @libraryclass Access bhyve's firmware control interface.
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| 28 | BhyveFwCtlLib|Include/Library/BhyveFwCtlLib.h
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| 29 |
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| 30 | ## @libraryclass Verify blobs read from the VMM
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| 31 | BlobVerifierLib|Include/Library/BlobVerifierLib.h
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| 32 |
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| 33 | ## @libraryclass Loads and boots a Linux kernel image
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| 34 | #
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| 35 | LoadLinuxLib|Include/Library/LoadLinuxLib.h
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| 36 |
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| 37 | ## @libraryclass Declares helper functions for Secure Encrypted
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| 38 | # Virtualization (SEV) guests.
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| 39 | MemEncryptSevLib|Include/Library/MemEncryptSevLib.h
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| 40 |
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| 41 | ## @libraryclass Declares helper functions for TDX guests.
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| 42 | #
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| 43 | MemEncryptTdxLib|Include/Library/MemEncryptTdxLib.h
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| 44 |
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| 45 | ## @libraryclass Handle TPL changes within nested interrupt handlers
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| 46 | #
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| 47 | NestedInterruptTplLib|Include/Library/NestedInterruptTplLib.h
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| 48 |
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| 49 | ## @libraryclass Save and restore variables using a file
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| 50 | #
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| 51 | NvVarsFileLib|Include/Library/NvVarsFileLib.h
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| 52 |
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| 53 | ## @libraryclass Provides services to work with PCI capabilities in PCI
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| 54 | # config space.
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| 55 | PciCapLib|Include/Library/PciCapLib.h
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| 56 |
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| 57 | ## @libraryclass Layered on top of PciCapLib, allows clients to plug an
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| 58 | # EFI_PCI_IO_PROTOCOL backend into PciCapLib, for config
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| 59 | # space access.
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| 60 | PciCapPciIoLib|Include/Library/PciCapPciIoLib.h
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| 61 |
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| 62 | ## @libraryclass Layered on top of PciCapLib, allows clients to plug a
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| 63 | # PciSegmentLib backend into PciCapLib, for config space
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| 64 | # access.
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| 65 | PciCapPciSegmentLib|Include/Library/PciCapPciSegmentLib.h
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| 66 |
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| 67 | ## @libraryclass Provide common utility functions to PciHostBridgeLib
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| 68 | # instances in ArmVirtPkg and OvmfPkg.
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| 69 | PciHostBridgeUtilityLib|Include/Library/PciHostBridgeUtilityLib.h
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| 70 |
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| 71 | ## @libraryclass Register a status code handler for printing the Boot
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| 72 | # Manager's LoadImage() and StartImage() preparations, and
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| 73 | # return codes, to the UEFI console.
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| 74 | PlatformBmPrintScLib|Include/Library/PlatformBmPrintScLib.h
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| 75 |
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| 76 | ## @libraryclass Customize FVB2 protocol member functions for a platform.
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| 77 | PlatformFvbLib|Include/Library/PlatformFvbLib.h
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| 78 |
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| 79 | ## @libraryclass Access QEMU's firmware configuration interface
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| 80 | #
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| 81 | QemuFwCfgLib|Include/Library/QemuFwCfgLib.h
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| 82 |
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| 83 | ## @libraryclass S3 support for QEMU fw_cfg
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| 84 | #
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| 85 | QemuFwCfgS3Lib|Include/Library/QemuFwCfgS3Lib.h
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| 86 |
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| 87 | ## @libraryclass Parse the contents of named fw_cfg files as simple
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| 88 | # (scalar) data types.
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| 89 | QemuFwCfgSimpleParserLib|Include/Library/QemuFwCfgSimpleParserLib.h
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| 90 |
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| 91 | ## @libraryclass Rewrite the BootOrder NvVar based on QEMU's "bootorder"
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| 92 | # fw_cfg file.
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| 93 | #
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| 94 | QemuBootOrderLib|Include/Library/QemuBootOrderLib.h
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| 95 |
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| 96 | ## @libraryclass Load a kernel image and command line passed to QEMU via
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| 97 | # the command line
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| 98 | #
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| 99 | QemuLoadImageLib|Include/Library/QemuLoadImageLib.h
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| 100 |
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| 101 | ## @libraryclass Serialize (and deserialize) variables
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| 102 | #
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| 103 | SerializeVariablesLib|Include/Library/SerializeVariablesLib.h
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| 104 |
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| 105 | ## @libraryclass TdxHelper
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| 106 | #
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| 107 | TdxHelperLib|Include/Library/TdxHelperLib.h
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| 108 |
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| 109 | ## @libraryclass Declares utility functions for virtio device drivers.
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| 110 | VirtioLib|Include/Library/VirtioLib.h
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| 111 |
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| 112 | ## @libraryclass Install Virtio Device Protocol instances on virtio-mmio
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| 113 | # transports.
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| 114 | VirtioMmioDeviceLib|Include/Library/VirtioMmioDeviceLib.h
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| 115 |
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| 116 | ## @libraryclass Provides a Nor flash interface.
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| 117 | #
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| 118 | VirtNorFlashPlatformLib|Include/Library/VirtNorFlashPlatformLib.h
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| 119 |
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| 120 | ## @libraryclass Invoke Xen hypercalls
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| 121 | #
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| 122 | XenHypercallLib|Include/Library/XenHypercallLib.h
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| 123 |
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| 124 | ## @libraryclass Manage XenBus device path and I/O handles
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| 125 | #
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| 126 | XenIoMmioLib|Include/Library/XenIoMmioLib.h
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| 127 |
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| 128 | ## @libraryclass Get information about Xen
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| 129 | #
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| 130 | XenPlatformLib|Include/Library/XenPlatformLib.h
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| 131 |
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| 132 | ## @libraryclass TdxMailboxLib
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| 133 | #
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| 134 | TdxMailboxLib|Include/Library/TdxMailboxLib.h
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| 135 |
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| 136 | ## @libraryclass PlatformInitLib
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| 137 | #
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| 138 | PlatformInitLib|Include/Library/PlatformInitLib.h
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| 139 |
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| 140 | ## @libraryclass PeilessStartupLib
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| 141 | #
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| 142 | PeilessStartupLib|Include/Library/PeilessStartupLib.h
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| 143 |
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| 144 | ## @libraryclass HardwareInfoLib
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| 145 | #
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| 146 | HardwareInfoLib|Include/Library/HardwareInfoLib.h
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| 147 |
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| 148 | [Guids]
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| 149 | gUefiOvmfPkgTokenSpaceGuid = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}
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| 150 | gEfiXenInfoGuid = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}
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| 151 | gOvmfPkKek1AppPrefixGuid = {0x4e32566d, 0x8e9e, 0x4f52, {0x81, 0xd3, 0x5b, 0xb9, 0x71, 0x5f, 0x97, 0x27}}
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| 152 | gOvmfPlatformConfigGuid = {0x7235c51c, 0x0c80, 0x4cab, {0x87, 0xac, 0x3b, 0x08, 0x4a, 0x63, 0x04, 0xb1}}
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| 153 | gVirtioMmioTransportGuid = {0x837dca9e, 0xe874, 0x4d82, {0xb2, 0x9a, 0x23, 0xfe, 0x0e, 0x23, 0xd1, 0xe2}}
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| 154 | gQemuRamfbGuid = {0x557423a1, 0x63ab, 0x406c, {0xbe, 0x7e, 0x91, 0xcd, 0xbc, 0x08, 0xc4, 0x57}}
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| 155 | gXenBusRootDeviceGuid = {0xa732241f, 0x383d, 0x4d9c, {0x8a, 0xe1, 0x8e, 0x09, 0x83, 0x75, 0x89, 0xd7}}
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| 156 | gRootBridgesConnectedEventGroupGuid = {0x24a2d66f, 0xeedd, 0x4086, {0x90, 0x42, 0xf2, 0x6e, 0x47, 0x97, 0xee, 0x69}}
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| 157 | gMicrosoftVendorGuid = {0x77fa9abd, 0x0359, 0x4d32, {0xbd, 0x60, 0x28, 0xf4, 0xe7, 0x8f, 0x78, 0x4b}}
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| 158 | gEfiLegacyBiosGuid = {0x2E3044AC, 0x879F, 0x490F, {0x97, 0x60, 0xBB, 0xDF, 0xAF, 0x69, 0x5F, 0x50}}
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| 159 | gEfiLegacyDevOrderVariableGuid = {0xa56074db, 0x65fe, 0x45f7, {0xbd, 0x21, 0x2d, 0x2b, 0xdd, 0x8e, 0x96, 0x52}}
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| 160 | gQemuKernelLoaderFsMediaGuid = {0x1428f772, 0xb64a, 0x441e, {0xb8, 0xc3, 0x9e, 0xbd, 0xd7, 0xf8, 0x93, 0xc7}}
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| 161 | gGrubFileGuid = {0xb5ae312c, 0xbc8a, 0x43b1, {0x9c, 0x62, 0xeb, 0xb8, 0x26, 0xdd, 0x5d, 0x07}}
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| 162 | gConfidentialComputingSecretGuid = {0xadf956ad, 0xe98c, 0x484c, {0xae, 0x11, 0xb5, 0x1c, 0x7d, 0x33, 0x64, 0x47}}
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| 163 | gConfidentialComputingSevSnpBlobGuid = {0x067b1f5f, 0xcf26, 0x44c5, {0x85, 0x54, 0x93, 0xd7, 0x77, 0x91, 0x2d, 0x42}}
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| 164 | gUefiOvmfPkgPlatformInfoGuid = {0xdec9b486, 0x1f16, 0x47c7, {0x8f, 0x68, 0xdf, 0x1a, 0x41, 0x88, 0x8b, 0xa5}}
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| 165 | gVMMBootOrderGuid = {0x668f4529, 0x63d0, 0x4bb5, {0xb6, 0x5d, 0x6f, 0xbb, 0x9d, 0x36, 0xa4, 0x4a}}
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| 166 | gUefiOvmfPkgTdxAcpiHobGuid = {0x6a0c5870, 0xd4ed, 0x44f4, {0xa1, 0x35, 0xdd, 0x23, 0x8b, 0x6f, 0x0c, 0x8d}}
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| 167 | gEfiNonCcFvGuid = {0xae047c6d, 0xbce9, 0x426c, {0xae, 0x03, 0xa6, 0x8e, 0x3b, 0x8a, 0x04, 0x88}}
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| 168 | gOvmfVariableGuid = {0x50bea1e5, 0xa2c5, 0x46e9, {0x9b, 0x3a, 0x59, 0x59, 0x65, 0x16, 0xb0, 0x0a}}
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| 169 |
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| 170 | [Ppis]
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| 171 | # PPI whose presence in the PPI database signals that the TPM base address
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| 172 | # has been discovered and recorded
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| 173 | gOvmfTpmDiscoveredPpiGuid = {0xb9a61ad0, 0x2802, 0x41f3, {0xb5, 0x13, 0x96, 0x51, 0xce, 0x6b, 0xd5, 0x75}}
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| 174 |
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| 175 | # This PPI signals that accessing the MMIO range of the TPM is possible in
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| 176 | # the PEI phase, regardless of memory encryption
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| 177 | gOvmfTpmMmioAccessiblePpiGuid = {0x35c84ff2, 0x7bfe, 0x453d, {0x84, 0x5f, 0x68, 0x3a, 0x49, 0x2c, 0xf7, 0xb7}}
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| 178 |
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| 179 | gEfiPeiMpInitLibMpDepPpiGuid = {0x138f9cf4, 0xf0e7, 0x4721, { 0x8f, 0x49, 0xf5, 0xff, 0xec, 0xf4, 0x2d, 0x40}}
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| 180 | gEfiPeiMpInitLibUpDepPpiGuid = {0xb590774, 0xbc67, 0x49f4, { 0xa7, 0xdb, 0xe8, 0x2e, 0x89, 0xe6, 0xb5, 0xd6}}
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| 181 |
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| 182 | [Protocols]
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| 183 | gVirtioDeviceProtocolGuid = {0xfa920010, 0x6785, 0x4941, {0xb6, 0xec, 0x49, 0x8c, 0x57, 0x9f, 0x16, 0x0a}}
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| 184 | gXenBusProtocolGuid = {0x3d3ca290, 0xb9a5, 0x11e3, {0xb7, 0x5d, 0xb8, 0xac, 0x6f, 0x7d, 0x65, 0xe6}}
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| 185 | gXenIoProtocolGuid = {0x6efac84f, 0x0ab0, 0x4747, {0x81, 0xbe, 0x85, 0x55, 0x62, 0x59, 0x04, 0x49}}
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| 186 | gIoMmuAbsentProtocolGuid = {0xf8775d50, 0x8abd, 0x4adf, {0x92, 0xac, 0x85, 0x3e, 0x51, 0xf6, 0xc8, 0xdc}}
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| 187 | gEfiLegacy8259ProtocolGuid = {0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1}}
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| 188 | gEfiFirmwareVolumeProtocolGuid = {0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xcd, 0x81, 0x54, 0xbd, 0x27, 0xf8}}
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| 189 | gEfiIsaAcpiProtocolGuid = {0x64a892dc, 0x5561, 0x4536, {0x92, 0xc7, 0x79, 0x9b, 0xfc, 0x18, 0x33, 0x55}}
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| 190 | gEfiIsaIoProtocolGuid = {0x7ee2bd44, 0x3da0, 0x11d4, {0x9a, 0x38, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
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| 191 | gEfiLegacyBiosProtocolGuid = {0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d}}
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| 192 | gEfiLegacyBiosPlatformProtocolGuid = {0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x09, 0x07, 0x9c, 0x0c, 0xb4}}
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| 193 | gEfiLegacyInterruptProtocolGuid = {0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe}}
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| 194 | gEfiVgaMiniPortProtocolGuid = {0xc7735a2f, 0x88f5, 0x4882, {0xae, 0x63, 0xfa, 0xac, 0x8c, 0x8b, 0x86, 0xb3}}
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| 195 | gOvmfLoadedX86LinuxKernelProtocolGuid = {0xa3edc05d, 0xb618, 0x4ff6, {0x95, 0x52, 0x76, 0xd7, 0x88, 0x63, 0x43, 0xc8}}
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| 196 | gOvmfSevMemoryAcceptanceProtocolGuid = {0xc5a010fe, 0x38a7, 0x4531, {0x8a, 0x4a, 0x05, 0x00, 0xd2, 0xfd, 0x16, 0x49}}
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| 197 | gQemuAcpiTableNotifyProtocolGuid = {0x928939b2, 0x4235, 0x462f, {0x95, 0x80, 0xf6, 0xa2, 0xb2, 0xc2, 0x1a, 0x4f}}
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| 198 | gEfiMpInitLibMpDepProtocolGuid = {0xbb00a5ca, 0x8ce, 0x462f, {0xa5, 0x37, 0x43, 0xc7, 0x4a, 0x82, 0x5c, 0xa4}}
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| 199 | gEfiMpInitLibUpDepProtocolGuid = {0xa9e7cef1, 0x5682, 0x42cc, {0xb1, 0x23, 0x99, 0x30, 0x97, 0x3f, 0x4a, 0x9f}}
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| 200 |
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| 201 | [PcdsFixedAtBuild]
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| 202 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase|0x0|UINT32|0
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| 203 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize|0x0|UINT32|1
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| 204 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase|0x0|UINT32|0x15
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| 205 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize|0x0|UINT32|0x16
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| 206 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeNonCcFvBase|0x0|UINT32|0x6a
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| 207 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeNonCcFvSize|0x0|UINT32|0x6b
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| 208 |
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| 209 | ## This flag is used to control the destination port for PlatformDebugLibIoPort
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| 210 | gUefiOvmfPkgTokenSpaceGuid.PcdDebugIoPort|0x402|UINT16|4
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| 211 |
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| 212 | ## When VirtioScsiDxe is instantiated for a HBA, the numbers of targets and
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| 213 | # LUNs are retrieved from the host during virtio-scsi setup.
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| 214 | # MdeModulePkg/Bus/Scsi/ScsiBusDxe then scans all MaxTarget * MaxLun
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| 215 | # possible devices. This can take extremely long, for example with
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| 216 | # MaxTarget=255 and MaxLun=16383. The *inclusive* constants below limit
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| 217 | # MaxTarget and MaxLun, independently, should the host report higher values,
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| 218 | # so that scanning the number of devices given by their product is still
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| 219 | # acceptably fast.
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| 220 | gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxTargetLimit|31|UINT16|6
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| 221 | gUefiOvmfPkgTokenSpaceGuid.PcdVirtioScsiMaxLunLimit|7|UINT32|7
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| 222 |
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| 223 | ## Sets the *inclusive* number of targets and LUNs that PvScsi exposes for
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| 224 | # scan by ScsiBusDxe.
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| 225 | # As specified above for VirtioScsi, ScsiBusDxe scans all MaxTarget * MaxLun
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| 226 | # possible devices, which can take extremely long. Thus, the below constants
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| 227 | # are used so that scanning the number of devices given by their product
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| 228 | # is still acceptably fast.
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| 229 | gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxTargetLimit|64|UINT8|0x36
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| 230 | gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiMaxLunLimit|0|UINT8|0x37
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| 231 |
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| 232 | ## After PvScsiDxe sends a SCSI request to the device, it waits for
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| 233 | # the request completion in a polling loop.
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| 234 | # This constant defines how many micro-seconds to wait between each
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| 235 | # polling loop iteration.
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| 236 | gUefiOvmfPkgTokenSpaceGuid.PcdPvScsiWaitForCmpStallInUsecs|5|UINT32|0x38
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| 237 |
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| 238 | ## Set the *inclusive* number of targets that MptScsi exposes for scan
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| 239 | # by ScsiBusDxe.
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| 240 | gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiMaxTargetLimit|7|UINT8|0x39
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| 241 |
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| 242 | ## Microseconds to stall between polling for MptScsi request result
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| 243 | gUefiOvmfPkgTokenSpaceGuid.PcdMptScsiStallPerPollUsec|5|UINT32|0x3a
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| 244 |
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| 245 | ## Set the *inclusive* number of targets and LUNs that LsiScsi exposes for
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| 246 | # scan by ScsiBusDxe.
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| 247 | gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxTargetLimit|7|UINT8|0x3b
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| 248 | gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiMaxLunLimit|0|UINT8|0x3c
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| 249 |
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| 250 | ## Microseconds to stall between polling for LsiScsi request result
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| 251 | gUefiOvmfPkgTokenSpaceGuid.PcdLsiScsiStallPerPollUsec|5|UINT32|0x3d
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| 252 |
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| 253 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x8
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| 254 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x9
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| 255 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0xa
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| 256 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0xb
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| 257 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0xc
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| 258 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
|
|---|
| 259 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
|
|---|
| 260 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress|0x0|UINT32|0xf
|
|---|
| 261 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase|0x0|UINT32|0x11
|
|---|
| 262 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize|0x0|UINT32|0x12
|
|---|
| 263 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|0x0|UINT32|0x13
|
|---|
| 264 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize|0x0|UINT32|0x14
|
|---|
| 265 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase|0x0|UINT32|0x18
|
|---|
| 266 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize|0x0|UINT32|0x19
|
|---|
| 267 | gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
|
|---|
| 268 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f
|
|---|
| 269 |
|
|---|
| 270 | ## Pcd8259LegacyModeMask defines the default mask value for platform. This
|
|---|
| 271 | # value is determined.
|
|---|
| 272 | # 1) If platform only support pure UEFI, value should be set to 0xFFFF or
|
|---|
| 273 | # 0xFFFE; Because only clock interrupt is allowed in legacy mode in pure
|
|---|
| 274 | # UEFI platform.
|
|---|
| 275 | # 2) If platform install CSM and use thunk module:
|
|---|
| 276 | # a) If thunk call provided by CSM binary requires some legacy interrupt
|
|---|
| 277 | # support, the corresponding bit should be opened as 0.
|
|---|
| 278 | # For example, if keyboard interfaces provided CSM binary use legacy
|
|---|
| 279 | # keyboard interrupt in 8259 bit 1, then the value should be set to
|
|---|
| 280 | # 0xFFFC.
|
|---|
| 281 | # b) If all thunk call provied by CSM binary do not require legacy
|
|---|
| 282 | # interrupt support, value should be set to 0xFFFF or 0xFFFE.
|
|---|
| 283 | #
|
|---|
| 284 | # The default value of legacy mode mask could be changed by
|
|---|
| 285 | # EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely need change it
|
|---|
| 286 | # except some special cases such as when initializing the CSM binary, it
|
|---|
| 287 | # should be set to 0xFFFF to mask all legacy interrupt. Please restore the
|
|---|
| 288 | # original legacy mask value if changing is made for these special case.
|
|---|
| 289 | gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x3
|
|---|
| 290 |
|
|---|
| 291 | ## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy
|
|---|
| 292 | # mode's interrrupt controller.
|
|---|
| 293 | # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
|
|---|
| 294 | gUefiOvmfPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x5
|
|---|
| 295 |
|
|---|
| 296 | ## Indicates if BiosVideo driver will switch to 80x25 Text VGA Mode when
|
|---|
| 297 | # exiting boot service.
|
|---|
| 298 | # TRUE - Switch to Text VGA Mode.
|
|---|
| 299 | # FALSE - Does not switch to Text VGA Mode.
|
|---|
| 300 | gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoSetTextVgaModeEnable|FALSE|BOOLEAN|0x28
|
|---|
| 301 |
|
|---|
| 302 | ## Indicates if BiosVideo driver will check for VESA BIOS Extension service
|
|---|
| 303 | # support.
|
|---|
| 304 | # TRUE - Check for VESA BIOS Extension service.
|
|---|
| 305 | # FALSE - Does not check for VESA BIOS Extension service.
|
|---|
| 306 | gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable|TRUE|BOOLEAN|0x29
|
|---|
| 307 |
|
|---|
| 308 | ## Indicates if BiosVideo driver will check for VGA service support.
|
|---|
| 309 | # NOTE: If both PcdBiosVideoCheckVbeEnable and PcdBiosVideoCheckVgaEnable
|
|---|
| 310 | # are set to FALSE, that means Graphics Output protocol will not be
|
|---|
| 311 | # installed, the VGA miniport protocol will be installed instead.
|
|---|
| 312 | # TRUE - Check for VGA service.<BR>
|
|---|
| 313 | # FALSE - Does not check for VGA service.<BR>
|
|---|
| 314 | gUefiOvmfPkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable|TRUE|BOOLEAN|0x2a
|
|---|
| 315 |
|
|---|
| 316 | ## Indicates if memory space for legacy region will be set as cacheable.
|
|---|
| 317 | # TRUE - Set cachebility for legacy region.
|
|---|
| 318 | # FALSE - Does not set cachebility for legacy region.
|
|---|
| 319 | gUefiOvmfPkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion|TRUE|BOOLEAN|0x2b
|
|---|
| 320 |
|
|---|
| 321 | ## Specify memory size with bytes to reserve EBDA below 640K for OPROM.
|
|---|
| 322 | # The value should be a multiple of 4KB.
|
|---|
| 323 | gUefiOvmfPkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x2c
|
|---|
| 324 |
|
|---|
| 325 | ## Specify memory base address for OPROM to find free memory.
|
|---|
| 326 | # Some OPROMs do not use EBDA or PMM to allocate memory for its usage,
|
|---|
| 327 | # instead they find the memory filled with zero from 0x20000.
|
|---|
| 328 | # The value should be a multiple of 4KB.
|
|---|
| 329 | # The range should be below the EBDA reserved range from
|
|---|
| 330 | # (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
|
|---|
| 331 | # CONVENTIONAL_MEMORY_TOP.
|
|---|
| 332 | gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x2d
|
|---|
| 333 |
|
|---|
| 334 | ## Specify memory size with bytes for OPROM to find free memory.
|
|---|
| 335 | # The value should be a multiple of 4KB. And the range should be below the
|
|---|
| 336 | # EBDA reserved range from
|
|---|
| 337 | # (CONVENTIONAL_MEMORY_TOP - Reserved EBDA Memory Size) to
|
|---|
| 338 | # CONVENTIONAL_MEMORY_TOP.
|
|---|
| 339 | gUefiOvmfPkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x2e
|
|---|
| 340 |
|
|---|
| 341 | ## Specify the end of address below 1MB for the OPROM.
|
|---|
| 342 | # The last shadowed OpROM should not exceed this address.
|
|---|
| 343 | gUefiOvmfPkgTokenSpaceGuid.PcdEndOpromShadowAddress|0xdffff|UINT32|0x2f
|
|---|
| 344 |
|
|---|
| 345 | ## Specify the low PMM (Post Memory Manager) size with bytes below 1MB.
|
|---|
| 346 | # The value should be a multiple of 4KB.
|
|---|
| 347 | # @Prompt Low PMM (Post Memory Manager) Size
|
|---|
| 348 | gUefiOvmfPkgTokenSpaceGuid.PcdLowPmmMemorySize|0x10000|UINT32|0x30
|
|---|
| 349 |
|
|---|
| 350 | ## Specify the high PMM (Post Memory Manager) size with bytes above 1MB.
|
|---|
| 351 | # The value should be a multiple of 4KB.
|
|---|
| 352 | gUefiOvmfPkgTokenSpaceGuid.PcdHighPmmMemorySize|0x400000|UINT32|0x31
|
|---|
| 353 |
|
|---|
| 354 | gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|0x0|UINT32|0x17
|
|---|
| 355 | gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize|0x0|UINT32|0x32
|
|---|
| 356 |
|
|---|
| 357 | ## Number of page frames to use for storing grant table entries.
|
|---|
| 358 | gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames|4|UINT32|0x33
|
|---|
| 359 |
|
|---|
| 360 | ## Specify the extra page table needed to mark the GHCB as unencrypted.
|
|---|
| 361 | # The value should be a multiple of 4KB for each.
|
|---|
| 362 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase|0x0|UINT32|0x3e
|
|---|
| 363 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize|0x0|UINT32|0x3f
|
|---|
| 364 |
|
|---|
| 365 | ## The base address of the SEC GHCB page used by SEV-ES.
|
|---|
| 366 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|0|UINT32|0x40
|
|---|
| 367 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize|0|UINT32|0x41
|
|---|
| 368 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupBase|0|UINT32|0x44
|
|---|
| 369 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBackupSize|0|UINT32|0x45
|
|---|
| 370 |
|
|---|
| 371 | ## The base address and size of the SEV Launch Secret Area provisioned
|
|---|
| 372 | # after remote attestation. If this is set in the .fdf, the platform
|
|---|
| 373 | # is responsible for protecting the area from DXE phase overwrites.
|
|---|
| 374 | gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|0x0|UINT32|0x42
|
|---|
| 375 | gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretSize|0x0|UINT32|0x43
|
|---|
| 376 |
|
|---|
| 377 | ## The base address and size of a hash table confirming allowed
|
|---|
| 378 | # parameters to be passed in via the Qemu firmware configuration
|
|---|
| 379 | # device
|
|---|
| 380 | gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|0x0|UINT32|0x47
|
|---|
| 381 | gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize|0x0|UINT32|0x48
|
|---|
| 382 |
|
|---|
| 383 | ## The base address and size of the work area used during the SEC
|
|---|
| 384 | # phase by the SEV and TDX supports.
|
|---|
| 385 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase|0|UINT32|0x49
|
|---|
| 386 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaSize|0|UINT32|0x50
|
|---|
| 387 |
|
|---|
| 388 | ## The work area contains a fixed size header in the Include/WorkArea.h.
|
|---|
| 389 | # The size of this header is used early boot, and is provided through
|
|---|
| 390 | # a fixed PCD. It need to be kept in sync with any changes to the
|
|---|
| 391 | # header definition.
|
|---|
| 392 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfConfidentialComputingWorkAreaHeader|4|UINT32|0x51
|
|---|
| 393 |
|
|---|
| 394 | ## The base address and size of the TDX Cfv base and size.
|
|---|
| 395 | gUefiOvmfPkgTokenSpaceGuid.PcdCfvBase|0|UINT32|0x52
|
|---|
| 396 | gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataOffset|0|UINT32|0x53
|
|---|
| 397 | gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataSize|0|UINT32|0x54
|
|---|
| 398 |
|
|---|
| 399 | ## The base address and size of the TDX Bfv base and size.
|
|---|
| 400 | gUefiOvmfPkgTokenSpaceGuid.PcdBfvBase|0|UINT32|0x55
|
|---|
| 401 | gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataOffset|0|UINT32|0x56
|
|---|
| 402 | gUefiOvmfPkgTokenSpaceGuid.PcdBfvRawDataSize|0|UINT32|0x57
|
|---|
| 403 |
|
|---|
| 404 | ## The base address and size of the SEV-SNP Secrets Area that contains
|
|---|
| 405 | # the VM platform communication key used to send and recieve the
|
|---|
| 406 | # messages to the PSP. If this is set in the .fdf, the platform
|
|---|
| 407 | # is responsible to reserve this area from DXE phase overwrites.
|
|---|
| 408 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsBase|0|UINT32|0x58
|
|---|
| 409 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSnpSecretsSize|0|UINT32|0x59
|
|---|
| 410 |
|
|---|
| 411 | ## The base address and size of a CPUID Area that contains the hypervisor
|
|---|
| 412 | # provided CPUID results. In the case of SEV-SNP, the CPUID results are
|
|---|
| 413 | # filtered by the SEV-SNP firmware. If this is set in the .fdf, the
|
|---|
| 414 | # platform is responsible to reserve this area from DXE phase overwrites.
|
|---|
| 415 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|0|UINT32|0x60
|
|---|
| 416 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidSize|0|UINT32|0x61
|
|---|
| 417 |
|
|---|
| 418 | ## The range of memory that is validated by the SEC phase.
|
|---|
| 419 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecValidatedStart|0|UINT32|0x62
|
|---|
| 420 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecValidatedEnd|0|UINT32|0x63
|
|---|
| 421 |
|
|---|
| 422 | ## The Tdx accept page size. 0x1000(4k),0x200000(2M)
|
|---|
| 423 | gUefiOvmfPkgTokenSpaceGuid.PcdTdxAcceptPageSize|0x200000|UINT32|0x65
|
|---|
| 424 |
|
|---|
| 425 | ## The QEMU fw_cfg variable that UefiDriverEntryPointFwCfgOverrideLib will
|
|---|
| 426 | # check to decide whether to abort dispatch of the driver it is linked into.
|
|---|
| 427 | gUefiOvmfPkgTokenSpaceGuid.PcdEntryPointOverrideFwCfgVarName|""|VOID*|0x68
|
|---|
| 428 |
|
|---|
| 429 | ## Restrict boot to EFI applications in firmware volumes.
|
|---|
| 430 | gUefiOvmfPkgTokenSpaceGuid.PcdBootRestrictToFirmware|FALSE|BOOLEAN|0x6c
|
|---|
| 431 |
|
|---|
| 432 | [PcdsDynamic, PcdsDynamicEx]
|
|---|
| 433 | gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2
|
|---|
| 434 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10
|
|---|
| 435 | gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b
|
|---|
| 436 | gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21
|
|---|
| 437 |
|
|---|
| 438 | ## The IO port aperture shared by all PCI root bridges.
|
|---|
| 439 | #
|
|---|
| 440 | gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22
|
|---|
| 441 | gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23
|
|---|
| 442 |
|
|---|
| 443 | ## The 32-bit MMIO aperture shared by all PCI root bridges.
|
|---|
| 444 | #
|
|---|
| 445 | gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24
|
|---|
| 446 | gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT64|0x25
|
|---|
| 447 |
|
|---|
| 448 | ## The 64-bit MMIO aperture shared by all PCI root bridges.
|
|---|
| 449 | #
|
|---|
| 450 | gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x26
|
|---|
| 451 | gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x27
|
|---|
| 452 |
|
|---|
| 453 | ## The following setting controls how many megabytes we configure as TSEG on
|
|---|
| 454 | # Q35, for SMRAM purposes. Permitted defaults are: 1, 2, 8. Other defaults
|
|---|
| 455 | # cause undefined behavior. During boot, the PCD is updated by PlatformPei
|
|---|
| 456 | # to reflect the extended TSEG size, if one is advertized by QEMU.
|
|---|
| 457 | #
|
|---|
| 458 | # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
|
|---|
| 459 | gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8|UINT16|0x20
|
|---|
| 460 |
|
|---|
| 461 | ## Set to TRUE by PlatformPei if the Q35 board supports the "SMRAM at default
|
|---|
| 462 | # SMBASE" feature.
|
|---|
| 463 | #
|
|---|
| 464 | # This PCD is only accessed if PcdSmmSmramRequire is TRUE (see below).
|
|---|
| 465 | gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE|BOOLEAN|0x34
|
|---|
| 466 |
|
|---|
| 467 | ## This PCD adds a communication channel between OVMF's SmmCpuFeaturesLib
|
|---|
| 468 | # instance in PiSmmCpuDxeSmm, and CpuHotplugSmm.
|
|---|
| 469 | gUefiOvmfPkgTokenSpaceGuid.PcdCpuHotEjectDataAddress|0|UINT64|0x46
|
|---|
| 470 |
|
|---|
| 471 | ## This PCD tracks where PcdVideo{Horizontal,Vertical}Resolution
|
|---|
| 472 | # values are coming from.
|
|---|
| 473 | # 0 - unset (defaults from platform dsc)
|
|---|
| 474 | # 1 - set from PlatformConfig
|
|---|
| 475 | # 2 - set by GOP Driver.
|
|---|
| 476 | gUefiOvmfPkgTokenSpaceGuid.PcdVideoResolutionSource|0|UINT8|0x64
|
|---|
| 477 |
|
|---|
| 478 | #
|
|---|
| 479 | # Whether to force disable ACPI, regardless of the fw_cfg settings
|
|---|
| 480 | # exposed by QEMU
|
|---|
| 481 | #
|
|---|
| 482 | gUefiOvmfPkgTokenSpaceGuid.PcdForceNoAcpi|0x0|BOOLEAN|0x69
|
|---|
| 483 |
|
|---|
| 484 | [PcdsFeatureFlag]
|
|---|
| 485 | gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderPciTranslation|TRUE|BOOLEAN|0x1c
|
|---|
| 486 | gUefiOvmfPkgTokenSpaceGuid.PcdQemuBootOrderMmioTranslation|FALSE|BOOLEAN|0x1d
|
|---|
| 487 |
|
|---|
| 488 | ## This feature flag enables SMM/SMRAM support. Note that it also requires
|
|---|
| 489 | # such support from the underlying QEMU instance; if that support is not
|
|---|
| 490 | # present, the firmware will reject continuing after a certain point.
|
|---|
| 491 | #
|
|---|
| 492 | # The flag also acts as a general "security switch"; when TRUE, many
|
|---|
| 493 | # components will change behavior, with the goal of preventing a malicious
|
|---|
| 494 | # runtime OS from tampering with firmware structures (special memory ranges
|
|---|
| 495 | # used by OVMF, the varstore pflash chip, LockBox etc).
|
|---|
| 496 | gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|FALSE|BOOLEAN|0x1e
|
|---|
| 497 |
|
|---|
| 498 | ## This feature flag indicates the firmware build supports secure boot.
|
|---|
| 499 | gUefiOvmfPkgTokenSpaceGuid.PcdSecureBootSupported|FALSE|BOOLEAN|0x6d
|
|---|
| 500 |
|
|---|
| 501 | ## Informs modules (including pre-DXE-phase modules) whether the platform
|
|---|
| 502 | # firmware contains a CSM (Compatibility Support Module).
|
|---|
| 503 | #
|
|---|
| 504 | gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable|FALSE|BOOLEAN|0x35
|
|---|
