1 | /** @file
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2 | Provide constructor and GetTick for Base instance of ACPI Timer Library
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3 |
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4 | Copyright (C) 2014, Gabriel L. Somlo <somlo@cmu.edu>
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5 |
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6 | SPDX-License-Identifier: BSD-2-Clause-Patent
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7 | **/
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8 |
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9 | #include <Library/DebugLib.h>
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10 | #include <Library/IoLib.h>
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11 | #include <Library/PciLib.h>
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12 | #include <OvmfPlatforms.h>
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13 |
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14 | //
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15 | // Cached ACPI Timer IO Address
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16 | //
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17 | STATIC UINT32 mAcpiTimerIoAddr;
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18 |
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19 | /**
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20 | The constructor function caches the ACPI tick counter address, and,
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21 | if necessary, enables ACPI IO space.
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22 |
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23 | @retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.
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24 |
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25 | **/
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26 | RETURN_STATUS
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27 | EFIAPI
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28 | AcpiTimerLibConstructor (
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29 | VOID
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30 | )
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31 | {
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32 | UINT16 HostBridgeDevId;
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33 | UINTN Pmba;
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34 | UINT32 PmbaAndVal;
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35 | UINT32 PmbaOrVal;
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36 | UINTN AcpiCtlReg;
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37 | UINT8 AcpiEnBit;
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38 |
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39 | //
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40 | // Query Host Bridge DID to determine platform type
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41 | //
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42 | HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
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43 | switch (HostBridgeDevId) {
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44 | case INTEL_82441_DEVICE_ID:
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45 | #ifdef VBOX
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46 | // HACK ALERT! There is no host bridge device in the PCIe chipset, and the same PIIX4 PM device is used.
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47 | // But there might be some other device at 0:0.0.
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48 | default:
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49 | #endif
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50 | Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
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51 | PmbaAndVal = ~(UINT32)PIIX4_PMBA_MASK;
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52 | PmbaOrVal = PIIX4_PMBA_VALUE;
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53 | AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
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54 | AcpiEnBit = PIIX4_PMREGMISC_PMIOSE;
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55 | break;
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56 | case INTEL_Q35_MCH_DEVICE_ID:
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57 | Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
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58 | PmbaAndVal = ~(UINT32)ICH9_PMBASE_MASK;
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59 | PmbaOrVal = ICH9_PMBASE_VALUE;
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60 | AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
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61 | AcpiEnBit = ICH9_ACPI_CNTL_ACPI_EN;
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62 | break;
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63 | case CLOUDHV_DEVICE_ID:
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64 | mAcpiTimerIoAddr = CLOUDHV_ACPI_TIMER_IO_ADDRESS;
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65 | return RETURN_SUCCESS;
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66 | #ifndef VBOX
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67 | default:
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68 | DEBUG ((
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69 | DEBUG_ERROR,
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70 | "%a: Unknown Host Bridge Device ID: 0x%04x\n",
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71 | __func__,
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72 | HostBridgeDevId
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73 | ));
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74 | ASSERT (FALSE);
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75 | return RETURN_UNSUPPORTED;
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76 | #endif
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77 | }
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78 |
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79 | //
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80 | // Check to see if the Power Management Base Address is already enabled
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81 | //
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82 | if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
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83 | //
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84 | // If the Power Management Base Address is not programmed,
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85 | // then program it now.
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86 | //
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87 | PciAndThenOr32 (Pmba, PmbaAndVal, PmbaOrVal);
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88 |
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89 | //
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90 | // Enable PMBA I/O port decodes
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91 | //
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92 | PciOr8 (AcpiCtlReg, AcpiEnBit);
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93 | }
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94 |
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95 | mAcpiTimerIoAddr = (PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET;
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96 | return RETURN_SUCCESS;
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97 | }
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98 |
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99 | /**
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100 | Internal function to read the current tick counter of ACPI.
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101 |
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102 | Read the current ACPI tick counter using the counter address cached
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103 | by this instance's constructor.
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104 |
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105 | @return The tick counter read.
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106 |
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107 | **/
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108 | UINT32
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109 | InternalAcpiGetTimerTick (
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110 | VOID
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111 | )
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112 | {
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113 | //
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114 | // Return the current ACPI timer value.
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115 | //
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116 | return IoRead32 (mAcpiTimerIoAddr);
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117 | }
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