Dsdt.asl@ 98412

Last change on this file since 98412 was 80721, checked in by vboxsync, 6 years ago
Devices/EFI/FirmwareNew: Start upgrade process to edk2-stable201908 (compiles on Windows and works to some extent), bugref:4643
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File size: 24.5 KB

Line
1	/** @file
2	Contains root level name space objects for the platform
3
4	Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
5	SPDX-License-Identifier: BSD-2-Clause-Patent
6
7	**/
8
9	DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF ", 4) {
10	//
11	// System Sleep States
12	//
13	// We build S3 and S4 with GetSuspendStates() in
14	// "OvmfPkg/AcpiPlatformDxe/Qemu.c".
15	//
16	Name (\_S0, Package () {5, 0, 0, 0}) // Working
17	Name (\_S5, Package () {0, 0, 0, 0}) // Soft Off
18
19	//
20	// System Bus
21	//
22	Scope (\_SB) {
23	//
24	// PCI Root Bridge
25	//
26	Device (PCI0) {
27	Name (_HID, EISAID ("PNP0A03"))
28	Name (_ADR, 0x00000000)
29	Name (_BBN, 0x00)
30	Name (_UID, 0x00)
31
32	//
33	// BUS, I/O, and MMIO resources
34	//
35	Name (CRES, ResourceTemplate () {
36	WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses
37	ResourceProducer, // bit 0 of general flags is 1
38	MinFixed, // Range is fixed
39	MaxFixed, // Range is fixed
40	PosDecode, // PosDecode
41	0x0000, // Granularity
42	0x0000, // Min
43	0x00FF, // Max
44	0x0000, // Translation
45	0x0100 // Range Length = Max-Min+1
46	)
47
48	IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)
49
50	WORDIO ( // Consumed-and-produced resource (all I/O below CF8)
51	ResourceProducer, // bit 0 of general flags is 0
52	MinFixed, // Range is fixed
53	MaxFixed, // Range is fixed
54	PosDecode,
55	EntireRange,
56	0x0000, // Granularity
57	0x0000, // Min
58	0x0CF7, // Max
59	0x0000, // Translation
60	0x0CF8 // Range Length
61	)
62
63	WORDIO ( // Consumed-and-produced resource (all I/O above CFF)
64	ResourceProducer, // bit 0 of general flags is 0
65	MinFixed, // Range is fixed
66	MaxFixed, // Range is fixed
67	PosDecode,
68	EntireRange,
69	0x0000, // Granularity
70	0x0D00, // Min
71	0xFFFF, // Max
72	0x0000, // Translation
73	0xF300 // Range Length
74	)
75
76	DWORDMEMORY ( // Descriptor for legacy VGA video RAM
77	ResourceProducer, // bit 0 of general flags is 0
78	PosDecode,
79	MinFixed, // Range is fixed
80	MaxFixed, // Range is Fixed
81	Cacheable,
82	ReadWrite,
83	0x00000000, // Granularity
84	0x000A0000, // Min
85	0x000BFFFF, // Max
86	0x00000000, // Translation
87	0x00020000 // Range Length
88	)
89
90	DWORDMEMORY ( // Descriptor for 32-bit MMIO
91	ResourceProducer, // bit 0 of general flags is 0
92	PosDecode,
93	MinFixed, // Range is fixed
94	MaxFixed, // Range is Fixed
95	NonCacheable,
96	ReadWrite,
97	0x00000000, // Granularity
98	0xF8000000, // Min
99	0xFFFBFFFF, // Max
100	0x00000000, // Translation
101	0x07FC0000, // Range Length
102	, // ResourceSourceIndex
103	, // ResourceSource
104	PW32 // DescriptorName
105	)
106	})
107
108	Name (CR64, ResourceTemplate () {
109	QWordMemory ( // Descriptor for 64-bit MMIO
110	ResourceProducer, // bit 0 of general flags is 0
111	PosDecode,
112	MinFixed, // Range is fixed
113	MaxFixed, // Range is Fixed
114	Cacheable,
115	ReadWrite,
116	0x00000000, // Granularity
117	0x8000000000, // Min
118	0xFFFFFFFFFF, // Max
119	0x00000000, // Translation
120	0x8000000000, // Range Length
121	, // ResourceSourceIndex
122	, // ResourceSource
123	PW64 // DescriptorName
124	)
125	})
126
127	Method (_CRS, 0, Serialized) {
128	//
129	// see the FIRMWARE_DATA structure in "OvmfPkg/AcpiPlatformDxe/Qemu.c"
130	//
131	External (FWDT, OpRegionObj)
132	Field(FWDT, QWordAcc, NoLock, Preserve) {
133	P0S, 64, // PciWindow32.Base
134	P0E, 64, // PciWindow32.End
135	P0L, 64, // PciWindow32.Length
136	P1S, 64, // PciWindow64.Base
137	P1E, 64, // PciWindow64.End
138	P1L, 64 // PciWindow64.Length
139	}
140	Field(FWDT, DWordAcc, NoLock, Preserve) {
141	P0SL, 32, // PciWindow32.Base, low 32 bits
142	P0SH, 32, // PciWindow32.Base, high 32 bits
143	P0EL, 32, // PciWindow32.End, low 32 bits
144	P0EH, 32, // PciWindow32.End, high 32 bits
145	P0LL, 32, // PciWindow32.Length, low 32 bits
146	P0LH, 32, // PciWindow32.Length, high 32 bits
147	P1SL, 32, // PciWindow64.Base, low 32 bits
148	P1SH, 32, // PciWindow64.Base, high 32 bits
149	P1EL, 32, // PciWindow64.End, low 32 bits
150	P1EH, 32, // PciWindow64.End, high 32 bits
151	P1LL, 32, // PciWindow64.Length, low 32 bits
152	P1LH, 32 // PciWindow64.Length, high 32 bits
153	}
154
155	//
156	// fixup 32-bit PCI IO window
157	//
158	CreateDWordField (CRES, \_SB.PCI0.PW32._MIN, PS32)
159	CreateDWordField (CRES, \_SB.PCI0.PW32._MAX, PE32)
160	CreateDWordField (CRES, \_SB.PCI0.PW32._LEN, PL32)
161	Store (P0SL, PS32)
162	Store (P0EL, PE32)
163	Store (P0LL, PL32)
164
165	If (LAnd (LEqual (P1SL, 0x00), LEqual (P1SH, 0x00))) {
166	Return (CRES)
167	} Else {
168	//
169	// fixup 64-bit PCI IO window
170	//
171	CreateQWordField (CR64, \_SB.PCI0.PW64._MIN, PS64)
172	CreateQWordField (CR64, \_SB.PCI0.PW64._MAX, PE64)
173	CreateQWordField (CR64, \_SB.PCI0.PW64._LEN, PL64)
174	Store (P1S, PS64)
175	Store (P1E, PE64)
176	Store (P1L, PL64)
177
178	//
179	// add window and return result
180	//
181	ConcatenateResTemplate (CRES, CR64, Local0)
182	Return (Local0)
183	}
184	}
185
186	//
187	// PCI Interrupt Routing Table - PIC Mode Only
188	//
189	Method (_PRT, 0, NotSerialized) {
190	Return (
191	Package () {
192	//
193	// Bus 0; Devices 0 to 15
194	//
195	Package () {0x0000FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
196	Package () {0x0000FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
197	Package () {0x0000FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
198	Package () {0x0000FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
199
200	//
201	// Bus 0, Device 1, Pin 0 (INTA) is special; it corresponds to the
202	// internally generated SCI (System Control Interrupt), which is
203	// always routed to GSI 9. By setting the third (= Source) field to
204	// zero, we could use the fourth (= Source Index) field to hardwire
205	// the pin to GSI 9 directly.
206	//
207	// That way however, in accordance with the ACPI spec's description
208	// of SCI, the interrupt would be treated as "active low,
209	// shareable, level", and that doesn't match qemu.
210	//
211	// In QemuInstallAcpiMadtTable() [OvmfPkg/AcpiPlatformDxe/Qemu.c]
212	// we install an Interrupt Override Structure for the identity
213	// mapped IRQ#9 / GSI 9 (the corresponding bit being set in
214	// Pcd8259LegacyModeEdgeLevel), which describes the correct
215	// polarity (active high). As a consequence, some OS'en (eg. Linux)
216	// override the default (active low) polarity originating from the
217	// _PRT; others (eg. FreeBSD) don't. Therefore we need a separate
218	// link device just to specify a polarity that matches the MADT.
219	//
220	Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKS, 0x00},
221
222	Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
223	Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
224	Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
225
226	Package () {0x0002FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
227	Package () {0x0002FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
228	Package () {0x0002FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
229	Package () {0x0002FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
230
231	Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
232	Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
233	Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
234	Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
235
236	Package () {0x0004FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
237	Package () {0x0004FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
238	Package () {0x0004FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
239	Package () {0x0004FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
240
241	Package () {0x0005FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
242	Package () {0x0005FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
243	Package () {0x0005FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
244	Package () {0x0005FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
245
246	Package () {0x0006FFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
247	Package () {0x0006FFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
248	Package () {0x0006FFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
249	Package () {0x0006FFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
250
251	Package () {0x0007FFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
252	Package () {0x0007FFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
253	Package () {0x0007FFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
254	Package () {0x0007FFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
255
256	Package () {0x0008FFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
257	Package () {0x0008FFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
258	Package () {0x0008FFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
259	Package () {0x0008FFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
260
261	Package () {0x0009FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
262	Package () {0x0009FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
263	Package () {0x0009FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
264	Package () {0x0009FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
265
266	Package () {0x000AFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
267	Package () {0x000AFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
268	Package () {0x000AFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
269	Package () {0x000AFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
270
271	Package () {0x000BFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
272	Package () {0x000BFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
273	Package () {0x000BFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
274	Package () {0x000BFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00},
275
276	Package () {0x000CFFFF, 0x00, \_SB.PCI0.LPC.LNKD, 0x00},
277	Package () {0x000CFFFF, 0x01, \_SB.PCI0.LPC.LNKA, 0x00},
278	Package () {0x000CFFFF, 0x02, \_SB.PCI0.LPC.LNKB, 0x00},
279	Package () {0x000CFFFF, 0x03, \_SB.PCI0.LPC.LNKC, 0x00},
280
281	Package () {0x000DFFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},
282	Package () {0x000DFFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},
283	Package () {0x000DFFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},
284	Package () {0x000DFFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},
285
286	Package () {0x000EFFFF, 0x00, \_SB.PCI0.LPC.LNKB, 0x00},
287	Package () {0x000EFFFF, 0x01, \_SB.PCI0.LPC.LNKC, 0x00},
288	Package () {0x000EFFFF, 0x02, \_SB.PCI0.LPC.LNKD, 0x00},
289	Package () {0x000EFFFF, 0x03, \_SB.PCI0.LPC.LNKA, 0x00},
290
291	Package () {0x000FFFFF, 0x00, \_SB.PCI0.LPC.LNKC, 0x00},
292	Package () {0x000FFFFF, 0x01, \_SB.PCI0.LPC.LNKD, 0x00},
293	Package () {0x000FFFFF, 0x02, \_SB.PCI0.LPC.LNKA, 0x00},
294	Package () {0x000FFFFF, 0x03, \_SB.PCI0.LPC.LNKB, 0x00}
295	}
296	)
297	}
298
299	//
300	// PCI to ISA Bridge (Bus 0, Device 1, Function 0)
301	// "Low Pin Count"
302	//
303	Device (LPC) {
304	Name (_ADR, 0x00010000)
305
306	//
307	// The SCI cannot be rerouted or disabled with PIRQRC[A:D]; we only
308	// need this link device in order to specify the polarity.
309	//
310	Device (LNKS) {
311	Name (_HID, EISAID("PNP0C0F"))
312	Name (_UID, 0)
313
314	Name (_STA, 0xB) // 0x1: device present
315	// 0x2: enabled and decoding resources
316	// 0x8: functioning properly
317
318	Method (_SRS, 1, NotSerialized) { /* no-op */ }
319	Method (_DIS, 0, NotSerialized) { /* no-op */ }
320
321	Name (_PRS, ResourceTemplate () {
322	Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { 9 }
323	//
324	// list of IRQs occupied thus far: 9
325	//
326	})
327	Method (_CRS, 0, NotSerialized) { Return (_PRS) }
328	}
329
330	//
331	// PCI Interrupt Routing Configuration Registers, PIRQRC[A:D]
332	//
333	OperationRegion (PRR0, PCI_Config, 0x60, 0x04)
334	Field (PRR0, ANYACC, NOLOCK, PRESERVE) {
335	PIRA, 8,
336	PIRB, 8,
337	PIRC, 8,
338	PIRD, 8
339	}
340
341	//
342	// _STA method for LNKA, LNKB, LNKC, LNKD
343	// Arg0[in]: value of PIRA / PIRB / PIRC / PIRD
344	//
345	Method (PSTA, 1, NotSerialized) {
346	If (And (Arg0, 0x80)) { // disable-bit set?
347	Return (0x9) // "device present" \| "functioning properly"
348	} Else {
349	Return (0xB) // same \| "enabled and decoding resources"
350	}
351	}
352
353	//
354	// _CRS method for LNKA, LNKB, LNKC, LNKD
355	// Arg0[in]: value of PIRA / PIRB / PIRC / PIRD
356	//
357	Method (PCRS, 1, Serialized) {
358	//
359	// create temporary buffer with an Extended Interrupt Descriptor
360	// whose single vector defaults to zero
361	//
362	Name (BUF0, ResourceTemplate () {
363	Interrupt (ResourceConsumer, Level, ActiveHigh, Shared){0}
364	}
365	)
366
367	//
368	// define reference to first interrupt vector in buffer
369	//
370	CreateDWordField (BUF0, 0x05, IRQW)
371
372	//
373	// If the disable-bit is clear, overwrite the default zero vector
374	// with the value in Arg0 (ie. PIRQRC[A:D]). Reserved bits are read
375	// as 0.
376	//
377	If (LNot (And (Arg0, 0x80))) {
378	Store (Arg0, IRQW)
379	}
380	Return (BUF0)
381	}
382
383	//
384	// _PRS resource for LNKA, LNKB, LNKC, LNKD
385	//
386	Name (PPRS, ResourceTemplate () {
387	Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) {5, 10, 11}
388	//
389	// list of IRQs occupied thus far: 9, 5, 10, 11
390	//
391	})
392
393	//
394	// PCI IRQ Link A
395	//
396	Device (LNKA) {
397	Name (_HID, EISAID("PNP0C0F"))
398	Name (_UID, 1)
399
400	Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) }
401	Method (_DIS, 0, NotSerialized) {
402	Or (PIRA, 0x80, PIRA) // set disable-bit
403	}
404	Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) }
405	Method (_PRS, 0, NotSerialized) { Return (PPRS) }
406	Method (_SRS, 1, NotSerialized) {
407	CreateDWordField (Arg0, 0x05, IRQW)
408	Store (IRQW, PIRA)
409	}
410	}
411
412	//
413	// PCI IRQ Link B
414	//
415	Device (LNKB) {
416	Name (_HID, EISAID("PNP0C0F"))
417	Name (_UID, 2)
418
419	Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) }
420	Method (_DIS, 0, NotSerialized) {
421	Or (PIRB, 0x80, PIRB) // set disable-bit
422	}
423	Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) }
424	Method (_PRS, 0, NotSerialized) { Return (PPRS) }
425	Method (_SRS, 1, NotSerialized) {
426	CreateDWordField (Arg0, 0x05, IRQW)
427	Store (IRQW, PIRB)
428	}
429	}
430
431	//
432	// PCI IRQ Link C
433	//
434	Device (LNKC) {
435	Name (_HID, EISAID("PNP0C0F"))
436	Name (_UID, 3)
437
438	Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) }
439	Method (_DIS, 0, NotSerialized) {
440	Or (PIRC, 0x80, PIRC) // set disable-bit
441	}
442	Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) }
443	Method (_PRS, 0, NotSerialized) { Return (PPRS) }
444	Method (_SRS, 1, NotSerialized) {
445	CreateDWordField (Arg0, 0x05, IRQW)
446	Store (IRQW, PIRC)
447	}
448	}
449
450	//
451	// PCI IRQ Link D
452	//
453	Device (LNKD) {
454	Name (_HID, EISAID("PNP0C0F"))
455	Name (_UID, 4)
456
457	Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) }
458	Method (_DIS, 0, NotSerialized) {
459	Or (PIRD, 0x80, PIRD) // set disable-bit
460	}
461	Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) }
462	Method (_PRS, 0, NotSerialized) { Return (PPRS) }
463	Method (_SRS, 1, NotSerialized) {
464	CreateDWordField (Arg0, 0x05, IRQW)
465	Store (IRQW, PIRD)
466	}
467	}
468
469	//
470	// Programmable Interrupt Controller (PIC)
471	//
472	Device(PIC) {
473	Name (_HID, EISAID ("PNP0000"))
474	Name (_CRS, ResourceTemplate () {
475	IO (Decode16, 0x020, 0x020, 0x00, 0x02)
476	IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02)
477	IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02)
478	IRQNoFlags () {2}
479	//
480	// list of IRQs occupied thus far: 9, 5, 10, 11, 2
481	//
482	})
483	}
484
485	//
486	// ISA DMA
487	//
488	Device (DMAC) {
489	Name (_HID, EISAID ("PNP0200"))
490	Name (_CRS, ResourceTemplate () {
491	IO (Decode16, 0x00, 0x00, 0, 0x10)
492	IO (Decode16, 0x81, 0x81, 0, 0x03)
493	IO (Decode16, 0x87, 0x87, 0, 0x01)
494	IO (Decode16, 0x89, 0x89, 0, 0x03)
495	IO (Decode16, 0x8f, 0x8f, 0, 0x01)
496	IO (Decode16, 0xc0, 0xc0, 0, 0x20)
497	DMA (Compatibility, NotBusMaster, Transfer8) {4}
498	})
499	}
500
501	//
502	// 8254 Timer
503	//
504	Device(TMR) {
505	Name(_HID,EISAID("PNP0100"))
506	Name(_CRS, ResourceTemplate () {
507	IO (Decode16, 0x40, 0x40, 0x00, 0x04)
508	IRQNoFlags () {0}
509	//
510	// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0
511	//
512	})
513	}
514
515	//
516	// Real Time Clock
517	//
518	Device (RTC) {
519	Name (_HID, EISAID ("PNP0B00"))
520	Name (_CRS, ResourceTemplate () {
521	IO (Decode16, 0x70, 0x70, 0x00, 0x02)
522	IRQNoFlags () {8}
523	//
524	// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8
525	//
526	})
527	}
528
529	//
530	// PCAT Speaker
531	//
532	Device(SPKR) {
533	Name (_HID, EISAID("PNP0800"))
534	Name (_CRS, ResourceTemplate () {
535	IO (Decode16, 0x61, 0x61, 0x01, 0x01)
536	})
537	}
538
539	//
540	// Floating Point Coprocessor
541	//
542	Device(FPU) {
543	Name (_HID, EISAID("PNP0C04"))
544	Name (_CRS, ResourceTemplate () {
545	IO (Decode16, 0xF0, 0xF0, 0x00, 0x10)
546	IRQNoFlags () {13}
547	//
548	// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13
549	//
550	})
551	}
552
553	//
554	// Generic motherboard devices and pieces that don't fit anywhere else
555	//
556	Device(XTRA) {
557	Name (_HID, EISAID ("PNP0C02"))
558	Name (_UID, 0x01)
559	Name (_CRS, ResourceTemplate () {
560	IO (Decode16, 0x010, 0x010, 0x00, 0x10)
561	IO (Decode16, 0x022, 0x022, 0x00, 0x1E)
562	IO (Decode16, 0x044, 0x044, 0x00, 0x1C)
563	IO (Decode16, 0x062, 0x062, 0x00, 0x02)
564	IO (Decode16, 0x065, 0x065, 0x00, 0x0B)
565	IO (Decode16, 0x072, 0x072, 0x00, 0x0E)
566	IO (Decode16, 0x080, 0x080, 0x00, 0x01)
567	IO (Decode16, 0x084, 0x084, 0x00, 0x03)
568	IO (Decode16, 0x088, 0x088, 0x00, 0x01)
569	IO (Decode16, 0x08c, 0x08c, 0x00, 0x03)
570	IO (Decode16, 0x090, 0x090, 0x00, 0x10)
571	IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E)
572	IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10)
573	IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10)
574	IO (Decode16, 0x160, 0x160, 0x00, 0x10)
575	IO (Decode16, 0x278, 0x278, 0x00, 0x08)
576	IO (Decode16, 0x370, 0x370, 0x00, 0x02)
577	IO (Decode16, 0x378, 0x378, 0x00, 0x08)
578	IO (Decode16, FixedPcdGet16 (PcdDebugIoPort), FixedPcdGet16 (PcdDebugIoPort), 0x00, 0x01)
579	IO (Decode16, 0x440, 0x440, 0x00, 0x10)
580	IO (Decode16, 0x678, 0x678, 0x00, 0x08)
581	IO (Decode16, 0x778, 0x778, 0x00, 0x08)
582	IO (Decode16, 0xafe0, 0xafe0, 0x00, 0x04) // QEMU GPE0 BLK
583	IO (Decode16, 0xb000, 0xb000, 0x00, 0x40) // PMBLK1
584	Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000) // IO APIC
585	Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000) // LAPIC
586	})
587	}
588
589	//
590	// PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102
591	//
592	Device (PS2K) {
593	Name (_HID, EISAID ("PNP0303"))
594	Name (_CID, EISAID ("PNP030B"))
595	Name(_CRS,ResourceTemplate() {
596	IO (Decode16, 0x60, 0x60, 0x00, 0x01)
597	IO (Decode16, 0x64, 0x64, 0x00, 0x01)
598	IRQNoFlags () {1}
599	//
600	// list of IRQs occupied thus far: 9, 5, 10, 11, 2, 0, 8, 13, 1
601	//
602	})
603	}
604
605	//
606	// PS/2 Mouse and Microsoft Mouse
607	//
608	Device (PS2M) { // PS/2 stype mouse port
609	Name (_HID, EISAID ("PNP0F03"))
610	Name (_CID, EISAID ("PNP0F13"))
611	Name (_CRS, ResourceTemplate() {
612	IRQNoFlags () {12}
613	//
614	// list of IRQs occupied thus far:
615	// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12
616	//
617	})
618	}
619
620	//
621	// UART Serial Port - COM1
622	//
623	Device (UAR1) {
624	Name (_HID, EISAID ("PNP0501"))
625	Name (_DDN, "COM1")
626	Name (_UID, 0x01)
627	Name(_CRS,ResourceTemplate() {
628	IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08)
629	IRQ (Edge, ActiveHigh, Exclusive, ) {4}
630	//
631	// list of IRQs occupied thus far:
632	// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4
633	//
634	})
635	}
636
637	//
638	// UART Serial Port - COM2
639	//
640	Device (UAR2) {
641	Name (_HID, EISAID ("PNP0501"))
642	Name (_DDN, "COM2")
643	Name (_UID, 0x02)
644	Name(_CRS,ResourceTemplate() {
645	IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08)
646	IRQ (Edge, ActiveHigh, Exclusive, ) {3}
647	//
648	// list of IRQs occupied thus far:
649	// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3
650	//
651	})
652	}
653
654	//
655	// Floppy Disk Controller
656	//
657	Device (FDC) {
658	Name (_HID, EISAID ("PNP0700"))
659	Name (_CRS,ResourceTemplate() {
660	IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06)
661	IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01)
662	IRQNoFlags () {6}
663	//
664	// list of IRQs occupied thus far:
665	// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6
666	//
667	DMA (Compatibility, NotBusMaster, Transfer8) {2}
668	})
669	}
670
671	//
672	// parallel port -- no DMA for now
673	//
674	Device (PAR1) {
675	Name (_HID, EISAID ("PNP0400"))
676	Name (_DDN, "LPT1")
677	Name (_UID, 0x01)
678	Name(_CRS, ResourceTemplate() {
679	IO (Decode16, 0x0378, 0x0378, 0x00, 0x08)
680	IRQNoFlags () {7}
681	//
682	// list of IRQs occupied thus far:
683	// 9, 5, 10, 11, 2, 0, 8, 13, 1, 12, 4, 3, 6, 7
684	// in order:
685	// 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13
686	//
687	})
688	}
689	}
690	}
691	}
692	}

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