1 | /** @file
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2 | Intel FSP API definition from Intel Firmware Support Package External
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3 | Architecture Specification v2.0 - v2.2
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4 |
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5 | Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>
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6 | SPDX-License-Identifier: BSD-2-Clause-Patent
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7 |
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8 | **/
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9 |
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10 | #ifndef _FSP_API_H_
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11 | #define _FSP_API_H_
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12 |
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13 | #include <Pi/PiStatusCode.h>
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14 |
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15 | ///
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16 | /// FSP Reset Status code
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17 | /// These are defined in FSP EAS v2.0 section 11.2.2 - OEM Status Code
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18 | /// @{
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19 | #define FSP_STATUS_RESET_REQUIRED_COLD 0x40000001
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20 | #define FSP_STATUS_RESET_REQUIRED_WARM 0x40000002
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21 | #define FSP_STATUS_RESET_REQUIRED_3 0x40000003
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22 | #define FSP_STATUS_RESET_REQUIRED_4 0x40000004
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23 | #define FSP_STATUS_RESET_REQUIRED_5 0x40000005
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24 | #define FSP_STATUS_RESET_REQUIRED_6 0x40000006
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25 | #define FSP_STATUS_RESET_REQUIRED_7 0x40000007
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26 | #define FSP_STATUS_RESET_REQUIRED_8 0x40000008
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27 | /// @}
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28 |
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29 | ///
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30 | /// FSP Event related definition.
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31 | ///
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32 | #define FSP_EVENT_CODE 0xF5000000
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33 | #define FSP_POST_CODE (FSP_EVENT_CODE | 0x00F80000)
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34 |
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35 | /*
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36 | FSP may optionally include the capability of generating events messages to aid in the debugging of firmware issues.
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37 | These events fall under three catagories: Error, Progress, and Debug. The event reporting mechanism follows the
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38 | status code services described in section 6 and 7 of the PI Specification v1.7 Volume 3.
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39 |
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40 | @param[in] Type Indicates the type of event being reported.
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41 | See MdePkg/Include/Pi/PiStatusCode.h for the definition of EFI_STATUS_CODE_TYPE.
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42 | @param[in] Value Describes the current status of a hardware or software entity.
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43 | This includes information about the class and subclass that is used to classify the entity as well as an operation.
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44 | For progress events, the operation is the current activity. For error events, it is the exception.
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45 | For debug events, it is not defined at this time.
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46 | See MdePkg/Include/Pi/PiStatusCode.h for the definition of EFI_STATUS_CODE_VALUE.
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47 | @param[in] Instance The enumeration of a hardware or software entity within the system.
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48 | A system may contain multiple entities that match a class/subclass pairing. The instance differentiates between them.
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49 | An instance of 0 indicates that instance information is unavailable, not meaningful, or not relevant.
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50 | Valid instance numbers start with 1.
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51 | @param[in] *CallerId This parameter can be used to identify the sub-module within the FSP generating the event.
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52 | This parameter may be NULL.
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53 | @param[in] *Data This optional parameter may be used to pass additional data. The contents can have event-specific data.
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54 | For example, the FSP provides a EFI_STATUS_CODE_STRING_DATA instance to this parameter when sending debug messages.
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55 | This parameter is NULL when no additional data is provided.
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56 |
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57 | @retval EFI_SUCCESS The event was handled successfully.
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58 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.
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59 | @retval EFI_DEVICE_ERROR The event handler failed.
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60 | */
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61 | typedef
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62 | EFI_STATUS
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63 | (EFIAPI *FSP_EVENT_HANDLER) (
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64 | IN EFI_STATUS_CODE_TYPE Type,
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65 | IN EFI_STATUS_CODE_VALUE Value,
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66 | IN UINT32 Instance,
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67 | IN OPTIONAL EFI_GUID *CallerId,
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68 | IN OPTIONAL EFI_STATUS_CODE_DATA *Data
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69 | );
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70 |
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71 | /*
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72 | Handler for FSP-T debug log messages, provided by the bootloader.
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73 |
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74 | @param[in] DebugMessage A pointer to the debug message to be written to the log.
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75 | @param[in] MessageLength Number of bytes to written to the debug log.
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76 |
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77 | @retval UINT32 The return value indicates the number of bytes actually written to
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78 | the debug log. If the return value is less than MessageLength,
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79 | an error occurred.
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80 | */
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81 | typedef
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82 | UINT32
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83 | (EFIAPI *FSP_DEBUG_HANDLER) (
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84 | IN CHAR8* DebugMessage,
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85 | IN UINT32 MessageLength
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86 | );
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87 |
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88 | #pragma pack(1)
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89 | ///
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90 | /// FSP_UPD_HEADER Configuration.
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91 | ///
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92 | typedef struct {
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93 | ///
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94 | /// UPD Region Signature. This signature will be
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95 | /// "XXXXXX_T" for FSP-T
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96 | /// "XXXXXX_M" for FSP-M
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97 | /// "XXXXXX_S" for FSP-S
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98 | /// Where XXXXXX is an unique signature
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99 | ///
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100 | UINT64 Signature;
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101 | ///
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102 | /// Revision of the Data structure.
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103 | /// For FSP spec 2.0/2.1 value is 1.
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104 | /// For FSP spec 2.2 value is 2.
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105 | ///
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106 | UINT8 Revision;
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107 | UINT8 Reserved[23];
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108 | } FSP_UPD_HEADER;
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109 |
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110 | ///
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111 | /// FSPT_ARCH_UPD Configuration.
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112 | ///
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113 | typedef struct {
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114 | ///
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115 | /// Revision Revision of the structure is 1 for this version of the specification.
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116 | ///
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117 | UINT8 Revision;
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118 | UINT8 Reserved[3];
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119 | ///
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120 | /// Length Length of the structure in bytes. The current value for this field is 32.
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121 | ///
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122 | UINT32 Length;
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123 | ///
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124 | /// FspDebugHandler Optional debug handler for the bootloader to receive debug messages
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125 | /// occurring during FSP execution.
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126 | ///
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127 | FSP_DEBUG_HANDLER FspDebugHandler;
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128 | UINT8 Reserved1[20];
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129 | } FSPT_ARCH_UPD;
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130 |
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131 | ///
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132 | /// FSPM_ARCH_UPD Configuration.
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133 | ///
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134 | typedef struct {
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135 | ///
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136 | /// Revision of the structure. For FSP v2.0 value is 1.
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137 | ///
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138 | UINT8 Revision;
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139 | UINT8 Reserved[3];
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140 | ///
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141 | /// Pointer to the non-volatile storage (NVS) data buffer.
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142 | /// If it is NULL it indicates the NVS data is not available.
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143 | ///
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144 | VOID *NvsBufferPtr;
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145 | ///
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146 | /// Pointer to the temporary stack base address to be
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147 | /// consumed inside FspMemoryInit() API.
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148 | ///
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149 | VOID *StackBase;
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150 | ///
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151 | /// Temporary stack size to be consumed inside
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152 | /// FspMemoryInit() API.
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153 | ///
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154 | UINT32 StackSize;
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155 | ///
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156 | /// Size of memory to be reserved by FSP below "top
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157 | /// of low usable memory" for bootloader usage.
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158 | ///
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159 | UINT32 BootLoaderTolumSize;
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160 | ///
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161 | /// Current boot mode.
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162 | ///
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163 | UINT32 BootMode;
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164 | ///
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165 | /// Optional event handler for the bootloader to be informed of events occurring during FSP execution.
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166 | /// This value is only valid if Revision is >= 2.
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167 | ///
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168 | FSP_EVENT_HANDLER *FspEventHandler;
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169 | UINT8 Reserved1[4];
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170 | } FSPM_ARCH_UPD;
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171 |
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172 | typedef struct {
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173 | ///
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174 | /// Revision Revision of the structure is 1 for this version of the specification.
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175 | ///
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176 | UINT8 Revision;
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177 | UINT8 Reserved[3];
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178 | ///
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179 | /// Length Length of the structure in bytes. The current value for this field is 32.
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180 | ///
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181 | UINT32 Length;
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182 | ///
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183 | /// FspEventHandler Optional event handler for the bootloader to be informed of events
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184 | /// occurring during FSP execution.
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185 | ///
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186 | FSP_EVENT_HANDLER FspEventHandler;
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187 | ///
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188 | /// A FSP binary may optionally implement multi-phase silicon initialization,
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189 | /// This is only supported if the FspMultiPhaseSiInitEntryOffset field in FSP_INFO_HEADER
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190 | /// is non-zero.
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191 | /// To enable multi-phase silicon initialization, the bootloader must set
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192 | /// EnableMultiPhaseSiliconInit to a non-zero value.
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193 | ///
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194 | UINT8 EnableMultiPhaseSiliconInit;
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195 | UINT8 Reserved1[19];
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196 | } FSPS_ARCH_UPD;
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197 |
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198 | ///
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199 | /// FSPT_UPD_COMMON Configuration.
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200 | ///
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201 | typedef struct {
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202 | ///
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203 | /// FSP_UPD_HEADER Configuration.
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204 | ///
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205 | FSP_UPD_HEADER FspUpdHeader;
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206 | } FSPT_UPD_COMMON;
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207 |
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208 | ///
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209 | /// FSPT_UPD_COMMON Configuration for FSP spec. 2.2 and above.
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210 | ///
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211 | typedef struct {
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212 | ///
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213 | /// FSP_UPD_HEADER Configuration.
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214 | ///
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215 | FSP_UPD_HEADER FspUpdHeader;
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216 |
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217 | ///
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218 | /// FSPT_ARCH_UPD Configuration.
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219 | ///
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220 | FSPT_ARCH_UPD FsptArchUpd;
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221 | } FSPT_UPD_COMMON_FSP22;
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222 |
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223 | ///
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224 | /// FSPM_UPD_COMMON Configuration.
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225 | ///
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226 | typedef struct {
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227 | ///
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228 | /// FSP_UPD_HEADER Configuration.
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229 | ///
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230 | FSP_UPD_HEADER FspUpdHeader;
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231 | ///
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232 | /// FSPM_ARCH_UPD Configuration.
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233 | ///
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234 | FSPM_ARCH_UPD FspmArchUpd;
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235 | } FSPM_UPD_COMMON;
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236 |
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237 | ///
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238 | /// FSPS_UPD_COMMON Configuration.
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239 | ///
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240 | typedef struct {
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241 | ///
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242 | /// FSP_UPD_HEADER Configuration.
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243 | ///
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244 | FSP_UPD_HEADER FspUpdHeader;
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245 | } FSPS_UPD_COMMON;
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246 |
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247 | ///
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248 | /// FSPS_UPD_COMMON Configuration for FSP spec. 2.2 and above.
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249 | ///
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250 | typedef struct {
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251 | ///
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252 | /// FSP_UPD_HEADER Configuration.
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253 | ///
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254 | FSP_UPD_HEADER FspUpdHeader;
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255 |
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256 | ///
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257 | /// FSPS_ARCH_UPD Configuration.
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258 | ///
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259 | FSPS_ARCH_UPD FspsArchUpd;
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260 | } FSPS_UPD_COMMON_FSP22;
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261 |
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262 | ///
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263 | /// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.
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264 | ///
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265 | typedef enum {
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266 | ///
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267 | /// This stage is notified when the bootloader completes the
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268 | /// PCI enumeration and the resource allocation for the
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269 | /// PCI devices is complete.
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270 | ///
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271 | EnumInitPhaseAfterPciEnumeration = 0x20,
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272 | ///
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273 | /// This stage is notified just before the bootloader hand-off
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274 | /// to the OS loader.
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275 | ///
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276 | EnumInitPhaseReadyToBoot = 0x40,
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277 | ///
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278 | /// This stage is notified just before the firmware/Preboot
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279 | /// environment transfers management of all system resources
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280 | /// to the OS or next level execution environment.
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281 | ///
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282 | EnumInitPhaseEndOfFirmware = 0xF0
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283 | } FSP_INIT_PHASE;
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284 |
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285 | ///
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286 | /// Definition of NOTIFY_PHASE_PARAMS.
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287 | ///
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288 | typedef struct {
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289 | ///
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290 | /// Notification phase used for NotifyPhase API
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291 | ///
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292 | FSP_INIT_PHASE Phase;
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293 | } NOTIFY_PHASE_PARAMS;
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294 |
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295 | ///
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296 | /// Action definition for FspMultiPhaseSiInit API
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297 | ///
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298 | typedef enum {
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299 | EnumMultiPhaseGetNumberOfPhases = 0x0,
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300 | EnumMultiPhaseExecutePhase = 0x1
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301 | } FSP_MULTI_PHASE_ACTION;
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302 |
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303 | ///
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304 | /// Data structure returned by FSP when bootloader calling
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305 | /// FspMultiPhaseSiInit API with action 0 (EnumMultiPhaseGetNumberOfPhases)
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306 | ///
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307 | typedef struct {
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308 | UINT32 NumberOfPhases;
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309 | UINT32 PhasesExecuted;
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310 | } FSP_MULTI_PHASE_GET_NUMBER_OF_PHASES_PARAMS;
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311 |
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312 | ///
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313 | /// FspMultiPhaseSiInit function parameter.
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314 | ///
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315 | /// For action 0 (EnumMultiPhaseGetNumberOfPhases):
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316 | /// - PhaseIndex must be 0.
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317 | /// - MultiPhaseParamPtr should point to an instance of FSP_MULTI_PHASE_GET_NUMBER_OF_PHASES_PARAMS.
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318 | ///
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319 | /// For action 1 (EnumMultiPhaseExecutePhase):
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320 | /// - PhaseIndex will be the phase that will be executed by FSP.
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321 | /// - MultiPhaseParamPtr shall be NULL.
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322 | ///
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323 | typedef struct {
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324 | IN FSP_MULTI_PHASE_ACTION MultiPhaseAction;
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325 | IN UINT32 PhaseIndex;
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326 | IN OUT VOID *MultiPhaseParamPtr;
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327 | } FSP_MULTI_PHASE_PARAMS;
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328 |
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329 | #pragma pack()
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330 |
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331 | /**
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332 | This FSP API is called soon after coming out of reset and before memory and stack is
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333 | available. This FSP API will load the microcode update, enable code caching for the
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334 | region specified by the boot loader and also setup a temporary stack to be used until
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335 | main memory is initialized.
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336 |
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337 | A hardcoded stack can be set up with the following values, and the "esp" register
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338 | initialized to point to this hardcoded stack.
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339 | 1. The return address where the FSP will return control after setting up a temporary
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340 | stack.
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341 | 2. A pointer to the input parameter structure
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342 |
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343 | However, since the stack is in ROM and not writeable, this FSP API cannot be called
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344 | using the "call" instruction, but needs to be jumped to.
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345 |
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346 | @param[in] FsptUpdDataPtr Pointer to the FSPT_UPD data structure.
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347 |
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348 | @retval EFI_SUCCESS Temporary RAM was initialized successfully.
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349 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.
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350 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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351 | @retval EFI_DEVICE_ERROR Temp RAM initialization failed.
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352 |
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353 | If this function is successful, the FSP initializes the ECX and EDX registers to point to
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354 | a temporary but writeable memory range available to the boot loader and returns with
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355 | FSP_SUCCESS in register EAX. Register ECX points to the start of this temporary
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356 | memory range and EDX points to the end of the range. Boot loader is free to use the
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357 | whole range described. Typically the boot loader can reload the ESP register to point
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358 | to the end of this returned range so that it can be used as a standard stack.
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359 | **/
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360 | typedef
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361 | EFI_STATUS
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362 | (EFIAPI *FSP_TEMP_RAM_INIT) (
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363 | IN VOID *FsptUpdDataPtr
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364 | );
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365 |
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366 | /**
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367 | This FSP API is used to notify the FSP about the different phases in the boot process.
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368 | This allows the FSP to take appropriate actions as needed during different initialization
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369 | phases. The phases will be platform dependent and will be documented with the FSP
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370 | release. The current FSP supports two notify phases:
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371 | Post PCI enumeration
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372 | Ready To Boot
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373 |
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374 | @param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS
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375 |
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376 | @retval EFI_SUCCESS The notification was handled successfully.
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377 | @retval EFI_UNSUPPORTED The notification was not called in the proper order.
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378 | @retval EFI_INVALID_PARAMETER The notification code is invalid.
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379 | **/
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380 | typedef
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381 | EFI_STATUS
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382 | (EFIAPI *FSP_NOTIFY_PHASE) (
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383 | IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr
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384 | );
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385 |
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386 | /**
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387 | This FSP API is called after TempRamInit and initializes the memory.
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388 | This FSP API accepts a pointer to a data structure that will be platform dependent
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389 | and defined for each FSP binary. This will be documented in Integration guide with
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390 | each FSP release.
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391 | After FspMemInit completes its execution, it passes the pointer to the HobList and
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392 | returns to the boot loader from where it was called. BootLoader is responsible to
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393 | migrate its stack and data to Memory.
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394 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
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395 | complete the silicon initialization and provides bootloader an opportunity to get
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396 | control after system memory is available and before the temporary RAM is torn down.
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397 |
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398 | @param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data structure.
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399 | @param[out] HobListPtr Pointer to receive the address of the HOB list.
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400 |
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401 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.
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402 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.
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403 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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404 | @retval EFI_DEVICE_ERROR FSP initialization failed.
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405 | @retval EFI_OUT_OF_RESOURCES Stack range requested by FSP is not met.
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406 | @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.
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407 | **/
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408 | typedef
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409 | EFI_STATUS
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410 | (EFIAPI *FSP_MEMORY_INIT) (
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411 | IN VOID *FspmUpdDataPtr,
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412 | OUT VOID **HobListPtr
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413 | );
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414 |
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415 |
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416 | /**
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417 | This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary
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418 | memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure
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419 | that will be platform dependent and defined for each FSP binary. This will be
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420 | documented in Integration Guide.
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421 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to
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422 | complete the silicon initialization and provides bootloader an opportunity to get
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423 | control after system memory is available and before the temporary RAM is torn down.
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424 |
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425 | @param[in] TempRamExitParamPtr Pointer to the Temp Ram Exit parameters structure.
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426 | This structure is normally defined in the Integration Guide.
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427 | And if it is not defined in the Integration Guide, pass NULL.
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428 |
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429 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.
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430 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.
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431 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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432 | @retval EFI_DEVICE_ERROR FSP initialization failed.
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433 | **/
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434 | typedef
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435 | EFI_STATUS
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436 | (EFIAPI *FSP_TEMP_RAM_EXIT) (
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437 | IN VOID *TempRamExitParamPtr
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438 | );
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439 |
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440 |
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441 | /**
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442 | This FSP API is called after TempRamExit API.
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443 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the
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444 | silicon initialization.
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445 |
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446 | @param[in] FspsUpdDataPtr Pointer to the FSPS_UPD data structure.
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447 | If NULL, FSP will use the default parameters.
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448 |
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449 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.
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450 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.
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451 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.
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452 | @retval EFI_DEVICE_ERROR FSP initialization failed.
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453 | @retval FSP_STATUS_RESET_REQUIREDx A reset is required. These status codes will not be returned during S3.
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454 | **/
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455 | typedef
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456 | EFI_STATUS
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457 | (EFIAPI *FSP_SILICON_INIT) (
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458 | IN VOID *FspsUpdDataPtr
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459 | );
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460 |
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461 | /**
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462 | This FSP API is expected to be called after FspSiliconInit but before FspNotifyPhase.
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463 | This FSP API provides multi-phase silicon initialization; which brings greater modularity
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464 | beyond the existing FspSiliconInit() API. Increased modularity is achieved by adding an
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465 | extra API to FSP-S. This allows the bootloader to add board specific initialization steps
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466 | throughout the SiliconInit flow as needed.
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467 |
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468 | @param[in,out] FSP_MULTI_PHASE_PARAMS For action - EnumMultiPhaseGetNumberOfPhases:
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469 | FSP_MULTI_PHASE_PARAMS->MultiPhaseParamPtr will contain
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470 | how many phases supported by FSP.
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471 | For action - EnumMultiPhaseExecutePhase:
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472 | FSP_MULTI_PHASE_PARAMS->MultiPhaseParamPtr shall be NULL.
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473 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.
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474 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.
|
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475 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.
|
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476 | @retval EFI_DEVICE_ERROR FSP initialization failed.
|
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477 | @retval FSP_STATUS_RESET_REQUIREDx A reset is required. These status codes will not be returned during S3.
|
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478 | **/
|
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479 | typedef
|
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480 | EFI_STATUS
|
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481 | (EFIAPI *FSP_MULTI_PHASE_SI_INIT) (
|
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482 | IN FSP_MULTI_PHASE_PARAMS *MultiPhaseSiInitParamPtr
|
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483 | );
|
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484 |
|
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485 | #endif
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