VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/HDAStream.cpp@ 73370

Last change on this file since 73370 was 73370, checked in by vboxsync, 6 years ago

Audio: Implemented backend-independent (pre-)buffering support. Work in progress.
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File size: 63.8 KB
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1/* $Id: HDAStream.cpp 73370 2018-07-26 13:52:12Z vboxsync $ */
2/** @file
3 * HDAStream.cpp - Stream functions for HD Audio.
4 */
5
6/*
7 * Copyright (C) 2017-2018 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_HDA
23#include <VBox/log.h>
24
25#include <iprt/mem.h>
26#include <iprt/semaphore.h>
27
28#include <VBox/vmm/pdmdev.h>
29#include <VBox/vmm/pdmaudioifs.h>
30
31#include "DrvAudio.h"
32
33#include "DevHDA.h"
34#include "HDAStream.h"
35
36
37#ifdef IN_RING3
38
39/**
40 * Creates an HDA stream.
41 *
42 * @returns IPRT status code.
43 * @param pStream HDA stream to create.
44 * @param pThis HDA state to assign the HDA stream to.
45 * @param u8SD Stream descriptor number to assign.
46 */
47int hdaR3StreamCreate(PHDASTREAM pStream, PHDASTATE pThis, uint8_t u8SD)
48{
49 RT_NOREF(pThis);
50 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
51
52 pStream->u8SD = u8SD;
53 pStream->pMixSink = NULL;
54 pStream->pHDAState = pThis;
55 pStream->pTimer = pThis->pTimer[u8SD];
56 AssertPtr(pStream->pTimer);
57
58 pStream->State.fInReset = false;
59 pStream->State.fRunning = false;
60#ifdef HDA_USE_DMA_ACCESS_HANDLER
61 RTListInit(&pStream->State.lstDMAHandlers);
62#endif
63
64 int rc = RTCritSectInit(&pStream->CritSect);
65 AssertRCReturn(rc, rc);
66
67 rc = hdaR3StreamPeriodCreate(&pStream->State.Period);
68 AssertRCReturn(rc, rc);
69
70#ifdef DEBUG
71 rc = RTCritSectInit(&pStream->Dbg.CritSect);
72 AssertRCReturn(rc, rc);
73#endif
74
75 pStream->Dbg.Runtime.fEnabled = pThis->Dbg.fEnabled;
76
77 if (pStream->Dbg.Runtime.fEnabled)
78 {
79 char szFile[64];
80
81 if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
82 RTStrPrintf(szFile, sizeof(szFile), "hdaStreamWriteSD%RU8", pStream->u8SD);
83 else
84 RTStrPrintf(szFile, sizeof(szFile), "hdaStreamReadSD%RU8", pStream->u8SD);
85
86 char szPath[RTPATH_MAX + 1];
87 int rc2 = DrvAudioHlpGetFileName(szPath, sizeof(szPath), pThis->Dbg.szOutPath, szFile,
88 0 /* uInst */, PDMAUDIOFILETYPE_WAV, PDMAUDIOFILENAME_FLAG_NONE);
89 AssertRC(rc2);
90 rc2 = DrvAudioHlpFileCreate(PDMAUDIOFILETYPE_WAV, szPath, PDMAUDIOFILE_FLAG_NONE, &pStream->Dbg.Runtime.pFileStream);
91 AssertRC(rc2);
92
93 if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN)
94 RTStrPrintf(szFile, sizeof(szFile), "hdaDMAWriteSD%RU8", pStream->u8SD);
95 else
96 RTStrPrintf(szFile, sizeof(szFile), "hdaDMAReadSD%RU8", pStream->u8SD);
97
98 rc2 = DrvAudioHlpGetFileName(szPath, sizeof(szPath), pThis->Dbg.szOutPath, szFile,
99 0 /* uInst */, PDMAUDIOFILETYPE_WAV, PDMAUDIOFILENAME_FLAG_NONE);
100 AssertRC(rc2);
101
102 rc2 = DrvAudioHlpFileCreate(PDMAUDIOFILETYPE_WAV, szPath, PDMAUDIOFILE_FLAG_NONE, &pStream->Dbg.Runtime.pFileDMA);
103 AssertRC(rc2);
104
105 /* Delete stale debugging files from a former run. */
106 DrvAudioHlpFileDelete(pStream->Dbg.Runtime.pFileStream);
107 DrvAudioHlpFileDelete(pStream->Dbg.Runtime.pFileDMA);
108 }
109
110 return rc;
111}
112
113/**
114 * Destroys an HDA stream.
115 *
116 * @param pStream HDA stream to destroy.
117 */
118void hdaR3StreamDestroy(PHDASTREAM pStream)
119{
120 AssertPtrReturnVoid(pStream);
121
122 LogFlowFunc(("[SD%RU8]: Destroying ...\n", pStream->u8SD));
123
124 hdaR3StreamMapDestroy(&pStream->State.Mapping);
125
126 int rc2;
127
128#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
129 rc2 = hdaR3StreamAsyncIODestroy(pStream);
130 AssertRC(rc2);
131#endif
132
133 if (RTCritSectIsInitialized(&pStream->CritSect))
134 {
135 rc2 = RTCritSectDelete(&pStream->CritSect);
136 AssertRC(rc2);
137 }
138
139 if (pStream->State.pCircBuf)
140 {
141 RTCircBufDestroy(pStream->State.pCircBuf);
142 pStream->State.pCircBuf = NULL;
143 }
144
145 hdaR3StreamPeriodDestroy(&pStream->State.Period);
146
147#ifdef DEBUG
148 if (RTCritSectIsInitialized(&pStream->Dbg.CritSect))
149 {
150 rc2 = RTCritSectDelete(&pStream->Dbg.CritSect);
151 AssertRC(rc2);
152 }
153#endif
154
155 if (pStream->Dbg.Runtime.fEnabled)
156 {
157 DrvAudioHlpFileDestroy(pStream->Dbg.Runtime.pFileStream);
158 pStream->Dbg.Runtime.pFileStream = NULL;
159
160 DrvAudioHlpFileDestroy(pStream->Dbg.Runtime.pFileDMA);
161 pStream->Dbg.Runtime.pFileDMA = NULL;
162 }
163
164 LogFlowFuncLeave();
165}
166
167/**
168 * Initializes an HDA stream.
169 *
170 * @returns IPRT status code.
171 * @param pStream HDA stream to initialize.
172 * @param uSD SD (stream descriptor) number to assign the HDA stream to.
173 */
174int hdaR3StreamInit(PHDASTREAM pStream, uint8_t uSD)
175{
176 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
177
178 PHDASTATE pThis = pStream->pHDAState;
179 AssertPtr(pThis);
180
181 pStream->u8SD = uSD;
182 pStream->u64BDLBase = RT_MAKE_U64(HDA_STREAM_REG(pThis, BDPL, pStream->u8SD),
183 HDA_STREAM_REG(pThis, BDPU, pStream->u8SD));
184 pStream->u16LVI = HDA_STREAM_REG(pThis, LVI, pStream->u8SD);
185 pStream->u32CBL = HDA_STREAM_REG(pThis, CBL, pStream->u8SD);
186 pStream->u16FIFOS = HDA_STREAM_REG(pThis, FIFOS, pStream->u8SD) + 1;
187
188 PPDMAUDIOSTREAMCFG pCfg = &pStream->State.Cfg;
189
190 int rc = hdaR3SDFMTToPCMProps(HDA_STREAM_REG(pThis, FMT, uSD), &pCfg->Props);
191 if (RT_FAILURE(rc))
192 {
193 LogRel(("HDA: Warning: Format 0x%x for stream #%RU8 not supported\n", HDA_STREAM_REG(pThis, FMT, uSD), uSD));
194 return rc;
195 }
196
197 /* Set scheduling hint (if available). */
198 if (pThis->u16TimerHz)
199 pCfg->Device.uSchedulingHintMs = 1000 /* ms */ / pThis->u16TimerHz;
200
201 /* (Re-)Allocate the stream's internal DMA buffer, based on the PCM properties we just got above. */
202 if (pStream->State.pCircBuf)
203 {
204 RTCircBufDestroy(pStream->State.pCircBuf);
205 pStream->State.pCircBuf = NULL;
206 }
207
208 /* By default we allocate an internal buffer of 100ms. */
209 rc = RTCircBufCreate(&pStream->State.pCircBuf, DrvAudioHlpMsToBytes(&pCfg->Props, 100 /* ms */)); /** @todo Make this configurable. */
210 AssertRCReturn(rc, rc);
211
212 /* Set the stream's direction. */
213 pCfg->enmDir = hdaGetDirFromSD(pStream->u8SD);
214
215 /* The the stream's name, based on the direction. */
216 switch (pCfg->enmDir)
217 {
218 case PDMAUDIODIR_IN:
219# ifdef VBOX_WITH_AUDIO_HDA_MIC_IN
220# error "Implement me!"
221# else
222 pCfg->DestSource.Source = PDMAUDIORECSOURCE_LINE;
223 pCfg->enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
224 RTStrCopy(pCfg->szName, sizeof(pCfg->szName), "Line In");
225# endif
226 break;
227
228 case PDMAUDIODIR_OUT:
229 /* Destination(s) will be set in hdaAddStreamOut(),
230 * based on the channels / stream layout. */
231 break;
232
233 default:
234 rc = VERR_NOT_SUPPORTED;
235 break;
236 }
237
238 if ( !pStream->u32CBL
239 || !pStream->u16LVI
240 || !pStream->u64BDLBase
241 || !pStream->u16FIFOS)
242 {
243 return VINF_SUCCESS;
244 }
245
246 /* Set the stream's frame size. */
247 pStream->State.cbFrameSize = pCfg->Props.cChannels * (pCfg->Props.cBits / 8 /* To bytes */);
248 LogFunc(("[SD%RU8] cChannels=%RU8, cBits=%RU8 -> cbFrameSize=%RU32\n",
249 pStream->u8SD, pCfg->Props.cChannels, pCfg->Props.cBits, pStream->State.cbFrameSize));
250 Assert(pStream->State.cbFrameSize); /* Frame size must not be 0. */
251
252 /*
253 * Initialize the stream mapping in any case, regardless if
254 * we support surround audio or not. This is needed to handle
255 * the supported channels within a single audio stream, e.g. mono/stereo.
256 *
257 * In other words, the stream mapping *always* knows the real
258 * number of channels in a single audio stream.
259 */
260 rc = hdaR3StreamMapInit(&pStream->State.Mapping, &pCfg->Props);
261 AssertRCReturn(rc, rc);
262
263 LogFunc(("[SD%RU8] DMA @ 0x%x (%RU32 bytes), LVI=%RU16, FIFOS=%RU16, Hz=%RU32, rc=%Rrc\n",
264 pStream->u8SD, pStream->u64BDLBase, pStream->u32CBL, pStream->u16LVI, pStream->u16FIFOS,
265 pStream->State.Cfg.Props.uHz, rc));
266
267 /* Make sure that mandatory parameters are set up correctly. */
268 AssertStmt(pStream->u32CBL % pStream->State.cbFrameSize == 0, rc = VERR_INVALID_PARAMETER);
269 AssertStmt(pStream->u16LVI >= 1, rc = VERR_INVALID_PARAMETER);
270
271 if (RT_SUCCESS(rc))
272 {
273 /* Make sure that the chosen Hz rate dividable by the stream's rate. */
274 if (pStream->State.Cfg.Props.uHz % pThis->u16TimerHz != 0)
275 LogRel(("HDA: Device timer (%RU32) does not fit to stream #RU8 timing (%RU32)\n",
276 pThis->u16TimerHz, pStream->State.Cfg.Props.uHz));
277
278 /* Figure out how many transfer fragments we're going to use for this stream. */
279 /** @todo Use a more dynamic fragment size? */
280 Assert(pStream->u16LVI <= UINT8_MAX - 1);
281 uint8_t cFragments = pStream->u16LVI + 1;
282 if (cFragments <= 1)
283 cFragments = 2; /* At least two fragments (BDLEs) must be present. */
284
285 /*
286 * Handle the stream's position adjustment.
287 */
288 uint32_t cfPosAdjust = 0;
289
290 LogFunc(("[SD%RU8] fPosAdjustEnabled=%RTbool, cPosAdjustFrames=%RU16\n",
291 pStream->u8SD, pThis->fPosAdjustEnabled, pThis->cPosAdjustFrames));
292
293 if (pThis->fPosAdjustEnabled) /* Is the position adjustment enabled at all? */
294 {
295 HDABDLE BDLE;
296 RT_ZERO(BDLE);
297
298 int rc2 = hdaR3BDLEFetch(pThis, &BDLE, pStream->u64BDLBase, 0 /* Entry */);
299 AssertRC(rc2);
300
301 /* Note: Do *not* check if this BDLE aligns to the stream's frame size.
302 * It can happen that this isn't the case on some guests, e.g.
303 * on Windows with a 5.1 speaker setup.
304 *
305 * The only thing which counts is that the stream's CBL value
306 * properly aligns to the stream's frame size.
307 */
308
309 /* If no custom set position adjustment is set, apply some
310 * simple heuristics to detect the appropriate position adjustment. */
311 if ( !pThis->cPosAdjustFrames
312 /* Position adjustmenet buffer *must* have the IOC bit set! */
313 && hdaR3BDLENeedsInterrupt(&BDLE))
314 {
315 /** @todo Implement / use a (dynamic) table once this gets more complicated. */
316#ifdef VBOX_WITH_INTEL_HDA
317 /* Intel ICH / PCH: 1 frame. */
318 if (BDLE.Desc.u32BufSize == 1 * pStream->State.cbFrameSize)
319 {
320 cfPosAdjust = 1;
321 }
322 /* Intel Baytrail / Braswell: 32 frames. */
323 else if (BDLE.Desc.u32BufSize == 32 * pStream->State.cbFrameSize)
324 {
325 cfPosAdjust = 32;
326 }
327#endif
328 }
329 else /* Go with the set default. */
330 cfPosAdjust = pThis->cPosAdjustFrames;
331
332 if (cfPosAdjust)
333 {
334 /* Also adjust the number of fragments, as the position adjustment buffer
335 * does not count as an own fragment as such.
336 *
337 * This e.g. can happen on (newer) Ubuntu guests which use
338 * 4 (IOC) + 4408 (IOC) + 4408 (IOC) + 4408 (IOC) + 4404 (= 17632) bytes,
339 * where the first buffer (4) is used as position adjustment.
340 *
341 * Only skip a fragment if the whole buffer fragment is used for
342 * position adjustment.
343 */
344 if ( (cfPosAdjust * pStream->State.cbFrameSize) == BDLE.Desc.u32BufSize
345 && cFragments)
346 {
347 cFragments--;
348 }
349
350 /* Initialize position adjustment counter. */
351 pStream->State.cPosAdjustFramesLeft = cfPosAdjust;
352 LogRel2(("HDA: Position adjustment for stream #%RU8 active (%RU32 frames)\n", pStream->u8SD, cfPosAdjust));
353 }
354 }
355
356 LogFunc(("[SD%RU8] cfPosAdjust=%RU32, cFragments=%RU8\n", pStream->u8SD, cfPosAdjust, cFragments));
357
358 /*
359 * Set up data transfer transfer stuff.
360 */
361
362 /* Calculate the fragment size the guest OS expects interrupt delivery at. */
363 pStream->State.cbTransferSize = pStream->u32CBL / cFragments;
364 Assert(pStream->State.cbTransferSize);
365 Assert(pStream->State.cbTransferSize % pStream->State.cbFrameSize == 0);
366
367 /* Calculate the bytes we need to transfer to / from the stream's DMA per iteration.
368 * This is bound to the device's Hz rate and thus to the (virtual) timing the device expects. */
369 pStream->State.cbTransferChunk = (pStream->State.Cfg.Props.uHz / pThis->u16TimerHz) * pStream->State.cbFrameSize;
370 Assert(pStream->State.cbTransferChunk);
371 Assert(pStream->State.cbTransferChunk % pStream->State.cbFrameSize == 0);
372
373 /* Make sure that the transfer chunk does not exceed the overall transfer size. */
374 if (pStream->State.cbTransferChunk > pStream->State.cbTransferSize)
375 pStream->State.cbTransferChunk = pStream->State.cbTransferSize;
376
377 pStream->State.cbTransferProcessed = 0;
378 pStream->State.cTransferPendingInterrupts = 0;
379 pStream->State.cbDMALeft = 0;
380
381 const uint64_t cTicksPerHz = TMTimerGetFreq(pStream->pTimer) / pThis->u16TimerHz;
382
383 /* Calculate the timer ticks per byte for this stream. */
384 pStream->State.cTicksPerByte = cTicksPerHz / pStream->State.cbTransferChunk;
385 Assert(pStream->State.cTicksPerByte);
386
387 /* Calculate timer ticks per transfer. */
388 pStream->State.cTransferTicks = pStream->State.cbTransferChunk * pStream->State.cTicksPerByte;
389 Assert(pStream->State.cTransferTicks);
390
391 /* Initialize the transfer timestamps. */
392 pStream->State.tsTransferLast = 0;
393 pStream->State.tsTransferNext = 0;
394
395 LogFunc(("[SD%RU8] Timer %uHz (%RU64 ticks per Hz), cTicksPerByte=%RU64, cbTransferChunk=%RU32, cTransferTicks=%RU64, " \
396 "cbTransferSize=%RU32\n",
397 pStream->u8SD, pThis->u16TimerHz, cTicksPerHz, pStream->State.cTicksPerByte,
398 pStream->State.cbTransferChunk, pStream->State.cTransferTicks, pStream->State.cbTransferSize));
399
400 /* Make sure to also update the stream's DMA counter (based on its current LPIB value). */
401 hdaR3StreamSetPosition(pStream, HDA_STREAM_REG(pThis, LPIB, pStream->u8SD));
402
403#ifdef LOG_ENABLED
404 hdaR3BDLEDumpAll(pThis, pStream->u64BDLBase, pStream->u16LVI + 1);
405#endif
406 }
407
408 if (RT_FAILURE(rc))
409 LogRel(("HDA: Initializing stream #%RU8 failed with %Rrc\n", pStream->u8SD, rc));
410
411 return rc;
412}
413
414/**
415 * Resets an HDA stream.
416 *
417 * @param pThis HDA state.
418 * @param pStream HDA stream to reset.
419 * @param uSD Stream descriptor (SD) number to use for this stream.
420 */
421void hdaR3StreamReset(PHDASTATE pThis, PHDASTREAM pStream, uint8_t uSD)
422{
423 AssertPtrReturnVoid(pThis);
424 AssertPtrReturnVoid(pStream);
425 AssertReturnVoid(uSD < HDA_MAX_STREAMS);
426
427# ifdef VBOX_STRICT
428 AssertReleaseMsg(!pStream->State.fRunning, ("[SD%RU8] Cannot reset stream while in running state\n", uSD));
429# endif
430
431 LogFunc(("[SD%RU8]: Reset\n", uSD));
432
433 /*
434 * Set reset state.
435 */
436 Assert(ASMAtomicReadBool(&pStream->State.fInReset) == false); /* No nested calls. */
437 ASMAtomicXchgBool(&pStream->State.fInReset, true);
438
439 /*
440 * Second, initialize the registers.
441 */
442 HDA_STREAM_REG(pThis, STS, uSD) = HDA_SDSTS_FIFORDY;
443 /* According to the ICH6 datasheet, 0x40000 is the default value for stream descriptor register 23:20
444 * bits are reserved for stream number 18.2.33, resets SDnCTL except SRST bit. */
445 HDA_STREAM_REG(pThis, CTL, uSD) = 0x40000 | (HDA_STREAM_REG(pThis, CTL, uSD) & HDA_SDCTL_SRST);
446 /* ICH6 defines default values (120 bytes for input and 192 bytes for output descriptors) of FIFO size. 18.2.39. */
447 HDA_STREAM_REG(pThis, FIFOS, uSD) = hdaGetDirFromSD(uSD) == PDMAUDIODIR_IN ? HDA_SDIFIFO_120B : HDA_SDOFIFO_192B;
448 /* See 18.2.38: Always defaults to 0x4 (32 bytes). */
449 HDA_STREAM_REG(pThis, FIFOW, uSD) = HDA_SDFIFOW_32B;
450 HDA_STREAM_REG(pThis, LPIB, uSD) = 0;
451 HDA_STREAM_REG(pThis, CBL, uSD) = 0;
452 HDA_STREAM_REG(pThis, LVI, uSD) = 0;
453 HDA_STREAM_REG(pThis, FMT, uSD) = 0;
454 HDA_STREAM_REG(pThis, BDPU, uSD) = 0;
455 HDA_STREAM_REG(pThis, BDPL, uSD) = 0;
456
457#ifdef HDA_USE_DMA_ACCESS_HANDLER
458 hdaR3StreamUnregisterDMAHandlers(pThis, pStream);
459#endif
460
461 /* Assign the default mixer sink to the stream. */
462 pStream->pMixSink = hdaR3GetDefaultSink(pThis, uSD);
463
464 pStream->State.tsTransferLast = 0;
465 pStream->State.tsTransferNext = 0;
466
467 RT_ZERO(pStream->State.BDLE);
468 pStream->State.uCurBDLE = 0;
469
470 if (pStream->State.pCircBuf)
471 RTCircBufReset(pStream->State.pCircBuf);
472
473 /* Reset stream map. */
474 hdaR3StreamMapReset(&pStream->State.Mapping);
475
476 /* (Re-)initialize the stream with current values. */
477 int rc2 = hdaR3StreamInit(pStream, uSD);
478 AssertRC(rc2);
479
480 /* Reset the stream's period. */
481 hdaR3StreamPeriodReset(&pStream->State.Period);
482
483#ifdef DEBUG
484 pStream->Dbg.cReadsTotal = 0;
485 pStream->Dbg.cbReadTotal = 0;
486 pStream->Dbg.tsLastReadNs = 0;
487 pStream->Dbg.cWritesTotal = 0;
488 pStream->Dbg.cbWrittenTotal = 0;
489 pStream->Dbg.cWritesHz = 0;
490 pStream->Dbg.cbWrittenHz = 0;
491 pStream->Dbg.tsWriteSlotBegin = 0;
492#endif
493
494 /* Report that we're done resetting this stream. */
495 HDA_STREAM_REG(pThis, CTL, uSD) = 0;
496
497 LogFunc(("[SD%RU8] Reset\n", uSD));
498
499 /* Exit reset mode. */
500 ASMAtomicXchgBool(&pStream->State.fInReset, false);
501}
502
503/**
504 * Enables or disables an HDA audio stream.
505 *
506 * @returns IPRT status code.
507 * @param pStream HDA stream to enable or disable.
508 * @param fEnable Whether to enable or disble the stream.
509 */
510int hdaR3StreamEnable(PHDASTREAM pStream, bool fEnable)
511{
512 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
513
514 LogFunc(("[SD%RU8]: fEnable=%RTbool, pMixSink=%p\n", pStream->u8SD, fEnable, pStream->pMixSink));
515
516 int rc = VINF_SUCCESS;
517
518 AUDMIXSINKCMD enmCmd = fEnable
519 ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE;
520
521 /* First, enable or disable the stream and the stream's sink, if any. */
522 if ( pStream->pMixSink
523 && pStream->pMixSink->pMixSink)
524 rc = AudioMixerSinkCtl(pStream->pMixSink->pMixSink, enmCmd);
525
526 if ( RT_SUCCESS(rc)
527 && fEnable
528 && pStream->Dbg.Runtime.fEnabled)
529 {
530 Assert(DrvAudioHlpPCMPropsAreValid(&pStream->State.Cfg.Props));
531
532 if (fEnable)
533 {
534 if (!DrvAudioHlpFileIsOpen(pStream->Dbg.Runtime.pFileStream))
535 {
536 int rc2 = DrvAudioHlpFileOpen(pStream->Dbg.Runtime.pFileStream, PDMAUDIOFILE_DEFAULT_OPEN_FLAGS,
537 &pStream->State.Cfg.Props);
538 AssertRC(rc2);
539 }
540
541 if (!DrvAudioHlpFileIsOpen(pStream->Dbg.Runtime.pFileDMA))
542 {
543 int rc2 = DrvAudioHlpFileOpen(pStream->Dbg.Runtime.pFileDMA, PDMAUDIOFILE_DEFAULT_OPEN_FLAGS,
544 &pStream->State.Cfg.Props);
545 AssertRC(rc2);
546 }
547 }
548 }
549
550 if (RT_SUCCESS(rc))
551 {
552 pStream->State.fRunning = fEnable;
553 }
554
555 LogFunc(("[SD%RU8] rc=%Rrc\n", pStream->u8SD, rc));
556 return rc;
557}
558
559uint32_t hdaR3StreamGetPosition(PHDASTATE pThis, PHDASTREAM pStream)
560{
561 return HDA_STREAM_REG(pThis, LPIB, pStream->u8SD);
562}
563
564/**
565 * Updates an HDA stream's current read or write buffer position (depending on the stream type) by
566 * updating its associated LPIB register and DMA position buffer (if enabled).
567 *
568 * @param pStream HDA stream to update read / write position for.
569 * @param u32LPIB Absolute position (in bytes) to set current read / write position to.
570 */
571void hdaR3StreamSetPosition(PHDASTREAM pStream, uint32_t u32LPIB)
572{
573 AssertPtrReturnVoid(pStream);
574
575 Log3Func(("[SD%RU8] LPIB=%RU32 (DMA Position Buffer Enabled: %RTbool)\n",
576 pStream->u8SD, u32LPIB, pStream->pHDAState->fDMAPosition));
577
578 /* Update LPIB in any case. */
579 HDA_STREAM_REG(pStream->pHDAState, LPIB, pStream->u8SD) = u32LPIB;
580
581 /* Do we need to tell the current DMA position? */
582 if (pStream->pHDAState->fDMAPosition)
583 {
584 int rc2 = PDMDevHlpPCIPhysWrite(pStream->pHDAState->CTX_SUFF(pDevIns),
585 pStream->pHDAState->u64DPBase + (pStream->u8SD * 2 * sizeof(uint32_t)),
586 (void *)&u32LPIB, sizeof(uint32_t));
587 AssertRC(rc2);
588 }
589}
590
591/**
592 * Retrieves the available size of (buffered) audio data (in bytes) of a given HDA stream.
593 *
594 * @returns Available data (in bytes).
595 * @param pStream HDA stream to retrieve size for.
596 */
597uint32_t hdaR3StreamGetUsed(PHDASTREAM pStream)
598{
599 AssertPtrReturn(pStream, 0);
600
601 if (!pStream->State.pCircBuf)
602 return 0;
603
604 return (uint32_t)RTCircBufUsed(pStream->State.pCircBuf);
605}
606
607/**
608 * Retrieves the free size of audio data (in bytes) of a given HDA stream.
609 *
610 * @returns Free data (in bytes).
611 * @param pStream HDA stream to retrieve size for.
612 */
613uint32_t hdaR3StreamGetFree(PHDASTREAM pStream)
614{
615 AssertPtrReturn(pStream, 0);
616
617 if (!pStream->State.pCircBuf)
618 return 0;
619
620 return (uint32_t)RTCircBufFree(pStream->State.pCircBuf);
621}
622
623/**
624 * Returns whether a next transfer for a given stream is scheduled or not.
625 * This takes pending stream interrupts into account as well as the next scheduled
626 * transfer timestamp.
627 *
628 * @returns True if a next transfer is scheduled, false if not.
629 * @param pStream HDA stream to retrieve schedule status for.
630 */
631bool hdaR3StreamTransferIsScheduled(PHDASTREAM pStream)
632{
633 if (pStream)
634 {
635 AssertPtrReturn(pStream->pHDAState, false);
636
637 if (pStream->State.fRunning)
638 {
639 if (pStream->State.cTransferPendingInterrupts)
640 {
641 Log3Func(("[SD%RU8] Scheduled (%RU8 IRQs pending)\n", pStream->u8SD, pStream->State.cTransferPendingInterrupts));
642 return true;
643 }
644
645 const uint64_t tsNow = TMTimerGet(pStream->pTimer);
646 if (pStream->State.tsTransferNext > tsNow)
647 {
648 Log3Func(("[SD%RU8] Scheduled in %RU64\n", pStream->u8SD, pStream->State.tsTransferNext - tsNow));
649 return true;
650 }
651 }
652 }
653 return false;
654}
655
656/**
657 * Returns the (virtual) clock timestamp of the next transfer, if any.
658 * Will return 0 if no new transfer is scheduled.
659 *
660 * @returns The (virtual) clock timestamp of the next transfer.
661 * @param pStream HDA stream to retrieve timestamp for.
662 */
663uint64_t hdaR3StreamTransferGetNext(PHDASTREAM pStream)
664{
665 return pStream->State.tsTransferNext;
666}
667
668/**
669 * Writes audio data from a mixer sink into an HDA stream's DMA buffer.
670 *
671 * @returns IPRT status code.
672 * @param pStream HDA stream to write to.
673 * @param pvBuf Data buffer to write.
674 * If NULL, silence will be written.
675 * @param cbBuf Number of bytes of data buffer to write.
676 * @param pcbWritten Number of bytes written. Optional.
677 */
678int hdaR3StreamWrite(PHDASTREAM pStream, const void *pvBuf, uint32_t cbBuf, uint32_t *pcbWritten)
679{
680 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
681 /* pvBuf is optional. */
682 AssertReturn(cbBuf, VERR_INVALID_PARAMETER);
683 /* pcbWritten is optional. */
684
685 PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
686 AssertPtr(pCircBuf);
687
688 int rc = VINF_SUCCESS;
689
690 uint32_t cbWrittenTotal = 0;
691 uint32_t cbLeft = RT_MIN(cbBuf, (uint32_t)RTCircBufFree(pCircBuf));
692
693 while (cbLeft)
694 {
695 void *pvDst;
696 size_t cbDst;
697
698 RTCircBufAcquireWriteBlock(pCircBuf, cbLeft, &pvDst, &cbDst);
699
700 if (cbDst)
701 {
702 if (pvBuf)
703 {
704 memcpy(pvDst, (uint8_t *)pvBuf + cbWrittenTotal, cbDst);
705 }
706 else /* Send silence. */
707 {
708 /** @todo Use a sample spec for "silence" based on the PCM parameters.
709 * For now we ASSUME that silence equals NULLing the data. */
710 RT_BZERO(pvDst, cbDst);
711 }
712
713 if (pStream->Dbg.Runtime.fEnabled)
714 DrvAudioHlpFileWrite(pStream->Dbg.Runtime.pFileStream, pvDst, cbDst, 0 /* fFlags */);
715 }
716
717 RTCircBufReleaseWriteBlock(pCircBuf, cbDst);
718
719 if (RT_FAILURE(rc))
720 break;
721
722 Assert(cbLeft >= (uint32_t)cbDst);
723 cbLeft -= (uint32_t)cbDst;
724
725 cbWrittenTotal += (uint32_t)cbDst;
726 }
727
728 Log3Func(("cbWrittenTotal=%RU32\n", cbWrittenTotal));
729
730 if (pcbWritten)
731 *pcbWritten = cbWrittenTotal;
732
733 return rc;
734}
735
736
737/**
738 * Reads audio data from an HDA stream's DMA buffer and writes into a specified mixer sink.
739 *
740 * @returns IPRT status code.
741 * @param pStream HDA stream to read audio data from.
742 * @param cbToRead Number of bytes to read.
743 * @param pcbRead Number of bytes read. Optional.
744 */
745int hdaR3StreamRead(PHDASTREAM pStream, uint32_t cbToRead, uint32_t *pcbRead)
746{
747 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
748 AssertReturn(cbToRead, VERR_INVALID_PARAMETER);
749 /* pcbWritten is optional. */
750
751 PHDAMIXERSINK pSink = pStream->pMixSink;
752 if (!pSink)
753 {
754 AssertMsgFailed(("[SD%RU8]: Can't read from a stream with no sink attached\n", pStream->u8SD));
755
756 if (pcbRead)
757 *pcbRead = 0;
758 return VINF_SUCCESS;
759 }
760
761 PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
762 AssertPtr(pCircBuf);
763
764 int rc = VINF_SUCCESS;
765
766 uint32_t cbReadTotal = 0;
767 uint32_t cbLeft = RT_MIN(cbToRead, (uint32_t)RTCircBufUsed(pCircBuf));
768
769 while (cbLeft)
770 {
771 void *pvSrc;
772 size_t cbSrc;
773
774 uint32_t cbWritten = 0;
775
776 RTCircBufAcquireReadBlock(pCircBuf, cbLeft, &pvSrc, &cbSrc);
777
778 if (cbSrc)
779 {
780 if (pStream->Dbg.Runtime.fEnabled)
781 DrvAudioHlpFileWrite(pStream->Dbg.Runtime.pFileStream, pvSrc, cbSrc, 0 /* fFlags */);
782
783 rc = AudioMixerSinkWrite(pSink->pMixSink, AUDMIXOP_COPY, pvSrc, (uint32_t)cbSrc, &cbWritten);
784 AssertRC(rc);
785
786 Assert(cbSrc >= cbWritten);
787 Log2Func(("[SD%RU8]: %zu/%zu bytes read\n", pStream->u8SD, cbWritten, cbSrc));
788 }
789
790 RTCircBufReleaseReadBlock(pCircBuf, cbWritten);
791
792 if (RT_FAILURE(rc))
793 break;
794
795 Assert(cbLeft >= cbWritten);
796 cbLeft -= cbWritten;
797
798 cbReadTotal += cbWritten;
799 }
800
801 if (pcbRead)
802 *pcbRead = cbReadTotal;
803
804 return rc;
805}
806
807/**
808 * Transfers data of an HDA stream according to its usage (input / output).
809 *
810 * For an SDO (output) stream this means reading DMA data from the device to
811 * the HDA stream's internal FIFO buffer.
812 *
813 * For an SDI (input) stream this is reading audio data from the HDA stream's
814 * internal FIFO buffer and writing it as DMA data to the device.
815 *
816 * @returns IPRT status code.
817 * @param pStream HDA stream to update.
818 * @param cbToProcessMax How much data (in bytes) to process as maximum.
819 */
820int hdaR3StreamTransfer(PHDASTREAM pStream, uint32_t cbToProcessMax)
821{
822 AssertPtrReturn(pStream, VERR_INVALID_POINTER);
823
824 hdaR3StreamLock(pStream);
825
826 PHDASTATE pThis = pStream->pHDAState;
827 AssertPtr(pThis);
828
829 PHDASTREAMPERIOD pPeriod = &pStream->State.Period;
830 if (!hdaR3StreamPeriodLock(pPeriod))
831 return VERR_ACCESS_DENIED;
832
833 bool fProceed = true;
834
835 /* Stream not running? */
836 if (!pStream->State.fRunning)
837 {
838 Log3Func(("[SD%RU8] Not running\n", pStream->u8SD));
839 fProceed = false;
840 }
841 else if (HDA_STREAM_REG(pThis, STS, pStream->u8SD) & HDA_SDSTS_BCIS)
842 {
843 Log3Func(("[SD%RU8] BCIS bit set\n", pStream->u8SD));
844 fProceed = false;
845 }
846
847 if (!fProceed)
848 {
849 hdaR3StreamPeriodUnlock(pPeriod);
850 hdaR3StreamUnlock(pStream);
851 return VINF_SUCCESS;
852 }
853
854 const uint64_t tsNow = TMTimerGet(pStream->pTimer);
855
856 if (!pStream->State.tsTransferLast)
857 pStream->State.tsTransferLast = tsNow;
858
859#ifdef DEBUG
860 const int64_t iTimerDelta = tsNow - pStream->State.tsTransferLast;
861 Log3Func(("[SD%RU8] Time now=%RU64, last=%RU64 -> %RI64 ticks delta\n",
862 pStream->u8SD, tsNow, pStream->State.tsTransferLast, iTimerDelta));
863#endif
864
865 pStream->State.tsTransferLast = tsNow;
866
867 /* Sanity checks. */
868 Assert(pStream->u8SD < HDA_MAX_STREAMS);
869 Assert(pStream->u64BDLBase);
870 Assert(pStream->u32CBL);
871 Assert(pStream->u16FIFOS);
872
873 /* State sanity checks. */
874 Assert(ASMAtomicReadBool(&pStream->State.fInReset) == false);
875
876 int rc = VINF_SUCCESS;
877
878 /* Fetch first / next BDL entry. */
879 PHDABDLE pBDLE = &pStream->State.BDLE;
880 if (hdaR3BDLEIsComplete(pBDLE))
881 {
882 rc = hdaR3BDLEFetch(pThis, pBDLE, pStream->u64BDLBase, pStream->State.uCurBDLE);
883 AssertRC(rc);
884 }
885
886 uint32_t cbToProcess = RT_MIN(pStream->State.cbTransferSize - pStream->State.cbTransferProcessed,
887 pStream->State.cbTransferChunk);
888
889 Log3Func(("[SD%RU8] cbToProcess=%RU32, cbToProcessMax=%RU32\n", pStream->u8SD, cbToProcess, cbToProcessMax));
890
891 if (cbToProcess > cbToProcessMax)
892 {
893 if (pStream->State.Cfg.enmDir == PDMAUDIODIR_IN)
894 LogRelMax2(64, ("HDA: Warning: DMA buffer underflow for stream #%RU8 (still %RU32 bytes needed)\n",
895 pStream->u8SD, cbToProcess - cbToProcessMax));
896 else
897 LogRelMax2(64, ("HDA: Warning: DMA buffer overflow for stream #%RU8 (%RU32 bytes outstanding)\n",
898 pStream->u8SD, cbToProcess - cbToProcessMax));
899
900 LogFunc(("[SD%RU8] Warning: Limiting transfer (cbToProcess=%RU32, cbToProcessMax=%RU32)\n",
901 pStream->u8SD, cbToProcess, cbToProcessMax));
902
903 /* Never process more than a stream currently can handle. */
904 cbToProcess = cbToProcessMax;
905 }
906
907 uint32_t cbProcessed = 0;
908 uint32_t cbLeft = cbToProcess;
909
910 uint8_t abChunk[HDA_FIFO_MAX + 1];
911 while (cbLeft)
912 {
913 /* Limit the chunk to the stream's FIFO size and what's left to process. */
914 uint32_t cbChunk = RT_MIN(cbLeft, pStream->u16FIFOS);
915
916 /* Limit the chunk to the remaining data of the current BDLE. */
917 cbChunk = RT_MIN(cbChunk, pBDLE->Desc.u32BufSize - pBDLE->State.u32BufOff);
918
919 /* If there are position adjustment frames left to be processed,
920 * make sure that we process them first as a whole. */
921 if (pStream->State.cPosAdjustFramesLeft)
922 cbChunk = RT_MIN(cbChunk, uint32_t(pStream->State.cPosAdjustFramesLeft * pStream->State.cbFrameSize));
923
924 Log3Func(("[SD%RU8] cbChunk=%RU32, cPosAdjustFramesLeft=%RU16\n",
925 pStream->u8SD, cbChunk, pStream->State.cPosAdjustFramesLeft));
926
927 if (!cbChunk)
928 break;
929
930 uint32_t cbDMA = 0;
931 PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
932
933 if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_IN) /* Input (SDI). */
934 {
935 STAM_PROFILE_START(&pThis->StatIn, a);
936
937 uint32_t cbDMAWritten = 0;
938 uint32_t cbDMAToWrite = cbChunk;
939
940 /** @todo Do we need interleaving streams support here as well?
941 * Never saw anything else besides mono/stereo mics (yet). */
942 while (cbDMAToWrite)
943 {
944 void *pvBuf; size_t cbBuf;
945 RTCircBufAcquireReadBlock(pCircBuf, cbDMAToWrite, &pvBuf, &cbBuf);
946
947 if ( !cbBuf
948 && !RTCircBufUsed(pCircBuf))
949 break;
950
951 memcpy(abChunk + cbDMAWritten, pvBuf, cbBuf);
952
953 RTCircBufReleaseReadBlock(pCircBuf, cbBuf);
954
955 Assert(cbDMAToWrite >= cbBuf);
956 cbDMAToWrite -= (uint32_t)cbBuf;
957 cbDMAWritten += (uint32_t)cbBuf;
958 Assert(cbDMAWritten <= cbChunk);
959 }
960
961 if (cbDMAToWrite)
962 {
963 LogRel2(("HDA: FIFO underflow for stream #%RU8 (%RU32 bytes outstanding)\n", pStream->u8SD, cbDMAToWrite));
964
965 Assert(cbChunk == cbDMAWritten + cbDMAToWrite);
966 memset((uint8_t *)abChunk + cbDMAWritten, 0, cbDMAToWrite);
967 cbDMAWritten = cbChunk;
968 }
969
970 rc = hdaR3DMAWrite(pThis, pStream, abChunk, cbDMAWritten, &cbDMA /* pcbWritten */);
971 if (RT_FAILURE(rc))
972 LogRel(("HDA: Writing to stream #%RU8 DMA failed with %Rrc\n", pStream->u8SD, rc));
973
974 STAM_PROFILE_STOP(&pThis->StatIn, a);
975 }
976 else if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_OUT) /* Output (SDO). */
977 {
978 STAM_PROFILE_START(&pThis->StatOut, a);
979
980 rc = hdaR3DMARead(pThis, pStream, abChunk, cbChunk, &cbDMA /* pcbRead */);
981 if (RT_SUCCESS(rc))
982 {
983 const uint32_t cbDMAFree = (uint32_t)RTCircBufFree(pCircBuf);
984
985 if (cbDMAFree < cbDMA)
986 LogRelMax2(64, ("HDA: Warning: DMA buffer overflow of stream #%RU8 (discarding %RU32 bytes)\n",
987 pStream->u8SD, cbDMA - cbDMAFree));
988
989#ifndef VBOX_WITH_HDA_AUDIO_INTERLEAVING_STREAMS_SUPPORT
990 /*
991 * Most guests don't use different stream frame sizes than
992 * the default one, so save a bit of CPU time and don't go into
993 * the frame extraction code below.
994 *
995 * Only macOS guests need the frame extraction branch below at the moment AFAIK.
996 */
997 if (pStream->State.cbFrameSize == HDA_FRAME_SIZE)
998 {
999 uint32_t cbDMARead = 0;
1000 uint32_t cbDMALeft = RT_MIN(cbDMA, cbDMAFree);
1001
1002 while (cbDMALeft)
1003 {
1004 void *pvBuf; size_t cbBuf;
1005 RTCircBufAcquireWriteBlock(pCircBuf, cbDMALeft, &pvBuf, &cbBuf);
1006
1007 if (cbBuf)
1008 {
1009 memcpy(pvBuf, abChunk + cbDMARead, cbBuf);
1010 cbDMARead += (uint32_t)cbBuf;
1011 cbDMALeft -= (uint32_t)cbBuf;
1012 }
1013
1014 RTCircBufReleaseWriteBlock(pCircBuf, cbBuf);
1015 }
1016 }
1017 else
1018 {
1019 /*
1020 * The following code extracts the required audio stream (channel) data
1021 * of non-interleaved *and* interleaved audio streams.
1022 *
1023 * We by default only support 2 channels with 16-bit samples (HDA_FRAME_SIZE),
1024 * but an HDA audio stream can have interleaved audio data of multiple audio
1025 * channels in such a single stream ("AA,AA,AA vs. AA,BB,AA,BB").
1026 *
1027 * So take this into account by just handling the first channel in such a stream ("A")
1028 * and just discard the other channel's data.
1029 *
1030 */
1031 /** @todo Optimize this stuff -- copying only one frame a time is expensive. */
1032 uint32_t cbDMARead = pStream->State.cbDMALeft ? pStream->State.cbFrameSize - pStream->State.cbDMALeft : 0;
1033 uint32_t cbDMALeft = RT_MIN(cbDMA, cbDMAFree);
1034
1035 while (cbDMALeft >= pStream->State.cbFrameSize)
1036 {
1037 void *pvBuf; size_t cbBuf;
1038 RTCircBufAcquireWriteBlock(pCircBuf, HDA_FRAME_SIZE, &pvBuf, &cbBuf);
1039
1040 AssertBreak(cbDMARead <= sizeof(abChunk));
1041
1042 if (cbBuf)
1043 memcpy(pvBuf, abChunk + cbDMARead, cbBuf);
1044
1045 RTCircBufReleaseWriteBlock(pCircBuf, cbBuf);
1046
1047 Assert(cbDMALeft >= pStream->State.cbFrameSize);
1048 cbDMALeft -= pStream->State.cbFrameSize;
1049 cbDMARead += pStream->State.cbFrameSize;
1050 }
1051
1052 pStream->State.cbDMALeft = cbDMALeft;
1053 Assert(pStream->State.cbDMALeft < pStream->State.cbFrameSize);
1054 }
1055#else
1056 /** @todo This needs making use of HDAStreamMap + HDAStreamChannel. */
1057# error "Implement reading interleaving streams support here."
1058#endif
1059 }
1060 else
1061 LogRel(("HDA: Reading from stream #%RU8 DMA failed with %Rrc\n", pStream->u8SD, rc));
1062
1063 STAM_PROFILE_STOP(&pThis->StatOut, a);
1064 }
1065
1066 else /** @todo Handle duplex streams? */
1067 AssertFailed();
1068
1069 if (cbDMA)
1070 {
1071 /* We always increment the position of DMA buffer counter because we're always reading
1072 * into an intermediate DMA buffer. */
1073 pBDLE->State.u32BufOff += (uint32_t)cbDMA;
1074 Assert(pBDLE->State.u32BufOff <= pBDLE->Desc.u32BufSize);
1075
1076 /* Are we done doing the position adjustment?
1077 * Only then do the transfer accounting .*/
1078 if (pStream->State.cPosAdjustFramesLeft == 0)
1079 {
1080 Assert(cbLeft >= cbDMA);
1081 cbLeft -= cbDMA;
1082
1083 cbProcessed += cbDMA;
1084 }
1085
1086 /*
1087 * Update the stream's current position.
1088 * Do this as accurate and close to the actual data transfer as possible.
1089 * All guetsts rely on this, depending on the mechanism they use (LPIB register or DMA counters).
1090 */
1091 uint32_t cbStreamPos = hdaR3StreamGetPosition(pThis, pStream);
1092 if (cbStreamPos == pStream->u32CBL)
1093 cbStreamPos = 0;
1094
1095 hdaR3StreamSetPosition(pStream, cbStreamPos + cbDMA);
1096 }
1097
1098 if (hdaR3BDLEIsComplete(pBDLE))
1099 {
1100 Log3Func(("[SD%RU8] Complete: %R[bdle]\n", pStream->u8SD, pBDLE));
1101
1102 /* Does the current BDLE require an interrupt to be sent? */
1103 if ( hdaR3BDLENeedsInterrupt(pBDLE)
1104 /* Are we done doing the position adjustment?
1105 * It can happen that a BDLE which is handled while doing the
1106 * position adjustment requires an interrupt on completion (IOC) being set.
1107 *
1108 * In such a case we need to skip such an interrupt and just move on. */
1109 && pStream->State.cPosAdjustFramesLeft == 0)
1110 {
1111 /* If the IOCE ("Interrupt On Completion Enable") bit of the SDCTL register is set
1112 * we need to generate an interrupt.
1113 */
1114 if (HDA_STREAM_REG(pThis, CTL, pStream->u8SD) & HDA_SDCTL_IOCE)
1115 {
1116 pStream->State.cTransferPendingInterrupts++;
1117
1118 AssertMsg(pStream->State.cTransferPendingInterrupts <= 32,
1119 ("Too many pending interrupts (%RU8) for stream #%RU8\n",
1120 pStream->State.cTransferPendingInterrupts, pStream->u8SD));
1121 }
1122 }
1123
1124 if (pStream->State.uCurBDLE == pStream->u16LVI)
1125 {
1126 pStream->State.uCurBDLE = 0;
1127 }
1128 else
1129 pStream->State.uCurBDLE++;
1130
1131 /* Fetch the next BDLE entry. */
1132 hdaR3BDLEFetch(pThis, pBDLE, pStream->u64BDLBase, pStream->State.uCurBDLE);
1133 }
1134
1135 /* Do the position adjustment accounting. */
1136 pStream->State.cPosAdjustFramesLeft -= RT_MIN(pStream->State.cPosAdjustFramesLeft, cbDMA / pStream->State.cbFrameSize);
1137
1138 if (RT_FAILURE(rc))
1139 break;
1140 }
1141
1142 Log3Func(("[SD%RU8] cbToProcess=%RU32, cbProcessed=%RU32, cbLeft=%RU32, %R[bdle], rc=%Rrc\n",
1143 pStream->u8SD, cbToProcess, cbProcessed, cbLeft, pBDLE, rc));
1144
1145 /* Sanity. */
1146 Assert(cbProcessed == cbToProcess);
1147 Assert(cbLeft == 0);
1148
1149 /* Only do the data accounting if we don't have to do any position
1150 * adjustment anymore. */
1151 if (pStream->State.cPosAdjustFramesLeft == 0)
1152 {
1153 hdaR3StreamPeriodInc(pPeriod, RT_MIN(cbProcessed / pStream->State.cbFrameSize,
1154 hdaR3StreamPeriodGetRemainingFrames(pPeriod)));
1155
1156 pStream->State.cbTransferProcessed += cbProcessed;
1157 }
1158
1159 /* Make sure that we never report more stuff processed than initially announced. */
1160 if (pStream->State.cbTransferProcessed > pStream->State.cbTransferSize)
1161 pStream->State.cbTransferProcessed = pStream->State.cbTransferSize;
1162
1163 uint32_t cbTransferLeft = pStream->State.cbTransferSize - pStream->State.cbTransferProcessed;
1164 bool fTransferComplete = !cbTransferLeft;
1165 uint64_t tsTransferNext = 0;
1166
1167 if (fTransferComplete)
1168 {
1169 /*
1170 * Try updating the wall clock.
1171 *
1172 * Note 1) Only certain guests (like Linux' snd_hda_intel) rely on the WALCLK register
1173 * in order to determine the correct timing of the sound device. Other guests
1174 * like Windows 7 + 10 (or even more exotic ones like Haiku) will completely
1175 * ignore this.
1176 *
1177 * Note 2) When updating the WALCLK register too often / early (or even in a non-monotonic
1178 * fashion) this *will* upset guest device drivers and will completely fuck up the
1179 * sound output. Running VLC on the guest will tell!
1180 */
1181 const bool fWalClkSet = hdaR3WalClkSet(pThis,
1182 hdaWalClkGetCurrent(pThis)
1183 + hdaR3StreamPeriodFramesToWalClk(pPeriod,
1184 pStream->State.cbTransferProcessed
1185 / pStream->State.cbFrameSize),
1186 false /* fForce */);
1187 RT_NOREF(fWalClkSet);
1188 }
1189
1190 /* Does the period have any interrupts outstanding? */
1191 if (pStream->State.cTransferPendingInterrupts)
1192 {
1193 Log3Func(("[SD%RU8] Scheduling interrupt\n", pStream->u8SD));
1194
1195 /*
1196 * Set the stream's BCIS bit.
1197 *
1198 * Note: This only must be done if the whole period is complete, and not if only
1199 * one specific BDL entry is complete (if it has the IOC bit set).
1200 *
1201 * This will otherwise confuses the guest when it 1) deasserts the interrupt,
1202 * 2) reads SDSTS (with BCIS set) and then 3) too early reads a (wrong) WALCLK value.
1203 *
1204 * snd_hda_intel on Linux will tell.
1205 */
1206 HDA_STREAM_REG(pThis, STS, pStream->u8SD) |= HDA_SDSTS_BCIS;
1207
1208 /* Trigger an interrupt first and let hdaRegWriteSDSTS() deal with
1209 * ending / beginning a period. */
1210#ifndef LOG_ENABLED
1211 hdaProcessInterrupt(pThis);
1212#else
1213 hdaProcessInterrupt(pThis, __FUNCTION__);
1214#endif
1215 }
1216 else /* Transfer still in-flight -- schedule the next timing slot. */
1217 {
1218 uint32_t cbTransferNext = cbTransferLeft;
1219
1220 /* No data left to transfer anymore or do we have more data left
1221 * than we can transfer per timing slot? Clamp. */
1222 if ( !cbTransferNext
1223 || cbTransferNext > pStream->State.cbTransferChunk)
1224 {
1225 cbTransferNext = pStream->State.cbTransferChunk;
1226 }
1227
1228 tsTransferNext = tsNow + (cbTransferNext * pStream->State.cTicksPerByte);
1229
1230 /*
1231 * If the current transfer is complete, reset our counter.
1232 *
1233 * This can happen for examlpe if the guest OS (like macOS) sets up
1234 * big BDLEs without IOC bits set (but for the last one) and the
1235 * transfer is complete before we reach such a BDL entry.
1236 */
1237 if (fTransferComplete)
1238 pStream->State.cbTransferProcessed = 0;
1239 }
1240
1241 /* If we need to do another transfer, (re-)arm the device timer. */
1242 if (tsTransferNext) /* Can be 0 if no next transfer is needed. */
1243 {
1244 Log3Func(("[SD%RU8] Scheduling timer\n", pStream->u8SD));
1245
1246 TMTimerUnlock(pStream->pTimer);
1247
1248 LogFunc(("Timer set SD%RU8\n", pStream->u8SD));
1249 hdaR3TimerSet(pStream->pHDAState, pStream, tsTransferNext, false /* fForce */);
1250
1251 TMTimerLock(pStream->pTimer, VINF_SUCCESS);
1252
1253 pStream->State.tsTransferNext = tsTransferNext;
1254 }
1255
1256 pStream->State.tsTransferLast = tsNow;
1257
1258 Log3Func(("[SD%RU8] cbTransferLeft=%RU32 -- %RU32/%RU32\n",
1259 pStream->u8SD, cbTransferLeft, pStream->State.cbTransferProcessed, pStream->State.cbTransferSize));
1260 Log3Func(("[SD%RU8] fTransferComplete=%RTbool, cTransferPendingInterrupts=%RU8\n",
1261 pStream->u8SD, fTransferComplete, pStream->State.cTransferPendingInterrupts));
1262 Log3Func(("[SD%RU8] tsNow=%RU64, tsTransferNext=%RU64 (in %RU64 ticks)\n",
1263 pStream->u8SD, tsNow, tsTransferNext, tsTransferNext - tsNow));
1264
1265 hdaR3StreamPeriodUnlock(pPeriod);
1266 hdaR3StreamUnlock(pStream);
1267
1268 return VINF_SUCCESS;
1269}
1270
1271/**
1272 * Updates a HDA stream by doing its required data transfers.
1273 * The host sink(s) set the overall pace.
1274 *
1275 * This routine is called by both, the synchronous and the asynchronous, implementations.
1276 *
1277 * @param pStream HDA stream to update.
1278 * @param fInTimer Whether to this function was called from the timer
1279 * context or an asynchronous I/O stream thread (if supported).
1280 */
1281void hdaR3StreamUpdate(PHDASTREAM pStream, bool fInTimer)
1282{
1283 if (!pStream)
1284 return;
1285
1286 PAUDMIXSINK pSink = NULL;
1287 if ( pStream->pMixSink
1288 && pStream->pMixSink->pMixSink)
1289 {
1290 pSink = pStream->pMixSink->pMixSink;
1291 }
1292
1293 if (!AudioMixerSinkIsActive(pSink)) /* No sink available? Bail out. */
1294 return;
1295
1296 int rc2;
1297
1298 if (hdaGetDirFromSD(pStream->u8SD) == PDMAUDIODIR_OUT) /* Output (SDO). */
1299 {
1300 /* Is the HDA stream ready to be written (guest output data) to? If so, by how much? */
1301 const uint32_t cbFree = hdaR3StreamGetFree(pStream);
1302
1303 if ( fInTimer
1304 && cbFree)
1305 {
1306 Log3Func(("[SD%RU8] cbFree=%RU32\n", pStream->u8SD, cbFree));
1307
1308 /* Do the DMA transfer. */
1309 rc2 = hdaR3StreamTransfer(pStream, cbFree);
1310 AssertRC(rc2);
1311 }
1312
1313 /* How much (guest output) data is available at the moment for the HDA stream? */
1314 uint32_t cbUsed = hdaR3StreamGetUsed(pStream);
1315
1316#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1317 if ( fInTimer
1318 && cbUsed)
1319 {
1320 rc2 = hdaR3StreamAsyncIONotify(pStream);
1321 AssertRC(rc2);
1322 }
1323 else
1324 {
1325#endif
1326 const uint32_t cbSinkWritable = AudioMixerSinkGetWritable(pSink);
1327
1328 /* Do not write more than the sink can hold at the moment.
1329 * The host sets the overall pace. */
1330 if (cbUsed > cbSinkWritable)
1331 cbUsed = cbSinkWritable;
1332
1333 if (cbUsed)
1334 {
1335 /* Read (guest output) data and write it to the stream's sink. */
1336 rc2 = hdaR3StreamRead(pStream, cbUsed, NULL /* pcbRead */);
1337 AssertRC(rc2);
1338 }
1339
1340 /* When running synchronously, update the associated sink here.
1341 * Otherwise this will be done in the stream's dedicated async I/O thread. */
1342 rc2 = AudioMixerSinkUpdate(pSink);
1343 AssertRC(rc2);
1344
1345#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1346 }
1347#endif
1348 }
1349 else /* Input (SDI). */
1350 {
1351#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1352 if (!fInTimer)
1353 {
1354#endif
1355 rc2 = AudioMixerSinkUpdate(pSink);
1356 AssertRC(rc2);
1357
1358 /* Is the sink ready to be read (host input data) from? If so, by how much? */
1359 uint32_t cbReadable = AudioMixerSinkGetReadable(pSink);
1360
1361 /* How much (guest input) data is available for writing at the moment for the HDA stream? */
1362 const uint32_t cbFree = hdaR3StreamGetFree(pStream);
1363
1364 Log3Func(("[SD%RU8] cbReadable=%RU32, cbFree=%RU32\n", pStream->u8SD, cbReadable, cbFree));
1365
1366 /* Do not write more than the sink can hold at the moment.
1367 * The host sets the overall pace. */
1368 if (cbReadable > cbFree)
1369 cbReadable = cbFree;
1370
1371 if (cbReadable)
1372 {
1373 uint8_t abFIFO[HDA_FIFO_MAX + 1];
1374 while (cbReadable)
1375 {
1376 uint32_t cbRead;
1377 rc2 = AudioMixerSinkRead(pSink, AUDMIXOP_COPY,
1378 abFIFO, RT_MIN(cbReadable, (uint32_t)sizeof(abFIFO)), &cbRead);
1379 AssertRCBreak(rc2);
1380
1381 if (!cbRead)
1382 {
1383 AssertMsgFailed(("Nothing read from sink, even if %RU32 bytes were (still) announced\n", cbReadable));
1384 break;
1385 }
1386
1387 /* Write (guest input) data to the stream which was read from stream's sink before. */
1388 uint32_t cbWritten;
1389 rc2 = hdaR3StreamWrite(pStream, abFIFO, cbRead, &cbWritten);
1390 AssertRCBreak(rc2);
1391
1392 if (!cbWritten)
1393 {
1394 AssertFailed(); /* Should never happen, as we know how much we can write. */
1395 break;
1396 }
1397
1398 Assert(cbReadable >= cbRead);
1399 cbReadable -= cbRead;
1400 }
1401 }
1402 #if 0
1403 else /* Send silence as input. */
1404 {
1405 cbReadable = pStream->State.cbTransferSize - pStream->State.cbTransferProcessed;
1406
1407 Log3Func(("[SD%RU8] Sending silence (%RU32 bytes)\n", pStream->u8SD, cbReadable));
1408
1409 if (cbReadable)
1410 {
1411 rc2 = hdaR3StreamWrite(pStream, NULL /* Silence */, cbReadable, NULL /* pcbWritten */);
1412 AssertRC(rc2);
1413 }
1414 }
1415 #endif
1416#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1417 }
1418 else /* fInTimer */
1419 {
1420#endif
1421 const uint64_t tsNow = RTTimeMilliTS();
1422 static uint64_t s_lasti = 0;
1423 if (s_lasti == 0)
1424 s_lasti = tsNow;
1425
1426 if (tsNow - s_lasti >= 10) /** @todo Fix this properly. */
1427 {
1428 rc2 = hdaR3StreamAsyncIONotify(pStream);
1429 AssertRC(rc2);
1430
1431 s_lasti = tsNow;
1432 }
1433
1434 const uint32_t cbToTransfer = hdaR3StreamGetUsed(pStream);
1435 if (cbToTransfer)
1436 {
1437 rc2 = hdaR3StreamTransfer(pStream, cbToTransfer);
1438 AssertRC(rc2);
1439 }
1440#ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1441 }
1442#endif
1443 }
1444}
1445
1446/**
1447 * Locks an HDA stream for serialized access.
1448 *
1449 * @returns IPRT status code.
1450 * @param pStream HDA stream to lock.
1451 */
1452void hdaR3StreamLock(PHDASTREAM pStream)
1453{
1454 AssertPtrReturnVoid(pStream);
1455 int rc2 = RTCritSectEnter(&pStream->CritSect);
1456 AssertRC(rc2);
1457}
1458
1459/**
1460 * Unlocks a formerly locked HDA stream.
1461 *
1462 * @returns IPRT status code.
1463 * @param pStream HDA stream to unlock.
1464 */
1465void hdaR3StreamUnlock(PHDASTREAM pStream)
1466{
1467 AssertPtrReturnVoid(pStream);
1468 int rc2 = RTCritSectLeave(&pStream->CritSect);
1469 AssertRC(rc2);
1470}
1471
1472/**
1473 * Updates an HDA stream's current read or write buffer position (depending on the stream type) by
1474 * updating its associated LPIB register and DMA position buffer (if enabled).
1475 *
1476 * @returns Set LPIB value.
1477 * @param pStream HDA stream to update read / write position for.
1478 * @param u32LPIB New LPIB (position) value to set.
1479 */
1480uint32_t hdaR3StreamUpdateLPIB(PHDASTREAM pStream, uint32_t u32LPIB)
1481{
1482 AssertPtrReturn(pStream, 0);
1483
1484 AssertMsg(u32LPIB <= pStream->u32CBL,
1485 ("[SD%RU8] New LPIB (%RU32) exceeds CBL (%RU32)\n", pStream->u8SD, u32LPIB, pStream->u32CBL));
1486
1487 const PHDASTATE pThis = pStream->pHDAState;
1488
1489 u32LPIB = RT_MIN(u32LPIB, pStream->u32CBL);
1490
1491 LogFlowFunc(("[SD%RU8]: LPIB=%RU32 (DMA Position Buffer Enabled: %RTbool)\n",
1492 pStream->u8SD, u32LPIB, pThis->fDMAPosition));
1493
1494 /* Update LPIB in any case. */
1495 HDA_STREAM_REG(pThis, LPIB, pStream->u8SD) = u32LPIB;
1496
1497 /* Do we need to tell the current DMA position? */
1498 if (pThis->fDMAPosition)
1499 {
1500 int rc2 = PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns),
1501 pThis->u64DPBase + (pStream->u8SD * 2 * sizeof(uint32_t)),
1502 (void *)&u32LPIB, sizeof(uint32_t));
1503 AssertRC(rc2);
1504 }
1505
1506 return u32LPIB;
1507}
1508
1509# ifdef HDA_USE_DMA_ACCESS_HANDLER
1510/**
1511 * Registers access handlers for a stream's BDLE DMA accesses.
1512 *
1513 * @returns true if registration was successful, false if not.
1514 * @param pStream HDA stream to register BDLE access handlers for.
1515 */
1516bool hdaR3StreamRegisterDMAHandlers(PHDASTREAM pStream)
1517{
1518 /* At least LVI and the BDL base must be set. */
1519 if ( !pStream->u16LVI
1520 || !pStream->u64BDLBase)
1521 {
1522 return false;
1523 }
1524
1525 hdaR3StreamUnregisterDMAHandlers(pStream);
1526
1527 LogFunc(("Registering ...\n"));
1528
1529 int rc = VINF_SUCCESS;
1530
1531 /*
1532 * Create BDLE ranges.
1533 */
1534
1535 struct BDLERANGE
1536 {
1537 RTGCPHYS uAddr;
1538 uint32_t uSize;
1539 } arrRanges[16]; /** @todo Use a define. */
1540
1541 size_t cRanges = 0;
1542
1543 for (uint16_t i = 0; i < pStream->u16LVI + 1; i++)
1544 {
1545 HDABDLE BDLE;
1546 rc = hdaR3BDLEFetch(pThis, &BDLE, pStream->u64BDLBase, i /* Index */);
1547 if (RT_FAILURE(rc))
1548 break;
1549
1550 bool fAddRange = true;
1551 BDLERANGE *pRange;
1552
1553 if (cRanges)
1554 {
1555 pRange = &arrRanges[cRanges - 1];
1556
1557 /* Is the current range a direct neighbor of the current BLDE? */
1558 if ((pRange->uAddr + pRange->uSize) == BDLE.Desc.u64BufAdr)
1559 {
1560 /* Expand the current range by the current BDLE's size. */
1561 pRange->uSize += BDLE.Desc.u32BufSize;
1562
1563 /* Adding a new range in this case is not needed anymore. */
1564 fAddRange = false;
1565
1566 LogFunc(("Expanding range %zu by %RU32 (%RU32 total now)\n", cRanges - 1, BDLE.Desc.u32BufSize, pRange->uSize));
1567 }
1568 }
1569
1570 /* Do we need to add a new range? */
1571 if ( fAddRange
1572 && cRanges < RT_ELEMENTS(arrRanges))
1573 {
1574 pRange = &arrRanges[cRanges];
1575
1576 pRange->uAddr = BDLE.Desc.u64BufAdr;
1577 pRange->uSize = BDLE.Desc.u32BufSize;
1578
1579 LogFunc(("Adding range %zu - 0x%x (%RU32)\n", cRanges, pRange->uAddr, pRange->uSize));
1580
1581 cRanges++;
1582 }
1583 }
1584
1585 LogFunc(("%zu ranges total\n", cRanges));
1586
1587 /*
1588 * Register all ranges as DMA access handlers.
1589 */
1590
1591 for (size_t i = 0; i < cRanges; i++)
1592 {
1593 BDLERANGE *pRange = &arrRanges[i];
1594
1595 PHDADMAACCESSHANDLER pHandler = (PHDADMAACCESSHANDLER)RTMemAllocZ(sizeof(HDADMAACCESSHANDLER));
1596 if (!pHandler)
1597 {
1598 rc = VERR_NO_MEMORY;
1599 break;
1600 }
1601
1602 RTListAppend(&pStream->State.lstDMAHandlers, &pHandler->Node);
1603
1604 pHandler->pStream = pStream; /* Save a back reference to the owner. */
1605
1606 char szDesc[32];
1607 RTStrPrintf(szDesc, sizeof(szDesc), "HDA[SD%RU8 - RANGE%02zu]", pStream->u8SD, i);
1608
1609 int rc2 = PGMR3HandlerPhysicalTypeRegister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3), PGMPHYSHANDLERKIND_WRITE,
1610 hdaDMAAccessHandler,
1611 NULL, NULL, NULL,
1612 NULL, NULL, NULL,
1613 szDesc, &pHandler->hAccessHandlerType);
1614 AssertRCBreak(rc2);
1615
1616 pHandler->BDLEAddr = pRange->uAddr;
1617 pHandler->BDLESize = pRange->uSize;
1618
1619 /* Get first and last pages of the BDLE range. */
1620 RTGCPHYS pgFirst = pRange->uAddr & ~PAGE_OFFSET_MASK;
1621 RTGCPHYS pgLast = RT_ALIGN(pgFirst + pRange->uSize, PAGE_SIZE);
1622
1623 /* Calculate the region size (in pages). */
1624 RTGCPHYS regionSize = RT_ALIGN(pgLast - pgFirst, PAGE_SIZE);
1625
1626 pHandler->GCPhysFirst = pgFirst;
1627 pHandler->GCPhysLast = pHandler->GCPhysFirst + (regionSize - 1);
1628
1629 LogFunc(("\tRegistering region '%s': 0x%x - 0x%x (region size: %zu)\n",
1630 szDesc, pHandler->GCPhysFirst, pHandler->GCPhysLast, regionSize));
1631 LogFunc(("\tBDLE @ 0x%x - 0x%x (%RU32)\n",
1632 pHandler->BDLEAddr, pHandler->BDLEAddr + pHandler->BDLESize, pHandler->BDLESize));
1633
1634 rc2 = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3),
1635 pHandler->GCPhysFirst, pHandler->GCPhysLast,
1636 pHandler->hAccessHandlerType, pHandler, NIL_RTR0PTR, NIL_RTRCPTR,
1637 szDesc);
1638 AssertRCBreak(rc2);
1639
1640 pHandler->fRegistered = true;
1641 }
1642
1643 LogFunc(("Registration ended with rc=%Rrc\n", rc));
1644
1645 return RT_SUCCESS(rc);
1646}
1647
1648/**
1649 * Unregisters access handlers of a stream's BDLEs.
1650 *
1651 * @param pStream HDA stream to unregister BDLE access handlers for.
1652 */
1653void hdaR3StreamUnregisterDMAHandlers(PHDASTREAM pStream)
1654{
1655 LogFunc(("\n"));
1656
1657 PHDADMAACCESSHANDLER pHandler, pHandlerNext;
1658 RTListForEachSafe(&pStream->State.lstDMAHandlers, pHandler, pHandlerNext, HDADMAACCESSHANDLER, Node)
1659 {
1660 if (!pHandler->fRegistered) /* Handler not registered? Skip. */
1661 continue;
1662
1663 LogFunc(("Unregistering 0x%x - 0x%x (%zu)\n",
1664 pHandler->GCPhysFirst, pHandler->GCPhysLast, pHandler->GCPhysLast - pHandler->GCPhysFirst));
1665
1666 int rc2 = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pStream->pHDAState->pDevInsR3),
1667 pHandler->GCPhysFirst);
1668 AssertRC(rc2);
1669
1670 RTListNodeRemove(&pHandler->Node);
1671
1672 RTMemFree(pHandler);
1673 pHandler = NULL;
1674 }
1675
1676 Assert(RTListIsEmpty(&pStream->State.lstDMAHandlers));
1677}
1678# endif /* HDA_USE_DMA_ACCESS_HANDLER */
1679
1680# ifdef VBOX_WITH_AUDIO_HDA_ASYNC_IO
1681/**
1682 * Asynchronous I/O thread for a HDA stream.
1683 * This will do the heavy lifting work for us as soon as it's getting notified by another thread.
1684 *
1685 * @returns IPRT status code.
1686 * @param hThreadSelf Thread handle.
1687 * @param pvUser User argument. Must be of type PHDASTREAMTHREADCTX.
1688 */
1689DECLCALLBACK(int) hdaR3StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser)
1690{
1691 PHDASTREAMTHREADCTX pCtx = (PHDASTREAMTHREADCTX)pvUser;
1692 AssertPtr(pCtx);
1693
1694 PHDASTREAM pStream = pCtx->pStream;
1695 AssertPtr(pStream);
1696
1697 PHDASTREAMSTATEAIO pAIO = &pCtx->pStream->State.AIO;
1698
1699 ASMAtomicXchgBool(&pAIO->fStarted, true);
1700
1701 RTThreadUserSignal(hThreadSelf);
1702
1703 LogFunc(("[SD%RU8]: Started\n", pStream->u8SD));
1704
1705 for (;;)
1706 {
1707 int rc2 = RTSemEventWait(pAIO->Event, RT_INDEFINITE_WAIT);
1708 if (RT_FAILURE(rc2))
1709 break;
1710
1711 if (ASMAtomicReadBool(&pAIO->fShutdown))
1712 break;
1713
1714 rc2 = RTCritSectEnter(&pAIO->CritSect);
1715 if (RT_SUCCESS(rc2))
1716 {
1717 if (!pAIO->fEnabled)
1718 {
1719 RTCritSectLeave(&pAIO->CritSect);
1720 continue;
1721 }
1722
1723 hdaR3StreamUpdate(pStream, false /* fInTimer */);
1724
1725 int rc3 = RTCritSectLeave(&pAIO->CritSect);
1726 AssertRC(rc3);
1727 }
1728
1729 AssertRC(rc2);
1730 }
1731
1732 LogFunc(("[SD%RU8]: Ended\n", pStream->u8SD));
1733
1734 ASMAtomicXchgBool(&pAIO->fStarted, false);
1735
1736 return VINF_SUCCESS;
1737}
1738
1739/**
1740 * Creates the async I/O thread for a specific HDA audio stream.
1741 *
1742 * @returns IPRT status code.
1743 * @param pStream HDA audio stream to create the async I/O thread for.
1744 */
1745int hdaR3StreamAsyncIOCreate(PHDASTREAM pStream)
1746{
1747 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1748
1749 int rc;
1750
1751 if (!ASMAtomicReadBool(&pAIO->fStarted))
1752 {
1753 pAIO->fShutdown = false;
1754
1755 rc = RTSemEventCreate(&pAIO->Event);
1756 if (RT_SUCCESS(rc))
1757 {
1758 rc = RTCritSectInit(&pAIO->CritSect);
1759 if (RT_SUCCESS(rc))
1760 {
1761 HDASTREAMTHREADCTX Ctx = { pStream->pHDAState, pStream };
1762
1763 char szThreadName[64];
1764 RTStrPrintf2(szThreadName, sizeof(szThreadName), "hdaAIO%RU8", pStream->u8SD);
1765
1766 rc = RTThreadCreate(&pAIO->Thread, hdaR3StreamAsyncIOThread, &Ctx,
1767 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, szThreadName);
1768 if (RT_SUCCESS(rc))
1769 rc = RTThreadUserWait(pAIO->Thread, 10 * 1000 /* 10s timeout */);
1770 }
1771 }
1772 }
1773 else
1774 rc = VINF_SUCCESS;
1775
1776 LogFunc(("[SD%RU8]: Returning %Rrc\n", pStream->u8SD, rc));
1777 return rc;
1778}
1779
1780/**
1781 * Destroys the async I/O thread of a specific HDA audio stream.
1782 *
1783 * @returns IPRT status code.
1784 * @param pStream HDA audio stream to destroy the async I/O thread for.
1785 */
1786int hdaR3StreamAsyncIODestroy(PHDASTREAM pStream)
1787{
1788 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1789
1790 if (!ASMAtomicReadBool(&pAIO->fStarted))
1791 return VINF_SUCCESS;
1792
1793 ASMAtomicWriteBool(&pAIO->fShutdown, true);
1794
1795 int rc = hdaR3StreamAsyncIONotify(pStream);
1796 AssertRC(rc);
1797
1798 int rcThread;
1799 rc = RTThreadWait(pAIO->Thread, 30 * 1000 /* 30s timeout */, &rcThread);
1800 LogFunc(("Async I/O thread ended with %Rrc (%Rrc)\n", rc, rcThread));
1801
1802 if (RT_SUCCESS(rc))
1803 {
1804 rc = RTCritSectDelete(&pAIO->CritSect);
1805 AssertRC(rc);
1806
1807 rc = RTSemEventDestroy(pAIO->Event);
1808 AssertRC(rc);
1809
1810 pAIO->fStarted = false;
1811 pAIO->fShutdown = false;
1812 pAIO->fEnabled = false;
1813 }
1814
1815 LogFunc(("[SD%RU8]: Returning %Rrc\n", pStream->u8SD, rc));
1816 return rc;
1817}
1818
1819/**
1820 * Lets the stream's async I/O thread know that there is some data to process.
1821 *
1822 * @returns IPRT status code.
1823 * @param pStream HDA stream to notify async I/O thread for.
1824 */
1825int hdaR3StreamAsyncIONotify(PHDASTREAM pStream)
1826{
1827 return RTSemEventSignal(pStream->State.AIO.Event);
1828}
1829
1830/**
1831 * Locks the async I/O thread of a specific HDA audio stream.
1832 *
1833 * @param pStream HDA stream to lock async I/O thread for.
1834 */
1835void hdaR3StreamAsyncIOLock(PHDASTREAM pStream)
1836{
1837 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1838
1839 if (!ASMAtomicReadBool(&pAIO->fStarted))
1840 return;
1841
1842 int rc2 = RTCritSectEnter(&pAIO->CritSect);
1843 AssertRC(rc2);
1844}
1845
1846/**
1847 * Unlocks the async I/O thread of a specific HDA audio stream.
1848 *
1849 * @param pStream HDA stream to unlock async I/O thread for.
1850 */
1851void hdaR3StreamAsyncIOUnlock(PHDASTREAM pStream)
1852{
1853 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1854
1855 if (!ASMAtomicReadBool(&pAIO->fStarted))
1856 return;
1857
1858 int rc2 = RTCritSectLeave(&pAIO->CritSect);
1859 AssertRC(rc2);
1860}
1861
1862/**
1863 * Enables (resumes) or disables (pauses) the async I/O thread.
1864 *
1865 * @param pStream HDA stream to enable/disable async I/O thread for.
1866 * @param fEnable Whether to enable or disable the I/O thread.
1867 *
1868 * @remarks Does not do locking.
1869 */
1870void hdaR3StreamAsyncIOEnable(PHDASTREAM pStream, bool fEnable)
1871{
1872 PHDASTREAMSTATEAIO pAIO = &pStream->State.AIO;
1873 ASMAtomicXchgBool(&pAIO->fEnabled, fEnable);
1874}
1875# endif /* VBOX_WITH_AUDIO_HDA_ASYNC_IO */
1876
1877#endif /* IN_RING3 */
1878
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