DevIchAc97.cpp@ 68904

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1	/* $Id: DevIchAc97.cpp 68904 2017-09-28 10:00:04Z vboxsync $ */
2	/** @file
3	* DevIchAc97 - VBox ICH AC97 Audio Controller.
4	*/
5
6	/*
7	* Copyright (C) 2006-2017 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_AC97
23	#include <VBox/log.h>
24	#include <VBox/vmm/pdmdev.h>
25	#include <VBox/vmm/pdmaudioifs.h>
26
27	#include <iprt/assert.h>
28	#ifdef IN_RING3
29	# ifdef DEBUG
30	# include <iprt/file.h>
31	# endif
32	# include <iprt/mem.h>
33	# include <iprt/semaphore.h>
34	# include <iprt/string.h>
35	# include <iprt/uuid.h>
36	#endif
37
38	#include "VBoxDD.h"
39
40	#include "AudioMixBuffer.h"
41	#include "AudioMixer.h"
42	#include "DrvAudio.h"
43
44
45	/*********************************************************************************************************************************
46	* Defined Constants And Macros *
47	*********************************************************************************************************************************/
48
49	/** Current saved state version. */
50	#define AC97_SSM_VERSION 1
51
52	/** Default timer frequency (in Hz). */
53	#define AC97_TIMER_HZ 200
54
55	/** Maximum FIFO size (in bytes). */
56	#define AC97_FIFO_MAX 256
57
58	#define AC97_SR_FIFOE RT_BIT(4) /* rwc, FIFO error. */
59	#define AC97_SR_BCIS RT_BIT(3) /* rwc, Buffer completion interrupt status. */
60	#define AC97_SR_LVBCI RT_BIT(2) /* rwc, Last valid buffer completion interrupt. */
61	#define AC97_SR_CELV RT_BIT(1) /* ro, Current equals last valid. */
62	#define AC97_SR_DCH RT_BIT(0) /* ro, Controller halted. */
63	#define AC97_SR_VALID_MASK (RT_BIT(5) - 1)
64	#define AC97_SR_WCLEAR_MASK (AC97_SR_FIFOE \| AC97_SR_BCIS \| AC97_SR_LVBCI)
65	#define AC97_SR_RO_MASK (AC97_SR_DCH \| AC97_SR_CELV)
66	#define AC97_SR_INT_MASK (AC97_SR_FIFOE \| AC97_SR_BCIS \| AC97_SR_LVBCI)
67
68	#define AC97_CR_IOCE RT_BIT(4) /* rw, Interrupt On Completion Enable. */
69	#define AC97_CR_FEIE RT_BIT(3) /* rw FIFO Error Interrupt Enable. */
70	#define AC97_CR_LVBIE RT_BIT(2) /* rw Last Valid Buffer Interrupt Enable. */
71	#define AC97_CR_RR RT_BIT(1) /* rw Reset Registers. */
72	#define AC97_CR_RPBM RT_BIT(0) /* rw Run/Pause Bus Master. */
73	#define AC97_CR_VALID_MASK (RT_BIT(5) - 1)
74	#define AC97_CR_DONT_CLEAR_MASK (AC97_CR_IOCE \| AC97_CR_FEIE \| AC97_CR_LVBIE)
75
76	#define AC97_GC_WR 4 /* rw Warm reset. */
77	#define AC97_GC_CR 2 /* rw Cold reset. */
78	#define AC97_GC_VALID_MASK (RT_BIT(6) - 1)
79
80	#define AC97_GS_MD3 RT_BIT(17) /* rw */
81	#define AC97_GS_AD3 RT_BIT(16) /* rw */
82	#define AC97_GS_RCS RT_BIT(15) /* rwc */
83	#define AC97_GS_B3S12 RT_BIT(14) /* ro */
84	#define AC97_GS_B2S12 RT_BIT(13) /* ro */
85	#define AC97_GS_B1S12 RT_BIT(12) /* ro */
86	#define AC97_GS_S1R1 RT_BIT(11) /* rwc */
87	#define AC97_GS_S0R1 RT_BIT(10) /* rwc */
88	#define AC97_GS_S1CR RT_BIT(9) /* ro */
89	#define AC97_GS_S0CR RT_BIT(8) /* ro */
90	#define AC97_GS_MINT RT_BIT(7) /* ro */
91	#define AC97_GS_POINT RT_BIT(6) /* ro */
92	#define AC97_GS_PIINT RT_BIT(5) /* ro */
93	#define AC97_GS_RSRVD (RT_BIT(4)\|RT_BIT(3))
94	#define AC97_GS_MOINT RT_BIT(2) /* ro */
95	#define AC97_GS_MIINT RT_BIT(1) /* ro */
96	#define AC97_GS_GSCI RT_BIT(0) /* rwc */
97	#define AC97_GS_RO_MASK (AC97_GS_B3S12 \| \
98	AC97_GS_B2S12 \| \
99	AC97_GS_B1S12 \| \
100	AC97_GS_S1CR \| \
101	AC97_GS_S0CR \| \
102	AC97_GS_MINT \| \
103	AC97_GS_POINT \| \
104	AC97_GS_PIINT \| \
105	AC97_GS_RSRVD \| \
106	AC97_GS_MOINT \| \
107	AC97_GS_MIINT)
108	#define AC97_GS_VALID_MASK (RT_BIT(18) - 1)
109	#define AC97_GS_WCLEAR_MASK (AC97_GS_RCS\|AC97_GS_S1R1\|AC97_GS_S0R1\|AC97_GS_GSCI)
110
111	/** @name Buffer Descriptor (BD).
112	* @{ */
113	#define AC97_BD_IOC RT_BIT(31) /*< Interrupt on Completion. /
114	#define AC97_BD_BUP RT_BIT(30) /*< Buffer Underrun Policy. /
115
116	#define AC97_BD_LEN_MASK 0xFFFF /*< Mask for the BDL buffer length. /
117
118	#define AC97_MAX_BDLE 32 /*< Maximum number of BDLEs. /
119	/** @} */
120
121	/** @name Extended Audio Status and Control Register (EACS).
122	* @{ */
123	#define AC97_EACS_VRA 1 /*< Variable Rate Audio (4.2.1.1). /
124	#define AC97_EACS_VRM 8 /*< Variable Rate Mic Audio (4.2.1.1). /
125	/** @} */
126
127	/** @name Baseline Audio Register Set (BARS).
128	* @{ */
129	#define AC97_BARS_VOL_MASK 0x1f /*< Volume mask for the Baseline Audio Register Set (5.7.2). /
130	#define AC97_BARS_VOL_STEPS 31 /*< Volume steps for the Baseline Audio Register Set (5.7.2). /
131	#define AC97_BARS_VOL_MUTE_SHIFT 15 /*< Mute bit shift for the Baseline Audio Register Set (5.7.2). /
132	/** @} */
133
134	/* AC'97 uses 1.5dB steps, we use 0.375dB steps: 1 AC'97 step equals 4 PDM steps. */
135	#define AC97_DB_FACTOR 4
136
137	#define AC97_REC_MASK 7
138	enum
139	{
140	AC97_REC_MIC = 0,
141	AC97_REC_CD,
142	AC97_REC_VIDEO,
143	AC97_REC_AUX,
144	AC97_REC_LINE_IN,
145	AC97_REC_STEREO_MIX,
146	AC97_REC_MONO_MIX,
147	AC97_REC_PHONE
148	};
149
150	enum
151	{
152	AC97_Reset = 0x00,
153	AC97_Master_Volume_Mute = 0x02,
154	AC97_Headphone_Volume_Mute = 0x04, /** Also known as AUX, see table 16, section 5.7. */
155	AC97_Master_Volume_Mono_Mute = 0x06,
156	AC97_Master_Tone_RL = 0x08,
157	AC97_PC_BEEP_Volume_Mute = 0x0A,
158	AC97_Phone_Volume_Mute = 0x0C,
159	AC97_Mic_Volume_Mute = 0x0E,
160	AC97_Line_In_Volume_Mute = 0x10,
161	AC97_CD_Volume_Mute = 0x12,
162	AC97_Video_Volume_Mute = 0x14,
163	AC97_Aux_Volume_Mute = 0x16,
164	AC97_PCM_Out_Volume_Mute = 0x18,
165	AC97_Record_Select = 0x1A,
166	AC97_Record_Gain_Mute = 0x1C,
167	AC97_Record_Gain_Mic_Mute = 0x1E,
168	AC97_General_Purpose = 0x20,
169	AC97_3D_Control = 0x22,
170	AC97_AC_97_RESERVED = 0x24,
171	AC97_Powerdown_Ctrl_Stat = 0x26,
172	AC97_Extended_Audio_ID = 0x28,
173	AC97_Extended_Audio_Ctrl_Stat = 0x2A,
174	AC97_PCM_Front_DAC_Rate = 0x2C,
175	AC97_PCM_Surround_DAC_Rate = 0x2E,
176	AC97_PCM_LFE_DAC_Rate = 0x30,
177	AC97_PCM_LR_ADC_Rate = 0x32,
178	AC97_MIC_ADC_Rate = 0x34,
179	AC97_6Ch_Vol_C_LFE_Mute = 0x36,
180	AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
181	AC97_Vendor_Reserved = 0x58,
182	AC97_AD_Misc = 0x76,
183	AC97_Vendor_ID1 = 0x7c,
184	AC97_Vendor_ID2 = 0x7e
185	};
186
187	/* Codec models. */
188	typedef enum
189	{
190	AC97_CODEC_STAC9700 = 0, /* SigmaTel STAC9700 */
191	AC97_CODEC_AD1980, /* Analog Devices AD1980 */
192	AC97_CODEC_AD1981B /* Analog Devices AD1981B */
193	} AC97CODEC;
194
195	/* Analog Devices miscellaneous regiter bits used in AD1980. */
196	#define AC97_AD_MISC_LOSEL RT_BIT(5) /* Surround (rear) goes to line out outputs. */
197	#define AC97_AD_MISC_HPSEL RT_BIT(10) /* PCM (front) goes to headphone outputs. */
198
199	#define ICHAC97STATE_2_DEVINS(a_pAC97) ((a_pAC97)->pDevInsR3)
200
201	enum
202	{
203	BUP_SET = RT_BIT(0),
204	BUP_LAST = RT_BIT(1)
205	};
206
207	/** Emits registers for a specific (Native Audio Bus Master BAR) NABMBAR. */
208	#define AC97_NABMBAR_REGS(prefix, off) \
209	enum { \
210	prefix ## _BDBAR = off, /* Buffer Descriptor Base Address */ \
211	prefix ## _CIV = off + 4, /* Current Index Value */ \
212	prefix ## _LVI = off + 5, /* Last Valid Index */ \
213	prefix ## _SR = off + 6, /* Status Register */ \
214	prefix ## _PICB = off + 8, /* Position in Current Buffer */ \
215	prefix ## _PIV = off + 10, /* Prefetched Index Value */ \
216	prefix ## _CR = off + 11 /* Control Register */ \
217	}
218
219	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
220	typedef enum
221	{
222	AC97SOUNDSOURCE_PI_INDEX = 0, /** PCM in */
223	AC97SOUNDSOURCE_PO_INDEX, /** PCM out */
224	AC97SOUNDSOURCE_MC_INDEX, /** Mic in */
225	AC97SOUNDSOURCE_LAST_INDEX
226	} AC97SOUNDSOURCE;
227
228	AC97_NABMBAR_REGS(PI, AC97SOUNDSOURCE_PI_INDEX * 16);
229	AC97_NABMBAR_REGS(PO, AC97SOUNDSOURCE_PO_INDEX * 16);
230	AC97_NABMBAR_REGS(MC, AC97SOUNDSOURCE_MC_INDEX * 16);
231	#endif
232
233	enum
234	{
235	/** NABMBAR: Global Control Register. */
236	AC97_GLOB_CNT = 0x2c,
237	/** NABMBAR Global Status. */
238	AC97_GLOB_STA = 0x30,
239	/** Codec Access Semaphore Register. */
240	AC97_CAS = 0x34
241	};
242
243	#define AC97_PORT2IDX(a_idx) ( ((a_idx) >> 4) & 3 )
244
245
246	/*********************************************************************************************************************************
247	* Structures and Typedefs *
248	*********************************************************************************************************************************/
249
250	/**
251	* Buffer Descriptor List Entry (BDLE).
252	*/
253	typedef struct AC97BDLE
254	{
255	uint32_t addr;
256	uint32_t ctl_len;
257	} AC97BDLE, *PAC97BDLE;
258
259	/**
260	* Bus master register set for an audio stream.
261	*/
262	typedef struct AC97BMREGS
263	{
264	uint32_t bdbar; /** rw 0, Buffer Descriptor List: BAR (Base Address Register). */
265	uint8_t civ; /** ro 0, Current index value. */
266	uint8_t lvi; /** rw 0, Last valid index. */
267	uint16_t sr; /** rw 1, Status register. */
268	uint16_t picb; /** ro 0, Position in current buffer (in samples). */
269	uint8_t piv; /** ro 0, Prefetched index value. */
270	uint8_t cr; /** rw 0, Control register. */
271	int bd_valid; /** Whether current BDLE is initialized or not. */
272	AC97BDLE bd; /** Current Buffer Descriptor List Entry (BDLE). */
273	} AC97BMREGS, *PAC97BMREGS;
274
275	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
276	/**
277	* Structure keeping the AC'97 stream's state for asynchronous I/O.
278	*/
279	typedef struct AC97STREAMSTATEAIO
280	{
281	/** Thread handle for the actual I/O thread. */
282	RTTHREAD Thread;
283	/** Event for letting the thread know there is some data to process. */
284	RTSEMEVENT Event;
285	/** Critical section for synchronizing access. */
286	RTCRITSECT CritSect;
287	/** Started indicator. */
288	volatile bool fStarted;
289	/** Shutdown indicator. */
290	volatile bool fShutdown;
291	/** Whether the thread should do any data processing or not. */
292	volatile bool fEnabled;
293	uint32_t Padding1;
294	} AC97STREAMSTATEAIO, *PAC97STREAMSTATEAIO;
295	#endif
296
297	/**
298	* Structure for keeping the internal state of an AC'97 stream.
299	*/
300	typedef struct AC97STREAMSTATE
301	{
302	/** Circular buffer (FIFO) for holding DMA'ed data. */
303	R3PTRTYPE(PRTCIRCBUF) pCircBuf;
304	/** Criticial section for this stream. */
305	RTCRITSECT CritSect;
306	/** The stream's current configuration. */
307	PDMAUDIOSTREAMCFG Cfg;
308	uint32_t Padding;
309	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
310	/** Asynchronous I/O state members. */
311	AC97STREAMSTATEAIO AIO;
312	#endif
313	} AC97STREAMSTATE, *PAC97STREAMSTATE;
314
315	/**
316	* Structure for an AC'97 stream.
317	*/
318	typedef struct AC97STREAM
319	{
320	/** Stream number (SDn). */
321	uint8_t u8SD;
322	/** Bus master registers of this stream. */
323	AC97BMREGS Regs;
324	/** Internal state of this stream. */
325	AC97STREAMSTATE State;
326	} AC97STREAM, *PAC97STREAM;
327
328	typedef struct AC97STATE *PAC97STATE;
329	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
330	/**
331	* Structure for the async I/O thread context.
332	*/
333	typedef struct AC97STREAMTHREADCTX
334	{
335	PAC97STATE pThis;
336	PAC97STREAM pStream;
337	} AC97STREAMTHREADCTX, *PAC97STREAMTHREADCTX;
338	#endif
339
340	/**
341	* Structure defining a (host backend) driver stream.
342	* Each driver has its own instances of audio mixer streams, which then
343	* can go into the same (or even different) audio mixer sinks.
344	*/
345	typedef struct AC97DRIVERSTREAM
346	{
347	union
348	{
349	/** Desired playback destination (for an output stream). */
350	PDMAUDIOPLAYBACKDEST Dest;
351	/** Desired recording source (for an input stream). */
352	PDMAUDIORECSOURCE Source;
353	} DestSource;
354	uint8_t Padding1[4];
355	/** Associated mixer stream handle. */
356	R3PTRTYPE(PAUDMIXSTREAM) pMixStrm;
357	} AC97DRIVERSTREAM, *PAC97DRIVERSTREAM;
358
359	/**
360	* Struct for maintaining a host backend driver.
361	*/
362	typedef struct AC97DRIVER
363	{
364	/** Node for storing this driver in our device driver list of AC97STATE. */
365	RTLISTNODER3 Node;
366	/** Pointer to AC97 controller (state). */
367	R3PTRTYPE(PAC97STATE) pAC97State;
368	/** Driver flags. */
369	PDMAUDIODRVFLAGS fFlags;
370	uint32_t PaddingFlags;
371	/** LUN # to which this driver has been assigned. */
372	uint8_t uLUN;
373	/** Whether this driver is in an attached state or not. */
374	bool fAttached;
375	uint8_t Padding[4];
376	/** Pointer to attached driver base interface. */
377	R3PTRTYPE(PPDMIBASE) pDrvBase;
378	/** Audio connector interface to the underlying host backend. */
379	R3PTRTYPE(PPDMIAUDIOCONNECTOR) pConnector;
380	/** Driver stream for line input. */
381	AC97DRIVERSTREAM LineIn;
382	/** Driver stream for mic input. */
383	AC97DRIVERSTREAM MicIn;
384	/** Driver stream for output. */
385	AC97DRIVERSTREAM Out;
386	} AC97DRIVER, *PAC97DRIVER;
387
388	/**
389	* Structure for maintaining an AC'97 device state.
390	*/
391	typedef struct AC97STATE
392	{
393	/** The PCI device state. */
394	PDMPCIDEV PciDev;
395	/** R3 Pointer to the device instance. */
396	PPDMDEVINSR3 pDevInsR3;
397	/** Critical section protecting the AC'97 state. */
398	PDMCRITSECT CritSect;
399	/** Global Control (Bus Master Control Register). */
400	uint32_t glob_cnt;
401	/** Global Status (Bus Master Control Register). */
402	uint32_t glob_sta;
403	/** Codec Access Semaphore Register (Bus Master Control Register). */
404	uint32_t cas;
405	uint32_t last_samp;
406	uint8_t mixer_data[256];
407	/** AC'97 stream for line-in. */
408	AC97STREAM StreamLineIn;
409	/** AC'97 stream for microphone-in. */
410	AC97STREAM StreamMicIn;
411	/** AC'97 stream for output. */
412	AC97STREAM StreamOut;
413	/** Number of active (running) SDn streams. */
414	uint8_t cStreamsActive;
415	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
416	/** The timer for pumping data thru the attached LUN drivers. */
417	PTMTIMERR3 pTimer;
418	# if HC_ARCH_BITS == 32
419	uint32_t Padding0;
420	# endif
421	/** Flag indicating whether the timer is active or not. */
422	bool fTimerActive;
423	uint8_t u8Padding1[7];
424	/** The timer interval for pumping data thru the LUN drivers in timer ticks. */
425	uint64_t cTimerTicks;
426	/** Timestamp of the last timer callback (ac97Timer).
427	* Used to calculate the time actually elapsed between two timer callbacks. */
428	uint64_t uTimerTS;
429	#endif
430	#ifdef VBOX_WITH_STATISTICS
431	STAMPROFILE StatTimer;
432	STAMPROFILE StatIn;
433	STAMPROFILE StatOut;
434	STAMCOUNTER StatBytesRead;
435	STAMCOUNTER StatBytesWritten;
436	#endif
437	/** List of associated LUN drivers (AC97DRIVER). */
438	RTLISTANCHOR lstDrv;
439	/** The device's software mixer. */
440	R3PTRTYPE(PAUDIOMIXER) pMixer;
441	/** Audio sink for PCM output. */
442	R3PTRTYPE(PAUDMIXSINK) pSinkOut;
443	/** Audio sink for line input. */
444	R3PTRTYPE(PAUDMIXSINK) pSinkLineIn;
445	/** Audio sink for microphone input. */
446	R3PTRTYPE(PAUDMIXSINK) pSinkMicIn;
447	uint8_t silence[128];
448	int bup_flag;
449	/** The base interface for LUN\#0. */
450	PDMIBASE IBase;
451	/** Base port of the I/O space region. */
452	RTIOPORT IOPortBase[2];
453	/** Codec model. */
454	uint32_t uCodecModel;
455	} AC97STATE, *PAC97STATE;
456
457	/**
458	* Acquires the AC'97 lock.
459	*/
460	#define DEVAC97_LOCK(a_pThis) \
461	do { \
462	int rcLock = PDMCritSectEnter(&(a_pThis)->CritSect, VERR_IGNORED); \
463	AssertRC(rcLock); \
464	} while (0)
465
466	/**
467	* Acquires the AC'97 lock or returns.
468	*/
469	# define DEVAC97_LOCK_RETURN(a_pThis, a_rcBusy) \
470	do { \
471	int rcLock = PDMCritSectEnter(&(a_pThis)->CritSect, a_rcBusy); \
472	if (rcLock != VINF_SUCCESS) \
473	{ \
474	AssertRC(rcLock); \
475	return rcLock; \
476	} \
477	} while (0)
478
479	/**
480	* Acquires the AC'97 lock or returns.
481	*/
482	# define DEVAC97_LOCK_RETURN_VOID(a_pThis) \
483	do { \
484	int rcLock = PDMCritSectEnter(&(a_pThis)->CritSect, VERR_IGNORED); \
485	if (rcLock != VINF_SUCCESS) \
486	{ \
487	AssertRC(rcLock); \
488	return; \
489	} \
490	} while (0)
491
492	/**
493	* Releases the AC'97 lock.
494	*/
495	#define DEVAC97_UNLOCK(a_pThis) \
496	do { PDMCritSectLeave(&(a_pThis)->CritSect); } while (0)
497
498	/**
499	* Acquires the TM lock and AC'97 lock, returns on failure.
500	*/
501	#define DEVAC97_LOCK_BOTH_RETURN_VOID(a_pThis) \
502	do { \
503	int rcLock = TMTimerLock((a_pThis)->pTimer, VERR_IGNORED); \
504	if (rcLock != VINF_SUCCESS) \
505	{ \
506	AssertRC(rcLock); \
507	return; \
508	} \
509	rcLock = PDMCritSectEnter(&(a_pThis)->CritSect, VERR_IGNORED); \
510	if (rcLock != VINF_SUCCESS) \
511	{ \
512	AssertRC(rcLock); \
513	TMTimerUnlock((a_pThis)->pTimer); \
514	return; \
515	} \
516	} while (0)
517
518	/**
519	* Acquires the TM lock and AC'97 lock, returns on failure.
520	*/
521	#define DEVAC97_LOCK_BOTH_RETURN(a_pThis, a_rcBusy) \
522	do { \
523	int rcLock = TMTimerLock((a_pThis)->pTimer, (a_rcBusy)); \
524	if (rcLock != VINF_SUCCESS) \
525	return rcLock; \
526	rcLock = PDMCritSectEnter(&(a_pThis)->CritSect, (a_rcBusy)); \
527	if (rcLock != VINF_SUCCESS) \
528	{ \
529	AssertRC(rcLock); \
530	TMTimerUnlock((a_pThis)->pTimer); \
531	return rcLock; \
532	} \
533	} while (0)
534
535	/**
536	* Releases the AC'97 lock and TM lock.
537	*/
538	#define DEVAC97_UNLOCK_BOTH(a_pThis) \
539	do { \
540	PDMCritSectLeave(&(a_pThis)->CritSect); \
541	TMTimerUnlock((a_pThis)->pTimer); \
542	} while (0)
543
544	#ifdef VBOX_WITH_STATISTICS
545	AssertCompileMemberAlignment(AC97STATE, StatTimer, 8);
546	AssertCompileMemberAlignment(AC97STATE, StatBytesRead, 8);
547	AssertCompileMemberAlignment(AC97STATE, StatBytesWritten, 8);
548	#endif
549
550	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
551
552	DECLINLINE(PAC97STREAM) ichac97GetStreamFromIdx(PAC97STATE pThis, uint32_t uIdx);
553	static int ichac97StreamCreate(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm);
554	static void ichac97StreamDestroy(PAC97STATE pThis, PAC97STREAM pStream);
555	static int ichac97StreamOpen(PAC97STATE pThis, PAC97STREAM pStream);
556	static int ichac97StreamReOpen(PAC97STATE pThis, PAC97STREAM pStream);
557	static int ichac97StreamClose(PAC97STATE pThis, PAC97STREAM pStream);
558	static void ichac97StreamReset(PAC97STATE pThis, PAC97STREAM pStream);
559	static void ichac97StreamLock(PAC97STREAM pStream);
560	static void ichac97StreamUnlock(PAC97STREAM pStream);
561	static uint32_t ichac97StreamGetUsed(PAC97STREAM pStream);
562	static uint32_t ichac97StreamGetFree(PAC97STREAM pStream);
563	static int ichac97StreamTransfer(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax);
564	static void ichac97StreamUpdate(PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer);
565
566	static DECLCALLBACK(void) ichac97Reset(PPDMDEVINS pDevIns);
567	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
568	static int ichac97TimerStart(PAC97STATE pThis);
569	static int ichac97TimerMaybeStart(PAC97STATE pThis);
570	static int ichac97TimerStop(PAC97STATE pThis);
571	static int ichac97TimerMaybeStop(PAC97STATE pThis);
572	static void ichac97TimerMain(PAC97STATE pThis);
573	static DECLCALLBACK(void) ichac97Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser);
574	#endif
575	static void ichac97DoTransfers(PAC97STATE pThis);
576
577	static int ichac97MixerAddDrvStream(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg, PAC97DRIVER pDrv);
578	static int ichac97MixerAddDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg);
579	static void ichac97MixerRemoveDrvStream(PAC97STATE pThis, PAUDMIXSINK pMixSink, PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc, PAC97DRIVER pDrv);
580	static void ichac97MixerRemoveDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink, PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc);
581
582	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
583	static DECLCALLBACK(int) ichac97StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser);
584	static int ichac97StreamAsyncIOCreate(PAC97STATE pThis, PAC97STREAM pStream);
585	static int ichac97StreamAsyncIODestroy(PAC97STATE pThis, PAC97STREAM pStream);
586	static int ichac97StreamAsyncIONotify(PAC97STATE pThis, PAC97STREAM pStream);
587	static void ichac97StreamAsyncIOLock(PAC97STREAM pStream);
588	static void ichac97StreamAsyncIOUnlock(PAC97STREAM pStream);
589	static void ichac97StreamAsyncIOEnable(PAC97STREAM pStream, bool fEnable);
590	#endif
591
592	static void ichac97WarmReset(PAC97STATE pThis)
593	{
594	NOREF(pThis);
595	}
596
597	static void ichac97ColdReset(PAC97STATE pThis)
598	{
599	NOREF(pThis);
600	}
601
602	/**
603	* Retrieves the audio mixer sink of a corresponding AC'97 stream index.
604	*
605	* @returns Pointer to audio mixer sink if found, or NULL if not found / invalid.
606	* @param pThis AC'97 state.
607	* @param uIndex Stream index to get audio mixer sink for.
608	*/
609	DECLINLINE(PAUDMIXSINK) ichac97IndexToSink(PAC97STATE pThis, uint8_t uIndex)
610	{
611	AssertPtrReturn(pThis, NULL);
612
613	switch (uIndex)
614	{
615	case AC97SOUNDSOURCE_PI_INDEX: return pThis->pSinkLineIn; break;
616	case AC97SOUNDSOURCE_PO_INDEX: return pThis->pSinkOut; break;
617	case AC97SOUNDSOURCE_MC_INDEX: return pThis->pSinkMicIn; break;
618	default: break;
619	}
620
621	AssertMsgFailed(("Wrong index %RU8\n", uIndex));
622	return NULL;
623	}
624
625	/**
626	* Fetches the current BDLE (Buffer Descriptor List Entry) of an AC'97 audio stream.
627	*
628	* @returns IPRT status code.
629	* @param pThis AC'97 state.
630	* @param pStream AC'97 stream to fetch BDLE for.
631	*
632	* @remark Uses CIV as BDLE index.
633	*/
634	static void ichac97StreamFetchBDLE(PAC97STATE pThis, PAC97STREAM pStream)
635	{
636	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
637	PAC97BMREGS pRegs = &pStream->Regs;
638
639	uint32_t u32[2];
640
641	PDMDevHlpPhysRead(pDevIns, pRegs->bdbar + pRegs->civ * 8, &u32[0], sizeof(u32));
642	pRegs->bd_valid = 1;
643	#if !defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64)
644	# error Please adapt the code (audio buffers are little endian)!
645	#else
646	pRegs->bd.addr = RT_H2LE_U32(u32[0] & ~3);
647	pRegs->bd.ctl_len = RT_H2LE_U32(u32[1]);
648	#endif
649	pRegs->picb = pRegs->bd.ctl_len & AC97_BD_LEN_MASK;
650	LogFlowFunc(("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
651	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len >> 16,
652	pRegs->bd.ctl_len & AC97_BD_LEN_MASK,
653	(pRegs->bd.ctl_len & AC97_BD_LEN_MASK) << 1)); /** @todo r=andy Assumes 16bit samples. */
654	}
655
656	/**
657	* Updates the status register (SR) of an AC'97 audio stream.
658	*
659	* @param pThis AC'97 state.
660	* @param pStream AC'97 stream to update SR for.
661	* @param new_sr New value for status register (SR).
662	*/
663	static void ichac97StreamUpdateSR(PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr)
664	{
665	PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis);
666	PAC97BMREGS pRegs = &pStream->Regs;
667
668	bool fSignal = false;
669	int iIRQL = 0;
670
671	uint32_t new_mask = new_sr & AC97_SR_INT_MASK;
672	uint32_t old_mask = pRegs->sr & AC97_SR_INT_MASK;
673
674	static uint32_t const masks[] = { AC97_GS_PIINT, AC97_GS_POINT, AC97_GS_MINT };
675
676	if (new_mask ^ old_mask)
677	{
678	/** @todo Is IRQ deasserted when only one of status bits is cleared? */
679	if (!new_mask)
680	{
681	fSignal = true;
682	iIRQL = 0;
683	}
684	else if ((new_mask & AC97_SR_LVBCI) && (pRegs->cr & AC97_CR_LVBIE))
685	{
686	fSignal = true;
687	iIRQL = 1;
688	}
689	else if ((new_mask & AC97_SR_BCIS) && (pRegs->cr & AC97_CR_IOCE))
690	{
691	fSignal = true;
692	iIRQL = 1;
693	}
694	}
695
696	pRegs->sr = new_sr;
697
698	LogFlowFunc(("IOC%d, LVB%d, sr=%#x, fSignal=%RTbool, IRQL=%d\n",
699	pRegs->sr & AC97_SR_BCIS, pRegs->sr & AC97_SR_LVBCI, pRegs->sr, fSignal, iIRQL));
700
701	if (fSignal)
702	{
703	if (iIRQL)
704	pThis->glob_sta \|= masks[pStream->u8SD];
705	else
706	pThis->glob_sta &= ~masks[pStream->u8SD];
707
708	LogFlowFunc(("Setting IRQ level=%d\n", iIRQL));
709	PDMDevHlpPCISetIrq(pDevIns, 0, iIRQL);
710	}
711	}
712
713	/**
714	* Returns whether an AC'97 stream is enabled or not.
715	*
716	* @returns IPRT status code.
717	* @param pThis AC'97 device state.
718	* @param pStream Stream to return status for.
719	*/
720	static bool ichac97StreamIsEnabled(PAC97STATE pThis, PAC97STREAM pStream)
721	{
722	AssertPtrReturn(pThis, false);
723	AssertPtrReturn(pStream, false);
724
725	PAUDMIXSINK pSink = ichac97IndexToSink(pThis, pStream->u8SD);
726	bool fIsEnabled = RT_BOOL(AudioMixerSinkGetStatus(pSink) & AUDMIXSINK_STS_RUNNING);
727
728	LogFunc(("[SD%RU8] fIsEnabled=%RTbool\n", pStream->u8SD, fIsEnabled));
729	return fIsEnabled;
730	}
731
732	/**
733	* Enables or disables an AC'97 audio stream.
734	*
735	* @returns IPRT status code.
736	* @param pThis AC'97 state.
737	* @param pStream AC'97 stream to enable or disable.
738	* @param fEnable Whether to enable or disable the stream.
739	*
740	*/
741	static int ichac97StreamEnable(PAC97STATE pThis, PAC97STREAM pStream, bool fEnable)
742	{
743	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
744	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
745
746	ichac97StreamLock(pStream);
747
748	int rc = VINF_SUCCESS;
749
750	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
751	if (fEnable)
752	rc = ichac97StreamAsyncIOCreate(pThis, pStream);
753	if (RT_SUCCESS(rc))
754	{
755	ichac97StreamAsyncIOLock(pStream);
756	ichac97StreamAsyncIOEnable(pStream, fEnable);
757	}
758	#endif
759
760	if (fEnable)
761	{
762	if (pStream->State.pCircBuf)
763	RTCircBufReset(pStream->State.pCircBuf);
764
765	rc = ichac97StreamOpen(pThis, pStream);
766	}
767	else
768	rc = ichac97StreamClose(pThis, pStream);
769
770	if (RT_SUCCESS(rc))
771	{
772	/* First, enable or disable the stream and the stream's sink, if any. */
773	rc = AudioMixerSinkCtl(ichac97IndexToSink(pThis, pStream->u8SD),
774	fEnable ? AUDMIXSINKCMD_ENABLE : AUDMIXSINKCMD_DISABLE);
775	}
776
777	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
778	ichac97StreamAsyncIOUnlock(pStream);
779	#endif
780
781	/* Make sure to leave the lock before (eventually) starting the timer. */
782	ichac97StreamUnlock(pStream);
783
784	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
785	/* Second, see if we need to start or stop the timer. */
786	if (!fEnable)
787	ichac97TimerMaybeStop(pThis);
788	else
789	ichac97TimerMaybeStart(pThis);
790	#endif
791
792	LogFunc(("[SD%RU8] cStreamsActive=%RU8, fEnable=%RTbool, rc=%Rrc\n", pStream->u8SD, pThis->cStreamsActive, fEnable, rc));
793	return rc;
794	}
795
796	/**
797	* Resets an AC'97 stream.
798	*
799	* @param pThis AC'97 state.
800	* @param pStream AC'97 stream to reset.
801	*
802	*/
803	static void ichac97StreamReset(PAC97STATE pThis, PAC97STREAM pStream)
804	{
805	AssertPtrReturnVoid(pThis);
806	AssertPtrReturnVoid(pStream);
807
808	ichac97StreamLock(pStream);
809
810	LogFunc(("[SD%RU8]\n", pStream->u8SD));
811
812	if (pStream->State.pCircBuf)
813	RTCircBufReset(pStream->State.pCircBuf);
814
815	PAC97BMREGS pRegs = &pStream->Regs;
816
817	pRegs->bdbar = 0;
818	pRegs->civ = 0;
819	pRegs->lvi = 0;
820
821	pRegs->picb = 0;
822	pRegs->piv = 0;
823	pRegs->cr = pRegs->cr & AC97_CR_DONT_CLEAR_MASK;
824	pRegs->bd_valid = 0;
825
826	RT_ZERO(pThis->silence);
827
828	ichac97StreamUnlock(pStream);
829	}
830
831	/**
832	* Creates an AC'97 audio stream.
833	*
834	* @returns IPRT status code.
835	* @param pThis AC'97 state.
836	* @param pStream AC'97 stream to create.
837	* @param u8Strm Stream ID to assign AC'97 stream to.
838	*/
839	static int ichac97StreamCreate(PAC97STATE pThis, PAC97STREAM pStream, uint8_t u8Strm)
840	{
841	RT_NOREF(pThis);
842	AssertPtrReturn(pStream, VERR_INVALID_PARAMETER);
843	/** @todo Validate u8Strm. */
844
845	LogFunc(("[SD%RU8] pStream=%p\n", u8Strm, pStream));
846
847	pStream->u8SD = u8Strm;
848
849	int rc = RTCritSectInit(&pStream->State.CritSect);
850	if (RT_SUCCESS(rc))
851	rc = RTCircBufCreate(&pStream->State.pCircBuf, _4K); /** @todo Make this configurable. */
852
853	return rc;
854	}
855
856	/**
857	* Destroys an AC'97 audio stream.
858	*
859	* @returns IPRT status code.
860	* @param pThis AC'97 state.
861	* @param pStream AC'97 stream to destroy.
862	*/
863	static void ichac97StreamDestroy(PAC97STATE pThis, PAC97STREAM pStream)
864	{
865	LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
866
867	int rc2 = RTCritSectDelete(&pStream->State.CritSect);
868	AssertRC(rc2);
869
870	if (pStream->State.pCircBuf)
871	{
872	RTCircBufDestroy(pStream->State.pCircBuf);
873	pStream->State.pCircBuf = NULL;
874	}
875
876	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
877	rc2 = ichac97StreamAsyncIODestroy(pThis, pStream);
878	AssertRC(rc2);
879	#else
880	RT_NOREF(pThis);
881	#endif
882
883	LogFlowFuncLeave();
884	}
885
886	/**
887	* Destroys all AC'97 audio streams of the device.
888	*
889	* @param pThis AC'97 state.
890	*/
891	static void ichac97StreamsDestroy(PAC97STATE pThis)
892	{
893	LogFlowFuncEnter();
894
895	/*
896	* Destroy all AC'97 streams.
897	*/
898
899	ichac97StreamDestroy(pThis, &pThis->StreamLineIn);
900	ichac97StreamDestroy(pThis, &pThis->StreamMicIn);
901	ichac97StreamDestroy(pThis, &pThis->StreamOut);
902
903	/*
904	* Destroy all sinks.
905	*/
906
907	PDMAUDIODESTSOURCE dstSrc;
908	if (pThis->pSinkLineIn)
909	{
910	dstSrc.Source = PDMAUDIORECSOURCE_LINE;
911	ichac97MixerRemoveDrvStreams(pThis, pThis->pSinkLineIn, PDMAUDIODIR_IN, dstSrc);
912
913	AudioMixerSinkDestroy(pThis->pSinkLineIn);
914	pThis->pSinkLineIn = NULL;
915	}
916
917	if (pThis->pSinkMicIn)
918	{
919	dstSrc.Source = PDMAUDIORECSOURCE_MIC;
920	ichac97MixerRemoveDrvStreams(pThis, pThis->pSinkMicIn, PDMAUDIODIR_IN, dstSrc);
921
922	AudioMixerSinkDestroy(pThis->pSinkMicIn);
923	pThis->pSinkMicIn = NULL;
924	}
925
926	if (pThis->pSinkOut)
927	{
928	dstSrc.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
929	ichac97MixerRemoveDrvStreams(pThis, pThis->pSinkOut, PDMAUDIODIR_OUT, dstSrc);
930
931	AudioMixerSinkDestroy(pThis->pSinkOut);
932	pThis->pSinkOut = NULL;
933	}
934	}
935
936	/**
937	* Writes audio data from a mixer sink into an AC'97 stream's DMA buffer.
938	*
939	* @returns IPRT status code.
940	* @param pThis AC'97 state.
941	* @param pDstStream AC'97 stream to write to.
942	* @param pSrcMixSink Mixer sink to get audio data to write from.
943	* @param cbToWrite Number of bytes to write.
944	* @param pcbWritten Number of bytes written. Optional.
945	*/
946	static int ichac97StreamWrite(PAC97STATE pThis, PAC97STREAM pDstStream, PAUDMIXSINK pSrcMixSink, uint32_t cbToWrite,
947	uint32_t *pcbWritten)
948	{
949	RT_NOREF(pThis);
950	AssertPtrReturn(pDstStream, VERR_INVALID_POINTER);
951	AssertPtrReturn(pSrcMixSink, VERR_INVALID_POINTER);
952	AssertReturn(cbToWrite, VERR_INVALID_PARAMETER);
953	/* pcbWritten is optional. */
954
955	PRTCIRCBUF pCircBuf = pDstStream->State.pCircBuf;
956	AssertPtr(pCircBuf);
957
958	void *pvDst;
959	size_t cbDst;
960
961	uint32_t cbRead = 0;
962
963	RTCircBufAcquireWriteBlock(pCircBuf, cbToWrite, &pvDst, &cbDst);
964
965	if (cbDst)
966	{
967	int rc2 = AudioMixerSinkRead(pSrcMixSink, AUDMIXOP_COPY, pvDst, (uint32_t)cbDst, &cbRead);
968	AssertRC(rc2);
969
970	#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
971	RTFILE fh;
972	RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ichac97StreamWrite.pcm",
973	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
974	RTFileWrite(fh, pvDst, cbRead, NULL);
975	RTFileClose(fh);
976	#endif
977	}
978
979	RTCircBufReleaseWriteBlock(pCircBuf, cbRead);
980
981	if (pcbWritten)
982	*pcbWritten = cbRead;
983
984	return VINF_SUCCESS;
985	}
986
987	/**
988	* Reads audio data from an AC'97 stream's DMA buffer and writes into a specified mixer sink.
989	*
990	* @returns IPRT status code.
991	* @param pThis AC'97 state.
992	* @param pSrcStream AC'97 stream to read audio data from.
993	* @param pDstMixSink Mixer sink to write audio data to.
994	* @param cbToRead Number of bytes to read.
995	* @param pcbRead Number of bytes read. Optional.
996	*/
997	static int ichac97StreamRead(PAC97STATE pThis, PAC97STREAM pSrcStream, PAUDMIXSINK pDstMixSink, uint32_t cbToRead,
998	uint32_t *pcbRead)
999	{
1000	RT_NOREF(pThis);
1001	AssertPtrReturn(pSrcStream, VERR_INVALID_POINTER);
1002	AssertPtrReturn(pDstMixSink, VERR_INVALID_POINTER);
1003	AssertReturn(cbToRead, VERR_INVALID_PARAMETER);
1004	/* pcbRead is optional. */
1005
1006	int rc = VINF_SUCCESS;
1007
1008	uint32_t cbReadTotal = 0;
1009
1010	PRTCIRCBUF pCircBuf = pSrcStream->State.pCircBuf;
1011	AssertPtr(pCircBuf);
1012
1013	void *pvSrc;
1014	size_t cbSrc;
1015
1016	while (cbToRead)
1017	{
1018	uint32_t cbWritten = 0;
1019
1020	RTCircBufAcquireReadBlock(pCircBuf, cbToRead, &pvSrc, &cbSrc);
1021
1022	if (cbSrc)
1023	{
1024	#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
1025	RTFILE fh;
1026	RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97StreamRead.pcm",
1027	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
1028	RTFileWrite(fh, pvSrc, cbSrc, NULL);
1029	RTFileClose(fh);
1030	#endif
1031	rc = AudioMixerSinkWrite(pDstMixSink, AUDMIXOP_COPY, pvSrc, (uint32_t)cbSrc, &cbWritten);
1032	if (RT_SUCCESS(rc))
1033	{
1034	Assert(cbWritten <= cbSrc);
1035
1036	cbReadTotal += cbWritten;
1037
1038	Assert(cbToRead >= cbWritten);
1039	cbToRead -= cbWritten;
1040	}
1041	}
1042
1043	RTCircBufReleaseReadBlock(pCircBuf, cbWritten);
1044
1045	if ( !cbWritten
1046	\|\| !RTCircBufUsed(pCircBuf))
1047	break;
1048
1049	if (RT_FAILURE(rc))
1050	break;
1051	}
1052
1053	if (pcbRead)
1054	*pcbRead = cbReadTotal;
1055
1056	return rc;
1057	}
1058
1059	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1060	/**
1061	* Asynchronous I/O thread for an AC'97 stream.
1062	* This will do the heavy lifting work for us as soon as it's getting notified by another thread.
1063	*
1064	* @returns IPRT status code.
1065	* @param hThreadSelf Thread handle.
1066	* @param pvUser User argument. Must be of type PAC97STREAMTHREADCTX.
1067	*/
1068	static DECLCALLBACK(int) ichac97StreamAsyncIOThread(RTTHREAD hThreadSelf, void *pvUser)
1069	{
1070	PAC97STREAMTHREADCTX pCtx = (PAC97STREAMTHREADCTX)pvUser;
1071	AssertPtr(pCtx);
1072
1073	PAC97STATE pThis = pCtx->pThis;
1074	AssertPtr(pThis);
1075
1076	PAC97STREAM pStream = pCtx->pStream;
1077	AssertPtr(pStream);
1078
1079	PAC97STREAMSTATEAIO pAIO = &pCtx->pStream->State.AIO;
1080
1081	PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
1082	AssertPtr(pCircBuf);
1083
1084	PAUDMIXSINK pMixSink = ichac97IndexToSink(pThis, pStream->u8SD);
1085	AssertPtr(pMixSink);
1086
1087	ASMAtomicXchgBool(&pAIO->fStarted, true);
1088
1089	RTThreadUserSignal(hThreadSelf);
1090
1091	LogFunc(("[SD%RU8] Started\n", pStream->u8SD));
1092
1093	for (;;)
1094	{
1095	Log2Func(("[SD%RU8] Waiting ...\n", pStream->u8SD));
1096
1097	int rc2 = RTSemEventWait(pAIO->Event, RT_INDEFINITE_WAIT);
1098	if (RT_FAILURE(rc2))
1099	break;
1100
1101	if (ASMAtomicReadBool(&pAIO->fShutdown))
1102	break;
1103
1104	rc2 = RTCritSectEnter(&pAIO->CritSect);
1105	if (RT_SUCCESS(rc2))
1106	{
1107	if (!pAIO->fEnabled)
1108	{
1109	RTCritSectLeave(&pAIO->CritSect);
1110	continue;
1111	}
1112
1113	ichac97StreamUpdate(pThis, pStream, false /* fInTimer */);
1114
1115	int rc3 = RTCritSectLeave(&pAIO->CritSect);
1116	AssertRC(rc3);
1117	}
1118
1119	AssertRC(rc2);
1120	}
1121
1122	LogFunc(("[SD%RU8] Ended\n", pStream->u8SD));
1123
1124	ASMAtomicXchgBool(&pAIO->fStarted, false);
1125
1126	return VINF_SUCCESS;
1127	}
1128
1129	/**
1130	* Creates the async I/O thread for a specific AC'97 audio stream.
1131	*
1132	* @returns IPRT status code.
1133	* @param pThis AC'97 state.
1134	* @param pStream AC'97 audio stream to create the async I/O thread for.
1135	*/
1136	static int ichac97StreamAsyncIOCreate(PAC97STATE pThis, PAC97STREAM pStream)
1137	{
1138	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1139
1140	int rc;
1141
1142	if (!ASMAtomicReadBool(&pAIO->fStarted))
1143	{
1144	pAIO->fShutdown = false;
1145
1146	rc = RTSemEventCreate(&pAIO->Event);
1147	if (RT_SUCCESS(rc))
1148	{
1149	rc = RTCritSectInit(&pAIO->CritSect);
1150	if (RT_SUCCESS(rc))
1151	{
1152	AC97STREAMTHREADCTX Ctx = { pThis, pStream };
1153
1154	char szThreadName[64];
1155	RTStrPrintf2(szThreadName, sizeof(szThreadName), "ac97AIO%RU8", pStream->u8SD);
1156
1157	rc = RTThreadCreate(&pAIO->Thread, ichac97StreamAsyncIOThread, &Ctx,
1158	0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, szThreadName);
1159	if (RT_SUCCESS(rc))
1160	rc = RTThreadUserWait(pAIO->Thread, 10 * 1000 /* 10s timeout */);
1161	}
1162	}
1163	}
1164	else
1165	rc = VINF_SUCCESS;
1166
1167	LogFunc(("[SD%RU8] Returning %Rrc\n", pStream->u8SD, rc));
1168	return rc;
1169	}
1170
1171	/**
1172	* Destroys the async I/O thread of a specific AC'97 audio stream.
1173	*
1174	* @returns IPRT status code.
1175	* @param pThis AC'97 state.
1176	* @param pStream AC'97 audio stream to destroy the async I/O thread for.
1177	*/
1178	static int ichac97StreamAsyncIODestroy(PAC97STATE pThis, PAC97STREAM pStream)
1179	{
1180	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1181
1182	if (!ASMAtomicReadBool(&pAIO->fStarted))
1183	return VINF_SUCCESS;
1184
1185	ASMAtomicWriteBool(&pAIO->fShutdown, true);
1186
1187	int rc = ichac97StreamAsyncIONotify(pThis, pStream);
1188	AssertRC(rc);
1189
1190	int rcThread;
1191	rc = RTThreadWait(pAIO->Thread, 30 * 1000 /* 30s timeout */, &rcThread);
1192	LogFunc(("Async I/O thread ended with %Rrc (%Rrc)\n", rc, rcThread));
1193
1194	if (RT_SUCCESS(rc))
1195	{
1196	rc = RTCritSectDelete(&pAIO->CritSect);
1197	AssertRC(rc);
1198
1199	rc = RTSemEventDestroy(pAIO->Event);
1200	AssertRC(rc);
1201
1202	pAIO->fStarted = false;
1203	pAIO->fShutdown = false;
1204	pAIO->fEnabled = false;
1205	}
1206
1207	LogFunc(("[SD%RU8] Returning %Rrc\n", pStream->u8SD, rc));
1208	return rc;
1209	}
1210
1211	/**
1212	* Lets the stream's async I/O thread know that there is some data to process.
1213	*
1214	* @returns IPRT status code.
1215	* @param pThis AC'97 state.
1216	* @param pStream AC'97 stream to notify async I/O thread for.
1217	*/
1218	static int ichac97StreamAsyncIONotify(PAC97STATE pThis, PAC97STREAM pStream)
1219	{
1220	RT_NOREF(pThis);
1221
1222	LogFunc(("[SD%RU8]\n", pStream->u8SD));
1223	return RTSemEventSignal(pStream->State.AIO.Event);
1224	}
1225
1226	/**
1227	* Locks the async I/O thread of a specific AC'97 audio stream.
1228	*
1229	* @param pStream AC'97 stream to lock async I/O thread for.
1230	*/
1231	static void ichac97StreamAsyncIOLock(PAC97STREAM pStream)
1232	{
1233	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1234
1235	if (!ASMAtomicReadBool(&pAIO->fStarted))
1236	return;
1237
1238	int rc2 = RTCritSectEnter(&pAIO->CritSect);
1239	AssertRC(rc2);
1240	}
1241
1242	/**
1243	* Unlocks the async I/O thread of a specific AC'97 audio stream.
1244	*
1245	* @param pStream AC'97 stream to unlock async I/O thread for.
1246	*/
1247	static void ichac97StreamAsyncIOUnlock(PAC97STREAM pStream)
1248	{
1249	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1250
1251	if (!ASMAtomicReadBool(&pAIO->fStarted))
1252	return;
1253
1254	int rc2 = RTCritSectLeave(&pAIO->CritSect);
1255	AssertRC(rc2);
1256	}
1257
1258	/**
1259	* Enables (resumes) or disables (pauses) the async I/O thread.
1260	*
1261	* @param pStream AC'97 stream to enable/disable async I/O thread for.
1262	* @param fEnable Whether to enable or disable the I/O thread.
1263	*
1264	* @remarks Does not do locking.
1265	*/
1266	static void ichac97StreamAsyncIOEnable(PAC97STREAM pStream, bool fEnable)
1267	{
1268	PAC97STREAMSTATEAIO pAIO = &pStream->State.AIO;
1269	ASMAtomicXchgBool(&pAIO->fEnabled, fEnable);
1270	}
1271	#endif /* VBOX_WITH_AUDIO_AC97_ASYNC_IO */
1272
1273	/**
1274	* Updates an AC'97 stream by doing its required data transfers.
1275	* The host sink(s) set the overall pace.
1276	*
1277	* This routine is called by both, the synchronous and the asynchronous, implementations.
1278	*
1279	* @param pThis AC'97 state.
1280	* @param pStream AC'97 stream to update.
1281	* @param fInTimer Whether to this function was called from the timer
1282	* context or an asynchronous I/O stream thread (if supported).
1283	*/
1284	static void ichac97StreamUpdate(PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer)
1285	{
1286	PAUDMIXSINK pSink = ichac97IndexToSink(pThis, pStream->u8SD);
1287	AssertPtr(pSink);
1288
1289	if (!AudioMixerSinkIsActive(pSink)) /* No sink available? Bail out. */
1290	return;
1291
1292	int rc2;
1293
1294	if (pStream->u8SD == AC97SOUNDSOURCE_PO_INDEX) /* Output (SDO). */
1295	{
1296	/* Is the AC'97 stream ready to be written (guest output data) to? If so, by how much? */
1297	const uint32_t cbFree = ichac97StreamGetFree(pStream);
1298
1299	if ( fInTimer
1300	&& cbFree)
1301	{
1302	Log3Func(("[SD%RU8] cbFree=%RU32\n", pStream->u8SD, cbFree));
1303
1304	/* Do the DMA transfer. */
1305	rc2 = ichac97StreamTransfer(pThis, pStream, cbFree);
1306	AssertRC(rc2);
1307	}
1308
1309	/* How much (guest output) data is available at the moment for the AC'97 stream? */
1310	uint32_t cbUsed = ichac97StreamGetUsed(pStream);
1311
1312	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1313	if ( fInTimer
1314	&& cbUsed)
1315	{
1316	rc2 = ichac97StreamAsyncIONotify(pThis, pStream);
1317	AssertRC(rc2);
1318	}
1319	else
1320	{
1321	#endif
1322	const uint32_t cbSinkWritable = AudioMixerSinkGetWritable(pSink);
1323
1324	/* Do not write more than the sink can hold at the moment.
1325	* The host sets the overall pace. */
1326	if (cbUsed > cbSinkWritable)
1327	cbUsed = cbSinkWritable;
1328
1329	if (cbUsed)
1330	{
1331	/* Read (guest output) data and write it to the stream's sink. */
1332	uint32_t cbRead;
1333	rc2 = ichac97StreamRead(pThis, pStream, pSink, cbUsed, &cbRead);
1334	AssertRC(rc2);
1335
1336	AssertMsg(cbUsed == cbRead, ("[SD%RU8] %RU32 bytes announced to be ready to read but %RU32 bytes read\n",
1337	pStream->u8SD, cbUsed, cbRead));
1338	}
1339
1340	/* When running synchronously, update the associated sink here.
1341	* Otherwise this will be done in the device timer. */
1342	rc2 = AudioMixerSinkUpdate(pSink);
1343	AssertRC(rc2);
1344
1345	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1346	}
1347	#endif
1348	}
1349	else /* Input (SDI). */
1350	{
1351	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1352	if (fInTimer)
1353	{
1354	rc2 = ichac97StreamAsyncIONotify(pThis, pStream);
1355	AssertRC(rc2);
1356	}
1357	else
1358	{
1359	#endif
1360	rc2 = AudioMixerSinkUpdate(pSink);
1361	AssertRC(rc2);
1362
1363	/* Is the sink ready to be read (host input data) from? If so, by how much? */
1364	const uint32_t cbReadable = AudioMixerSinkGetReadable(pSink);
1365
1366	/* How much (guest input) data is free at the moment? */
1367	uint32_t cbFree = ichac97StreamGetFree(pStream);
1368
1369	Log3Func(("[SD%RU8] cbReadable=%RU32, cbFree=%RU32\n", pStream->u8SD, cbReadable, cbFree));
1370
1371	/* Do not read more than the sink can provide at the moment.
1372	* The host sets the overall pace. */
1373	if (cbFree > cbReadable)
1374	cbFree = cbReadable;
1375
1376	if (cbFree)
1377	{
1378	/* Write (guest input) data to the stream which was read from stream's sink before. */
1379	rc2 = ichac97StreamWrite(pThis, pStream, pSink, cbFree, NULL /* pcbWritten */);
1380	AssertRC(rc2);
1381	}
1382	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1383	}
1384	#endif
1385
1386	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1387	if (fInTimer)
1388	{
1389	#endif
1390	const uint32_t cbToTransfer = ichac97StreamGetUsed(pStream);
1391	if (cbToTransfer)
1392	{
1393	/* When running synchronously, do the DMA data transfers here.
1394	* Otherwise this will be done in the stream's async I/O thread. */
1395	rc2 = ichac97StreamTransfer(pThis, pStream, cbToTransfer);
1396	AssertRC(rc2);
1397	}
1398	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
1399	}
1400	#endif
1401	}
1402	}
1403
1404	/**
1405	* Sets a AC'97 mixer control to a specific value.
1406	*
1407	* @returns IPRT status code.
1408	* @param pThis AC'97 state.
1409	* @param uMixerIdx Mixer control to set value for.
1410	* @param uVal Value to set.
1411	*/
1412	static void ichac97MixerSet(PAC97STATE pThis, uint8_t uMixerIdx, uint16_t uVal)
1413	{
1414	if (size_t(uMixerIdx + 2) > sizeof(pThis->mixer_data))
1415	{
1416	AssertMsgFailed(("Index %RU8 out of bounds(%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)));
1417	return;
1418	}
1419
1420	pThis->mixer_data[uMixerIdx + 0] = RT_LO_U8(uVal);
1421	pThis->mixer_data[uMixerIdx + 1] = RT_HI_U8(uVal);
1422	}
1423
1424	/**
1425	* Gets a value from a specific AC'97 mixer control.
1426	*
1427	* @returns Retrieved mixer control value.
1428	* @param pThis AC'97 state.
1429	* @param uMixerIdx Mixer control to get value for.
1430	*/
1431	static uint16_t ichac97MixerGet(PAC97STATE pThis, uint32_t uMixerIdx)
1432	{
1433	uint16_t uVal;
1434
1435	if (size_t(uMixerIdx + 2) > sizeof(pThis->mixer_data))
1436	{
1437	AssertMsgFailed(("Index %RU8 out of bounds (%zu)\n", uMixerIdx, sizeof(pThis->mixer_data)));
1438	uVal = UINT16_MAX;
1439	}
1440	else
1441	uVal = RT_MAKE_U16(pThis->mixer_data[uMixerIdx + 0], pThis->mixer_data[uMixerIdx + 1]);
1442
1443	return uVal;
1444	}
1445
1446	/**
1447	* Retrieves a specific driver stream of a AC'97 driver.
1448	*
1449	* @returns Pointer to driver stream if found, or NULL if not found.
1450	* @param pThis AC'97 state.
1451	* @param pDrv Driver to retrieve driver stream for.
1452	* @param enmDir Stream direction to retrieve.
1453	* @param dstSrc Stream destination / source to retrieve.
1454	*/
1455	static PAC97DRIVERSTREAM ichac97MixerGetDrvStream(PAC97STATE pThis, PAC97DRIVER pDrv,
1456	PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc)
1457	{
1458	RT_NOREF(pThis);
1459
1460	PAC97DRIVERSTREAM pDrvStream = NULL;
1461
1462	if (enmDir == PDMAUDIODIR_IN)
1463	{
1464	LogFunc(("enmRecSource=%d\n", dstSrc.Source));
1465
1466	switch (dstSrc.Source)
1467	{
1468	case PDMAUDIORECSOURCE_LINE:
1469	pDrvStream = &pDrv->LineIn;
1470	break;
1471	case PDMAUDIORECSOURCE_MIC:
1472	pDrvStream = &pDrv->MicIn;
1473	break;
1474	default:
1475	AssertFailed();
1476	break;
1477	}
1478	}
1479	else if (enmDir == PDMAUDIODIR_OUT)
1480	{
1481	LogFunc(("enmPlaybackDest=%d\n", dstSrc.Dest));
1482
1483	switch (dstSrc.Dest)
1484	{
1485	case PDMAUDIOPLAYBACKDEST_FRONT:
1486	pDrvStream = &pDrv->Out;
1487	break;
1488	default:
1489	AssertFailed();
1490	break;
1491	}
1492	}
1493	else
1494	AssertFailed();
1495
1496	return pDrvStream;
1497	}
1498
1499	/**
1500	* Adds a driver stream to a specific mixer sink.
1501	*
1502	* @returns IPRT status code.
1503	* @param pThis AC'97 state.
1504	* @param pMixSink Mixer sink to add driver stream to.
1505	* @param pCfg Stream configuration to use.
1506	* @param pDrv Driver stream to add.
1507	*/
1508	static int ichac97MixerAddDrvStream(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg, PAC97DRIVER pDrv)
1509	{
1510	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1511	AssertPtrReturn(pMixSink, VERR_INVALID_POINTER);
1512	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
1513
1514	PPDMAUDIOSTREAMCFG pStreamCfg = DrvAudioHlpStreamCfgDup(pCfg);
1515	if (!pStreamCfg)
1516	return VERR_NO_MEMORY;
1517
1518	if (!RTStrPrintf(pStreamCfg->szName, sizeof(pStreamCfg->szName), "%s", pCfg->szName))
1519	{
1520	RTMemFree(pStreamCfg);
1521	return VERR_BUFFER_OVERFLOW;
1522	}
1523
1524	LogFunc(("[LUN#%RU8] %s\n", pDrv->uLUN, pStreamCfg->szName));
1525
1526	int rc;
1527
1528	PAC97DRIVERSTREAM pDrvStream = ichac97MixerGetDrvStream(pThis, pDrv, pStreamCfg->enmDir, pStreamCfg->DestSource);
1529	if (pDrvStream)
1530	{
1531	AssertMsg(pDrvStream->pMixStrm == NULL, ("[LUN#%RU8] Driver stream already present when it must not\n", pDrv->uLUN));
1532
1533	PAUDMIXSTREAM pMixStrm;
1534	rc = AudioMixerSinkCreateStream(pMixSink, pDrv->pConnector, pStreamCfg, 0 /* fFlags */, &pMixStrm);
1535	if (RT_SUCCESS(rc))
1536	{
1537	rc = AudioMixerSinkAddStream(pMixSink, pMixStrm);
1538	LogFlowFunc(("LUN#%RU8: Created stream \"%s\", rc=%Rrc\n", pDrv->uLUN, pCfg->szName, rc));
1539	}
1540
1541	if (RT_SUCCESS(rc))
1542	pDrvStream->pMixStrm = pMixStrm;
1543	}
1544	else
1545	rc = VERR_INVALID_PARAMETER;
1546
1547	if (pStreamCfg)
1548	{
1549	RTMemFree(pStreamCfg);
1550	pStreamCfg = NULL;
1551	}
1552
1553	LogFlowFuncLeaveRC(rc);
1554	return rc;
1555	}
1556
1557	/**
1558	* Adds all current driver streams to a specific mixer sink.
1559	*
1560	* @returns IPRT status code.
1561	* @param pThis AC'97 state.
1562	* @param pMixSink Mixer sink to add stream to.
1563	* @param pCfg Stream configuration to use.
1564	*/
1565	static int ichac97MixerAddDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink, PPDMAUDIOSTREAMCFG pCfg)
1566	{
1567	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
1568	AssertPtrReturn(pMixSink, VERR_INVALID_POINTER);
1569	AssertPtrReturn(pCfg, VERR_INVALID_POINTER);
1570
1571	if (!DrvAudioHlpStreamCfgIsValid(pCfg))
1572	return VERR_INVALID_PARAMETER;
1573
1574	int rc = AudioMixerSinkSetFormat(pMixSink, &pCfg->Props);
1575	if (RT_FAILURE(rc))
1576	return rc;
1577
1578	PAC97DRIVER pDrv;
1579	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
1580	{
1581	int rc2 = ichac97MixerAddDrvStream(pThis, pMixSink, pCfg, pDrv);
1582	if (RT_SUCCESS(rc))
1583	rc = rc2;
1584	}
1585
1586	LogFlowFuncLeaveRC(rc);
1587	return rc;
1588	}
1589
1590	/**
1591	* Removes a driver stream from a specific mixer sink.
1592	*
1593	* @param pThis AC'97 state.
1594	* @param pMixSink Mixer sink to remove audio streams from.
1595	* @param enmDir Stream direction to remove.
1596	* @param dstSrc Stream destination / source to remove.
1597	* @param pDrv Driver stream to remove.
1598	*/
1599	static void ichac97MixerRemoveDrvStream(PAC97STATE pThis, PAUDMIXSINK pMixSink,
1600	PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc, PAC97DRIVER pDrv)
1601	{
1602	AssertPtrReturnVoid(pThis);
1603	AssertPtrReturnVoid(pMixSink);
1604
1605	PAC97DRIVERSTREAM pDrvStream = ichac97MixerGetDrvStream(pThis, pDrv, enmDir, dstSrc);
1606	if (pDrvStream)
1607	{
1608	if (pDrvStream->pMixStrm)
1609	{
1610	AudioMixerSinkRemoveStream(pMixSink, pDrvStream->pMixStrm);
1611
1612	AudioMixerStreamDestroy(pDrvStream->pMixStrm);
1613	pDrvStream->pMixStrm = NULL;
1614	}
1615	}
1616	}
1617
1618	/**
1619	* Removes all driver streams from a specific mixer sink.
1620	*
1621	* @param pThis AC'97 state.
1622	* @param pMixSink Mixer sink to remove audio streams from.
1623	* @param enmDir Stream direction to remove.
1624	* @param dstSrc Stream destination / source to remove.
1625	*/
1626	static void ichac97MixerRemoveDrvStreams(PAC97STATE pThis, PAUDMIXSINK pMixSink,
1627	PDMAUDIODIR enmDir, PDMAUDIODESTSOURCE dstSrc)
1628	{
1629	AssertPtrReturnVoid(pThis);
1630	AssertPtrReturnVoid(pMixSink);
1631
1632	PAC97DRIVER pDrv;
1633	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
1634	ichac97MixerRemoveDrvStream(pThis, pMixSink, enmDir, dstSrc, pDrv);
1635	}
1636
1637	/**
1638	* Opens an AC'97 stream with its current mixer settings.
1639	*
1640	* This will open an AC'97 stream with 2 (stereo) channels, 16-bit samples and
1641	* the last set sample rate in the AC'97 mixer for this stream.
1642	*
1643	* @returns IPRT status code.
1644	* @param pThis AC'97 state.
1645	* @param pStream AC'97 Stream to open.
1646	*/
1647	static int ichac97StreamOpen(PAC97STATE pThis, PAC97STREAM pStream)
1648	{
1649	int rc = VINF_SUCCESS;
1650
1651	LogFunc(("[SD%RU8]\n", pStream->u8SD));
1652
1653	RT_ZERO(pStream->State.Cfg);
1654
1655	PPDMAUDIOSTREAMCFG pCfg = &pStream->State.Cfg;
1656	PAUDMIXSINK pMixSink = NULL;
1657
1658	switch (pStream->u8SD)
1659	{
1660	case AC97SOUNDSOURCE_PI_INDEX:
1661	{
1662	pCfg->Props.uHz = ichac97MixerGet(pThis, AC97_PCM_LR_ADC_Rate);
1663	pCfg->enmDir = PDMAUDIODIR_IN;
1664	pCfg->DestSource.Source = PDMAUDIORECSOURCE_LINE;
1665	pCfg->enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
1666
1667	RTStrPrintf2(pCfg->szName, sizeof(pCfg->szName), "Line-In");
1668
1669	pMixSink = pThis->pSinkLineIn;
1670	break;
1671	}
1672
1673	case AC97SOUNDSOURCE_MC_INDEX:
1674	{
1675	pCfg->Props.uHz = ichac97MixerGet(pThis, AC97_MIC_ADC_Rate);
1676	pCfg->enmDir = PDMAUDIODIR_IN;
1677	pCfg->DestSource.Source = PDMAUDIORECSOURCE_MIC;
1678	pCfg->enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
1679
1680	RTStrPrintf2(pCfg->szName, sizeof(pCfg->szName), "Mic-In");
1681
1682	pMixSink = pThis->pSinkMicIn;
1683	break;
1684	}
1685
1686	case AC97SOUNDSOURCE_PO_INDEX:
1687	{
1688	pCfg->Props.uHz = ichac97MixerGet(pThis, AC97_PCM_Front_DAC_Rate);
1689	pCfg->enmDir = PDMAUDIODIR_OUT;
1690	pCfg->DestSource.Dest = PDMAUDIOPLAYBACKDEST_FRONT;
1691	pCfg->enmLayout = PDMAUDIOSTREAMLAYOUT_NON_INTERLEAVED;
1692
1693	RTStrPrintf2(pCfg->szName, sizeof(pCfg->szName), "Output");
1694
1695	pMixSink = pThis->pSinkOut;
1696	break;
1697	}
1698
1699	default:
1700	rc = VERR_NOT_SUPPORTED;
1701	break;
1702	}
1703
1704	if (RT_SUCCESS(rc))
1705	{
1706	ichac97MixerRemoveDrvStreams(pThis, pMixSink, pCfg->enmDir, pCfg->DestSource);
1707
1708	if (pCfg->Props.uHz)
1709	{
1710	Assert(pCfg->enmDir != PDMAUDIODIR_UNKNOWN);
1711
1712	pCfg->Props.cChannels = 2;
1713	pCfg->Props.cBits = 16;
1714	pCfg->Props.fSigned = true;
1715	pCfg->Props.cShift = PDMAUDIOPCMPROPS_MAKE_SHIFT_PARMS(pCfg->Props.cBits, pCfg->Props.cChannels);
1716
1717	rc = ichac97MixerAddDrvStreams(pThis, pMixSink, pCfg);
1718	}
1719	}
1720
1721	LogFlowFunc(("[SD%RU8] rc=%Rrc\n", pStream->u8SD, rc));
1722	return rc;
1723	}
1724
1725	/**
1726	* Closes an AC'97 stream.
1727	*
1728	* @returns IPRT status code.
1729	* @param pThis AC'97 state.
1730	* @param pStream AC'97 stream to close.
1731	*/
1732	static int ichac97StreamClose(PAC97STATE pThis, PAC97STREAM pStream)
1733	{
1734	RT_NOREF(pThis);
1735	RT_NOREF(pStream);
1736
1737	LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
1738
1739	return VINF_SUCCESS;
1740	}
1741
1742	/**
1743	* Re-opens (that is, closes and opens again) an AC'97 stream on the backend
1744	* side with the current AC'97 mixer settings for this stream.
1745	*
1746	* @returns IPRT status code.
1747	* @param pThis AC'97 device state.
1748	* @param pStream AC'97 stream to re-open.
1749	*/
1750	static int ichac97StreamReOpen(PAC97STATE pThis, PAC97STREAM pStream)
1751	{
1752	LogFlowFunc(("[SD%RU8]\n", pStream->u8SD));
1753
1754	int rc = ichac97StreamClose(pThis, pStream);
1755	if (RT_SUCCESS(rc))
1756	rc = ichac97StreamOpen(pThis, pStream);
1757
1758	return rc;
1759	}
1760
1761	/**
1762	* Locks an AC'97 stream for serialized access.
1763	*
1764	* @returns IPRT status code.
1765	* @param pStream AC'97 stream to lock.
1766	*/
1767	static void ichac97StreamLock(PAC97STREAM pStream)
1768	{
1769	AssertPtrReturnVoid(pStream);
1770	int rc2 = RTCritSectEnter(&pStream->State.CritSect);
1771	AssertRC(rc2);
1772	}
1773
1774	/**
1775	* Unlocks a formerly locked AC'97 stream.
1776	*
1777	* @returns IPRT status code.
1778	* @param pStream AC'97 stream to unlock.
1779	*/
1780	static void ichac97StreamUnlock(PAC97STREAM pStream)
1781	{
1782	AssertPtrReturnVoid(pStream);
1783	int rc2 = RTCritSectLeave(&pStream->State.CritSect);
1784	AssertRC(rc2);
1785	}
1786
1787	/**
1788	* Retrieves the available size of (buffered) audio data (in bytes) of a given AC'97 stream.
1789	*
1790	* @returns Available data (in bytes).
1791	* @param pStream AC'97 stream to retrieve size for.
1792	*/
1793	static uint32_t ichac97StreamGetUsed(PAC97STREAM pStream)
1794	{
1795	AssertPtrReturn(pStream, 0);
1796
1797	if (!pStream->State.pCircBuf)
1798	return 0;
1799
1800	return (uint32_t)RTCircBufUsed(pStream->State.pCircBuf);
1801	}
1802
1803	/**
1804	* Retrieves the free size of audio data (in bytes) of a given AC'97 stream.
1805	*
1806	* @returns Free data (in bytes).
1807	* @param pStream AC'97 stream to retrieve size for.
1808	*/
1809	static uint32_t ichac97StreamGetFree(PAC97STREAM pStream)
1810	{
1811	AssertPtrReturn(pStream, 0);
1812
1813	if (!pStream->State.pCircBuf)
1814	return 0;
1815
1816	return (uint32_t)RTCircBufFree(pStream->State.pCircBuf);
1817	}
1818
1819	/**
1820	* Sets the volume of a specific AC'97 mixer control.
1821	*
1822	* This currently only supports attenuation -- gain support is currently not implemented.
1823	*
1824	* @returns IPRT status code.
1825	* @param pThis AC'97 state.
1826	* @param index AC'97 mixer index to set volume for.
1827	* @param enmMixerCtl Corresponding audio mixer sink.
1828	* @param uVal Volume value to set.
1829	*/
1830	static int ichac97MixerSetVolume(PAC97STATE pThis, int index, PDMAUDIOMIXERCTL enmMixerCtl, uint32_t uVal)
1831	{
1832	/*
1833	* From AC'97 SoundMax Codec AD1981A/AD1981B:
1834	* "Because AC '97 defines 6-bit volume registers, to maintain compatibility whenever the
1835	* D5 or D13 bits are set to 1, their respective lower five volume bits are automatically
1836	* set to 1 by the Codec logic. On readback, all lower 5 bits will read ones whenever
1837	* these bits are set to 1."
1838	*
1839	* Linux ALSA depends on this behavior.
1840	*/
1841	/// @todo Does this apply to anything other than the master volume control?
1842	if (uVal & RT_BIT(5)) /* D5 bit set? */
1843	uVal \|= RT_BIT(4) \| RT_BIT(3) \| RT_BIT(2) \| RT_BIT(1) \| RT_BIT(0);
1844	if (uVal & RT_BIT(13)) /* D13 bit set? */
1845	uVal \|= RT_BIT(12) \| RT_BIT(11) \| RT_BIT(10) \| RT_BIT(9) \| RT_BIT(8);
1846
1847	const bool fCtlMuted = (uVal >> AC97_BARS_VOL_MUTE_SHIFT) & 1;
1848	uint8_t uCtlAttLeft = (uVal >> 8) & AC97_BARS_VOL_MASK;
1849	uint8_t uCtlAttRight = uVal & AC97_BARS_VOL_MASK;
1850
1851	/* For the master and headphone volume, 0 corresponds to 0dB attenuation. For the other
1852	* volume controls, 0 means 12dB gain and 8 means unity gain.
1853	*/
1854	if (index != AC97_Master_Volume_Mute && index != AC97_Headphone_Volume_Mute)
1855	{
1856	#ifndef VBOX_WITH_AC97_GAIN_SUPPORT
1857	/* NB: Currently there is no gain support, only attenuation. */
1858	uCtlAttLeft = uCtlAttLeft < 8 ? 0 : uCtlAttLeft - 8;
1859	uCtlAttRight = uCtlAttRight < 8 ? 0 : uCtlAttRight - 8;
1860	#endif
1861	}
1862	Assert(uCtlAttLeft <= 255 / AC97_DB_FACTOR);
1863	Assert(uCtlAttRight <= 255 / AC97_DB_FACTOR);
1864
1865	LogFunc(("index=0x%x, uVal=%RU32, enmMixerCtl=%RU32\n", index, uVal, enmMixerCtl));
1866	LogFunc(("uCtlAttLeft=%RU8, uCtlAttRight=%RU8 ", uCtlAttLeft, uCtlAttRight));
1867
1868	/*
1869	* For AC'97 volume controls, each additional step means -1.5dB attenuation with
1870	* zero being maximum. In contrast, we're internally using 255 (PDMAUDIO_VOLUME_MAX)
1871	* steps, each -0.375dB, where 0 corresponds to -96dB and 255 corresponds to 0dB.
1872	*/
1873	uint8_t lVol = PDMAUDIO_VOLUME_MAX - uCtlAttLeft * AC97_DB_FACTOR;
1874	uint8_t rVol = PDMAUDIO_VOLUME_MAX - uCtlAttRight * AC97_DB_FACTOR;
1875
1876	Log(("-> fMuted=%RTbool, lVol=%RU8, rVol=%RU8\n", fCtlMuted, lVol, rVol));
1877
1878	int rc = VINF_SUCCESS;
1879
1880	if (pThis->pMixer) /* Device can be in reset state, so no mixer available. */
1881	{
1882	PDMAUDIOVOLUME Vol = { fCtlMuted, lVol, rVol };
1883	PAUDMIXSINK pSink = NULL;
1884
1885	switch (enmMixerCtl)
1886	{
1887	case PDMAUDIOMIXERCTL_VOLUME_MASTER:
1888	rc = AudioMixerSetMasterVolume(pThis->pMixer, &Vol);
1889	break;
1890
1891	case PDMAUDIOMIXERCTL_FRONT:
1892	pSink = pThis->pSinkOut;
1893	break;
1894
1895	case PDMAUDIOMIXERCTL_MIC_IN:
1896	pSink = pThis->pSinkMicIn;
1897	break;
1898
1899	case PDMAUDIOMIXERCTL_LINE_IN:
1900	pSink = pThis->pSinkLineIn;
1901	break;
1902
1903	default:
1904	AssertFailed();
1905	rc = VERR_NOT_SUPPORTED;
1906	break;
1907	}
1908
1909	if (pSink)
1910	rc = AudioMixerSinkSetVolume(pSink, &Vol);
1911	}
1912
1913	ichac97MixerSet(pThis, index, uVal);
1914
1915	if (RT_FAILURE(rc))
1916	LogFlowFunc(("Failed with %Rrc\n", rc));
1917
1918	return rc;
1919	}
1920
1921	/**
1922	* Converts an AC'97 recording source index to a PDM audio recording source.
1923	*
1924	* @returns PDM audio recording source.
1925	* @param uIdx AC'97 index to convert.
1926	*/
1927	static PDMAUDIORECSOURCE ichac97IdxToRecSource(uint8_t uIdx)
1928	{
1929	switch (uIdx)
1930	{
1931	case AC97_REC_MIC: return PDMAUDIORECSOURCE_MIC;
1932	case AC97_REC_CD: return PDMAUDIORECSOURCE_CD;
1933	case AC97_REC_VIDEO: return PDMAUDIORECSOURCE_VIDEO;
1934	case AC97_REC_AUX: return PDMAUDIORECSOURCE_AUX;
1935	case AC97_REC_LINE_IN: return PDMAUDIORECSOURCE_LINE;
1936	case AC97_REC_PHONE: return PDMAUDIORECSOURCE_PHONE;
1937	default:
1938	break;
1939	}
1940
1941	LogFlowFunc(("Unknown record source %d, using MIC\n", uIdx));
1942	return PDMAUDIORECSOURCE_MIC;
1943	}
1944
1945	/**
1946	* Converts a PDM audio recording source to an AC'97 recording source index.
1947	*
1948	* @returns AC'97 recording source index.
1949	* @param enmRecSrc PDM audio recording source to convert.
1950	*/
1951	static uint8_t ichac97RecSourceToIdx(PDMAUDIORECSOURCE enmRecSrc)
1952	{
1953	switch (enmRecSrc)
1954	{
1955	case PDMAUDIORECSOURCE_MIC: return AC97_REC_MIC;
1956	case PDMAUDIORECSOURCE_CD: return AC97_REC_CD;
1957	case PDMAUDIORECSOURCE_VIDEO: return AC97_REC_VIDEO;
1958	case PDMAUDIORECSOURCE_AUX: return AC97_REC_AUX;
1959	case PDMAUDIORECSOURCE_LINE: return AC97_REC_LINE_IN;
1960	case PDMAUDIORECSOURCE_PHONE: return AC97_REC_PHONE;
1961	default:
1962	break;
1963	}
1964
1965	LogFlowFunc(("Unknown audio recording source %d using MIC\n", enmRecSrc));
1966	return AC97_REC_MIC;
1967	}
1968
1969	/**
1970	* Retrieves an AC'97 audio stream from an AC'97 stream index.
1971	*
1972	* @returns Pointer to AC'97 audio stream if found, or NULL if not found / invalid.
1973	* @param pThis AC'97 state.
1974	* @param uIdx AC'97 stream index to retrieve AC'97 audio stream for.
1975	*/
1976	DECLINLINE(PAC97STREAM) ichac97GetStreamFromIdx(PAC97STATE pThis, uint32_t uIdx)
1977	{
1978	switch (uIdx)
1979	{
1980	case AC97SOUNDSOURCE_PI_INDEX: return &pThis->StreamLineIn;
1981	case AC97SOUNDSOURCE_MC_INDEX: return &pThis->StreamMicIn;
1982	case AC97SOUNDSOURCE_PO_INDEX: return &pThis->StreamOut;
1983	default: break;
1984	}
1985
1986	return NULL;
1987	}
1988
1989	/**
1990	* Performs an AC'97 mixer record select to switch to a different recording
1991	* source.
1992	*
1993	* @param pThis AC'97 state.
1994	* @param val AC'97 recording source index to set.
1995	*/
1996	static void ichac97MixerRecordSelect(PAC97STATE pThis, uint32_t val)
1997	{
1998	uint8_t rs = val & AC97_REC_MASK;
1999	uint8_t ls = (val >> 8) & AC97_REC_MASK;
2000	PDMAUDIORECSOURCE ars = ichac97IdxToRecSource(rs);
2001	PDMAUDIORECSOURCE als = ichac97IdxToRecSource(ls);
2002	rs = ichac97RecSourceToIdx(ars);
2003	ls = ichac97RecSourceToIdx(als);
2004	ichac97MixerSet(pThis, AC97_Record_Select, rs \| (ls << 8));
2005	}
2006
2007	/**
2008	* Resets the AC'97 mixer.
2009	*
2010	* @returns IPRT status code.
2011	* @param pThis AC'97 state.
2012	*/
2013	static int ichac97MixerReset(PAC97STATE pThis)
2014	{
2015	AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
2016
2017	LogFlowFuncEnter();
2018
2019	RT_ZERO(pThis->mixer_data);
2020
2021	/* Note: Make sure to reset all registers first before bailing out on error. */
2022
2023	ichac97MixerSet(pThis, AC97_Reset , 0x0000); /* 6940 */
2024	ichac97MixerSet(pThis, AC97_Master_Volume_Mono_Mute , 0x8000);
2025	ichac97MixerSet(pThis, AC97_PC_BEEP_Volume_Mute , 0x0000);
2026
2027	ichac97MixerSet(pThis, AC97_Phone_Volume_Mute , 0x8008);
2028	ichac97MixerSet(pThis, AC97_Mic_Volume_Mute , 0x8008);
2029	ichac97MixerSet(pThis, AC97_CD_Volume_Mute , 0x8808);
2030	ichac97MixerSet(pThis, AC97_Aux_Volume_Mute , 0x8808);
2031	ichac97MixerSet(pThis, AC97_Record_Gain_Mic_Mute , 0x8000);
2032	ichac97MixerSet(pThis, AC97_General_Purpose , 0x0000);
2033	ichac97MixerSet(pThis, AC97_3D_Control , 0x0000);
2034	ichac97MixerSet(pThis, AC97_Powerdown_Ctrl_Stat , 0x000f);
2035
2036	ichac97MixerSet(pThis, AC97_Extended_Audio_ID , 0x0809);
2037	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
2038	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate , 0xbb80);
2039	ichac97MixerSet(pThis, AC97_PCM_Surround_DAC_Rate , 0xbb80);
2040	ichac97MixerSet(pThis, AC97_PCM_LFE_DAC_Rate , 0xbb80);
2041	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate , 0xbb80);
2042	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate , 0xbb80);
2043
2044	if (pThis->uCodecModel == AC97_CODEC_AD1980)
2045	{
2046	/* Analog Devices 1980 (AD1980) */
2047	ichac97MixerSet(pThis, AC97_Reset , 0x0010); /* Headphones. */
2048	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
2049	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5370);
2050	ichac97MixerSet(pThis, AC97_Headphone_Volume_Mute , 0x8000);
2051	}
2052	else if (pThis->uCodecModel == AC97_CODEC_AD1981B)
2053	{
2054	/* Analog Devices 1981B (AD1981B) */
2055	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x4144);
2056	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x5374);
2057	}
2058	else
2059	{
2060	/* Sigmatel 9700 (STAC9700) */
2061	ichac97MixerSet(pThis, AC97_Vendor_ID1 , 0x8384);
2062	ichac97MixerSet(pThis, AC97_Vendor_ID2 , 0x7600); /* 7608 */
2063	}
2064	ichac97MixerRecordSelect(pThis, 0);
2065
2066	/* The default value is 8000h, which corresponds to 0 dB attenuation with mute on. */
2067	ichac97MixerSetVolume(pThis, AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER, 0x8000);
2068
2069	/* The default value for stereo registers is 8808h, which corresponds to 0 dB gain with mute on.*/
2070	ichac97MixerSetVolume(pThis, AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT, 0x8808);
2071	ichac97MixerSetVolume(pThis, AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN, 0x8808);
2072	ichac97MixerSetVolume(pThis, AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN, 0x8808);
2073
2074	return VINF_SUCCESS;
2075	}
2076
2077	/* Unused */
2078	#if 0
2079	static void ichac97WriteBUP(PAC97STATE pThis, uint32_t cbElapsed)
2080	{
2081	LogFlowFunc(("cbElapsed=%RU32\n", cbElapsed));
2082
2083	if (!(pThis->bup_flag & BUP_SET))
2084	{
2085	if (pThis->bup_flag & BUP_LAST)
2086	{
2087	unsigned int i;
2088	uint32_t p = (uint32_t)pThis->silence;
2089	for (i = 0; i < sizeof(pThis->silence) / 4; i++) /** @todo r=andy Assumes 16-bit samples, stereo. */
2090	*p++ = pThis->last_samp;
2091	}
2092	else
2093	RT_ZERO(pThis->silence);
2094
2095	pThis->bup_flag \|= BUP_SET;
2096	}
2097
2098	while (cbElapsed)
2099	{
2100	uint32_t cbToWrite = RT_MIN(cbElapsed, (uint32_t)sizeof(pThis->silence));
2101	uint32_t cbWrittenToStream;
2102
2103	int rc2 = AudioMixerSinkWrite(pThis->pSinkOut, AUDMIXOP_COPY,
2104	pThis->silence, cbToWrite, &cbWrittenToStream);
2105	if (RT_SUCCESS(rc2))
2106	{
2107	if (cbWrittenToStream < cbToWrite) /* Lagging behind? */
2108	LogFlowFunc(("Warning: Only written %RU32 / %RU32 bytes, expect lags\n", cbWrittenToStream, cbToWrite));
2109	}
2110
2111	/* Always report all data as being written;
2112	* backends who were not able to catch up have to deal with it themselves. */
2113	Assert(cbElapsed >= cbToWrite);
2114	cbElapsed -= cbToWrite;
2115	}
2116	}
2117	#endif /* Unused */
2118
2119	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
2120	/**
2121	* Starts the internal audio device timer.
2122	*
2123	* @return IPRT status code.
2124	* @param pThis AC'97 state.
2125	*/
2126	static int ichac97TimerStart(PAC97STATE pThis)
2127	{
2128	LogFlowFuncEnter();
2129
2130	DEVAC97_LOCK_BOTH_RETURN(pThis, VINF_IOM_R3_MMIO_WRITE);
2131
2132	AssertPtr(pThis->pTimer);
2133
2134	if (!pThis->fTimerActive)
2135	{
2136	LogRel2(("AC97: Starting transfers\n"));
2137
2138	pThis->fTimerActive = true;
2139
2140	/* Start transfers. */
2141	ichac97TimerMain(pThis);
2142	}
2143
2144	DEVAC97_UNLOCK_BOTH(pThis);
2145
2146	return VINF_SUCCESS;
2147	}
2148
2149	/**
2150	* Starts the internal audio device timer (if not started yet).
2151	*
2152	* @return IPRT status code.
2153	* @param pThis AC'97 state.
2154	*/
2155	static int ichac97TimerMaybeStart(PAC97STATE pThis)
2156	{
2157	LogFlowFuncEnter();
2158
2159	if (!pThis->pTimer)
2160	return VERR_WRONG_ORDER;
2161
2162	pThis->cStreamsActive++;
2163
2164	/* Only start the timer at the first active stream. */
2165	if (pThis->cStreamsActive == 1)
2166	return ichac97TimerStart(pThis);
2167
2168	return VINF_SUCCESS;
2169	}
2170
2171	/**
2172	* Stops the internal audio device timer.
2173	*
2174	* @return IPRT status code.
2175	* @param pThis AC'97 state.
2176	*/
2177	static int ichac97TimerStop(PAC97STATE pThis)
2178	{
2179	LogFlowFuncEnter();
2180
2181	if (!pThis->pTimer) /* Only can happen on device construction time, so no locking needed here. */
2182	return VINF_SUCCESS;
2183
2184	DEVAC97_LOCK_BOTH_RETURN(pThis, VINF_IOM_R3_MMIO_WRITE);
2185
2186	if (pThis->fTimerActive)
2187	{
2188	LogRel2(("AC97: Stopping transfers ...\n"));
2189
2190	pThis->fTimerActive = false;
2191
2192	/* Note: Do not stop the timer via TMTimerStop() here, as there still might
2193	* be queued audio data which needs to be handled (e.g. played back) first
2194	* before actually stopping the timer for good. */
2195	}
2196
2197	DEVAC97_UNLOCK_BOTH(pThis);
2198
2199	return VINF_SUCCESS;
2200	}
2201
2202	/**
2203	* Decreases the active AC'97 streams count by one and
2204	* then checks if the internal audio device timer can be
2205	* stopped.
2206	*
2207	* @return IPRT status code.
2208	* @param pThis AC'97 state.
2209	*/
2210	static int ichac97TimerMaybeStop(PAC97STATE pThis)
2211	{
2212	LogFlowFuncEnter();
2213
2214	if (!pThis->pTimer)
2215	return VERR_WRONG_ORDER;
2216
2217	if (pThis->cStreamsActive) /* Function can be called mupltiple times. */
2218	{
2219	pThis->cStreamsActive--;
2220
2221	if (pThis->cStreamsActive == 0)
2222	return ichac97TimerStop(pThis);
2223	}
2224
2225	return VINF_SUCCESS;
2226	}
2227
2228	/**
2229	* Main routine for the device timer.
2230	*
2231	* @param pThis AC'97 state.
2232	*/
2233	static void ichac97TimerMain(PAC97STATE pThis)
2234	{
2235	STAM_PROFILE_START(&pThis->StatTimer, a);
2236
2237	DEVAC97_LOCK_BOTH_RETURN_VOID(pThis);
2238
2239	uint64_t cTicksNow = TMTimerGet(pThis->pTimer);
2240
2241	/* Update current time timestamp. */
2242	pThis->uTimerTS = cTicksNow;
2243
2244	/* Flag indicating whether to kick the timer again for the next DMA transfer or sink processing. */
2245	bool fKickTimer = false;
2246
2247	ichac97DoTransfers(pThis);
2248
2249	/* Do we need to kick the timer again? */
2250	if ( AudioMixerSinkIsActive(ichac97IndexToSink(pThis, pThis->StreamLineIn.u8SD))
2251	\|\| AudioMixerSinkIsActive(ichac97IndexToSink(pThis, pThis->StreamMicIn.u8SD))
2252	\|\| AudioMixerSinkIsActive(ichac97IndexToSink(pThis, pThis->StreamOut.u8SD)))
2253	{
2254	fKickTimer = true;
2255	}
2256
2257	if ( ASMAtomicReadBool(&pThis->fTimerActive)
2258	\|\| fKickTimer)
2259	{
2260	/* Kick the timer again. */
2261	uint64_t cTicks = pThis->cTimerTicks;
2262	/** @todo adjust cTicks down by now much cbOutMin represents. */
2263	TMTimerSet(pThis->pTimer, cTicksNow + cTicks);
2264	}
2265	else
2266	LogRel2(("AC97: Stopped transfers\n"));
2267
2268	DEVAC97_UNLOCK_BOTH(pThis);
2269
2270	STAM_PROFILE_STOP(&pThis->StatTimer, a);
2271	}
2272
2273	/**
2274	* Timer callback which handles the audio data transfers on a periodic basis.
2275	*
2276	* @param pDevIns Device instance.
2277	* @param pTimer Timer which was used when calling this.
2278	* @param pvUser User argument as PAC97STATE.
2279	*/
2280	static DECLCALLBACK(void) ichac97Timer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
2281	{
2282	RT_NOREF(pDevIns, pTimer);
2283
2284	PAC97STATE pThis = (PAC97STATE)pvUser;
2285	Assert(pThis == PDMINS_2_DATA(pDevIns, PAC97STATE));
2286	AssertPtr(pThis);
2287
2288	ichac97TimerMain(pThis);
2289	}
2290	#endif /* !VBOX_WITH_AUDIO_AC97_CALLBACKS */
2291
2292	/**
2293	* Main routine to perform the actual audio data transfers from the AC'97 streams
2294	* to the backend(s) and vice versa.
2295	*
2296	* @param pThis AC'97 state.
2297	*/
2298	static void ichac97DoTransfers(PAC97STATE pThis)
2299	{
2300	AssertPtrReturnVoid(pThis);
2301
2302	ichac97StreamUpdate(pThis, &pThis->StreamLineIn, true /* fInTimer */);
2303	ichac97StreamUpdate(pThis, &pThis->StreamMicIn, true /* fInTimer */);
2304	ichac97StreamUpdate(pThis, &pThis->StreamOut, true /* fInTimer */);
2305	}
2306
2307	/**
2308	* Transfers data of an AC'97 stream according to its usage (input / output).
2309	*
2310	* For an SDO (output) stream this means reading DMA data from the device to
2311	* the AC'97 stream's internal FIFO buffer.
2312	*
2313	* For an SDI (input) stream this is reading audio data from the AC'97 stream's
2314	* internal FIFO buffer and writing it as DMA data to the device.
2315	*
2316	* @returns IPRT status code.
2317	* @param pThis AC'97 state.
2318	* @param pStream AC'97 stream to update.
2319	* @param cbToProcessMax Maximum of data (in bytes) to process.
2320	*/
2321	static int ichac97StreamTransfer(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax)
2322	{
2323	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
2324	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
2325	AssertReturn(cbToProcessMax, VERR_INVALID_PARAMETER);
2326
2327	ichac97StreamLock(pStream);
2328
2329	PAC97BMREGS pRegs = &pStream->Regs;
2330
2331	if (pRegs->sr & AC97_SR_DCH) /* Controller halted? */
2332	{
2333	if (pRegs->cr & AC97_CR_RPBM) /* Bus master operation starts. */
2334	{
2335	switch (pStream->u8SD)
2336	{
2337	case AC97SOUNDSOURCE_PO_INDEX:
2338	/ichac97WriteBUP(pThis, cbToProcess);/
2339	break;
2340
2341	default:
2342	break;
2343	}
2344	}
2345
2346	ichac97StreamUnlock(pStream);
2347	return VINF_SUCCESS;
2348	}
2349
2350	/* BCIS flag still set? Skip iteration. */
2351	if (pRegs->sr & AC97_SR_BCIS)
2352	{
2353	Log3Func(("[SD%RU8] BCIS set\n", pStream->u8SD));
2354
2355	ichac97StreamUnlock(pStream);
2356	return VINF_SUCCESS;
2357	}
2358
2359	uint32_t cbLeft = RT_MIN((uint32_t)(pRegs->picb << 1), cbToProcessMax); /** @todo r=andy Assumes 16bit samples. */
2360	uint32_t cbProcessedTotal = 0;
2361
2362	PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
2363	AssertPtr(pCircBuf);
2364
2365	int rc = VINF_SUCCESS;
2366
2367	Log3Func(("[SD%RU8] cbToProcessMax=%RU32, cbLeft=%RU32\n", pStream->u8SD, cbToProcessMax, cbLeft));
2368
2369	while (cbLeft)
2370	{
2371	if (!pRegs->bd_valid)
2372	{
2373	Log3Func(("Invalid buffer descriptor, fetching next one ...\n"));
2374	ichac97StreamFetchBDLE(pThis, pStream);
2375	}
2376
2377	if (!pRegs->picb) /* Got a new buffer descriptor, that is, the position is 0? */
2378	{
2379	Log3Func(("Fresh buffer descriptor %RU8 is empty, addr=%#x, len=%#x, skipping\n",
2380	pRegs->civ, pRegs->bd.addr, pRegs->bd.ctl_len));
2381	if (pRegs->civ == pRegs->lvi)
2382	{
2383	pRegs->sr \|= AC97_SR_DCH; /** @todo r=andy Also set CELV? */
2384	pThis->bup_flag = 0;
2385
2386	rc = VINF_EOF;
2387	break;
2388	}
2389
2390	pRegs->sr &= ~AC97_SR_CELV;
2391	pRegs->civ = pRegs->piv;
2392	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2393
2394	ichac97StreamFetchBDLE(pThis, pStream);
2395	continue;
2396	}
2397
2398	uint32_t cbChunk = RT_MIN((uint32_t)(pRegs->picb << 1), cbLeft); /** @todo r=andy Assumes 16bit samples. */
2399	Assert(cbChunk);
2400
2401	switch (pStream->u8SD)
2402	{
2403	case AC97SOUNDSOURCE_PO_INDEX: /* Output */
2404	{
2405	void *pvDst;
2406	size_t cbDst;
2407
2408	RTCircBufAcquireWriteBlock(pCircBuf, cbChunk, &pvDst, &cbDst);
2409
2410	if (cbDst)
2411	{
2412	int rc2 = PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), pRegs->bd.addr, (uint8_t *)pvDst, cbDst);
2413	AssertRC(rc2);
2414
2415	#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
2416	RTFILE fh;
2417	RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97DMARead.pcm",
2418	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
2419	RTFileWrite(fh, pvDst, cbDst, NULL);
2420	RTFileClose(fh);
2421	#endif
2422	}
2423
2424	RTCircBufReleaseWriteBlock(pCircBuf, cbDst);
2425
2426	cbChunk = (uint32_t)cbDst; /* Update the current chunk size to what really has been written. */
2427	break;
2428	}
2429
2430	case AC97SOUNDSOURCE_PI_INDEX: /* Input */
2431	case AC97SOUNDSOURCE_MC_INDEX: /* Input */
2432	{
2433	void *pvSrc;
2434	size_t cbSrc;
2435
2436	RTCircBufAcquireReadBlock(pCircBuf, cbChunk, &pvSrc, &cbSrc);
2437
2438	if (cbSrc)
2439	{
2440	int rc2 = PDMDevHlpPhysWrite(pThis->CTX_SUFF(pDevIns), pRegs->bd.addr, (uint8_t *)pvSrc, cbSrc);
2441	AssertRC(rc2);
2442
2443	#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
2444	RTFILE fh;
2445	RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97DMAWrite.pcm",
2446	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
2447	RTFileWrite(fh, pvSrc, cbSrc, NULL);
2448	RTFileClose(fh);
2449	#endif
2450	}
2451
2452	RTCircBufReleaseReadBlock(pCircBuf, cbSrc);
2453
2454	cbChunk = (uint32_t)cbSrc; /* Update the current chunk size to what really has been read. */
2455	break;
2456	}
2457
2458	default:
2459	AssertMsgFailed(("Stream #%RU8 not supported\n", pStream->u8SD));
2460	rc = VERR_NOT_SUPPORTED;
2461	break;
2462	}
2463
2464	if (RT_FAILURE(rc))
2465	break;
2466
2467	if (cbChunk)
2468	{
2469	cbProcessedTotal += cbChunk;
2470	Assert(cbProcessedTotal <= cbToProcessMax);
2471	Assert(cbLeft >= cbChunk);
2472	cbLeft -= cbChunk;
2473	Assert((cbChunk & 1) == 0); /* Else the following shift won't work */
2474
2475	pRegs->picb -= (cbChunk >> 1); /** @todo r=andy Assumes 16bit samples. */
2476	pRegs->bd.addr += cbChunk;
2477	}
2478
2479	LogFlowFunc(("[SD%RU8] cbChunk=%RU32, cbLeft=%RU32, cbTotal=%RU32, rc=%Rrc\n",
2480	pStream->u8SD, cbChunk, cbLeft, cbProcessedTotal, rc));
2481
2482	if (!pRegs->picb)
2483	{
2484	uint32_t new_sr = pRegs->sr & ~AC97_SR_CELV;
2485
2486	if (pRegs->bd.ctl_len & AC97_BD_IOC)
2487	{
2488	new_sr \|= AC97_SR_BCIS;
2489	}
2490
2491	if (pRegs->civ == pRegs->lvi)
2492	{
2493	/* Did we run out of data? */
2494	LogFunc(("Underrun CIV (%RU8) == LVI (%RU8)\n", pRegs->civ, pRegs->lvi));
2495
2496	new_sr \|= AC97_SR_LVBCI \| AC97_SR_DCH \| AC97_SR_CELV;
2497	pThis->bup_flag = (pRegs->bd.ctl_len & AC97_BD_BUP) ? BUP_LAST : 0;
2498
2499	rc = VINF_EOF;
2500	}
2501	else
2502	{
2503	pRegs->civ = pRegs->piv;
2504	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2505	ichac97StreamFetchBDLE(pThis, pStream);
2506	}
2507
2508	ichac97StreamUpdateSR(pThis, pStream, new_sr);
2509	}
2510
2511	if (/* All data processed? */
2512	rc == VINF_EOF
2513	/* ... or an error occurred? */
2514	\|\| RT_FAILURE(rc))
2515	{
2516	break;
2517	}
2518	}
2519
2520	ichac97StreamUnlock(pStream);
2521
2522	LogFlowFuncLeaveRC(rc);
2523	return rc;
2524	}
2525
2526	/**
2527	* Port I/O Handler for IN operations.
2528	*
2529	* @returns VINF_SUCCESS or VINF_EM_*.
2530	* @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned.
2531	*
2532	* @param pDevIns The device instance.
2533	* @param pvUser User argument.
2534	* @param uPort Port number used for the IN operation.
2535	* @param pu32Val Where to store the result. This is always a 32-bit
2536	* variable regardless of what @a cbVal might say.
2537	* @param cbVal Number of bytes read.
2538	* @remarks Caller enters the device critical section.
2539	*/
2540	static DECLCALLBACK(int) ichac97IOPortNABMRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort,
2541	uint32_t *pu32Val, unsigned cbVal)
2542	{
2543	RT_NOREF(pDevIns);
2544
2545	PAC97STATE pThis = (PAC97STATE)pvUser;
2546
2547	DEVAC97_LOCK(pThis);
2548
2549	/* Get the index of the NABMBAR port. */
2550	const uint32_t uPortIdx = uPort - pThis->IOPortBase[1];
2551
2552	PAC97STREAM pStream = ichac97GetStreamFromIdx(pThis, AC97_PORT2IDX(uPortIdx));
2553	PAC97BMREGS pRegs = NULL;
2554
2555	if (pStream) /* Can be NULL, depending on the index (port). */
2556	pRegs = &pStream->Regs;
2557
2558	int rc = VINF_SUCCESS;
2559
2560	switch (cbVal)
2561	{
2562	case 1:
2563	{
2564	switch (uPortIdx)
2565	{
2566	case AC97_CAS:
2567	/* Codec Access Semaphore Register */
2568	Log3Func(("CAS %d\n", pThis->cas));
2569	*pu32Val = pThis->cas;
2570	pThis->cas = 1;
2571	break;
2572	case PI_CIV:
2573	case PO_CIV:
2574	case MC_CIV:
2575	/* Current Index Value Register */
2576	*pu32Val = pRegs->civ;
2577	Log3Func(("CIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2578	break;
2579	case PI_LVI:
2580	case PO_LVI:
2581	case MC_LVI:
2582	/* Last Valid Index Register */
2583	*pu32Val = pRegs->lvi;
2584	Log3Func(("LVI[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2585	break;
2586	case PI_PIV:
2587	case PO_PIV:
2588	case MC_PIV:
2589	/* Prefetched Index Value Register */
2590	*pu32Val = pRegs->piv;
2591	Log3Func(("PIV[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2592	break;
2593	case PI_CR:
2594	case PO_CR:
2595	case MC_CR:
2596	/* Control Register */
2597	*pu32Val = pRegs->cr;
2598	Log3Func(("CR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2599	break;
2600	case PI_SR:
2601	case PO_SR:
2602	case MC_SR:
2603	/* Status Register (lower part) */
2604	*pu32Val = RT_LO_U8(pRegs->sr);
2605	Log3Func(("SRb[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2606	break;
2607	default:
2608	*pu32Val = UINT32_MAX;
2609	LogFunc(("U nabm readb %#x -> %#x\n", uPort, *pu32Val));
2610	break;
2611	}
2612	break;
2613	}
2614
2615	case 2:
2616	{
2617	switch (uPortIdx)
2618	{
2619	case PI_SR:
2620	case PO_SR:
2621	case MC_SR:
2622	/* Status Register */
2623	*pu32Val = pRegs->sr;
2624	Log3Func(("SR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2625	break;
2626	case PI_PICB:
2627	case PO_PICB:
2628	case MC_PICB:
2629	/* Position in Current Buffer */
2630	*pu32Val = pRegs->picb;
2631	Log3Func(("PICB[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2632	break;
2633	default:
2634	*pu32Val = UINT32_MAX;
2635	LogFunc(("U nabm readw %#x -> %#x\n", uPort, *pu32Val));
2636	break;
2637	}
2638	break;
2639	}
2640
2641	case 4:
2642	{
2643	switch (uPortIdx)
2644	{
2645	case PI_BDBAR:
2646	case PO_BDBAR:
2647	case MC_BDBAR:
2648	/* Buffer Descriptor Base Address Register */
2649	*pu32Val = pRegs->bdbar;
2650	Log3Func(("BMADDR[%d] -> %#x\n", AC97_PORT2IDX(uPortIdx), *pu32Val));
2651	break;
2652	case PI_CIV:
2653	case PO_CIV:
2654	case MC_CIV:
2655	/* 32-bit access: Current Index Value Register +
2656	* Last Valid Index Register +
2657	* Status Register */
2658	pu32Val = pRegs->civ \| (pRegs->lvi << 8) \| (pRegs->sr << 16); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
2659	Log3Func(("CIV LVI SR[%d] -> %#x, %#x, %#x\n",
2660	AC97_PORT2IDX(uPortIdx), pRegs->civ, pRegs->lvi, pRegs->sr));
2661	break;
2662	case PI_PICB:
2663	case PO_PICB:
2664	case MC_PICB:
2665	/* 32-bit access: Position in Current Buffer Register +
2666	* Prefetched Index Value Register +
2667	* Control Register */
2668	pu32Val = pRegs->picb \| (pRegs->piv << 16) \| (pRegs->cr << 24); /* @todo r=andy Use RT_MAKE_U32_FROM_U8. */
2669	Log3Func(("PICB PIV CR[%d] -> %#x %#x %#x %#x\n",
2670	AC97_PORT2IDX(uPortIdx), *pu32Val, pRegs->picb, pRegs->piv, pRegs->cr));
2671	break;
2672	case AC97_GLOB_CNT:
2673	/* Global Control */
2674	*pu32Val = pThis->glob_cnt;
2675	Log3Func(("glob_cnt -> %#x\n", *pu32Val));
2676	break;
2677	case AC97_GLOB_STA:
2678	/* Global Status */
2679	*pu32Val = pThis->glob_sta \| AC97_GS_S0CR;
2680	Log3Func(("glob_sta -> %#x\n", *pu32Val));
2681	break;
2682	default:
2683	*pu32Val = UINT32_MAX;
2684	LogFunc(("U nabm readl %#x -> %#x\n", uPort, *pu32Val));
2685	break;
2686	}
2687	break;
2688	}
2689
2690	default:
2691	{
2692	AssertFailed();
2693	rc = VERR_IOM_IOPORT_UNUSED;
2694	}
2695	}
2696
2697	DEVAC97_UNLOCK(pThis);
2698
2699	return rc;
2700	}
2701
2702	/**
2703	* Port I/O Handler for OUT operations.
2704	*
2705	* @returns VINF_SUCCESS or VINF_EM_*.
2706	*
2707	* @param pDevIns The device instance.
2708	* @param pvUser User argument.
2709	* @param uPort Port number used for the OUT operation.
2710	* @param u32Val The value to output.
2711	* @param cbVal The value size in bytes.
2712	* @remarks Caller enters the device critical section.
2713	*/
2714	static DECLCALLBACK(int) ichac97IOPortNABMWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort,
2715	uint32_t u32Val, unsigned cbVal)
2716	{
2717	RT_NOREF(pDevIns);
2718
2719	PAC97STATE pThis = (PAC97STATE)pvUser;
2720
2721	DEVAC97_LOCK_BOTH_RETURN(pThis, VINF_IOM_R3_IOPORT_WRITE);
2722
2723	/* Get the index of the NABMBAR register. */
2724	const uint32_t uPortIdx = uPort - pThis->IOPortBase[1];
2725
2726	PAC97STREAM pStream = ichac97GetStreamFromIdx(pThis, AC97_PORT2IDX(uPortIdx));
2727	PAC97BMREGS pRegs = NULL;
2728
2729	if (pStream) /* Can be NULL, depending on the index (port). */
2730	pRegs = &pStream->Regs;
2731
2732	switch (cbVal)
2733	{
2734	case 1:
2735	{
2736	switch (uPortIdx)
2737	{
2738	/*
2739	* Last Valid Index.
2740	*/
2741	case PI_LVI:
2742	case PO_LVI:
2743	case MC_LVI:
2744	{
2745	if ( (pRegs->cr & AC97_CR_RPBM)
2746	&& (pRegs->sr & AC97_SR_DCH))
2747	{
2748	pRegs->sr &= ~(AC97_SR_DCH \| AC97_SR_CELV);
2749	pRegs->civ = pRegs->piv;
2750	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2751
2752	ichac97StreamFetchBDLE(pThis, pStream);
2753	}
2754	pRegs->lvi = u32Val % AC97_MAX_BDLE;
2755	Log3Func(("[SD%RU8] LVI <- %#x\n", pStream->u8SD, u32Val));
2756	break;
2757	}
2758
2759	/*
2760	* Control Registers.
2761	*/
2762	case PI_CR:
2763	case PO_CR:
2764	case MC_CR:
2765	{
2766	Log3Func(("[SD%RU8] CR <- %#x (cr %#x)\n", pStream->u8SD, u32Val, pRegs->cr));
2767
2768	if (u32Val & AC97_CR_RR) /* Busmaster reset. */
2769	{
2770	Log3Func(("[SD%RU8] Reset\n", pStream->u8SD));
2771
2772	/* Make sure that Run/Pause Bus Master bit (RPBM) is cleared (0). */
2773	Assert((pRegs->cr & AC97_CR_RPBM) == 0);
2774
2775	ichac97StreamEnable(pThis, pStream, false /* fEnable */);
2776	ichac97StreamReset(pThis, pStream);
2777
2778	ichac97StreamUpdateSR(pThis, pStream, AC97_SR_DCH); /** @todo Do we need to do that? */
2779	}
2780	else
2781	{
2782	pRegs->cr = u32Val & AC97_CR_VALID_MASK;
2783
2784	if (!(pRegs->cr & AC97_CR_RPBM))
2785	{
2786	Log3Func(("[SD%RU8] Disable\n", pStream->u8SD));
2787
2788	ichac97StreamEnable(pThis, pStream, false /* fEnable */);
2789
2790	pRegs->sr \|= AC97_SR_DCH;
2791	}
2792	else
2793	{
2794	Log3Func(("[SD%RU8] Enable\n", pStream->u8SD));
2795
2796	pRegs->civ = pRegs->piv;
2797	pRegs->piv = (pRegs->piv + 1) % AC97_MAX_BDLE;
2798
2799	pRegs->sr &= ~AC97_SR_DCH;
2800
2801	/* Fetch the initial BDLE descriptor. */
2802	ichac97StreamFetchBDLE(pThis, pStream);
2803
2804	ichac97StreamEnable(pThis, pStream, true /* fEnable */);
2805	}
2806	}
2807	break;
2808	}
2809
2810	/*
2811	* Status Registers.
2812	*/
2813	case PI_SR:
2814	case PO_SR:
2815	case MC_SR:
2816	{
2817	pRegs->sr \|= u32Val & ~(AC97_SR_RO_MASK \| AC97_SR_WCLEAR_MASK);
2818	ichac97StreamUpdateSR(pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));
2819	Log3Func(("[SD%RU8] SR <- %#x (sr %#x)\n", pStream->u8SD, u32Val, pRegs->sr));
2820	break;
2821	}
2822
2823	default:
2824	LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
2825	break;
2826	}
2827	break;
2828	}
2829
2830	case 2:
2831	{
2832	switch (uPortIdx)
2833	{
2834	case PI_SR:
2835	case PO_SR:
2836	case MC_SR:
2837	/* Status Register */
2838	pRegs->sr \|= u32Val & ~(AC97_SR_RO_MASK \| AC97_SR_WCLEAR_MASK);
2839	ichac97StreamUpdateSR(pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));
2840	Log3Func(("[SD%RU8] SR <- %#x (sr %#x)\n", pStream->u8SD, u32Val, pRegs->sr));
2841	break;
2842	default:
2843	LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
2844	break;
2845	}
2846	break;
2847	}
2848
2849	case 4:
2850	{
2851	switch (uPortIdx)
2852	{
2853	case PI_BDBAR:
2854	case PO_BDBAR:
2855	case MC_BDBAR:
2856	/* Buffer Descriptor list Base Address Register */
2857	pRegs->bdbar = u32Val & ~3;
2858	Log3Func(("[SD%RU8] BDBAR <- %#x (bdbar %#x)\n", AC97_PORT2IDX(uPortIdx), u32Val, pRegs->bdbar));
2859	break;
2860	case AC97_GLOB_CNT:
2861	/* Global Control */
2862	if (u32Val & AC97_GC_WR)
2863	ichac97WarmReset(pThis);
2864	if (u32Val & AC97_GC_CR)
2865	ichac97ColdReset(pThis);
2866	if (!(u32Val & (AC97_GC_WR \| AC97_GC_CR)))
2867	pThis->glob_cnt = u32Val & AC97_GC_VALID_MASK;
2868	Log3Func(("glob_cnt <- %#x (glob_cnt %#x)\n", u32Val, pThis->glob_cnt));
2869	break;
2870	case AC97_GLOB_STA:
2871	/* Global Status */
2872	pThis->glob_sta &= ~(u32Val & AC97_GS_WCLEAR_MASK);
2873	pThis->glob_sta \|= (u32Val & ~(AC97_GS_WCLEAR_MASK \| AC97_GS_RO_MASK)) & AC97_GS_VALID_MASK;
2874	Log3Func(("glob_sta <- %#x (glob_sta %#x)\n", u32Val, pThis->glob_sta));
2875	break;
2876	default:
2877	LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
2878	break;
2879	}
2880	break;
2881	}
2882
2883	default:
2884	LogRel2(("AC97: Warning: Unimplemented NABMWrite (%u byte) portIdx=%#x <- %#x\n", cbVal, uPortIdx, u32Val));
2885	break;
2886	}
2887
2888	DEVAC97_UNLOCK_BOTH(pThis);
2889
2890	return VINF_SUCCESS;
2891	}
2892
2893	/**
2894	* Port I/O Handler for IN operations.
2895	*
2896	* @returns VINF_SUCCESS or VINF_EM_*.
2897	* @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned.
2898	*
2899	* @param pDevIns The device instance.
2900	* @param pvUser User argument.
2901	* @param uPort Port number used for the IN operation.
2902	* @param pu32Val Where to store the result. This is always a 32-bit
2903	* variable regardless of what @a cbVal might say.
2904	* @param cbVal Number of bytes read.
2905	* @remarks Caller enters the device critical section.
2906	*/
2907	static DECLCALLBACK(int) ichac97IOPortNAMRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32Val, unsigned cbVal)
2908	{
2909	RT_NOREF(pDevIns);
2910	PAC97STATE pThis = (PAC97STATE)pvUser;
2911
2912	DEVAC97_LOCK(pThis);
2913
2914	int rc = VINF_SUCCESS;
2915
2916	uint32_t index = uPort - pThis->IOPortBase[0];
2917
2918	switch (cbVal)
2919	{
2920	case 1:
2921	{
2922	LogRel2(("AC97: Warning: Unimplemented read (%u byte) port=%#x, idx=%RU32\n", cbVal, uPort, index));
2923	pThis->cas = 0;
2924	*pu32Val = UINT32_MAX;
2925	break;
2926	}
2927
2928	case 2:
2929	{
2930	*pu32Val = UINT32_MAX;
2931	pThis->cas = 0;
2932
2933	switch (index)
2934	{
2935	default:
2936	*pu32Val = ichac97MixerGet(pThis, index);
2937	break;
2938	}
2939	break;
2940	}
2941
2942	case 4:
2943	{
2944	LogRel2(("AC97: Warning: Unimplemented read (%u byte) port=%#x, idx=%RU32\n", cbVal, uPort, index));
2945	pThis->cas = 0;
2946	*pu32Val = UINT32_MAX;
2947	break;
2948	}
2949
2950	default:
2951	{
2952	AssertFailed();
2953	rc = VERR_IOM_IOPORT_UNUSED;
2954	}
2955	}
2956
2957	DEVAC97_UNLOCK(pThis);
2958
2959	return rc;
2960	}
2961
2962	/**
2963	* Port I/O Handler for OUT operations.
2964	*
2965	* @returns VINF_SUCCESS or VINF_EM_*.
2966	*
2967	* @param pDevIns The device instance.
2968	* @param pvUser User argument.
2969	* @param uPort Port number used for the OUT operation.
2970	* @param u32Val The value to output.
2971	* @param cbVal The value size in bytes.
2972	* @remarks Caller enters the device critical section.
2973	*/
2974	static DECLCALLBACK(int) ichac97IOPortNAMWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort,
2975	uint32_t u32Val, unsigned cbVal)
2976	{
2977	RT_NOREF(pDevIns);
2978	PAC97STATE pThis = (PAC97STATE)pvUser;
2979
2980	DEVAC97_LOCK_BOTH_RETURN(pThis, VINF_IOM_R3_IOPORT_WRITE);
2981
2982	uint32_t uPortIdx = uPort - pThis->IOPortBase[0];
2983
2984	switch (cbVal)
2985	{
2986	case 1:
2987	{
2988	LogRel2(("AC97: Warning: Unimplemented NAMWrite (%u byte) port=%#x, idx=0x%x <- %#x\n", cbVal, uPort, uPortIdx, u32Val));
2989	pThis->cas = 0;
2990	break;
2991	}
2992
2993	case 2:
2994	{
2995	pThis->cas = 0;
2996	switch (uPortIdx)
2997	{
2998	case AC97_Reset:
2999	ichac97Reset(pThis->CTX_SUFF(pDevIns));
3000	break;
3001	case AC97_Powerdown_Ctrl_Stat:
3002	u32Val &= ~0xf;
3003	u32Val \|= ichac97MixerGet(pThis, uPortIdx) & 0xf;
3004	ichac97MixerSet(pThis, uPortIdx, u32Val);
3005	break;
3006	case AC97_Master_Volume_Mute:
3007	if (pThis->uCodecModel == AC97_CODEC_AD1980)
3008	{
3009	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_LOSEL)
3010	break; /* Register controls surround (rear), do nothing. */
3011	}
3012	ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32Val);
3013	break;
3014	case AC97_Headphone_Volume_Mute:
3015	if (pThis->uCodecModel == AC97_CODEC_AD1980)
3016	{
3017	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL)
3018	{
3019	/* Register controls PCM (front) outputs. */
3020	ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_VOLUME_MASTER, u32Val);
3021	}
3022	}
3023	break;
3024	case AC97_PCM_Out_Volume_Mute:
3025	ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_FRONT, u32Val);
3026	break;
3027	case AC97_Line_In_Volume_Mute:
3028	ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_LINE_IN, u32Val);
3029	break;
3030	case AC97_Record_Select:
3031	ichac97MixerRecordSelect(pThis, u32Val);
3032	break;
3033	case AC97_Record_Gain_Mute:
3034	/* Newer Ubuntu guests rely on that when controlling gain and muting
3035	* the recording (capturing) levels. */
3036	ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_LINE_IN, u32Val);
3037	break;
3038	case AC97_Record_Gain_Mic_Mute:
3039	/* Ditto; see note above. */
3040	ichac97MixerSetVolume(pThis, uPortIdx, PDMAUDIOMIXERCTL_MIC_IN, u32Val);
3041	break;
3042	case AC97_Vendor_ID1:
3043	case AC97_Vendor_ID2:
3044	LogFunc(("Attempt to write vendor ID to %#x\n", u32Val));
3045	break;
3046	case AC97_Extended_Audio_ID:
3047	LogFunc(("Attempt to write extended audio ID to %#x\n", u32Val));
3048	break;
3049	case AC97_Extended_Audio_Ctrl_Stat:
3050	if (!(u32Val & AC97_EACS_VRA))
3051	{
3052	ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate, 48000);
3053	ichac97StreamReOpen(pThis, &pThis->StreamOut);
3054
3055	ichac97MixerSet(pThis, AC97_PCM_LR_ADC_Rate, 48000);
3056	ichac97StreamReOpen(pThis, &pThis->StreamLineIn);
3057	}
3058	else
3059	LogRel2(("AC97: Variable rate audio (VRA) is not supported\n"));
3060
3061	if (!(u32Val & AC97_EACS_VRM))
3062	{
3063	ichac97MixerSet(pThis, AC97_MIC_ADC_Rate, 48000);
3064	ichac97StreamReOpen(pThis, &pThis->StreamMicIn);
3065	}
3066	else
3067	LogRel2(("AC97: Variable rate microphone audio (VRM) is not supported\n"));
3068
3069	LogFunc(("Setting extended audio control to %#x\n", u32Val));
3070	ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, u32Val);
3071	break;
3072	case AC97_PCM_Front_DAC_Rate:
3073	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA)
3074	{
3075	ichac97MixerSet(pThis, uPortIdx, u32Val);
3076	LogFunc(("Set front DAC rate to %RU32\n", u32Val));
3077	ichac97StreamReOpen(pThis, &pThis->StreamOut);
3078	}
3079	else
3080	AssertMsgFailed(("Attempt to set front DAC rate to %RU32, but VRA is not set\n", u32Val));
3081	break;
3082	case AC97_MIC_ADC_Rate:
3083	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRM)
3084	{
3085	ichac97MixerSet(pThis, uPortIdx, u32Val);
3086	LogFunc(("Set MIC ADC rate to %RU32\n", u32Val));
3087	ichac97StreamReOpen(pThis, &pThis->StreamMicIn);
3088	}
3089	else
3090	AssertMsgFailed(("Attempt to set MIC ADC rate to %RU32, but VRM is not set\n", u32Val));
3091	break;
3092	case AC97_PCM_LR_ADC_Rate:
3093	if (ichac97MixerGet(pThis, AC97_Extended_Audio_Ctrl_Stat) & AC97_EACS_VRA)
3094	{
3095	ichac97MixerSet(pThis, uPortIdx, u32Val);
3096	LogFunc(("Set front LR ADC rate to %RU32\n", u32Val));
3097	ichac97StreamReOpen(pThis, &pThis->StreamLineIn);
3098	}
3099	else
3100	AssertMsgFailed(("Attempt to set LR ADC rate to %RU32, but VRA is not set\n", u32Val));
3101	break;
3102	default:
3103	LogRel2(("AC97: Warning: Unimplemented NAMWrite (%u byte) port=%#x, idx=0x%x <- %#x\n", cbVal, uPort, uPortIdx, u32Val));
3104	ichac97MixerSet(pThis, uPortIdx, u32Val);
3105	break;
3106	}
3107	break;
3108	}
3109
3110	case 4:
3111	{
3112	LogRel2(("AC97: Warning: Unimplemented NAMWrite (%u byte) port=%#x, idx=0x%x <- %#x\n", cbVal, uPort, uPortIdx, u32Val));
3113	pThis->cas = 0;
3114	break;
3115	}
3116
3117	default:
3118	AssertMsgFailed(("Unhandled NAMWrite port=%#x, cbVal=%u u32Val=%#x\n", uPort, cbVal, u32Val));
3119	break;
3120	}
3121
3122	DEVAC97_UNLOCK_BOTH(pThis);
3123
3124	return VINF_SUCCESS;
3125	}
3126
3127
3128	/**
3129	* @callback_method_impl{FNPCIIOREGIONMAP}
3130	*/
3131	static DECLCALLBACK(int) ichac97IOPortMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
3132	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
3133	{
3134	RT_NOREF(cb, enmType);
3135
3136	Assert(enmType == PCI_ADDRESS_SPACE_IO);
3137	Assert(cb >= 0x20);
3138
3139	if (iRegion > 1) /* We support 2 regions max. at the moment. */
3140	return VERR_INVALID_PARAMETER;
3141
3142	PAC97STATE pThis = RT_FROM_MEMBER(pPciDev, AC97STATE, PciDev);
3143	RTIOPORT Port = (RTIOPORT)GCPhysAddress;
3144
3145	int rc;
3146	if (iRegion == 0)
3147	rc = PDMDevHlpIOPortRegister(pDevIns, Port, 256, pThis,
3148	ichac97IOPortNAMWrite, ichac97IOPortNAMRead,
3149	NULL, NULL, "ICHAC97 NAM");
3150	else
3151	rc = PDMDevHlpIOPortRegister(pDevIns, Port, 64, pThis,
3152	ichac97IOPortNABMWrite, ichac97IOPortNABMRead,
3153	NULL, NULL, "ICHAC97 NABM");
3154	if (RT_FAILURE(rc))
3155	return rc;
3156
3157	pThis->IOPortBase[iRegion] = Port;
3158	return VINF_SUCCESS;
3159	}
3160
3161	#ifdef IN_RING3
3162	/**
3163	* Saves (serializes) an AC'97 stream using SSM.
3164	*
3165	* @returns IPRT status code.
3166	* @param pDevIns Device instance.
3167	* @param pSSM Saved state manager (SSM) handle to use.
3168	* @param pStream AC'97 stream to save.
3169	*/
3170	static int ichac97SaveStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
3171	{
3172	RT_NOREF(pDevIns);
3173	PAC97BMREGS pRegs = &pStream->Regs;
3174
3175	SSMR3PutU32(pSSM, pRegs->bdbar);
3176	SSMR3PutU8( pSSM, pRegs->civ);
3177	SSMR3PutU8( pSSM, pRegs->lvi);
3178	SSMR3PutU16(pSSM, pRegs->sr);
3179	SSMR3PutU16(pSSM, pRegs->picb);
3180	SSMR3PutU8( pSSM, pRegs->piv);
3181	SSMR3PutU8( pSSM, pRegs->cr);
3182	SSMR3PutS32(pSSM, pRegs->bd_valid);
3183	SSMR3PutU32(pSSM, pRegs->bd.addr);
3184	SSMR3PutU32(pSSM, pRegs->bd.ctl_len);
3185
3186	return VINF_SUCCESS;
3187	}
3188
3189	/**
3190	* @callback_method_impl{FNSSMDEVSAVEEXEC}
3191	*/
3192	static DECLCALLBACK(int) ichac97SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3193	{
3194	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3195
3196	LogFlowFuncEnter();
3197
3198	SSMR3PutU32(pSSM, pThis->glob_cnt);
3199	SSMR3PutU32(pSSM, pThis->glob_sta);
3200	SSMR3PutU32(pSSM, pThis->cas);
3201
3202	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
3203	/* Note: The order the streams are saved here is critical, so don't touch. */
3204	int rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamLineIn);
3205	AssertRC(rc2);
3206	rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamOut);
3207	AssertRC(rc2);
3208	rc2 = ichac97SaveStream(pDevIns, pSSM, &pThis->StreamMicIn);
3209	AssertRC(rc2);
3210
3211	SSMR3PutMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
3212
3213	uint8_t active[AC97SOUNDSOURCE_LAST_INDEX];
3214
3215	active[AC97SOUNDSOURCE_PI_INDEX] = ichac97StreamIsEnabled(pThis, &pThis->StreamLineIn) ? 1 : 0;
3216	active[AC97SOUNDSOURCE_PO_INDEX] = ichac97StreamIsEnabled(pThis, &pThis->StreamOut) ? 1 : 0;
3217	active[AC97SOUNDSOURCE_MC_INDEX] = ichac97StreamIsEnabled(pThis, &pThis->StreamMicIn) ? 1 : 0;
3218
3219	SSMR3PutMem(pSSM, active, sizeof(active));
3220
3221	LogFlowFuncLeaveRC(VINF_SUCCESS);
3222	return VINF_SUCCESS;
3223	}
3224
3225	/**
3226	* Loads an AC'97 stream from SSM.
3227	*
3228	* @returns IPRT status code.
3229	* @param pDevIns Device instance.
3230	* @param pSSM Saved state manager (SSM) handle to use.
3231	* @param pStream AC'97 stream to load.
3232	*/
3233	static int ichac97LoadStream(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, PAC97STREAM pStream)
3234	{
3235	RT_NOREF(pDevIns);
3236	PAC97BMREGS pRegs = &pStream->Regs;
3237
3238	SSMR3GetU32(pSSM, &pRegs->bdbar);
3239	SSMR3GetU8( pSSM, &pRegs->civ);
3240	SSMR3GetU8( pSSM, &pRegs->lvi);
3241	SSMR3GetU16(pSSM, &pRegs->sr);
3242	SSMR3GetU16(pSSM, &pRegs->picb);
3243	SSMR3GetU8( pSSM, &pRegs->piv);
3244	SSMR3GetU8( pSSM, &pRegs->cr);
3245	SSMR3GetS32(pSSM, &pRegs->bd_valid);
3246	SSMR3GetU32(pSSM, &pRegs->bd.addr);
3247	SSMR3GetU32(pSSM, &pRegs->bd.ctl_len);
3248
3249	return VINF_SUCCESS;
3250	}
3251
3252	/**
3253	* @callback_method_impl{FNSSMDEVLOADEXEC}
3254	*/
3255	static DECLCALLBACK(int) ichac97LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3256	{
3257	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3258
3259	LogRel2(("ichac97LoadExec: uVersion=%RU32, uPass=0x%x\n", uVersion, uPass));
3260
3261	AssertMsgReturn (uVersion == AC97_SSM_VERSION, ("%RU32\n", uVersion), VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
3262	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
3263
3264	SSMR3GetU32(pSSM, &pThis->glob_cnt);
3265	SSMR3GetU32(pSSM, &pThis->glob_sta);
3266	SSMR3GetU32(pSSM, &pThis->cas);
3267
3268	/** @todo r=andy For the next saved state version, add unique stream identifiers and a stream count. */
3269	/* Note: The order the streams are loaded here is critical, so don't touch. */
3270	int rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamLineIn);
3271	AssertRC(rc2);
3272	rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamOut);
3273	AssertRC(rc2);
3274	rc2 = ichac97LoadStream(pDevIns, pSSM, &pThis->StreamMicIn);
3275	AssertRC(rc2);
3276
3277	SSMR3GetMem(pSSM, pThis->mixer_data, sizeof(pThis->mixer_data));
3278
3279	/** @todo r=andy Stream IDs are hardcoded to certain streams. */
3280	uint8_t uaStrmsActive[AC97SOUNDSOURCE_LAST_INDEX];
3281	SSMR3GetMem(pSSM, uaStrmsActive, sizeof(uaStrmsActive));
3282
3283	ichac97MixerRecordSelect(pThis, ichac97MixerGet(pThis, AC97_Record_Select));
3284	# define V_(a, b) ichac97MixerSetVolume(pThis, a, b, ichac97MixerGet(pThis, a))
3285	V_(AC97_Master_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER);
3286	V_(AC97_PCM_Out_Volume_Mute, PDMAUDIOMIXERCTL_FRONT);
3287	V_(AC97_Line_In_Volume_Mute, PDMAUDIOMIXERCTL_LINE_IN);
3288	V_(AC97_Mic_Volume_Mute, PDMAUDIOMIXERCTL_MIC_IN);
3289	# undef V_
3290	if (pThis->uCodecModel == AC97_CODEC_AD1980)
3291	if (ichac97MixerGet(pThis, AC97_AD_Misc) & AC97_AD_MISC_HPSEL)
3292	ichac97MixerSetVolume(pThis, AC97_Headphone_Volume_Mute, PDMAUDIOMIXERCTL_VOLUME_MASTER,
3293	ichac97MixerGet(pThis, AC97_Headphone_Volume_Mute));
3294
3295	/** @todo r=andy Stream IDs are hardcoded to certain streams. */
3296	rc2 = ichac97StreamEnable(pThis, &pThis->StreamLineIn, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_PI_INDEX]));
3297	if (RT_SUCCESS(rc2))
3298	rc2 = ichac97StreamEnable(pThis, &pThis->StreamMicIn, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_MC_INDEX]));
3299	if (RT_SUCCESS(rc2))
3300	rc2 = ichac97StreamEnable(pThis, &pThis->StreamOut, RT_BOOL(uaStrmsActive[AC97SOUNDSOURCE_PO_INDEX]));
3301
3302	pThis->bup_flag = 0;
3303	pThis->last_samp = 0;
3304
3305	return VINF_SUCCESS;
3306	}
3307
3308
3309	/**
3310	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3311	*/
3312	static DECLCALLBACK(void ) ichac97QueryInterface(struct PDMIBASE pInterface, const char *pszIID)
3313	{
3314	PAC97STATE pThis = RT_FROM_MEMBER(pInterface, AC97STATE, IBase);
3315	Assert(&pThis->IBase == pInterface);
3316
3317	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3318	return NULL;
3319	}
3320
3321
3322	/**
3323	* Powers off the device.
3324	*
3325	* @param pDevIns Device instance to power off.
3326	*/
3327	static DECLCALLBACK(void) ichac97PowerOff(PPDMDEVINS pDevIns)
3328	{
3329	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3330
3331	LogRel2(("AC97: Powering off ...\n"));
3332
3333	/* Note: Involves mixer stream / sink destruction, so also do this here
3334	* instead of in ichac97Destruct(). */
3335	ichac97StreamsDestroy(pThis);
3336
3337	/**
3338	* Note: Destroy the mixer while powering off and not in ichac97Destruct,
3339	* giving the mixer the chance to release any references held to
3340	* PDM audio streams it maintains.
3341	*/
3342	if (pThis->pMixer)
3343	{
3344	AudioMixerDestroy(pThis->pMixer);
3345	pThis->pMixer = NULL;
3346	}
3347	}
3348
3349
3350	/**
3351	* @interface_method_impl{PDMDEVREG,pfnReset}
3352	*
3353	* @remarks The original sources didn't install a reset handler, but it seems to
3354	* make sense to me so we'll do it.
3355	*/
3356	static DECLCALLBACK(void) ichac97Reset(PPDMDEVINS pDevIns)
3357	{
3358	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3359
3360	LogRel(("AC97: Reset\n"));
3361
3362	/*
3363	* Reset the mixer too. The Windows XP driver seems to rely on
3364	* this. At least it wants to read the vendor id before it resets
3365	* the codec manually.
3366	*/
3367	ichac97MixerReset(pThis);
3368
3369	/*
3370	* Reset all streams.
3371	*/
3372	ichac97StreamEnable(pThis, &pThis->StreamLineIn, false /* fEnable */);
3373	ichac97StreamReset(pThis, &pThis->StreamLineIn);
3374
3375	ichac97StreamEnable(pThis, &pThis->StreamMicIn, false /* fEnable */);
3376	ichac97StreamReset(pThis, &pThis->StreamMicIn);
3377
3378	ichac97StreamEnable(pThis, &pThis->StreamOut, false /* fEnable */);
3379	ichac97StreamReset(pThis, &pThis->StreamOut);
3380
3381	/*
3382	* Reset mixer sinks.
3383	*
3384	* Do the reset here instead of in ichac97StreamReset();
3385	* the mixer sink(s) might still have data to be processed when an audio stream gets reset.
3386	*/
3387	AudioMixerSinkReset(pThis->pSinkLineIn);
3388	AudioMixerSinkReset(pThis->pSinkMicIn);
3389	AudioMixerSinkReset(pThis->pSinkOut);
3390
3391	# ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
3392	/*
3393	* Stop the timer, if any.
3394	*/
3395	ichac97TimerStop(pThis);
3396
3397	pThis->cStreamsActive = 0;
3398	# endif
3399	}
3400
3401
3402	/**
3403	* @interface_method_impl{PDMDEVREG,pfnDestruct}
3404	*/
3405	static DECLCALLBACK(int) ichac97Destruct(PPDMDEVINS pDevIns)
3406	{
3407	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3408
3409	LogFlowFuncEnter();
3410
3411	PAC97DRIVER pDrv, pDrvNext;
3412	RTListForEachSafe(&pThis->lstDrv, pDrv, pDrvNext, AC97DRIVER, Node)
3413	{
3414	RTListNodeRemove(&pDrv->Node);
3415	RTMemFree(pDrv);
3416	}
3417
3418	/* Sanity. */
3419	Assert(RTListIsEmpty(&pThis->lstDrv));
3420
3421	return VINF_SUCCESS;
3422	}
3423
3424
3425	/**
3426	* Attach command, internal version.
3427	*
3428	* This is called to let the device attach to a driver for a specified LUN
3429	* during runtime. This is not called during VM construction, the device
3430	* constructor has to attach to all the available drivers.
3431	*
3432	* @returns VBox status code.
3433	* @param pThis AC'97 state.
3434	* @param uLUN The logical unit which is being detached.
3435	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3436	* @param ppDrv Attached driver instance on success. Optional.
3437	*/
3438	static int ichac97AttachInternal(PAC97STATE pThis, unsigned uLUN, uint32_t fFlags, PAC97DRIVER *ppDrv)
3439	{
3440	RT_NOREF(fFlags);
3441
3442	/*
3443	* Attach driver.
3444	*/
3445	char *pszDesc;
3446	if (RTStrAPrintf(&pszDesc, "Audio driver port (AC'97) for LUN #%u", uLUN) <= 0)
3447	AssertLogRelFailedReturn(VERR_NO_MEMORY);
3448
3449	PPDMIBASE pDrvBase;
3450	int rc = PDMDevHlpDriverAttach(pThis->pDevInsR3, uLUN,
3451	&pThis->IBase, &pDrvBase, pszDesc);
3452	if (RT_SUCCESS(rc))
3453	{
3454	PAC97DRIVER pDrv = (PAC97DRIVER)RTMemAllocZ(sizeof(AC97DRIVER));
3455	if (pDrv)
3456	{
3457	pDrv->pDrvBase = pDrvBase;
3458	pDrv->pConnector = PDMIBASE_QUERY_INTERFACE(pDrvBase, PDMIAUDIOCONNECTOR);
3459	AssertMsg(pDrv->pConnector != NULL, ("Configuration error: LUN #%u has no host audio interface, rc=%Rrc\n", uLUN, rc));
3460	pDrv->pAC97State = pThis;
3461	pDrv->uLUN = uLUN;
3462
3463	/*
3464	* For now we always set the driver at LUN 0 as our primary
3465	* host backend. This might change in the future.
3466	*/
3467	if (pDrv->uLUN == 0)
3468	pDrv->fFlags \|= PDMAUDIODRVFLAGS_PRIMARY;
3469
3470	LogFunc(("LUN#%RU8: pCon=%p, drvFlags=0x%x\n", uLUN, pDrv->pConnector, pDrv->fFlags));
3471
3472	/* Attach to driver list if not attached yet. */
3473	if (!pDrv->fAttached)
3474	{
3475	RTListAppend(&pThis->lstDrv, &pDrv->Node);
3476	pDrv->fAttached = true;
3477	}
3478
3479	if (ppDrv)
3480	*ppDrv = pDrv;
3481	}
3482	else
3483	rc = VERR_NO_MEMORY;
3484	}
3485	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3486	LogFunc(("No attached driver for LUN #%u\n", uLUN));
3487
3488	if (RT_FAILURE(rc))
3489	{
3490	/* Only free this string on failure;
3491	* must remain valid for the live of the driver instance. */
3492	RTStrFree(pszDesc);
3493	}
3494
3495	LogFunc(("uLUN=%u, fFlags=0x%x, rc=%Rrc\n", uLUN, fFlags, rc));
3496	return rc;
3497	}
3498
3499	/**
3500	* Detach command, internal version.
3501	*
3502	* This is called to let the device detach from a driver for a specified LUN
3503	* during runtime.
3504	*
3505	* @returns VBox status code.
3506	* @param pThis AC'97 state.
3507	* @param pDrv Driver to detach device from.
3508	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3509	*/
3510	static int ichac97DetachInternal(PAC97STATE pThis, PAC97DRIVER pDrv, uint32_t fFlags)
3511	{
3512	RT_NOREF(fFlags);
3513
3514	AudioMixerSinkRemoveStream(pThis->pSinkMicIn, pDrv->MicIn.pMixStrm);
3515	AudioMixerStreamDestroy(pDrv->MicIn.pMixStrm);
3516	pDrv->MicIn.pMixStrm = NULL;
3517
3518	AudioMixerSinkRemoveStream(pThis->pSinkLineIn, pDrv->LineIn.pMixStrm);
3519	AudioMixerStreamDestroy(pDrv->LineIn.pMixStrm);
3520	pDrv->LineIn.pMixStrm = NULL;
3521
3522	AudioMixerSinkRemoveStream(pThis->pSinkOut, pDrv->Out.pMixStrm);
3523	AudioMixerStreamDestroy(pDrv->Out.pMixStrm);
3524	pDrv->Out.pMixStrm = NULL;
3525
3526	RTListNodeRemove(&pDrv->Node);
3527
3528	LogFunc(("uLUN=%u, fFlags=0x%x\n", pDrv->uLUN, fFlags));
3529	return VINF_SUCCESS;
3530	}
3531
3532	/**
3533	* @interface_method_impl{PDMDEVREG,pfnAttach}
3534	*/
3535	static DECLCALLBACK(int) ichac97Attach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
3536	{
3537	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3538
3539	LogFunc(("uLUN=%u, fFlags=0x%x\n", uLUN, fFlags));
3540
3541	DEVAC97_LOCK(pThis);
3542
3543	PAC97DRIVER pDrv;
3544	int rc2 = ichac97AttachInternal(pThis, uLUN, fFlags, &pDrv);
3545	if (RT_SUCCESS(rc2))
3546	{
3547	if (DrvAudioHlpStreamCfgIsValid(&pThis->StreamLineIn.State.Cfg))
3548	{
3549	rc2 = ichac97MixerAddDrvStream(pThis, pThis->pSinkLineIn, &pThis->StreamLineIn.State.Cfg, pDrv);
3550	AssertRC(rc2);
3551	}
3552
3553	if (DrvAudioHlpStreamCfgIsValid(&pThis->StreamMicIn.State.Cfg))
3554	{
3555	rc2 = ichac97MixerAddDrvStream(pThis, pThis->pSinkMicIn, &pThis->StreamMicIn.State.Cfg, pDrv);
3556	AssertRC(rc2);
3557	}
3558
3559	if (DrvAudioHlpStreamCfgIsValid(&pThis->StreamOut.State.Cfg))
3560	{
3561	rc2 = ichac97MixerAddDrvStream(pThis, pThis->pSinkOut, &pThis->StreamOut.State.Cfg, pDrv);
3562	AssertRC(rc2);
3563	}
3564	}
3565
3566	DEVAC97_UNLOCK(pThis);
3567
3568	return VINF_SUCCESS;
3569	}
3570
3571	/**
3572	* @interface_method_impl{PDMDEVREG,pfnDetach}
3573	*/
3574	static DECLCALLBACK(void) ichac97Detach(PPDMDEVINS pDevIns, unsigned uLUN, uint32_t fFlags)
3575	{
3576	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3577
3578	LogFunc(("uLUN=%u, fFlags=0x%x\n", uLUN, fFlags));
3579
3580	DEVAC97_LOCK(pThis);
3581
3582	PAC97DRIVER pDrv, pDrvNext;
3583	RTListForEachSafe(&pThis->lstDrv, pDrv, pDrvNext, AC97DRIVER, Node)
3584	{
3585	if (pDrv->uLUN == uLUN)
3586	{
3587	int rc2 = ichac97DetachInternal(pThis, pDrv, fFlags);
3588	if (RT_SUCCESS(rc2))
3589	{
3590	RTMemFree(pDrv);
3591	pDrv = NULL;
3592	}
3593
3594	break;
3595	}
3596	}
3597
3598	DEVAC97_UNLOCK(pThis);
3599	}
3600
3601	/**
3602	* Re-attaches (replaces) a driver with a new driver.
3603	*
3604	* @returns VBox status code.
3605	* @param pThis Device instance.
3606	* @param pDrv Driver instance used for attaching to.
3607	* If NULL is specified, a new driver will be created and appended
3608	* to the driver list.
3609	* @param uLUN The logical unit which is being re-detached.
3610	* @param pszDriver New driver name to attach.
3611	*/
3612	static int ichac97ReattachInternal(PAC97STATE pThis, PAC97DRIVER pDrv, uint8_t uLUN, const char *pszDriver)
3613	{
3614	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
3615	AssertPtrReturn(pszDriver, VERR_INVALID_POINTER);
3616
3617	int rc;
3618
3619	if (pDrv)
3620	{
3621	rc = ichac97DetachInternal(pThis, pDrv, 0 /* fFlags */);
3622	if (RT_SUCCESS(rc))
3623	rc = PDMDevHlpDriverDetach(pThis->pDevInsR3, PDMIBASE_2_PDMDRV(pDrv->pDrvBase), 0 /* fFlags */);
3624
3625	if (RT_FAILURE(rc))
3626	return rc;
3627
3628	pDrv = NULL;
3629	}
3630
3631	PVM pVM = PDMDevHlpGetVM(pThis->pDevInsR3);
3632	PCFGMNODE pRoot = CFGMR3GetRoot(pVM);
3633	PCFGMNODE pDev0 = CFGMR3GetChild(pRoot, "Devices/ichac97/0/");
3634
3635	/* Remove LUN branch. */
3636	CFGMR3RemoveNode(CFGMR3GetChildF(pDev0, "LUN#%u/", uLUN));
3637
3638	#define RC_CHECK() if (RT_FAILURE(rc)) { AssertReleaseRC(rc); break; }
3639
3640	do
3641	{
3642	PCFGMNODE pLunL0;
3643	rc = CFGMR3InsertNodeF(pDev0, &pLunL0, "LUN#%u/", uLUN); RC_CHECK();
3644	rc = CFGMR3InsertString(pLunL0, "Driver", "AUDIO"); RC_CHECK();
3645	rc = CFGMR3InsertNode(pLunL0, "Config/", NULL); RC_CHECK();
3646
3647	PCFGMNODE pLunL1, pLunL2;
3648	rc = CFGMR3InsertNode (pLunL0, "AttachedDriver/", &pLunL1); RC_CHECK();
3649	rc = CFGMR3InsertNode (pLunL1, "Config/", &pLunL2); RC_CHECK();
3650	rc = CFGMR3InsertString(pLunL1, "Driver", pszDriver); RC_CHECK();
3651
3652	rc = CFGMR3InsertString(pLunL2, "AudioDriver", pszDriver); RC_CHECK();
3653
3654	} while (0);
3655
3656	if (RT_SUCCESS(rc))
3657	rc = ichac97AttachInternal(pThis, uLUN, 0 /* fFlags /, NULL / ppDrv */);
3658
3659	LogFunc(("pThis=%p, uLUN=%u, pszDriver=%s, rc=%Rrc\n", pThis, uLUN, pszDriver, rc));
3660
3661	#undef RC_CHECK
3662
3663	return rc;
3664	}
3665
3666	/**
3667	* @interface_method_impl{PDMDEVREG,pfnConstruct}
3668	*/
3669	static DECLCALLBACK(int) ichac97Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
3670	{
3671	RT_NOREF(iInstance);
3672	PAC97STATE pThis = PDMINS_2_DATA(pDevIns, PAC97STATE);
3673
3674	/* NB: This must be done before any possible failure (and running the destructor). */
3675	RTListInit(&pThis->lstDrv);
3676
3677	Assert(iInstance == 0);
3678	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
3679
3680	/*
3681	* Validations.
3682	*/
3683	if (!CFGMR3AreValuesValid(pCfg,
3684	"Codec\0"
3685	"TimerHz\0"))
3686	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3687	N_("Invalid configuration for the AC'97 device"));
3688
3689	/*
3690	* Read config data.
3691	*/
3692	char szCodec[20];
3693	int rc = CFGMR3QueryStringDef(pCfg, "Codec", &szCodec[0], sizeof(szCodec), "STAC9700");
3694	if (RT_FAILURE(rc))
3695	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3696	N_("AC'97 configuration error: Querying \"Codec\" as string failed"));
3697
3698	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
3699	uint16_t uTimerHz;
3700	rc = CFGMR3QueryU16Def(pCfg, "TimerHz", &uTimerHz, AC97_TIMER_HZ /* Default value, if not set. */);
3701	if (RT_FAILURE(rc))
3702	return PDMDEV_SET_ERROR(pDevIns, rc,
3703	N_("AC'97 configuration error: failed to read Hertz (Hz) rate as unsigned integer"));
3704	#endif
3705
3706	/*
3707	* The AD1980 codec (with corresponding PCI subsystem vendor ID) is whitelisted
3708	* in the Linux kernel; Linux makes no attempt to measure the data rate and assumes
3709	* 48 kHz rate, which is exactly what we need. Same goes for AD1981B.
3710	*/
3711	if (!strcmp(szCodec, "STAC9700"))
3712	pThis->uCodecModel = AC97_CODEC_STAC9700;
3713	else if (!strcmp(szCodec, "AD1980"))
3714	pThis->uCodecModel = AC97_CODEC_AD1980;
3715	else if (!strcmp(szCodec, "AD1981B"))
3716	pThis->uCodecModel = AC97_CODEC_AD1981B;
3717	else
3718	{
3719	return PDMDevHlpVMSetError(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, RT_SRC_POS,
3720	N_("AC'97 configuration error: The \"Codec\" value \"%s\" is unsupported"),
3721	szCodec);
3722	}
3723
3724	/*
3725	* Use an own critical section for the device instead of the default
3726	* one provided by PDM. This allows fine-grained locking in combination
3727	* with TM when timer-specific stuff is being called in e.g. the MMIO handlers.
3728	*/
3729	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, RT_SRC_POS, "AC'97");
3730	AssertRCReturn(rc, rc);
3731
3732	rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
3733	AssertRCReturn(rc, rc);
3734
3735	/*
3736	* Initialize data (most of it anyway).
3737	*/
3738	pThis->pDevInsR3 = pDevIns;
3739	/* IBase */
3740	pThis->IBase.pfnQueryInterface = ichac97QueryInterface;
3741
3742	/* PCI Device */
3743	PCIDevSetVendorId (&pThis->PciDev, 0x8086); /* 00 ro - intel. */ Assert(pThis->PciDev.abConfig[0x00] == 0x86); Assert(pThis->PciDev.abConfig[0x01] == 0x80);
3744	PCIDevSetDeviceId (&pThis->PciDev, 0x2415); /* 02 ro - 82801 / 82801aa(?). */ Assert(pThis->PciDev.abConfig[0x02] == 0x15); Assert(pThis->PciDev.abConfig[0x03] == 0x24);
3745	PCIDevSetCommand (&pThis->PciDev, 0x0000); /* 04 rw,ro - pcicmd. */ Assert(pThis->PciDev.abConfig[0x04] == 0x00); Assert(pThis->PciDev.abConfig[0x05] == 0x00);
3746	PCIDevSetStatus (&pThis->PciDev, VBOX_PCI_STATUS_DEVSEL_MEDIUM \| VBOX_PCI_STATUS_FAST_BACK); /* 06 rwc?,ro? - pcists. */ Assert(pThis->PciDev.abConfig[0x06] == 0x80); Assert(pThis->PciDev.abConfig[0x07] == 0x02);
3747	PCIDevSetRevisionId (&pThis->PciDev, 0x01); /* 08 ro - rid. */ Assert(pThis->PciDev.abConfig[0x08] == 0x01);
3748	PCIDevSetClassProg (&pThis->PciDev, 0x00); /* 09 ro - pi. */ Assert(pThis->PciDev.abConfig[0x09] == 0x00);
3749	PCIDevSetClassSub (&pThis->PciDev, 0x01); /* 0a ro - scc; 01 == Audio. */ Assert(pThis->PciDev.abConfig[0x0a] == 0x01);
3750	PCIDevSetClassBase (&pThis->PciDev, 0x04); /* 0b ro - bcc; 04 == multimedia. */ Assert(pThis->PciDev.abConfig[0x0b] == 0x04);
3751	PCIDevSetHeaderType (&pThis->PciDev, 0x00); /* 0e ro - headtyp. */ Assert(pThis->PciDev.abConfig[0x0e] == 0x00);
3752	PCIDevSetBaseAddress (&pThis->PciDev, 0, /* 10 rw - nambar - native audio mixer base. */
3753	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pThis->PciDev.abConfig[0x10] == 0x01); Assert(pThis->PciDev.abConfig[0x11] == 0x00); Assert(pThis->PciDev.abConfig[0x12] == 0x00); Assert(pThis->PciDev.abConfig[0x13] == 0x00);
3754	PCIDevSetBaseAddress (&pThis->PciDev, 1, /* 14 rw - nabmbar - native audio bus mastering. */
3755	true /* fIoSpace /, false / fPrefetchable /, false / f64Bit */, 0x00000000); Assert(pThis->PciDev.abConfig[0x14] == 0x01); Assert(pThis->PciDev.abConfig[0x15] == 0x00); Assert(pThis->PciDev.abConfig[0x16] == 0x00); Assert(pThis->PciDev.abConfig[0x17] == 0x00);
3756	PCIDevSetInterruptLine (&pThis->PciDev, 0x00); /* 3c rw. */ Assert(pThis->PciDev.abConfig[0x3c] == 0x00);
3757	PCIDevSetInterruptPin (&pThis->PciDev, 0x01); /* 3d ro - INTA#. */ Assert(pThis->PciDev.abConfig[0x3d] == 0x01);
3758
3759	if (pThis->uCodecModel == AC97_CODEC_AD1980)
3760	{
3761	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */
3762	PCIDevSetSubSystemId (&pThis->PciDev, 0x0177); /* 2e ro. */
3763	}
3764	else if (pThis->uCodecModel == AC97_CODEC_AD1981B)
3765	{
3766	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x1028); /* 2c ro - Dell.) */
3767	PCIDevSetSubSystemId (&pThis->PciDev, 0x01ad); /* 2e ro. */
3768	}
3769	else
3770	{
3771	PCIDevSetSubSystemVendorId(&pThis->PciDev, 0x8086); /* 2c ro - Intel.) */
3772	PCIDevSetSubSystemId (&pThis->PciDev, 0x0000); /* 2e ro. */
3773	}
3774
3775	/*
3776	* Register the PCI device, it's I/O regions, the timer and the
3777	* saved state item.
3778	*/
3779	rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev);
3780	if (RT_FAILURE(rc))
3781	return rc;
3782
3783	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 256, PCI_ADDRESS_SPACE_IO, ichac97IOPortMap);
3784	if (RT_FAILURE(rc))
3785	return rc;
3786
3787	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 64, PCI_ADDRESS_SPACE_IO, ichac97IOPortMap);
3788	if (RT_FAILURE(rc))
3789	return rc;
3790
3791	rc = PDMDevHlpSSMRegister(pDevIns, AC97_SSM_VERSION, sizeof(*pThis), ichac97SaveExec, ichac97LoadExec);
3792	if (RT_FAILURE(rc))
3793	return rc;
3794
3795	#ifdef VBOX_WITH_AUDIO_AC97_ASYNC_IO
3796	LogRel(("AC97: Asynchronous I/O enabled\n"));
3797	#endif
3798
3799	/*
3800	* Attach driver.
3801	*/
3802	uint8_t uLUN;
3803	for (uLUN = 0; uLUN < UINT8_MAX; ++uLUN)
3804	{
3805	LogFunc(("Trying to attach driver for LUN #%RU8 ...\n", uLUN));
3806	rc = ichac97AttachInternal(pThis, uLUN, 0 /* fFlags /, NULL / ppDrv */);
3807	if (RT_FAILURE(rc))
3808	{
3809	if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3810	rc = VINF_SUCCESS;
3811	else if (rc == VERR_AUDIO_BACKEND_INIT_FAILED)
3812	{
3813	ichac97ReattachInternal(pThis, NULL /* pDrv */, uLUN, "NullAudio");
3814	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
3815	N_("Host audio backend initialization has failed. Selecting the NULL audio backend "
3816	"with the consequence that no sound is audible"));
3817	/* Attaching to the NULL audio backend will never fail. */
3818	rc = VINF_SUCCESS;
3819	}
3820	break;
3821	}
3822	}
3823
3824	LogFunc(("cLUNs=%RU8, rc=%Rrc\n", uLUN, rc));
3825
3826	if (RT_SUCCESS(rc))
3827	{
3828	rc = AudioMixerCreate("AC'97 Mixer", 0 /* uFlags */, &pThis->pMixer);
3829	if (RT_SUCCESS(rc))
3830	{
3831	rc = AudioMixerCreateSink(pThis->pMixer, "[Recording] Line In", AUDMIXSINKDIR_INPUT, &pThis->pSinkLineIn);
3832	AssertRC(rc);
3833	rc = AudioMixerCreateSink(pThis->pMixer, "[Recording] Microphone In", AUDMIXSINKDIR_INPUT, &pThis->pSinkMicIn);
3834	AssertRC(rc);
3835	rc = AudioMixerCreateSink(pThis->pMixer, "[Playback] PCM Output", AUDMIXSINKDIR_OUTPUT, &pThis->pSinkOut);
3836	AssertRC(rc);
3837	}
3838	}
3839
3840	if (RT_SUCCESS(rc))
3841	{
3842	/*
3843	* Create all hardware streams.
3844	*/
3845	rc = ichac97StreamCreate(pThis, &pThis->StreamLineIn, AC97SOUNDSOURCE_PI_INDEX);
3846	if (RT_SUCCESS(rc))
3847	{
3848	rc = ichac97StreamCreate(pThis, &pThis->StreamMicIn, AC97SOUNDSOURCE_MC_INDEX);
3849	if (RT_SUCCESS(rc))
3850	rc = ichac97StreamCreate(pThis, &pThis->StreamOut, AC97SOUNDSOURCE_PO_INDEX);
3851	}
3852
3853	#ifdef VBOX_WITH_AUDIO_AC97_ONETIME_INIT
3854	PAC97DRIVER pDrv;
3855	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
3856	{
3857	/*
3858	* Only primary drivers are critical for the VM to run. Everything else
3859	* might not worth showing an own error message box in the GUI.
3860	*/
3861	if (!(pDrv->fFlags & PDMAUDIODRVFLAGS_PRIMARY))
3862	continue;
3863
3864	PPDMIAUDIOCONNECTOR pCon = pDrv->pConnector;
3865	AssertPtr(pCon);
3866
3867	bool fValidLineIn = AudioMixerStreamIsValid(pDrv->LineIn.pMixStrm);
3868	bool fValidMicIn = AudioMixerStreamIsValid(pDrv->MicIn.pMixStrm);
3869	bool fValidOut = AudioMixerStreamIsValid(pDrv->Out.pMixStrm);
3870
3871	if ( !fValidLineIn
3872	&& !fValidMicIn
3873	&& !fValidOut)
3874	{
3875	LogRel(("AC97: Falling back to NULL backend (no sound audible)\n"));
3876
3877	ichac97Reset(pDevIns);
3878	ichac97ReattachInternal(pThis, pDrv, pDrv->uLUN, "NullAudio");
3879
3880	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
3881	N_("No audio devices could be opened. Selecting the NULL audio backend "
3882	"with the consequence that no sound is audible"));
3883	}
3884	else
3885	{
3886	bool fWarn = false;
3887
3888	PDMAUDIOBACKENDCFG backendCfg;
3889	int rc2 = pCon->pfnGetConfig(pCon, &backendCfg);
3890	if (RT_SUCCESS(rc2))
3891	{
3892	if (backendCfg.cMaxStreamsIn)
3893	{
3894	/* If the audio backend supports two or more input streams at once,
3895	* warn if one of our two inputs (microphone-in and line-in) failed to initialize. */
3896	if (backendCfg.cMaxStreamsIn >= 2)
3897	fWarn = !fValidLineIn \|\| !fValidMicIn;
3898	/* If the audio backend only supports one input stream at once (e.g. pure ALSA, and
3899	* not ALSA via PulseAudio plugin!), only warn if both of our inputs failed to initialize.
3900	* One of the two simply is not in use then. */
3901	else if (backendCfg.cMaxStreamsIn == 1)
3902	fWarn = !fValidLineIn && !fValidMicIn;
3903	/* Don't warn if our backend is not able of supporting any input streams at all. */
3904	}
3905
3906	if ( !fWarn
3907	&& backendCfg.cMaxStreamsOut)
3908	{
3909	fWarn = !fValidOut;
3910	}
3911	}
3912	else
3913	{
3914	LogRel(("AC97: Unable to retrieve audio backend configuration for LUN #%RU8, rc=%Rrc\n", pDrv->uLUN, rc2));
3915	fWarn = true;
3916	}
3917
3918	if (fWarn)
3919	{
3920	char szMissingStreams[255] = "";
3921	size_t len = 0;
3922	if (!fValidLineIn)
3923	{
3924	LogRel(("AC97: WARNING: Unable to open PCM line input for LUN #%RU8!\n", pDrv->uLUN));
3925	len = RTStrPrintf(szMissingStreams, sizeof(szMissingStreams), "PCM Input");
3926	}
3927	if (!fValidMicIn)
3928	{
3929	LogRel(("AC97: WARNING: Unable to open PCM microphone input for LUN #%RU8!\n", pDrv->uLUN));
3930	len += RTStrPrintf(szMissingStreams + len,
3931	sizeof(szMissingStreams) - len, len ? ", PCM Microphone" : "PCM Microphone");
3932	}
3933	if (!fValidOut)
3934	{
3935	LogRel(("AC97: WARNING: Unable to open PCM output for LUN #%RU8!\n", pDrv->uLUN));
3936	len += RTStrPrintf(szMissingStreams + len,
3937	sizeof(szMissingStreams) - len, len ? ", PCM Output" : "PCM Output");
3938	}
3939
3940	PDMDevHlpVMSetRuntimeError(pDevIns, 0 /fFlags/, "HostAudioNotResponding",
3941	N_("Some AC'97 audio streams (%s) could not be opened. Guest applications generating audio "
3942	"output or depending on audio input may hang. Make sure your host audio device "
3943	"is working properly. Check the logfile for error messages of the audio "
3944	"subsystem"), szMissingStreams);
3945	}
3946	}
3947	}
3948	#endif /* VBOX_WITH_AUDIO_AC97_ONETIME_INIT */
3949	}
3950
3951	if (RT_SUCCESS(rc))
3952	ichac97Reset(pDevIns);
3953
3954	#ifndef VBOX_WITH_AUDIO_AC97_CALLBACKS
3955	if (RT_SUCCESS(rc))
3956	{
3957	/* Create the emulation timer.
3958	*
3959	* Note: Use TMCLOCK_VIRTUAL_SYNC here, as the guest's AC'97 driver
3960	* relies on exact (virtual) DMA timing and uses DMA Position Buffers
3961	* instead of the LPIB registers.
3962	*/
3963	rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, ichac97Timer, pThis,
3964	TMTIMER_FLAGS_NO_CRIT_SECT, "AC'97 Timer", &pThis->pTimer);
3965	AssertRCReturn(rc, rc);
3966
3967	/* Use our own critcal section for the device timer.
3968	* That way we can control more fine-grained when to lock what. */
3969	rc = TMR3TimerSetCritSect(pThis->pTimer, &pThis->CritSect);
3970	AssertRCReturn(rc, rc);
3971
3972	pThis->cTimerTicks = TMTimerGetFreq(pThis->pTimer) / uTimerHz;
3973	pThis->uTimerTS = TMTimerGet(pThis->pTimer);
3974	LogFunc(("Timer ticks=%RU64 (%RU16 Hz)\n", pThis->cTimerTicks, uTimerHz));
3975	}
3976	#else /* !VBOX_WITH_AUDIO_AC97_CALLBACKS */
3977	if (RT_SUCCESS(rc))
3978	{
3979	PAC97DRIVER pDrv;
3980	RTListForEach(&pThis->lstDrv, pDrv, AC97DRIVER, Node)
3981	{
3982	/* Only register primary driver.
3983	* The device emulation does the output multiplexing then. */
3984	if (!(pDrv->fFlags & PDMAUDIODRVFLAGS_PRIMARY))
3985	continue;
3986
3987	PDMAUDIOCBRECORD AudioCallbacks[2];
3988
3989	AC97CALLBACKCTX Ctx = { pThis, pDrv };
3990
3991	AudioCallbacks[0].enmType = PDMAUDIOCALLBACKTYPE_INPUT;
3992	AudioCallbacks[0].pfnCallback = ac97CallbackInput;
3993	AudioCallbacks[0].pvCtx = &Ctx;
3994	AudioCallbacks[0].cbCtx = sizeof(AC97CALLBACKCTX);
3995
3996	AudioCallbacks[1].enmType = PDMAUDIOCALLBACKTYPE_OUTPUT;
3997	AudioCallbacks[1].pfnCallback = ac97CallbackOutput;
3998	AudioCallbacks[1].pvCtx = &Ctx;
3999	AudioCallbacks[1].cbCtx = sizeof(AC97CALLBACKCTX);
4000
4001	rc = pDrv->pConnector->pfnRegisterCallbacks(pDrv->pConnector, AudioCallbacks, RT_ELEMENTS(AudioCallbacks));
4002	if (RT_FAILURE(rc))
4003	break;
4004	}
4005	}
4006	#endif /* VBOX_WITH_AUDIO_AC97_CALLBACKS */
4007
4008	#ifdef VBOX_WITH_STATISTICS
4009	if (RT_SUCCESS(rc))
4010	{
4011	/*
4012	* Register statistics.
4013	*/
4014	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatTimer, STAMTYPE_PROFILE, "/Devices/AC97/Timer", STAMUNIT_TICKS_PER_CALL, "Profiling ichac97Timer.");
4015	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatIn, STAMTYPE_PROFILE, "/Devices/AC97/Input", STAMUNIT_TICKS_PER_CALL, "Profiling input.");
4016	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatOut, STAMTYPE_PROFILE, "/Devices/AC97/Output", STAMUNIT_TICKS_PER_CALL, "Profiling output.");
4017	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesRead, STAMTYPE_COUNTER, "/Devices/AC97/BytesRead" , STAMUNIT_BYTES, "Bytes read from AC97 emulation.");
4018	PDMDevHlpSTAMRegister(pDevIns, &pThis->StatBytesWritten, STAMTYPE_COUNTER, "/Devices/AC97/BytesWritten", STAMUNIT_BYTES, "Bytes written to AC97 emulation.");
4019	}
4020	#endif
4021
4022	#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
4023	RTFileDelete(VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97DMARead.pcm");
4024	RTFileDelete(VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97DMAWrite.pcm");
4025	RTFileDelete(VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97StreamRead.pcm");
4026	RTFileDelete(VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "ac97StreamWrite.pcm");
4027	#endif
4028
4029	LogFlowFuncLeaveRC(rc);
4030	return rc;
4031	}
4032
4033	/**
4034	* The device registration structure.
4035	*/
4036	const PDMDEVREG g_DeviceICHAC97 =
4037	{
4038	/* u32Version */
4039	PDM_DEVREG_VERSION,
4040	/* szName */
4041	"ichac97",
4042	/* szRCMod */
4043	"",
4044	/* szR0Mod */
4045	"",
4046	/* pszDescription */
4047	"ICH AC'97 Audio Controller",
4048	/* fFlags */
4049	PDM_DEVREG_FLAGS_DEFAULT_BITS,
4050	/* fClass */
4051	PDM_DEVREG_CLASS_AUDIO,
4052	/* cMaxInstances */
4053	1,
4054	/* cbInstance */
4055	sizeof(AC97STATE),
4056	/* pfnConstruct */
4057	ichac97Construct,
4058	/* pfnDestruct */
4059	ichac97Destruct,
4060	/* pfnRelocate */
4061	NULL,
4062	/* pfnMemSetup */
4063	NULL,
4064	/* pfnPowerOn */
4065	NULL,
4066	/* pfnReset */
4067	ichac97Reset,
4068	/* pfnSuspend */
4069	NULL,
4070	/* pfnResume */
4071	NULL,
4072	/* pfnAttach */
4073	ichac97Attach,
4074	/* pfnDetach */
4075	ichac97Detach,
4076	/* pfnQueryInterface. */
4077	NULL,
4078	/* pfnInitComplete */
4079	NULL,
4080	/* pfnPowerOff */
4081	ichac97PowerOff,
4082	/* pfnSoftReset */
4083	NULL,
4084	/* u32VersionEnd */
4085	PDM_DEVREG_VERSION
4086	};
4087
4088	#endif /* !IN_RING3 */
4089	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

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source: vbox/trunk/src/VBox/Devices/Audio/DevIchAc97.cpp@ 68904

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