DevHDACommon.cpp@ 68388

Last change on this file since 68388 was 68379, checked in by vboxsync, 8 years ago
Audio/DevHDA: Added a WALCLK stale count for strict builds and refined assertions in hdaWalClkSet().
Property svn:executable set to ``*
File size: 23.7 KB

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1	/* $Id$ */
2	/** @file
3	* DevHDACommon.cpp - Shared HDA device functions.
4	*/
5
6	/*
7	* Copyright (C) 2017 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*********************************************************************************************************************************
19	* Header Files *
20	*********************************************************************************************************************************/
21	#include <iprt/assert.h>
22	#include <iprt/err.h>
23
24	#define LOG_GROUP LOG_GROUP_DEV_HDA
25	#include <VBox/log.h>
26
27
28	#include "DevHDA.h"
29	#include "DevHDACommon.h"
30
31	#include "HDAStream.h"
32
33
34	#ifndef DEBUG
35	/**
36	* Processes (de/asserts) the interrupt according to the HDA's current state.
37	*
38	* @returns IPRT status code.
39	* @param pThis HDA state.
40	*/
41	int hdaProcessInterrupt(PHDASTATE pThis)
42	#else
43	/**
44	* Processes (de/asserts) the interrupt according to the HDA's current state.
45	* Debug version.
46	*
47	* @returns IPRT status code.
48	* @param pThis HDA state.
49	* @param pszSource Caller information.
50	*/
51	int hdaProcessInterrupt(PHDASTATE pThis, const char *pszSource)
52	#endif
53	{
54	HDA_REG(pThis, INTSTS) = hdaGetINTSTS(pThis);
55
56	Log3Func(("IRQL=%RU8\n", pThis->u8IRQL));
57
58	/* NB: It is possible to have GIS set even when CIE/SIEn are all zero; the GIS bit does
59	* not control the interrupt signal. See Figure 4 on page 54 of the HDA 1.0a spec.
60	*/
61
62	/* If global interrupt enable (GIE) is set, check if any enabled interrupts are set. */
63	if ( (HDA_REG(pThis, INTCTL) & HDA_INTCTL_GIE)
64	&& (HDA_REG(pThis, INTSTS) & HDA_REG(pThis, INTCTL) & (HDA_INTCTL_CIE \| HDA_STRMINT_MASK)))
65	{
66	if (!pThis->u8IRQL)
67	{
68	#ifdef DEBUG
69	if (!pThis->Dbg.IRQ.tsProcessedLastNs)
70	pThis->Dbg.IRQ.tsProcessedLastNs = RTTimeNanoTS();
71
72	const uint64_t tsLastElapsedNs = RTTimeNanoTS() - pThis->Dbg.IRQ.tsProcessedLastNs;
73
74	if (!pThis->Dbg.IRQ.tsAssertedNs)
75	pThis->Dbg.IRQ.tsAssertedNs = RTTimeNanoTS();
76
77	const uint64_t tsAssertedElapsedNs = RTTimeNanoTS() - pThis->Dbg.IRQ.tsAssertedNs;
78
79	pThis->Dbg.IRQ.cAsserted++;
80	pThis->Dbg.IRQ.tsAssertedTotalNs += tsAssertedElapsedNs;
81
82	const uint64_t avgAssertedUs = (pThis->Dbg.IRQ.tsAssertedTotalNs / pThis->Dbg.IRQ.cAsserted) / 1000;
83
84	if (avgAssertedUs > (1000 / HDA_TIMER_HZ) /* ms / 1000) /* Exceeds time slot? */
85	Log3Func(("Asserted (%s): %zuus elapsed (%zuus on average) -- %zuus alternation delay\n",
86	pszSource, tsAssertedElapsedNs / 1000,
87	avgAssertedUs,
88	(pThis->Dbg.IRQ.tsDeassertedNs - pThis->Dbg.IRQ.tsAssertedNs) / 1000));
89	#endif
90	Log3Func(("Asserted (%s): %RU64us between alternation (WALCLK=%RU64)\n",
91	pszSource, tsLastElapsedNs / 1000, pThis->u64WalClk));
92
93	PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 1 /* Assert */);
94	pThis->u8IRQL = 1;
95
96	#ifdef DEBUG
97	pThis->Dbg.IRQ.tsAssertedNs = RTTimeNanoTS();
98	pThis->Dbg.IRQ.tsProcessedLastNs = pThis->Dbg.IRQ.tsAssertedNs;
99	#endif
100	}
101	}
102	else
103	{
104	if (pThis->u8IRQL)
105	{
106	#ifdef DEBUG
107	if (!pThis->Dbg.IRQ.tsProcessedLastNs)
108	pThis->Dbg.IRQ.tsProcessedLastNs = RTTimeNanoTS();
109
110	const uint64_t tsLastElapsedNs = RTTimeNanoTS() - pThis->Dbg.IRQ.tsProcessedLastNs;
111
112	if (!pThis->Dbg.IRQ.tsDeassertedNs)
113	pThis->Dbg.IRQ.tsDeassertedNs = RTTimeNanoTS();
114
115	const uint64_t tsDeassertedElapsedNs = RTTimeNanoTS() - pThis->Dbg.IRQ.tsDeassertedNs;
116
117	pThis->Dbg.IRQ.cDeasserted++;
118	pThis->Dbg.IRQ.tsDeassertedTotalNs += tsDeassertedElapsedNs;
119
120	const uint64_t avgDeassertedUs = (pThis->Dbg.IRQ.tsDeassertedTotalNs / pThis->Dbg.IRQ.cDeasserted) / 1000;
121
122	if (avgDeassertedUs > (1000 / HDA_TIMER_HZ) /* ms / 1000) /* Exceeds time slot? */
123	Log3Func(("Deasserted (%s): %zuus elapsed (%zuus on average)\n",
124	pszSource, tsDeassertedElapsedNs / 1000, avgDeassertedUs));
125
126	Log3Func(("Deasserted (%s): %RU64us between alternation (WALCLK=%RU64)\n",
127	pszSource, tsLastElapsedNs / 1000, pThis->u64WalClk));
128	#endif
129	PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 0 /* Deassert */);
130	pThis->u8IRQL = 0;
131
132	#ifdef DEBUG
133	pThis->Dbg.IRQ.tsDeassertedNs = RTTimeNanoTS();
134	pThis->Dbg.IRQ.tsProcessedLastNs = pThis->Dbg.IRQ.tsDeassertedNs;
135	#endif
136	}
137	}
138
139	return VINF_SUCCESS;
140	}
141
142	/**
143	* Retrieves the currently set value for the wall clock.
144	*
145	* @return IPRT status code.
146	* @return Currently set wall clock value.
147	* @param pThis HDA state.
148	*
149	* @remark Operation is atomic.
150	*/
151	uint64_t hdaWalClkGetCurrent(PHDASTATE pThis)
152	{
153	return ASMAtomicReadU64(&pThis->u64WalClk);
154	}
155
156	#ifdef IN_RING3
157	/**
158	* Sets the actual WALCLK register to the specified wall clock value.
159	* The specified wall clock value only will be set (unless fForce is set to true) if all
160	* handled HDA streams have passed (in time) that value. This guarantees that the WALCLK
161	* register stays in sync with all handled HDA streams.
162	*
163	* @return true if the WALCLK register has been updated, false if not.
164	* @param pThis HDA state.
165	* @param u64WalClk Wall clock value to set WALCLK register to.
166	* @param fForce Whether to force setting the wall clock value or not.
167	*/
168	bool hdaWalClkSet(PHDASTATE pThis, uint64_t u64WalClk, bool fForce)
169	{
170	const bool fFrontPassed = hdaStreamPeriodHasPassedAbsWalClk (&hdaGetStreamFromSink(pThis, &pThis->SinkFront)->State.Period,
171	u64WalClk);
172	const uint64_t u64FrontAbsWalClk = hdaStreamPeriodGetAbsElapsedWalClk(&hdaGetStreamFromSink(pThis, &pThis->SinkFront)->State.Period);
173	#ifdef VBOX_WITH_AUDIO_HDA_51_SURROUND
174	# error "Implement me!"
175	#endif
176
177	const bool fLineInPassed = hdaStreamPeriodHasPassedAbsWalClk (&hdaGetStreamFromSink(pThis, &pThis->SinkLineIn)->State.Period, u64WalClk);
178	const uint64_t u64LineInAbsWalClk = hdaStreamPeriodGetAbsElapsedWalClk(&hdaGetStreamFromSink(pThis, &pThis->SinkLineIn)->State.Period);
179	#ifdef VBOX_WITH_HDA_MIC_IN
180	const bool fMicInPassed = hdaStreamPeriodHasPassedAbsWalClk (&hdaGetStreamFromSink(pThis, &pThis->SinkMicIn)->State.Period, u64WalClk);
181	const uint64_t u64MicInAbsWalClk = hdaStreamPeriodGetAbsElapsedWalClk(&hdaGetStreamFromSink(pThis, &pThis->SinkMicIn)->State.Period);
182	#endif
183
184	#ifdef VBOX_STRICT
185	const uint64_t u64WalClkCur = ASMAtomicReadU64(&pThis->u64WalClk);
186	#endif
187	uint64_t u64WalClkSet = u64WalClk;
188
189	/* Only drive the WALCLK register forward if all (active) stream periods have passed
190	* the specified point in time given by u64WalClk. */
191	if ( ( fFrontPassed
192	#ifdef VBOX_WITH_AUDIO_HDA_51_SURROUND
193	# error "Implement me!"
194	#endif
195	&& fLineInPassed
196	#ifdef VBOX_WITH_HDA_MIC_IN
197	&& fMicInPassed
198	#endif
199	)
200	\|\| fForce)
201	{
202	if (!fForce)
203	{
204	/* Get the maximum value of all periods we need to handle.
205	* Not the most elegant solution, but works for now ... */
206	u64WalClk = RT_MAX(u64WalClkSet, u64FrontAbsWalClk);
207	#ifdef VBOX_WITH_AUDIO_HDA_51_SURROUND
208	# error "Implement me!"
209	#endif
210	u64WalClk = RT_MAX(u64WalClkSet, u64LineInAbsWalClk);
211	#ifdef VBOX_WITH_HDA_MIC_IN
212	u64WalClk = RT_MAX(u64WalClkSet, u64MicInAbsWalClk);
213	#endif
214
215	#ifdef VBOX_STRICT
216	Assert(u64WalClkSet >= u64WalClkCur); /* Setting WALCLK to a value going backwards does not make any sense. */
217	if (u64WalClkSet == u64WalClkCur) /* Setting a stale value? */
218	{
219	if (pThis->u8WalClkStaleCnt++ > 3)
220	AssertMsgFailed(("Setting WALCLK to a stale value (%RU64) too often isn't a good idea really. "
221	"Good luck with stuck audio stuff.\n", u64WalClkSet));
222	}
223	else
224	pThis->u8WalClkStaleCnt = 0;
225	#endif
226	}
227
228	/* Set the new WALCLK value. */
229	ASMAtomicWriteU64(&pThis->u64WalClk, u64WalClkSet);
230	}
231
232	const uint64_t u64WalClkNew = hdaWalClkGetCurrent(pThis);
233
234	Log3Func(("Cur: %RU64, New: %RU64 (force %RTbool) -> %RU64 %s\n",
235	u64WalClkCur, u64WalClk, fForce,
236	u64WalClkNew, u64WalClkNew == u64WalClk ? "[OK]" : "[DELAYED]"));
237
238	return (u64WalClkNew == u64WalClk);
239	}
240
241	/**
242	* Returns the audio direction of a specified stream descriptor.
243	*
244	* The register layout specifies that input streams (SDI) come first,
245	* followed by the output streams (SDO). So every stream ID below HDA_MAX_SDI
246	* is an input stream, whereas everything >= HDA_MAX_SDI is an output stream.
247	*
248	* Note: SDnFMT register does not provide that information, so we have to judge
249	* for ourselves.
250	*
251	* @return Audio direction.
252	*/
253	PDMAUDIODIR hdaGetDirFromSD(uint8_t uSD)
254	{
255	AssertReturn(uSD < HDA_MAX_STREAMS, PDMAUDIODIR_UNKNOWN);
256
257	if (uSD < HDA_MAX_SDI)
258	return PDMAUDIODIR_IN;
259
260	return PDMAUDIODIR_OUT;
261	}
262
263	/**
264	* Returns the HDA stream of specified stream descriptor number.
265	*
266	* @return Pointer to HDA stream, or NULL if none found.
267	*/
268	PHDASTREAM hdaGetStreamFromSD(PHDASTATE pThis, uint8_t uSD)
269	{
270	AssertPtrReturn(pThis, NULL);
271	AssertReturn(uSD < HDA_MAX_STREAMS, NULL);
272
273	if (uSD >= HDA_MAX_STREAMS)
274	{
275	AssertMsgFailed(("Invalid / non-handled SD%RU8\n", uSD));
276	return NULL;
277	}
278
279	return &pThis->aStreams[uSD];
280	}
281
282	/**
283	* Returns the HDA stream of specified HDA sink.
284	*
285	* @return Pointer to HDA stream, or NULL if none found.
286	*/
287	PHDASTREAM hdaGetStreamFromSink(PHDASTATE pThis, PHDAMIXERSINK pSink)
288	{
289	AssertPtrReturn(pThis, NULL);
290	AssertPtrReturn(pSink, NULL);
291
292	/** @todo Do something with the channel mapping here? */
293	return hdaGetStreamFromSD(pThis, pSink->uSD);
294	}
295
296	/**
297	* Reads DMA data from a given HDA output stream into its associated FIFO buffer.
298	*
299	* @return IPRT status code.
300	* @param pThis HDA state.
301	* @param pStream HDA output stream to read DMA data from.
302	* @param cbToRead How much (in bytes) to read from DMA.
303	* @param pcbRead Returns read bytes from DMA. Optional.
304	*/
305	int hdaDMARead(PHDASTATE pThis, PHDASTREAM pStream, uint32_t cbToRead, uint32_t *pcbRead)
306	{
307	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
308	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
309	/* pcbRead is optional. */
310
311	int rc = VINF_SUCCESS;
312
313	uint32_t cbReadTotal = 0;
314
315	PHDABDLE pBDLE = &pStream->State.BDLE;
316	PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
317	AssertPtr(pCircBuf);
318
319	#ifdef HDA_DEBUG_SILENCE
320	uint64_t csSilence = 0;
321
322	pStream->Dbg.cSilenceThreshold = 100;
323	pStream->Dbg.cbSilenceReadMin = _1M;
324	#endif
325
326	while (cbToRead)
327	{
328	/* Make sure we only copy as much as the stream's FIFO can hold (SDFIFOS, 18.2.39). */
329	void *pvBuf;
330	size_t cbBuf;
331	RTCircBufAcquireWriteBlock(pCircBuf, RT_MIN(cbToRead, pStream->u16FIFOS), &pvBuf, &cbBuf);
332
333	if (cbBuf)
334	{
335	/*
336	* Read from the current BDLE's DMA buffer.
337	*/
338	int rc2 = PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns),
339	pBDLE->Desc.u64BufAdr + pBDLE->State.u32BufOff + cbReadTotal, pvBuf, cbBuf);
340	AssertRC(rc2);
341
342	#ifdef HDA_DEBUG_SILENCE
343	uint16_t pu16Buf = (uint16_t )pvBuf;
344	for (size_t i = 0; i < cbBuf / sizeof(uint16_t); i++)
345	{
346	if (*pu16Buf == 0)
347	{
348	csSilence++;
349	}
350	else
351	break;
352	pu16Buf++;
353	}
354	#endif
355
356	#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
357	if (cbBuf)
358	{
359	RTFILE fh;
360	rc2 = RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "hdaDMARead.pcm",
361	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
362	if (RT_SUCCESS(rc2))
363	{
364	RTFileWrite(fh, pvBuf, cbBuf, NULL);
365	RTFileClose(fh);
366	}
367	else
368	AssertRC(rc2);
369	}
370	#endif
371
372	#if 0
373	pStream->Dbg.cbReadTotal += cbBuf;
374	const uint64_t cbWritten = ASMAtomicReadU64(&pStream->Dbg.cbWrittenTotal);
375	Log3Func(("cbRead=%RU64, cbWritten=%RU64 -> %RU64 bytes %s\n",
376	pStream->Dbg.cbReadTotal, cbWritten,
377	pStream->Dbg.cbReadTotal >= cbWritten ? pStream->Dbg.cbReadTotal - cbWritten : cbWritten - pStream->Dbg.cbReadTotal,
378	pStream->Dbg.cbReadTotal > cbWritten ? "too much" : "too little"));
379	#endif
380
381	#ifdef VBOX_WITH_STATISTICS
382	STAM_COUNTER_ADD(&pThis->StatBytesRead, cbBuf);
383	#endif
384	}
385
386	RTCircBufReleaseWriteBlock(pCircBuf, cbBuf);
387
388	if (!cbBuf)
389	{
390	rc = VERR_BUFFER_OVERFLOW;
391	break;
392	}
393
394	cbReadTotal += (uint32_t)cbBuf;
395	Assert(pBDLE->State.u32BufOff + cbReadTotal <= pBDLE->Desc.u32BufSize);
396
397	Assert(cbToRead >= cbBuf);
398	cbToRead -= (uint32_t)cbBuf;
399	}
400
401	#ifdef HDA_DEBUG_SILENCE
402
403	if (csSilence)
404	pStream->Dbg.csSilence += csSilence;
405
406	if ( csSilence == 0
407	&& pStream->Dbg.csSilence > pStream->Dbg.cSilenceThreshold
408	&& pStream->Dbg.cbReadTotal >= pStream->Dbg.cbSilenceReadMin)
409	{
410	LogFunc(("Silent block detected: %RU64 audio samples\n", pStream->Dbg.csSilence));
411	pStream->Dbg.csSilence = 0;
412	}
413	#endif
414
415	if (RT_SUCCESS(rc))
416	{
417	if (pcbRead)
418	*pcbRead = cbReadTotal;
419	}
420
421	return rc;
422	}
423
424	/**
425	* Writes audio data from an HDA input stream's FIFO to its associated DMA area.
426	*
427	* @return IPRT status code.
428	* @param pThis HDA state.
429	* @param pStream HDA input stream to write audio data to.
430	* @param cbToWrite How much (in bytes) to write.
431	* @param pcbWritten Returns written bytes on success. Optional.
432	*/
433	int hdaDMAWrite(PHDASTATE pThis, PHDASTREAM pStream, uint32_t cbToWrite, uint32_t *pcbWritten)
434	{
435	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
436	AssertPtrReturn(pStream, VERR_INVALID_POINTER);
437	/* pcbWritten is optional. */
438
439	PHDABDLE pBDLE = &pStream->State.BDLE;
440	PRTCIRCBUF pCircBuf = pStream->State.pCircBuf;
441	AssertPtr(pCircBuf);
442
443	int rc = VINF_SUCCESS;
444
445	uint32_t cbWrittenTotal = 0;
446
447	void *pvBuf = NULL;
448	size_t cbBuf = 0;
449
450	uint8_t abSilence[HDA_FIFO_MAX + 1] = { 0 };
451
452	while (cbToWrite)
453	{
454	size_t cbChunk = RT_MIN(cbToWrite, pStream->u16FIFOS);
455
456	size_t cbBlock = 0;
457	RTCircBufAcquireReadBlock(pCircBuf, cbChunk, &pvBuf, &cbBlock);
458
459	if (cbBlock)
460	{
461	cbBuf = cbBlock;
462	}
463	else /* No audio data available? Send silence. */
464	{
465	pvBuf = &abSilence;
466	cbBuf = cbChunk;
467	}
468
469	/* Sanity checks. */
470	Assert(cbBuf <= pBDLE->Desc.u32BufSize - pBDLE->State.u32BufOff);
471	Assert(cbBuf % HDA_FRAME_SIZE == 0);
472	Assert((cbBuf >> 1) >= 1);
473
474	#ifdef VBOX_AUDIO_DEBUG_DUMP_PCM_DATA
475	RTFILE fh;
476	RTFileOpen(&fh, VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH "hdaDMAWrite.pcm",
477	RTFILE_O_OPEN_CREATE \| RTFILE_O_APPEND \| RTFILE_O_WRITE \| RTFILE_O_DENY_NONE);
478	RTFileWrite(fh, pvBuf, cbBuf, NULL);
479	RTFileClose(fh);
480	#endif
481	int rc2 = PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns),
482	pBDLE->Desc.u64BufAdr + pBDLE->State.u32BufOff + cbWrittenTotal,
483	pvBuf, cbBuf);
484	AssertRC(rc2);
485
486	#ifdef VBOX_WITH_STATISTICS
487	STAM_COUNTER_ADD(&pThis->StatBytesWritten, cbBuf);
488	#endif
489	if (cbBlock)
490	RTCircBufReleaseReadBlock(pCircBuf, cbBlock);
491
492	Assert(cbToWrite >= cbBuf);
493	cbToWrite -= (uint32_t)cbBuf;
494
495	cbWrittenTotal += (uint32_t)cbBuf;
496	}
497
498	if (RT_SUCCESS(rc))
499	{
500	if (pcbWritten)
501	*pcbWritten = cbWrittenTotal;
502	}
503	else
504	LogFunc(("Failed with %Rrc\n", rc));
505
506	return rc;
507	}
508	#endif /* IN_RING3 */
509
510	/**
511	* Returns a new INTSTS value based on the current device state.
512	*
513	* @returns Determined INTSTS register value.
514	* @param pThis HDA state.
515	*
516	* @remark This function does not set INTSTS!
517	*/
518	uint32_t hdaGetINTSTS(PHDASTATE pThis)
519	{
520	uint32_t intSts = 0;
521
522	/* Check controller interrupts (RIRB, STATEST). */
523	if ( (HDA_REG(pThis, RIRBSTS) & HDA_REG(pThis, RIRBCTL) & (HDA_RIRBCTL_ROIC \| HDA_RIRBCTL_RINTCTL))
524	/* SDIN State Change Status Flags (SCSF). */
525	\|\| (HDA_REG(pThis, STATESTS) & HDA_STATESTS_SCSF_MASK))
526	{
527	intSts \|= HDA_INTSTS_CIS; /* Set the Controller Interrupt Status (CIS). */
528	}
529
530	if (HDA_REG(pThis, STATESTS) & HDA_REG(pThis, WAKEEN))
531	{
532	intSts \|= HDA_INTSTS_CIS; /* Touch Controller Interrupt Status (CIS). */
533	}
534
535	/* For each stream, check if any interrupt status bit is set and enabled. */
536	for (uint8_t iStrm = 0; iStrm < HDA_MAX_STREAMS; ++iStrm)
537	{
538	if (HDA_STREAM_REG(pThis, STS, iStrm) & HDA_STREAM_REG(pThis, CTL, iStrm) & (HDA_SDCTL_DEIE \| HDA_SDCTL_FEIE \| HDA_SDCTL_IOCE))
539	{
540	Log3Func(("[SD%d] interrupt status set\n", iStrm));
541	intSts \|= RT_BIT(iStrm);
542	}
543	}
544
545	if (intSts)
546	intSts \|= HDA_INTSTS_GIS; /* Set the Global Interrupt Status (GIS). */
547
548	Log3Func(("-> 0x%x\n", intSts));
549
550	return intSts;
551	}
552
553	/**
554	* Converts an HDA stream's SDFMT register into a given PCM properties structure.
555	*
556	* @return IPRT status code.
557	* @param u32SDFMT The HDA stream's SDFMT value to convert.
558	* @param pProps PCM properties structure to hold converted result on success.
559	*/
560	int hdaSDFMTToPCMProps(uint32_t u32SDFMT, PPDMAUDIOPCMPROPS pProps)
561	{
562	AssertPtrReturn(pProps, VERR_INVALID_POINTER);
563
564	# define EXTRACT_VALUE(v, mask, shift) ((v & ((mask) << (shift))) >> (shift))
565
566	int rc = VINF_SUCCESS;
567
568	uint32_t u32Hz = EXTRACT_VALUE(u32SDFMT, HDA_SDFMT_BASE_RATE_MASK, HDA_SDFMT_BASE_RATE_SHIFT)
569	? 44100 : 48000;
570	uint32_t u32HzMult = 1;
571	uint32_t u32HzDiv = 1;
572
573	switch (EXTRACT_VALUE(u32SDFMT, HDA_SDFMT_MULT_MASK, HDA_SDFMT_MULT_SHIFT))
574	{
575	case 0: u32HzMult = 1; break;
576	case 1: u32HzMult = 2; break;
577	case 2: u32HzMult = 3; break;
578	case 3: u32HzMult = 4; break;
579	default:
580	LogFunc(("Unsupported multiplier %x\n",
581	EXTRACT_VALUE(u32SDFMT, HDA_SDFMT_MULT_MASK, HDA_SDFMT_MULT_SHIFT)));
582	rc = VERR_NOT_SUPPORTED;
583	break;
584	}
585	switch (EXTRACT_VALUE(u32SDFMT, HDA_SDFMT_DIV_MASK, HDA_SDFMT_DIV_SHIFT))
586	{
587	case 0: u32HzDiv = 1; break;
588	case 1: u32HzDiv = 2; break;
589	case 2: u32HzDiv = 3; break;
590	case 3: u32HzDiv = 4; break;
591	case 4: u32HzDiv = 5; break;
592	case 5: u32HzDiv = 6; break;
593	case 6: u32HzDiv = 7; break;
594	case 7: u32HzDiv = 8; break;
595	default:
596	LogFunc(("Unsupported divisor %x\n",
597	EXTRACT_VALUE(u32SDFMT, HDA_SDFMT_DIV_MASK, HDA_SDFMT_DIV_SHIFT)));
598	rc = VERR_NOT_SUPPORTED;
599	break;
600	}
601
602	uint8_t cBits = 0;
603	switch (EXTRACT_VALUE(u32SDFMT, HDA_SDFMT_BITS_MASK, HDA_SDFMT_BITS_SHIFT))
604	{
605	case 0:
606	cBits = 8;
607	break;
608	case 1:
609	cBits = 16;
610	break;
611	case 4:
612	cBits = 32;
613	break;
614	default:
615	AssertMsgFailed(("Unsupported bits per sample %x\n",
616	EXTRACT_VALUE(u32SDFMT, HDA_SDFMT_BITS_MASK, HDA_SDFMT_BITS_SHIFT)));
617	rc = VERR_NOT_SUPPORTED;
618	break;
619	}
620
621	if (RT_SUCCESS(rc))
622	{
623	RT_BZERO(pProps, sizeof(PDMAUDIOPCMPROPS));
624
625	pProps->cBits = cBits;
626	pProps->fSigned = true;
627	pProps->cChannels = (u32SDFMT & 0xf) + 1;
628	pProps->uHz = u32Hz * u32HzMult / u32HzDiv;
629	pProps->cShift = PDMAUDIOPCMPROPS_MAKE_SHIFT_PARMS(pProps->cBits, pProps->cChannels);
630	}
631
632	# undef EXTRACT_VALUE
633	return rc;
634	}
635
636	#ifdef IN_RING3
637	/**
638	* Fetches a Bundle Descriptor List Entry (BDLE) from the DMA engine.
639	*
640	* @param pThis Pointer to HDA state.
641	* @param pBDLE Where to store the fetched result.
642	* @param u64BaseDMA Address base of DMA engine to use.
643	* @param u16Entry BDLE entry to fetch.
644	*/
645	int hdaBDLEFetch(PHDASTATE pThis, PHDABDLE pBDLE, uint64_t u64BaseDMA, uint16_t u16Entry)
646	{
647	AssertPtrReturn(pThis, VERR_INVALID_POINTER);
648	AssertPtrReturn(pBDLE, VERR_INVALID_POINTER);
649	AssertReturn(u64BaseDMA, VERR_INVALID_PARAMETER);
650
651	if (!u64BaseDMA)
652	{
653	LogRel2(("HDA: Unable to fetch BDLE #%RU16 - no base DMA address set (yet)\n", u16Entry));
654	return VERR_NOT_FOUND;
655	}
656	/** @todo Compare u16Entry with LVI. */
657
658	int rc = PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), u64BaseDMA + (u16Entry * sizeof(HDABDLEDESC)),
659	&pBDLE->Desc, sizeof(pBDLE->Desc));
660
661	if (RT_SUCCESS(rc))
662	{
663	/* Reset internal state. */
664	RT_ZERO(pBDLE->State);
665	pBDLE->State.u32BDLIndex = u16Entry;
666	}
667
668	Log3Func(("Entry #%d @ 0x%x: %R[bdle], rc=%Rrc\n", u16Entry, u64BaseDMA + (u16Entry * sizeof(HDABDLEDESC)), pBDLE, rc));
669
670
671	return VINF_SUCCESS;
672	}
673
674	/**
675	* Tells whether a given BDLE is complete or not.
676	*
677	* @return true if BDLE is complete, false if not.
678	* @param pBDLE BDLE to retrieve status for.
679	*/
680	bool hdaBDLEIsComplete(PHDABDLE pBDLE)
681	{
682	bool fIsComplete = false;
683
684	if ( !pBDLE->Desc.u32BufSize /* There can be BDLEs with 0 size. */
685	\|\| (pBDLE->State.u32BufOff >= pBDLE->Desc.u32BufSize))
686	{
687	Assert(pBDLE->State.u32BufOff == pBDLE->Desc.u32BufSize);
688	fIsComplete = true;
689	}
690
691	Log3Func(("%R[bdle] => %s\n", pBDLE, fIsComplete ? "COMPLETE" : "INCOMPLETE"));
692
693	return fIsComplete;
694	}
695
696	/**
697	* Tells whether a given BDLE needs an interrupt or not.
698	*
699	* @return true if BDLE needs an interrupt, false if not.
700	* @param pBDLE BDLE to retrieve status for.
701	*/
702	bool hdaBDLENeedsInterrupt(PHDABDLE pBDLE)
703	{
704	return (pBDLE->Desc.fFlags & HDA_BDLE_FLAG_IOC);
705	}
706	#endif /* IN_RING3 */
707

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source: vbox/trunk/src/VBox/Devices/Audio/DevHDACommon.cpp@ 68388

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