VirtualBox

source: vbox/trunk/src/VBox/Devices/Audio/DevHDA.h@ 87758

Last change on this file since 87758 was 87758, checked in by vboxsync, 4 years ago

Audio/HDA: Lots more code in the hope to resolve issue ticketoem2ref:36, namely:

  • Decoupled async I/O timing from guest driver-specific DMA timing to further reduce EMT workload.
  • Added data transfer heuristics (based on set-up DMA buffers) to detect Windows 10 guests (enabled by default).
  • Also expose and support 16kHz + 22,5kHz streams (16-bit signed).

Only tested on Win10 20H2 and various Ubuntu guests so far.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 9.5 KB
Line 
1/* $Id: DevHDA.h 87758 2021-02-15 12:14:09Z vboxsync $ */
2/** @file
3 * DevHDA.h - VBox Intel HD Audio Controller.
4 */
5
6/*
7 * Copyright (C) 2016-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VBOX_INCLUDED_SRC_Audio_DevHDA_h
19#define VBOX_INCLUDED_SRC_Audio_DevHDA_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <iprt/path.h>
25
26#include <VBox/vmm/pdmdev.h>
27
28#include "AudioMixer.h"
29
30#include "HDACodec.h"
31#include "HDAStream.h"
32#include "HDAStreamMap.h"
33#include "HDAStreamPeriod.h"
34
35#ifdef DEBUG_andy
36/** Enables strict mode, which checks for stuff which isn't supposed to happen.
37 * Be prepared for assertions coming in! */
38# define HDA_STRICT
39#endif
40
41/**
42 * HDA mixer sink definition (ring-3).
43 *
44 * Its purpose is to know which audio mixer sink is bound to which SDn
45 * (SDI/SDO) device stream.
46 *
47 * This is needed in order to handle interleaved streams (that is, multiple
48 * channels in one stream) or non-interleaved streams (each channel has a
49 * dedicated stream).
50 *
51 * This is only known to the actual device emulation level.
52 */
53typedef struct HDAMIXERSINK
54{
55 R3PTRTYPE(PHDASTREAM) pStreamShared;
56 R3PTRTYPE(PHDASTREAMR3) pStreamR3;
57 /** Pointer to the actual audio mixer sink. */
58 R3PTRTYPE(PAUDMIXSINK) pMixSink;
59} HDAMIXERSINK;
60/** Pointer to an HDA mixer sink definition (ring-3). */
61typedef HDAMIXERSINK *PHDAMIXERSINK;
62
63/**
64 * Mapping a stream tag to an HDA stream (ring-3).
65 */
66typedef struct HDATAG
67{
68 /** Own stream tag. */
69 uint8_t uTag;
70 uint8_t Padding[7];
71 /** Pointer to associated stream. */
72 R3PTRTYPE(PHDASTREAMR3) pStreamR3;
73} HDATAG;
74/** Pointer to a HDA stream tag mapping. */
75typedef HDATAG *PHDATAG;
76
77/**
78 * Shared ICH Intel HD audio controller state.
79 */
80typedef struct HDASTATE
81{
82 /** Critical section protecting the HDA state. */
83 PDMCRITSECT CritSect;
84 /** The HDA's register set. */
85 uint32_t au32Regs[HDA_NUM_REGS];
86 /** Internal stream states. */
87 HDASTREAM aStreams[HDA_MAX_STREAMS];
88 /** CORB buffer base address. */
89 uint64_t u64CORBBase;
90 /** RIRB buffer base address. */
91 uint64_t u64RIRBBase;
92 /** DMA base address.
93 * Made out of DPLBASE + DPUBASE (3.3.32 + 3.3.33). */
94 uint64_t u64DPBase;
95 /** Size in bytes of CORB buffer (#au32CorbBuf). */
96 uint32_t cbCorbBuf;
97 /** Size in bytes of RIRB buffer (#au64RirbBuf). */
98 uint32_t cbRirbBuf;
99 /** Response Interrupt Count (RINTCNT). */
100 uint16_t u16RespIntCnt;
101 /** Position adjustment (in audio frames).
102 *
103 * This is not an official feature of the HDA specs, but used by
104 * certain OS drivers (e.g. snd_hda_intel) to work around certain
105 * quirks by "real" HDA hardware implementations.
106 *
107 * The position adjustment specifies how many audio frames
108 * a stream is ahead from its actual reading/writing position when
109 * starting a stream.
110 */
111 uint16_t cPosAdjustFrames;
112 /** Whether the position adjustment is enabled or not. */
113 bool fPosAdjustEnabled;
114 /** Whether data transfer heuristics are enabled or not.
115 * This tries to determine the approx. data rate a guest audio driver expects. */
116 bool fTransferHeuristicsEnabled;
117 /** DMA position buffer enable bit. */
118 bool fDMAPosition;
119 /** Current IRQ level. */
120 uint8_t u8IRQL;
121#ifdef VBOX_STRICT
122 /** Wall clock (WALCLK) stale count.
123 * This indicates the number of set wall clock values which did not actually
124 * move the counter forward (stale). */
125 uint8_t u8WalClkStaleCnt;
126#else
127 uint8_t bPadding1;
128#endif
129 /** The device timer Hz rate. Defaults to HDA_TIMER_HZ_DEFAULT. */
130 uint16_t uTimerHz;
131 /** Buffer size (in ms) of the internal input FIFO buffer.
132 * The actual buffer size in bytes will depend on the actual stream configuration. */
133 uint16_t cbCircBufInMs;
134 /** Buffer size (in ms) of the internal output FIFO buffer.
135 * The actual buffer size in bytes will depend on the actual stream configuration. */
136 uint16_t cbCircBufOutMs;
137 /** Padding for alignment. */
138 uint16_t u16Padding3;
139 /** Last updated wall clock (WALCLK) counter. */
140 uint64_t u64WalClk;
141 /** The CORB buffer. */
142 uint32_t au32CorbBuf[HDA_CORB_SIZE];
143 /** Pointer to RIRB buffer. */
144 uint64_t au64RirbBuf[HDA_RIRB_SIZE];
145
146 /** PCI Region \#0: 16KB of MMIO stuff. */
147 IOMMMIOHANDLE hMmio;
148
149#ifdef VBOX_WITH_STATISTICS
150 STAMPROFILE StatIn;
151 STAMPROFILE StatOut;
152 STAMCOUNTER StatBytesRead;
153 STAMCOUNTER StatBytesWritten;
154
155 /** @name Register statistics.
156 * The array members run parallel to g_aHdaRegMap.
157 * @{ */
158 STAMCOUNTER aStatRegReads[HDA_NUM_REGS];
159 STAMCOUNTER aStatRegReadsToR3[HDA_NUM_REGS];
160 STAMCOUNTER aStatRegWrites[HDA_NUM_REGS];
161 STAMCOUNTER aStatRegWritesToR3[HDA_NUM_REGS];
162 STAMCOUNTER StatRegMultiReadsRZ;
163 STAMCOUNTER StatRegMultiReadsR3;
164 STAMCOUNTER StatRegMultiWritesRZ;
165 STAMCOUNTER StatRegMultiWritesR3;
166 STAMCOUNTER StatRegSubWriteRZ;
167 STAMCOUNTER StatRegSubWriteR3;
168 STAMCOUNTER StatRegUnknownReads;
169 STAMCOUNTER StatRegUnknownWrites;
170 STAMCOUNTER StatRegWritesBlockedByReset;
171 STAMCOUNTER StatRegWritesBlockedByRun;
172 /** @} */
173#endif
174
175#ifdef DEBUG
176 /** Debug stuff.
177 * @todo Make STAM values out some of this? */
178 struct
179 {
180# if 0 /* unused */
181 /** Timestamp (in ns) of the last timer callback (hdaTimer).
182 * Used to calculate the time actually elapsed between two timer callbacks. */
183 uint64_t tsTimerLastCalledNs;
184# endif
185 /** IRQ debugging information. */
186 struct
187 {
188 /** Timestamp (in ns) of last processed (asserted / deasserted) IRQ. */
189 uint64_t tsProcessedLastNs;
190 /** Timestamp (in ns) of last asserted IRQ. */
191 uint64_t tsAssertedNs;
192# if 0 /* unused */
193 /** How many IRQs have been asserted already. */
194 uint64_t cAsserted;
195 /** Accumulated elapsed time (in ns) of all IRQ being asserted. */
196 uint64_t tsAssertedTotalNs;
197 /** Timestamp (in ns) of last deasserted IRQ. */
198 uint64_t tsDeassertedNs;
199 /** How many IRQs have been deasserted already. */
200 uint64_t cDeasserted;
201 /** Accumulated elapsed time (in ns) of all IRQ being deasserted. */
202 uint64_t tsDeassertedTotalNs;
203# endif
204 } IRQ;
205 } Dbg;
206#endif
207 /** This is for checking that the build was correctly configured in all contexts.
208 * This is set to HDASTATE_ALIGNMENT_CHECK_MAGIC. */
209 uint64_t uAlignmentCheckMagic;
210} HDASTATE;
211/** Pointer to a shared HDA device state. */
212typedef HDASTATE *PHDASTATE;
213
214/** Value for HDASTATE:uAlignmentCheckMagic. */
215#define HDASTATE_ALIGNMENT_CHECK_MAGIC UINT64_C(0x1298afb75893e059)
216
217
218/**
219 * Ring-3 ICH Intel HD audio controller state.
220 */
221typedef struct HDASTATER3
222{
223 /** Internal stream states. */
224 HDASTREAMR3 aStreams[HDA_MAX_STREAMS];
225 /** Mapping table between stream tags and stream states. */
226 HDATAG aTags[HDA_MAX_TAGS];
227 /** Number of active (running) SDn streams. */
228 uint8_t cStreamsActive;
229 uint8_t abPadding0[7];
230 /** R3 Pointer to the device instance. */
231 PPDMDEVINSR3 pDevIns;
232 /** The base interface for LUN\#0. */
233 PDMIBASE IBase;
234 /** Pointer to HDA codec to use. */
235 R3PTRTYPE(PHDACODEC) pCodec;
236 /** List of associated LUN drivers (HDADRIVER). */
237 RTLISTANCHORR3 lstDrv;
238 /** The device' software mixer. */
239 R3PTRTYPE(PAUDIOMIXER) pMixer;
240 /** HDA sink for (front) output. */
241 HDAMIXERSINK SinkFront;
242#ifdef VBOX_WITH_AUDIO_HDA_51_SURROUND
243 /** HDA sink for center / LFE output. */
244 HDAMIXERSINK SinkCenterLFE;
245 /** HDA sink for rear output. */
246 HDAMIXERSINK SinkRear;
247#endif
248 /** HDA mixer sink for line input. */
249 HDAMIXERSINK SinkLineIn;
250#ifdef VBOX_WITH_AUDIO_HDA_MIC_IN
251 /** Audio mixer sink for microphone input. */
252 HDAMIXERSINK SinkMicIn;
253#endif
254 /** Debug stuff. */
255 struct
256 {
257 /** Whether debugging is enabled or not. */
258 bool fEnabled;
259 /** Path where to dump the debug output to.
260 * Defaults to VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH. */
261 R3PTRTYPE(char *) pszOutPath;
262 } Dbg;
263} HDASTATER3;
264/** Pointer to a ring-3 HDA device state. */
265typedef HDASTATER3 *PHDASTATER3;
266
267
268#endif /* !VBOX_INCLUDED_SRC_Audio_DevHDA_h */
269
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