1 | /* $Id: DevCodec.h 35487 2011-01-11 13:45:20Z vboxsync $ */
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2 | /** @file
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3 | * DevCodec - VBox ICH Intel HD Audio Codec.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2008 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | */
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17 | #ifndef DEV_CODEC_H
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18 | #define DEV_CODEC_H
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19 | struct CODECState;
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20 | struct INTELHDLinkState;
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21 |
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22 | typedef DECLCALLBACK(int) FNCODECVERBPROCESSOR(struct CODECState *pState, uint32_t cmd, uint64_t *pResp);
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23 | typedef FNCODECVERBPROCESSOR *PFNCODECVERBPROCESSOR;
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24 | typedef FNCODECVERBPROCESSOR **PPFNCODECVERBPROCESSOR;
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25 |
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26 | /* RPM 5.3.1 */
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27 | #define CODEC_RESPONSE_UNSOLICITED RT_BIT_64(34)
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28 |
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29 | #define CODEC_CAD_MASK 0xF0000000
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30 | #define CODEC_CAD_SHIFT 28
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31 | #define CODEC_DIRECT_MASK RT_BIT(27)
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32 | #define CODEC_NID_MASK 0x07F00000
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33 | #define CODEC_NID_SHIFT 20
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34 | #define CODEC_VERBDATA_MASK 0x000FFFFF
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35 | #define CODEC_VERB_4BIT_CMD 0x000FFFF0
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36 | #define CODEC_VERB_4BIT_DATA 0x0000000F
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37 | #define CODEC_VERB_8BIT_CMD 0x000FFF00
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38 | #define CODEC_VERB_8BIT_DATA 0x000000FF
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39 | #define CODEC_VERB_16BIT_CMD 0x000F0000
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40 | #define CODEC_VERB_16BIT_DATA 0x0000FFFF
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41 |
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42 | #define CODEC_CAD(cmd) ((cmd) & CODEC_CAD_MASK)
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43 | #define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK)
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44 | #define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT)
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45 | #define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK)
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46 | #define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x))
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47 | #define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4))
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48 | #define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8))
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49 | #define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16))
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50 |
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51 | #define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15)
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52 | #define CODEC_VERB_GET_AMP_SIDE RT_BIT(13)
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53 | #define CODEC_VERB_GET_AMP_INDEX 0x7
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54 |
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55 | /* HDA spec 7.3.3.7 NoteA */
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56 | #define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15)
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57 | #define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13)
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58 | #define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX))
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59 |
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60 | /* HDA spec 7.3.3.7 NoteC */
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61 | #define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15)
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62 | #define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14)
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63 | #define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13)
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64 | #define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12)
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65 | #define CODEC_VERB_SET_AMP_INDEX (0x7 << 8)
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66 |
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67 | #define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0)
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68 | #define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0)
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69 | #define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0)
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70 | #define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0)
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71 | #define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7)
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72 |
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73 | /* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */
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74 | /* VendorID (7.3.4.1) */
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75 | #define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID))
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76 | /* RevisionID (7.3.4.2)*/
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77 | #define CODEC_MAKE_F00_02(MajRev, MinRev, RevisionID, SteppingID) (((MajRev) << 20)|((MinRev) << 16)|((RevisionID) << 8)|(SteppingID))
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78 | /* Subordinate node count (7.3.4.3)*/
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79 | #define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF))
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80 | /*
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81 | * Function Group Type (7.3.4.4)
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82 | * 0 & [0x3-0x7f] are reserved types
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83 | * [0x80 - 0xff] are vendor defined function groups
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84 | */
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85 | #define CODEC_MAKE_F00_05(UnSol, NodeType) ((UnSol)|(NodeType))
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86 | #define CODEC_F00_05_UNSOL RT_BIT(8)
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87 | #define CODEC_F00_05_AFG (0x1)
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88 | #define CODEC_F00_05_MFG (0x2)
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89 | /* Audio Function Group capabilities (7.3.4.5) */
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90 | #define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((BeepGen)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF))
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91 | #define CODEC_F00_08_BEEP_GEN RT_BIT(16)
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92 |
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93 | /* Widget Capabilities (7.3.4.6) */
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94 | #define CODEC_MAKE_F00_09(type, delay, chanel_count) \
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95 | ( (((type) & 0xF) << 20) \
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96 | | (((delay) & 0xF) << 16) \
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97 | | (((chanel_count) & 0xF) << 13))
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98 | /* note: types 0x8-0xe are reserved */
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99 | #define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0)
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100 | #define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1)
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101 | #define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2)
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102 | #define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3)
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103 | #define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4)
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104 | #define CODEC_F00_09_TYPE_POWER_WIDGET (0x5)
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105 | #define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6)
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106 | #define CODEC_F00_09_TYPE_BEEP_GEN (0x7)
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107 | #define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF)
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108 |
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109 | #define CODEC_F00_09_CAP_CP RT_BIT(12)
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110 | #define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11)
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111 | #define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10)
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112 | #define CODEC_F00_09_CAP_DIGITAL RT_BIT(9)
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113 | #define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8)
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114 | #define CODEC_F00_09_CAP_UNSOL RT_BIT(7)
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115 | #define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6)
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116 | #define CODEC_F00_09_CAP_STRIPE RT_BIT(5)
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117 | #define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4)
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118 | #define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3)
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119 | #define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2)
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120 | #define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1)
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121 | #define CODEC_F00_09_CAP_LSB RT_BIT(0)
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122 |
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123 | /* Supported PCM size, rates (7.3.4.7) */
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124 | #define CODEC_F00_0A_32_BIT RT_BIT(19)
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125 | #define CODEC_F00_0A_24_BIT RT_BIT(18)
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126 | #define CODEC_F00_0A_16_BIT RT_BIT(17)
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127 | #define CODEC_F00_0A_8_BIT RT_BIT(16)
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128 |
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129 | #define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11)
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130 | #define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10)
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131 | #define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9)
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132 | #define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8)
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133 | #define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7)
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134 | #define CODEC_F00_0A_48KHZ RT_BIT(6)
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135 | #define CODEC_F00_0A_44_1KHZ RT_BIT(5)
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136 | /* 2/3 * 48kHz */
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137 | #define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4)
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138 | /* 1/2 * 44.1kHz */
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139 | #define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3)
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140 | /* 1/3 * 48kHz */
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141 | #define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2)
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142 | /* 1/4 * 44.1kHz */
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143 | #define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1)
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144 | /* 1/6 * 48kHz */
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145 | #define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0)
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146 |
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147 | /* Supported streams formats (7.3.4.8) */
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148 | #define CODEC_F00_0B_AC3 RT_BIT(2)
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149 | #define CODEC_F00_0B_FLOAT32 RT_BIT(1)
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150 | #define CODEC_F00_0B_PCM RT_BIT(0)
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151 |
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152 | /* Pin Capabilities (7.3.4.9)*/
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153 | #define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8)
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154 | #define CODEC_F00_0C_CAP_HBR RT_BIT(27)
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155 | #define CODEC_F00_0C_CAP_DP RT_BIT(24)
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156 | #define CODEC_F00_0C_CAP_EAPD RT_BIT(16)
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157 | #define CODEC_F00_0C_CAP_HDMI RT_BIT(7)
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158 | #define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6)
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159 | #define CODEC_F00_0C_CAP_INPUT RT_BIT(5)
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160 | #define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4)
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161 | #define CODEC_F00_0C_CAP_HP RT_BIT(3)
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162 | #define CODEC_F00_0C_CAP_PRESENSE_DETECT RT_BIT(2)
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163 | #define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1)
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164 | #define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0)
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165 |
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166 | /* Amplifier capabilities (7.3.4.10) */
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167 | #define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \
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168 | ( (((mute_cap) & 0x1) << 31) \
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169 | | (((step_size) & 0xFF) << 16) \
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170 | | (((num_steps) & 0xFF) << 8) \
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171 | | ((offset) & 0xFF))
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172 |
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173 | /* Connection list lenght (7.3.4.11) */
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174 | #define CODEC_MAKE_F00_0E(long_form, length) \
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175 | ( (((long_form) & 0x1) << 7) \
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176 | | ((length) & 0x7F))
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177 | /* Supported Power States (7.3.4.12) */
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178 | #define CODEC_F00_0F_EPSS RT_BIT(31)
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179 | #define CODEC_F00_0F_CLKSTOP RT_BIT(30)
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180 | #define CODEC_F00_0F_S3D3 RT_BIT(29)
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181 | #define CODEC_F00_0F_D3COLD RT_BIT(4)
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182 | #define CODEC_F00_0F_D3 RT_BIT(3)
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183 | #define CODEC_F00_0F_D2 RT_BIT(2)
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184 | #define CODEC_F00_0F_D1 RT_BIT(1)
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185 | #define CODEC_F00_0F_D0 RT_BIT(0)
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186 |
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187 | /* CP/IO Count (7.3.4.14) */
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188 | #define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \
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189 | ( (((wake) & 0x1) << 31) \
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190 | | (((unsol) & 0x1) << 30) \
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191 | | (((numgpi) & 0xFF) << 16) \
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192 | | (((numgpo) & 0xFF) << 8) \
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193 | | ((numgpio) & 0xFF))
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194 |
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195 | /* Power States (7.3.3.10) */
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196 | #define CODEC_MAKE_F05(reset, stopok, error, act, set) \
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197 | ( (((reset) & 0x1) << 10) \
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198 | | (((stopok) & 0x1) << 9) \
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199 | | (((error) & 0x1) << 8) \
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200 | | (((act) & 0x7) << 4) \
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201 | | ((set) & 0x7))
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202 | #define CODEC_F05_D3COLD (4)
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203 | #define CODEC_F05_D3 (3)
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204 | #define CODEC_F05_D2 (2)
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205 | #define CODEC_F05_D1 (1)
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206 | #define CODEC_F05_D0 (0)
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207 |
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208 | #define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0)
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209 | #define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0)
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210 | #define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0)
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211 | #define CODEC_F05_ACT(value) (((value) & 0x7) >> 4)
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212 | #define CODEC_F05_SET(value) (((value) & 0x7))
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213 |
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214 | /* Pin Widged Control (7.3.3.13) */
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215 | #define CODEC_F07_VREF_HIZ (0)
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216 | #define CODEC_F07_VREF_50 (0x1)
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217 | #define CODEC_F07_VREF_GROUND (0x2)
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218 | #define CODEC_F07_VREF_80 (0x4)
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219 | #define CODEC_F07_VREF_100 (0x5)
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220 | #define CODEC_F07_IN_ENABLE RT_BIT(5)
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221 | #define CODEC_F07_OUT_ENABLE RT_BIT(6)
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222 | #define CODEC_F07_OUT_H_ENABLE RT_BIT(7)
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223 |
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224 | /* Converter formats (7.3.3.8) and (3.7.1) */
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225 | #define CODEC_MAKE_A(fNonPCM, f44_1BaseRate, mult, div, bits, chan) \
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226 | ( (((fNonPCM) & 0x1) << 15) \
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227 | | (((f44_1BaseRate) & 0x1) << 14) \
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228 | | (((mult) & 0x7) << 11) \
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229 | | (((div) & 0x7) << 8) \
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230 | | (((bits) & 0x7) << 4) \
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231 | | ((chan) & 0xF))
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232 |
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233 | #define CODEC_A_MULT_1X (0)
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234 | #define CODEC_A_MULT_2X (1)
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235 | #define CODEC_A_MULT_3X (2)
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236 | #define CODEC_A_MULT_4X (3)
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237 |
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238 | #define CODEC_A_DIV_1X (0)
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239 | #define CODEC_A_DIV_2X (1)
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240 | #define CODEC_A_DIV_3X (2)
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241 | #define CODEC_A_DIV_4X (3)
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242 | #define CODEC_A_DIV_5X (4)
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243 | #define CODEC_A_DIV_6X (5)
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244 | #define CODEC_A_DIV_7X (6)
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245 | #define CODEC_A_DIV_8X (7)
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246 |
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247 | #define CODEC_A_8_BIT (0)
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248 | #define CODEC_A_16_BIT (1)
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249 | #define CODEC_A_20_BIT (2)
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250 | #define CODEC_A_24_BIT (3)
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251 | #define CODEC_A_32_BIT (4)
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252 |
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253 | /* Pin Sense (7.3.3.15) */
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254 | #define CODEC_MAKE_F09_ANALOG(fPresent, impedance) \
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255 | ( (((fPresent) & 0x1) << 31) \
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256 | | (((impedance) & 0x7FFFFFFF)))
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257 | #define CODEC_F09_ANALOG_NA 0x7FFFFFFF
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258 | #define CODEC_MAKE_F09_DIGITAL(fPresent, fELDValid) \
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259 | ( (((fPresent) & 0x1) << 31) \
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260 | | (((fELDValid) & 0x1) << 30))
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261 |
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262 | /* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */
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263 | /* Configuration's port connection */
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264 | #define CODEC_F1C_PORT_MASK (0x3)
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265 | #define CODEC_F1C_PORT_SHIFT (30)
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266 |
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267 | #define CODEC_F1C_PORT_COMPLEX (0x0)
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268 | #define CODEC_F1C_PORT_NO_PHYS (0x1)
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269 | #define CODEC_F1C_PORT_FIXED (0x2)
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270 | #define CODEC_F1C_BOTH (0x3)
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271 |
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272 | /* Configuration's location */
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273 | #define CODEC_F1C_LOCATION_MASK (0x3F)
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274 | #define CODEC_F1C_LOCATION_SHIFT (24)
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275 | /* [4:5] bits of location region means chassis attachment */
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276 | #define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0)
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277 | #define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4)
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278 | #define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5)
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279 | #define CODEC_F1C_LOCATION_OTHER (RT_BIT(5))
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280 |
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281 | /* [0:3] bits of location region means geometry location attachment */
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282 | #define CODEC_F1C_LOCATION_NA (0)
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283 | #define CODEC_F1C_LOCATION_REAR (0x1)
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284 | #define CODEC_F1C_LOCATION_FRONT (0x2)
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285 | #define CODEC_F1C_LOCATION_LEFT (0x3)
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286 | #define CODEC_F1C_LOCATION_RIGTH (0x4)
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287 | #define CODEC_F1C_LOCATION_TOP (0x5)
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288 | #define CODEC_F1C_LOCATION_BOTTOM (0x6)
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289 | #define CODEC_F1C_LOCATION_SPECIAL_0 (0x7)
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290 | #define CODEC_F1C_LOCATION_SPECIAL_1 (0x8)
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291 | #define CODEC_F1C_LOCATION_SPECIAL_3 (0x9)
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292 |
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293 | /* Configuration's devices */
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294 | #define CODEC_F1C_DEVICE_MASK (0xF)
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295 | #define CODEC_F1C_DEVICE_SHIFT (20)
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296 | #define CODEC_F1C_DEVICE_LINE_OUT (0)
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297 | #define CODEC_F1C_DEVICE_SPEAKER (0x1)
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298 | #define CODEC_F1C_DEVICE_HP (0x2)
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299 | #define CODEC_F1C_DEVICE_CD (0x3)
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300 | #define CODEC_F1C_DEVICE_SPDIF_OUT (0x4)
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301 | #define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5)
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302 | #define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6)
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303 | #define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7)
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304 | #define CODEC_F1C_DEVICE_LINE_IN (0x8)
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305 | #define CODEC_F1C_DEVICE_AUX (0x9)
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306 | #define CODEC_F1C_DEVICE_MIC (0xA)
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307 | #define CODEC_F1C_DEVICE_PHONE (0xB)
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308 | #define CODEC_F1C_DEVICE_SPDIF_IN (0xC)
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309 | #define CODEC_F1C_DEVICE_RESERVED (0xE)
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310 | #define CODEC_F1C_DEVICE_OTHER (0xF)
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311 |
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312 | /* Configuration's Connection type */
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313 | #define CODEC_F1C_CONNECTION_TYPE_MASK (0xF)
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314 | #define CODEC_F1C_CONNECTION_TYPE_SHIFT (16)
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315 |
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316 | #define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0)
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317 | #define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1)
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318 | #define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2)
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319 | #define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3)
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320 | #define CODEC_F1C_CONNECTION_TYPE_RCA (0x4)
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321 | #define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5)
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322 | #define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6)
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323 | #define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7)
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324 | #define CODEC_F1C_CONNECTION_TYPE_DIN (0x8)
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325 | #define CODEC_F1C_CONNECTION_TYPE_XLR (0x9)
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326 | #define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA)
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327 | #define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB)
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328 | #define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF)
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329 |
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330 | /* Configuration's color */
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331 | #define CODEC_F1C_COLOR_MASK (0xF)
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332 | #define CODEC_F1C_COLOR_SHIFT (12)
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333 | #define CODEC_F1C_COLOR_UNKNOWN (0)
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334 | #define CODEC_F1C_COLOR_BLACK (0x1)
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335 | #define CODEC_F1C_COLOR_GREY (0x2)
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336 | #define CODEC_F1C_COLOR_BLUE (0x3)
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337 | #define CODEC_F1C_COLOR_GREEN (0x4)
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338 | #define CODEC_F1C_COLOR_RED (0x5)
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339 | #define CODEC_F1C_COLOR_ORANGE (0x6)
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340 | #define CODEC_F1C_COLOR_YELLOW (0x7)
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341 | #define CODEC_F1C_COLOR_PURPLE (0x8)
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342 | #define CODEC_F1C_COLOR_PINK (0x9)
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343 | #define CODEC_F1C_COLOR_RESERVED_0 (0xA)
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344 | #define CODEC_F1C_COLOR_RESERVED_1 (0xB)
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345 | #define CODEC_F1C_COLOR_RESERVED_2 (0xC)
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346 | #define CODEC_F1C_COLOR_RESERVED_3 (0xD)
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347 | #define CODEC_F1C_COLOR_WHITE (0xE)
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348 | #define CODEC_F1C_COLOR_OTHER (0xF)
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349 |
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350 | /* Configuration's misc */
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351 | #define CODEC_F1C_MISC_MASK (0xF)
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352 | #define CODEC_F1C_MISC_SHIFT (8)
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353 | #define CODEC_F1C_MISC_JACK_DETECT RT_BIT(0)
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354 | #define CODEC_F1C_MISC_RESERVED_0 RT_BIT(1)
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355 | #define CODEC_F1C_MISC_RESERVED_1 RT_BIT(2)
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356 | #define CODEC_F1C_MISC_RESERVED_2 RT_BIT(3)
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357 |
|
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358 | /* Configuration's association */
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359 | #define CODEC_F1C_ASSOCIATION_MASK (0xF)
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360 | #define CODEC_F1C_ASSOCIATION_SHIFT (4)
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361 | /* Connection's sequence */
|
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362 | #define CODEC_F1C_SEQ_MASK (0xF)
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363 | #define CODEC_F1C_SEQ_SHIFT (0)
|
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364 |
|
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365 | /* Implementation identification (7.3.3.30) */
|
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366 | #define CODEC_MAKE_F20(bmid, bsku, aid) \
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367 | ( (((bmid) & 0xFFFF) << 16) \
|
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368 | | (((bsku) & 0xFF) << 8) \
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369 | | (((aid) & 0xFF)) \
|
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370 | )
|
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371 |
|
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372 | /* macro definition helping in filling the configuration registers. */
|
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373 | #define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \
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374 | ( ((port_connectivity) << CODEC_F1C_PORT_SHIFT) \
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375 | | ((location) << CODEC_F1C_LOCATION_SHIFT) \
|
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376 | | ((device) << CODEC_F1C_DEVICE_SHIFT) \
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377 | | ((connection_type) << CODEC_F1C_CONNECTION_TYPE_SHIFT) \
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378 | | ((color) << CODEC_F1C_COLOR_SHIFT) \
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379 | | ((misc) << CODEC_F1C_MISC_SHIFT) \
|
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380 | | ((association) << CODEC_F1C_ASSOCIATION_SHIFT) \
|
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381 | | ((sequence)))
|
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382 |
|
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383 |
|
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384 | typedef struct CODECVERB
|
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385 | {
|
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386 | uint32_t verb;
|
---|
387 | /* operation bitness mask */
|
---|
388 | uint32_t mask;
|
---|
389 | PFNCODECVERBPROCESSOR pfn;
|
---|
390 | } CODECVERB;
|
---|
391 |
|
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392 | #ifndef VBOX_HDA_CODEC_EMU
|
---|
393 | # define TYPE union
|
---|
394 | #else
|
---|
395 | # define TYPE struct
|
---|
396 | #endif
|
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397 | TYPE CODECNODE;
|
---|
398 | typedef TYPE CODECNODE CODECNODE;
|
---|
399 | typedef TYPE CODECNODE *PCODECNODE;
|
---|
400 |
|
---|
401 |
|
---|
402 | typedef enum
|
---|
403 | {
|
---|
404 | PI_INDEX = 0, /* PCM in */
|
---|
405 | PO_INDEX, /* PCM out */
|
---|
406 | MC_INDEX, /* Mic in */
|
---|
407 | LAST_INDEX
|
---|
408 | } ENMSOUNDSOURCE;
|
---|
409 |
|
---|
410 | typedef enum
|
---|
411 | {
|
---|
412 | STAC9220_CODEC,
|
---|
413 | ALC885_CODEC
|
---|
414 | } ENMCODEC;
|
---|
415 |
|
---|
416 | #define AFMT_IN In
|
---|
417 | #define AFMT_OUT Out
|
---|
418 |
|
---|
419 | #ifdef VBOX_WITH_AUDIO_FLEXIBLE_FORMAT
|
---|
420 | # define MAX_AUDIO_FORMAT 64
|
---|
421 | typedef SWVoiceIn *CODECAUDIOINFORMAT[MAX_AUDIO_FORMAT];
|
---|
422 | typedef SWVoiceOut *CODECAUDIOOUTFORMAT[MAX_AUDIO_FORMAT];
|
---|
423 | # define AUDIO_FORMAT_SELECTOR(pState, dir, hz, mult, divizor) ((pState)->aSwVoice##dir[(hz)*24 + (mult)*8 + (divizor)])
|
---|
424 | # define AFMT_HZ_48K 0
|
---|
425 | # define AFMT_HZ_44_1K 1
|
---|
426 | # define AFMT_MULT_X1 0
|
---|
427 | # define AFMT_MULT_X2 1
|
---|
428 | # define AFMT_MULT_X3 2 /* reserved for stac9220 */
|
---|
429 | # define AFMT_MULT_X4 3
|
---|
430 | # define AFMT_DIV_X1 0
|
---|
431 | # define AFMT_DIV_X2 1
|
---|
432 | # define AFMT_DIV_X3 2
|
---|
433 | # define AFMT_DIV_X4 3
|
---|
434 | # define AFMT_DIV_X5 4
|
---|
435 | # define AFMT_DIV_X6 5
|
---|
436 | # define AFMT_DIV_X7 6
|
---|
437 | # define AFMT_DIV_X8 7
|
---|
438 | #else
|
---|
439 | # define AUDIO_FORMAT_SELECTOR(pState, dir, hz, mult, divizor) ((pState)->SwVoice##dir)
|
---|
440 | #endif
|
---|
441 |
|
---|
442 |
|
---|
443 | typedef struct CODECState
|
---|
444 | {
|
---|
445 | uint16_t id;
|
---|
446 | uint16_t u16VendorId;
|
---|
447 | uint16_t u16DeviceId;
|
---|
448 | uint8_t u8BSKU;
|
---|
449 | uint8_t u8AssemblyId;
|
---|
450 | CODECVERB *pVerbs;
|
---|
451 | int cVerbs;
|
---|
452 | PCODECNODE pNodes;
|
---|
453 | QEMUSoundCard card;
|
---|
454 | #ifndef VBOX_WITH_AUDIO_FLEXIBLE_FORMAT
|
---|
455 | /** PCM in */
|
---|
456 | SWVoiceIn *SwVoiceIn;
|
---|
457 | /** PCM out */
|
---|
458 | SWVoiceOut *SwVoiceOut;
|
---|
459 | /** Mic in */
|
---|
460 | SWVoiceIn *voice_mc;
|
---|
461 | #else
|
---|
462 | CODECAUDIOOUTFORMAT aSwVoiceOut;
|
---|
463 | CODECAUDIOINFORMAT aSwVoiceIn;
|
---|
464 | #endif
|
---|
465 | ENMCODEC enmCodec;
|
---|
466 | void *pHDAState;
|
---|
467 | bool fInReset;
|
---|
468 | const uint8_t cTotalNodes;
|
---|
469 | const uint8_t *au8Ports;
|
---|
470 | const uint8_t *au8Dacs;
|
---|
471 | const uint8_t *au8AdcVols;
|
---|
472 | const uint8_t *au8Adcs;
|
---|
473 | const uint8_t *au8AdcMuxs;
|
---|
474 | const uint8_t *au8Pcbeeps;
|
---|
475 | const uint8_t *au8SpdifIns;
|
---|
476 | const uint8_t *au8SpdifOuts;
|
---|
477 | const uint8_t *au8DigInPins;
|
---|
478 | const uint8_t *au8DigOutPins;
|
---|
479 | const uint8_t *au8Cds;
|
---|
480 | const uint8_t *au8VolKnobs;
|
---|
481 | const uint8_t *au8Reserveds;
|
---|
482 | const uint8_t u8AdcVolsLineIn;
|
---|
483 | const uint8_t u8DacLineOut;
|
---|
484 | DECLR3CALLBACKMEMBER(int, pfnProcess, (struct CODECState *));
|
---|
485 | DECLR3CALLBACKMEMBER(int, pfnLookup, (struct CODECState *pState, uint32_t verb, PPFNCODECVERBPROCESSOR));
|
---|
486 | DECLR3CALLBACKMEMBER(int, pfnReset, (struct CODECState *pState));
|
---|
487 | DECLR3CALLBACKMEMBER(void, pfnTransfer, (struct CODECState *pState, ENMSOUNDSOURCE, int avail));
|
---|
488 | DECLR3CALLBACKMEMBER(int, pfnCodecNodeReset, (struct CODECState *pState, uint8_t, PCODECNODE));
|
---|
489 |
|
---|
490 | } CODECState;
|
---|
491 |
|
---|
492 | int codecConstruct(PPDMDEVINS pDevIns, CODECState *pCodecState, ENMCODEC enmCodec);
|
---|
493 | int codecDestruct(CODECState *pCodecState);
|
---|
494 | int codecSaveState(CODECState *pCodecState, PSSMHANDLE pSSMHandle);
|
---|
495 | int codecLoadState(CODECState *pCodecState, PSSMHANDLE pSSMHandle);
|
---|
496 |
|
---|
497 | #endif
|
---|