| 1 | ;; @file
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| 2 | ; IPRT - X86 and AMD64 Structures and Definitions that are not automatically
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| 3 | ; converted from the C header file.
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| 4 | ;
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| 5 |
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| 6 | ;
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| 7 | ; Copyright (C) 2012-2024 Oracle and/or its affiliates.
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| 8 | ;
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| 9 | ; This file is part of VirtualBox base platform packages, as
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| 10 | ; available from https://www.virtualbox.org.
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| 11 | ;
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| 12 | ; This program is free software; you can redistribute it and/or
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| 13 | ; modify it under the terms of the GNU General Public License
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| 14 | ; as published by the Free Software Foundation, in version 3 of the
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| 15 | ; License.
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| 16 | ;
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| 17 | ; This program is distributed in the hope that it will be useful, but
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| 18 | ; WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | ; General Public License for more details.
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| 21 | ;
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| 22 | ; You should have received a copy of the GNU General Public License
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| 23 | ; along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | ;
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| 25 | ; The contents of this file may alternatively be used under the terms
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| 26 | ; of the Common Development and Distribution License Version 1.0
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| 27 | ; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 28 | ; in the VirtualBox distribution, in which case the provisions of the
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| 29 | ; CDDL are applicable instead of those of the GPL.
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| 30 | ;
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| 31 | ; You may elect to license modified versions of this file under the
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| 32 | ; terms and conditions of either the GPL or the CDDL or both.
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| 33 | ;
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| 34 | ; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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| 35 | ;
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| 36 |
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| 37 | %ifndef ___iprt_x86extra_mac
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| 38 | %define ___iprt_x86extra_mac
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| 39 |
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| 40 |
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| 41 | %define X86_XCPT_DE 0x00
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| 42 | %define X86_XCPT_DB 0x01
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| 43 | %define X86_XCPT_NMI 0x02
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| 44 | %define X86_XCPT_BP 0x03
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| 45 | %define X86_XCPT_OF 0x04
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| 46 | %define X86_XCPT_BR 0x05
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| 47 | %define X86_XCPT_UD 0x06
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| 48 | %define X86_XCPT_NM 0x07
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| 49 | %define X86_XCPT_DF 0x08
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| 50 | %define X86_XCPT_CO_SEG_OVERRUN 0x09
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| 51 | %define X86_XCPT_TS 0x0a
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| 52 | %define X86_XCPT_NP 0x0b
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| 53 | %define X86_XCPT_SS 0x0c
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| 54 | %define X86_XCPT_GP 0x0d
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| 55 | %define X86_XCPT_PF 0x0e
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| 56 | %define X86_XCPT_MF 0x10
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| 57 | %define X86_XCPT_AC 0x11
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| 58 | %define X86_XCPT_MC 0x12
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| 59 | %define X86_XCPT_XF 0x13
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| 60 | %define X86_XCPT_VE 0x14
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| 61 | %define X86_XCPT_SX 0x1f
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| 62 |
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| 63 | %define PAGE_SIZE 0x1000
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| 64 |
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| 65 | ;; Same a ~(X86_CR0_PE | X86_CR0_PG) except it won't cause assembler warnings.
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| 66 | %define X86_CR0_NO_PE_NO_PG 0x7ffffffe
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| 67 |
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| 68 |
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| 69 |
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| 70 | ;;
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| 71 | ; 32-bit protected mode fstenv image.
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| 72 | ;
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| 73 | struc X86FSTENV32P
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| 74 | .FCW resw 1
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| 75 | .padding1 resw 1
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| 76 | .FSW resw 1
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| 77 | .padding2 resw 1
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| 78 | .FTW resw 1
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| 79 | .padding3 resw 1
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| 80 | .FPUIP resd 1
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| 81 | .FPUCS resw 1
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| 82 | .FOP resw 1
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| 83 | .FPUDP resd 1
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| 84 | .FPUDS resw 1
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| 85 | .padding4 resw 1
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| 86 | endstruc
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| 87 |
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| 88 |
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| 89 | ;;
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| 90 | ; The image saved by FXSAVE.
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| 91 | ;
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| 92 | struc X86FXSTATE
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| 93 | .FCW resw 1
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| 94 | .FSW resw 1
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| 95 | .FTW resw 1
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| 96 | .FOP resw 1
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| 97 | .FPUIP resd 1
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| 98 | .FPUCS resw 1
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| 99 | .Rsrvd1 resw 1
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| 100 | .FPUDP resd 1
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| 101 | .FPUDS resw 1
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| 102 | .Rsrvd2 resw 1
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| 103 | .MXCSR resd 1
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| 104 | .MXCSR_MASK resd 1
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| 105 | .st0 resd 4
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| 106 | .st1 resd 4
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| 107 | .st2 resd 4
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| 108 | .st3 resd 4
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| 109 | .st4 resd 4
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| 110 | .st5 resd 4
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| 111 | .st6 resd 4
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| 112 | .st7 resd 4
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| 113 | .xmm0 resd 4
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| 114 | .xmm1 resd 4
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| 115 | .xmm2 resd 4
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| 116 | .xmm3 resd 4
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| 117 | .xmm4 resd 4
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| 118 | .xmm5 resd 4
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| 119 | .xmm6 resd 4
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| 120 | .xmm7 resd 4
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| 121 | .xmm8 resd 4
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| 122 | .xmm9 resd 4
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| 123 | .xmm10 resd 4
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| 124 | .xmm11 resd 4
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| 125 | .xmm12 resd 4
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| 126 | .xmm13 resd 4
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| 127 | .xmm14 resd 4
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| 128 | .xmm15 resd 4
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| 129 | .au32RsrvdRest resd 24
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| 130 | endstruc
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| 131 |
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| 132 |
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| 133 | struc X86TSS16
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| 134 | .selPrev resw 1
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| 135 | .sp0 resw 1
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| 136 | .ss0 resw 1
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| 137 | .sp1 resw 1
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| 138 | .ss1 resw 1
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| 139 | .sp2 resw 1
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| 140 | .ss2 resw 1
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| 141 | .ip resw 1
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| 142 | .flags resw 1
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| 143 | .ax resw 1
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| 144 | .cx resw 1
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| 145 | .dx resw 1
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| 146 | .bx resw 1
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| 147 | .sp resw 1
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| 148 | .bp resw 1
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| 149 | .si resw 1
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| 150 | .di resw 1
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| 151 | .es resw 1
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| 152 | .cs resw 1
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| 153 | .ss resw 1
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| 154 | .ds resw 1
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| 155 | .selLdt resw 1
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| 156 | endstruc
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| 157 | AssertCompileSize(X86TSS16, 44)
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| 158 |
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| 159 |
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| 160 | struc X86TSS32
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| 161 | .selPrev resw 1
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| 162 | .padding1 resw 1
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| 163 | .esp0 resd 1
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| 164 | .ss0 resw 1
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| 165 | .padding_ss0 resw 1
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| 166 | .esp1 resd 1
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| 167 | .ss1 resw 1
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| 168 | .padding_ss1 resw 1
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| 169 | .esp2 resd 1
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| 170 | .ss2 resw 1
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| 171 | .padding_ss2 resw 1
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| 172 | .cr3 resd 1
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| 173 | .eip resd 1
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| 174 | .eflags resd 1
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| 175 | .eax resd 1
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| 176 | .ecx resd 1
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| 177 | .edx resd 1
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| 178 | .ebx resd 1
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| 179 | .esp resd 1
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| 180 | .ebp resd 1
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| 181 | .esi resd 1
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| 182 | .edi resd 1
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| 183 | .es resw 1
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| 184 | .padding_es resw 1
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| 185 | .cs resw 1
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| 186 | .padding_cs resw 1
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| 187 | .ss resw 1
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| 188 | .padding_ss resw 1
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| 189 | .ds resw 1
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| 190 | .padding_ds resw 1
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| 191 | .fs resw 1
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| 192 | .padding_fs resw 1
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| 193 | .gs resw 1
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| 194 | .padding_gs resw 1
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| 195 | .selLdt resw 1
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| 196 | .padding_ldt resw 1
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| 197 | .fDebugTrap resw 1
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| 198 | .offIoBitmap resw 1
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| 199 | ;.IntRedirBitmap resb 32 - this is optional.
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| 200 | endstruc
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| 201 | AssertCompileSize(X86TSS32,104)
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| 202 |
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| 203 |
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| 204 | struc X86TSS64
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| 205 | .u32Reserved resd 1
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| 206 | .rsp0 resq 1
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| 207 | .rsp1 resq 1
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| 208 | .rsp2 resq 1
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| 209 | .u32Reserved2 resd 2
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| 210 | .ist1 resq 1
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| 211 | .ist2 resq 1
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| 212 | .ist3 resq 1
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| 213 | .ist4 resq 1
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| 214 | .ist5 resq 1
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| 215 | .ist6 resq 1
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| 216 | .ist7 resq 1
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| 217 | .u16Reserved resw 5
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| 218 | .offIoBitmap resw 1
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| 219 | ;.IntRedirBitmap resb 32 - this isn't really there!! VBox addition for x86TSS32 structure compatibility in x86.h.
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| 220 | endstruc
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| 221 | AssertCompileSize(X86TSS64, 104)
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| 222 |
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| 223 |
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| 224 | ;; @name Helper values for the X86_MKOP_XXX macros.
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| 225 | ;; @{
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| 226 | %define X86_MKOP_GREG8_al 0
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| 227 | %define X86_MKOP_GREG8_cl 1
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| 228 | %define X86_MKOP_GREG8_dl 2
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| 229 | %define X86_MKOP_GREG8_bl 3
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| 230 | %define X86_MKOP_GREG8_ah 4
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| 231 | %define X86_MKOP_GREG8_ch 5
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| 232 | %define X86_MKOP_GREG8_dh 6
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| 233 | %define X86_MKOP_GREG8_bh 7
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| 234 | %define X86_MKOP_GREG8_spl 20
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| 235 | %define X86_MKOP_GREG8_bpl 21
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| 236 | %define X86_MKOP_GREG8_sil 22
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| 237 | %define X86_MKOP_GREG8_dil 23
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| 238 | %define X86_MKOP_GREG8_r8b 8
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| 239 | %define X86_MKOP_GREG8_r9b 9
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| 240 | %define X86_MKOP_GREG8_r10b 10
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| 241 | %define X86_MKOP_GREG8_r11b 11
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| 242 | %define X86_MKOP_GREG8_r12b 12
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| 243 | %define X86_MKOP_GREG8_r13b 13
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| 244 | %define X86_MKOP_GREG8_r14b 14
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| 245 | %define X86_MKOP_GREG8_r15b 15
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| 246 |
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| 247 | %define X86_MKOP_GREG16_ax 0
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| 248 | %define X86_MKOP_GREG16_cx 1
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| 249 | %define X86_MKOP_GREG16_dx 2
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| 250 | %define X86_MKOP_GREG16_bx 3
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| 251 | %define X86_MKOP_GREG16_sp 4
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| 252 | %define X86_MKOP_GREG16_bp 5
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| 253 | %define X86_MKOP_GREG16_si 6
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| 254 | %define X86_MKOP_GREG16_di 7
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| 255 | %define X86_MKOP_GREG16_r8w 8
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| 256 | %define X86_MKOP_GREG16_r9w 9
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| 257 | %define X86_MKOP_GREG16_r10w 10
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| 258 | %define X86_MKOP_GREG16_r11w 11
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| 259 | %define X86_MKOP_GREG16_r12w 12
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| 260 | %define X86_MKOP_GREG16_r13w 13
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| 261 | %define X86_MKOP_GREG16_r14w 14
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| 262 | %define X86_MKOP_GREG16_r15w 15
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| 263 |
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| 264 | %define X86_MKOP_GREG32_eax 0
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| 265 | %define X86_MKOP_GREG32_ecx 1
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| 266 | %define X86_MKOP_GREG32_edx 2
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| 267 | %define X86_MKOP_GREG32_ebx 3
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| 268 | %define X86_MKOP_GREG32_esp 4
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| 269 | %define X86_MKOP_GREG32_ebp 5
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| 270 | %define X86_MKOP_GREG32_esi 6
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| 271 | %define X86_MKOP_GREG32_edi 7
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| 272 | %define X86_MKOP_GREG32_r8d 8
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| 273 | %define X86_MKOP_GREG32_r9d 9
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| 274 | %define X86_MKOP_GREG32_r10d 10
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| 275 | %define X86_MKOP_GREG32_r11d 11
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| 276 | %define X86_MKOP_GREG32_r12d 12
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| 277 | %define X86_MKOP_GREG32_r13d 13
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| 278 | %define X86_MKOP_GREG32_r14d 14
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| 279 | %define X86_MKOP_GREG32_r15d 15
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| 280 |
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| 281 | %define X86_MKOP_GREG64_rax 0
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| 282 | %define X86_MKOP_GREG64_rcx 1
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| 283 | %define X86_MKOP_GREG64_rdx 2
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| 284 | %define X86_MKOP_GREG64_rbx 3
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| 285 | %define X86_MKOP_GREG64_rsp 4
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| 286 | %define X86_MKOP_GREG64_rbp 5
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| 287 | %define X86_MKOP_GREG64_rsi 6
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| 288 | %define X86_MKOP_GREG64_rdi 7
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| 289 | %define X86_MKOP_GREG64_r8 8
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| 290 | %define X86_MKOP_GREG64_r9 9
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| 291 | %define X86_MKOP_GREG64_r10 10
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| 292 | %define X86_MKOP_GREG64_r11 11
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| 293 | %define X86_MKOP_GREG64_r12 12
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| 294 | %define X86_MKOP_GREG64_r13 13
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| 295 | %define X86_MKOP_GREG64_r14 14
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| 296 | %define X86_MKOP_GREG64_r15 15
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| 297 | ;; @}
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| 298 |
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| 299 | ;;
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| 300 | ; Encodes the MODRM byte for an instruction with 8-bit operand size.
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| 301 | ; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
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| 302 | ; @param 2 The MODRM.REG register mnemonic.
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| 303 | ; @param 3 The MODRM.RM register mnemonic.
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| 304 | %macro X86_MKOP_MODRM8 3
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| 305 | %assign x86_mkop_modrm8_iReg X86_MKOP_GREG8_ %+ %2
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| 306 | %assign x86_mkop_modrm8_iRm X86_MKOP_GREG8_ %+ %3
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| 307 | db X86_MODRM_MAKE(%1, x86_mkop_modrm8_iReg & 7, x86_mkop_modrm8_iRm & 7)
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| 308 | %endmacro
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| 309 |
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| 310 | ;;
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| 311 | ; Encodes the optional REX prefix for an instruction with 8-bit operand size.
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| 312 | ; @param 1 The MODRM.REG register mnemonic.
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| 313 | ; @param 2 The MODRM.RM register mnemonic.
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| 314 | %macro X86_MKOP_REX8 2
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| 315 | %assign x86_mkop_rex8_iReg X86_MKOP_GREG8_ %+ %1
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| 316 | %assign x86_mkop_rex8_iRm X86_MKOP_GREG8_ %+ %2
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| 317 | %if x86_mkop_rex8_iReg >= 8 || x86_mkop_rex8_iRm >= 8
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| 318 | %if __BITS__ == 64
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| 319 | %if (x86_mkop_rex8_iReg < 4 || x86_mkop_rex8_iReg >= 8) && (x86_mkop_rex8_iRm < 4 || x86_mkop_rex8_iRm >= 8)
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| 320 | db X86_OP_REX | (((x86_mkop_rex8_iReg >> 3) & 1) * X86_OP_REX_R) | (((x86_mkop_rex8_iRm >> 3) & 1) * X86_OP_REX_B)
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| 321 | %else
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| 322 | %error X86_MKOP_REX8: Invalid operand mix: %1, %2
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| 323 | %endif
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| 324 | %else
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| 325 | %error X86_MKOP_REX8: not in 64-bit code: %1, %2
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| 326 | %endif
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| 327 | %endif
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| 328 | %endmacro
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| 329 |
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| 330 |
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| 331 | ;;
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| 332 | ; Encodes the MODRM byte for an instruction with 16-bit operand size.
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| 333 | ; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
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| 334 | ; @param 2 The MODRM.REG register mnemonic.
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| 335 | ; @param 3 The MODRM.RM register mnemonic.
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| 336 | %macro X86_MKOP_MODRM16 3
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| 337 | %assign x86_mkop_modrm16_iReg X86_MKOP_GREG16_ %+ %2
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| 338 | %assign x86_mkop_modrm16_iRm X86_MKOP_GREG16_ %+ %3
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| 339 | db X86_MODRM_MAKE(%1, x86_mkop_modrm16_iReg & 7, x86_mkop_modrm16_iRm & 7)
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| 340 | %endmacro
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| 341 |
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| 342 | ;;
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| 343 | ; Encodes the optional REX prefix for an instruction with 16-bit operand size.
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| 344 | ; @param 1 The MODRM.REG register mnemonic.
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| 345 | ; @param 2 The MODRM.RM register mnemonic.
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| 346 | %macro X86_MKOP_REX16 2
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| 347 | %assign x86_mkop_rex16_iReg X86_MKOP_GREG16_ %+ %1
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| 348 | %assign x86_mkop_rex16_iRm X86_MKOP_GREG16_ %+ %2
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| 349 | %if x86_mkop_rex16_iReg >= 8 || x86_mkop_rex16_iRm >= 8
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| 350 | %if __BITS__ == 64
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| 351 | db X86_OP_REX | ((x86_mkop_rex16_iReg >> 3) * X86_OP_REX_R) | ((x86_mkop_rex16_iRm >> 3) * X86_OP_REX_B)
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| 352 | %else
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| 353 | %error X86_MKOP_REX16: not in 64-bit code: %1, %2
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| 354 | %endif
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| 355 | %endif
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| 356 | %endmacro
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| 357 |
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| 358 |
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| 359 | ;;
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| 360 | ; Encodes the MODRM byte for an instruction with 32-bit operand size.
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| 361 | ; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
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| 362 | ; @param 2 The MODRM.REG register mnemonic.
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| 363 | ; @param 3 The MODRM.RM register mnemonic.
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| 364 | %macro X86_MKOP_MODRM32 3
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| 365 | %assign x86_mkop_modrm32_iReg X86_MKOP_GREG32_ %+ %2
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| 366 | %assign x86_mkop_modrm32_iRm X86_MKOP_GREG32_ %+ %3
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| 367 | db X86_MODRM_MAKE(%1, x86_mkop_modrm32_iReg & 7, x86_mkop_modrm32_iRm & 7)
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| 368 | %endmacro
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| 369 |
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| 370 | ;;
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| 371 | ; Encodes the optional REX prefix for an instruction with 32-bit operand size.
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| 372 | ; @param 1 The MODRM.REG register mnemonic.
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| 373 | ; @param 2 The MODRM.RM register mnemonic.
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| 374 | %macro X86_MKOP_REX32 2
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| 375 | %assign x86_mkop_rex32_iReg X86_MKOP_GREG32_ %+ %1
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| 376 | %assign x86_mkop_rex32_iRm X86_MKOP_GREG32_ %+ %2
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| 377 | %if x86_mkop_rex32_iReg >= 8 || x86_mkop_rex32_iRm >= 8
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| 378 | %if __BITS__ == 64
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| 379 | db X86_OP_REX | ((x86_mkop_rex32_iReg >> 3) * X86_OP_REX_R) | ((x86_mkop_rex32_iRm >> 3) * X86_OP_REX_B)
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| 380 | %else
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| 381 | %error X86_MKOP_REX32: not in 64-bit code: %1, %2
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| 382 | %endif
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| 383 | %endif
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| 384 | %endmacro
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| 385 |
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| 386 |
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| 387 | ;;
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| 388 | ; Encodes the MODRM byte for an instruction with 64-bit operand size.
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| 389 | ; @param 1 The MODRM.MOD value (X86_MOD_REG, X86_MOD_MEM0, X86_MOD_MEM1, X86_MOD_MEM4).
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| 390 | ; @param 2 The MODRM.REG register mnemonic.
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| 391 | ; @param 3 The MODRM.RM register mnemonic.
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| 392 | %macro X86_MKOP_MODRM64 3
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| 393 | %assign x86_mkop_modrm64_iReg X86_MKOP_GREG64_ %+ %2
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| 394 | %assign x86_mkop_modrm64_iRm X86_MKOP_GREG64_ %+ %3
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| 395 | db X86_MODRM_MAKE(%1, x86_mkop_modrm64_iReg & 7, x86_mkop_modrm64_iRm & 7)
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| 396 | %endmacro
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| 397 |
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| 398 | ;;
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| 399 | ; Encodes the REX prefix for an instruction with 64-bit operand size.
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| 400 | ; @param 1 The MODRM.REG register mnemonic.
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| 401 | ; @param 2 The MODRM.RM register mnemonic.
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| 402 | %macro X86_MKOP_REX64 2
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| 403 | %assign x86_mkop_rex64_iReg X86_MKOP_GREG64_ %+ %1
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| 404 | %assign x86_mkop_rex64_iRm X86_MKOP_GREG64_ %+ %2
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| 405 | %if __BITS__ == 64
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| 406 | db X86_OP_REX_W | ((x86_mkop_rex64_iReg >> 3) * X86_OP_REX_R) | ((x86_mkop_rex64_iRm >> 3) * X86_OP_REX_B)
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| 407 | %else
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| 408 | %error X86_MKOP_REX64: not in 64-bit code: %1, %2
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| 409 | %endif
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| 410 | %endmacro
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| 411 |
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| 412 |
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| 413 | %endif
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| 414 |
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